drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                 struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct rte_ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct rte_ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct rte_ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr);
 143
 144 /* Default hash key buffer for RSS */
 145 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 146
 147 struct rte_i40evf_xstats_name_off {
 148         char name[RTE_ETH_XSTATS_NAME_SIZE];
 149         unsigned offset;
 150 };
 151
 152 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 153         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 154         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 155         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 156         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 157         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 158         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 159                 rx_unknown_protocol)},
 160         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 161         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 162         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 163         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 164         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 165         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 166 };
 167
 168 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 169                 sizeof(rte_i40evf_stats_strings[0]))
 170
 171 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 172         .dev_configure        = i40evf_dev_configure,
 173         .dev_start            = i40evf_dev_start,
 174         .dev_stop             = i40evf_dev_stop,
 175         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 176         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 177         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 178         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 179         .link_update          = i40evf_dev_link_update,
 180         .stats_get            = i40evf_dev_stats_get,
 181         .stats_reset          = i40evf_dev_xstats_reset,
 182         .xstats_get           = i40evf_dev_xstats_get,
 183         .xstats_get_names     = i40evf_dev_xstats_get_names,
 184         .xstats_reset         = i40evf_dev_xstats_reset,
 185         .dev_close            = i40evf_dev_close,
 186         .dev_reset            = i40evf_dev_reset,
 187         .dev_infos_get        = i40evf_dev_info_get,
 188         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 189         .vlan_filter_set      = i40evf_vlan_filter_set,
 190         .vlan_offload_set     = i40evf_vlan_offload_set,
 191         .rx_queue_start       = i40evf_dev_rx_queue_start,
 192         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 193         .tx_queue_start       = i40evf_dev_tx_queue_start,
 194         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 195         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 196         .rx_queue_release     = i40e_dev_rx_queue_release,
 197         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 198         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 199         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 200         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 201         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 202         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 203         .tx_queue_release     = i40e_dev_tx_queue_release,
 204         .rx_queue_count       = i40e_dev_rx_queue_count,
 205         .rxq_info_get         = i40e_rxq_info_get,
 206         .txq_info_get         = i40e_txq_info_get,
 207         .mac_addr_add         = i40evf_add_mac_addr,
 208         .mac_addr_remove      = i40evf_del_mac_addr,
 209         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 210         .reta_update          = i40evf_dev_rss_reta_update,
 211         .reta_query           = i40evf_dev_rss_reta_query,
 212         .rss_hash_update      = i40evf_dev_rss_hash_update,
 213         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 214         .mtu_set              = i40evf_dev_mtu_set,
 215         .mac_addr_set         = i40evf_set_default_mac_addr,
 216 };
 217
 218 /*
 219  * Read data in admin queue to get msg from pf driver
 220  */
 221 static enum i40evf_aq_result
 222 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 223 {
 224         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 225         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 226         struct i40e_arq_event_info event;
 227         enum virtchnl_ops opcode;
 228         enum i40e_status_code retval;
 229         int ret;
 230         enum i40evf_aq_result result = I40EVF_MSG_NON;
 231
 232         event.buf_len = data->buf_len;
 233         event.msg_buf = data->msg;
 234         ret = i40e_clean_arq_element(hw, &event, NULL);
 235         /* Can't read any msg from adminQ */
 236         if (ret) {
 237                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 238                         result = I40EVF_MSG_ERR;
 239                 return result;
 240         }
 241
 242         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 243         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 244         /* pf sys event */
 245         if (opcode == VIRTCHNL_OP_EVENT) {
 246                 struct virtchnl_pf_event *vpe =
 247                         (struct virtchnl_pf_event *)event.msg_buf;
 248
 249                 result = I40EVF_MSG_SYS;
 250                 switch (vpe->event) {
 251                 case VIRTCHNL_EVENT_LINK_CHANGE:
 252                         vf->link_up =
 253                                 vpe->event_data.link_event.link_status;
 254                         vf->link_speed =
 255                                 vpe->event_data.link_event.link_speed;
 256                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 257                         PMD_DRV_LOG(INFO, "Link status update:%s",
 258                                     vf->link_up ? "up" : "down");
 259                         break;
 260                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 261                         vf->vf_reset = true;
 262                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 263                         PMD_DRV_LOG(INFO, "vf is reseting");
 264                         break;
 265                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 266                         vf->dev_closed = true;
 267                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 268                         PMD_DRV_LOG(INFO, "PF driver closed");
 269                         break;
 270                 default:
 271                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 272                                     __func__, vpe->event);
 273                 }
 274         } else {
 275                 /* async reply msg on command issued by vf previously */
 276                 result = I40EVF_MSG_CMD;
 277                 /* Actual data length read from PF */
 278                 data->msg_len = event.msg_len;
 279         }
 280
 281         data->result = retval;
 282         data->ops = opcode;
 283
 284         return result;
 285 }
 286
 287 /**
 288  * clear current command. Only call in case execute
 289  * _atomic_set_cmd successfully.
 290  */
 291 static inline void
 292 _clear_cmd(struct i40e_vf *vf)
 293 {
 294         rte_wmb();
 295         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 296 }
 297
 298 /*
 299  * Check there is pending cmd in execution. If none, set new command.
 300  */
 301 static inline int
 302 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 303 {
 304         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 305                         VIRTCHNL_OP_UNKNOWN, ops);
 306
 307         if (!ret)
 308                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 309
 310         return !ret;
 311 }
 312
 313 #define MAX_TRY_TIMES 200
 314 #define ASQ_DELAY_MS  10
 315
 316 static int
 317 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 318 {
 319         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 320         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 321         struct i40evf_arq_msg_info info;
 322         enum i40evf_aq_result ret;
 323         int err, i = 0;
 324
 325         if (_atomic_set_cmd(vf, args->ops))
 326                 return -1;
 327
 328         info.msg = args->out_buffer;
 329         info.buf_len = args->out_size;
 330         info.ops = VIRTCHNL_OP_UNKNOWN;
 331         info.result = I40E_SUCCESS;
 332
 333         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 334                      args->in_args, args->in_args_size, NULL);
 335         if (err) {
 336                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 337                 _clear_cmd(vf);
 338                 return err;
 339         }
 340
 341         switch (args->ops) {
 342         case VIRTCHNL_OP_RESET_VF:
 343                 /*no need to process in this function */
 344                 err = 0;
 345                 break;
 346         case VIRTCHNL_OP_VERSION:
 347         case VIRTCHNL_OP_GET_VF_RESOURCES:
 348                 /* for init adminq commands, need to poll the response */
 349                 err = -1;
 350                 do {
 351                         ret = i40evf_read_pfmsg(dev, &info);
 352                         vf->cmd_retval = info.result;
 353                         if (ret == I40EVF_MSG_CMD) {
 354                                 err = 0;
 355                                 break;
 356                         } else if (ret == I40EVF_MSG_ERR)
 357                                 break;
 358                         rte_delay_ms(ASQ_DELAY_MS);
 359                         /* If don't read msg or read sys event, continue */
 360                 } while (i++ < MAX_TRY_TIMES);
 361                 _clear_cmd(vf);
 362                 break;
 363         case VIRTCHNL_OP_REQUEST_QUEUES:
 364                 /**
 365                  * ignore async reply, only wait for system message,
 366                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 367                  * if not, means request queues failed.
 368                  */
 369                 err = -1;
 370                 do {
 371                         ret = i40evf_read_pfmsg(dev, &info);
 372                         vf->cmd_retval = info.result;
 373                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 374                                 err = 0;
 375                                 break;
 376                         } else if (ret == I40EVF_MSG_ERR ||
 377                                            ret == I40EVF_MSG_CMD) {
 378                                 break;
 379                         }
 380                         rte_delay_ms(ASQ_DELAY_MS);
 381                         /* If don't read msg or read sys event, continue */
 382                 } while (i++ < MAX_TRY_TIMES);
 383                 _clear_cmd(vf);
 384                 break;
 385
 386         default:
 387                 /* for other adminq in running time, waiting the cmd done flag */
 388                 err = -1;
 389                 do {
 390                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 391                                 err = 0;
 392                                 break;
 393                         }
 394                         rte_delay_ms(ASQ_DELAY_MS);
 395                         /* If don't read msg or read sys event, continue */
 396                 } while (i++ < MAX_TRY_TIMES);
 397                 /* If there's no response is received, clear command */
 398                 if (i >= MAX_TRY_TIMES) {
 399                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 400                         _clear_cmd(vf);
 401                 }
 402                 break;
 403         }
 404
 405         return err | vf->cmd_retval;
 406 }
 407
 408 /*
 409  * Check API version with sync wait until version read or fail from admin queue
 410  */
 411 static int
 412 i40evf_check_api_version(struct rte_eth_dev *dev)
 413 {
 414         struct virtchnl_version_info version, *pver;
 415         int err;
 416         struct vf_cmd_info args;
 417         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 418
 419         version.major = VIRTCHNL_VERSION_MAJOR;
 420         version.minor = VIRTCHNL_VERSION_MINOR;
 421
 422         args.ops = VIRTCHNL_OP_VERSION;
 423         args.in_args = (uint8_t *)&version;
 424         args.in_args_size = sizeof(version);
 425         args.out_buffer = vf->aq_resp;
 426         args.out_size = I40E_AQ_BUF_SZ;
 427
 428         err = i40evf_execute_vf_cmd(dev, &args);
 429         if (err) {
 430                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 431                 return err;
 432         }
 433
 434         pver = (struct virtchnl_version_info *)args.out_buffer;
 435         vf->version_major = pver->major;
 436         vf->version_minor = pver->minor;
 437         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 438                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 439                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 440         else {
 441                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 442                                         vf->version_major, vf->version_minor,
 443                                                 VIRTCHNL_VERSION_MAJOR,
 444                                                 VIRTCHNL_VERSION_MINOR);
 445                 return -1;
 446         }
 447
 448         return 0;
 449 }
 450
 451 static int
 452 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 453 {
 454         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 455         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 456         int err;
 457         struct vf_cmd_info args;
 458         uint32_t caps, len;
 459
 460         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 461         args.out_buffer = vf->aq_resp;
 462         args.out_size = I40E_AQ_BUF_SZ;
 463         if (PF_IS_V11(vf)) {
 464                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 465                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 466                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 467                        VIRTCHNL_VF_OFFLOAD_VLAN |
 468                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 469                 args.in_args = (uint8_t *)&caps;
 470                 args.in_args_size = sizeof(caps);
 471         } else {
 472                 args.in_args = NULL;
 473                 args.in_args_size = 0;
 474         }
 475         err = i40evf_execute_vf_cmd(dev, &args);
 476
 477         if (err) {
 478                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 479                 return err;
 480         }
 481
 482         len =  sizeof(struct virtchnl_vf_resource) +
 483                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 484
 485         rte_memcpy(vf->vf_res, args.out_buffer,
 486                         RTE_MIN(args.out_size, len));
 487         i40e_vf_parse_hw_config(hw, vf->vf_res);
 488
 489         return 0;
 490 }
 491
 492 static int
 493 i40evf_config_promisc(struct rte_eth_dev *dev,
 494                       bool enable_unicast,
 495                       bool enable_multicast)
 496 {
 497         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 498         int err;
 499         struct vf_cmd_info args;
 500         struct virtchnl_promisc_info promisc;
 501
 502         promisc.flags = 0;
 503         promisc.vsi_id = vf->vsi_res->vsi_id;
 504
 505         if (enable_unicast)
 506                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 507
 508         if (enable_multicast)
 509                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 510
 511         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 512         args.in_args = (uint8_t *)&promisc;
 513         args.in_args_size = sizeof(promisc);
 514         args.out_buffer = vf->aq_resp;
 515         args.out_size = I40E_AQ_BUF_SZ;
 516
 517         err = i40evf_execute_vf_cmd(dev, &args);
 518
 519         if (err)
 520                 PMD_DRV_LOG(ERR, "fail to execute command "
 521                             "CONFIG_PROMISCUOUS_MODE");
 522         return err;
 523 }
 524
 525 static int
 526 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 527 {
 528         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 529         struct vf_cmd_info args;
 530         int ret;
 531
 532         memset(&args, 0, sizeof(args));
 533         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 534         args.in_args = NULL;
 535         args.in_args_size = 0;
 536         args.out_buffer = vf->aq_resp;
 537         args.out_size = I40E_AQ_BUF_SZ;
 538         ret = i40evf_execute_vf_cmd(dev, &args);
 539         if (ret)
 540                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 541                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 542
 543         return ret;
 544 }
 545
 546 static int
 547 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 548 {
 549         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 550         struct vf_cmd_info args;
 551         int ret;
 552
 553         memset(&args, 0, sizeof(args));
 554         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 555         args.in_args = NULL;
 556         args.in_args_size = 0;
 557         args.out_buffer = vf->aq_resp;
 558         args.out_size = I40E_AQ_BUF_SZ;
 559         ret = i40evf_execute_vf_cmd(dev, &args);
 560         if (ret)
 561                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 562                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 563
 564         return ret;
 565 }
 566
 567 static void
 568 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 569                                   uint16_t vsi_id,
 570                                   uint16_t queue_id,
 571                                   uint16_t nb_txq,
 572                                   struct i40e_tx_queue *txq)
 573 {
 574         txq_info->vsi_id = vsi_id;
 575         txq_info->queue_id = queue_id;
 576         if (queue_id < nb_txq) {
 577                 txq_info->ring_len = txq->nb_tx_desc;
 578                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 579         }
 580 }
 581
 582 static void
 583 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 584                                   uint16_t vsi_id,
 585                                   uint16_t queue_id,
 586                                   uint16_t nb_rxq,
 587                                   uint32_t max_pkt_size,
 588                                   struct i40e_rx_queue *rxq)
 589 {
 590         rxq_info->vsi_id = vsi_id;
 591         rxq_info->queue_id = queue_id;
 592         rxq_info->max_pkt_size = max_pkt_size;
 593         if (queue_id < nb_rxq) {
 594                 rxq_info->ring_len = rxq->nb_rx_desc;
 595                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 596                 rxq_info->databuffer_size =
 597                         (rte_pktmbuf_data_room_size(rxq->mp) -
 598                                 RTE_PKTMBUF_HEADROOM);
 599         }
 600 }
 601
 602 static int
 603 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 604 {
 605         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 606         struct i40e_rx_queue **rxq =
 607                 (struct i40e_rx_queue **)dev->data->rx_queues;
 608         struct i40e_tx_queue **txq =
 609                 (struct i40e_tx_queue **)dev->data->tx_queues;
 610         struct virtchnl_vsi_queue_config_info *vc_vqci;
 611         struct virtchnl_queue_pair_info *vc_qpi;
 612         struct vf_cmd_info args;
 613         uint16_t i, nb_qp = vf->num_queue_pairs;
 614         const uint32_t size =
 615                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 616         uint8_t buff[size];
 617         int ret;
 618
 619         memset(buff, 0, sizeof(buff));
 620         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 621         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 622         vc_vqci->num_queue_pairs = nb_qp;
 623
 624         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 625                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 626                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 627                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 628                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 629                                         vf->max_pkt_len, rxq[i]);
 630         }
 631         memset(&args, 0, sizeof(args));
 632         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 633         args.in_args = (uint8_t *)vc_vqci;
 634         args.in_args_size = size;
 635         args.out_buffer = vf->aq_resp;
 636         args.out_size = I40E_AQ_BUF_SZ;
 637         ret = i40evf_execute_vf_cmd(dev, &args);
 638         if (ret)
 639                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 640                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 641
 642         return ret;
 643 }
 644
 645 static int
 646 i40evf_config_irq_map(struct rte_eth_dev *dev)
 647 {
 648         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 649         struct vf_cmd_info args;
 650         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 651                 sizeof(struct virtchnl_vector_map)];
 652         struct virtchnl_irq_map_info *map_info;
 653         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 654         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 655         uint32_t vector_id;
 656         int i, err;
 657
 658         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 659             rte_intr_allow_others(intr_handle))
 660                 vector_id = I40E_RX_VEC_START;
 661         else
 662                 vector_id = I40E_MISC_VEC_ID;
 663
 664         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 665         map_info->num_vectors = 1;
 666         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 667         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 668         /* Alway use default dynamic MSIX interrupt */
 669         map_info->vecmap[0].vector_id = vector_id;
 670         /* Don't map any tx queue */
 671         map_info->vecmap[0].txq_map = 0;
 672         map_info->vecmap[0].rxq_map = 0;
 673         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 674                 map_info->vecmap[0].rxq_map |= 1 << i;
 675                 if (rte_intr_dp_is_en(intr_handle))
 676                         intr_handle->intr_vec[i] = vector_id;
 677         }
 678
 679         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 680         args.in_args = (u8 *)cmd_buffer;
 681         args.in_args_size = sizeof(cmd_buffer);
 682         args.out_buffer = vf->aq_resp;
 683         args.out_size = I40E_AQ_BUF_SZ;
 684         err = i40evf_execute_vf_cmd(dev, &args);
 685         if (err)
 686                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 687
 688         return err;
 689 }
 690
 691 static int
 692 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 693                                 bool on)
 694 {
 695         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 696         struct virtchnl_queue_select queue_select;
 697         int err;
 698         struct vf_cmd_info args;
 699         memset(&queue_select, 0, sizeof(queue_select));
 700         queue_select.vsi_id = vf->vsi_res->vsi_id;
 701
 702         if (isrx)
 703                 queue_select.rx_queues |= 1 << qid;
 704         else
 705                 queue_select.tx_queues |= 1 << qid;
 706
 707         if (on)
 708                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 709         else
 710                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 711         args.in_args = (u8 *)&queue_select;
 712         args.in_args_size = sizeof(queue_select);
 713         args.out_buffer = vf->aq_resp;
 714         args.out_size = I40E_AQ_BUF_SZ;
 715         err = i40evf_execute_vf_cmd(dev, &args);
 716         if (err)
 717                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 718                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 719
 720         return err;
 721 }
 722
 723 static int
 724 i40evf_start_queues(struct rte_eth_dev *dev)
 725 {
 726         struct rte_eth_dev_data *dev_data = dev->data;
 727         int i;
 728         struct i40e_rx_queue *rxq;
 729         struct i40e_tx_queue *txq;
 730
 731         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 732                 rxq = dev_data->rx_queues[i];
 733                 if (rxq->rx_deferred_start)
 734                         continue;
 735                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 736                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 737                         return -1;
 738                 }
 739         }
 740
 741         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 742                 txq = dev_data->tx_queues[i];
 743                 if (txq->tx_deferred_start)
 744                         continue;
 745                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 746                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 747                         return -1;
 748                 }
 749         }
 750
 751         return 0;
 752 }
 753
 754 static int
 755 i40evf_stop_queues(struct rte_eth_dev *dev)
 756 {
 757         int i;
 758
 759         /* Stop TX queues first */
 760         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 761                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 762                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 763                         return -1;
 764                 }
 765         }
 766
 767         /* Then stop RX queues */
 768         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 769                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 770                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 771                         return -1;
 772                 }
 773         }
 774
 775         return 0;
 776 }
 777
 778 static int
 779 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 780                     struct rte_ether_addr *addr,
 781                     __rte_unused uint32_t index,
 782                     __rte_unused uint32_t pool)
 783 {
 784         struct virtchnl_ether_addr_list *list;
 785         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 786         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 787                         sizeof(struct virtchnl_ether_addr)];
 788         int err;
 789         struct vf_cmd_info args;
 790
 791         if (is_zero_ether_addr(addr)) {
 792                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 793                             addr->addr_bytes[0], addr->addr_bytes[1],
 794                             addr->addr_bytes[2], addr->addr_bytes[3],
 795                             addr->addr_bytes[4], addr->addr_bytes[5]);
 796                 return I40E_ERR_INVALID_MAC_ADDR;
 797         }
 798
 799         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 800         list->vsi_id = vf->vsi_res->vsi_id;
 801         list->num_elements = 1;
 802         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 803                                         sizeof(addr->addr_bytes));
 804
 805         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 806         args.in_args = cmd_buffer;
 807         args.in_args_size = sizeof(cmd_buffer);
 808         args.out_buffer = vf->aq_resp;
 809         args.out_size = I40E_AQ_BUF_SZ;
 810         err = i40evf_execute_vf_cmd(dev, &args);
 811         if (err)
 812                 PMD_DRV_LOG(ERR, "fail to execute command "
 813                             "OP_ADD_ETHER_ADDRESS");
 814         else
 815                 vf->vsi.mac_num++;
 816
 817         return err;
 818 }
 819
 820 static void
 821 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 822                             struct rte_ether_addr *addr)
 823 {
 824         struct virtchnl_ether_addr_list *list;
 825         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 826         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 827                         sizeof(struct virtchnl_ether_addr)];
 828         int err;
 829         struct vf_cmd_info args;
 830
 831         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 832                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 833                             addr->addr_bytes[0], addr->addr_bytes[1],
 834                             addr->addr_bytes[2], addr->addr_bytes[3],
 835                             addr->addr_bytes[4], addr->addr_bytes[5]);
 836                 return;
 837         }
 838
 839         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 840         list->vsi_id = vf->vsi_res->vsi_id;
 841         list->num_elements = 1;
 842         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 843                         sizeof(addr->addr_bytes));
 844
 845         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 846         args.in_args = cmd_buffer;
 847         args.in_args_size = sizeof(cmd_buffer);
 848         args.out_buffer = vf->aq_resp;
 849         args.out_size = I40E_AQ_BUF_SZ;
 850         err = i40evf_execute_vf_cmd(dev, &args);
 851         if (err)
 852                 PMD_DRV_LOG(ERR, "fail to execute command "
 853                             "OP_DEL_ETHER_ADDRESS");
 854         else
 855                 vf->vsi.mac_num--;
 856         return;
 857 }
 858
 859 static void
 860 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 861 {
 862         struct rte_eth_dev_data *data = dev->data;
 863         struct rte_ether_addr *addr;
 864
 865         addr = &data->mac_addrs[index];
 866
 867         i40evf_del_mac_addr_by_addr(dev, addr);
 868 }
 869
 870 static int
 871 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 872 {
 873         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 874         struct virtchnl_queue_select q_stats;
 875         int err;
 876         struct vf_cmd_info args;
 877
 878         memset(&q_stats, 0, sizeof(q_stats));
 879         q_stats.vsi_id = vf->vsi_res->vsi_id;
 880         args.ops = VIRTCHNL_OP_GET_STATS;
 881         args.in_args = (u8 *)&q_stats;
 882         args.in_args_size = sizeof(q_stats);
 883         args.out_buffer = vf->aq_resp;
 884         args.out_size = I40E_AQ_BUF_SZ;
 885
 886         err = i40evf_execute_vf_cmd(dev, &args);
 887         if (err) {
 888                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 889                 *pstats = NULL;
 890                 return err;
 891         }
 892         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 893         return 0;
 894 }
 895
 896 static void
 897 i40evf_stat_update_48(uint64_t *offset,
 898                    uint64_t *stat)
 899 {
 900         if (*stat >= *offset)
 901                 *stat = *stat - *offset;
 902         else
 903                 *stat = (uint64_t)((*stat +
 904                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 905
 906         *stat &= I40E_48_BIT_MASK;
 907 }
 908
 909 static void
 910 i40evf_stat_update_32(uint64_t *offset,
 911                    uint64_t *stat)
 912 {
 913         if (*stat >= *offset)
 914                 *stat = (uint64_t)(*stat - *offset);
 915         else
 916                 *stat = (uint64_t)((*stat +
 917                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 918 }
 919
 920 static void
 921 i40evf_update_stats(struct i40e_vsi *vsi,
 922                                         struct i40e_eth_stats *nes)
 923 {
 924         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 925
 926         i40evf_stat_update_48(&oes->rx_bytes,
 927                             &nes->rx_bytes);
 928         i40evf_stat_update_48(&oes->rx_unicast,
 929                             &nes->rx_unicast);
 930         i40evf_stat_update_48(&oes->rx_multicast,
 931                             &nes->rx_multicast);
 932         i40evf_stat_update_48(&oes->rx_broadcast,
 933                             &nes->rx_broadcast);
 934         i40evf_stat_update_32(&oes->rx_discards,
 935                                 &nes->rx_discards);
 936         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 937                             &nes->rx_unknown_protocol);
 938         i40evf_stat_update_48(&oes->tx_bytes,
 939                             &nes->tx_bytes);
 940         i40evf_stat_update_48(&oes->tx_unicast,
 941                             &nes->tx_unicast);
 942         i40evf_stat_update_48(&oes->tx_multicast,
 943                             &nes->tx_multicast);
 944         i40evf_stat_update_48(&oes->tx_broadcast,
 945                             &nes->tx_broadcast);
 946         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 947         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 948 }
 949
 950 static void
 951 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 952 {
 953         int ret;
 954         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 955         struct i40e_eth_stats *pstats = NULL;
 956
 957         /* read stat values to clear hardware registers */
 958         ret = i40evf_query_stats(dev, &pstats);
 959
 960         /* set stats offset base on current values */
 961         if (ret == 0)
 962                 vf->vsi.eth_stats_offset = *pstats;
 963 }
 964
 965 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 966                                       struct rte_eth_xstat_name *xstats_names,
 967                                       __rte_unused unsigned limit)
 968 {
 969         unsigned i;
 970
 971         if (xstats_names != NULL)
 972                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 973                         snprintf(xstats_names[i].name,
 974                                 sizeof(xstats_names[i].name),
 975                                 "%s", rte_i40evf_stats_strings[i].name);
 976                 }
 977         return I40EVF_NB_XSTATS;
 978 }
 979
 980 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 981                                  struct rte_eth_xstat *xstats, unsigned n)
 982 {
 983         int ret;
 984         unsigned i;
 985         struct i40e_eth_stats *pstats = NULL;
 986         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 987         struct i40e_vsi *vsi = &vf->vsi;
 988
 989         if (n < I40EVF_NB_XSTATS)
 990                 return I40EVF_NB_XSTATS;
 991
 992         ret = i40evf_query_stats(dev, &pstats);
 993         if (ret != 0)
 994                 return 0;
 995
 996         if (!xstats)
 997                 return 0;
 998
 999         i40evf_update_stats(vsi, pstats);
1000
1001         /* loop over xstats array and values from pstats */
1002         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1003                 xstats[i].id = i;
1004                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1005                         rte_i40evf_stats_strings[i].offset);
1006         }
1007
1008         return I40EVF_NB_XSTATS;
1009 }
1010
1011 static int
1012 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1013 {
1014         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1015         struct virtchnl_vlan_filter_list *vlan_list;
1016         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1017                                                         sizeof(uint16_t)];
1018         int err;
1019         struct vf_cmd_info args;
1020
1021         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1022         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1023         vlan_list->num_elements = 1;
1024         vlan_list->vlan_id[0] = vlanid;
1025
1026         args.ops = VIRTCHNL_OP_ADD_VLAN;
1027         args.in_args = (u8 *)&cmd_buffer;
1028         args.in_args_size = sizeof(cmd_buffer);
1029         args.out_buffer = vf->aq_resp;
1030         args.out_size = I40E_AQ_BUF_SZ;
1031         err = i40evf_execute_vf_cmd(dev, &args);
1032         if (err)
1033                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1034
1035         return err;
1036 }
1037
1038 static int
1039 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1040 {
1041         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1042         struct virtchnl_vf_res_request vfres;
1043         struct vf_cmd_info args;
1044         int err;
1045
1046         vfres.num_queue_pairs = num;
1047
1048         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1049         args.in_args = (u8 *)&vfres;
1050         args.in_args_size = sizeof(vfres);
1051         args.out_buffer = vf->aq_resp;
1052         args.out_size = I40E_AQ_BUF_SZ;
1053         err = i40evf_execute_vf_cmd(dev, &args);
1054         if (err)
1055                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1056
1057         return err;
1058 }
1059
1060 static int
1061 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1062 {
1063         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1064         struct virtchnl_vlan_filter_list *vlan_list;
1065         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1066                                                         sizeof(uint16_t)];
1067         int err;
1068         struct vf_cmd_info args;
1069
1070         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1071         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1072         vlan_list->num_elements = 1;
1073         vlan_list->vlan_id[0] = vlanid;
1074
1075         args.ops = VIRTCHNL_OP_DEL_VLAN;
1076         args.in_args = (u8 *)&cmd_buffer;
1077         args.in_args_size = sizeof(cmd_buffer);
1078         args.out_buffer = vf->aq_resp;
1079         args.out_size = I40E_AQ_BUF_SZ;
1080         err = i40evf_execute_vf_cmd(dev, &args);
1081         if (err)
1082                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1083
1084         return err;
1085 }
1086
1087 static const struct rte_pci_id pci_id_i40evf_map[] = {
1088         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1089         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1090         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1091         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1092         { .vendor_id = 0, /* sentinel */ },
1093 };
1094
1095 /* Disable IRQ0 */
1096 static inline void
1097 i40evf_disable_irq0(struct i40e_hw *hw)
1098 {
1099         /* Disable all interrupt types */
1100         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1101         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1102                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1103         I40EVF_WRITE_FLUSH(hw);
1104 }
1105
1106 /* Enable IRQ0 */
1107 static inline void
1108 i40evf_enable_irq0(struct i40e_hw *hw)
1109 {
1110         /* Enable admin queue interrupt trigger */
1111         uint32_t val;
1112
1113         i40evf_disable_irq0(hw);
1114         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1115         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1116                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1117         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1118
1119         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1120                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1121                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1122                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1123
1124         I40EVF_WRITE_FLUSH(hw);
1125 }
1126
1127 static int
1128 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1129 {
1130         int i, reset;
1131         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1132         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1133
1134         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1135                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1136                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1137                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1138                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1139                     reset == VIRTCHNL_VFR_COMPLETED)
1140                         break;
1141                 rte_delay_ms(50);
1142         }
1143
1144         if (i >= MAX_RESET_WAIT_CNT)
1145                 return -1;
1146
1147         vf->vf_reset = false;
1148         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1149
1150         return 0;
1151 }
1152 static int
1153 i40evf_reset_vf(struct rte_eth_dev *dev)
1154 {
1155         int ret;
1156         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1157
1158         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1159                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1160                 return -1;
1161         }
1162         /**
1163           * After issuing vf reset command to pf, pf won't necessarily
1164           * reset vf, it depends on what state it exactly is. If it's not
1165           * initialized yet, it won't have vf reset since it's in a certain
1166           * state. If not, it will try to reset. Even vf is reset, pf will
1167           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1168           * it to ACTIVE. In this duration, vf may not catch the moment that
1169           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1170           */
1171         rte_delay_ms(200);
1172
1173         ret = i40evf_check_vf_reset_done(dev);
1174         if (ret) {
1175                 PMD_INIT_LOG(ERR, "VF is still resetting");
1176                 return ret;
1177         }
1178
1179         return 0;
1180 }
1181
1182 static int
1183 i40evf_init_vf(struct rte_eth_dev *dev)
1184 {
1185         int i, err, bufsz;
1186         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1187         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1188         uint16_t interval =
1189                 i40e_calc_itr_interval(0, 0);
1190
1191         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1192         vf->dev_data = dev->data;
1193         err = i40e_set_mac_type(hw);
1194         if (err) {
1195                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1196                 goto err;
1197         }
1198
1199         err = i40evf_check_vf_reset_done(dev);
1200         if (err)
1201                 goto err;
1202
1203         i40e_init_adminq_parameter(hw);
1204         err = i40e_init_adminq(hw);
1205         if (err) {
1206                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1207                 goto err;
1208         }
1209
1210         /* Reset VF and wait until it's complete */
1211         if (i40evf_reset_vf(dev)) {
1212                 PMD_INIT_LOG(ERR, "reset NIC failed");
1213                 goto err_aq;
1214         }
1215
1216         /* VF reset, shutdown admin queue and initialize again */
1217         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1218                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1219                 goto err;
1220         }
1221
1222         i40e_init_adminq_parameter(hw);
1223         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1224                 PMD_INIT_LOG(ERR, "init_adminq failed");
1225                 goto err;
1226         }
1227
1228         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1229         if (!vf->aq_resp) {
1230                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1231                 goto err_aq;
1232         }
1233         if (i40evf_check_api_version(dev) != 0) {
1234                 PMD_INIT_LOG(ERR, "check_api version failed");
1235                 goto err_api;
1236         }
1237         bufsz = sizeof(struct virtchnl_vf_resource) +
1238                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1239         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1240         if (!vf->vf_res) {
1241                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1242                 goto err_api;
1243         }
1244
1245         if (i40evf_get_vf_resource(dev) != 0) {
1246                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1247                 goto err_alloc;
1248         }
1249
1250         /* got VF config message back from PF, now we can parse it */
1251         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1252                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1253                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1254         }
1255
1256         if (!vf->vsi_res) {
1257                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1258                 goto err_alloc;
1259         }
1260
1261         if (hw->mac.type == I40E_MAC_X722_VF)
1262                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1263         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1264
1265         switch (vf->vsi_res->vsi_type) {
1266         case VIRTCHNL_VSI_SRIOV:
1267                 vf->vsi.type = I40E_VSI_SRIOV;
1268                 break;
1269         default:
1270                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1271                 break;
1272         }
1273         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1274         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1275
1276         /* Store the MAC address configured by host, or generate random one */
1277         if (is_valid_assigned_ether_addr((struct rte_ether_addr *)hw->mac.addr))
1278                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1279         else
1280                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1281
1282         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1283                        (I40E_ITR_INDEX_DEFAULT <<
1284                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1285                        (interval <<
1286                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1287         I40EVF_WRITE_FLUSH(hw);
1288
1289         return 0;
1290
1291 err_alloc:
1292         rte_free(vf->vf_res);
1293         vf->vsi_res = NULL;
1294 err_api:
1295         rte_free(vf->aq_resp);
1296 err_aq:
1297         i40e_shutdown_adminq(hw); /* ignore error */
1298 err:
1299         return -1;
1300 }
1301
1302 static int
1303 i40evf_uninit_vf(struct rte_eth_dev *dev)
1304 {
1305         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1306         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1307
1308         PMD_INIT_FUNC_TRACE();
1309
1310         if (hw->adapter_closed == 0)
1311                 i40evf_dev_close(dev);
1312         rte_free(vf->vf_res);
1313         vf->vf_res = NULL;
1314         rte_free(vf->aq_resp);
1315         vf->aq_resp = NULL;
1316
1317         return 0;
1318 }
1319
1320 static void
1321 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1322                 __rte_unused uint16_t msglen)
1323 {
1324         struct virtchnl_pf_event *pf_msg =
1325                         (struct virtchnl_pf_event *)msg;
1326         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1327
1328         switch (pf_msg->event) {
1329         case VIRTCHNL_EVENT_RESET_IMPENDING:
1330                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1331                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1332                                               NULL);
1333                 break;
1334         case VIRTCHNL_EVENT_LINK_CHANGE:
1335                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1336                 vf->link_up = pf_msg->event_data.link_event.link_status;
1337                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1338                 break;
1339         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1340                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1341                 break;
1342         default:
1343                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1344                 break;
1345         }
1346 }
1347
1348 static void
1349 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1350 {
1351         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1352         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1353         struct i40e_arq_event_info info;
1354         uint16_t pending, aq_opc;
1355         enum virtchnl_ops msg_opc;
1356         enum i40e_status_code msg_ret;
1357         int ret;
1358
1359         info.buf_len = I40E_AQ_BUF_SZ;
1360         if (!vf->aq_resp) {
1361                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1362                 return;
1363         }
1364         info.msg_buf = vf->aq_resp;
1365
1366         pending = 1;
1367         while (pending) {
1368                 ret = i40e_clean_arq_element(hw, &info, &pending);
1369
1370                 if (ret != I40E_SUCCESS) {
1371                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1372                                     "ret: %d", ret);
1373                         break;
1374                 }
1375                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1376                 /* For the message sent from pf to vf, opcode is stored in
1377                  * cookie_high of struct i40e_aq_desc, while return error code
1378                  * are stored in cookie_low, Which is done by
1379                  * i40e_aq_send_msg_to_vf in PF driver.*/
1380                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1381                                                   info.desc.cookie_high);
1382                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1383                                                   info.desc.cookie_low);
1384                 switch (aq_opc) {
1385                 case i40e_aqc_opc_send_msg_to_vf:
1386                         if (msg_opc == VIRTCHNL_OP_EVENT)
1387                                 /* process event*/
1388                                 i40evf_handle_pf_event(dev, info.msg_buf,
1389                                                        info.msg_len);
1390                         else {
1391                                 /* read message and it's expected one */
1392                                 if (msg_opc == vf->pend_cmd) {
1393                                         vf->cmd_retval = msg_ret;
1394                                         /* prevent compiler reordering */
1395                                         rte_compiler_barrier();
1396                                         _clear_cmd(vf);
1397                                 } else
1398                                         PMD_DRV_LOG(ERR, "command mismatch,"
1399                                                 "expect %u, get %u",
1400                                                 vf->pend_cmd, msg_opc);
1401                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1402                                              " opcode = %d", msg_opc);
1403                         }
1404                         break;
1405                 default:
1406                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1407                                     aq_opc);
1408                         break;
1409                 }
1410         }
1411 }
1412
1413 /**
1414  * Interrupt handler triggered by NIC  for handling
1415  * specific interrupt. Only adminq interrupt is processed in VF.
1416  *
1417  * @param handle
1418  *  Pointer to interrupt handle.
1419  * @param param
1420  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1421  *
1422  * @return
1423  *  void
1424  */
1425 static void
1426 i40evf_dev_alarm_handler(void *param)
1427 {
1428         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1429         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1430         uint32_t icr0;
1431
1432         i40evf_disable_irq0(hw);
1433
1434         /* read out interrupt causes */
1435         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1436
1437         /* No interrupt event indicated */
1438         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1439                 goto done;
1440
1441         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1442                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1443                 i40evf_handle_aq_msg(dev);
1444         }
1445
1446         /* Link Status Change interrupt */
1447         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1448                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1449                                    " do nothing");
1450
1451 done:
1452         i40evf_enable_irq0(hw);
1453         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1454                           i40evf_dev_alarm_handler, dev);
1455 }
1456
1457 static int
1458 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1459 {
1460         struct i40e_hw *hw
1461                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1462         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1463
1464         PMD_INIT_FUNC_TRACE();
1465
1466         /* assign ops func pointer */
1467         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1468         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1469         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1470
1471         /*
1472          * For secondary processes, we don't initialise any further as primary
1473          * has already done this work.
1474          */
1475         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1476                 i40e_set_rx_function(eth_dev);
1477                 i40e_set_tx_function(eth_dev);
1478                 return 0;
1479         }
1480         i40e_set_default_ptype_table(eth_dev);
1481         i40e_set_default_pctype_table(eth_dev);
1482         rte_eth_copy_pci_info(eth_dev, pci_dev);
1483
1484         hw->vendor_id = pci_dev->id.vendor_id;
1485         hw->device_id = pci_dev->id.device_id;
1486         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1487         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1488         hw->bus.device = pci_dev->addr.devid;
1489         hw->bus.func = pci_dev->addr.function;
1490         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1491         hw->adapter_stopped = 0;
1492         hw->adapter_closed = 0;
1493
1494         if(i40evf_init_vf(eth_dev) != 0) {
1495                 PMD_INIT_LOG(ERR, "Init vf failed");
1496                 return -1;
1497         }
1498
1499         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1500                           i40evf_dev_alarm_handler, eth_dev);
1501
1502         /* configure and enable device interrupt */
1503         i40evf_enable_irq0(hw);
1504
1505         /* copy mac addr */
1506         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1507                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1508                                         0);
1509         if (eth_dev->data->mac_addrs == NULL) {
1510                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1511                                 " store MAC addresses",
1512                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1513                 return -ENOMEM;
1514         }
1515         ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1516                         &eth_dev->data->mac_addrs[0]);
1517
1518         return 0;
1519 }
1520
1521 static int
1522 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1523 {
1524         PMD_INIT_FUNC_TRACE();
1525
1526         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1527                 return -EPERM;
1528
1529         eth_dev->dev_ops = NULL;
1530         eth_dev->rx_pkt_burst = NULL;
1531         eth_dev->tx_pkt_burst = NULL;
1532
1533         if (i40evf_uninit_vf(eth_dev) != 0) {
1534                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1535                 return -1;
1536         }
1537
1538         return 0;
1539 }
1540
1541 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1542         struct rte_pci_device *pci_dev)
1543 {
1544         return rte_eth_dev_pci_generic_probe(pci_dev,
1545                 sizeof(struct i40e_adapter), i40evf_dev_init);
1546 }
1547
1548 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1549 {
1550         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1551 }
1552
1553 /*
1554  * virtual function driver struct
1555  */
1556 static struct rte_pci_driver rte_i40evf_pmd = {
1557         .id_table = pci_id_i40evf_map,
1558         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1559         .probe = eth_i40evf_pci_probe,
1560         .remove = eth_i40evf_pci_remove,
1561 };
1562
1563 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1564 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1565 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1566
1567 static int
1568 i40evf_dev_configure(struct rte_eth_dev *dev)
1569 {
1570         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1571         struct i40e_adapter *ad =
1572                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1573         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1574                                 dev->data->nb_tx_queues);
1575
1576         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1577          * allocation or vector Rx preconditions we will reset it.
1578          */
1579         ad->rx_bulk_alloc_allowed = true;
1580         ad->rx_vec_allowed = true;
1581         ad->tx_simple_allowed = true;
1582         ad->tx_vec_allowed = true;
1583
1584         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1585                 int ret = 0;
1586
1587                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1588                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1589                 ret = i40evf_request_queues(dev, num_queue_pairs);
1590                 if (ret != 0)
1591                         return ret;
1592
1593                 ret = i40evf_dev_reset(dev);
1594                 if (ret != 0)
1595                         return ret;
1596         }
1597
1598         return i40evf_init_vlan(dev);
1599 }
1600
1601 static int
1602 i40evf_init_vlan(struct rte_eth_dev *dev)
1603 {
1604         /* Apply vlan offload setting */
1605         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1606
1607         return 0;
1608 }
1609
1610 static int
1611 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1612 {
1613         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1614         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1615
1616         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1617                 return -ENOTSUP;
1618
1619         /* Vlan stripping setting */
1620         if (mask & ETH_VLAN_STRIP_MASK) {
1621                 /* Enable or disable VLAN stripping */
1622                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1623                         i40evf_enable_vlan_strip(dev);
1624                 else
1625                         i40evf_disable_vlan_strip(dev);
1626         }
1627
1628         return 0;
1629 }
1630
1631 static int
1632 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1633 {
1634         struct i40e_rx_queue *rxq;
1635         int err;
1636         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1637
1638         PMD_INIT_FUNC_TRACE();
1639
1640         rxq = dev->data->rx_queues[rx_queue_id];
1641
1642         err = i40e_alloc_rx_queue_mbufs(rxq);
1643         if (err) {
1644                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1645                 return err;
1646         }
1647
1648         rte_wmb();
1649
1650         /* Init the RX tail register. */
1651         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1652         I40EVF_WRITE_FLUSH(hw);
1653
1654         /* Ready to switch the queue on */
1655         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1656         if (err) {
1657                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1658                             rx_queue_id);
1659                 return err;
1660         }
1661         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1662
1663         return 0;
1664 }
1665
1666 static int
1667 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1668 {
1669         struct i40e_rx_queue *rxq;
1670         int err;
1671
1672         rxq = dev->data->rx_queues[rx_queue_id];
1673
1674         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1675         if (err) {
1676                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1677                             rx_queue_id);
1678                 return err;
1679         }
1680
1681         i40e_rx_queue_release_mbufs(rxq);
1682         i40e_reset_rx_queue(rxq);
1683         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1684
1685         return 0;
1686 }
1687
1688 static int
1689 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1690 {
1691         int err;
1692
1693         PMD_INIT_FUNC_TRACE();
1694
1695         /* Ready to switch the queue on */
1696         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1697         if (err) {
1698                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1699                             tx_queue_id);
1700                 return err;
1701         }
1702         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1703
1704         return 0;
1705 }
1706
1707 static int
1708 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1709 {
1710         struct i40e_tx_queue *txq;
1711         int err;
1712
1713         txq = dev->data->tx_queues[tx_queue_id];
1714
1715         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1716         if (err) {
1717                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1718                             tx_queue_id);
1719                 return err;
1720         }
1721
1722         i40e_tx_queue_release_mbufs(txq);
1723         i40e_reset_tx_queue(txq);
1724         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1725
1726         return 0;
1727 }
1728
1729 static int
1730 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1731 {
1732         int ret;
1733
1734         if (on)
1735                 ret = i40evf_add_vlan(dev, vlan_id);
1736         else
1737                 ret = i40evf_del_vlan(dev,vlan_id);
1738
1739         return ret;
1740 }
1741
1742 static int
1743 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1744 {
1745         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1746         struct rte_eth_dev_data *dev_data = dev->data;
1747         struct rte_pktmbuf_pool_private *mbp_priv;
1748         uint16_t buf_size, len;
1749
1750         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1751         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1752         I40EVF_WRITE_FLUSH(hw);
1753
1754         /* Calculate the maximum packet length allowed */
1755         mbp_priv = rte_mempool_get_priv(rxq->mp);
1756         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1757                                         RTE_PKTMBUF_HEADROOM);
1758         rxq->hs_mode = i40e_header_split_none;
1759         rxq->rx_hdr_len = 0;
1760         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1761         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1762         rxq->max_pkt_len = RTE_MIN(len,
1763                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1764
1765         /**
1766          * Check if the jumbo frame and maximum packet length are set correctly
1767          */
1768         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1769                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1770                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1771                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1772                                 "larger than %u and smaller than %u, as jumbo "
1773                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1774                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1775                         return I40E_ERR_CONFIG;
1776                 }
1777         } else {
1778                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1779                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1780                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1781                                 "larger than %u and smaller than %u, as jumbo "
1782                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1783                                                 (uint32_t)ETHER_MAX_LEN);
1784                         return I40E_ERR_CONFIG;
1785                 }
1786         }
1787
1788         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1789             rxq->max_pkt_len > buf_size)
1790                 dev_data->scattered_rx = 1;
1791
1792         return 0;
1793 }
1794
1795 static int
1796 i40evf_rx_init(struct rte_eth_dev *dev)
1797 {
1798         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1799         uint16_t i;
1800         int ret = I40E_SUCCESS;
1801         struct i40e_rx_queue **rxq =
1802                 (struct i40e_rx_queue **)dev->data->rx_queues;
1803
1804         i40evf_config_rss(vf);
1805         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1806                 if (!rxq[i] || !rxq[i]->q_set)
1807                         continue;
1808                 ret = i40evf_rxq_init(dev, rxq[i]);
1809                 if (ret != I40E_SUCCESS)
1810                         break;
1811         }
1812         if (ret == I40E_SUCCESS)
1813                 i40e_set_rx_function(dev);
1814
1815         return ret;
1816 }
1817
1818 static void
1819 i40evf_tx_init(struct rte_eth_dev *dev)
1820 {
1821         uint16_t i;
1822         struct i40e_tx_queue **txq =
1823                 (struct i40e_tx_queue **)dev->data->tx_queues;
1824         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1825
1826         for (i = 0; i < dev->data->nb_tx_queues; i++)
1827                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1828
1829         i40e_set_tx_function(dev);
1830 }
1831
1832 static inline void
1833 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1834 {
1835         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1836         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1837         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1838
1839         if (!rte_intr_allow_others(intr_handle)) {
1840                 I40E_WRITE_REG(hw,
1841                                I40E_VFINT_DYN_CTL01,
1842                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1843                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1844                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1845                 I40EVF_WRITE_FLUSH(hw);
1846                 return;
1847         }
1848
1849         I40EVF_WRITE_FLUSH(hw);
1850 }
1851
1852 static inline void
1853 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1854 {
1855         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1856         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1857         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1858
1859         if (!rte_intr_allow_others(intr_handle)) {
1860                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1861                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1862                 I40EVF_WRITE_FLUSH(hw);
1863                 return;
1864         }
1865
1866         I40EVF_WRITE_FLUSH(hw);
1867 }
1868
1869 static int
1870 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1871 {
1872         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1873         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1874         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1875         uint16_t interval =
1876                 i40e_calc_itr_interval(0, 0);
1877         uint16_t msix_intr;
1878
1879         msix_intr = intr_handle->intr_vec[queue_id];
1880         if (msix_intr == I40E_MISC_VEC_ID)
1881                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1882                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1883                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1884                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1885                                (interval <<
1886                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1887         else
1888                 I40E_WRITE_REG(hw,
1889                                I40E_VFINT_DYN_CTLN1(msix_intr -
1890                                                     I40E_RX_VEC_START),
1891                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1892                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1893                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1894                                (interval <<
1895                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1896
1897         I40EVF_WRITE_FLUSH(hw);
1898
1899         return 0;
1900 }
1901
1902 static int
1903 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1904 {
1905         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1906         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1907         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1908         uint16_t msix_intr;
1909
1910         msix_intr = intr_handle->intr_vec[queue_id];
1911         if (msix_intr == I40E_MISC_VEC_ID)
1912                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1913         else
1914                 I40E_WRITE_REG(hw,
1915                                I40E_VFINT_DYN_CTLN1(msix_intr -
1916                                                     I40E_RX_VEC_START),
1917                                0);
1918
1919         I40EVF_WRITE_FLUSH(hw);
1920
1921         return 0;
1922 }
1923
1924 static void
1925 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1926 {
1927         struct virtchnl_ether_addr_list *list;
1928         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1929         int err, i, j;
1930         int next_begin = 0;
1931         int begin = 0;
1932         uint32_t len;
1933         struct rte_ether_addr *addr;
1934         struct vf_cmd_info args;
1935
1936         do {
1937                 j = 0;
1938                 len = sizeof(struct virtchnl_ether_addr_list);
1939                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1940                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1941                                 continue;
1942                         len += sizeof(struct virtchnl_ether_addr);
1943                         if (len >= I40E_AQ_BUF_SZ) {
1944                                 next_begin = i + 1;
1945                                 break;
1946                         }
1947                 }
1948
1949                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1950                 if (!list) {
1951                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1952                         return;
1953                 }
1954
1955                 for (i = begin; i < next_begin; i++) {
1956                         addr = &dev->data->mac_addrs[i];
1957                         if (is_zero_ether_addr(addr))
1958                                 continue;
1959                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1960                                          sizeof(addr->addr_bytes));
1961                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1962                                     addr->addr_bytes[0], addr->addr_bytes[1],
1963                                     addr->addr_bytes[2], addr->addr_bytes[3],
1964                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1965                         j++;
1966                 }
1967                 list->vsi_id = vf->vsi_res->vsi_id;
1968                 list->num_elements = j;
1969                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1970                            VIRTCHNL_OP_DEL_ETH_ADDR;
1971                 args.in_args = (uint8_t *)list;
1972                 args.in_args_size = len;
1973                 args.out_buffer = vf->aq_resp;
1974                 args.out_size = I40E_AQ_BUF_SZ;
1975                 err = i40evf_execute_vf_cmd(dev, &args);
1976                 if (err) {
1977                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1978                                     add ? "OP_ADD_ETHER_ADDRESS" :
1979                                     "OP_DEL_ETHER_ADDRESS");
1980                 } else {
1981                         if (add)
1982                                 vf->vsi.mac_num++;
1983                         else
1984                                 vf->vsi.mac_num--;
1985                 }
1986                 rte_free(list);
1987                 begin = next_begin;
1988         } while (begin < I40E_NUM_MACADDR_MAX);
1989 }
1990
1991 static int
1992 i40evf_dev_start(struct rte_eth_dev *dev)
1993 {
1994         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1995         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1996         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1997         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1998         uint32_t intr_vector = 0;
1999
2000         PMD_INIT_FUNC_TRACE();
2001
2002         hw->adapter_stopped = 0;
2003
2004         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2005         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2006                                         dev->data->nb_tx_queues);
2007
2008         /* check and configure queue intr-vector mapping */
2009         if (rte_intr_cap_multiple(intr_handle) &&
2010             dev->data->dev_conf.intr_conf.rxq) {
2011                 intr_vector = dev->data->nb_rx_queues;
2012                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2013                         return -1;
2014         }
2015
2016         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2017                 intr_handle->intr_vec =
2018                         rte_zmalloc("intr_vec",
2019                                     dev->data->nb_rx_queues * sizeof(int), 0);
2020                 if (!intr_handle->intr_vec) {
2021                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2022                                      " intr_vec", dev->data->nb_rx_queues);
2023                         return -ENOMEM;
2024                 }
2025         }
2026
2027         if (i40evf_rx_init(dev) != 0){
2028                 PMD_DRV_LOG(ERR, "failed to do RX init");
2029                 return -1;
2030         }
2031
2032         i40evf_tx_init(dev);
2033
2034         if (i40evf_configure_vsi_queues(dev) != 0) {
2035                 PMD_DRV_LOG(ERR, "configure queues failed");
2036                 goto err_queue;
2037         }
2038         if (i40evf_config_irq_map(dev)) {
2039                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2040                 goto err_queue;
2041         }
2042
2043         /* Set all mac addrs */
2044         i40evf_add_del_all_mac_addr(dev, TRUE);
2045         /* Set all multicast addresses */
2046         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2047                                 TRUE);
2048
2049         if (i40evf_start_queues(dev) != 0) {
2050                 PMD_DRV_LOG(ERR, "enable queues failed");
2051                 goto err_mac;
2052         }
2053
2054         /* only enable interrupt in rx interrupt mode */
2055         if (dev->data->dev_conf.intr_conf.rxq != 0)
2056                 rte_intr_enable(intr_handle);
2057
2058         i40evf_enable_queues_intr(dev);
2059
2060         return 0;
2061
2062 err_mac:
2063         i40evf_add_del_all_mac_addr(dev, FALSE);
2064         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2065                                 FALSE);
2066 err_queue:
2067         return -1;
2068 }
2069
2070 static void
2071 i40evf_dev_stop(struct rte_eth_dev *dev)
2072 {
2073         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2074         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2075         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2076         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2077
2078         PMD_INIT_FUNC_TRACE();
2079
2080         if (dev->data->dev_conf.intr_conf.rxq != 0)
2081                 rte_intr_disable(intr_handle);
2082
2083         if (hw->adapter_stopped == 1)
2084                 return;
2085         i40evf_stop_queues(dev);
2086         i40evf_disable_queues_intr(dev);
2087         i40e_dev_clear_queues(dev);
2088
2089         /* Clean datapath event and queue/vec mapping */
2090         rte_intr_efd_disable(intr_handle);
2091         if (intr_handle->intr_vec) {
2092                 rte_free(intr_handle->intr_vec);
2093                 intr_handle->intr_vec = NULL;
2094         }
2095         /* remove all mac addrs */
2096         i40evf_add_del_all_mac_addr(dev, FALSE);
2097         /* remove all multicast addresses */
2098         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2099                                 FALSE);
2100         hw->adapter_stopped = 1;
2101
2102 }
2103
2104 static int
2105 i40evf_dev_link_update(struct rte_eth_dev *dev,
2106                        __rte_unused int wait_to_complete)
2107 {
2108         struct rte_eth_link new_link;
2109         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2110         /*
2111          * DPDK pf host provide interfacet to acquire link status
2112          * while Linux driver does not
2113          */
2114
2115         memset(&new_link, 0, sizeof(new_link));
2116         /* Linux driver PF host */
2117         switch (vf->link_speed) {
2118         case I40E_LINK_SPEED_100MB:
2119                 new_link.link_speed = ETH_SPEED_NUM_100M;
2120                 break;
2121         case I40E_LINK_SPEED_1GB:
2122                 new_link.link_speed = ETH_SPEED_NUM_1G;
2123                 break;
2124         case I40E_LINK_SPEED_10GB:
2125                 new_link.link_speed = ETH_SPEED_NUM_10G;
2126                 break;
2127         case I40E_LINK_SPEED_20GB:
2128                 new_link.link_speed = ETH_SPEED_NUM_20G;
2129                 break;
2130         case I40E_LINK_SPEED_25GB:
2131                 new_link.link_speed = ETH_SPEED_NUM_25G;
2132                 break;
2133         case I40E_LINK_SPEED_40GB:
2134                 new_link.link_speed = ETH_SPEED_NUM_40G;
2135                 break;
2136         default:
2137                 new_link.link_speed = ETH_SPEED_NUM_100M;
2138                 break;
2139         }
2140         /* full duplex only */
2141         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2142         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2143                                              ETH_LINK_DOWN;
2144         new_link.link_autoneg =
2145                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2146
2147         return rte_eth_linkstatus_set(dev, &new_link);
2148 }
2149
2150 static void
2151 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2152 {
2153         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2154         int ret;
2155
2156         /* If enabled, just return */
2157         if (vf->promisc_unicast_enabled)
2158                 return;
2159
2160         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2161         if (ret == 0)
2162                 vf->promisc_unicast_enabled = TRUE;
2163 }
2164
2165 static void
2166 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2167 {
2168         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2169         int ret;
2170
2171         /* If disabled, just return */
2172         if (!vf->promisc_unicast_enabled)
2173                 return;
2174
2175         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2176         if (ret == 0)
2177                 vf->promisc_unicast_enabled = FALSE;
2178 }
2179
2180 static void
2181 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2182 {
2183         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2184         int ret;
2185
2186         /* If enabled, just return */
2187         if (vf->promisc_multicast_enabled)
2188                 return;
2189
2190         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2191         if (ret == 0)
2192                 vf->promisc_multicast_enabled = TRUE;
2193 }
2194
2195 static void
2196 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2197 {
2198         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2199         int ret;
2200
2201         /* If enabled, just return */
2202         if (!vf->promisc_multicast_enabled)
2203                 return;
2204
2205         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2206         if (ret == 0)
2207                 vf->promisc_multicast_enabled = FALSE;
2208 }
2209
2210 static void
2211 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2212 {
2213         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2214
2215         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2216         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2217         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2218         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2219         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2220         dev_info->min_mtu = ETHER_MIN_MTU;
2221         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2222         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2223         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2224         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2225         dev_info->rx_queue_offload_capa = 0;
2226         dev_info->rx_offload_capa =
2227                 DEV_RX_OFFLOAD_VLAN_STRIP |
2228                 DEV_RX_OFFLOAD_QINQ_STRIP |
2229                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2230                 DEV_RX_OFFLOAD_UDP_CKSUM |
2231                 DEV_RX_OFFLOAD_TCP_CKSUM |
2232                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2233                 DEV_RX_OFFLOAD_SCATTER |
2234                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2235                 DEV_RX_OFFLOAD_VLAN_FILTER;
2236
2237         dev_info->tx_queue_offload_capa = 0;
2238         dev_info->tx_offload_capa =
2239                 DEV_TX_OFFLOAD_VLAN_INSERT |
2240                 DEV_TX_OFFLOAD_QINQ_INSERT |
2241                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2242                 DEV_TX_OFFLOAD_UDP_CKSUM |
2243                 DEV_TX_OFFLOAD_TCP_CKSUM |
2244                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2245                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2246                 DEV_TX_OFFLOAD_TCP_TSO |
2247                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2248                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2249                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2250                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2251                 DEV_TX_OFFLOAD_MULTI_SEGS;
2252
2253         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2254                 .rx_thresh = {
2255                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2256                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2257                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2258                 },
2259                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2260                 .rx_drop_en = 0,
2261                 .offloads = 0,
2262         };
2263
2264         dev_info->default_txconf = (struct rte_eth_txconf) {
2265                 .tx_thresh = {
2266                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2267                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2268                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2269                 },
2270                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2271                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2272                 .offloads = 0,
2273         };
2274
2275         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2276                 .nb_max = I40E_MAX_RING_DESC,
2277                 .nb_min = I40E_MIN_RING_DESC,
2278                 .nb_align = I40E_ALIGN_RING_DESC,
2279         };
2280
2281         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2282                 .nb_max = I40E_MAX_RING_DESC,
2283                 .nb_min = I40E_MIN_RING_DESC,
2284                 .nb_align = I40E_ALIGN_RING_DESC,
2285         };
2286 }
2287
2288 static int
2289 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2290 {
2291         int ret;
2292         struct i40e_eth_stats *pstats = NULL;
2293         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2294         struct i40e_vsi *vsi = &vf->vsi;
2295
2296         ret = i40evf_query_stats(dev, &pstats);
2297         if (ret == 0) {
2298                 i40evf_update_stats(vsi, pstats);
2299
2300                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2301                                                 pstats->rx_broadcast;
2302                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2303                                                 pstats->tx_unicast;
2304                 stats->imissed = pstats->rx_discards;
2305                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2306                 stats->ibytes = pstats->rx_bytes;
2307                 stats->obytes = pstats->tx_bytes;
2308         } else {
2309                 PMD_DRV_LOG(ERR, "Get statistics failed");
2310         }
2311         return ret;
2312 }
2313
2314 static void
2315 i40evf_dev_close(struct rte_eth_dev *dev)
2316 {
2317         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2318
2319         i40evf_dev_stop(dev);
2320         i40e_dev_free_queues(dev);
2321         /*
2322          * disable promiscuous mode before reset vf
2323          * it is a workaround solution when work with kernel driver
2324          * and it is not the normal way
2325          */
2326         i40evf_dev_promiscuous_disable(dev);
2327         i40evf_dev_allmulticast_disable(dev);
2328         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2329
2330         i40evf_reset_vf(dev);
2331         i40e_shutdown_adminq(hw);
2332         i40evf_disable_irq0(hw);
2333         hw->adapter_closed = 1;
2334 }
2335
2336 /*
2337  * Reset VF device only to re-initialize resources in PMD layer
2338  */
2339 static int
2340 i40evf_dev_reset(struct rte_eth_dev *dev)
2341 {
2342         int ret;
2343
2344         ret = i40evf_dev_uninit(dev);
2345         if (ret)
2346                 return ret;
2347
2348         ret = i40evf_dev_init(dev);
2349
2350         return ret;
2351 }
2352
2353 static int
2354 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2355 {
2356         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2357         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2358         int ret;
2359
2360         if (!lut)
2361                 return -EINVAL;
2362
2363         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2364                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2365                                           lut, lut_size);
2366                 if (ret) {
2367                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2368                         return ret;
2369                 }
2370         } else {
2371                 uint32_t *lut_dw = (uint32_t *)lut;
2372                 uint16_t i, lut_size_dw = lut_size / 4;
2373
2374                 for (i = 0; i < lut_size_dw; i++)
2375                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2376         }
2377
2378         return 0;
2379 }
2380
2381 static int
2382 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2383 {
2384         struct i40e_vf *vf;
2385         struct i40e_hw *hw;
2386         int ret;
2387
2388         if (!vsi || !lut)
2389                 return -EINVAL;
2390
2391         vf = I40E_VSI_TO_VF(vsi);
2392         hw = I40E_VSI_TO_HW(vsi);
2393
2394         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2395                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2396                                           lut, lut_size);
2397                 if (ret) {
2398                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2399                         return ret;
2400                 }
2401         } else {
2402                 uint32_t *lut_dw = (uint32_t *)lut;
2403                 uint16_t i, lut_size_dw = lut_size / 4;
2404
2405                 for (i = 0; i < lut_size_dw; i++)
2406                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2407                 I40EVF_WRITE_FLUSH(hw);
2408         }
2409
2410         return 0;
2411 }
2412
2413 static int
2414 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2415                            struct rte_eth_rss_reta_entry64 *reta_conf,
2416                            uint16_t reta_size)
2417 {
2418         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2419         uint8_t *lut;
2420         uint16_t i, idx, shift;
2421         int ret;
2422
2423         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2424                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2425                         "(%d) doesn't match the number of hardware can "
2426                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2427                 return -EINVAL;
2428         }
2429
2430         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2431         if (!lut) {
2432                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2433                 return -ENOMEM;
2434         }
2435         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2436         if (ret)
2437                 goto out;
2438         for (i = 0; i < reta_size; i++) {
2439                 idx = i / RTE_RETA_GROUP_SIZE;
2440                 shift = i % RTE_RETA_GROUP_SIZE;
2441                 if (reta_conf[idx].mask & (1ULL << shift))
2442                         lut[i] = reta_conf[idx].reta[shift];
2443         }
2444         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2445
2446 out:
2447         rte_free(lut);
2448
2449         return ret;
2450 }
2451
2452 static int
2453 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2454                           struct rte_eth_rss_reta_entry64 *reta_conf,
2455                           uint16_t reta_size)
2456 {
2457         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2458         uint16_t i, idx, shift;
2459         uint8_t *lut;
2460         int ret;
2461
2462         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2463                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2464                         "(%d) doesn't match the number of hardware can "
2465                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2466                 return -EINVAL;
2467         }
2468
2469         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2470         if (!lut) {
2471                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2472                 return -ENOMEM;
2473         }
2474
2475         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2476         if (ret)
2477                 goto out;
2478         for (i = 0; i < reta_size; i++) {
2479                 idx = i / RTE_RETA_GROUP_SIZE;
2480                 shift = i % RTE_RETA_GROUP_SIZE;
2481                 if (reta_conf[idx].mask & (1ULL << shift))
2482                         reta_conf[idx].reta[shift] = lut[i];
2483         }
2484
2485 out:
2486         rte_free(lut);
2487
2488         return ret;
2489 }
2490
2491 static int
2492 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2493 {
2494         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2495         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2496         int ret = 0;
2497
2498         if (!key || key_len == 0) {
2499                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2500                 return 0;
2501         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2502                 sizeof(uint32_t)) {
2503                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2504                 return -EINVAL;
2505         }
2506
2507         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2508                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2509                         (struct i40e_aqc_get_set_rss_key_data *)key;
2510
2511                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2512                 if (ret)
2513                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2514                                      "via AQ");
2515         } else {
2516                 uint32_t *hash_key = (uint32_t *)key;
2517                 uint16_t i;
2518
2519                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2520                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2521                 I40EVF_WRITE_FLUSH(hw);
2522         }
2523
2524         return ret;
2525 }
2526
2527 static int
2528 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2529 {
2530         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2531         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2532         int ret;
2533
2534         if (!key || !key_len)
2535                 return -EINVAL;
2536
2537         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2538                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2539                         (struct i40e_aqc_get_set_rss_key_data *)key);
2540                 if (ret) {
2541                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2542                         return ret;
2543                 }
2544         } else {
2545                 uint32_t *key_dw = (uint32_t *)key;
2546                 uint16_t i;
2547
2548                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2549                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2550         }
2551         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2552
2553         return 0;
2554 }
2555
2556 static int
2557 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2558 {
2559         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2560         uint64_t hena;
2561         int ret;
2562
2563         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2564                                  rss_conf->rss_key_len);
2565         if (ret)
2566                 return ret;
2567
2568         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2569         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2570         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2571         I40EVF_WRITE_FLUSH(hw);
2572
2573         return 0;
2574 }
2575
2576 static void
2577 i40evf_disable_rss(struct i40e_vf *vf)
2578 {
2579         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2580
2581         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2582         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2583         I40EVF_WRITE_FLUSH(hw);
2584 }
2585
2586 static int
2587 i40evf_config_rss(struct i40e_vf *vf)
2588 {
2589         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2590         struct rte_eth_rss_conf rss_conf;
2591         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2592         uint16_t num;
2593
2594         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2595                 i40evf_disable_rss(vf);
2596                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2597                 return 0;
2598         }
2599
2600         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2601         /* Fill out the look up table */
2602         for (i = 0, j = 0; i < nb_q; i++, j++) {
2603                 if (j >= num)
2604                         j = 0;
2605                 lut = (lut << 8) | j;
2606                 if ((i & 3) == 3)
2607                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2608         }
2609
2610         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2611         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2612                 i40evf_disable_rss(vf);
2613                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2614                 return 0;
2615         }
2616
2617         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2618                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2619                 /* Calculate the default hash key */
2620                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2621                         rss_key_default[i] = (uint32_t)rte_rand();
2622                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2623                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2624                         sizeof(uint32_t);
2625         }
2626
2627         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2628 }
2629
2630 static int
2631 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2632                            struct rte_eth_rss_conf *rss_conf)
2633 {
2634         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2635         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2636         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2637         uint64_t hena;
2638
2639         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2640         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2641
2642         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2643                 if (rss_hf != 0) /* Enable RSS */
2644                         return -EINVAL;
2645                 return 0;
2646         }
2647
2648         /* RSS enabled */
2649         if (rss_hf == 0) /* Disable RSS */
2650                 return -EINVAL;
2651
2652         return i40evf_hw_rss_hash_set(vf, rss_conf);
2653 }
2654
2655 static int
2656 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2657                              struct rte_eth_rss_conf *rss_conf)
2658 {
2659         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2660         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2661         uint64_t hena;
2662
2663         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2664                            &rss_conf->rss_key_len);
2665
2666         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2667         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2668         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2669
2670         return 0;
2671 }
2672
2673 static int
2674 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2675 {
2676         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2677         struct rte_eth_dev_data *dev_data = vf->dev_data;
2678         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2679         int ret = 0;
2680
2681         /* check if mtu is within the allowed range */
2682         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2683                 return -EINVAL;
2684
2685         /* mtu setting is forbidden if port is start */
2686         if (dev_data->dev_started) {
2687                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2688                             dev_data->port_id);
2689                 return -EBUSY;
2690         }
2691
2692         if (frame_size > ETHER_MAX_LEN)
2693                 dev_data->dev_conf.rxmode.offloads |=
2694                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2695         else
2696                 dev_data->dev_conf.rxmode.offloads &=
2697                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2698         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2699
2700         return ret;
2701 }
2702
2703 static int
2704 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2705                             struct rte_ether_addr *mac_addr)
2706 {
2707         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2708         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2709
2710         if (!is_valid_assigned_ether_addr(mac_addr)) {
2711                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2712                 return -EINVAL;
2713         }
2714
2715         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2716                 return -EPERM;
2717
2718         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2719
2720         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2721                 return -EIO;
2722
2723         ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2724         return 0;
2725 }
2726
2727 static int
2728 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2729                         struct rte_ether_addr *mc_addrs,
2730                         uint32_t mc_addrs_num, bool add)
2731 {
2732         struct virtchnl_ether_addr_list *list;
2733         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2734         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2735                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2736         uint32_t i;
2737         int err;
2738         struct vf_cmd_info args;
2739
2740         if (mc_addrs == NULL || mc_addrs_num == 0)
2741                 return 0;
2742
2743         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2744                 return -EINVAL;
2745
2746         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2747         list->vsi_id = vf->vsi_res->vsi_id;
2748         list->num_elements = mc_addrs_num;
2749
2750         for (i = 0; i < mc_addrs_num; i++) {
2751                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2752                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2753                                     mc_addrs[i].addr_bytes[0],
2754                                     mc_addrs[i].addr_bytes[1],
2755                                     mc_addrs[i].addr_bytes[2],
2756                                     mc_addrs[i].addr_bytes[3],
2757                                     mc_addrs[i].addr_bytes[4],
2758                                     mc_addrs[i].addr_bytes[5]);
2759                         return -EINVAL;
2760                 }
2761
2762                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2763                         sizeof(list->list[i].addr));
2764         }
2765
2766         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2767         args.in_args = cmd_buffer;
2768         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2769                 i * sizeof(struct virtchnl_ether_addr);
2770         args.out_buffer = vf->aq_resp;
2771         args.out_size = I40E_AQ_BUF_SZ;
2772         err = i40evf_execute_vf_cmd(dev, &args);
2773         if (err) {
2774                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2775                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2776                 return err;
2777         }
2778
2779         return 0;
2780 }
2781
2782 static int
2783 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2784                         struct rte_ether_addr *mc_addrs,
2785                         uint32_t mc_addrs_num)
2786 {
2787         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2788         int err;
2789
2790         /* flush previous addresses */
2791         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2792                                 FALSE);
2793         if (err)
2794                 return err;
2795
2796         vf->mc_addrs_num = 0;
2797
2798         /* add new ones */
2799         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2800                                         TRUE);
2801         if (err)
2802                 return err;
2803
2804         vf->mc_addrs_num = mc_addrs_num;
2805         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2806
2807         return 0;
2808 }