drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct rte_ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct rte_ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct rte_ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr);
 143 static void
 144 i40evf_dev_alarm_handler(void *param);
 145
 146 /* Default hash key buffer for RSS */
 147 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 148
 149 struct rte_i40evf_xstats_name_off {
 150         char name[RTE_ETH_XSTATS_NAME_SIZE];
 151         unsigned offset;
 152 };
 153
 154 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 155         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 156         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 157         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 158         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 159         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 160         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 161                 rx_unknown_protocol)},
 162         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 163         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 164         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 165         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 166         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 167         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 168 };
 169
 170 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 171                 sizeof(rte_i40evf_stats_strings[0]))
 172
 173 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 174         .dev_configure        = i40evf_dev_configure,
 175         .dev_start            = i40evf_dev_start,
 176         .dev_stop             = i40evf_dev_stop,
 177         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 178         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 179         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 180         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 181         .link_update          = i40evf_dev_link_update,
 182         .stats_get            = i40evf_dev_stats_get,
 183         .stats_reset          = i40evf_dev_xstats_reset,
 184         .xstats_get           = i40evf_dev_xstats_get,
 185         .xstats_get_names     = i40evf_dev_xstats_get_names,
 186         .xstats_reset         = i40evf_dev_xstats_reset,
 187         .dev_close            = i40evf_dev_close,
 188         .dev_reset            = i40evf_dev_reset,
 189         .dev_infos_get        = i40evf_dev_info_get,
 190         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 191         .vlan_filter_set      = i40evf_vlan_filter_set,
 192         .vlan_offload_set     = i40evf_vlan_offload_set,
 193         .rx_queue_start       = i40evf_dev_rx_queue_start,
 194         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 195         .tx_queue_start       = i40evf_dev_tx_queue_start,
 196         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 197         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 198         .rx_queue_release     = i40e_dev_rx_queue_release,
 199         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 200         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 201         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 202         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 203         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 204         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 205         .tx_queue_release     = i40e_dev_tx_queue_release,
 206         .rx_queue_count       = i40e_dev_rx_queue_count,
 207         .rxq_info_get         = i40e_rxq_info_get,
 208         .txq_info_get         = i40e_txq_info_get,
 209         .mac_addr_add         = i40evf_add_mac_addr,
 210         .mac_addr_remove      = i40evf_del_mac_addr,
 211         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 212         .reta_update          = i40evf_dev_rss_reta_update,
 213         .reta_query           = i40evf_dev_rss_reta_query,
 214         .rss_hash_update      = i40evf_dev_rss_hash_update,
 215         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 216         .mtu_set              = i40evf_dev_mtu_set,
 217         .mac_addr_set         = i40evf_set_default_mac_addr,
 218         .tx_done_cleanup      = i40e_tx_done_cleanup,
 219 };
 220
 221 /*
 222  * Read data in admin queue to get msg from pf driver
 223  */
 224 static enum i40evf_aq_result
 225 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 226 {
 227         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 228         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 229         struct i40e_arq_event_info event;
 230         enum virtchnl_ops opcode;
 231         enum i40e_status_code retval;
 232         int ret;
 233         enum i40evf_aq_result result = I40EVF_MSG_NON;
 234
 235         event.buf_len = data->buf_len;
 236         event.msg_buf = data->msg;
 237         ret = i40e_clean_arq_element(hw, &event, NULL);
 238         /* Can't read any msg from adminQ */
 239         if (ret) {
 240                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 241                         result = I40EVF_MSG_ERR;
 242                 return result;
 243         }
 244
 245         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 246         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 247         /* pf sys event */
 248         if (opcode == VIRTCHNL_OP_EVENT) {
 249                 struct virtchnl_pf_event *vpe =
 250                         (struct virtchnl_pf_event *)event.msg_buf;
 251
 252                 result = I40EVF_MSG_SYS;
 253                 switch (vpe->event) {
 254                 case VIRTCHNL_EVENT_LINK_CHANGE:
 255                         vf->link_up =
 256                                 vpe->event_data.link_event.link_status;
 257                         vf->link_speed =
 258                                 vpe->event_data.link_event.link_speed;
 259                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 260                         PMD_DRV_LOG(INFO, "Link status update:%s",
 261                                     vf->link_up ? "up" : "down");
 262                         break;
 263                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 264                         vf->vf_reset = true;
 265                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 266                         PMD_DRV_LOG(INFO, "vf is reseting");
 267                         break;
 268                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 269                         vf->dev_closed = true;
 270                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 271                         PMD_DRV_LOG(INFO, "PF driver closed");
 272                         break;
 273                 default:
 274                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 275                                     __func__, vpe->event);
 276                 }
 277         } else {
 278                 /* async reply msg on command issued by vf previously */
 279                 result = I40EVF_MSG_CMD;
 280                 /* Actual data length read from PF */
 281                 data->msg_len = event.msg_len;
 282         }
 283
 284         data->result = retval;
 285         data->ops = opcode;
 286
 287         return result;
 288 }
 289
 290 /**
 291  * clear current command. Only call in case execute
 292  * _atomic_set_cmd successfully.
 293  */
 294 static inline void
 295 _clear_cmd(struct i40e_vf *vf)
 296 {
 297         rte_wmb();
 298         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 299 }
 300
 301 /*
 302  * Check there is pending cmd in execution. If none, set new command.
 303  */
 304 static inline int
 305 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 306 {
 307         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 308                         VIRTCHNL_OP_UNKNOWN, ops);
 309
 310         if (!ret)
 311                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 312
 313         return !ret;
 314 }
 315
 316 #define MAX_TRY_TIMES 200
 317 #define ASQ_DELAY_MS  10
 318
 319 static int
 320 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 321 {
 322         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 323         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 324         struct i40evf_arq_msg_info info;
 325         enum i40evf_aq_result ret;
 326         int err, i = 0;
 327
 328         if (_atomic_set_cmd(vf, args->ops))
 329                 return -1;
 330
 331         info.msg = args->out_buffer;
 332         info.buf_len = args->out_size;
 333         info.ops = VIRTCHNL_OP_UNKNOWN;
 334         info.result = I40E_SUCCESS;
 335
 336         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 337                      args->in_args, args->in_args_size, NULL);
 338         if (err) {
 339                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 340                 _clear_cmd(vf);
 341                 return err;
 342         }
 343
 344         switch (args->ops) {
 345         case VIRTCHNL_OP_RESET_VF:
 346                 /*no need to process in this function */
 347                 err = 0;
 348                 break;
 349         case VIRTCHNL_OP_VERSION:
 350         case VIRTCHNL_OP_GET_VF_RESOURCES:
 351                 /* for init adminq commands, need to poll the response */
 352                 err = -1;
 353                 do {
 354                         ret = i40evf_read_pfmsg(dev, &info);
 355                         vf->cmd_retval = info.result;
 356                         if (ret == I40EVF_MSG_CMD) {
 357                                 err = 0;
 358                                 break;
 359                         } else if (ret == I40EVF_MSG_ERR)
 360                                 break;
 361                         rte_delay_ms(ASQ_DELAY_MS);
 362                         /* If don't read msg or read sys event, continue */
 363                 } while (i++ < MAX_TRY_TIMES);
 364                 _clear_cmd(vf);
 365                 break;
 366         case VIRTCHNL_OP_REQUEST_QUEUES:
 367                 /**
 368                  * ignore async reply, only wait for system message,
 369                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 370                  * if not, means request queues failed.
 371                  */
 372                 err = -1;
 373                 do {
 374                         ret = i40evf_read_pfmsg(dev, &info);
 375                         vf->cmd_retval = info.result;
 376                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 377                                 err = 0;
 378                                 break;
 379                         } else if (ret == I40EVF_MSG_ERR ||
 380                                            ret == I40EVF_MSG_CMD) {
 381                                 break;
 382                         }
 383                         rte_delay_ms(ASQ_DELAY_MS);
 384                         /* If don't read msg or read sys event, continue */
 385                 } while (i++ < MAX_TRY_TIMES);
 386                 _clear_cmd(vf);
 387                 break;
 388
 389         default:
 390                 /* for other adminq in running time, waiting the cmd done flag */
 391                 err = -1;
 392                 do {
 393                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 394                                 err = 0;
 395                                 break;
 396                         }
 397                         rte_delay_ms(ASQ_DELAY_MS);
 398                         /* If don't read msg or read sys event, continue */
 399                 } while (i++ < MAX_TRY_TIMES);
 400                 /* If there's no response is received, clear command */
 401                 if (i >= MAX_TRY_TIMES) {
 402                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 403                         _clear_cmd(vf);
 404                 }
 405                 break;
 406         }
 407
 408         return err | vf->cmd_retval;
 409 }
 410
 411 /*
 412  * Check API version with sync wait until version read or fail from admin queue
 413  */
 414 static int
 415 i40evf_check_api_version(struct rte_eth_dev *dev)
 416 {
 417         struct virtchnl_version_info version, *pver;
 418         int err;
 419         struct vf_cmd_info args;
 420         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 421
 422         version.major = VIRTCHNL_VERSION_MAJOR;
 423         version.minor = VIRTCHNL_VERSION_MINOR;
 424
 425         args.ops = VIRTCHNL_OP_VERSION;
 426         args.in_args = (uint8_t *)&version;
 427         args.in_args_size = sizeof(version);
 428         args.out_buffer = vf->aq_resp;
 429         args.out_size = I40E_AQ_BUF_SZ;
 430
 431         err = i40evf_execute_vf_cmd(dev, &args);
 432         if (err) {
 433                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 434                 return err;
 435         }
 436
 437         pver = (struct virtchnl_version_info *)args.out_buffer;
 438         vf->version_major = pver->major;
 439         vf->version_minor = pver->minor;
 440         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 441                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 442                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 443         else {
 444                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 445                                         vf->version_major, vf->version_minor,
 446                                                 VIRTCHNL_VERSION_MAJOR,
 447                                                 VIRTCHNL_VERSION_MINOR);
 448                 return -1;
 449         }
 450
 451         return 0;
 452 }
 453
 454 static int
 455 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 456 {
 457         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 458         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 459         int err;
 460         struct vf_cmd_info args;
 461         uint32_t caps, len;
 462
 463         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 464         args.out_buffer = vf->aq_resp;
 465         args.out_size = I40E_AQ_BUF_SZ;
 466         if (PF_IS_V11(vf)) {
 467                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 468                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 469                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 470                        VIRTCHNL_VF_OFFLOAD_VLAN |
 471                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 472                 args.in_args = (uint8_t *)&caps;
 473                 args.in_args_size = sizeof(caps);
 474         } else {
 475                 args.in_args = NULL;
 476                 args.in_args_size = 0;
 477         }
 478         err = i40evf_execute_vf_cmd(dev, &args);
 479
 480         if (err) {
 481                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 482                 return err;
 483         }
 484
 485         len =  sizeof(struct virtchnl_vf_resource) +
 486                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 487
 488         rte_memcpy(vf->vf_res, args.out_buffer,
 489                         RTE_MIN(args.out_size, len));
 490         i40e_vf_parse_hw_config(hw, vf->vf_res);
 491
 492         return 0;
 493 }
 494
 495 static int
 496 i40evf_config_promisc(struct rte_eth_dev *dev,
 497                       bool enable_unicast,
 498                       bool enable_multicast)
 499 {
 500         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 501         int err;
 502         struct vf_cmd_info args;
 503         struct virtchnl_promisc_info promisc;
 504
 505         promisc.flags = 0;
 506         promisc.vsi_id = vf->vsi_res->vsi_id;
 507
 508         if (enable_unicast)
 509                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 510
 511         if (enable_multicast)
 512                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 513
 514         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 515         args.in_args = (uint8_t *)&promisc;
 516         args.in_args_size = sizeof(promisc);
 517         args.out_buffer = vf->aq_resp;
 518         args.out_size = I40E_AQ_BUF_SZ;
 519
 520         err = i40evf_execute_vf_cmd(dev, &args);
 521
 522         if (err)
 523                 PMD_DRV_LOG(ERR, "fail to execute command "
 524                             "CONFIG_PROMISCUOUS_MODE");
 525         return err;
 526 }
 527
 528 static int
 529 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 530 {
 531         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 532         struct vf_cmd_info args;
 533         int ret;
 534
 535         memset(&args, 0, sizeof(args));
 536         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 537         args.in_args = NULL;
 538         args.in_args_size = 0;
 539         args.out_buffer = vf->aq_resp;
 540         args.out_size = I40E_AQ_BUF_SZ;
 541         ret = i40evf_execute_vf_cmd(dev, &args);
 542         if (ret)
 543                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 544                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 545
 546         return ret;
 547 }
 548
 549 static int
 550 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 551 {
 552         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 553         struct vf_cmd_info args;
 554         int ret;
 555
 556         memset(&args, 0, sizeof(args));
 557         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 558         args.in_args = NULL;
 559         args.in_args_size = 0;
 560         args.out_buffer = vf->aq_resp;
 561         args.out_size = I40E_AQ_BUF_SZ;
 562         ret = i40evf_execute_vf_cmd(dev, &args);
 563         if (ret)
 564                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 565                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 566
 567         return ret;
 568 }
 569
 570 static void
 571 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 572                                   uint16_t vsi_id,
 573                                   uint16_t queue_id,
 574                                   uint16_t nb_txq,
 575                                   struct i40e_tx_queue *txq)
 576 {
 577         txq_info->vsi_id = vsi_id;
 578         txq_info->queue_id = queue_id;
 579         if (queue_id < nb_txq && txq) {
 580                 txq_info->ring_len = txq->nb_tx_desc;
 581                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 582         }
 583 }
 584
 585 static void
 586 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 587                                   uint16_t vsi_id,
 588                                   uint16_t queue_id,
 589                                   uint16_t nb_rxq,
 590                                   uint32_t max_pkt_size,
 591                                   struct i40e_rx_queue *rxq)
 592 {
 593         rxq_info->vsi_id = vsi_id;
 594         rxq_info->queue_id = queue_id;
 595         rxq_info->max_pkt_size = max_pkt_size;
 596         if (queue_id < nb_rxq && rxq) {
 597                 rxq_info->ring_len = rxq->nb_rx_desc;
 598                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 599                 rxq_info->databuffer_size =
 600                         (rte_pktmbuf_data_room_size(rxq->mp) -
 601                                 RTE_PKTMBUF_HEADROOM);
 602         }
 603 }
 604
 605 static int
 606 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 607 {
 608         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 609         struct i40e_rx_queue **rxq =
 610                 (struct i40e_rx_queue **)dev->data->rx_queues;
 611         struct i40e_tx_queue **txq =
 612                 (struct i40e_tx_queue **)dev->data->tx_queues;
 613         struct virtchnl_vsi_queue_config_info *vc_vqci;
 614         struct virtchnl_queue_pair_info *vc_qpi;
 615         struct vf_cmd_info args;
 616         uint16_t i, nb_qp = vf->num_queue_pairs;
 617         const uint32_t size =
 618                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 619         uint8_t buff[size];
 620         int ret;
 621
 622         memset(buff, 0, sizeof(buff));
 623         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 624         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 625         vc_vqci->num_queue_pairs = nb_qp;
 626
 627         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 628                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 629                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 630                         txq ? txq[i] : NULL);
 631                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 632                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 633                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 634         }
 635         memset(&args, 0, sizeof(args));
 636         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 637         args.in_args = (uint8_t *)vc_vqci;
 638         args.in_args_size = size;
 639         args.out_buffer = vf->aq_resp;
 640         args.out_size = I40E_AQ_BUF_SZ;
 641         ret = i40evf_execute_vf_cmd(dev, &args);
 642         if (ret)
 643                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 644                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 645
 646         return ret;
 647 }
 648
 649 static int
 650 i40evf_config_irq_map(struct rte_eth_dev *dev)
 651 {
 652         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 653         struct vf_cmd_info args;
 654         uint8_t *cmd_buffer = NULL;
 655         struct virtchnl_irq_map_info *map_info;
 656         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 657         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 658         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 659         uint16_t rxq_map[vf->vf_res->max_vectors];
 660         int err;
 661
 662         memset(rxq_map, 0, sizeof(rxq_map));
 663         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 664                 rte_intr_allow_others(intr_handle)) {
 665                 msix_base = I40E_RX_VEC_START;
 666                 /* For interrupt mode, available vector id is from 1. */
 667                 max_vectors = vf->vf_res->max_vectors - 1;
 668                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 669
 670                 vec = msix_base;
 671                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 672                         rxq_map[vec] |= 1 << i;
 673                         intr_handle->intr_vec[i] = vec++;
 674                         if (vec >= vf->vf_res->max_vectors)
 675                                 vec = msix_base;
 676                 }
 677         } else {
 678                 msix_base = I40E_MISC_VEC_ID;
 679                 nb_msix = 1;
 680
 681                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 682                         rxq_map[msix_base] |= 1 << i;
 683                         if (rte_intr_dp_is_en(intr_handle))
 684                                 intr_handle->intr_vec[i] = msix_base;
 685                 }
 686         }
 687
 688         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 689                         sizeof(struct virtchnl_vector_map) * nb_msix;
 690         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 691         if (!cmd_buffer) {
 692                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 693                 return I40E_ERR_NO_MEMORY;
 694         }
 695
 696         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 697         map_info->num_vectors = nb_msix;
 698         for (i = 0; i < nb_msix; i++) {
 699                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 700                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 701                 map_info->vecmap[i].vector_id = msix_base + i;
 702                 map_info->vecmap[i].txq_map = 0;
 703                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 704         }
 705
 706         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 707         args.in_args = (u8 *)cmd_buffer;
 708         args.in_args_size = cmd_buffer_size;
 709         args.out_buffer = vf->aq_resp;
 710         args.out_size = I40E_AQ_BUF_SZ;
 711         err = i40evf_execute_vf_cmd(dev, &args);
 712         if (err)
 713                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 714
 715         rte_free(cmd_buffer);
 716
 717         return err;
 718 }
 719
 720 static int
 721 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 722                                 bool on)
 723 {
 724         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 725         struct virtchnl_queue_select queue_select;
 726         int err;
 727         struct vf_cmd_info args;
 728         memset(&queue_select, 0, sizeof(queue_select));
 729         queue_select.vsi_id = vf->vsi_res->vsi_id;
 730
 731         if (isrx)
 732                 queue_select.rx_queues |= 1 << qid;
 733         else
 734                 queue_select.tx_queues |= 1 << qid;
 735
 736         if (on)
 737                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 738         else
 739                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 740         args.in_args = (u8 *)&queue_select;
 741         args.in_args_size = sizeof(queue_select);
 742         args.out_buffer = vf->aq_resp;
 743         args.out_size = I40E_AQ_BUF_SZ;
 744         err = i40evf_execute_vf_cmd(dev, &args);
 745         if (err)
 746                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 747                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 748
 749         return err;
 750 }
 751
 752 static int
 753 i40evf_start_queues(struct rte_eth_dev *dev)
 754 {
 755         struct rte_eth_dev_data *dev_data = dev->data;
 756         int i;
 757         struct i40e_rx_queue *rxq;
 758         struct i40e_tx_queue *txq;
 759
 760         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 761                 rxq = dev_data->rx_queues[i];
 762                 if (rxq->rx_deferred_start)
 763                         continue;
 764                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 765                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 766                         return -1;
 767                 }
 768         }
 769
 770         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 771                 txq = dev_data->tx_queues[i];
 772                 if (txq->tx_deferred_start)
 773                         continue;
 774                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 775                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 776                         return -1;
 777                 }
 778         }
 779
 780         return 0;
 781 }
 782
 783 static int
 784 i40evf_stop_queues(struct rte_eth_dev *dev)
 785 {
 786         int i;
 787
 788         /* Stop TX queues first */
 789         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 790                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 791                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 792                         return -1;
 793                 }
 794         }
 795
 796         /* Then stop RX queues */
 797         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 798                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 799                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 800                         return -1;
 801                 }
 802         }
 803
 804         return 0;
 805 }
 806
 807 static int
 808 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 809                     struct rte_ether_addr *addr,
 810                     __rte_unused uint32_t index,
 811                     __rte_unused uint32_t pool)
 812 {
 813         struct virtchnl_ether_addr_list *list;
 814         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 815         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 816                         sizeof(struct virtchnl_ether_addr)];
 817         int err;
 818         struct vf_cmd_info args;
 819
 820         if (rte_is_zero_ether_addr(addr)) {
 821                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 822                             addr->addr_bytes[0], addr->addr_bytes[1],
 823                             addr->addr_bytes[2], addr->addr_bytes[3],
 824                             addr->addr_bytes[4], addr->addr_bytes[5]);
 825                 return I40E_ERR_INVALID_MAC_ADDR;
 826         }
 827
 828         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 829         list->vsi_id = vf->vsi_res->vsi_id;
 830         list->num_elements = 1;
 831         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 832                                         sizeof(addr->addr_bytes));
 833
 834         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 835         args.in_args = cmd_buffer;
 836         args.in_args_size = sizeof(cmd_buffer);
 837         args.out_buffer = vf->aq_resp;
 838         args.out_size = I40E_AQ_BUF_SZ;
 839         err = i40evf_execute_vf_cmd(dev, &args);
 840         if (err)
 841                 PMD_DRV_LOG(ERR, "fail to execute command "
 842                             "OP_ADD_ETHER_ADDRESS");
 843         else
 844                 vf->vsi.mac_num++;
 845
 846         return err;
 847 }
 848
 849 static void
 850 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 851                             struct rte_ether_addr *addr)
 852 {
 853         struct virtchnl_ether_addr_list *list;
 854         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 855         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 856                         sizeof(struct virtchnl_ether_addr)];
 857         int err;
 858         struct vf_cmd_info args;
 859
 860         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 861                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 862                             addr->addr_bytes[0], addr->addr_bytes[1],
 863                             addr->addr_bytes[2], addr->addr_bytes[3],
 864                             addr->addr_bytes[4], addr->addr_bytes[5]);
 865                 return;
 866         }
 867
 868         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 869         list->vsi_id = vf->vsi_res->vsi_id;
 870         list->num_elements = 1;
 871         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 872                         sizeof(addr->addr_bytes));
 873
 874         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 875         args.in_args = cmd_buffer;
 876         args.in_args_size = sizeof(cmd_buffer);
 877         args.out_buffer = vf->aq_resp;
 878         args.out_size = I40E_AQ_BUF_SZ;
 879         err = i40evf_execute_vf_cmd(dev, &args);
 880         if (err)
 881                 PMD_DRV_LOG(ERR, "fail to execute command "
 882                             "OP_DEL_ETHER_ADDRESS");
 883         else
 884                 vf->vsi.mac_num--;
 885         return;
 886 }
 887
 888 static void
 889 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 890 {
 891         struct rte_eth_dev_data *data = dev->data;
 892         struct rte_ether_addr *addr;
 893
 894         addr = &data->mac_addrs[index];
 895
 896         i40evf_del_mac_addr_by_addr(dev, addr);
 897 }
 898
 899 static int
 900 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 901 {
 902         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 903         struct virtchnl_queue_select q_stats;
 904         int err;
 905         struct vf_cmd_info args;
 906
 907         memset(&q_stats, 0, sizeof(q_stats));
 908         q_stats.vsi_id = vf->vsi_res->vsi_id;
 909         args.ops = VIRTCHNL_OP_GET_STATS;
 910         args.in_args = (u8 *)&q_stats;
 911         args.in_args_size = sizeof(q_stats);
 912         args.out_buffer = vf->aq_resp;
 913         args.out_size = I40E_AQ_BUF_SZ;
 914
 915         err = i40evf_execute_vf_cmd(dev, &args);
 916         if (err) {
 917                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 918                 *pstats = NULL;
 919                 return err;
 920         }
 921         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 922         return 0;
 923 }
 924
 925 static void
 926 i40evf_stat_update_48(uint64_t *offset,
 927                    uint64_t *stat)
 928 {
 929         if (*stat >= *offset)
 930                 *stat = *stat - *offset;
 931         else
 932                 *stat = (uint64_t)((*stat +
 933                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 934
 935         *stat &= I40E_48_BIT_MASK;
 936 }
 937
 938 static void
 939 i40evf_stat_update_32(uint64_t *offset,
 940                    uint64_t *stat)
 941 {
 942         if (*stat >= *offset)
 943                 *stat = (uint64_t)(*stat - *offset);
 944         else
 945                 *stat = (uint64_t)((*stat +
 946                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 947 }
 948
 949 static void
 950 i40evf_update_stats(struct i40e_vsi *vsi,
 951                                         struct i40e_eth_stats *nes)
 952 {
 953         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 954
 955         i40evf_stat_update_48(&oes->rx_bytes,
 956                             &nes->rx_bytes);
 957         i40evf_stat_update_48(&oes->rx_unicast,
 958                             &nes->rx_unicast);
 959         i40evf_stat_update_48(&oes->rx_multicast,
 960                             &nes->rx_multicast);
 961         i40evf_stat_update_48(&oes->rx_broadcast,
 962                             &nes->rx_broadcast);
 963         i40evf_stat_update_32(&oes->rx_discards,
 964                                 &nes->rx_discards);
 965         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 966                             &nes->rx_unknown_protocol);
 967         i40evf_stat_update_48(&oes->tx_bytes,
 968                             &nes->tx_bytes);
 969         i40evf_stat_update_48(&oes->tx_unicast,
 970                             &nes->tx_unicast);
 971         i40evf_stat_update_48(&oes->tx_multicast,
 972                             &nes->tx_multicast);
 973         i40evf_stat_update_48(&oes->tx_broadcast,
 974                             &nes->tx_broadcast);
 975         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 976         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 977 }
 978
 979 static int
 980 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 981 {
 982         int ret;
 983         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 984         struct i40e_eth_stats *pstats = NULL;
 985
 986         /* read stat values to clear hardware registers */
 987         ret = i40evf_query_stats(dev, &pstats);
 988
 989         /* set stats offset base on current values */
 990         if (ret == 0)
 991                 vf->vsi.eth_stats_offset = *pstats;
 992
 993         return ret;
 994 }
 995
 996 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 997                                       struct rte_eth_xstat_name *xstats_names,
 998                                       __rte_unused unsigned limit)
 999 {
1000         unsigned i;
1001
1002         if (xstats_names != NULL)
1003                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1004                         snprintf(xstats_names[i].name,
1005                                 sizeof(xstats_names[i].name),
1006                                 "%s", rte_i40evf_stats_strings[i].name);
1007                 }
1008         return I40EVF_NB_XSTATS;
1009 }
1010
1011 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1012                                  struct rte_eth_xstat *xstats, unsigned n)
1013 {
1014         int ret;
1015         unsigned i;
1016         struct i40e_eth_stats *pstats = NULL;
1017         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1018         struct i40e_vsi *vsi = &vf->vsi;
1019
1020         if (n < I40EVF_NB_XSTATS)
1021                 return I40EVF_NB_XSTATS;
1022
1023         ret = i40evf_query_stats(dev, &pstats);
1024         if (ret != 0)
1025                 return 0;
1026
1027         if (!xstats)
1028                 return 0;
1029
1030         i40evf_update_stats(vsi, pstats);
1031
1032         /* loop over xstats array and values from pstats */
1033         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1034                 xstats[i].id = i;
1035                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1036                         rte_i40evf_stats_strings[i].offset);
1037         }
1038
1039         return I40EVF_NB_XSTATS;
1040 }
1041
1042 static int
1043 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1044 {
1045         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1046         struct virtchnl_vlan_filter_list *vlan_list;
1047         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1048                                                         sizeof(uint16_t)];
1049         int err;
1050         struct vf_cmd_info args;
1051
1052         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1053         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1054         vlan_list->num_elements = 1;
1055         vlan_list->vlan_id[0] = vlanid;
1056
1057         args.ops = VIRTCHNL_OP_ADD_VLAN;
1058         args.in_args = (u8 *)&cmd_buffer;
1059         args.in_args_size = sizeof(cmd_buffer);
1060         args.out_buffer = vf->aq_resp;
1061         args.out_size = I40E_AQ_BUF_SZ;
1062         err = i40evf_execute_vf_cmd(dev, &args);
1063         if (err)
1064                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1065
1066         return err;
1067 }
1068
1069 static int
1070 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1071 {
1072         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1073         struct virtchnl_vf_res_request vfres;
1074         struct vf_cmd_info args;
1075         int err;
1076
1077         vfres.num_queue_pairs = num;
1078
1079         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1080         args.in_args = (u8 *)&vfres;
1081         args.in_args_size = sizeof(vfres);
1082         args.out_buffer = vf->aq_resp;
1083         args.out_size = I40E_AQ_BUF_SZ;
1084
1085         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1086         err = i40evf_execute_vf_cmd(dev, &args);
1087         if (err)
1088                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1089
1090         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1091                           i40evf_dev_alarm_handler, dev);
1092         return err;
1093 }
1094
1095 static int
1096 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1097 {
1098         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1099         struct virtchnl_vlan_filter_list *vlan_list;
1100         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1101                                                         sizeof(uint16_t)];
1102         int err;
1103         struct vf_cmd_info args;
1104
1105         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1106         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1107         vlan_list->num_elements = 1;
1108         vlan_list->vlan_id[0] = vlanid;
1109
1110         args.ops = VIRTCHNL_OP_DEL_VLAN;
1111         args.in_args = (u8 *)&cmd_buffer;
1112         args.in_args_size = sizeof(cmd_buffer);
1113         args.out_buffer = vf->aq_resp;
1114         args.out_size = I40E_AQ_BUF_SZ;
1115         err = i40evf_execute_vf_cmd(dev, &args);
1116         if (err)
1117                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1118
1119         return err;
1120 }
1121
1122 static const struct rte_pci_id pci_id_i40evf_map[] = {
1123         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1124         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1125         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1126         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1127         { .vendor_id = 0, /* sentinel */ },
1128 };
1129
1130 /* Disable IRQ0 */
1131 static inline void
1132 i40evf_disable_irq0(struct i40e_hw *hw)
1133 {
1134         /* Disable all interrupt types */
1135         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1136         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1137                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1138         I40EVF_WRITE_FLUSH(hw);
1139 }
1140
1141 /* Enable IRQ0 */
1142 static inline void
1143 i40evf_enable_irq0(struct i40e_hw *hw)
1144 {
1145         /* Enable admin queue interrupt trigger */
1146         uint32_t val;
1147
1148         i40evf_disable_irq0(hw);
1149         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1150         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1151                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1152         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1153
1154         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1155                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1156                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1157                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1158
1159         I40EVF_WRITE_FLUSH(hw);
1160 }
1161
1162 static int
1163 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1164 {
1165         int i, reset;
1166         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1167         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1168
1169         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1170                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1171                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1172                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1173                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1174                     reset == VIRTCHNL_VFR_COMPLETED)
1175                         break;
1176                 rte_delay_ms(50);
1177         }
1178
1179         if (i >= MAX_RESET_WAIT_CNT)
1180                 return -1;
1181
1182         vf->vf_reset = false;
1183         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1184
1185         return 0;
1186 }
1187 static int
1188 i40evf_reset_vf(struct rte_eth_dev *dev)
1189 {
1190         int ret;
1191         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1192
1193         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1194                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1195                 return -1;
1196         }
1197         /**
1198           * After issuing vf reset command to pf, pf won't necessarily
1199           * reset vf, it depends on what state it exactly is. If it's not
1200           * initialized yet, it won't have vf reset since it's in a certain
1201           * state. If not, it will try to reset. Even vf is reset, pf will
1202           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1203           * it to ACTIVE. In this duration, vf may not catch the moment that
1204           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1205           */
1206         rte_delay_ms(200);
1207
1208         ret = i40evf_check_vf_reset_done(dev);
1209         if (ret) {
1210                 PMD_INIT_LOG(ERR, "VF is still resetting");
1211                 return ret;
1212         }
1213
1214         return 0;
1215 }
1216
1217 static int
1218 i40evf_init_vf(struct rte_eth_dev *dev)
1219 {
1220         int i, err, bufsz;
1221         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1222         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1223         uint16_t interval =
1224                 i40e_calc_itr_interval(0, 0);
1225
1226         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1227         vf->dev_data = dev->data;
1228         err = i40e_set_mac_type(hw);
1229         if (err) {
1230                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1231                 goto err;
1232         }
1233
1234         err = i40evf_check_vf_reset_done(dev);
1235         if (err)
1236                 goto err;
1237
1238         i40e_init_adminq_parameter(hw);
1239         err = i40e_init_adminq(hw);
1240         if (err) {
1241                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1242                 goto err;
1243         }
1244
1245         /* Reset VF and wait until it's complete */
1246         if (i40evf_reset_vf(dev)) {
1247                 PMD_INIT_LOG(ERR, "reset NIC failed");
1248                 goto err_aq;
1249         }
1250
1251         /* VF reset, shutdown admin queue and initialize again */
1252         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1253                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1254                 goto err;
1255         }
1256
1257         i40e_init_adminq_parameter(hw);
1258         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1259                 PMD_INIT_LOG(ERR, "init_adminq failed");
1260                 goto err;
1261         }
1262
1263         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1264         if (!vf->aq_resp) {
1265                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1266                 goto err_aq;
1267         }
1268         if (i40evf_check_api_version(dev) != 0) {
1269                 PMD_INIT_LOG(ERR, "check_api version failed");
1270                 goto err_api;
1271         }
1272         bufsz = sizeof(struct virtchnl_vf_resource) +
1273                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1274         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1275         if (!vf->vf_res) {
1276                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1277                 goto err_api;
1278         }
1279
1280         if (i40evf_get_vf_resource(dev) != 0) {
1281                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1282                 goto err_alloc;
1283         }
1284
1285         /* got VF config message back from PF, now we can parse it */
1286         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1287                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1288                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1289         }
1290
1291         if (!vf->vsi_res) {
1292                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1293                 goto err_alloc;
1294         }
1295
1296         if (hw->mac.type == I40E_MAC_X722_VF)
1297                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1298         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1299
1300         switch (vf->vsi_res->vsi_type) {
1301         case VIRTCHNL_VSI_SRIOV:
1302                 vf->vsi.type = I40E_VSI_SRIOV;
1303                 break;
1304         default:
1305                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1306                 break;
1307         }
1308         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1309         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1310
1311         /* Store the MAC address configured by host, or generate random one */
1312         if (rte_is_valid_assigned_ether_addr(
1313                         (struct rte_ether_addr *)hw->mac.addr))
1314                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1315         else
1316                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1317
1318         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1319                        (I40E_ITR_INDEX_DEFAULT <<
1320                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1321                        (interval <<
1322                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1323         I40EVF_WRITE_FLUSH(hw);
1324
1325         return 0;
1326
1327 err_alloc:
1328         rte_free(vf->vf_res);
1329         vf->vsi_res = NULL;
1330 err_api:
1331         rte_free(vf->aq_resp);
1332 err_aq:
1333         i40e_shutdown_adminq(hw); /* ignore error */
1334 err:
1335         return -1;
1336 }
1337
1338 static int
1339 i40evf_uninit_vf(struct rte_eth_dev *dev)
1340 {
1341         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1342
1343         PMD_INIT_FUNC_TRACE();
1344
1345         if (hw->adapter_closed == 0)
1346                 i40evf_dev_close(dev);
1347
1348         return 0;
1349 }
1350
1351 static void
1352 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1353                 __rte_unused uint16_t msglen)
1354 {
1355         struct virtchnl_pf_event *pf_msg =
1356                         (struct virtchnl_pf_event *)msg;
1357         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1358
1359         switch (pf_msg->event) {
1360         case VIRTCHNL_EVENT_RESET_IMPENDING:
1361                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1362                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1363                                               NULL);
1364                 break;
1365         case VIRTCHNL_EVENT_LINK_CHANGE:
1366                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1367                 vf->link_up = pf_msg->event_data.link_event.link_status;
1368                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1369                 break;
1370         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1371                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1372                 break;
1373         default:
1374                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1375                 break;
1376         }
1377 }
1378
1379 static void
1380 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1381 {
1382         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1383         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1384         struct i40e_arq_event_info info;
1385         uint16_t pending, aq_opc;
1386         enum virtchnl_ops msg_opc;
1387         enum i40e_status_code msg_ret;
1388         int ret;
1389
1390         info.buf_len = I40E_AQ_BUF_SZ;
1391         if (!vf->aq_resp) {
1392                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1393                 return;
1394         }
1395         info.msg_buf = vf->aq_resp;
1396
1397         pending = 1;
1398         while (pending) {
1399                 ret = i40e_clean_arq_element(hw, &info, &pending);
1400
1401                 if (ret != I40E_SUCCESS) {
1402                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1403                                     "ret: %d", ret);
1404                         break;
1405                 }
1406                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1407                 /* For the message sent from pf to vf, opcode is stored in
1408                  * cookie_high of struct i40e_aq_desc, while return error code
1409                  * are stored in cookie_low, Which is done by
1410                  * i40e_aq_send_msg_to_vf in PF driver.*/
1411                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1412                                                   info.desc.cookie_high);
1413                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1414                                                   info.desc.cookie_low);
1415                 switch (aq_opc) {
1416                 case i40e_aqc_opc_send_msg_to_vf:
1417                         if (msg_opc == VIRTCHNL_OP_EVENT)
1418                                 /* process event*/
1419                                 i40evf_handle_pf_event(dev, info.msg_buf,
1420                                                        info.msg_len);
1421                         else {
1422                                 /* read message and it's expected one */
1423                                 if (msg_opc == vf->pend_cmd) {
1424                                         vf->cmd_retval = msg_ret;
1425                                         /* prevent compiler reordering */
1426                                         rte_compiler_barrier();
1427                                         _clear_cmd(vf);
1428                                 } else
1429                                         PMD_DRV_LOG(ERR, "command mismatch,"
1430                                                 "expect %u, get %u",
1431                                                 vf->pend_cmd, msg_opc);
1432                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1433                                              " opcode = %d", msg_opc);
1434                         }
1435                         break;
1436                 default:
1437                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1438                                     aq_opc);
1439                         break;
1440                 }
1441         }
1442 }
1443
1444 /**
1445  * Interrupt handler triggered by NIC  for handling
1446  * specific interrupt. Only adminq interrupt is processed in VF.
1447  *
1448  * @param handle
1449  *  Pointer to interrupt handle.
1450  * @param param
1451  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1452  *
1453  * @return
1454  *  void
1455  */
1456 static void
1457 i40evf_dev_alarm_handler(void *param)
1458 {
1459         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1460         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1461         uint32_t icr0;
1462
1463         i40evf_disable_irq0(hw);
1464
1465         /* read out interrupt causes */
1466         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1467
1468         /* No interrupt event indicated */
1469         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1470                 goto done;
1471
1472         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1473                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1474                 i40evf_handle_aq_msg(dev);
1475         }
1476
1477         /* Link Status Change interrupt */
1478         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1479                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1480                                    " do nothing");
1481
1482 done:
1483         i40evf_enable_irq0(hw);
1484         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1485                           i40evf_dev_alarm_handler, dev);
1486 }
1487
1488 static int
1489 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1490 {
1491         struct i40e_hw *hw
1492                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1493         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1494
1495         PMD_INIT_FUNC_TRACE();
1496
1497         /* assign ops func pointer */
1498         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1499         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1500         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1501
1502         /*
1503          * For secondary processes, we don't initialise any further as primary
1504          * has already done this work.
1505          */
1506         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1507                 i40e_set_rx_function(eth_dev);
1508                 i40e_set_tx_function(eth_dev);
1509                 return 0;
1510         }
1511         i40e_set_default_ptype_table(eth_dev);
1512         rte_eth_copy_pci_info(eth_dev, pci_dev);
1513
1514         hw->vendor_id = pci_dev->id.vendor_id;
1515         hw->device_id = pci_dev->id.device_id;
1516         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1517         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1518         hw->bus.device = pci_dev->addr.devid;
1519         hw->bus.func = pci_dev->addr.function;
1520         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1521         hw->adapter_stopped = 0;
1522         hw->adapter_closed = 0;
1523
1524         /* Pass the information to the rte_eth_dev_close() that it should also
1525          * release the private port resources.
1526          */
1527         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1528
1529         if(i40evf_init_vf(eth_dev) != 0) {
1530                 PMD_INIT_LOG(ERR, "Init vf failed");
1531                 return -1;
1532         }
1533
1534         i40e_set_default_pctype_table(eth_dev);
1535         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1536                           i40evf_dev_alarm_handler, eth_dev);
1537
1538         /* configure and enable device interrupt */
1539         i40evf_enable_irq0(hw);
1540
1541         /* copy mac addr */
1542         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1543                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1544                                 0);
1545         if (eth_dev->data->mac_addrs == NULL) {
1546                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1547                                 " store MAC addresses",
1548                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1549                 return -ENOMEM;
1550         }
1551         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1552                         &eth_dev->data->mac_addrs[0]);
1553
1554         return 0;
1555 }
1556
1557 static int
1558 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1559 {
1560         PMD_INIT_FUNC_TRACE();
1561
1562         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1563                 return -EPERM;
1564
1565         if (i40evf_uninit_vf(eth_dev) != 0) {
1566                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1567                 return -1;
1568         }
1569
1570         return 0;
1571 }
1572
1573 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1574         struct rte_pci_device *pci_dev)
1575 {
1576         return rte_eth_dev_pci_generic_probe(pci_dev,
1577                 sizeof(struct i40e_adapter), i40evf_dev_init);
1578 }
1579
1580 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1581 {
1582         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1583 }
1584
1585 /*
1586  * virtual function driver struct
1587  */
1588 static struct rte_pci_driver rte_i40evf_pmd = {
1589         .id_table = pci_id_i40evf_map,
1590         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1591         .probe = eth_i40evf_pci_probe,
1592         .remove = eth_i40evf_pci_remove,
1593 };
1594
1595 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1596 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1597 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1598
1599 static int
1600 i40evf_dev_configure(struct rte_eth_dev *dev)
1601 {
1602         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1603         struct i40e_adapter *ad =
1604                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1605         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1606                                 dev->data->nb_tx_queues);
1607
1608         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1609          * allocation or vector Rx preconditions we will reset it.
1610          */
1611         ad->rx_bulk_alloc_allowed = true;
1612         ad->rx_vec_allowed = true;
1613         ad->tx_simple_allowed = true;
1614         ad->tx_vec_allowed = true;
1615
1616         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1617                 int ret = 0;
1618
1619                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1620                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1621                 ret = i40evf_request_queues(dev, num_queue_pairs);
1622                 if (ret != 0)
1623                         return ret;
1624
1625                 ret = i40evf_dev_reset(dev);
1626                 if (ret != 0)
1627                         return ret;
1628         }
1629
1630         return i40evf_init_vlan(dev);
1631 }
1632
1633 static int
1634 i40evf_init_vlan(struct rte_eth_dev *dev)
1635 {
1636         /* Apply vlan offload setting */
1637         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1638
1639         return 0;
1640 }
1641
1642 static int
1643 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1644 {
1645         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1646         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1647
1648         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1649                 return -ENOTSUP;
1650
1651         /* Vlan stripping setting */
1652         if (mask & ETH_VLAN_STRIP_MASK) {
1653                 /* Enable or disable VLAN stripping */
1654                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1655                         i40evf_enable_vlan_strip(dev);
1656                 else
1657                         i40evf_disable_vlan_strip(dev);
1658         }
1659
1660         return 0;
1661 }
1662
1663 static int
1664 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1665 {
1666         struct i40e_rx_queue *rxq;
1667         int err;
1668         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1669
1670         PMD_INIT_FUNC_TRACE();
1671
1672         rxq = dev->data->rx_queues[rx_queue_id];
1673
1674         err = i40e_alloc_rx_queue_mbufs(rxq);
1675         if (err) {
1676                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1677                 return err;
1678         }
1679
1680         rte_wmb();
1681
1682         /* Init the RX tail register. */
1683         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1684         I40EVF_WRITE_FLUSH(hw);
1685
1686         /* Ready to switch the queue on */
1687         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1688         if (err) {
1689                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1690                             rx_queue_id);
1691                 return err;
1692         }
1693         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1694
1695         return 0;
1696 }
1697
1698 static int
1699 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1700 {
1701         struct i40e_rx_queue *rxq;
1702         int err;
1703
1704         rxq = dev->data->rx_queues[rx_queue_id];
1705
1706         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1707         if (err) {
1708                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1709                             rx_queue_id);
1710                 return err;
1711         }
1712
1713         i40e_rx_queue_release_mbufs(rxq);
1714         i40e_reset_rx_queue(rxq);
1715         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1716
1717         return 0;
1718 }
1719
1720 static int
1721 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1722 {
1723         int err;
1724
1725         PMD_INIT_FUNC_TRACE();
1726
1727         /* Ready to switch the queue on */
1728         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1729         if (err) {
1730                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1731                             tx_queue_id);
1732                 return err;
1733         }
1734         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1735
1736         return 0;
1737 }
1738
1739 static int
1740 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1741 {
1742         struct i40e_tx_queue *txq;
1743         int err;
1744
1745         txq = dev->data->tx_queues[tx_queue_id];
1746
1747         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1748         if (err) {
1749                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1750                             tx_queue_id);
1751                 return err;
1752         }
1753
1754         i40e_tx_queue_release_mbufs(txq);
1755         i40e_reset_tx_queue(txq);
1756         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1757
1758         return 0;
1759 }
1760
1761 static int
1762 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1763 {
1764         int ret;
1765
1766         if (on)
1767                 ret = i40evf_add_vlan(dev, vlan_id);
1768         else
1769                 ret = i40evf_del_vlan(dev,vlan_id);
1770
1771         return ret;
1772 }
1773
1774 static int
1775 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1776 {
1777         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1778         struct rte_eth_dev_data *dev_data = dev->data;
1779         struct rte_pktmbuf_pool_private *mbp_priv;
1780         uint16_t buf_size, len;
1781
1782         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1783         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1784         I40EVF_WRITE_FLUSH(hw);
1785
1786         /* Calculate the maximum packet length allowed */
1787         mbp_priv = rte_mempool_get_priv(rxq->mp);
1788         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1789                                         RTE_PKTMBUF_HEADROOM);
1790         rxq->hs_mode = i40e_header_split_none;
1791         rxq->rx_hdr_len = 0;
1792         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1793         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1794         rxq->max_pkt_len = RTE_MIN(len,
1795                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1796
1797         /**
1798          * Check if the jumbo frame and maximum packet length are set correctly
1799          */
1800         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1801                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1802                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1803                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1804                                 "larger than %u and smaller than %u, as jumbo "
1805                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1806                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1807                         return I40E_ERR_CONFIG;
1808                 }
1809         } else {
1810                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1811                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1812                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1813                                 "larger than %u and smaller than %u, as jumbo "
1814                                 "frame is disabled",
1815                                 (uint32_t)RTE_ETHER_MIN_LEN,
1816                                 (uint32_t)RTE_ETHER_MAX_LEN);
1817                         return I40E_ERR_CONFIG;
1818                 }
1819         }
1820
1821         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1822             rxq->max_pkt_len > buf_size)
1823                 dev_data->scattered_rx = 1;
1824
1825         return 0;
1826 }
1827
1828 static int
1829 i40evf_rx_init(struct rte_eth_dev *dev)
1830 {
1831         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1832         uint16_t i;
1833         int ret = I40E_SUCCESS;
1834         struct i40e_rx_queue **rxq =
1835                 (struct i40e_rx_queue **)dev->data->rx_queues;
1836
1837         i40evf_config_rss(vf);
1838         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1839                 if (!rxq[i] || !rxq[i]->q_set)
1840                         continue;
1841                 ret = i40evf_rxq_init(dev, rxq[i]);
1842                 if (ret != I40E_SUCCESS)
1843                         break;
1844         }
1845         if (ret == I40E_SUCCESS)
1846                 i40e_set_rx_function(dev);
1847
1848         return ret;
1849 }
1850
1851 static void
1852 i40evf_tx_init(struct rte_eth_dev *dev)
1853 {
1854         uint16_t i;
1855         struct i40e_tx_queue **txq =
1856                 (struct i40e_tx_queue **)dev->data->tx_queues;
1857         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1858
1859         for (i = 0; i < dev->data->nb_tx_queues; i++)
1860                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1861
1862         i40e_set_tx_function(dev);
1863 }
1864
1865 static inline void
1866 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1867 {
1868         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1869         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1870         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1871
1872         if (!rte_intr_allow_others(intr_handle)) {
1873                 I40E_WRITE_REG(hw,
1874                                I40E_VFINT_DYN_CTL01,
1875                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1876                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1877                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1878                 I40EVF_WRITE_FLUSH(hw);
1879                 return;
1880         }
1881
1882         I40EVF_WRITE_FLUSH(hw);
1883 }
1884
1885 static inline void
1886 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1887 {
1888         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1889         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1890         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1891
1892         if (!rte_intr_allow_others(intr_handle)) {
1893                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1894                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1895                 I40EVF_WRITE_FLUSH(hw);
1896                 return;
1897         }
1898
1899         I40EVF_WRITE_FLUSH(hw);
1900 }
1901
1902 static int
1903 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1904 {
1905         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1906         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1907         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1908         uint16_t interval =
1909                 i40e_calc_itr_interval(0, 0);
1910         uint16_t msix_intr;
1911
1912         msix_intr = intr_handle->intr_vec[queue_id];
1913         if (msix_intr == I40E_MISC_VEC_ID)
1914                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1915                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1916                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1917                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1918                                (interval <<
1919                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1920         else
1921                 I40E_WRITE_REG(hw,
1922                                I40E_VFINT_DYN_CTLN1(msix_intr -
1923                                                     I40E_RX_VEC_START),
1924                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1925                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1926                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1927                                (interval <<
1928                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1929
1930         I40EVF_WRITE_FLUSH(hw);
1931
1932         return 0;
1933 }
1934
1935 static int
1936 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1937 {
1938         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1939         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1940         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1941         uint16_t msix_intr;
1942
1943         msix_intr = intr_handle->intr_vec[queue_id];
1944         if (msix_intr == I40E_MISC_VEC_ID)
1945                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1946         else
1947                 I40E_WRITE_REG(hw,
1948                                I40E_VFINT_DYN_CTLN1(msix_intr -
1949                                                     I40E_RX_VEC_START),
1950                                0);
1951
1952         I40EVF_WRITE_FLUSH(hw);
1953
1954         return 0;
1955 }
1956
1957 static void
1958 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1959 {
1960         struct virtchnl_ether_addr_list *list;
1961         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1962         int err, i, j;
1963         int next_begin = 0;
1964         int begin = 0;
1965         uint32_t len;
1966         struct rte_ether_addr *addr;
1967         struct vf_cmd_info args;
1968
1969         do {
1970                 j = 0;
1971                 len = sizeof(struct virtchnl_ether_addr_list);
1972                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1973                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
1974                                 continue;
1975                         len += sizeof(struct virtchnl_ether_addr);
1976                         if (len >= I40E_AQ_BUF_SZ) {
1977                                 next_begin = i + 1;
1978                                 break;
1979                         }
1980                 }
1981
1982                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1983                 if (!list) {
1984                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1985                         return;
1986                 }
1987
1988                 for (i = begin; i < next_begin; i++) {
1989                         addr = &dev->data->mac_addrs[i];
1990                         if (rte_is_zero_ether_addr(addr))
1991                                 continue;
1992                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1993                                          sizeof(addr->addr_bytes));
1994                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1995                                     addr->addr_bytes[0], addr->addr_bytes[1],
1996                                     addr->addr_bytes[2], addr->addr_bytes[3],
1997                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1998                         j++;
1999                 }
2000                 list->vsi_id = vf->vsi_res->vsi_id;
2001                 list->num_elements = j;
2002                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2003                            VIRTCHNL_OP_DEL_ETH_ADDR;
2004                 args.in_args = (uint8_t *)list;
2005                 args.in_args_size = len;
2006                 args.out_buffer = vf->aq_resp;
2007                 args.out_size = I40E_AQ_BUF_SZ;
2008                 err = i40evf_execute_vf_cmd(dev, &args);
2009                 if (err) {
2010                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2011                                     add ? "OP_ADD_ETHER_ADDRESS" :
2012                                     "OP_DEL_ETHER_ADDRESS");
2013                 } else {
2014                         if (add)
2015                                 vf->vsi.mac_num++;
2016                         else
2017                                 vf->vsi.mac_num--;
2018                 }
2019                 rte_free(list);
2020                 begin = next_begin;
2021         } while (begin < I40E_NUM_MACADDR_MAX);
2022 }
2023
2024 static int
2025 i40evf_dev_start(struct rte_eth_dev *dev)
2026 {
2027         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2028         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2029         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2030         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2031         uint32_t intr_vector = 0;
2032
2033         PMD_INIT_FUNC_TRACE();
2034
2035         hw->adapter_stopped = 0;
2036
2037         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2038         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2039                                         dev->data->nb_tx_queues);
2040
2041         /* check and configure queue intr-vector mapping */
2042         if (rte_intr_cap_multiple(intr_handle) &&
2043             dev->data->dev_conf.intr_conf.rxq) {
2044                 intr_vector = dev->data->nb_rx_queues;
2045                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2046                         return -1;
2047         }
2048
2049         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2050                 intr_handle->intr_vec =
2051                         rte_zmalloc("intr_vec",
2052                                     dev->data->nb_rx_queues * sizeof(int), 0);
2053                 if (!intr_handle->intr_vec) {
2054                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2055                                      " intr_vec", dev->data->nb_rx_queues);
2056                         return -ENOMEM;
2057                 }
2058         }
2059
2060         if (i40evf_rx_init(dev) != 0){
2061                 PMD_DRV_LOG(ERR, "failed to do RX init");
2062                 return -1;
2063         }
2064
2065         i40evf_tx_init(dev);
2066
2067         if (i40evf_configure_vsi_queues(dev) != 0) {
2068                 PMD_DRV_LOG(ERR, "configure queues failed");
2069                 goto err_queue;
2070         }
2071         if (i40evf_config_irq_map(dev)) {
2072                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2073                 goto err_queue;
2074         }
2075
2076         /* Set all mac addrs */
2077         i40evf_add_del_all_mac_addr(dev, TRUE);
2078         /* Set all multicast addresses */
2079         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2080                                 TRUE);
2081
2082         if (i40evf_start_queues(dev) != 0) {
2083                 PMD_DRV_LOG(ERR, "enable queues failed");
2084                 goto err_mac;
2085         }
2086
2087         /* only enable interrupt in rx interrupt mode */
2088         if (dev->data->dev_conf.intr_conf.rxq != 0)
2089                 rte_intr_enable(intr_handle);
2090
2091         i40evf_enable_queues_intr(dev);
2092
2093         return 0;
2094
2095 err_mac:
2096         i40evf_add_del_all_mac_addr(dev, FALSE);
2097         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2098                                 FALSE);
2099 err_queue:
2100         return -1;
2101 }
2102
2103 static void
2104 i40evf_dev_stop(struct rte_eth_dev *dev)
2105 {
2106         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2107         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2108         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2109         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2110
2111         PMD_INIT_FUNC_TRACE();
2112
2113         if (dev->data->dev_conf.intr_conf.rxq != 0)
2114                 rte_intr_disable(intr_handle);
2115
2116         if (hw->adapter_stopped == 1)
2117                 return;
2118         i40evf_stop_queues(dev);
2119         i40evf_disable_queues_intr(dev);
2120         i40e_dev_clear_queues(dev);
2121
2122         /* Clean datapath event and queue/vec mapping */
2123         rte_intr_efd_disable(intr_handle);
2124         if (intr_handle->intr_vec) {
2125                 rte_free(intr_handle->intr_vec);
2126                 intr_handle->intr_vec = NULL;
2127         }
2128         /* remove all mac addrs */
2129         i40evf_add_del_all_mac_addr(dev, FALSE);
2130         /* remove all multicast addresses */
2131         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2132                                 FALSE);
2133         hw->adapter_stopped = 1;
2134
2135 }
2136
2137 static int
2138 i40evf_dev_link_update(struct rte_eth_dev *dev,
2139                        __rte_unused int wait_to_complete)
2140 {
2141         struct rte_eth_link new_link;
2142         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2143         /*
2144          * DPDK pf host provide interfacet to acquire link status
2145          * while Linux driver does not
2146          */
2147
2148         memset(&new_link, 0, sizeof(new_link));
2149         /* Linux driver PF host */
2150         switch (vf->link_speed) {
2151         case I40E_LINK_SPEED_100MB:
2152                 new_link.link_speed = ETH_SPEED_NUM_100M;
2153                 break;
2154         case I40E_LINK_SPEED_1GB:
2155                 new_link.link_speed = ETH_SPEED_NUM_1G;
2156                 break;
2157         case I40E_LINK_SPEED_10GB:
2158                 new_link.link_speed = ETH_SPEED_NUM_10G;
2159                 break;
2160         case I40E_LINK_SPEED_20GB:
2161                 new_link.link_speed = ETH_SPEED_NUM_20G;
2162                 break;
2163         case I40E_LINK_SPEED_25GB:
2164                 new_link.link_speed = ETH_SPEED_NUM_25G;
2165                 break;
2166         case I40E_LINK_SPEED_40GB:
2167                 new_link.link_speed = ETH_SPEED_NUM_40G;
2168                 break;
2169         default:
2170                 new_link.link_speed = ETH_SPEED_NUM_NONE;
2171                 break;
2172         }
2173         /* full duplex only */
2174         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2175         new_link.link_status = vf->link_up &&
2176                                 new_link.link_speed != ETH_SPEED_NUM_NONE
2177                                 ? ETH_LINK_UP
2178                                 : ETH_LINK_DOWN;
2179         new_link.link_autoneg =
2180                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2181
2182         return rte_eth_linkstatus_set(dev, &new_link);
2183 }
2184
2185 static int
2186 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2187 {
2188         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2189         int ret;
2190
2191         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2192         if (ret == 0)
2193                 vf->promisc_unicast_enabled = TRUE;
2194         else if (ret == I40E_NOT_SUPPORTED)
2195                 ret = -ENOTSUP;
2196         else
2197                 ret = -EAGAIN;
2198
2199         return ret;
2200 }
2201
2202 static int
2203 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2204 {
2205         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2206         int ret;
2207
2208         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2209         if (ret == 0)
2210                 vf->promisc_unicast_enabled = FALSE;
2211         else if (ret == I40E_NOT_SUPPORTED)
2212                 ret = -ENOTSUP;
2213         else
2214                 ret = -EAGAIN;
2215
2216         return ret;
2217 }
2218
2219 static int
2220 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2221 {
2222         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2223         int ret;
2224
2225         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2226         if (ret == 0)
2227                 vf->promisc_multicast_enabled = TRUE;
2228         else if (ret == I40E_NOT_SUPPORTED)
2229                 ret = -ENOTSUP;
2230         else
2231                 ret = -EAGAIN;
2232
2233         return ret;
2234 }
2235
2236 static int
2237 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2238 {
2239         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2240         int ret;
2241
2242         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2243         if (ret == 0)
2244                 vf->promisc_multicast_enabled = FALSE;
2245         else if (ret == I40E_NOT_SUPPORTED)
2246                 ret = -ENOTSUP;
2247         else
2248                 ret = -EAGAIN;
2249
2250         return ret;
2251 }
2252
2253 static int
2254 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2255 {
2256         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2257
2258         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2259         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2260         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2261         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2262         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2263         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2264         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2265         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2266         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2267         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2268         dev_info->rx_queue_offload_capa = 0;
2269         dev_info->rx_offload_capa =
2270                 DEV_RX_OFFLOAD_VLAN_STRIP |
2271                 DEV_RX_OFFLOAD_QINQ_STRIP |
2272                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2273                 DEV_RX_OFFLOAD_UDP_CKSUM |
2274                 DEV_RX_OFFLOAD_TCP_CKSUM |
2275                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2276                 DEV_RX_OFFLOAD_SCATTER |
2277                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2278                 DEV_RX_OFFLOAD_VLAN_FILTER;
2279
2280         dev_info->tx_queue_offload_capa = 0;
2281         dev_info->tx_offload_capa =
2282                 DEV_TX_OFFLOAD_VLAN_INSERT |
2283                 DEV_TX_OFFLOAD_QINQ_INSERT |
2284                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2285                 DEV_TX_OFFLOAD_UDP_CKSUM |
2286                 DEV_TX_OFFLOAD_TCP_CKSUM |
2287                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2288                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2289                 DEV_TX_OFFLOAD_TCP_TSO |
2290                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2291                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2292                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2293                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2294                 DEV_TX_OFFLOAD_MULTI_SEGS;
2295
2296         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2297                 .rx_thresh = {
2298                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2299                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2300                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2301                 },
2302                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2303                 .rx_drop_en = 0,
2304                 .offloads = 0,
2305         };
2306
2307         dev_info->default_txconf = (struct rte_eth_txconf) {
2308                 .tx_thresh = {
2309                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2310                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2311                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2312                 },
2313                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2314                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2315                 .offloads = 0,
2316         };
2317
2318         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2319                 .nb_max = I40E_MAX_RING_DESC,
2320                 .nb_min = I40E_MIN_RING_DESC,
2321                 .nb_align = I40E_ALIGN_RING_DESC,
2322         };
2323
2324         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2325                 .nb_max = I40E_MAX_RING_DESC,
2326                 .nb_min = I40E_MIN_RING_DESC,
2327                 .nb_align = I40E_ALIGN_RING_DESC,
2328         };
2329
2330         return 0;
2331 }
2332
2333 static int
2334 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2335 {
2336         int ret;
2337         struct i40e_eth_stats *pstats = NULL;
2338         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2339         struct i40e_vsi *vsi = &vf->vsi;
2340
2341         ret = i40evf_query_stats(dev, &pstats);
2342         if (ret == 0) {
2343                 i40evf_update_stats(vsi, pstats);
2344
2345                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2346                                                 pstats->rx_broadcast;
2347                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2348                                                 pstats->tx_unicast;
2349                 stats->imissed = pstats->rx_discards;
2350                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2351                 stats->ibytes = pstats->rx_bytes;
2352                 stats->obytes = pstats->tx_bytes;
2353         } else {
2354                 PMD_DRV_LOG(ERR, "Get statistics failed");
2355         }
2356         return ret;
2357 }
2358
2359 static void
2360 i40evf_dev_close(struct rte_eth_dev *dev)
2361 {
2362         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2363         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2364
2365         i40evf_dev_stop(dev);
2366         i40e_dev_free_queues(dev);
2367         /*
2368          * disable promiscuous mode before reset vf
2369          * it is a workaround solution when work with kernel driver
2370          * and it is not the normal way
2371          */
2372         i40evf_dev_promiscuous_disable(dev);
2373         i40evf_dev_allmulticast_disable(dev);
2374         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2375
2376         i40evf_reset_vf(dev);
2377         i40e_shutdown_adminq(hw);
2378         i40evf_disable_irq0(hw);
2379
2380         dev->dev_ops = NULL;
2381         dev->rx_pkt_burst = NULL;
2382         dev->tx_pkt_burst = NULL;
2383
2384         rte_free(vf->vf_res);
2385         vf->vf_res = NULL;
2386         rte_free(vf->aq_resp);
2387         vf->aq_resp = NULL;
2388
2389         hw->adapter_closed = 1;
2390 }
2391
2392 /*
2393  * Reset VF device only to re-initialize resources in PMD layer
2394  */
2395 static int
2396 i40evf_dev_reset(struct rte_eth_dev *dev)
2397 {
2398         int ret;
2399
2400         ret = i40evf_dev_uninit(dev);
2401         if (ret)
2402                 return ret;
2403
2404         ret = i40evf_dev_init(dev);
2405
2406         return ret;
2407 }
2408
2409 static int
2410 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2411 {
2412         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2413         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2414         int ret;
2415
2416         if (!lut)
2417                 return -EINVAL;
2418
2419         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2420                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2421                                           lut, lut_size);
2422                 if (ret) {
2423                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2424                         return ret;
2425                 }
2426         } else {
2427                 uint32_t *lut_dw = (uint32_t *)lut;
2428                 uint16_t i, lut_size_dw = lut_size / 4;
2429
2430                 for (i = 0; i < lut_size_dw; i++)
2431                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2432         }
2433
2434         return 0;
2435 }
2436
2437 static int
2438 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2439 {
2440         struct i40e_vf *vf;
2441         struct i40e_hw *hw;
2442         int ret;
2443
2444         if (!vsi || !lut)
2445                 return -EINVAL;
2446
2447         vf = I40E_VSI_TO_VF(vsi);
2448         hw = I40E_VSI_TO_HW(vsi);
2449
2450         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2451                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2452                                           lut, lut_size);
2453                 if (ret) {
2454                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2455                         return ret;
2456                 }
2457         } else {
2458                 uint32_t *lut_dw = (uint32_t *)lut;
2459                 uint16_t i, lut_size_dw = lut_size / 4;
2460
2461                 for (i = 0; i < lut_size_dw; i++)
2462                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2463                 I40EVF_WRITE_FLUSH(hw);
2464         }
2465
2466         return 0;
2467 }
2468
2469 static int
2470 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2471                            struct rte_eth_rss_reta_entry64 *reta_conf,
2472                            uint16_t reta_size)
2473 {
2474         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2475         uint8_t *lut;
2476         uint16_t i, idx, shift;
2477         int ret;
2478
2479         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2480                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2481                         "(%d) doesn't match the number of hardware can "
2482                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2483                 return -EINVAL;
2484         }
2485
2486         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2487         if (!lut) {
2488                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2489                 return -ENOMEM;
2490         }
2491         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2492         if (ret)
2493                 goto out;
2494         for (i = 0; i < reta_size; i++) {
2495                 idx = i / RTE_RETA_GROUP_SIZE;
2496                 shift = i % RTE_RETA_GROUP_SIZE;
2497                 if (reta_conf[idx].mask & (1ULL << shift))
2498                         lut[i] = reta_conf[idx].reta[shift];
2499         }
2500         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2501
2502 out:
2503         rte_free(lut);
2504
2505         return ret;
2506 }
2507
2508 static int
2509 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2510                           struct rte_eth_rss_reta_entry64 *reta_conf,
2511                           uint16_t reta_size)
2512 {
2513         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2514         uint16_t i, idx, shift;
2515         uint8_t *lut;
2516         int ret;
2517
2518         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2519                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2520                         "(%d) doesn't match the number of hardware can "
2521                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2522                 return -EINVAL;
2523         }
2524
2525         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2526         if (!lut) {
2527                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2528                 return -ENOMEM;
2529         }
2530
2531         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2532         if (ret)
2533                 goto out;
2534         for (i = 0; i < reta_size; i++) {
2535                 idx = i / RTE_RETA_GROUP_SIZE;
2536                 shift = i % RTE_RETA_GROUP_SIZE;
2537                 if (reta_conf[idx].mask & (1ULL << shift))
2538                         reta_conf[idx].reta[shift] = lut[i];
2539         }
2540
2541 out:
2542         rte_free(lut);
2543
2544         return ret;
2545 }
2546
2547 static int
2548 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2549 {
2550         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2551         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2552         int ret = 0;
2553
2554         if (!key || key_len == 0) {
2555                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2556                 return 0;
2557         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2558                 sizeof(uint32_t)) {
2559                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2560                 return -EINVAL;
2561         }
2562
2563         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2564                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2565                         (struct i40e_aqc_get_set_rss_key_data *)key;
2566
2567                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2568                 if (ret)
2569                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2570                                      "via AQ");
2571         } else {
2572                 uint32_t *hash_key = (uint32_t *)key;
2573                 uint16_t i;
2574
2575                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2576                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2577                 I40EVF_WRITE_FLUSH(hw);
2578         }
2579
2580         return ret;
2581 }
2582
2583 static int
2584 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2585 {
2586         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2587         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2588         int ret;
2589
2590         if (!key || !key_len)
2591                 return -EINVAL;
2592
2593         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2594                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2595                         (struct i40e_aqc_get_set_rss_key_data *)key);
2596                 if (ret) {
2597                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2598                         return ret;
2599                 }
2600         } else {
2601                 uint32_t *key_dw = (uint32_t *)key;
2602                 uint16_t i;
2603
2604                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2605                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2606         }
2607         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2608
2609         return 0;
2610 }
2611
2612 static int
2613 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2614 {
2615         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2616         uint64_t hena;
2617         int ret;
2618
2619         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2620                                  rss_conf->rss_key_len);
2621         if (ret)
2622                 return ret;
2623
2624         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2625         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2626         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2627         I40EVF_WRITE_FLUSH(hw);
2628
2629         return 0;
2630 }
2631
2632 static void
2633 i40evf_disable_rss(struct i40e_vf *vf)
2634 {
2635         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2636
2637         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2638         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2639         I40EVF_WRITE_FLUSH(hw);
2640 }
2641
2642 static int
2643 i40evf_config_rss(struct i40e_vf *vf)
2644 {
2645         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2646         struct rte_eth_rss_conf rss_conf;
2647         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2648         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2649         uint16_t num;
2650         uint8_t *lut_info;
2651         int ret;
2652
2653         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2654                 i40evf_disable_rss(vf);
2655                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2656                 return 0;
2657         }
2658
2659         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2660         /* Fill out the look up table */
2661         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2662                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2663                         if (j >= num)
2664                                 j = 0;
2665                         lut = (lut << 8) | j;
2666                         if ((i & 3) == 3)
2667                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2668                 }
2669         } else {
2670                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2671                 if (!lut_info) {
2672                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2673                         return -ENOMEM;
2674                 }
2675
2676                 for (i = 0; i < rss_lut_size; i++)
2677                         lut_info[i] = i % vf->num_queue_pairs;
2678
2679                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2680                                          rss_lut_size);
2681                 rte_free(lut_info);
2682                 if (ret)
2683                         return ret;
2684         }
2685
2686         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2687         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2688                 i40evf_disable_rss(vf);
2689                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2690                 return 0;
2691         }
2692
2693         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2694                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2695                 /* Calculate the default hash key */
2696                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2697                         rss_key_default[i] = (uint32_t)rte_rand();
2698                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2699                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2700                         sizeof(uint32_t);
2701         }
2702
2703         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2704 }
2705
2706 static int
2707 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2708                            struct rte_eth_rss_conf *rss_conf)
2709 {
2710         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2711         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2712         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2713         uint64_t hena;
2714
2715         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2716         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2717
2718         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2719                 if (rss_hf != 0) /* Enable RSS */
2720                         return -EINVAL;
2721                 return 0;
2722         }
2723
2724         /* RSS enabled */
2725         if (rss_hf == 0) /* Disable RSS */
2726                 return -EINVAL;
2727
2728         return i40evf_hw_rss_hash_set(vf, rss_conf);
2729 }
2730
2731 static int
2732 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2733                              struct rte_eth_rss_conf *rss_conf)
2734 {
2735         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2736         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2737         uint64_t hena;
2738
2739         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2740                            &rss_conf->rss_key_len);
2741
2742         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2743         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2744         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2745
2746         return 0;
2747 }
2748
2749 static int
2750 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2751 {
2752         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2753         struct rte_eth_dev_data *dev_data = vf->dev_data;
2754         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2755         int ret = 0;
2756
2757         /* check if mtu is within the allowed range */
2758         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2759                 return -EINVAL;
2760
2761         /* mtu setting is forbidden if port is start */
2762         if (dev_data->dev_started) {
2763                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2764                             dev_data->port_id);
2765                 return -EBUSY;
2766         }
2767
2768         if (frame_size > RTE_ETHER_MAX_LEN)
2769                 dev_data->dev_conf.rxmode.offloads |=
2770                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2771         else
2772                 dev_data->dev_conf.rxmode.offloads &=
2773                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2774         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2775
2776         return ret;
2777 }
2778
2779 static int
2780 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2781                             struct rte_ether_addr *mac_addr)
2782 {
2783         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2784         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2785
2786         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2787                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2788                 return -EINVAL;
2789         }
2790
2791         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2792                 return -EPERM;
2793
2794         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2795
2796         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2797                 return -EIO;
2798
2799         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2800         return 0;
2801 }
2802
2803 static int
2804 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2805                         struct rte_ether_addr *mc_addrs,
2806                         uint32_t mc_addrs_num, bool add)
2807 {
2808         struct virtchnl_ether_addr_list *list;
2809         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2810         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2811                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2812         uint32_t i;
2813         int err;
2814         struct vf_cmd_info args;
2815
2816         if (mc_addrs == NULL || mc_addrs_num == 0)
2817                 return 0;
2818
2819         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2820                 return -EINVAL;
2821
2822         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2823         list->vsi_id = vf->vsi_res->vsi_id;
2824         list->num_elements = mc_addrs_num;
2825
2826         for (i = 0; i < mc_addrs_num; i++) {
2827                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2828                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2829                                     mc_addrs[i].addr_bytes[0],
2830                                     mc_addrs[i].addr_bytes[1],
2831                                     mc_addrs[i].addr_bytes[2],
2832                                     mc_addrs[i].addr_bytes[3],
2833                                     mc_addrs[i].addr_bytes[4],
2834                                     mc_addrs[i].addr_bytes[5]);
2835                         return -EINVAL;
2836                 }
2837
2838                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2839                         sizeof(list->list[i].addr));
2840         }
2841
2842         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2843         args.in_args = cmd_buffer;
2844         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2845                 i * sizeof(struct virtchnl_ether_addr);
2846         args.out_buffer = vf->aq_resp;
2847         args.out_size = I40E_AQ_BUF_SZ;
2848         err = i40evf_execute_vf_cmd(dev, &args);
2849         if (err) {
2850                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2851                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2852                 return err;
2853         }
2854
2855         return 0;
2856 }
2857
2858 static int
2859 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2860                         struct rte_ether_addr *mc_addrs,
2861                         uint32_t mc_addrs_num)
2862 {
2863         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2864         int err;
2865
2866         /* flush previous addresses */
2867         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2868                                 FALSE);
2869         if (err)
2870                 return err;
2871
2872         vf->mc_addrs_num = 0;
2873
2874         /* add new ones */
2875         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2876                                         TRUE);
2877         if (err)
2878                 return err;
2879
2880         vf->mc_addrs_num = mc_addrs_num;
2881         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2882
2883         return 0;
2884 }
2885
2886 bool
2887 is_i40evf_supported(struct rte_eth_dev *dev)
2888 {
2889         return is_device_supported(dev, &rte_i40evf_pmd);
2890 }