drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 struct i40evf_arq_msg_info {
  48         enum virtchnl_ops ops;
  49         enum i40e_status_code result;
  50         uint16_t buf_len;
  51         uint16_t msg_len;
  52         uint8_t *msg;
  53 };
  54
  55 struct vf_cmd_info {
  56         enum virtchnl_ops ops;
  57         uint8_t *in_args;
  58         uint32_t in_args_size;
  59         uint8_t *out_buffer;
  60         /* Input & output type. pass in buffer size and pass out
  61          * actual return result
  62          */
  63         uint32_t out_size;
  64 };
  65
  66 enum i40evf_aq_result {
  67         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  68         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  69         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  70         I40EVF_MSG_CMD,      /* Read async command result */
  71 };
  72
  73 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  74 static int i40evf_dev_start(struct rte_eth_dev *dev);
  75 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  76 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  77                                 struct rte_eth_dev_info *dev_info);
  78 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  79                                   int wait_to_complete);
  80 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  81                                 struct rte_eth_stats *stats);
  82 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  83                                  struct rte_eth_xstat *xstats, unsigned n);
  84 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  85                                        struct rte_eth_xstat_name *xstats_names,
  86                                        unsigned limit);
  87 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  88 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  89                                   uint16_t vlan_id, int on);
  90 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  91 static void i40evf_dev_close(struct rte_eth_dev *dev);
  92 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  93 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  94 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  95 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  97 static int i40evf_init_vlan(struct rte_eth_dev *dev);
  98 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
  99                                      uint16_t rx_queue_id);
 100 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 101                                     uint16_t rx_queue_id);
 102 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 103                                      uint16_t tx_queue_id);
 104 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 105                                     uint16_t tx_queue_id);
 106 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 107                                struct ether_addr *addr,
 108                                uint32_t index,
 109                                uint32_t pool);
 110 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 111 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 112                         struct rte_eth_rss_reta_entry64 *reta_conf,
 113                         uint16_t reta_size);
 114 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_config_rss(struct i40e_vf *vf);
 118 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 119                                       struct rte_eth_rss_conf *rss_conf);
 120 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 121                                         struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 123 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 124                                         struct ether_addr *mac_addr);
 125 static int
 126 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 127 static int
 128 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 130                                    uint8_t *msg,
 131                                    uint16_t msglen);
 132
 133 static int
 134 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 135                         struct ether_addr *mc_addr_set,
 136                         uint32_t nb_mc_addr, bool add);
 137 static int
 138 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
 139                         uint32_t nb_mc_addr);
 140
 141 /* Default hash key buffer for RSS */
 142 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 143
 144 struct rte_i40evf_xstats_name_off {
 145         char name[RTE_ETH_XSTATS_NAME_SIZE];
 146         unsigned offset;
 147 };
 148
 149 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 150         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 151         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 152         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 153         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 154         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 155         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 156                 rx_unknown_protocol)},
 157         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 158         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 159         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 160         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 161         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 162         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 163 };
 164
 165 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 166                 sizeof(rte_i40evf_stats_strings[0]))
 167
 168 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 169         .dev_configure        = i40evf_dev_configure,
 170         .dev_start            = i40evf_dev_start,
 171         .dev_stop             = i40evf_dev_stop,
 172         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 173         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 174         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 175         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 176         .link_update          = i40evf_dev_link_update,
 177         .stats_get            = i40evf_dev_stats_get,
 178         .stats_reset          = i40evf_dev_xstats_reset,
 179         .xstats_get           = i40evf_dev_xstats_get,
 180         .xstats_get_names     = i40evf_dev_xstats_get_names,
 181         .xstats_reset         = i40evf_dev_xstats_reset,
 182         .dev_close            = i40evf_dev_close,
 183         .dev_reset            = i40evf_dev_reset,
 184         .dev_infos_get        = i40evf_dev_info_get,
 185         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 186         .vlan_filter_set      = i40evf_vlan_filter_set,
 187         .vlan_offload_set     = i40evf_vlan_offload_set,
 188         .rx_queue_start       = i40evf_dev_rx_queue_start,
 189         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 190         .tx_queue_start       = i40evf_dev_tx_queue_start,
 191         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 192         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 193         .rx_queue_release     = i40e_dev_rx_queue_release,
 194         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 195         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 196         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 197         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 198         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 199         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 200         .tx_queue_release     = i40e_dev_tx_queue_release,
 201         .rx_queue_count       = i40e_dev_rx_queue_count,
 202         .rxq_info_get         = i40e_rxq_info_get,
 203         .txq_info_get         = i40e_txq_info_get,
 204         .mac_addr_add         = i40evf_add_mac_addr,
 205         .mac_addr_remove      = i40evf_del_mac_addr,
 206         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 207         .reta_update          = i40evf_dev_rss_reta_update,
 208         .reta_query           = i40evf_dev_rss_reta_query,
 209         .rss_hash_update      = i40evf_dev_rss_hash_update,
 210         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 211         .mtu_set              = i40evf_dev_mtu_set,
 212         .mac_addr_set         = i40evf_set_default_mac_addr,
 213 };
 214
 215 /*
 216  * Read data in admin queue to get msg from pf driver
 217  */
 218 static enum i40evf_aq_result
 219 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 220 {
 221         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 222         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 223         struct i40e_arq_event_info event;
 224         enum virtchnl_ops opcode;
 225         enum i40e_status_code retval;
 226         int ret;
 227         enum i40evf_aq_result result = I40EVF_MSG_NON;
 228
 229         event.buf_len = data->buf_len;
 230         event.msg_buf = data->msg;
 231         ret = i40e_clean_arq_element(hw, &event, NULL);
 232         /* Can't read any msg from adminQ */
 233         if (ret) {
 234                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 235                         result = I40EVF_MSG_ERR;
 236                 return result;
 237         }
 238
 239         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 240         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 241         /* pf sys event */
 242         if (opcode == VIRTCHNL_OP_EVENT) {
 243                 struct virtchnl_pf_event *vpe =
 244                         (struct virtchnl_pf_event *)event.msg_buf;
 245
 246                 result = I40EVF_MSG_SYS;
 247                 switch (vpe->event) {
 248                 case VIRTCHNL_EVENT_LINK_CHANGE:
 249                         vf->link_up =
 250                                 vpe->event_data.link_event.link_status;
 251                         vf->link_speed =
 252                                 vpe->event_data.link_event.link_speed;
 253                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 254                         PMD_DRV_LOG(INFO, "Link status update:%s",
 255                                     vf->link_up ? "up" : "down");
 256                         break;
 257                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 258                         vf->vf_reset = true;
 259                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 260                         PMD_DRV_LOG(INFO, "vf is reseting");
 261                         break;
 262                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 263                         vf->dev_closed = true;
 264                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 265                         PMD_DRV_LOG(INFO, "PF driver closed");
 266                         break;
 267                 default:
 268                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 269                                     __func__, vpe->event);
 270                 }
 271         } else {
 272                 /* async reply msg on command issued by vf previously */
 273                 result = I40EVF_MSG_CMD;
 274                 /* Actual data length read from PF */
 275                 data->msg_len = event.msg_len;
 276         }
 277
 278         data->result = retval;
 279         data->ops = opcode;
 280
 281         return result;
 282 }
 283
 284 /**
 285  * clear current command. Only call in case execute
 286  * _atomic_set_cmd successfully.
 287  */
 288 static inline void
 289 _clear_cmd(struct i40e_vf *vf)
 290 {
 291         rte_wmb();
 292         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 293 }
 294
 295 /*
 296  * Check there is pending cmd in execution. If none, set new command.
 297  */
 298 static inline int
 299 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 300 {
 301         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 302                         VIRTCHNL_OP_UNKNOWN, ops);
 303
 304         if (!ret)
 305                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 306
 307         return !ret;
 308 }
 309
 310 #define MAX_TRY_TIMES 200
 311 #define ASQ_DELAY_MS  10
 312
 313 static int
 314 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 315 {
 316         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 317         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 318         struct i40evf_arq_msg_info info;
 319         enum i40evf_aq_result ret;
 320         int err, i = 0;
 321
 322         if (_atomic_set_cmd(vf, args->ops))
 323                 return -1;
 324
 325         info.msg = args->out_buffer;
 326         info.buf_len = args->out_size;
 327         info.ops = VIRTCHNL_OP_UNKNOWN;
 328         info.result = I40E_SUCCESS;
 329
 330         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 331                      args->in_args, args->in_args_size, NULL);
 332         if (err) {
 333                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 334                 _clear_cmd(vf);
 335                 return err;
 336         }
 337
 338         switch (args->ops) {
 339         case VIRTCHNL_OP_RESET_VF:
 340                 /*no need to process in this function */
 341                 err = 0;
 342                 break;
 343         case VIRTCHNL_OP_VERSION:
 344         case VIRTCHNL_OP_GET_VF_RESOURCES:
 345                 /* for init adminq commands, need to poll the response */
 346                 err = -1;
 347                 do {
 348                         ret = i40evf_read_pfmsg(dev, &info);
 349                         vf->cmd_retval = info.result;
 350                         if (ret == I40EVF_MSG_CMD) {
 351                                 err = 0;
 352                                 break;
 353                         } else if (ret == I40EVF_MSG_ERR)
 354                                 break;
 355                         rte_delay_ms(ASQ_DELAY_MS);
 356                         /* If don't read msg or read sys event, continue */
 357                 } while (i++ < MAX_TRY_TIMES);
 358                 _clear_cmd(vf);
 359                 break;
 360
 361         default:
 362                 /* for other adminq in running time, waiting the cmd done flag */
 363                 err = -1;
 364                 do {
 365                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 366                                 err = 0;
 367                                 break;
 368                         }
 369                         rte_delay_ms(ASQ_DELAY_MS);
 370                         /* If don't read msg or read sys event, continue */
 371                 } while (i++ < MAX_TRY_TIMES);
 372                 /* If there's no response is received, clear command */
 373                 if (i >= MAX_TRY_TIMES) {
 374                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 375                         _clear_cmd(vf);
 376                 }
 377                 break;
 378         }
 379
 380         return err | vf->cmd_retval;
 381 }
 382
 383 /*
 384  * Check API version with sync wait until version read or fail from admin queue
 385  */
 386 static int
 387 i40evf_check_api_version(struct rte_eth_dev *dev)
 388 {
 389         struct virtchnl_version_info version, *pver;
 390         int err;
 391         struct vf_cmd_info args;
 392         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 393
 394         version.major = VIRTCHNL_VERSION_MAJOR;
 395         version.minor = VIRTCHNL_VERSION_MINOR;
 396
 397         args.ops = VIRTCHNL_OP_VERSION;
 398         args.in_args = (uint8_t *)&version;
 399         args.in_args_size = sizeof(version);
 400         args.out_buffer = vf->aq_resp;
 401         args.out_size = I40E_AQ_BUF_SZ;
 402
 403         err = i40evf_execute_vf_cmd(dev, &args);
 404         if (err) {
 405                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 406                 return err;
 407         }
 408
 409         pver = (struct virtchnl_version_info *)args.out_buffer;
 410         vf->version_major = pver->major;
 411         vf->version_minor = pver->minor;
 412         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 413                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 414                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 415         else {
 416                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 417                                         vf->version_major, vf->version_minor,
 418                                                 VIRTCHNL_VERSION_MAJOR,
 419                                                 VIRTCHNL_VERSION_MINOR);
 420                 return -1;
 421         }
 422
 423         return 0;
 424 }
 425
 426 static int
 427 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 428 {
 429         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 430         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 431         int err;
 432         struct vf_cmd_info args;
 433         uint32_t caps, len;
 434
 435         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 436         args.out_buffer = vf->aq_resp;
 437         args.out_size = I40E_AQ_BUF_SZ;
 438         if (PF_IS_V11(vf)) {
 439                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 440                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 441                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 442                        VIRTCHNL_VF_OFFLOAD_VLAN |
 443                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 444                 args.in_args = (uint8_t *)&caps;
 445                 args.in_args_size = sizeof(caps);
 446         } else {
 447                 args.in_args = NULL;
 448                 args.in_args_size = 0;
 449         }
 450         err = i40evf_execute_vf_cmd(dev, &args);
 451
 452         if (err) {
 453                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 454                 return err;
 455         }
 456
 457         len =  sizeof(struct virtchnl_vf_resource) +
 458                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 459
 460         rte_memcpy(vf->vf_res, args.out_buffer,
 461                         RTE_MIN(args.out_size, len));
 462         i40e_vf_parse_hw_config(hw, vf->vf_res);
 463
 464         return 0;
 465 }
 466
 467 static int
 468 i40evf_config_promisc(struct rte_eth_dev *dev,
 469                       bool enable_unicast,
 470                       bool enable_multicast)
 471 {
 472         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 473         int err;
 474         struct vf_cmd_info args;
 475         struct virtchnl_promisc_info promisc;
 476
 477         promisc.flags = 0;
 478         promisc.vsi_id = vf->vsi_res->vsi_id;
 479
 480         if (enable_unicast)
 481                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 482
 483         if (enable_multicast)
 484                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 485
 486         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 487         args.in_args = (uint8_t *)&promisc;
 488         args.in_args_size = sizeof(promisc);
 489         args.out_buffer = vf->aq_resp;
 490         args.out_size = I40E_AQ_BUF_SZ;
 491
 492         err = i40evf_execute_vf_cmd(dev, &args);
 493
 494         if (err)
 495                 PMD_DRV_LOG(ERR, "fail to execute command "
 496                             "CONFIG_PROMISCUOUS_MODE");
 497         return err;
 498 }
 499
 500 static int
 501 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 502 {
 503         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 504         struct vf_cmd_info args;
 505         int ret;
 506
 507         memset(&args, 0, sizeof(args));
 508         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 509         args.in_args = NULL;
 510         args.in_args_size = 0;
 511         args.out_buffer = vf->aq_resp;
 512         args.out_size = I40E_AQ_BUF_SZ;
 513         ret = i40evf_execute_vf_cmd(dev, &args);
 514         if (ret)
 515                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 516                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 517
 518         return ret;
 519 }
 520
 521 static int
 522 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 523 {
 524         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 525         struct vf_cmd_info args;
 526         int ret;
 527
 528         memset(&args, 0, sizeof(args));
 529         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 530         args.in_args = NULL;
 531         args.in_args_size = 0;
 532         args.out_buffer = vf->aq_resp;
 533         args.out_size = I40E_AQ_BUF_SZ;
 534         ret = i40evf_execute_vf_cmd(dev, &args);
 535         if (ret)
 536                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 537                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 538
 539         return ret;
 540 }
 541
 542 static void
 543 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 544                                   uint16_t vsi_id,
 545                                   uint16_t queue_id,
 546                                   uint16_t nb_txq,
 547                                   struct i40e_tx_queue *txq)
 548 {
 549         txq_info->vsi_id = vsi_id;
 550         txq_info->queue_id = queue_id;
 551         if (queue_id < nb_txq) {
 552                 txq_info->ring_len = txq->nb_tx_desc;
 553                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 554         }
 555 }
 556
 557 static void
 558 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 559                                   uint16_t vsi_id,
 560                                   uint16_t queue_id,
 561                                   uint16_t nb_rxq,
 562                                   uint32_t max_pkt_size,
 563                                   struct i40e_rx_queue *rxq)
 564 {
 565         rxq_info->vsi_id = vsi_id;
 566         rxq_info->queue_id = queue_id;
 567         rxq_info->max_pkt_size = max_pkt_size;
 568         if (queue_id < nb_rxq) {
 569                 rxq_info->ring_len = rxq->nb_rx_desc;
 570                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 571                 rxq_info->databuffer_size =
 572                         (rte_pktmbuf_data_room_size(rxq->mp) -
 573                                 RTE_PKTMBUF_HEADROOM);
 574         }
 575 }
 576
 577 static int
 578 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 579 {
 580         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 581         struct i40e_rx_queue **rxq =
 582                 (struct i40e_rx_queue **)dev->data->rx_queues;
 583         struct i40e_tx_queue **txq =
 584                 (struct i40e_tx_queue **)dev->data->tx_queues;
 585         struct virtchnl_vsi_queue_config_info *vc_vqci;
 586         struct virtchnl_queue_pair_info *vc_qpi;
 587         struct vf_cmd_info args;
 588         uint16_t i, nb_qp = vf->num_queue_pairs;
 589         const uint32_t size =
 590                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 591         uint8_t buff[size];
 592         int ret;
 593
 594         memset(buff, 0, sizeof(buff));
 595         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 596         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 597         vc_vqci->num_queue_pairs = nb_qp;
 598
 599         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 600                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 601                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 602                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 603                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 604                                         vf->max_pkt_len, rxq[i]);
 605         }
 606         memset(&args, 0, sizeof(args));
 607         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 608         args.in_args = (uint8_t *)vc_vqci;
 609         args.in_args_size = size;
 610         args.out_buffer = vf->aq_resp;
 611         args.out_size = I40E_AQ_BUF_SZ;
 612         ret = i40evf_execute_vf_cmd(dev, &args);
 613         if (ret)
 614                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 615                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 616
 617         return ret;
 618 }
 619
 620 static int
 621 i40evf_config_irq_map(struct rte_eth_dev *dev)
 622 {
 623         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 624         struct vf_cmd_info args;
 625         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 626                 sizeof(struct virtchnl_vector_map)];
 627         struct virtchnl_irq_map_info *map_info;
 628         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 629         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 630         uint32_t vector_id;
 631         int i, err;
 632
 633         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 634             rte_intr_allow_others(intr_handle))
 635                 vector_id = I40E_RX_VEC_START;
 636         else
 637                 vector_id = I40E_MISC_VEC_ID;
 638
 639         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 640         map_info->num_vectors = 1;
 641         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 642         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 643         /* Alway use default dynamic MSIX interrupt */
 644         map_info->vecmap[0].vector_id = vector_id;
 645         /* Don't map any tx queue */
 646         map_info->vecmap[0].txq_map = 0;
 647         map_info->vecmap[0].rxq_map = 0;
 648         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 649                 map_info->vecmap[0].rxq_map |= 1 << i;
 650                 if (rte_intr_dp_is_en(intr_handle))
 651                         intr_handle->intr_vec[i] = vector_id;
 652         }
 653
 654         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 655         args.in_args = (u8 *)cmd_buffer;
 656         args.in_args_size = sizeof(cmd_buffer);
 657         args.out_buffer = vf->aq_resp;
 658         args.out_size = I40E_AQ_BUF_SZ;
 659         err = i40evf_execute_vf_cmd(dev, &args);
 660         if (err)
 661                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 662
 663         return err;
 664 }
 665
 666 static int
 667 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 668                                 bool on)
 669 {
 670         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 671         struct virtchnl_queue_select queue_select;
 672         int err;
 673         struct vf_cmd_info args;
 674         memset(&queue_select, 0, sizeof(queue_select));
 675         queue_select.vsi_id = vf->vsi_res->vsi_id;
 676
 677         if (isrx)
 678                 queue_select.rx_queues |= 1 << qid;
 679         else
 680                 queue_select.tx_queues |= 1 << qid;
 681
 682         if (on)
 683                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 684         else
 685                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 686         args.in_args = (u8 *)&queue_select;
 687         args.in_args_size = sizeof(queue_select);
 688         args.out_buffer = vf->aq_resp;
 689         args.out_size = I40E_AQ_BUF_SZ;
 690         err = i40evf_execute_vf_cmd(dev, &args);
 691         if (err)
 692                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 693                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 694
 695         return err;
 696 }
 697
 698 static int
 699 i40evf_start_queues(struct rte_eth_dev *dev)
 700 {
 701         struct rte_eth_dev_data *dev_data = dev->data;
 702         int i;
 703         struct i40e_rx_queue *rxq;
 704         struct i40e_tx_queue *txq;
 705
 706         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 707                 rxq = dev_data->rx_queues[i];
 708                 if (rxq->rx_deferred_start)
 709                         continue;
 710                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 711                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 712                         return -1;
 713                 }
 714         }
 715
 716         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 717                 txq = dev_data->tx_queues[i];
 718                 if (txq->tx_deferred_start)
 719                         continue;
 720                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 721                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 722                         return -1;
 723                 }
 724         }
 725
 726         return 0;
 727 }
 728
 729 static int
 730 i40evf_stop_queues(struct rte_eth_dev *dev)
 731 {
 732         int i;
 733
 734         /* Stop TX queues first */
 735         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 736                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 737                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 738                         return -1;
 739                 }
 740         }
 741
 742         /* Then stop RX queues */
 743         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 744                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 745                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 746                         return -1;
 747                 }
 748         }
 749
 750         return 0;
 751 }
 752
 753 static int
 754 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 755                     struct ether_addr *addr,
 756                     __rte_unused uint32_t index,
 757                     __rte_unused uint32_t pool)
 758 {
 759         struct virtchnl_ether_addr_list *list;
 760         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 761         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 762                         sizeof(struct virtchnl_ether_addr)];
 763         int err;
 764         struct vf_cmd_info args;
 765
 766         if (is_zero_ether_addr(addr)) {
 767                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 768                             addr->addr_bytes[0], addr->addr_bytes[1],
 769                             addr->addr_bytes[2], addr->addr_bytes[3],
 770                             addr->addr_bytes[4], addr->addr_bytes[5]);
 771                 return I40E_ERR_INVALID_MAC_ADDR;
 772         }
 773
 774         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 775         list->vsi_id = vf->vsi_res->vsi_id;
 776         list->num_elements = 1;
 777         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 778                                         sizeof(addr->addr_bytes));
 779
 780         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 781         args.in_args = cmd_buffer;
 782         args.in_args_size = sizeof(cmd_buffer);
 783         args.out_buffer = vf->aq_resp;
 784         args.out_size = I40E_AQ_BUF_SZ;
 785         err = i40evf_execute_vf_cmd(dev, &args);
 786         if (err)
 787                 PMD_DRV_LOG(ERR, "fail to execute command "
 788                             "OP_ADD_ETHER_ADDRESS");
 789         else
 790                 vf->vsi.mac_num++;
 791
 792         return err;
 793 }
 794
 795 static void
 796 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 797                             struct ether_addr *addr)
 798 {
 799         struct virtchnl_ether_addr_list *list;
 800         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 801         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 802                         sizeof(struct virtchnl_ether_addr)];
 803         int err;
 804         struct vf_cmd_info args;
 805
 806         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 807                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 808                             addr->addr_bytes[0], addr->addr_bytes[1],
 809                             addr->addr_bytes[2], addr->addr_bytes[3],
 810                             addr->addr_bytes[4], addr->addr_bytes[5]);
 811                 return;
 812         }
 813
 814         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 815         list->vsi_id = vf->vsi_res->vsi_id;
 816         list->num_elements = 1;
 817         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 818                         sizeof(addr->addr_bytes));
 819
 820         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 821         args.in_args = cmd_buffer;
 822         args.in_args_size = sizeof(cmd_buffer);
 823         args.out_buffer = vf->aq_resp;
 824         args.out_size = I40E_AQ_BUF_SZ;
 825         err = i40evf_execute_vf_cmd(dev, &args);
 826         if (err)
 827                 PMD_DRV_LOG(ERR, "fail to execute command "
 828                             "OP_DEL_ETHER_ADDRESS");
 829         else
 830                 vf->vsi.mac_num--;
 831         return;
 832 }
 833
 834 static void
 835 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 836 {
 837         struct rte_eth_dev_data *data = dev->data;
 838         struct ether_addr *addr;
 839
 840         addr = &data->mac_addrs[index];
 841
 842         i40evf_del_mac_addr_by_addr(dev, addr);
 843 }
 844
 845 static int
 846 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 847 {
 848         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 849         struct virtchnl_queue_select q_stats;
 850         int err;
 851         struct vf_cmd_info args;
 852
 853         memset(&q_stats, 0, sizeof(q_stats));
 854         q_stats.vsi_id = vf->vsi_res->vsi_id;
 855         args.ops = VIRTCHNL_OP_GET_STATS;
 856         args.in_args = (u8 *)&q_stats;
 857         args.in_args_size = sizeof(q_stats);
 858         args.out_buffer = vf->aq_resp;
 859         args.out_size = I40E_AQ_BUF_SZ;
 860
 861         err = i40evf_execute_vf_cmd(dev, &args);
 862         if (err) {
 863                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 864                 *pstats = NULL;
 865                 return err;
 866         }
 867         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 868         return 0;
 869 }
 870
 871 static void
 872 i40evf_stat_update_48(uint64_t *offset,
 873                    uint64_t *stat)
 874 {
 875         if (*stat >= *offset)
 876                 *stat = *stat - *offset;
 877         else
 878                 *stat = (uint64_t)((*stat +
 879                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 880
 881         *stat &= I40E_48_BIT_MASK;
 882 }
 883
 884 static void
 885 i40evf_stat_update_32(uint64_t *offset,
 886                    uint64_t *stat)
 887 {
 888         if (*stat >= *offset)
 889                 *stat = (uint64_t)(*stat - *offset);
 890         else
 891                 *stat = (uint64_t)((*stat +
 892                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 893 }
 894
 895 static void
 896 i40evf_update_stats(struct i40e_vsi *vsi,
 897                                         struct i40e_eth_stats *nes)
 898 {
 899         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 900
 901         i40evf_stat_update_48(&oes->rx_bytes,
 902                             &nes->rx_bytes);
 903         i40evf_stat_update_48(&oes->rx_unicast,
 904                             &nes->rx_unicast);
 905         i40evf_stat_update_48(&oes->rx_multicast,
 906                             &nes->rx_multicast);
 907         i40evf_stat_update_48(&oes->rx_broadcast,
 908                             &nes->rx_broadcast);
 909         i40evf_stat_update_32(&oes->rx_discards,
 910                                 &nes->rx_discards);
 911         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 912                             &nes->rx_unknown_protocol);
 913         i40evf_stat_update_48(&oes->tx_bytes,
 914                             &nes->tx_bytes);
 915         i40evf_stat_update_48(&oes->tx_unicast,
 916                             &nes->tx_unicast);
 917         i40evf_stat_update_48(&oes->tx_multicast,
 918                             &nes->tx_multicast);
 919         i40evf_stat_update_48(&oes->tx_broadcast,
 920                             &nes->tx_broadcast);
 921         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 922         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 923 }
 924
 925 static void
 926 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 927 {
 928         int ret;
 929         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 930         struct i40e_eth_stats *pstats = NULL;
 931
 932         /* read stat values to clear hardware registers */
 933         ret = i40evf_query_stats(dev, &pstats);
 934
 935         /* set stats offset base on current values */
 936         if (ret == 0)
 937                 vf->vsi.eth_stats_offset = *pstats;
 938 }
 939
 940 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 941                                       struct rte_eth_xstat_name *xstats_names,
 942                                       __rte_unused unsigned limit)
 943 {
 944         unsigned i;
 945
 946         if (xstats_names != NULL)
 947                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 948                         snprintf(xstats_names[i].name,
 949                                 sizeof(xstats_names[i].name),
 950                                 "%s", rte_i40evf_stats_strings[i].name);
 951                 }
 952         return I40EVF_NB_XSTATS;
 953 }
 954
 955 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 956                                  struct rte_eth_xstat *xstats, unsigned n)
 957 {
 958         int ret;
 959         unsigned i;
 960         struct i40e_eth_stats *pstats = NULL;
 961         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 962         struct i40e_vsi *vsi = &vf->vsi;
 963
 964         if (n < I40EVF_NB_XSTATS)
 965                 return I40EVF_NB_XSTATS;
 966
 967         ret = i40evf_query_stats(dev, &pstats);
 968         if (ret != 0)
 969                 return 0;
 970
 971         if (!xstats)
 972                 return 0;
 973
 974         i40evf_update_stats(vsi, pstats);
 975
 976         /* loop over xstats array and values from pstats */
 977         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 978                 xstats[i].id = i;
 979                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
 980                         rte_i40evf_stats_strings[i].offset);
 981         }
 982
 983         return I40EVF_NB_XSTATS;
 984 }
 985
 986 static int
 987 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 988 {
 989         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 990         struct virtchnl_vlan_filter_list *vlan_list;
 991         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
 992                                                         sizeof(uint16_t)];
 993         int err;
 994         struct vf_cmd_info args;
 995
 996         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
 997         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 998         vlan_list->num_elements = 1;
 999         vlan_list->vlan_id[0] = vlanid;
1000
1001         args.ops = VIRTCHNL_OP_ADD_VLAN;
1002         args.in_args = (u8 *)&cmd_buffer;
1003         args.in_args_size = sizeof(cmd_buffer);
1004         args.out_buffer = vf->aq_resp;
1005         args.out_size = I40E_AQ_BUF_SZ;
1006         err = i40evf_execute_vf_cmd(dev, &args);
1007         if (err)
1008                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1009
1010         return err;
1011 }
1012
1013 static int
1014 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1015 {
1016         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1017         struct virtchnl_vlan_filter_list *vlan_list;
1018         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1019                                                         sizeof(uint16_t)];
1020         int err;
1021         struct vf_cmd_info args;
1022
1023         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1024         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1025         vlan_list->num_elements = 1;
1026         vlan_list->vlan_id[0] = vlanid;
1027
1028         args.ops = VIRTCHNL_OP_DEL_VLAN;
1029         args.in_args = (u8 *)&cmd_buffer;
1030         args.in_args_size = sizeof(cmd_buffer);
1031         args.out_buffer = vf->aq_resp;
1032         args.out_size = I40E_AQ_BUF_SZ;
1033         err = i40evf_execute_vf_cmd(dev, &args);
1034         if (err)
1035                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1036
1037         return err;
1038 }
1039
1040 static const struct rte_pci_id pci_id_i40evf_map[] = {
1041         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1042         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1043         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1044         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1045         { .vendor_id = 0, /* sentinel */ },
1046 };
1047
1048 /* Disable IRQ0 */
1049 static inline void
1050 i40evf_disable_irq0(struct i40e_hw *hw)
1051 {
1052         /* Disable all interrupt types */
1053         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1054         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1055                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1056         I40EVF_WRITE_FLUSH(hw);
1057 }
1058
1059 /* Enable IRQ0 */
1060 static inline void
1061 i40evf_enable_irq0(struct i40e_hw *hw)
1062 {
1063         /* Enable admin queue interrupt trigger */
1064         uint32_t val;
1065
1066         i40evf_disable_irq0(hw);
1067         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1068         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1069                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1070         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1071
1072         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1073                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1074                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1075                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1076
1077         I40EVF_WRITE_FLUSH(hw);
1078 }
1079
1080 static int
1081 i40evf_check_vf_reset_done(struct i40e_hw *hw)
1082 {
1083         int i, reset;
1084
1085         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1086                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1087                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1088                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1089                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1090                     reset == VIRTCHNL_VFR_COMPLETED)
1091                         break;
1092                 rte_delay_ms(50);
1093         }
1094
1095         if (i >= MAX_RESET_WAIT_CNT)
1096                 return -1;
1097
1098         return 0;
1099 }
1100 static int
1101 i40evf_reset_vf(struct i40e_hw *hw)
1102 {
1103         int ret;
1104
1105         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1106                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1107                 return -1;
1108         }
1109         /**
1110           * After issuing vf reset command to pf, pf won't necessarily
1111           * reset vf, it depends on what state it exactly is. If it's not
1112           * initialized yet, it won't have vf reset since it's in a certain
1113           * state. If not, it will try to reset. Even vf is reset, pf will
1114           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1115           * it to ACTIVE. In this duration, vf may not catch the moment that
1116           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1117           */
1118         rte_delay_ms(200);
1119
1120         ret = i40evf_check_vf_reset_done(hw);
1121         if (ret) {
1122                 PMD_INIT_LOG(ERR, "VF is still resetting");
1123                 return ret;
1124         }
1125
1126         return 0;
1127 }
1128
1129 static int
1130 i40evf_init_vf(struct rte_eth_dev *dev)
1131 {
1132         int i, err, bufsz;
1133         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1134         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1135         uint16_t interval =
1136                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0, 0);
1137
1138         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1139         vf->dev_data = dev->data;
1140         err = i40e_set_mac_type(hw);
1141         if (err) {
1142                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1143                 goto err;
1144         }
1145
1146         err = i40evf_check_vf_reset_done(hw);
1147         if (err)
1148                 goto err;
1149
1150         i40e_init_adminq_parameter(hw);
1151         err = i40e_init_adminq(hw);
1152         if (err) {
1153                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1154                 goto err;
1155         }
1156
1157         /* Reset VF and wait until it's complete */
1158         if (i40evf_reset_vf(hw)) {
1159                 PMD_INIT_LOG(ERR, "reset NIC failed");
1160                 goto err_aq;
1161         }
1162
1163         /* VF reset, shutdown admin queue and initialize again */
1164         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1165                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1166                 goto err;
1167         }
1168
1169         i40e_init_adminq_parameter(hw);
1170         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1171                 PMD_INIT_LOG(ERR, "init_adminq failed");
1172                 goto err;
1173         }
1174
1175         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1176         if (!vf->aq_resp) {
1177                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1178                 goto err_aq;
1179         }
1180         if (i40evf_check_api_version(dev) != 0) {
1181                 PMD_INIT_LOG(ERR, "check_api version failed");
1182                 goto err_api;
1183         }
1184         bufsz = sizeof(struct virtchnl_vf_resource) +
1185                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1186         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1187         if (!vf->vf_res) {
1188                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1189                 goto err_api;
1190         }
1191
1192         if (i40evf_get_vf_resource(dev) != 0) {
1193                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1194                 goto err_alloc;
1195         }
1196
1197         /* got VF config message back from PF, now we can parse it */
1198         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1199                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1200                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1201         }
1202
1203         if (!vf->vsi_res) {
1204                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1205                 goto err_alloc;
1206         }
1207
1208         if (hw->mac.type == I40E_MAC_X722_VF)
1209                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1210         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1211
1212         switch (vf->vsi_res->vsi_type) {
1213         case VIRTCHNL_VSI_SRIOV:
1214                 vf->vsi.type = I40E_VSI_SRIOV;
1215                 break;
1216         default:
1217                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1218                 break;
1219         }
1220         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1221         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1222
1223         /* Store the MAC address configured by host, or generate random one */
1224         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1225                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1226         else
1227                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1228
1229         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1230                        (I40E_ITR_INDEX_DEFAULT <<
1231                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1232                        (interval <<
1233                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1234         I40EVF_WRITE_FLUSH(hw);
1235
1236         return 0;
1237
1238 err_alloc:
1239         rte_free(vf->vf_res);
1240         vf->vsi_res = NULL;
1241 err_api:
1242         rte_free(vf->aq_resp);
1243 err_aq:
1244         i40e_shutdown_adminq(hw); /* ignore error */
1245 err:
1246         return -1;
1247 }
1248
1249 static int
1250 i40evf_uninit_vf(struct rte_eth_dev *dev)
1251 {
1252         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1253         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1254
1255         PMD_INIT_FUNC_TRACE();
1256
1257         if (hw->adapter_stopped == 0)
1258                 i40evf_dev_close(dev);
1259         rte_free(vf->vf_res);
1260         vf->vf_res = NULL;
1261         rte_free(vf->aq_resp);
1262         vf->aq_resp = NULL;
1263
1264         return 0;
1265 }
1266
1267 static void
1268 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1269                 __rte_unused uint16_t msglen)
1270 {
1271         struct virtchnl_pf_event *pf_msg =
1272                         (struct virtchnl_pf_event *)msg;
1273         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1274
1275         switch (pf_msg->event) {
1276         case VIRTCHNL_EVENT_RESET_IMPENDING:
1277                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1278                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1279                                               NULL);
1280                 break;
1281         case VIRTCHNL_EVENT_LINK_CHANGE:
1282                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1283                 vf->link_up = pf_msg->event_data.link_event.link_status;
1284                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1285                 break;
1286         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1287                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1288                 break;
1289         default:
1290                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1291                 break;
1292         }
1293 }
1294
1295 static void
1296 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1297 {
1298         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1299         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1300         struct i40e_arq_event_info info;
1301         uint16_t pending, aq_opc;
1302         enum virtchnl_ops msg_opc;
1303         enum i40e_status_code msg_ret;
1304         int ret;
1305
1306         info.buf_len = I40E_AQ_BUF_SZ;
1307         if (!vf->aq_resp) {
1308                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1309                 return;
1310         }
1311         info.msg_buf = vf->aq_resp;
1312
1313         pending = 1;
1314         while (pending) {
1315                 ret = i40e_clean_arq_element(hw, &info, &pending);
1316
1317                 if (ret != I40E_SUCCESS) {
1318                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1319                                     "ret: %d", ret);
1320                         break;
1321                 }
1322                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1323                 /* For the message sent from pf to vf, opcode is stored in
1324                  * cookie_high of struct i40e_aq_desc, while return error code
1325                  * are stored in cookie_low, Which is done by
1326                  * i40e_aq_send_msg_to_vf in PF driver.*/
1327                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1328                                                   info.desc.cookie_high);
1329                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1330                                                   info.desc.cookie_low);
1331                 switch (aq_opc) {
1332                 case i40e_aqc_opc_send_msg_to_vf:
1333                         if (msg_opc == VIRTCHNL_OP_EVENT)
1334                                 /* process event*/
1335                                 i40evf_handle_pf_event(dev, info.msg_buf,
1336                                                        info.msg_len);
1337                         else {
1338                                 /* read message and it's expected one */
1339                                 if (msg_opc == vf->pend_cmd) {
1340                                         vf->cmd_retval = msg_ret;
1341                                         /* prevent compiler reordering */
1342                                         rte_compiler_barrier();
1343                                         _clear_cmd(vf);
1344                                 } else
1345                                         PMD_DRV_LOG(ERR, "command mismatch,"
1346                                                 "expect %u, get %u",
1347                                                 vf->pend_cmd, msg_opc);
1348                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1349                                              " opcode = %d", msg_opc);
1350                         }
1351                         break;
1352                 default:
1353                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1354                                     aq_opc);
1355                         break;
1356                 }
1357         }
1358 }
1359
1360 /**
1361  * Interrupt handler triggered by NIC  for handling
1362  * specific interrupt. Only adminq interrupt is processed in VF.
1363  *
1364  * @param handle
1365  *  Pointer to interrupt handle.
1366  * @param param
1367  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1368  *
1369  * @return
1370  *  void
1371  */
1372 static void
1373 i40evf_dev_interrupt_handler(void *param)
1374 {
1375         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1376         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1377         uint32_t icr0;
1378
1379         i40evf_disable_irq0(hw);
1380
1381         /* read out interrupt causes */
1382         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1383
1384         /* No interrupt event indicated */
1385         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1386                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1387                 goto done;
1388         }
1389
1390         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1391                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1392                 i40evf_handle_aq_msg(dev);
1393         }
1394
1395         /* Link Status Change interrupt */
1396         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1397                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1398                                    " do nothing");
1399
1400 done:
1401         i40evf_enable_irq0(hw);
1402 }
1403
1404 static int
1405 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1406 {
1407         struct i40e_hw *hw
1408                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1409         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1410
1411         PMD_INIT_FUNC_TRACE();
1412
1413         /* assign ops func pointer */
1414         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1415         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1416         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1417
1418         /*
1419          * For secondary processes, we don't initialise any further as primary
1420          * has already done this work.
1421          */
1422         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1423                 i40e_set_rx_function(eth_dev);
1424                 i40e_set_tx_function(eth_dev);
1425                 return 0;
1426         }
1427         i40e_set_default_ptype_table(eth_dev);
1428         i40e_set_default_pctype_table(eth_dev);
1429         rte_eth_copy_pci_info(eth_dev, pci_dev);
1430
1431         hw->vendor_id = pci_dev->id.vendor_id;
1432         hw->device_id = pci_dev->id.device_id;
1433         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1434         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1435         hw->bus.device = pci_dev->addr.devid;
1436         hw->bus.func = pci_dev->addr.function;
1437         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1438         hw->adapter_stopped = 0;
1439
1440         if(i40evf_init_vf(eth_dev) != 0) {
1441                 PMD_INIT_LOG(ERR, "Init vf failed");
1442                 return -1;
1443         }
1444
1445         /* register callback func to eal lib */
1446         rte_intr_callback_register(&pci_dev->intr_handle,
1447                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1448
1449         /* enable uio intr after callback register */
1450         rte_intr_enable(&pci_dev->intr_handle);
1451
1452         /* configure and enable device interrupt */
1453         i40evf_enable_irq0(hw);
1454
1455         /* copy mac addr */
1456         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1457                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1458                                         0);
1459         if (eth_dev->data->mac_addrs == NULL) {
1460                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1461                                 " store MAC addresses",
1462                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1463                 return -ENOMEM;
1464         }
1465         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1466                         &eth_dev->data->mac_addrs[0]);
1467
1468         return 0;
1469 }
1470
1471 static int
1472 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1473 {
1474         PMD_INIT_FUNC_TRACE();
1475
1476         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1477                 return -EPERM;
1478
1479         eth_dev->dev_ops = NULL;
1480         eth_dev->rx_pkt_burst = NULL;
1481         eth_dev->tx_pkt_burst = NULL;
1482
1483         if (i40evf_uninit_vf(eth_dev) != 0) {
1484                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1485                 return -1;
1486         }
1487
1488         rte_free(eth_dev->data->mac_addrs);
1489         eth_dev->data->mac_addrs = NULL;
1490
1491         return 0;
1492 }
1493
1494 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1495         struct rte_pci_device *pci_dev)
1496 {
1497         return rte_eth_dev_pci_generic_probe(pci_dev,
1498                 sizeof(struct i40e_adapter), i40evf_dev_init);
1499 }
1500
1501 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1502 {
1503         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1504 }
1505
1506 /*
1507  * virtual function driver struct
1508  */
1509 static struct rte_pci_driver rte_i40evf_pmd = {
1510         .id_table = pci_id_i40evf_map,
1511         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1512         .probe = eth_i40evf_pci_probe,
1513         .remove = eth_i40evf_pci_remove,
1514 };
1515
1516 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1517 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1518 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1519
1520 static int
1521 i40evf_dev_configure(struct rte_eth_dev *dev)
1522 {
1523         struct i40e_adapter *ad =
1524                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1525         struct rte_eth_conf *conf = &dev->data->dev_conf;
1526         struct i40e_vf *vf;
1527
1528         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1529          * allocation or vector Rx preconditions we will reset it.
1530          */
1531         ad->rx_bulk_alloc_allowed = true;
1532         ad->rx_vec_allowed = true;
1533         ad->tx_simple_allowed = true;
1534         ad->tx_vec_allowed = true;
1535
1536         /* For non-DPDK PF drivers, VF has no ability to disable HW
1537          * CRC strip, and is implicitly enabled by the PF.
1538          */
1539         if (!conf->rxmode.hw_strip_crc) {
1540                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1541                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1542                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1543                         /* Peer is running non-DPDK PF driver. */
1544                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1545                         return -EINVAL;
1546                 }
1547         }
1548
1549         return i40evf_init_vlan(dev);
1550 }
1551
1552 static int
1553 i40evf_init_vlan(struct rte_eth_dev *dev)
1554 {
1555         /* Apply vlan offload setting */
1556         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1557
1558         return 0;
1559 }
1560
1561 static int
1562 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1563 {
1564         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1565         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1566
1567         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1568                 return -ENOTSUP;
1569
1570         /* Vlan stripping setting */
1571         if (mask & ETH_VLAN_STRIP_MASK) {
1572                 /* Enable or disable VLAN stripping */
1573                 if (dev_conf->rxmode.hw_vlan_strip)
1574                         i40evf_enable_vlan_strip(dev);
1575                 else
1576                         i40evf_disable_vlan_strip(dev);
1577         }
1578
1579         return 0;
1580 }
1581
1582 static int
1583 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1584 {
1585         struct i40e_rx_queue *rxq;
1586         int err = 0;
1587         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1588
1589         PMD_INIT_FUNC_TRACE();
1590
1591         if (rx_queue_id < dev->data->nb_rx_queues) {
1592                 rxq = dev->data->rx_queues[rx_queue_id];
1593
1594                 err = i40e_alloc_rx_queue_mbufs(rxq);
1595                 if (err) {
1596                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1597                         return err;
1598                 }
1599
1600                 rte_wmb();
1601
1602                 /* Init the RX tail register. */
1603                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1604                 I40EVF_WRITE_FLUSH(hw);
1605
1606                 /* Ready to switch the queue on */
1607                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1608
1609                 if (err)
1610                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1611                                     rx_queue_id);
1612                 else
1613                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1614         }
1615
1616         return err;
1617 }
1618
1619 static int
1620 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1621 {
1622         struct i40e_rx_queue *rxq;
1623         int err;
1624
1625         if (rx_queue_id < dev->data->nb_rx_queues) {
1626                 rxq = dev->data->rx_queues[rx_queue_id];
1627
1628                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1629
1630                 if (err) {
1631                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1632                                     rx_queue_id);
1633                         return err;
1634                 }
1635
1636                 i40e_rx_queue_release_mbufs(rxq);
1637                 i40e_reset_rx_queue(rxq);
1638                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1639         }
1640
1641         return 0;
1642 }
1643
1644 static int
1645 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1646 {
1647         int err = 0;
1648
1649         PMD_INIT_FUNC_TRACE();
1650
1651         if (tx_queue_id < dev->data->nb_tx_queues) {
1652
1653                 /* Ready to switch the queue on */
1654                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1655
1656                 if (err)
1657                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1658                                     tx_queue_id);
1659                 else
1660                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1661         }
1662
1663         return err;
1664 }
1665
1666 static int
1667 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1668 {
1669         struct i40e_tx_queue *txq;
1670         int err;
1671
1672         if (tx_queue_id < dev->data->nb_tx_queues) {
1673                 txq = dev->data->tx_queues[tx_queue_id];
1674
1675                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1676
1677                 if (err) {
1678                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1679                                     tx_queue_id);
1680                         return err;
1681                 }
1682
1683                 i40e_tx_queue_release_mbufs(txq);
1684                 i40e_reset_tx_queue(txq);
1685                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1686         }
1687
1688         return 0;
1689 }
1690
1691 static int
1692 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1693 {
1694         int ret;
1695
1696         if (on)
1697                 ret = i40evf_add_vlan(dev, vlan_id);
1698         else
1699                 ret = i40evf_del_vlan(dev,vlan_id);
1700
1701         return ret;
1702 }
1703
1704 static int
1705 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1706 {
1707         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1708         struct rte_eth_dev_data *dev_data = dev->data;
1709         struct rte_pktmbuf_pool_private *mbp_priv;
1710         uint16_t buf_size, len;
1711
1712         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1713         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1714         I40EVF_WRITE_FLUSH(hw);
1715
1716         /* Calculate the maximum packet length allowed */
1717         mbp_priv = rte_mempool_get_priv(rxq->mp);
1718         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1719                                         RTE_PKTMBUF_HEADROOM);
1720         rxq->hs_mode = i40e_header_split_none;
1721         rxq->rx_hdr_len = 0;
1722         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1723         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1724         rxq->max_pkt_len = RTE_MIN(len,
1725                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1726
1727         /**
1728          * Check if the jumbo frame and maximum packet length are set correctly
1729          */
1730         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1731                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1732                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1733                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1734                                 "larger than %u and smaller than %u, as jumbo "
1735                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1736                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1737                         return I40E_ERR_CONFIG;
1738                 }
1739         } else {
1740                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1741                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1742                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1743                                 "larger than %u and smaller than %u, as jumbo "
1744                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1745                                                 (uint32_t)ETHER_MAX_LEN);
1746                         return I40E_ERR_CONFIG;
1747                 }
1748         }
1749
1750         if (dev_data->dev_conf.rxmode.enable_scatter ||
1751             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1752                 dev_data->scattered_rx = 1;
1753         }
1754
1755         return 0;
1756 }
1757
1758 static int
1759 i40evf_rx_init(struct rte_eth_dev *dev)
1760 {
1761         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1762         uint16_t i;
1763         int ret = I40E_SUCCESS;
1764         struct i40e_rx_queue **rxq =
1765                 (struct i40e_rx_queue **)dev->data->rx_queues;
1766
1767         i40evf_config_rss(vf);
1768         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1769                 if (!rxq[i] || !rxq[i]->q_set)
1770                         continue;
1771                 ret = i40evf_rxq_init(dev, rxq[i]);
1772                 if (ret != I40E_SUCCESS)
1773                         break;
1774         }
1775         if (ret == I40E_SUCCESS)
1776                 i40e_set_rx_function(dev);
1777
1778         return ret;
1779 }
1780
1781 static void
1782 i40evf_tx_init(struct rte_eth_dev *dev)
1783 {
1784         uint16_t i;
1785         struct i40e_tx_queue **txq =
1786                 (struct i40e_tx_queue **)dev->data->tx_queues;
1787         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1788
1789         for (i = 0; i < dev->data->nb_tx_queues; i++)
1790                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1791
1792         i40e_set_tx_function(dev);
1793 }
1794
1795 static inline void
1796 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1797 {
1798         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1799         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1800         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1801
1802         if (!rte_intr_allow_others(intr_handle)) {
1803                 I40E_WRITE_REG(hw,
1804                                I40E_VFINT_DYN_CTL01,
1805                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1806                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1807                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1808                 I40EVF_WRITE_FLUSH(hw);
1809                 return;
1810         }
1811
1812         I40EVF_WRITE_FLUSH(hw);
1813 }
1814
1815 static inline void
1816 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1817 {
1818         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1819         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1820         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1821
1822         if (!rte_intr_allow_others(intr_handle)) {
1823                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1824                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1825                 I40EVF_WRITE_FLUSH(hw);
1826                 return;
1827         }
1828
1829         I40EVF_WRITE_FLUSH(hw);
1830 }
1831
1832 static int
1833 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1834 {
1835         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1836         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1837         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1838         uint16_t interval =
1839                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0, 0);
1840         uint16_t msix_intr;
1841
1842         msix_intr = intr_handle->intr_vec[queue_id];
1843         if (msix_intr == I40E_MISC_VEC_ID)
1844                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1845                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1846                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1847                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1848                                (interval <<
1849                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1850         else
1851                 I40E_WRITE_REG(hw,
1852                                I40E_VFINT_DYN_CTLN1(msix_intr -
1853                                                     I40E_RX_VEC_START),
1854                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1855                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1856                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1857                                (interval <<
1858                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1859
1860         I40EVF_WRITE_FLUSH(hw);
1861
1862         rte_intr_enable(&pci_dev->intr_handle);
1863
1864         return 0;
1865 }
1866
1867 static int
1868 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1869 {
1870         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1871         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1872         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1873         uint16_t msix_intr;
1874
1875         msix_intr = intr_handle->intr_vec[queue_id];
1876         if (msix_intr == I40E_MISC_VEC_ID)
1877                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1878         else
1879                 I40E_WRITE_REG(hw,
1880                                I40E_VFINT_DYN_CTLN1(msix_intr -
1881                                                     I40E_RX_VEC_START),
1882                                0);
1883
1884         I40EVF_WRITE_FLUSH(hw);
1885
1886         return 0;
1887 }
1888
1889 static void
1890 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1891 {
1892         struct virtchnl_ether_addr_list *list;
1893         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1894         int err, i, j;
1895         int next_begin = 0;
1896         int begin = 0;
1897         uint32_t len;
1898         struct ether_addr *addr;
1899         struct vf_cmd_info args;
1900
1901         do {
1902                 j = 0;
1903                 len = sizeof(struct virtchnl_ether_addr_list);
1904                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1905                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1906                                 continue;
1907                         len += sizeof(struct virtchnl_ether_addr);
1908                         if (len >= I40E_AQ_BUF_SZ) {
1909                                 next_begin = i + 1;
1910                                 break;
1911                         }
1912                 }
1913
1914                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1915                 if (!list) {
1916                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1917                         return;
1918                 }
1919
1920                 for (i = begin; i < next_begin; i++) {
1921                         addr = &dev->data->mac_addrs[i];
1922                         if (is_zero_ether_addr(addr))
1923                                 continue;
1924                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1925                                          sizeof(addr->addr_bytes));
1926                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1927                                     addr->addr_bytes[0], addr->addr_bytes[1],
1928                                     addr->addr_bytes[2], addr->addr_bytes[3],
1929                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1930                         j++;
1931                 }
1932                 list->vsi_id = vf->vsi_res->vsi_id;
1933                 list->num_elements = j;
1934                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1935                            VIRTCHNL_OP_DEL_ETH_ADDR;
1936                 args.in_args = (uint8_t *)list;
1937                 args.in_args_size = len;
1938                 args.out_buffer = vf->aq_resp;
1939                 args.out_size = I40E_AQ_BUF_SZ;
1940                 err = i40evf_execute_vf_cmd(dev, &args);
1941                 if (err) {
1942                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1943                                     add ? "OP_ADD_ETHER_ADDRESS" :
1944                                     "OP_DEL_ETHER_ADDRESS");
1945                 } else {
1946                         if (add)
1947                                 vf->vsi.mac_num++;
1948                         else
1949                                 vf->vsi.mac_num--;
1950                 }
1951                 rte_free(list);
1952                 begin = next_begin;
1953         } while (begin < I40E_NUM_MACADDR_MAX);
1954 }
1955
1956 static int
1957 i40evf_dev_start(struct rte_eth_dev *dev)
1958 {
1959         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1960         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1961         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1962         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1963         uint32_t intr_vector = 0;
1964
1965         PMD_INIT_FUNC_TRACE();
1966
1967         hw->adapter_stopped = 0;
1968
1969         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1970         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1971                                         dev->data->nb_tx_queues);
1972
1973         /* check and configure queue intr-vector mapping */
1974         if (rte_intr_cap_multiple(intr_handle) &&
1975             dev->data->dev_conf.intr_conf.rxq) {
1976                 intr_vector = dev->data->nb_rx_queues;
1977                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1978                         return -1;
1979         }
1980
1981         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1982                 intr_handle->intr_vec =
1983                         rte_zmalloc("intr_vec",
1984                                     dev->data->nb_rx_queues * sizeof(int), 0);
1985                 if (!intr_handle->intr_vec) {
1986                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1987                                      " intr_vec", dev->data->nb_rx_queues);
1988                         return -ENOMEM;
1989                 }
1990         }
1991
1992         if (i40evf_rx_init(dev) != 0){
1993                 PMD_DRV_LOG(ERR, "failed to do RX init");
1994                 return -1;
1995         }
1996
1997         i40evf_tx_init(dev);
1998
1999         if (i40evf_configure_vsi_queues(dev) != 0) {
2000                 PMD_DRV_LOG(ERR, "configure queues failed");
2001                 goto err_queue;
2002         }
2003         if (i40evf_config_irq_map(dev)) {
2004                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2005                 goto err_queue;
2006         }
2007
2008         /* Set all mac addrs */
2009         i40evf_add_del_all_mac_addr(dev, TRUE);
2010         /* Set all multicast addresses */
2011         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2012                                 TRUE);
2013
2014         if (i40evf_start_queues(dev) != 0) {
2015                 PMD_DRV_LOG(ERR, "enable queues failed");
2016                 goto err_mac;
2017         }
2018
2019         /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt
2020          * is mapped to VFIO vector 0 in i40evf_dev_init( ).
2021          * If previous VFIO interrupt mapping set in i40evf_dev_init( ) is
2022          * not cleared, it will fail when rte_intr_enable( ) tries to map Rx
2023          * queue interrupt to other VFIO vectors.
2024          * So clear uio/vfio intr/evevnfd first to avoid failure.
2025          */
2026         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2027                 rte_intr_disable(intr_handle);
2028                 rte_intr_enable(intr_handle);
2029         }
2030
2031         i40evf_enable_queues_intr(dev);
2032
2033         return 0;
2034
2035 err_mac:
2036         i40evf_add_del_all_mac_addr(dev, FALSE);
2037         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2038                                 FALSE);
2039 err_queue:
2040         return -1;
2041 }
2042
2043 static void
2044 i40evf_dev_stop(struct rte_eth_dev *dev)
2045 {
2046         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2047         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2048         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2049         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2050
2051         PMD_INIT_FUNC_TRACE();
2052
2053         if (hw->adapter_stopped == 1)
2054                 return;
2055         i40evf_stop_queues(dev);
2056         i40evf_disable_queues_intr(dev);
2057         i40e_dev_clear_queues(dev);
2058
2059         /* Clean datapath event and queue/vec mapping */
2060         rte_intr_efd_disable(intr_handle);
2061         if (intr_handle->intr_vec) {
2062                 rte_free(intr_handle->intr_vec);
2063                 intr_handle->intr_vec = NULL;
2064         }
2065         /* remove all mac addrs */
2066         i40evf_add_del_all_mac_addr(dev, FALSE);
2067         /* remove all multicast addresses */
2068         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2069                                 FALSE);
2070         hw->adapter_stopped = 1;
2071
2072 }
2073
2074 static int
2075 i40evf_dev_link_update(struct rte_eth_dev *dev,
2076                        __rte_unused int wait_to_complete)
2077 {
2078         struct rte_eth_link new_link;
2079         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2080         /*
2081          * DPDK pf host provide interfacet to acquire link status
2082          * while Linux driver does not
2083          */
2084
2085         memset(&new_link, 0, sizeof(new_link));
2086         /* Linux driver PF host */
2087         switch (vf->link_speed) {
2088         case I40E_LINK_SPEED_100MB:
2089                 new_link.link_speed = ETH_SPEED_NUM_100M;
2090                 break;
2091         case I40E_LINK_SPEED_1GB:
2092                 new_link.link_speed = ETH_SPEED_NUM_1G;
2093                 break;
2094         case I40E_LINK_SPEED_10GB:
2095                 new_link.link_speed = ETH_SPEED_NUM_10G;
2096                 break;
2097         case I40E_LINK_SPEED_20GB:
2098                 new_link.link_speed = ETH_SPEED_NUM_20G;
2099                 break;
2100         case I40E_LINK_SPEED_25GB:
2101                 new_link.link_speed = ETH_SPEED_NUM_25G;
2102                 break;
2103         case I40E_LINK_SPEED_40GB:
2104                 new_link.link_speed = ETH_SPEED_NUM_40G;
2105                 break;
2106         default:
2107                 new_link.link_speed = ETH_SPEED_NUM_100M;
2108                 break;
2109         }
2110         /* full duplex only */
2111         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2112         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2113                                              ETH_LINK_DOWN;
2114         new_link.link_autoneg =
2115                 dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED;
2116
2117         return rte_eth_linkstatus_set(dev, &new_link);
2118 }
2119
2120 static void
2121 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2122 {
2123         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2124         int ret;
2125
2126         /* If enabled, just return */
2127         if (vf->promisc_unicast_enabled)
2128                 return;
2129
2130         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2131         if (ret == 0)
2132                 vf->promisc_unicast_enabled = TRUE;
2133 }
2134
2135 static void
2136 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2137 {
2138         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2139         int ret;
2140
2141         /* If disabled, just return */
2142         if (!vf->promisc_unicast_enabled)
2143                 return;
2144
2145         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2146         if (ret == 0)
2147                 vf->promisc_unicast_enabled = FALSE;
2148 }
2149
2150 static void
2151 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2152 {
2153         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2154         int ret;
2155
2156         /* If enabled, just return */
2157         if (vf->promisc_multicast_enabled)
2158                 return;
2159
2160         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2161         if (ret == 0)
2162                 vf->promisc_multicast_enabled = TRUE;
2163 }
2164
2165 static void
2166 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2167 {
2168         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2169         int ret;
2170
2171         /* If enabled, just return */
2172         if (!vf->promisc_multicast_enabled)
2173                 return;
2174
2175         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2176         if (ret == 0)
2177                 vf->promisc_multicast_enabled = FALSE;
2178 }
2179
2180 static void
2181 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2182 {
2183         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2184
2185         memset(dev_info, 0, sizeof(*dev_info));
2186         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2187         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2188         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2189         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2190         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2191         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2192         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2193         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2194         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2195         dev_info->rx_offload_capa =
2196                 DEV_RX_OFFLOAD_VLAN_STRIP |
2197                 DEV_RX_OFFLOAD_QINQ_STRIP |
2198                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2199                 DEV_RX_OFFLOAD_UDP_CKSUM |
2200                 DEV_RX_OFFLOAD_TCP_CKSUM |
2201                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2202                 DEV_RX_OFFLOAD_CRC_STRIP;
2203         dev_info->tx_offload_capa =
2204                 DEV_TX_OFFLOAD_VLAN_INSERT |
2205                 DEV_TX_OFFLOAD_QINQ_INSERT |
2206                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2207                 DEV_TX_OFFLOAD_UDP_CKSUM |
2208                 DEV_TX_OFFLOAD_TCP_CKSUM |
2209                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2210                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2211                 DEV_TX_OFFLOAD_TCP_TSO |
2212                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2213                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2214                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2215                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
2216
2217         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2218                 .rx_thresh = {
2219                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2220                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2221                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2222                 },
2223                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2224                 .rx_drop_en = 0,
2225         };
2226
2227         dev_info->default_txconf = (struct rte_eth_txconf) {
2228                 .tx_thresh = {
2229                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2230                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2231                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2232                 },
2233                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2234                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2235                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2236                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2237         };
2238
2239         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2240                 .nb_max = I40E_MAX_RING_DESC,
2241                 .nb_min = I40E_MIN_RING_DESC,
2242                 .nb_align = I40E_ALIGN_RING_DESC,
2243         };
2244
2245         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2246                 .nb_max = I40E_MAX_RING_DESC,
2247                 .nb_min = I40E_MIN_RING_DESC,
2248                 .nb_align = I40E_ALIGN_RING_DESC,
2249         };
2250 }
2251
2252 static int
2253 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2254 {
2255         int ret;
2256         struct i40e_eth_stats *pstats = NULL;
2257         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2258         struct i40e_vsi *vsi = &vf->vsi;
2259
2260         ret = i40evf_query_stats(dev, &pstats);
2261         if (ret == 0) {
2262                 i40evf_update_stats(vsi, pstats);
2263
2264                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2265                                                 pstats->rx_broadcast;
2266                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2267                                                 pstats->tx_unicast;
2268                 stats->imissed = pstats->rx_discards;
2269                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2270                 stats->ibytes = pstats->rx_bytes;
2271                 stats->obytes = pstats->tx_bytes;
2272         } else {
2273                 PMD_DRV_LOG(ERR, "Get statistics failed");
2274         }
2275         return ret;
2276 }
2277
2278 static void
2279 i40evf_dev_close(struct rte_eth_dev *dev)
2280 {
2281         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2282         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2283         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2284
2285         i40evf_dev_stop(dev);
2286         i40e_dev_free_queues(dev);
2287         i40evf_reset_vf(hw);
2288         i40e_shutdown_adminq(hw);
2289         /* disable uio intr before callback unregister */
2290         rte_intr_disable(intr_handle);
2291
2292         /* unregister callback func from eal lib */
2293         rte_intr_callback_unregister(intr_handle,
2294                                      i40evf_dev_interrupt_handler, dev);
2295         i40evf_disable_irq0(hw);
2296 }
2297
2298 /*
2299  * Reset VF device only to re-initialize resources in PMD layer
2300  */
2301 static int
2302 i40evf_dev_reset(struct rte_eth_dev *dev)
2303 {
2304         int ret;
2305
2306         ret = i40evf_dev_uninit(dev);
2307         if (ret)
2308                 return ret;
2309
2310         ret = i40evf_dev_init(dev);
2311
2312         return ret;
2313 }
2314
2315 static int
2316 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2317 {
2318         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2319         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2320         int ret;
2321
2322         if (!lut)
2323                 return -EINVAL;
2324
2325         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2326                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2327                                           lut, lut_size);
2328                 if (ret) {
2329                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2330                         return ret;
2331                 }
2332         } else {
2333                 uint32_t *lut_dw = (uint32_t *)lut;
2334                 uint16_t i, lut_size_dw = lut_size / 4;
2335
2336                 for (i = 0; i < lut_size_dw; i++)
2337                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2338         }
2339
2340         return 0;
2341 }
2342
2343 static int
2344 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2345 {
2346         struct i40e_vf *vf;
2347         struct i40e_hw *hw;
2348         int ret;
2349
2350         if (!vsi || !lut)
2351                 return -EINVAL;
2352
2353         vf = I40E_VSI_TO_VF(vsi);
2354         hw = I40E_VSI_TO_HW(vsi);
2355
2356         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2357                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2358                                           lut, lut_size);
2359                 if (ret) {
2360                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2361                         return ret;
2362                 }
2363         } else {
2364                 uint32_t *lut_dw = (uint32_t *)lut;
2365                 uint16_t i, lut_size_dw = lut_size / 4;
2366
2367                 for (i = 0; i < lut_size_dw; i++)
2368                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2369                 I40EVF_WRITE_FLUSH(hw);
2370         }
2371
2372         return 0;
2373 }
2374
2375 static int
2376 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2377                            struct rte_eth_rss_reta_entry64 *reta_conf,
2378                            uint16_t reta_size)
2379 {
2380         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2381         uint8_t *lut;
2382         uint16_t i, idx, shift;
2383         int ret;
2384
2385         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2386                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2387                         "(%d) doesn't match the number of hardware can "
2388                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2389                 return -EINVAL;
2390         }
2391
2392         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2393         if (!lut) {
2394                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2395                 return -ENOMEM;
2396         }
2397         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2398         if (ret)
2399                 goto out;
2400         for (i = 0; i < reta_size; i++) {
2401                 idx = i / RTE_RETA_GROUP_SIZE;
2402                 shift = i % RTE_RETA_GROUP_SIZE;
2403                 if (reta_conf[idx].mask & (1ULL << shift))
2404                         lut[i] = reta_conf[idx].reta[shift];
2405         }
2406         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2407
2408 out:
2409         rte_free(lut);
2410
2411         return ret;
2412 }
2413
2414 static int
2415 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2416                           struct rte_eth_rss_reta_entry64 *reta_conf,
2417                           uint16_t reta_size)
2418 {
2419         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2420         uint16_t i, idx, shift;
2421         uint8_t *lut;
2422         int ret;
2423
2424         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2425                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2426                         "(%d) doesn't match the number of hardware can "
2427                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2428                 return -EINVAL;
2429         }
2430
2431         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2432         if (!lut) {
2433                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2434                 return -ENOMEM;
2435         }
2436
2437         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2438         if (ret)
2439                 goto out;
2440         for (i = 0; i < reta_size; i++) {
2441                 idx = i / RTE_RETA_GROUP_SIZE;
2442                 shift = i % RTE_RETA_GROUP_SIZE;
2443                 if (reta_conf[idx].mask & (1ULL << shift))
2444                         reta_conf[idx].reta[shift] = lut[i];
2445         }
2446
2447 out:
2448         rte_free(lut);
2449
2450         return ret;
2451 }
2452
2453 static int
2454 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2455 {
2456         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2457         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2458         int ret = 0;
2459
2460         if (!key || key_len == 0) {
2461                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2462                 return 0;
2463         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2464                 sizeof(uint32_t)) {
2465                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2466                 return -EINVAL;
2467         }
2468
2469         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2470                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2471                         (struct i40e_aqc_get_set_rss_key_data *)key;
2472
2473                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2474                 if (ret)
2475                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2476                                      "via AQ");
2477         } else {
2478                 uint32_t *hash_key = (uint32_t *)key;
2479                 uint16_t i;
2480
2481                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2482                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2483                 I40EVF_WRITE_FLUSH(hw);
2484         }
2485
2486         return ret;
2487 }
2488
2489 static int
2490 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2491 {
2492         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2493         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2494         int ret;
2495
2496         if (!key || !key_len)
2497                 return -EINVAL;
2498
2499         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2500                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2501                         (struct i40e_aqc_get_set_rss_key_data *)key);
2502                 if (ret) {
2503                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2504                         return ret;
2505                 }
2506         } else {
2507                 uint32_t *key_dw = (uint32_t *)key;
2508                 uint16_t i;
2509
2510                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2511                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2512         }
2513         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2514
2515         return 0;
2516 }
2517
2518 static int
2519 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2520 {
2521         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2522         uint64_t hena;
2523         int ret;
2524
2525         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2526                                  rss_conf->rss_key_len);
2527         if (ret)
2528                 return ret;
2529
2530         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2531         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2532         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2533         I40EVF_WRITE_FLUSH(hw);
2534
2535         return 0;
2536 }
2537
2538 static void
2539 i40evf_disable_rss(struct i40e_vf *vf)
2540 {
2541         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2542
2543         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2544         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2545         I40EVF_WRITE_FLUSH(hw);
2546 }
2547
2548 static int
2549 i40evf_config_rss(struct i40e_vf *vf)
2550 {
2551         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2552         struct rte_eth_rss_conf rss_conf;
2553         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2554         uint16_t num;
2555
2556         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2557                 i40evf_disable_rss(vf);
2558                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2559                 return 0;
2560         }
2561
2562         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2563         /* Fill out the look up table */
2564         for (i = 0, j = 0; i < nb_q; i++, j++) {
2565                 if (j >= num)
2566                         j = 0;
2567                 lut = (lut << 8) | j;
2568                 if ((i & 3) == 3)
2569                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2570         }
2571
2572         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2573         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2574                 i40evf_disable_rss(vf);
2575                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2576                 return 0;
2577         }
2578
2579         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2580                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2581                 /* Calculate the default hash key */
2582                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2583                         rss_key_default[i] = (uint32_t)rte_rand();
2584                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2585                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2586                         sizeof(uint32_t);
2587         }
2588
2589         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2590 }
2591
2592 static int
2593 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2594                            struct rte_eth_rss_conf *rss_conf)
2595 {
2596         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2597         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2598         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2599         uint64_t hena;
2600
2601         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2602         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2603
2604         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2605                 if (rss_hf != 0) /* Enable RSS */
2606                         return -EINVAL;
2607                 return 0;
2608         }
2609
2610         /* RSS enabled */
2611         if (rss_hf == 0) /* Disable RSS */
2612                 return -EINVAL;
2613
2614         return i40evf_hw_rss_hash_set(vf, rss_conf);
2615 }
2616
2617 static int
2618 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2619                              struct rte_eth_rss_conf *rss_conf)
2620 {
2621         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2622         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2623         uint64_t hena;
2624
2625         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2626                            &rss_conf->rss_key_len);
2627
2628         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2629         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2630         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2631
2632         return 0;
2633 }
2634
2635 static int
2636 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2637 {
2638         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2639         struct rte_eth_dev_data *dev_data = vf->dev_data;
2640         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2641         int ret = 0;
2642
2643         /* check if mtu is within the allowed range */
2644         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2645                 return -EINVAL;
2646
2647         /* mtu setting is forbidden if port is start */
2648         if (dev_data->dev_started) {
2649                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2650                             dev_data->port_id);
2651                 return -EBUSY;
2652         }
2653
2654         if (frame_size > ETHER_MAX_LEN)
2655                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2656         else
2657                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2658
2659         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2660
2661         return ret;
2662 }
2663
2664 static void
2665 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2666                             struct ether_addr *mac_addr)
2667 {
2668         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2669         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2670
2671         if (!is_valid_assigned_ether_addr(mac_addr)) {
2672                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2673                 return;
2674         }
2675
2676         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2677                 return;
2678
2679         i40evf_del_mac_addr_by_addr(dev, (struct ether_addr *)hw->mac.addr);
2680
2681         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2682
2683         ether_addr_copy(mac_addr, (struct ether_addr *)hw->mac.addr);
2684 }
2685
2686 static int
2687 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2688                         struct ether_addr *mc_addrs,
2689                         uint32_t mc_addrs_num, bool add)
2690 {
2691         struct virtchnl_ether_addr_list *list;
2692         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2693         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2694                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2695         uint32_t i;
2696         int err;
2697         struct vf_cmd_info args;
2698
2699         if (mc_addrs == NULL || mc_addrs_num == 0)
2700                 return 0;
2701
2702         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2703                 return -EINVAL;
2704
2705         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2706         list->vsi_id = vf->vsi_res->vsi_id;
2707         list->num_elements = mc_addrs_num;
2708
2709         for (i = 0; i < mc_addrs_num; i++) {
2710                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2711                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2712                                     mc_addrs[i].addr_bytes[0],
2713                                     mc_addrs[i].addr_bytes[1],
2714                                     mc_addrs[i].addr_bytes[2],
2715                                     mc_addrs[i].addr_bytes[3],
2716                                     mc_addrs[i].addr_bytes[4],
2717                                     mc_addrs[i].addr_bytes[5]);
2718                         return -EINVAL;
2719                 }
2720
2721                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2722                         sizeof(list->list[i].addr));
2723         }
2724
2725         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2726         args.in_args = cmd_buffer;
2727         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2728                 i * sizeof(struct virtchnl_ether_addr);
2729         args.out_buffer = vf->aq_resp;
2730         args.out_size = I40E_AQ_BUF_SZ;
2731         err = i40evf_execute_vf_cmd(dev, &args);
2732         if (err) {
2733                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2734                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2735                 return err;
2736         }
2737
2738         return 0;
2739 }
2740
2741 static int
2742 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addrs,
2743                         uint32_t mc_addrs_num)
2744 {
2745         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2746         int err;
2747
2748         /* flush previous addresses */
2749         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2750                                 FALSE);
2751         if (err)
2752                 return err;
2753
2754         vf->mc_addrs_num = 0;
2755
2756         /* add new ones */
2757         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2758                                         TRUE);
2759         if (err)
2760                 return err;
2761
2762         vf->mc_addrs_num = mc_addrs_num;
2763         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2764
2765         return 0;
2766 }