drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <ethdev_driver.h>
  29 #include <ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static int i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static int i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_check_vf_reset_done(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  99 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 100 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 101 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 102                                      uint16_t rx_queue_id);
 103 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 104                                     uint16_t rx_queue_id);
 105 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 106                                      uint16_t tx_queue_id);
 107 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 108                                     uint16_t tx_queue_id);
 109 static int i40evf_add_del_eth_addr(struct rte_eth_dev *dev,
 110                                    struct rte_ether_addr *addr,
 111                                    bool add, uint8_t type);
 112 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 113                                struct rte_ether_addr *addr,
 114                                uint32_t index,
 115                                uint32_t pool);
 116 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 117 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 118                         struct rte_eth_rss_reta_entry64 *reta_conf,
 119                         uint16_t reta_size);
 120 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 121                         struct rte_eth_rss_reta_entry64 *reta_conf,
 122                         uint16_t reta_size);
 123 static int i40evf_config_rss(struct i40e_vf *vf);
 124 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 125                                       struct rte_eth_rss_conf *rss_conf);
 126 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 127                                         struct rte_eth_rss_conf *rss_conf);
 128 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 129 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 130                                         struct rte_ether_addr *mac_addr);
 131 static int
 132 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 133 static int
 134 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 135 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 136                                    uint8_t *msg,
 137                                    uint16_t msglen);
 138
 139 static int
 140 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr, bool add);
 143 static int
 144 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 145                         struct rte_ether_addr *mc_addr_set,
 146                         uint32_t nb_mc_addr);
 147 static void
 148 i40evf_dev_alarm_handler(void *param);
 149
 150 /* Default hash key buffer for RSS */
 151 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 152
 153 struct rte_i40evf_xstats_name_off {
 154         char name[RTE_ETH_XSTATS_NAME_SIZE];
 155         unsigned offset;
 156 };
 157
 158 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 159         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 160         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 161         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 162         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 163         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 164         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 165                 rx_unknown_protocol)},
 166         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 167         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 168         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 169         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 170         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 171         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 172 };
 173
 174 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 175                 sizeof(rte_i40evf_stats_strings[0]))
 176
 177 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 178         .dev_configure        = i40evf_dev_configure,
 179         .dev_start            = i40evf_dev_start,
 180         .dev_stop             = i40evf_dev_stop,
 181         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 182         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 183         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 184         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 185         .link_update          = i40evf_dev_link_update,
 186         .stats_get            = i40evf_dev_stats_get,
 187         .stats_reset          = i40evf_dev_xstats_reset,
 188         .xstats_get           = i40evf_dev_xstats_get,
 189         .xstats_get_names     = i40evf_dev_xstats_get_names,
 190         .xstats_reset         = i40evf_dev_xstats_reset,
 191         .dev_close            = i40evf_dev_close,
 192         .dev_reset            = i40evf_dev_reset,
 193         .dev_infos_get        = i40evf_dev_info_get,
 194         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 195         .vlan_filter_set      = i40evf_vlan_filter_set,
 196         .vlan_offload_set     = i40evf_vlan_offload_set,
 197         .rx_queue_start       = i40evf_dev_rx_queue_start,
 198         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 199         .tx_queue_start       = i40evf_dev_tx_queue_start,
 200         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 201         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 202         .rx_queue_release     = i40e_dev_rx_queue_release,
 203         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 204         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 205         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 206         .tx_queue_release     = i40e_dev_tx_queue_release,
 207         .rxq_info_get         = i40e_rxq_info_get,
 208         .txq_info_get         = i40e_txq_info_get,
 209         .mac_addr_add         = i40evf_add_mac_addr,
 210         .mac_addr_remove      = i40evf_del_mac_addr,
 211         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 212         .reta_update          = i40evf_dev_rss_reta_update,
 213         .reta_query           = i40evf_dev_rss_reta_query,
 214         .rss_hash_update      = i40evf_dev_rss_hash_update,
 215         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 216         .mtu_set              = i40evf_dev_mtu_set,
 217         .mac_addr_set         = i40evf_set_default_mac_addr,
 218         .tx_done_cleanup      = i40e_tx_done_cleanup,
 219         .get_monitor_addr     = i40e_get_monitor_addr
 220 };
 221
 222 /*
 223  * Read data in admin queue to get msg from pf driver
 224  */
 225 static enum i40evf_aq_result
 226 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 227 {
 228         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 229         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 230         struct i40e_arq_event_info event;
 231         enum virtchnl_ops opcode;
 232         enum i40e_status_code retval;
 233         int ret;
 234         enum i40evf_aq_result result = I40EVF_MSG_NON;
 235
 236         event.buf_len = data->buf_len;
 237         event.msg_buf = data->msg;
 238         ret = i40e_clean_arq_element(hw, &event, NULL);
 239         /* Can't read any msg from adminQ */
 240         if (ret) {
 241                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 242                         result = I40EVF_MSG_ERR;
 243                 return result;
 244         }
 245
 246         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 247         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 248         /* pf sys event */
 249         if (opcode == VIRTCHNL_OP_EVENT) {
 250                 struct virtchnl_pf_event *vpe =
 251                         (struct virtchnl_pf_event *)event.msg_buf;
 252
 253                 result = I40EVF_MSG_SYS;
 254                 switch (vpe->event) {
 255                 case VIRTCHNL_EVENT_LINK_CHANGE:
 256                         vf->link_up =
 257                                 vpe->event_data.link_event.link_status;
 258                         vf->link_speed =
 259                                 vpe->event_data.link_event.link_speed;
 260                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 261                         PMD_DRV_LOG(INFO, "Link status update:%s",
 262                                     vf->link_up ? "up" : "down");
 263                         break;
 264                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 265                         vf->vf_reset = true;
 266                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 267                         PMD_DRV_LOG(INFO, "VF is resetting");
 268                         break;
 269                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 270                         vf->dev_closed = true;
 271                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 272                         PMD_DRV_LOG(INFO, "PF driver closed");
 273                         break;
 274                 default:
 275                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 276                                     __func__, vpe->event);
 277                 }
 278         } else {
 279                 /* async reply msg on command issued by vf previously */
 280                 result = I40EVF_MSG_CMD;
 281                 /* Actual data length read from PF */
 282                 data->msg_len = event.msg_len;
 283         }
 284
 285         data->result = retval;
 286         data->ops = opcode;
 287
 288         return result;
 289 }
 290
 291 /**
 292  * clear current command. Only call in case execute
 293  * _atomic_set_cmd successfully.
 294  */
 295 static inline void
 296 _clear_cmd(struct i40e_vf *vf)
 297 {
 298         rte_wmb();
 299         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 300 }
 301
 302 /*
 303  * Check there is pending cmd in execution. If none, set new command.
 304  */
 305 static inline int
 306 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 307 {
 308         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 309                         VIRTCHNL_OP_UNKNOWN, ops);
 310
 311         if (!ret)
 312                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 313
 314         return !ret;
 315 }
 316
 317 #define MAX_TRY_TIMES 200
 318 #define ASQ_DELAY_MS  10
 319
 320 static int
 321 _i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 322 {
 323         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 324         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 325         struct i40evf_arq_msg_info info;
 326         enum i40evf_aq_result ret;
 327         int err, i = 0;
 328
 329         if (_atomic_set_cmd(vf, args->ops))
 330                 return -1;
 331
 332         info.msg = args->out_buffer;
 333         info.buf_len = args->out_size;
 334         info.ops = VIRTCHNL_OP_UNKNOWN;
 335         info.result = I40E_SUCCESS;
 336
 337         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 338                      args->in_args, args->in_args_size, NULL);
 339         if (err) {
 340                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 341                 _clear_cmd(vf);
 342                 return err;
 343         }
 344
 345         switch (args->ops) {
 346         case VIRTCHNL_OP_RESET_VF:
 347                 /*no need to process in this function */
 348                 err = 0;
 349                 break;
 350         case VIRTCHNL_OP_VERSION:
 351         case VIRTCHNL_OP_GET_VF_RESOURCES:
 352                 /* for init adminq commands, need to poll the response */
 353                 err = -1;
 354                 do {
 355                         ret = i40evf_read_pfmsg(dev, &info);
 356                         vf->cmd_retval = info.result;
 357                         if (ret == I40EVF_MSG_CMD) {
 358                                 err = 0;
 359                                 break;
 360                         } else if (ret == I40EVF_MSG_ERR)
 361                                 break;
 362                         rte_delay_ms(ASQ_DELAY_MS);
 363                         /* If don't read msg or read sys event, continue */
 364                 } while (i++ < MAX_TRY_TIMES);
 365                 _clear_cmd(vf);
 366                 break;
 367         case VIRTCHNL_OP_REQUEST_QUEUES:
 368                 /**
 369                  * ignore async reply, only wait for system message,
 370                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 371                  * if not, means request queues failed.
 372                  */
 373                 err = -1;
 374                 do {
 375                         ret = i40evf_read_pfmsg(dev, &info);
 376                         vf->cmd_retval = info.result;
 377                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 378                                 err = 0;
 379                                 break;
 380                         } else if (ret == I40EVF_MSG_ERR ||
 381                                            ret == I40EVF_MSG_CMD) {
 382                                 break;
 383                         }
 384                         rte_delay_ms(ASQ_DELAY_MS);
 385                         /* If don't read msg or read sys event, continue */
 386                 } while (i++ < MAX_TRY_TIMES);
 387                 _clear_cmd(vf);
 388                 break;
 389
 390         default:
 391                 /* for other adminq in running time, waiting the cmd done flag */
 392                 err = -1;
 393                 do {
 394                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 395                                 err = 0;
 396                                 break;
 397                         }
 398                         rte_delay_ms(ASQ_DELAY_MS);
 399                         /* If don't read msg or read sys event, continue */
 400                 } while (i++ < MAX_TRY_TIMES);
 401                 /* If there's no response is received, clear command */
 402                 if (i >= MAX_TRY_TIMES) {
 403                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 404                         _clear_cmd(vf);
 405                 }
 406                 break;
 407         }
 408
 409         return err | vf->cmd_retval;
 410 }
 411
 412 static int
 413 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 414 {
 415         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 416         int err;
 417
 418         while (!rte_spinlock_trylock(&vf->cmd_send_lock))
 419                 rte_delay_us_sleep(50);
 420         err = _i40evf_execute_vf_cmd(dev, args);
 421         rte_spinlock_unlock(&vf->cmd_send_lock);
 422         return err;
 423 }
 424
 425 /*
 426  * Check API version with sync wait until version read or fail from admin queue
 427  */
 428 static int
 429 i40evf_check_api_version(struct rte_eth_dev *dev)
 430 {
 431         struct virtchnl_version_info version, *pver;
 432         int err;
 433         struct vf_cmd_info args;
 434         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 435
 436         version.major = VIRTCHNL_VERSION_MAJOR;
 437         version.minor = VIRTCHNL_VERSION_MINOR;
 438
 439         args.ops = VIRTCHNL_OP_VERSION;
 440         args.in_args = (uint8_t *)&version;
 441         args.in_args_size = sizeof(version);
 442         args.out_buffer = vf->aq_resp;
 443         args.out_size = I40E_AQ_BUF_SZ;
 444
 445         err = i40evf_execute_vf_cmd(dev, &args);
 446         if (err) {
 447                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 448                 return err;
 449         }
 450
 451         pver = (struct virtchnl_version_info *)args.out_buffer;
 452         vf->version_major = pver->major;
 453         vf->version_minor = pver->minor;
 454         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 455                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 456                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 457         else {
 458                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 459                                         vf->version_major, vf->version_minor,
 460                                                 VIRTCHNL_VERSION_MAJOR,
 461                                                 VIRTCHNL_VERSION_MINOR);
 462                 return -1;
 463         }
 464
 465         return 0;
 466 }
 467
 468 static int
 469 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 470 {
 471         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 472         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 473         int err;
 474         struct vf_cmd_info args;
 475         uint32_t caps, len;
 476
 477         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 478         args.out_buffer = vf->aq_resp;
 479         args.out_size = I40E_AQ_BUF_SZ;
 480         if (PF_IS_V11(vf)) {
 481                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 482                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 483                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 484                        VIRTCHNL_VF_OFFLOAD_VLAN |
 485                        VIRTCHNL_VF_OFFLOAD_RX_POLLING |
 486                        VIRTCHNL_VF_CAP_ADV_LINK_SPEED;
 487                 args.in_args = (uint8_t *)&caps;
 488                 args.in_args_size = sizeof(caps);
 489         } else {
 490                 args.in_args = NULL;
 491                 args.in_args_size = 0;
 492         }
 493         err = i40evf_execute_vf_cmd(dev, &args);
 494
 495         if (err) {
 496                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 497                 return err;
 498         }
 499
 500         len =  sizeof(struct virtchnl_vf_resource) +
 501                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 502
 503         rte_memcpy(vf->vf_res, args.out_buffer,
 504                         RTE_MIN(args.out_size, len));
 505         i40e_vf_parse_hw_config(hw, vf->vf_res);
 506
 507         return 0;
 508 }
 509
 510 static int
 511 i40evf_config_promisc(struct rte_eth_dev *dev,
 512                       bool enable_unicast,
 513                       bool enable_multicast)
 514 {
 515         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 516         int err;
 517         struct vf_cmd_info args;
 518         struct virtchnl_promisc_info promisc;
 519
 520         promisc.flags = 0;
 521         promisc.vsi_id = vf->vsi_res->vsi_id;
 522
 523         if (enable_unicast)
 524                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 525
 526         if (enable_multicast)
 527                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 528
 529         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 530         args.in_args = (uint8_t *)&promisc;
 531         args.in_args_size = sizeof(promisc);
 532         args.out_buffer = vf->aq_resp;
 533         args.out_size = I40E_AQ_BUF_SZ;
 534
 535         err = i40evf_execute_vf_cmd(dev, &args);
 536
 537         if (err) {
 538                 PMD_DRV_LOG(ERR, "fail to execute command "
 539                             "CONFIG_PROMISCUOUS_MODE");
 540
 541                 if (err == I40E_NOT_SUPPORTED)
 542                         return -ENOTSUP;
 543
 544                 return -EAGAIN;
 545         }
 546
 547         vf->promisc_unicast_enabled = enable_unicast;
 548         vf->promisc_multicast_enabled = enable_multicast;
 549         return 0;
 550 }
 551
 552 static int
 553 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 554 {
 555         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 556         struct vf_cmd_info args;
 557         int ret;
 558
 559         memset(&args, 0, sizeof(args));
 560         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 561         args.in_args = NULL;
 562         args.in_args_size = 0;
 563         args.out_buffer = vf->aq_resp;
 564         args.out_size = I40E_AQ_BUF_SZ;
 565         ret = i40evf_execute_vf_cmd(dev, &args);
 566         if (ret)
 567                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 568                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 569
 570         return ret;
 571 }
 572
 573 static int
 574 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 575 {
 576         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 577         struct vf_cmd_info args;
 578         int ret;
 579
 580         memset(&args, 0, sizeof(args));
 581         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 582         args.in_args = NULL;
 583         args.in_args_size = 0;
 584         args.out_buffer = vf->aq_resp;
 585         args.out_size = I40E_AQ_BUF_SZ;
 586         ret = i40evf_execute_vf_cmd(dev, &args);
 587         if (ret)
 588                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 589                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 590
 591         return ret;
 592 }
 593
 594 static void
 595 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 596                                   uint16_t vsi_id,
 597                                   uint16_t queue_id,
 598                                   uint16_t nb_txq,
 599                                   struct i40e_tx_queue *txq)
 600 {
 601         txq_info->vsi_id = vsi_id;
 602         txq_info->queue_id = queue_id;
 603         if (queue_id < nb_txq && txq) {
 604                 txq_info->ring_len = txq->nb_tx_desc;
 605                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 606         }
 607 }
 608
 609 static void
 610 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 611                                   uint16_t vsi_id,
 612                                   uint16_t queue_id,
 613                                   uint16_t nb_rxq,
 614                                   uint32_t max_pkt_size,
 615                                   struct i40e_rx_queue *rxq)
 616 {
 617         rxq_info->vsi_id = vsi_id;
 618         rxq_info->queue_id = queue_id;
 619         rxq_info->max_pkt_size = max_pkt_size;
 620         if (queue_id < nb_rxq && rxq) {
 621                 rxq_info->ring_len = rxq->nb_rx_desc;
 622                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 623                 rxq_info->databuffer_size =
 624                         (rte_pktmbuf_data_room_size(rxq->mp) -
 625                                 RTE_PKTMBUF_HEADROOM);
 626         }
 627 }
 628
 629 static int
 630 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 631 {
 632         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 633         struct i40e_rx_queue **rxq =
 634                 (struct i40e_rx_queue **)dev->data->rx_queues;
 635         struct i40e_tx_queue **txq =
 636                 (struct i40e_tx_queue **)dev->data->tx_queues;
 637         struct virtchnl_vsi_queue_config_info *vc_vqci;
 638         struct virtchnl_queue_pair_info *vc_qpi;
 639         struct vf_cmd_info args;
 640         uint16_t i, nb_qp = vf->num_queue_pairs;
 641         const uint32_t size =
 642                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 643         uint8_t buff[size];
 644         int ret;
 645
 646         memset(buff, 0, sizeof(buff));
 647         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 648         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 649         vc_vqci->num_queue_pairs = nb_qp;
 650
 651         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 652                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 653                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 654                         txq ? txq[i] : NULL);
 655                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 656                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 657                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 658         }
 659         memset(&args, 0, sizeof(args));
 660         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 661         args.in_args = (uint8_t *)vc_vqci;
 662         args.in_args_size = size;
 663         args.out_buffer = vf->aq_resp;
 664         args.out_size = I40E_AQ_BUF_SZ;
 665         ret = i40evf_execute_vf_cmd(dev, &args);
 666         if (ret)
 667                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 668                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 669
 670         return ret;
 671 }
 672
 673 static int
 674 i40evf_config_irq_map(struct rte_eth_dev *dev)
 675 {
 676         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 677         struct vf_cmd_info args;
 678         uint8_t *cmd_buffer = NULL;
 679         struct virtchnl_irq_map_info *map_info;
 680         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 681         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 682         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 683         uint16_t rxq_map[vf->vf_res->max_vectors];
 684         int err;
 685
 686         memset(rxq_map, 0, sizeof(rxq_map));
 687         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 688                 rte_intr_allow_others(intr_handle)) {
 689                 msix_base = I40E_RX_VEC_START;
 690                 /* For interrupt mode, available vector id is from 1. */
 691                 max_vectors = vf->vf_res->max_vectors - 1;
 692                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 693
 694                 vec = msix_base;
 695                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 696                         rxq_map[vec] |= 1 << i;
 697                         intr_handle->intr_vec[i] = vec++;
 698                         if (vec >= vf->vf_res->max_vectors)
 699                                 vec = msix_base;
 700                 }
 701         } else {
 702                 msix_base = I40E_MISC_VEC_ID;
 703                 nb_msix = 1;
 704
 705                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 706                         rxq_map[msix_base] |= 1 << i;
 707                         if (rte_intr_dp_is_en(intr_handle))
 708                                 intr_handle->intr_vec[i] = msix_base;
 709                 }
 710         }
 711
 712         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 713                         sizeof(struct virtchnl_vector_map) * nb_msix;
 714         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 715         if (!cmd_buffer) {
 716                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 717                 return I40E_ERR_NO_MEMORY;
 718         }
 719
 720         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 721         map_info->num_vectors = nb_msix;
 722         for (i = 0; i < nb_msix; i++) {
 723                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 724                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 725                 map_info->vecmap[i].vector_id = msix_base + i;
 726                 map_info->vecmap[i].txq_map = 0;
 727                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 728         }
 729
 730         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 731         args.in_args = (u8 *)cmd_buffer;
 732         args.in_args_size = cmd_buffer_size;
 733         args.out_buffer = vf->aq_resp;
 734         args.out_size = I40E_AQ_BUF_SZ;
 735         err = i40evf_execute_vf_cmd(dev, &args);
 736         if (err)
 737                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 738
 739         rte_free(cmd_buffer);
 740
 741         return err;
 742 }
 743
 744 static int
 745 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 746                                 bool on)
 747 {
 748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 749         struct virtchnl_queue_select queue_select;
 750         int err;
 751         struct vf_cmd_info args;
 752         memset(&queue_select, 0, sizeof(queue_select));
 753         queue_select.vsi_id = vf->vsi_res->vsi_id;
 754
 755         if (isrx)
 756                 queue_select.rx_queues |= 1 << qid;
 757         else
 758                 queue_select.tx_queues |= 1 << qid;
 759
 760         if (on)
 761                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 762         else
 763                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 764         args.in_args = (u8 *)&queue_select;
 765         args.in_args_size = sizeof(queue_select);
 766         args.out_buffer = vf->aq_resp;
 767         args.out_size = I40E_AQ_BUF_SZ;
 768         err = i40evf_execute_vf_cmd(dev, &args);
 769         if (err)
 770                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 771                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 772
 773         return err;
 774 }
 775
 776 static int
 777 i40evf_start_queues(struct rte_eth_dev *dev)
 778 {
 779         struct rte_eth_dev_data *dev_data = dev->data;
 780         int i;
 781         struct i40e_rx_queue *rxq;
 782         struct i40e_tx_queue *txq;
 783
 784         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 785                 rxq = dev_data->rx_queues[i];
 786                 if (rxq->rx_deferred_start)
 787                         continue;
 788                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 789                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 790                         return -1;
 791                 }
 792         }
 793
 794         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 795                 txq = dev_data->tx_queues[i];
 796                 if (txq->tx_deferred_start)
 797                         continue;
 798                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 799                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 800                         return -1;
 801                 }
 802         }
 803
 804         return 0;
 805 }
 806
 807 static int
 808 i40evf_stop_queues(struct rte_eth_dev *dev)
 809 {
 810         int i;
 811
 812         /* Stop TX queues first */
 813         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 814                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 815                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 816                 }
 817         }
 818
 819         /* Then stop RX queues */
 820         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 821                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 822                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 823                 }
 824         }
 825
 826         return 0;
 827 }
 828
 829 static int
 830 i40evf_add_del_eth_addr(struct rte_eth_dev *dev,
 831                         struct rte_ether_addr *addr,
 832                         bool add, uint8_t type)
 833 {
 834         struct virtchnl_ether_addr_list *list;
 835         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 836         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 837                         sizeof(struct virtchnl_ether_addr)];
 838         int err;
 839         struct vf_cmd_info args;
 840
 841         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 842         list->vsi_id = vf->vsi_res->vsi_id;
 843         list->num_elements = 1;
 844         list->list[0].type = type;
 845         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 846                                         sizeof(addr->addr_bytes));
 847
 848         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
 849         args.in_args = cmd_buffer;
 850         args.in_args_size = sizeof(cmd_buffer);
 851         args.out_buffer = vf->aq_resp;
 852         args.out_size = I40E_AQ_BUF_SZ;
 853         err = i40evf_execute_vf_cmd(dev, &args);
 854         if (err)
 855                 PMD_DRV_LOG(ERR, "fail to execute command %s",
 856                             add ? "OP_ADD_ETH_ADDR" :  "OP_DEL_ETH_ADDR");
 857         return err;
 858 }
 859
 860 static int
 861 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 862                     struct rte_ether_addr *addr,
 863                     __rte_unused uint32_t index,
 864                     __rte_unused uint32_t pool)
 865 {
 866         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 867         int err;
 868
 869         if (rte_is_zero_ether_addr(addr)) {
 870                 PMD_DRV_LOG(ERR, "Invalid mac:" RTE_ETHER_ADDR_PRT_FMT,
 871                             addr->addr_bytes[0], addr->addr_bytes[1],
 872                             addr->addr_bytes[2], addr->addr_bytes[3],
 873                             addr->addr_bytes[4], addr->addr_bytes[5]);
 874                 return I40E_ERR_INVALID_MAC_ADDR;
 875         }
 876
 877         err = i40evf_add_del_eth_addr(dev, addr, TRUE, VIRTCHNL_ETHER_ADDR_EXTRA);
 878
 879         if (err)
 880                 PMD_DRV_LOG(ERR, "fail to add MAC address");
 881         else
 882                 vf->vsi.mac_num++;
 883
 884         return err;
 885 }
 886
 887 static void
 888 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 889 {
 890         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 891         struct rte_eth_dev_data *data = dev->data;
 892         struct rte_ether_addr *addr;
 893         int err;
 894
 895         addr = &data->mac_addrs[index];
 896
 897         err = i40evf_add_del_eth_addr(dev, addr, FALSE, VIRTCHNL_ETHER_ADDR_EXTRA);
 898
 899         if (err)
 900                 PMD_DRV_LOG(ERR, "fail to delete MAC address");
 901         else
 902                 vf->vsi.mac_num--;
 903
 904         return;
 905 }
 906
 907 static int
 908 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 909 {
 910         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 911         struct virtchnl_queue_select q_stats;
 912         int err;
 913         struct vf_cmd_info args;
 914
 915         memset(&q_stats, 0, sizeof(q_stats));
 916         q_stats.vsi_id = vf->vsi_res->vsi_id;
 917         args.ops = VIRTCHNL_OP_GET_STATS;
 918         args.in_args = (u8 *)&q_stats;
 919         args.in_args_size = sizeof(q_stats);
 920         args.out_buffer = vf->aq_resp;
 921         args.out_size = I40E_AQ_BUF_SZ;
 922
 923         err = i40evf_execute_vf_cmd(dev, &args);
 924         if (err) {
 925                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 926                 *pstats = NULL;
 927                 return err;
 928         }
 929         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 930         return 0;
 931 }
 932
 933 static void
 934 i40evf_stat_update_48(uint64_t *offset,
 935                    uint64_t *stat)
 936 {
 937         if (*stat >= *offset)
 938                 *stat = *stat - *offset;
 939         else
 940                 *stat = (uint64_t)((*stat +
 941                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 942
 943         *stat &= I40E_48_BIT_MASK;
 944 }
 945
 946 static void
 947 i40evf_stat_update_32(uint64_t *offset,
 948                    uint64_t *stat)
 949 {
 950         if (*stat >= *offset)
 951                 *stat = (uint64_t)(*stat - *offset);
 952         else
 953                 *stat = (uint64_t)((*stat +
 954                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 955 }
 956
 957 static void
 958 i40evf_update_stats(struct i40e_vsi *vsi,
 959                                         struct i40e_eth_stats *nes)
 960 {
 961         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 962
 963         i40evf_stat_update_48(&oes->rx_bytes,
 964                             &nes->rx_bytes);
 965         i40evf_stat_update_48(&oes->rx_unicast,
 966                             &nes->rx_unicast);
 967         i40evf_stat_update_48(&oes->rx_multicast,
 968                             &nes->rx_multicast);
 969         i40evf_stat_update_48(&oes->rx_broadcast,
 970                             &nes->rx_broadcast);
 971         i40evf_stat_update_32(&oes->rx_discards,
 972                                 &nes->rx_discards);
 973         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 974                             &nes->rx_unknown_protocol);
 975         i40evf_stat_update_48(&oes->tx_bytes,
 976                             &nes->tx_bytes);
 977         i40evf_stat_update_48(&oes->tx_unicast,
 978                             &nes->tx_unicast);
 979         i40evf_stat_update_48(&oes->tx_multicast,
 980                             &nes->tx_multicast);
 981         i40evf_stat_update_48(&oes->tx_broadcast,
 982                             &nes->tx_broadcast);
 983         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 984         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 985 }
 986
 987 static int
 988 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 989 {
 990         int ret;
 991         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 992         struct i40e_eth_stats *pstats = NULL;
 993
 994         /* read stat values to clear hardware registers */
 995         ret = i40evf_query_stats(dev, &pstats);
 996
 997         /* set stats offset base on current values */
 998         if (ret == 0)
 999                 vf->vsi.eth_stats_offset = *pstats;
1000
1001         return ret;
1002 }
1003
1004 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1005                                       struct rte_eth_xstat_name *xstats_names,
1006                                       __rte_unused unsigned limit)
1007 {
1008         unsigned i;
1009
1010         if (xstats_names != NULL)
1011                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1012                         snprintf(xstats_names[i].name,
1013                                 sizeof(xstats_names[i].name),
1014                                 "%s", rte_i40evf_stats_strings[i].name);
1015                 }
1016         return I40EVF_NB_XSTATS;
1017 }
1018
1019 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1020                                  struct rte_eth_xstat *xstats, unsigned n)
1021 {
1022         int ret;
1023         unsigned i;
1024         struct i40e_eth_stats *pstats = NULL;
1025         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1026         struct i40e_vsi *vsi = &vf->vsi;
1027
1028         if (n < I40EVF_NB_XSTATS)
1029                 return I40EVF_NB_XSTATS;
1030
1031         ret = i40evf_query_stats(dev, &pstats);
1032         if (ret != 0)
1033                 return 0;
1034
1035         if (!xstats)
1036                 return 0;
1037
1038         i40evf_update_stats(vsi, pstats);
1039
1040         /* loop over xstats array and values from pstats */
1041         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1042                 xstats[i].id = i;
1043                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1044                         rte_i40evf_stats_strings[i].offset);
1045         }
1046
1047         return I40EVF_NB_XSTATS;
1048 }
1049
1050 static int
1051 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1052 {
1053         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1054         struct virtchnl_vlan_filter_list *vlan_list;
1055         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1056                                                         sizeof(uint16_t)];
1057         int err;
1058         struct vf_cmd_info args;
1059
1060         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1061         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1062         vlan_list->num_elements = 1;
1063         vlan_list->vlan_id[0] = vlanid;
1064
1065         args.ops = VIRTCHNL_OP_ADD_VLAN;
1066         args.in_args = (u8 *)&cmd_buffer;
1067         args.in_args_size = sizeof(cmd_buffer);
1068         args.out_buffer = vf->aq_resp;
1069         args.out_size = I40E_AQ_BUF_SZ;
1070         err = i40evf_execute_vf_cmd(dev, &args);
1071         if (err) {
1072                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1073                 return err;
1074         }
1075         /**
1076          * In linux kernel driver on receiving ADD_VLAN it enables
1077          * VLAN_STRIP by default. So reconfigure the vlan_offload
1078          * as it was done by the app earlier.
1079          */
1080         err = i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1081         if (err)
1082                 PMD_DRV_LOG(ERR, "fail to set vlan_strip");
1083
1084         return err;
1085 }
1086
1087 static int
1088 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1089 {
1090         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1091         struct virtchnl_vf_res_request vfres;
1092         struct vf_cmd_info args;
1093         int err;
1094
1095         vfres.num_queue_pairs = num;
1096
1097         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1098         args.in_args = (u8 *)&vfres;
1099         args.in_args_size = sizeof(vfres);
1100         args.out_buffer = vf->aq_resp;
1101         args.out_size = I40E_AQ_BUF_SZ;
1102
1103         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1104
1105         err = i40evf_execute_vf_cmd(dev, &args);
1106
1107         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL, i40evf_dev_alarm_handler, dev);
1108
1109         if (err != I40E_SUCCESS) {
1110                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1111                 return err;
1112         }
1113
1114         /* The PF will issue a reset to the VF when change the number of
1115          * queues. The PF will set I40E_VFGEN_RSTAT to COMPLETE first, then
1116          * wait 10ms and set it to ACTIVE. In this duration, vf may not catch
1117          * the moment that COMPLETE is set. So, for vf, we'll try to wait a
1118          * long time.
1119          */
1120         rte_delay_ms(100);
1121
1122         err = i40evf_check_vf_reset_done(dev);
1123         if (err)
1124                 PMD_DRV_LOG(ERR, "VF is still resetting");
1125
1126         return err;
1127 }
1128
1129 static int
1130 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1131 {
1132         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1133         struct virtchnl_vlan_filter_list *vlan_list;
1134         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1135                                                         sizeof(uint16_t)];
1136         int err;
1137         struct vf_cmd_info args;
1138
1139         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1140         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1141         vlan_list->num_elements = 1;
1142         vlan_list->vlan_id[0] = vlanid;
1143
1144         args.ops = VIRTCHNL_OP_DEL_VLAN;
1145         args.in_args = (u8 *)&cmd_buffer;
1146         args.in_args_size = sizeof(cmd_buffer);
1147         args.out_buffer = vf->aq_resp;
1148         args.out_size = I40E_AQ_BUF_SZ;
1149         err = i40evf_execute_vf_cmd(dev, &args);
1150         if (err)
1151                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1152
1153         return err;
1154 }
1155
1156 static const struct rte_pci_id pci_id_i40evf_map[] = {
1157         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1158         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1159         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1160         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1161         { .vendor_id = 0, /* sentinel */ },
1162 };
1163
1164 /* Disable IRQ0 */
1165 static inline void
1166 i40evf_disable_irq0(struct i40e_hw *hw)
1167 {
1168         /* Disable all interrupt types */
1169         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1170         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1171                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1172         I40EVF_WRITE_FLUSH(hw);
1173 }
1174
1175 /* Enable IRQ0 */
1176 static inline void
1177 i40evf_enable_irq0(struct i40e_hw *hw)
1178 {
1179         /* Enable admin queue interrupt trigger */
1180         uint32_t val;
1181
1182         i40evf_disable_irq0(hw);
1183         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1184         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1185                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1186         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1187
1188         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1189                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1190                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1191                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1192
1193         I40EVF_WRITE_FLUSH(hw);
1194 }
1195
1196 static int
1197 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1198 {
1199         int i, reset;
1200         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1201         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1202
1203         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1204                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1205                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1206                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1207                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1208                     reset == VIRTCHNL_VFR_COMPLETED)
1209                         break;
1210                 rte_delay_ms(50);
1211         }
1212
1213         if (i >= MAX_RESET_WAIT_CNT)
1214                 return -1;
1215
1216         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1217
1218         return 0;
1219 }
1220 static int
1221 i40evf_reset_vf(struct rte_eth_dev *dev)
1222 {
1223         int ret;
1224         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1225
1226         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1227                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1228                 return -1;
1229         }
1230         /**
1231           * After issuing vf reset command to pf, pf won't necessarily
1232           * reset vf, it depends on what state it exactly is. If it's not
1233           * initialized yet, it won't have vf reset since it's in a certain
1234           * state. If not, it will try to reset. Even vf is reset, pf will
1235           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1236           * it to ACTIVE. In this duration, vf may not catch the moment that
1237           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1238           */
1239         rte_delay_ms(500);
1240
1241         ret = i40evf_check_vf_reset_done(dev);
1242         if (ret) {
1243                 PMD_INIT_LOG(ERR, "VF is still resetting");
1244                 return ret;
1245         }
1246
1247         return 0;
1248 }
1249
1250 static int
1251 i40evf_init_vf(struct rte_eth_dev *dev)
1252 {
1253         int i, err, bufsz;
1254         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1255         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1256         uint16_t interval =
1257                 i40e_calc_itr_interval(0, 0);
1258
1259         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1260         vf->dev_data = dev->data;
1261         rte_spinlock_init(&vf->cmd_send_lock);
1262         err = i40e_set_mac_type(hw);
1263         if (err) {
1264                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1265                 goto err;
1266         }
1267
1268         err = i40evf_check_vf_reset_done(dev);
1269         if (err)
1270                 goto err;
1271
1272         i40e_init_adminq_parameter(hw);
1273         err = i40e_init_adminq(hw);
1274         if (err) {
1275                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1276                 goto err;
1277         }
1278
1279         /* Reset VF and wait until it's complete */
1280         if (i40evf_reset_vf(dev)) {
1281                 PMD_INIT_LOG(ERR, "reset NIC failed");
1282                 goto err_aq;
1283         }
1284
1285         /* VF reset, shutdown admin queue and initialize again */
1286         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1287                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1288                 goto err;
1289         }
1290
1291         i40e_init_adminq_parameter(hw);
1292         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1293                 PMD_INIT_LOG(ERR, "init_adminq failed");
1294                 goto err;
1295         }
1296
1297         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1298         if (!vf->aq_resp) {
1299                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1300                 goto err_aq;
1301         }
1302         if (i40evf_check_api_version(dev) != 0) {
1303                 PMD_INIT_LOG(ERR, "check_api version failed");
1304                 goto err_api;
1305         }
1306         bufsz = sizeof(struct virtchnl_vf_resource) +
1307                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1308         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1309         if (!vf->vf_res) {
1310                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1311                 goto err_api;
1312         }
1313
1314         if (i40evf_get_vf_resource(dev) != 0) {
1315                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1316                 goto err_alloc;
1317         }
1318
1319         /* got VF config message back from PF, now we can parse it */
1320         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1321                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1322                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1323         }
1324
1325         if (!vf->vsi_res) {
1326                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1327                 goto err_alloc;
1328         }
1329
1330         if (hw->mac.type == I40E_MAC_X722_VF)
1331                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1332         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1333
1334         switch (vf->vsi_res->vsi_type) {
1335         case VIRTCHNL_VSI_SRIOV:
1336                 vf->vsi.type = I40E_VSI_SRIOV;
1337                 break;
1338         default:
1339                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1340                 break;
1341         }
1342         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1343         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1344
1345         /* Store the MAC address configured by host, or generate random one */
1346         if (!rte_is_valid_assigned_ether_addr(
1347                         (struct rte_ether_addr *)hw->mac.addr))
1348                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1349
1350         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1351                        (I40E_ITR_INDEX_DEFAULT <<
1352                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1353                        (interval <<
1354                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1355         I40EVF_WRITE_FLUSH(hw);
1356
1357         return 0;
1358
1359 err_alloc:
1360         rte_free(vf->vf_res);
1361         vf->vsi_res = NULL;
1362 err_api:
1363         rte_free(vf->aq_resp);
1364 err_aq:
1365         i40e_shutdown_adminq(hw); /* ignore error */
1366 err:
1367         return -1;
1368 }
1369
1370 static int
1371 i40evf_uninit_vf(struct rte_eth_dev *dev)
1372 {
1373         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1374
1375         PMD_INIT_FUNC_TRACE();
1376
1377         if (hw->adapter_closed == 0)
1378                 i40evf_dev_close(dev);
1379
1380         return 0;
1381 }
1382
1383 static void
1384 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1385                 __rte_unused uint16_t msglen)
1386 {
1387         struct virtchnl_pf_event *pf_msg =
1388                         (struct virtchnl_pf_event *)msg;
1389         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1390
1391         switch (pf_msg->event) {
1392         case VIRTCHNL_EVENT_RESET_IMPENDING:
1393                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1394                 vf->vf_reset = true;
1395                 rte_eth_dev_callback_process(dev,
1396                                 RTE_ETH_EVENT_INTR_RESET, NULL);
1397                 break;
1398         case VIRTCHNL_EVENT_LINK_CHANGE:
1399                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1400
1401                 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_ADV_LINK_SPEED) {
1402                         vf->link_up =
1403                                 pf_msg->event_data.link_event_adv.link_status;
1404
1405                         switch (pf_msg->event_data.link_event_adv.link_speed) {
1406                         case ETH_SPEED_NUM_100M:
1407                                 vf->link_speed = VIRTCHNL_LINK_SPEED_100MB;
1408                                 break;
1409                         case ETH_SPEED_NUM_1G:
1410                                 vf->link_speed = VIRTCHNL_LINK_SPEED_1GB;
1411                                 break;
1412                         case ETH_SPEED_NUM_2_5G:
1413                                 vf->link_speed = VIRTCHNL_LINK_SPEED_2_5GB;
1414                                 break;
1415                         case ETH_SPEED_NUM_5G:
1416                                 vf->link_speed = VIRTCHNL_LINK_SPEED_5GB;
1417                                 break;
1418                         case ETH_SPEED_NUM_10G:
1419                                 vf->link_speed = VIRTCHNL_LINK_SPEED_10GB;
1420                                 break;
1421                         case ETH_SPEED_NUM_20G:
1422                                 vf->link_speed = VIRTCHNL_LINK_SPEED_20GB;
1423                                 break;
1424                         case ETH_SPEED_NUM_25G:
1425                                 vf->link_speed = VIRTCHNL_LINK_SPEED_25GB;
1426                                 break;
1427                         case ETH_SPEED_NUM_40G:
1428                                 vf->link_speed = VIRTCHNL_LINK_SPEED_40GB;
1429                                 break;
1430                         default:
1431                                 vf->link_speed = VIRTCHNL_LINK_SPEED_UNKNOWN;
1432                                 break;
1433                         }
1434                 } else {
1435                         vf->link_up =
1436                                 pf_msg->event_data.link_event.link_status;
1437                         vf->link_speed =
1438                                 pf_msg->event_data.link_event.link_speed;
1439                 }
1440
1441                 i40evf_dev_link_update(dev, 0);
1442                 rte_eth_dev_callback_process(dev,
1443                                 RTE_ETH_EVENT_INTR_LSC, NULL);
1444                 break;
1445         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1446                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1447                 break;
1448         default:
1449                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1450                 break;
1451         }
1452 }
1453
1454 static void
1455 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1456 {
1457         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1458         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1459         struct i40e_arq_event_info info;
1460         uint16_t pending, aq_opc;
1461         enum virtchnl_ops msg_opc;
1462         enum i40e_status_code msg_ret;
1463         int ret;
1464
1465         info.buf_len = I40E_AQ_BUF_SZ;
1466         if (!vf->aq_resp) {
1467                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1468                 return;
1469         }
1470         info.msg_buf = vf->aq_resp;
1471
1472         pending = 1;
1473         while (pending) {
1474                 ret = i40e_clean_arq_element(hw, &info, &pending);
1475
1476                 if (ret != I40E_SUCCESS) {
1477                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1478                                     "ret: %d", ret);
1479                         break;
1480                 }
1481                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1482                 /* For the message sent from pf to vf, opcode is stored in
1483                  * cookie_high of struct i40e_aq_desc, while return error code
1484                  * are stored in cookie_low, Which is done by
1485                  * i40e_aq_send_msg_to_vf in PF driver.*/
1486                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1487                                                   info.desc.cookie_high);
1488                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1489                                                   info.desc.cookie_low);
1490                 switch (aq_opc) {
1491                 case i40e_aqc_opc_send_msg_to_vf:
1492                         if (msg_opc == VIRTCHNL_OP_EVENT)
1493                                 /* process event*/
1494                                 i40evf_handle_pf_event(dev, info.msg_buf,
1495                                                        info.msg_len);
1496                         else {
1497                                 /* read message and it's expected one */
1498                                 if ((volatile uint32_t)msg_opc ==
1499                                     vf->pend_cmd) {
1500                                         vf->cmd_retval = msg_ret;
1501                                         /* prevent compiler reordering */
1502                                         rte_compiler_barrier();
1503                                         _clear_cmd(vf);
1504                                 } else
1505                                         PMD_DRV_LOG(ERR, "command mismatch,"
1506                                                 "expect %u, get %u",
1507                                                 vf->pend_cmd, msg_opc);
1508                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1509                                              " opcode = %d", msg_opc);
1510                         }
1511                         break;
1512                 default:
1513                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1514                                     aq_opc);
1515                         break;
1516                 }
1517         }
1518 }
1519
1520 /**
1521  * Interrupt handler triggered by NIC  for handling
1522  * specific interrupt. Only adminq interrupt is processed in VF.
1523  *
1524  * @param handle
1525  *  Pointer to interrupt handle.
1526  * @param param
1527  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1528  *
1529  * @return
1530  *  void
1531  */
1532 static void
1533 i40evf_dev_alarm_handler(void *param)
1534 {
1535         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1536         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1537         uint32_t icr0;
1538
1539         i40evf_disable_irq0(hw);
1540
1541         /* read out interrupt causes */
1542         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1543
1544         /* No interrupt event indicated */
1545         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1546                 goto done;
1547
1548         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1549                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1550                 i40evf_handle_aq_msg(dev);
1551         }
1552
1553         /* Link Status Change interrupt */
1554         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1555                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1556                                    " do nothing");
1557
1558 done:
1559         i40evf_enable_irq0(hw);
1560         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1561                           i40evf_dev_alarm_handler, dev);
1562 }
1563
1564 static int
1565 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1566 {
1567         struct i40e_hw *hw
1568                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1569         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1570
1571         PMD_INIT_FUNC_TRACE();
1572
1573         /* assign ops func pointer */
1574         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1575         eth_dev->rx_queue_count       = i40e_dev_rx_queue_count;
1576         eth_dev->rx_descriptor_done   = i40e_dev_rx_descriptor_done;
1577         eth_dev->rx_descriptor_status = i40e_dev_rx_descriptor_status;
1578         eth_dev->tx_descriptor_status = i40e_dev_tx_descriptor_status;
1579         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1580         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1581
1582         /*
1583          * For secondary processes, we don't initialise any further as primary
1584          * has already done this work.
1585          */
1586         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1587                 i40e_set_rx_function(eth_dev);
1588                 i40e_set_tx_function(eth_dev);
1589                 return 0;
1590         }
1591         i40e_set_default_ptype_table(eth_dev);
1592         rte_eth_copy_pci_info(eth_dev, pci_dev);
1593         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1594
1595         hw->vendor_id = pci_dev->id.vendor_id;
1596         hw->device_id = pci_dev->id.device_id;
1597         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1598         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1599         hw->bus.device = pci_dev->addr.devid;
1600         hw->bus.func = pci_dev->addr.function;
1601         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1602         hw->adapter_stopped = 1;
1603         hw->adapter_closed = 0;
1604
1605         if(i40evf_init_vf(eth_dev) != 0) {
1606                 PMD_INIT_LOG(ERR, "Init vf failed");
1607                 return -1;
1608         }
1609
1610         i40e_set_default_pctype_table(eth_dev);
1611         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1612                           i40evf_dev_alarm_handler, eth_dev);
1613
1614         /* configure and enable device interrupt */
1615         i40evf_enable_irq0(hw);
1616
1617         /* copy mac addr */
1618         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1619                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1620                                 0);
1621         if (eth_dev->data->mac_addrs == NULL) {
1622                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1623                                 " store MAC addresses",
1624                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1625                 return -ENOMEM;
1626         }
1627         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1628                         &eth_dev->data->mac_addrs[0]);
1629
1630         return 0;
1631 }
1632
1633 static int
1634 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1635 {
1636         PMD_INIT_FUNC_TRACE();
1637
1638         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1639                 return -EPERM;
1640
1641         if (i40evf_uninit_vf(eth_dev) != 0) {
1642                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1643                 return -1;
1644         }
1645
1646         return 0;
1647 }
1648
1649 static int
1650 i40evf_check_driver_handler(__rte_unused const char *key,
1651                             const char *value, __rte_unused void *opaque)
1652 {
1653         if (strcmp(value, "i40evf"))
1654                 return -1;
1655
1656         return 0;
1657 }
1658
1659 static int
1660 i40evf_driver_selected(struct rte_devargs *devargs)
1661 {
1662         struct rte_kvargs *kvlist;
1663         int ret = 0;
1664
1665         if (devargs == NULL)
1666                 return 0;
1667
1668         kvlist = rte_kvargs_parse(devargs->args, NULL);
1669         if (kvlist == NULL)
1670                 return 0;
1671
1672         if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))
1673                 goto exit;
1674
1675         /* i40evf driver selected when there's a key-value pair:
1676          * driver=i40evf
1677          */
1678         if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,
1679                                i40evf_check_driver_handler, NULL) < 0)
1680                 goto exit;
1681
1682         ret = 1;
1683
1684 exit:
1685         rte_kvargs_free(kvlist);
1686         return ret;
1687 }
1688
1689 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1690         struct rte_pci_device *pci_dev)
1691 {
1692         if (!i40evf_driver_selected(pci_dev->device.devargs))
1693                 return 1;
1694
1695         return rte_eth_dev_pci_generic_probe(pci_dev,
1696                 sizeof(struct i40e_adapter), i40evf_dev_init);
1697 }
1698
1699 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1700 {
1701         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1702 }
1703
1704 /*
1705  * virtual function driver struct
1706  */
1707 static struct rte_pci_driver rte_i40evf_pmd = {
1708         .id_table = pci_id_i40evf_map,
1709         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1710         .probe = eth_i40evf_pci_probe,
1711         .remove = eth_i40evf_pci_remove,
1712 };
1713
1714 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1715 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1716 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1717 RTE_PMD_REGISTER_PARAM_STRING(net_i40e_vf, "driver=i40evf");
1718
1719 static int
1720 i40evf_dev_configure(struct rte_eth_dev *dev)
1721 {
1722         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1723         struct i40e_adapter *ad =
1724                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1725         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1726                                 dev->data->nb_tx_queues);
1727
1728         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1729          * allocation or vector Rx preconditions we will reset it.
1730          */
1731         ad->rx_bulk_alloc_allowed = true;
1732         ad->rx_vec_allowed = true;
1733         ad->tx_simple_allowed = true;
1734         ad->tx_vec_allowed = true;
1735
1736         dev->data->dev_conf.intr_conf.lsc =
1737                 !!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC);
1738
1739         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1740                 struct i40e_hw *hw;
1741                 int ret;
1742
1743                 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1744                         PMD_DRV_LOG(ERR,
1745                                     "For secondary processes, change queue pairs is not supported!");
1746                         return -ENOTSUP;
1747                 }
1748
1749                 hw  = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1750                 if (!hw->adapter_stopped) {
1751                         PMD_DRV_LOG(ERR, "Device must be stopped first!");
1752                         return -EBUSY;
1753                 }
1754
1755                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1756                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1757                 ret = i40evf_request_queues(dev, num_queue_pairs);
1758                 if (ret != 0)
1759                         return ret;
1760
1761                 ret = i40evf_dev_reset(dev);
1762                 if (ret != 0)
1763                         return ret;
1764         }
1765
1766         return i40evf_init_vlan(dev);
1767 }
1768
1769 static int
1770 i40evf_init_vlan(struct rte_eth_dev *dev)
1771 {
1772         /* Apply vlan offload setting */
1773         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1774
1775         return 0;
1776 }
1777
1778 static int
1779 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1780 {
1781         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1782         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1783
1784         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1785                 return -ENOTSUP;
1786
1787         /* Vlan stripping setting */
1788         if (mask & ETH_VLAN_STRIP_MASK) {
1789                 /* Enable or disable VLAN stripping */
1790                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1791                         i40evf_enable_vlan_strip(dev);
1792                 else
1793                         i40evf_disable_vlan_strip(dev);
1794         }
1795
1796         return 0;
1797 }
1798
1799 static int
1800 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1801 {
1802         struct i40e_rx_queue *rxq;
1803         int err;
1804         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1805
1806         PMD_INIT_FUNC_TRACE();
1807
1808         rxq = dev->data->rx_queues[rx_queue_id];
1809
1810         err = i40e_alloc_rx_queue_mbufs(rxq);
1811         if (err) {
1812                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1813                 return err;
1814         }
1815
1816         rte_wmb();
1817
1818         /* Init the RX tail register. */
1819         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1820         I40EVF_WRITE_FLUSH(hw);
1821
1822         /* Ready to switch the queue on */
1823         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1824         if (err) {
1825                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1826                             rx_queue_id);
1827                 return err;
1828         }
1829         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1830
1831         return 0;
1832 }
1833
1834 static int
1835 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1836 {
1837         struct i40e_rx_queue *rxq;
1838         int err;
1839
1840         rxq = dev->data->rx_queues[rx_queue_id];
1841
1842         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1843         if (err) {
1844                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1845                             rx_queue_id);
1846                 return err;
1847         }
1848
1849         i40e_rx_queue_release_mbufs(rxq);
1850         i40e_reset_rx_queue(rxq);
1851         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1852
1853         return 0;
1854 }
1855
1856 static int
1857 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1858 {
1859         int err;
1860
1861         PMD_INIT_FUNC_TRACE();
1862
1863         /* Ready to switch the queue on */
1864         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1865         if (err) {
1866                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1867                             tx_queue_id);
1868                 return err;
1869         }
1870         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1871
1872         return 0;
1873 }
1874
1875 static int
1876 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1877 {
1878         struct i40e_tx_queue *txq;
1879         int err;
1880
1881         txq = dev->data->tx_queues[tx_queue_id];
1882
1883         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1884         if (err) {
1885                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1886                             tx_queue_id);
1887                 return err;
1888         }
1889
1890         i40e_tx_queue_release_mbufs(txq);
1891         i40e_reset_tx_queue(txq);
1892         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1893
1894         return 0;
1895 }
1896
1897 static int
1898 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1899 {
1900         int ret;
1901
1902         if (on)
1903                 ret = i40evf_add_vlan(dev, vlan_id);
1904         else
1905                 ret = i40evf_del_vlan(dev,vlan_id);
1906
1907         return ret;
1908 }
1909
1910 static int
1911 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1912 {
1913         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1914         struct rte_eth_dev_data *dev_data = dev->data;
1915         struct rte_pktmbuf_pool_private *mbp_priv;
1916         uint16_t buf_size, len;
1917
1918         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1919         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1920         I40EVF_WRITE_FLUSH(hw);
1921
1922         /* Calculate the maximum packet length allowed */
1923         mbp_priv = rte_mempool_get_priv(rxq->mp);
1924         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1925                                         RTE_PKTMBUF_HEADROOM);
1926         rxq->hs_mode = i40e_header_split_none;
1927         rxq->rx_hdr_len = 0;
1928         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1929         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1930         rxq->max_pkt_len = RTE_MIN(len,
1931                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1932
1933         /**
1934          * Check if the jumbo frame and maximum packet length are set correctly
1935          */
1936         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1937                 if (rxq->max_pkt_len <= I40E_ETH_MAX_LEN ||
1938                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1939                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1940                                 "larger than %u and smaller than %u, as jumbo "
1941                                 "frame is enabled", (uint32_t)I40E_ETH_MAX_LEN,
1942                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1943                         return I40E_ERR_CONFIG;
1944                 }
1945         } else {
1946                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1947                     rxq->max_pkt_len > I40E_ETH_MAX_LEN) {
1948                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1949                                 "larger than %u and smaller than %u, as jumbo "
1950                                 "frame is disabled",
1951                                 (uint32_t)RTE_ETHER_MIN_LEN,
1952                                 (uint32_t)I40E_ETH_MAX_LEN);
1953                         return I40E_ERR_CONFIG;
1954                 }
1955         }
1956
1957         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1958             rxq->max_pkt_len > buf_size)
1959                 dev_data->scattered_rx = 1;
1960
1961         return 0;
1962 }
1963
1964 static int
1965 i40evf_rx_init(struct rte_eth_dev *dev)
1966 {
1967         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1968         uint16_t i;
1969         int ret = I40E_SUCCESS;
1970         struct i40e_rx_queue **rxq =
1971                 (struct i40e_rx_queue **)dev->data->rx_queues;
1972
1973         i40evf_config_rss(vf);
1974         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1975                 if (!rxq[i] || !rxq[i]->q_set)
1976                         continue;
1977                 ret = i40evf_rxq_init(dev, rxq[i]);
1978                 if (ret != I40E_SUCCESS)
1979                         break;
1980         }
1981         if (ret == I40E_SUCCESS)
1982                 i40e_set_rx_function(dev);
1983
1984         return ret;
1985 }
1986
1987 static void
1988 i40evf_tx_init(struct rte_eth_dev *dev)
1989 {
1990         uint16_t i;
1991         struct i40e_tx_queue **txq =
1992                 (struct i40e_tx_queue **)dev->data->tx_queues;
1993         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1994
1995         for (i = 0; i < dev->data->nb_tx_queues; i++)
1996                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1997
1998         i40e_set_tx_function(dev);
1999 }
2000
2001 static inline void
2002 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
2003 {
2004         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2005         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2006         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2007
2008         if (!rte_intr_allow_others(intr_handle)) {
2009                 I40E_WRITE_REG(hw,
2010                                I40E_VFINT_DYN_CTL01,
2011                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
2012                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
2013                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
2014                 I40EVF_WRITE_FLUSH(hw);
2015                 return;
2016         }
2017
2018         I40EVF_WRITE_FLUSH(hw);
2019 }
2020
2021 static inline void
2022 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
2023 {
2024         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2025         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2026         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2027
2028         if (!rte_intr_allow_others(intr_handle)) {
2029                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
2030                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
2031                 I40EVF_WRITE_FLUSH(hw);
2032                 return;
2033         }
2034
2035         I40EVF_WRITE_FLUSH(hw);
2036 }
2037
2038 static int
2039 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
2040 {
2041         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2042         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2043         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2044         uint16_t interval =
2045                 i40e_calc_itr_interval(0, 0);
2046         uint16_t msix_intr;
2047
2048         msix_intr = intr_handle->intr_vec[queue_id];
2049         if (msix_intr == I40E_MISC_VEC_ID)
2050                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
2051                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
2052                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
2053                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
2054                                (interval <<
2055                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
2056         else
2057                 I40E_WRITE_REG(hw,
2058                                I40E_VFINT_DYN_CTLN1(msix_intr -
2059                                                     I40E_RX_VEC_START),
2060                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
2061                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
2062                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
2063                                (interval <<
2064                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
2065
2066         I40EVF_WRITE_FLUSH(hw);
2067
2068         return 0;
2069 }
2070
2071 static int
2072 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
2073 {
2074         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2075         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2076         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2077         uint16_t msix_intr;
2078
2079         msix_intr = intr_handle->intr_vec[queue_id];
2080         if (msix_intr == I40E_MISC_VEC_ID)
2081                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
2082         else
2083                 I40E_WRITE_REG(hw,
2084                                I40E_VFINT_DYN_CTLN1(msix_intr -
2085                                                     I40E_RX_VEC_START),
2086                                0);
2087
2088         I40EVF_WRITE_FLUSH(hw);
2089
2090         return 0;
2091 }
2092
2093 static void
2094 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2095 {
2096         struct virtchnl_ether_addr_list *list;
2097         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2098         int err, i, j;
2099         int next_begin = 0;
2100         int begin = 0;
2101         uint32_t len;
2102         struct rte_ether_addr *addr;
2103         struct vf_cmd_info args;
2104
2105         do {
2106                 j = 0;
2107                 len = sizeof(struct virtchnl_ether_addr_list);
2108                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2109                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
2110                                 continue;
2111                         len += sizeof(struct virtchnl_ether_addr);
2112                         if (len >= I40E_AQ_BUF_SZ) {
2113                                 next_begin = i + 1;
2114                                 break;
2115                         }
2116                 }
2117
2118                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2119                 if (!list) {
2120                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2121                         return;
2122                 }
2123
2124                 for (i = begin; i < next_begin; i++) {
2125                         addr = &dev->data->mac_addrs[i];
2126                         if (rte_is_zero_ether_addr(addr))
2127                                 continue;
2128                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
2129                                          sizeof(addr->addr_bytes));
2130                         list->list[j].type = (j == 0 ?
2131                                               VIRTCHNL_ETHER_ADDR_PRIMARY :
2132                                               VIRTCHNL_ETHER_ADDR_EXTRA);
2133                         PMD_DRV_LOG(DEBUG, "add/rm mac:" RTE_ETHER_ADDR_PRT_FMT,
2134                                     addr->addr_bytes[0], addr->addr_bytes[1],
2135                                     addr->addr_bytes[2], addr->addr_bytes[3],
2136                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2137                         j++;
2138                 }
2139                 list->vsi_id = vf->vsi_res->vsi_id;
2140                 list->num_elements = j;
2141                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2142                            VIRTCHNL_OP_DEL_ETH_ADDR;
2143                 args.in_args = (uint8_t *)list;
2144                 args.in_args_size = len;
2145                 args.out_buffer = vf->aq_resp;
2146                 args.out_size = I40E_AQ_BUF_SZ;
2147                 err = i40evf_execute_vf_cmd(dev, &args);
2148                 if (err) {
2149                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2150                                     add ? "OP_ADD_ETHER_ADDRESS" :
2151                                     "OP_DEL_ETHER_ADDRESS");
2152                 } else {
2153                         if (add)
2154                                 vf->vsi.mac_num++;
2155                         else
2156                                 vf->vsi.mac_num--;
2157                 }
2158                 rte_free(list);
2159                 begin = next_begin;
2160         } while (begin < I40E_NUM_MACADDR_MAX);
2161 }
2162
2163 static int
2164 i40evf_dev_start(struct rte_eth_dev *dev)
2165 {
2166         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2167         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2168         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2169         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2170         uint32_t intr_vector = 0;
2171
2172         PMD_INIT_FUNC_TRACE();
2173
2174         hw->adapter_stopped = 0;
2175
2176         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2177         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2178                                         dev->data->nb_tx_queues);
2179
2180         /* check and configure queue intr-vector mapping */
2181         if (rte_intr_cap_multiple(intr_handle) &&
2182             dev->data->dev_conf.intr_conf.rxq) {
2183                 intr_vector = dev->data->nb_rx_queues;
2184                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2185                         return -1;
2186         }
2187
2188         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2189                 intr_handle->intr_vec =
2190                         rte_zmalloc("intr_vec",
2191                                     dev->data->nb_rx_queues * sizeof(int), 0);
2192                 if (!intr_handle->intr_vec) {
2193                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2194                                      " intr_vec", dev->data->nb_rx_queues);
2195                         return -ENOMEM;
2196                 }
2197         }
2198
2199         if (i40evf_rx_init(dev) != 0){
2200                 PMD_DRV_LOG(ERR, "failed to do RX init");
2201                 return -1;
2202         }
2203
2204         i40evf_tx_init(dev);
2205
2206         if (i40evf_configure_vsi_queues(dev) != 0) {
2207                 PMD_DRV_LOG(ERR, "configure queues failed");
2208                 goto err_queue;
2209         }
2210         if (i40evf_config_irq_map(dev)) {
2211                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2212                 goto err_queue;
2213         }
2214
2215         /* Set all mac addrs */
2216         i40evf_add_del_all_mac_addr(dev, TRUE);
2217         /* Set all multicast addresses */
2218         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2219                                 TRUE);
2220
2221         if (i40evf_start_queues(dev) != 0) {
2222                 PMD_DRV_LOG(ERR, "enable queues failed");
2223                 goto err_mac;
2224         }
2225
2226         /* only enable interrupt in rx interrupt mode */
2227         if (dev->data->dev_conf.intr_conf.rxq != 0)
2228                 rte_intr_enable(intr_handle);
2229
2230         i40evf_enable_queues_intr(dev);
2231
2232         return 0;
2233
2234 err_mac:
2235         i40evf_add_del_all_mac_addr(dev, FALSE);
2236         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2237                                 FALSE);
2238 err_queue:
2239         return -1;
2240 }
2241
2242 static int
2243 i40evf_dev_stop(struct rte_eth_dev *dev)
2244 {
2245         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2246         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2247         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2248         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2249
2250         PMD_INIT_FUNC_TRACE();
2251
2252         if (dev->data->dev_conf.intr_conf.rxq != 0)
2253                 rte_intr_disable(intr_handle);
2254
2255         if (hw->adapter_stopped == 1)
2256                 return 0;
2257         i40evf_stop_queues(dev);
2258         i40evf_disable_queues_intr(dev);
2259         i40e_dev_clear_queues(dev);
2260
2261         /* Clean datapath event and queue/vec mapping */
2262         rte_intr_efd_disable(intr_handle);
2263         if (intr_handle->intr_vec) {
2264                 rte_free(intr_handle->intr_vec);
2265                 intr_handle->intr_vec = NULL;
2266         }
2267         /* remove all mac addrs */
2268         i40evf_add_del_all_mac_addr(dev, FALSE);
2269         /* remove all multicast addresses */
2270         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2271                                 FALSE);
2272         hw->adapter_stopped = 1;
2273         dev->data->dev_started = 0;
2274
2275         return 0;
2276 }
2277
2278 static int
2279 i40evf_dev_link_update(struct rte_eth_dev *dev,
2280                        __rte_unused int wait_to_complete)
2281 {
2282         struct rte_eth_link new_link;
2283         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2284         /*
2285          * DPDK pf host provide interfacet to acquire link status
2286          * while Linux driver does not
2287          */
2288
2289         memset(&new_link, 0, sizeof(new_link));
2290         /* Linux driver PF host */
2291         switch (vf->link_speed) {
2292         case I40E_LINK_SPEED_100MB:
2293                 new_link.link_speed = ETH_SPEED_NUM_100M;
2294                 break;
2295         case I40E_LINK_SPEED_1GB:
2296                 new_link.link_speed = ETH_SPEED_NUM_1G;
2297                 break;
2298         case I40E_LINK_SPEED_10GB:
2299                 new_link.link_speed = ETH_SPEED_NUM_10G;
2300                 break;
2301         case I40E_LINK_SPEED_20GB:
2302                 new_link.link_speed = ETH_SPEED_NUM_20G;
2303                 break;
2304         case I40E_LINK_SPEED_25GB:
2305                 new_link.link_speed = ETH_SPEED_NUM_25G;
2306                 break;
2307         case I40E_LINK_SPEED_40GB:
2308                 new_link.link_speed = ETH_SPEED_NUM_40G;
2309                 break;
2310         default:
2311                 if (vf->link_up)
2312                         new_link.link_speed = ETH_SPEED_NUM_UNKNOWN;
2313                 else
2314                         new_link.link_speed = ETH_SPEED_NUM_NONE;
2315                 break;
2316         }
2317         /* full duplex only */
2318         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2319         new_link.link_status = vf->link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
2320         new_link.link_autoneg =
2321                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2322
2323         return rte_eth_linkstatus_set(dev, &new_link);
2324 }
2325
2326 static int
2327 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2328 {
2329         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2330
2331         return i40evf_config_promisc(dev, true, vf->promisc_multicast_enabled);
2332 }
2333
2334 static int
2335 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2336 {
2337         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2338
2339         return i40evf_config_promisc(dev, false, vf->promisc_multicast_enabled);
2340 }
2341
2342 static int
2343 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2344 {
2345         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2346
2347         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, true);
2348 }
2349
2350 static int
2351 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2352 {
2353         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2354
2355         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, false);
2356 }
2357
2358 static int
2359 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2360 {
2361         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2362
2363         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2364         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2365         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2366         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2367         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2368         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2369         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2370         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2371         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2372         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2373         dev_info->rx_queue_offload_capa = 0;
2374         dev_info->rx_offload_capa =
2375                 DEV_RX_OFFLOAD_VLAN_STRIP |
2376                 DEV_RX_OFFLOAD_QINQ_STRIP |
2377                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2378                 DEV_RX_OFFLOAD_UDP_CKSUM |
2379                 DEV_RX_OFFLOAD_TCP_CKSUM |
2380                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2381                 DEV_RX_OFFLOAD_SCATTER |
2382                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2383                 DEV_RX_OFFLOAD_VLAN_FILTER;
2384
2385         dev_info->tx_queue_offload_capa = 0;
2386         dev_info->tx_offload_capa =
2387                 DEV_TX_OFFLOAD_VLAN_INSERT |
2388                 DEV_TX_OFFLOAD_QINQ_INSERT |
2389                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2390                 DEV_TX_OFFLOAD_UDP_CKSUM |
2391                 DEV_TX_OFFLOAD_TCP_CKSUM |
2392                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2393                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2394                 DEV_TX_OFFLOAD_TCP_TSO |
2395                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2396                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2397                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2398                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2399                 DEV_TX_OFFLOAD_MULTI_SEGS;
2400
2401         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2402                 .rx_thresh = {
2403                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2404                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2405                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2406                 },
2407                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2408                 .rx_drop_en = 0,
2409                 .offloads = 0,
2410         };
2411
2412         dev_info->default_txconf = (struct rte_eth_txconf) {
2413                 .tx_thresh = {
2414                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2415                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2416                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2417                 },
2418                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2419                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2420                 .offloads = 0,
2421         };
2422
2423         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2424                 .nb_max = I40E_MAX_RING_DESC,
2425                 .nb_min = I40E_MIN_RING_DESC,
2426                 .nb_align = I40E_ALIGN_RING_DESC,
2427         };
2428
2429         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2430                 .nb_max = I40E_MAX_RING_DESC,
2431                 .nb_min = I40E_MIN_RING_DESC,
2432                 .nb_align = I40E_ALIGN_RING_DESC,
2433         };
2434
2435         return 0;
2436 }
2437
2438 static int
2439 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2440 {
2441         int ret;
2442         struct i40e_eth_stats *pstats = NULL;
2443         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2444         struct i40e_vsi *vsi = &vf->vsi;
2445
2446         ret = i40evf_query_stats(dev, &pstats);
2447         if (ret == 0) {
2448                 i40evf_update_stats(vsi, pstats);
2449
2450                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2451                                                 pstats->rx_broadcast;
2452                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2453                                                 pstats->tx_unicast;
2454                 stats->imissed = pstats->rx_discards;
2455                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2456                 stats->ibytes = pstats->rx_bytes;
2457                 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN;
2458                 stats->obytes = pstats->tx_bytes;
2459         } else {
2460                 PMD_DRV_LOG(ERR, "Get statistics failed");
2461         }
2462         return ret;
2463 }
2464
2465 static int
2466 i40evf_dev_close(struct rte_eth_dev *dev)
2467 {
2468         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2469         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2470         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2471         int ret;
2472
2473         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2474                 return 0;
2475
2476         ret = i40evf_dev_stop(dev);
2477
2478         i40e_dev_free_queues(dev);
2479         /*
2480          * disable promiscuous mode before reset vf
2481          * it is a workaround solution when work with kernel driver
2482          * and it is not the normal way
2483          */
2484         if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled)
2485                 i40evf_config_promisc(dev, false, false);
2486
2487         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2488
2489         i40evf_reset_vf(dev);
2490         i40e_shutdown_adminq(hw);
2491         i40evf_disable_irq0(hw);
2492
2493         /*
2494          * If the VF is reset via VFLR, the device will be knocked out of bus
2495          * master mode, and the driver will fail to recover from the reset. Fix
2496          * this by enabling bus mastering after every reset. In a non-VFLR case,
2497          * the bus master bit will not be disabled, and this call will have no
2498          * effect.
2499          */
2500         if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true))
2501                 vf->vf_reset = false;
2502
2503         rte_free(vf->vf_res);
2504         vf->vf_res = NULL;
2505         rte_free(vf->aq_resp);
2506         vf->aq_resp = NULL;
2507
2508         hw->adapter_closed = 1;
2509         return ret;
2510 }
2511
2512 /*
2513  * Reset VF device only to re-initialize resources in PMD layer
2514  */
2515 static int
2516 i40evf_dev_reset(struct rte_eth_dev *dev)
2517 {
2518         int ret;
2519
2520         ret = i40evf_dev_uninit(dev);
2521         if (ret)
2522                 return ret;
2523
2524         ret = i40evf_dev_init(dev);
2525
2526         return ret;
2527 }
2528
2529 static int
2530 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2531 {
2532         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2533         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2534         int ret;
2535
2536         if (!lut)
2537                 return -EINVAL;
2538
2539         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2540                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2541                                           lut, lut_size);
2542                 if (ret) {
2543                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2544                         return ret;
2545                 }
2546         } else {
2547                 uint32_t *lut_dw = (uint32_t *)lut;
2548                 uint16_t i, lut_size_dw = lut_size / 4;
2549
2550                 for (i = 0; i < lut_size_dw; i++)
2551                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2552         }
2553
2554         return 0;
2555 }
2556
2557 static int
2558 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2559 {
2560         struct i40e_vf *vf;
2561         struct i40e_hw *hw;
2562         int ret;
2563
2564         if (!vsi || !lut)
2565                 return -EINVAL;
2566
2567         vf = I40E_VSI_TO_VF(vsi);
2568         hw = I40E_VSI_TO_HW(vsi);
2569
2570         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2571                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2572                                           lut, lut_size);
2573                 if (ret) {
2574                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2575                         return ret;
2576                 }
2577         } else {
2578                 uint32_t *lut_dw = (uint32_t *)lut;
2579                 uint16_t i, lut_size_dw = lut_size / 4;
2580
2581                 for (i = 0; i < lut_size_dw; i++)
2582                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2583                 I40EVF_WRITE_FLUSH(hw);
2584         }
2585
2586         return 0;
2587 }
2588
2589 static int
2590 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2591                            struct rte_eth_rss_reta_entry64 *reta_conf,
2592                            uint16_t reta_size)
2593 {
2594         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2595         uint8_t *lut;
2596         uint16_t i, idx, shift;
2597         int ret;
2598
2599         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2600                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2601                         "(%d) doesn't match the number of hardware can "
2602                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2603                 return -EINVAL;
2604         }
2605
2606         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2607         if (!lut) {
2608                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2609                 return -ENOMEM;
2610         }
2611         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2612         if (ret)
2613                 goto out;
2614         for (i = 0; i < reta_size; i++) {
2615                 idx = i / RTE_RETA_GROUP_SIZE;
2616                 shift = i % RTE_RETA_GROUP_SIZE;
2617                 if (reta_conf[idx].mask & (1ULL << shift))
2618                         lut[i] = reta_conf[idx].reta[shift];
2619         }
2620         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2621
2622 out:
2623         rte_free(lut);
2624
2625         return ret;
2626 }
2627
2628 static int
2629 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2630                           struct rte_eth_rss_reta_entry64 *reta_conf,
2631                           uint16_t reta_size)
2632 {
2633         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2634         uint16_t i, idx, shift;
2635         uint8_t *lut;
2636         int ret;
2637
2638         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2639                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2640                         "(%d) doesn't match the number of hardware can "
2641                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2642                 return -EINVAL;
2643         }
2644
2645         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2646         if (!lut) {
2647                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2648                 return -ENOMEM;
2649         }
2650
2651         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2652         if (ret)
2653                 goto out;
2654         for (i = 0; i < reta_size; i++) {
2655                 idx = i / RTE_RETA_GROUP_SIZE;
2656                 shift = i % RTE_RETA_GROUP_SIZE;
2657                 if (reta_conf[idx].mask & (1ULL << shift))
2658                         reta_conf[idx].reta[shift] = lut[i];
2659         }
2660
2661 out:
2662         rte_free(lut);
2663
2664         return ret;
2665 }
2666
2667 static int
2668 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2669 {
2670         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2671         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2672         int ret = 0;
2673
2674         if (!key || key_len == 0) {
2675                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2676                 return 0;
2677         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2678                 sizeof(uint32_t)) {
2679                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2680                 return -EINVAL;
2681         }
2682
2683         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2684                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2685                         (struct i40e_aqc_get_set_rss_key_data *)key;
2686
2687                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2688                 if (ret)
2689                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2690                                      "via AQ");
2691         } else {
2692                 uint32_t *hash_key = (uint32_t *)key;
2693                 uint16_t i;
2694
2695                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2696                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2697                 I40EVF_WRITE_FLUSH(hw);
2698         }
2699
2700         return ret;
2701 }
2702
2703 static int
2704 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2705 {
2706         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2707         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2708         int ret;
2709
2710         if (!key || !key_len)
2711                 return -EINVAL;
2712
2713         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2714                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2715                         (struct i40e_aqc_get_set_rss_key_data *)key);
2716                 if (ret) {
2717                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2718                         return ret;
2719                 }
2720         } else {
2721                 uint32_t *key_dw = (uint32_t *)key;
2722                 uint16_t i;
2723
2724                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2725                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2726         }
2727         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2728
2729         return 0;
2730 }
2731
2732 static int
2733 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2734 {
2735         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2736         uint64_t hena;
2737         int ret;
2738
2739         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2740                                  rss_conf->rss_key_len);
2741         if (ret)
2742                 return ret;
2743
2744         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2745         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2746         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2747         I40EVF_WRITE_FLUSH(hw);
2748
2749         return 0;
2750 }
2751
2752 static void
2753 i40evf_disable_rss(struct i40e_vf *vf)
2754 {
2755         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2756
2757         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2758         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2759         I40EVF_WRITE_FLUSH(hw);
2760 }
2761
2762 static int
2763 i40evf_config_rss(struct i40e_vf *vf)
2764 {
2765         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2766         struct rte_eth_rss_conf rss_conf;
2767         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2768         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2769         uint16_t num;
2770         uint8_t *lut_info;
2771         int ret;
2772
2773         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2774                 i40evf_disable_rss(vf);
2775                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2776                 return 0;
2777         }
2778
2779         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2780         /* Fill out the look up table */
2781         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2782                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2783                         if (j >= num)
2784                                 j = 0;
2785                         lut = (lut << 8) | j;
2786                         if ((i & 3) == 3)
2787                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2788                 }
2789         } else {
2790                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2791                 if (!lut_info) {
2792                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2793                         return -ENOMEM;
2794                 }
2795
2796                 for (i = 0; i < rss_lut_size; i++)
2797                         lut_info[i] = i % num;
2798
2799                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2800                                          rss_lut_size);
2801                 rte_free(lut_info);
2802                 if (ret)
2803                         return ret;
2804         }
2805
2806         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2807         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2808                 i40evf_disable_rss(vf);
2809                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2810                 return 0;
2811         }
2812
2813         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2814                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2815                 /* Calculate the default hash key */
2816                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2817                         rss_key_default[i] = (uint32_t)rte_rand();
2818                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2819                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2820                         sizeof(uint32_t);
2821         }
2822
2823         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2824 }
2825
2826 static int
2827 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2828                            struct rte_eth_rss_conf *rss_conf)
2829 {
2830         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2831         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2832         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2833         uint64_t hena;
2834
2835         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2836         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2837
2838         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2839                 if (rss_hf != 0) /* Enable RSS */
2840                         return -EINVAL;
2841                 return 0;
2842         }
2843
2844         /* RSS enabled */
2845         if (rss_hf == 0) /* Disable RSS */
2846                 return -EINVAL;
2847
2848         return i40evf_hw_rss_hash_set(vf, rss_conf);
2849 }
2850
2851 static int
2852 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2853                              struct rte_eth_rss_conf *rss_conf)
2854 {
2855         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2856         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2857         uint64_t hena;
2858
2859         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2860                            &rss_conf->rss_key_len);
2861
2862         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2863         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2864         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2865
2866         return 0;
2867 }
2868
2869 static int
2870 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2871 {
2872         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2873         struct rte_eth_dev_data *dev_data = vf->dev_data;
2874         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2875         int ret = 0;
2876
2877         /* check if mtu is within the allowed range */
2878         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2879                 return -EINVAL;
2880
2881         /* mtu setting is forbidden if port is start */
2882         if (dev_data->dev_started) {
2883                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2884                             dev_data->port_id);
2885                 return -EBUSY;
2886         }
2887
2888         if (frame_size > I40E_ETH_MAX_LEN)
2889                 dev_data->dev_conf.rxmode.offloads |=
2890                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2891         else
2892                 dev_data->dev_conf.rxmode.offloads &=
2893                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2894         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2895
2896         return ret;
2897 }
2898
2899 static int
2900 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2901                             struct rte_ether_addr *mac_addr)
2902 {
2903         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2904         struct rte_ether_addr *old_addr;
2905         int ret;
2906
2907         old_addr = (struct rte_ether_addr *)hw->mac.addr;
2908
2909         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2910                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2911                 return -EINVAL;
2912         }
2913
2914         if (rte_is_same_ether_addr(old_addr, mac_addr))
2915                 return 0;
2916
2917         i40evf_add_del_eth_addr(dev, old_addr, FALSE, VIRTCHNL_ETHER_ADDR_PRIMARY);
2918
2919         ret = i40evf_add_del_eth_addr(dev, mac_addr, TRUE, VIRTCHNL_ETHER_ADDR_PRIMARY);
2920         if (ret)
2921                 return -EIO;
2922
2923         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2924         return 0;
2925 }
2926
2927 static int
2928 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2929                         struct rte_ether_addr *mc_addrs,
2930                         uint32_t mc_addrs_num, bool add)
2931 {
2932         struct virtchnl_ether_addr_list *list;
2933         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2934         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2935                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2936         uint32_t i;
2937         int err;
2938         struct vf_cmd_info args;
2939
2940         if (mc_addrs == NULL || mc_addrs_num == 0)
2941                 return 0;
2942
2943         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2944                 return -EINVAL;
2945
2946         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2947         list->vsi_id = vf->vsi_res->vsi_id;
2948         list->num_elements = mc_addrs_num;
2949
2950         for (i = 0; i < mc_addrs_num; i++) {
2951                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2952                         PMD_DRV_LOG(ERR, "Invalid mac:" RTE_ETHER_ADDR_PRT_FMT,
2953                                     mc_addrs[i].addr_bytes[0],
2954                                     mc_addrs[i].addr_bytes[1],
2955                                     mc_addrs[i].addr_bytes[2],
2956                                     mc_addrs[i].addr_bytes[3],
2957                                     mc_addrs[i].addr_bytes[4],
2958                                     mc_addrs[i].addr_bytes[5]);
2959                         return -EINVAL;
2960                 }
2961
2962                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2963                         sizeof(list->list[i].addr));
2964                 list->list[i].type = VIRTCHNL_ETHER_ADDR_EXTRA;
2965         }
2966
2967         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2968         args.in_args = cmd_buffer;
2969         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2970                 i * sizeof(struct virtchnl_ether_addr);
2971         args.out_buffer = vf->aq_resp;
2972         args.out_size = I40E_AQ_BUF_SZ;
2973         err = i40evf_execute_vf_cmd(dev, &args);
2974         if (err) {
2975                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2976                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2977                 return err;
2978         }
2979
2980         return 0;
2981 }
2982
2983 static int
2984 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2985                         struct rte_ether_addr *mc_addrs,
2986                         uint32_t mc_addrs_num)
2987 {
2988         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2989         int err;
2990
2991         /* flush previous addresses */
2992         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2993                                 FALSE);
2994         if (err)
2995                 return err;
2996
2997         vf->mc_addrs_num = 0;
2998
2999         /* add new ones */
3000         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
3001                                         TRUE);
3002         if (err)
3003                 return err;
3004
3005         vf->mc_addrs_num = mc_addrs_num;
3006         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
3007
3008         return 0;
3009 }
3010
3011 bool
3012 is_i40evf_supported(struct rte_eth_dev *dev)
3013 {
3014         return is_device_supported(dev, &rte_i40evf_pmd);
3015 }