drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 struct i40evf_arq_msg_info {
  48         enum virtchnl_ops ops;
  49         enum i40e_status_code result;
  50         uint16_t buf_len;
  51         uint16_t msg_len;
  52         uint8_t *msg;
  53 };
  54
  55 struct vf_cmd_info {
  56         enum virtchnl_ops ops;
  57         uint8_t *in_args;
  58         uint32_t in_args_size;
  59         uint8_t *out_buffer;
  60         /* Input & output type. pass in buffer size and pass out
  61          * actual return result
  62          */
  63         uint32_t out_size;
  64 };
  65
  66 enum i40evf_aq_result {
  67         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  68         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  69         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  70         I40EVF_MSG_CMD,      /* Read async command result */
  71 };
  72
  73 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  74 static int i40evf_dev_start(struct rte_eth_dev *dev);
  75 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  76 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  77                                 struct rte_eth_dev_info *dev_info);
  78 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  79                                   int wait_to_complete);
  80 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  81                                 struct rte_eth_stats *stats);
  82 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  83                                  struct rte_eth_xstat *xstats, unsigned n);
  84 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  85                                        struct rte_eth_xstat_name *xstats_names,
  86                                        unsigned limit);
  87 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  88 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  89                                   uint16_t vlan_id, int on);
  90 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  91 static void i40evf_dev_close(struct rte_eth_dev *dev);
  92 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  93 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  94 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  95 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  97 static int i40evf_init_vlan(struct rte_eth_dev *dev);
  98 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
  99                                      uint16_t rx_queue_id);
 100 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 101                                     uint16_t rx_queue_id);
 102 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 103                                      uint16_t tx_queue_id);
 104 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 105                                     uint16_t tx_queue_id);
 106 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 107                                struct ether_addr *addr,
 108                                uint32_t index,
 109                                uint32_t pool);
 110 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 111 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 112                         struct rte_eth_rss_reta_entry64 *reta_conf,
 113                         uint16_t reta_size);
 114 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_config_rss(struct i40e_vf *vf);
 118 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 119                                       struct rte_eth_rss_conf *rss_conf);
 120 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 121                                         struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 123 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 124                                         struct ether_addr *mac_addr);
 125 static int
 126 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 127 static int
 128 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 130                                    uint8_t *msg,
 131                                    uint16_t msglen);
 132
 133 /* Default hash key buffer for RSS */
 134 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 135
 136 struct rte_i40evf_xstats_name_off {
 137         char name[RTE_ETH_XSTATS_NAME_SIZE];
 138         unsigned offset;
 139 };
 140
 141 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 142         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 143         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 144         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 145         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 146         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 147         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 148                 rx_unknown_protocol)},
 149         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 150         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 151         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 152         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 153         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 154         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 155 };
 156
 157 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 158                 sizeof(rte_i40evf_stats_strings[0]))
 159
 160 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 161         .dev_configure        = i40evf_dev_configure,
 162         .dev_start            = i40evf_dev_start,
 163         .dev_stop             = i40evf_dev_stop,
 164         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 165         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 166         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 167         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 168         .link_update          = i40evf_dev_link_update,
 169         .stats_get            = i40evf_dev_stats_get,
 170         .stats_reset          = i40evf_dev_xstats_reset,
 171         .xstats_get           = i40evf_dev_xstats_get,
 172         .xstats_get_names     = i40evf_dev_xstats_get_names,
 173         .xstats_reset         = i40evf_dev_xstats_reset,
 174         .dev_close            = i40evf_dev_close,
 175         .dev_reset            = i40evf_dev_reset,
 176         .dev_infos_get        = i40evf_dev_info_get,
 177         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 178         .vlan_filter_set      = i40evf_vlan_filter_set,
 179         .vlan_offload_set     = i40evf_vlan_offload_set,
 180         .rx_queue_start       = i40evf_dev_rx_queue_start,
 181         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 182         .tx_queue_start       = i40evf_dev_tx_queue_start,
 183         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 184         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 185         .rx_queue_release     = i40e_dev_rx_queue_release,
 186         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 187         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 188         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 189         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 190         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 191         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 192         .tx_queue_release     = i40e_dev_tx_queue_release,
 193         .rx_queue_count       = i40e_dev_rx_queue_count,
 194         .rxq_info_get         = i40e_rxq_info_get,
 195         .txq_info_get         = i40e_txq_info_get,
 196         .mac_addr_add         = i40evf_add_mac_addr,
 197         .mac_addr_remove      = i40evf_del_mac_addr,
 198         .reta_update          = i40evf_dev_rss_reta_update,
 199         .reta_query           = i40evf_dev_rss_reta_query,
 200         .rss_hash_update      = i40evf_dev_rss_hash_update,
 201         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 202         .mtu_set              = i40evf_dev_mtu_set,
 203         .mac_addr_set         = i40evf_set_default_mac_addr,
 204 };
 205
 206 /*
 207  * Read data in admin queue to get msg from pf driver
 208  */
 209 static enum i40evf_aq_result
 210 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 211 {
 212         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 213         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 214         struct i40e_arq_event_info event;
 215         enum virtchnl_ops opcode;
 216         enum i40e_status_code retval;
 217         int ret;
 218         enum i40evf_aq_result result = I40EVF_MSG_NON;
 219
 220         event.buf_len = data->buf_len;
 221         event.msg_buf = data->msg;
 222         ret = i40e_clean_arq_element(hw, &event, NULL);
 223         /* Can't read any msg from adminQ */
 224         if (ret) {
 225                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 226                         result = I40EVF_MSG_ERR;
 227                 return result;
 228         }
 229
 230         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 231         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 232         /* pf sys event */
 233         if (opcode == VIRTCHNL_OP_EVENT) {
 234                 struct virtchnl_pf_event *vpe =
 235                         (struct virtchnl_pf_event *)event.msg_buf;
 236
 237                 result = I40EVF_MSG_SYS;
 238                 switch (vpe->event) {
 239                 case VIRTCHNL_EVENT_LINK_CHANGE:
 240                         vf->link_up =
 241                                 vpe->event_data.link_event.link_status;
 242                         vf->link_speed =
 243                                 vpe->event_data.link_event.link_speed;
 244                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 245                         PMD_DRV_LOG(INFO, "Link status update:%s",
 246                                     vf->link_up ? "up" : "down");
 247                         break;
 248                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 249                         vf->vf_reset = true;
 250                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 251                         PMD_DRV_LOG(INFO, "vf is reseting");
 252                         break;
 253                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 254                         vf->dev_closed = true;
 255                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 256                         PMD_DRV_LOG(INFO, "PF driver closed");
 257                         break;
 258                 default:
 259                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 260                                     __func__, vpe->event);
 261                 }
 262         } else {
 263                 /* async reply msg on command issued by vf previously */
 264                 result = I40EVF_MSG_CMD;
 265                 /* Actual data length read from PF */
 266                 data->msg_len = event.msg_len;
 267         }
 268
 269         data->result = retval;
 270         data->ops = opcode;
 271
 272         return result;
 273 }
 274
 275 /**
 276  * clear current command. Only call in case execute
 277  * _atomic_set_cmd successfully.
 278  */
 279 static inline void
 280 _clear_cmd(struct i40e_vf *vf)
 281 {
 282         rte_wmb();
 283         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 284 }
 285
 286 /*
 287  * Check there is pending cmd in execution. If none, set new command.
 288  */
 289 static inline int
 290 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 291 {
 292         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 293                         VIRTCHNL_OP_UNKNOWN, ops);
 294
 295         if (!ret)
 296                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 297
 298         return !ret;
 299 }
 300
 301 #define MAX_TRY_TIMES 200
 302 #define ASQ_DELAY_MS  10
 303
 304 static int
 305 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 306 {
 307         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 308         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 309         struct i40evf_arq_msg_info info;
 310         enum i40evf_aq_result ret;
 311         int err, i = 0;
 312
 313         if (_atomic_set_cmd(vf, args->ops))
 314                 return -1;
 315
 316         info.msg = args->out_buffer;
 317         info.buf_len = args->out_size;
 318         info.ops = VIRTCHNL_OP_UNKNOWN;
 319         info.result = I40E_SUCCESS;
 320
 321         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 322                      args->in_args, args->in_args_size, NULL);
 323         if (err) {
 324                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 325                 _clear_cmd(vf);
 326                 return err;
 327         }
 328
 329         switch (args->ops) {
 330         case VIRTCHNL_OP_RESET_VF:
 331                 /*no need to process in this function */
 332                 err = 0;
 333                 break;
 334         case VIRTCHNL_OP_VERSION:
 335         case VIRTCHNL_OP_GET_VF_RESOURCES:
 336                 /* for init adminq commands, need to poll the response */
 337                 err = -1;
 338                 do {
 339                         ret = i40evf_read_pfmsg(dev, &info);
 340                         vf->cmd_retval = info.result;
 341                         if (ret == I40EVF_MSG_CMD) {
 342                                 err = 0;
 343                                 break;
 344                         } else if (ret == I40EVF_MSG_ERR)
 345                                 break;
 346                         rte_delay_ms(ASQ_DELAY_MS);
 347                         /* If don't read msg or read sys event, continue */
 348                 } while (i++ < MAX_TRY_TIMES);
 349                 _clear_cmd(vf);
 350                 break;
 351
 352         default:
 353                 /* for other adminq in running time, waiting the cmd done flag */
 354                 err = -1;
 355                 do {
 356                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 357                                 err = 0;
 358                                 break;
 359                         }
 360                         rte_delay_ms(ASQ_DELAY_MS);
 361                         /* If don't read msg or read sys event, continue */
 362                 } while (i++ < MAX_TRY_TIMES);
 363                 /* If there's no response is received, clear command */
 364                 if (i >= MAX_TRY_TIMES) {
 365                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 366                         _clear_cmd(vf);
 367                 }
 368                 break;
 369         }
 370
 371         return err | vf->cmd_retval;
 372 }
 373
 374 /*
 375  * Check API version with sync wait until version read or fail from admin queue
 376  */
 377 static int
 378 i40evf_check_api_version(struct rte_eth_dev *dev)
 379 {
 380         struct virtchnl_version_info version, *pver;
 381         int err;
 382         struct vf_cmd_info args;
 383         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 384
 385         version.major = VIRTCHNL_VERSION_MAJOR;
 386         version.minor = VIRTCHNL_VERSION_MINOR;
 387
 388         args.ops = VIRTCHNL_OP_VERSION;
 389         args.in_args = (uint8_t *)&version;
 390         args.in_args_size = sizeof(version);
 391         args.out_buffer = vf->aq_resp;
 392         args.out_size = I40E_AQ_BUF_SZ;
 393
 394         err = i40evf_execute_vf_cmd(dev, &args);
 395         if (err) {
 396                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 397                 return err;
 398         }
 399
 400         pver = (struct virtchnl_version_info *)args.out_buffer;
 401         vf->version_major = pver->major;
 402         vf->version_minor = pver->minor;
 403         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 404                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 405                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 406         else {
 407                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 408                                         vf->version_major, vf->version_minor,
 409                                                 VIRTCHNL_VERSION_MAJOR,
 410                                                 VIRTCHNL_VERSION_MINOR);
 411                 return -1;
 412         }
 413
 414         return 0;
 415 }
 416
 417 static int
 418 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 419 {
 420         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 421         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 422         int err;
 423         struct vf_cmd_info args;
 424         uint32_t caps, len;
 425
 426         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 427         args.out_buffer = vf->aq_resp;
 428         args.out_size = I40E_AQ_BUF_SZ;
 429         if (PF_IS_V11(vf)) {
 430                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 431                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 432                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 433                        VIRTCHNL_VF_OFFLOAD_VLAN |
 434                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 435                 args.in_args = (uint8_t *)&caps;
 436                 args.in_args_size = sizeof(caps);
 437         } else {
 438                 args.in_args = NULL;
 439                 args.in_args_size = 0;
 440         }
 441         err = i40evf_execute_vf_cmd(dev, &args);
 442
 443         if (err) {
 444                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 445                 return err;
 446         }
 447
 448         len =  sizeof(struct virtchnl_vf_resource) +
 449                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 450
 451         rte_memcpy(vf->vf_res, args.out_buffer,
 452                         RTE_MIN(args.out_size, len));
 453         i40e_vf_parse_hw_config(hw, vf->vf_res);
 454
 455         return 0;
 456 }
 457
 458 static int
 459 i40evf_config_promisc(struct rte_eth_dev *dev,
 460                       bool enable_unicast,
 461                       bool enable_multicast)
 462 {
 463         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 464         int err;
 465         struct vf_cmd_info args;
 466         struct virtchnl_promisc_info promisc;
 467
 468         promisc.flags = 0;
 469         promisc.vsi_id = vf->vsi_res->vsi_id;
 470
 471         if (enable_unicast)
 472                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 473
 474         if (enable_multicast)
 475                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 476
 477         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 478         args.in_args = (uint8_t *)&promisc;
 479         args.in_args_size = sizeof(promisc);
 480         args.out_buffer = vf->aq_resp;
 481         args.out_size = I40E_AQ_BUF_SZ;
 482
 483         err = i40evf_execute_vf_cmd(dev, &args);
 484
 485         if (err)
 486                 PMD_DRV_LOG(ERR, "fail to execute command "
 487                             "CONFIG_PROMISCUOUS_MODE");
 488         return err;
 489 }
 490
 491 static int
 492 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 493 {
 494         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 495         struct vf_cmd_info args;
 496         int ret;
 497
 498         memset(&args, 0, sizeof(args));
 499         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 500         args.in_args = NULL;
 501         args.in_args_size = 0;
 502         args.out_buffer = vf->aq_resp;
 503         args.out_size = I40E_AQ_BUF_SZ;
 504         ret = i40evf_execute_vf_cmd(dev, &args);
 505         if (ret)
 506                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 507                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 508
 509         return ret;
 510 }
 511
 512 static int
 513 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 514 {
 515         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 516         struct vf_cmd_info args;
 517         int ret;
 518
 519         memset(&args, 0, sizeof(args));
 520         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 521         args.in_args = NULL;
 522         args.in_args_size = 0;
 523         args.out_buffer = vf->aq_resp;
 524         args.out_size = I40E_AQ_BUF_SZ;
 525         ret = i40evf_execute_vf_cmd(dev, &args);
 526         if (ret)
 527                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 528                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 529
 530         return ret;
 531 }
 532
 533 static void
 534 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 535                                   uint16_t vsi_id,
 536                                   uint16_t queue_id,
 537                                   uint16_t nb_txq,
 538                                   struct i40e_tx_queue *txq)
 539 {
 540         txq_info->vsi_id = vsi_id;
 541         txq_info->queue_id = queue_id;
 542         if (queue_id < nb_txq) {
 543                 txq_info->ring_len = txq->nb_tx_desc;
 544                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 545         }
 546 }
 547
 548 static void
 549 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 550                                   uint16_t vsi_id,
 551                                   uint16_t queue_id,
 552                                   uint16_t nb_rxq,
 553                                   uint32_t max_pkt_size,
 554                                   struct i40e_rx_queue *rxq)
 555 {
 556         rxq_info->vsi_id = vsi_id;
 557         rxq_info->queue_id = queue_id;
 558         rxq_info->max_pkt_size = max_pkt_size;
 559         if (queue_id < nb_rxq) {
 560                 rxq_info->ring_len = rxq->nb_rx_desc;
 561                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 562                 rxq_info->databuffer_size =
 563                         (rte_pktmbuf_data_room_size(rxq->mp) -
 564                                 RTE_PKTMBUF_HEADROOM);
 565         }
 566 }
 567
 568 static int
 569 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 570 {
 571         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 572         struct i40e_rx_queue **rxq =
 573                 (struct i40e_rx_queue **)dev->data->rx_queues;
 574         struct i40e_tx_queue **txq =
 575                 (struct i40e_tx_queue **)dev->data->tx_queues;
 576         struct virtchnl_vsi_queue_config_info *vc_vqci;
 577         struct virtchnl_queue_pair_info *vc_qpi;
 578         struct vf_cmd_info args;
 579         uint16_t i, nb_qp = vf->num_queue_pairs;
 580         const uint32_t size =
 581                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 582         uint8_t buff[size];
 583         int ret;
 584
 585         memset(buff, 0, sizeof(buff));
 586         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 587         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 588         vc_vqci->num_queue_pairs = nb_qp;
 589
 590         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 591                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 592                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 593                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 594                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 595                                         vf->max_pkt_len, rxq[i]);
 596         }
 597         memset(&args, 0, sizeof(args));
 598         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 599         args.in_args = (uint8_t *)vc_vqci;
 600         args.in_args_size = size;
 601         args.out_buffer = vf->aq_resp;
 602         args.out_size = I40E_AQ_BUF_SZ;
 603         ret = i40evf_execute_vf_cmd(dev, &args);
 604         if (ret)
 605                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 606                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 607
 608         return ret;
 609 }
 610
 611 static int
 612 i40evf_config_irq_map(struct rte_eth_dev *dev)
 613 {
 614         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 615         struct vf_cmd_info args;
 616         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 617                 sizeof(struct virtchnl_vector_map)];
 618         struct virtchnl_irq_map_info *map_info;
 619         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 620         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 621         uint32_t vector_id;
 622         int i, err;
 623
 624         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 625             rte_intr_allow_others(intr_handle))
 626                 vector_id = I40E_RX_VEC_START;
 627         else
 628                 vector_id = I40E_MISC_VEC_ID;
 629
 630         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 631         map_info->num_vectors = 1;
 632         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 633         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 634         /* Alway use default dynamic MSIX interrupt */
 635         map_info->vecmap[0].vector_id = vector_id;
 636         /* Don't map any tx queue */
 637         map_info->vecmap[0].txq_map = 0;
 638         map_info->vecmap[0].rxq_map = 0;
 639         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 640                 map_info->vecmap[0].rxq_map |= 1 << i;
 641                 if (rte_intr_dp_is_en(intr_handle))
 642                         intr_handle->intr_vec[i] = vector_id;
 643         }
 644
 645         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 646         args.in_args = (u8 *)cmd_buffer;
 647         args.in_args_size = sizeof(cmd_buffer);
 648         args.out_buffer = vf->aq_resp;
 649         args.out_size = I40E_AQ_BUF_SZ;
 650         err = i40evf_execute_vf_cmd(dev, &args);
 651         if (err)
 652                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 653
 654         return err;
 655 }
 656
 657 static int
 658 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 659                                 bool on)
 660 {
 661         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 662         struct virtchnl_queue_select queue_select;
 663         int err;
 664         struct vf_cmd_info args;
 665         memset(&queue_select, 0, sizeof(queue_select));
 666         queue_select.vsi_id = vf->vsi_res->vsi_id;
 667
 668         if (isrx)
 669                 queue_select.rx_queues |= 1 << qid;
 670         else
 671                 queue_select.tx_queues |= 1 << qid;
 672
 673         if (on)
 674                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 675         else
 676                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 677         args.in_args = (u8 *)&queue_select;
 678         args.in_args_size = sizeof(queue_select);
 679         args.out_buffer = vf->aq_resp;
 680         args.out_size = I40E_AQ_BUF_SZ;
 681         err = i40evf_execute_vf_cmd(dev, &args);
 682         if (err)
 683                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 684                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 685
 686         return err;
 687 }
 688
 689 static int
 690 i40evf_start_queues(struct rte_eth_dev *dev)
 691 {
 692         struct rte_eth_dev_data *dev_data = dev->data;
 693         int i;
 694         struct i40e_rx_queue *rxq;
 695         struct i40e_tx_queue *txq;
 696
 697         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 698                 rxq = dev_data->rx_queues[i];
 699                 if (rxq->rx_deferred_start)
 700                         continue;
 701                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 702                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 703                         return -1;
 704                 }
 705         }
 706
 707         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 708                 txq = dev_data->tx_queues[i];
 709                 if (txq->tx_deferred_start)
 710                         continue;
 711                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 712                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 713                         return -1;
 714                 }
 715         }
 716
 717         return 0;
 718 }
 719
 720 static int
 721 i40evf_stop_queues(struct rte_eth_dev *dev)
 722 {
 723         int i;
 724
 725         /* Stop TX queues first */
 726         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 727                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 728                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 729                         return -1;
 730                 }
 731         }
 732
 733         /* Then stop RX queues */
 734         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 735                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 736                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 737                         return -1;
 738                 }
 739         }
 740
 741         return 0;
 742 }
 743
 744 static int
 745 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 746                     struct ether_addr *addr,
 747                     __rte_unused uint32_t index,
 748                     __rte_unused uint32_t pool)
 749 {
 750         struct virtchnl_ether_addr_list *list;
 751         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 752         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 753                         sizeof(struct virtchnl_ether_addr)];
 754         int err;
 755         struct vf_cmd_info args;
 756
 757         if (is_zero_ether_addr(addr)) {
 758                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 759                             addr->addr_bytes[0], addr->addr_bytes[1],
 760                             addr->addr_bytes[2], addr->addr_bytes[3],
 761                             addr->addr_bytes[4], addr->addr_bytes[5]);
 762                 return I40E_ERR_INVALID_MAC_ADDR;
 763         }
 764
 765         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 766         list->vsi_id = vf->vsi_res->vsi_id;
 767         list->num_elements = 1;
 768         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 769                                         sizeof(addr->addr_bytes));
 770
 771         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 772         args.in_args = cmd_buffer;
 773         args.in_args_size = sizeof(cmd_buffer);
 774         args.out_buffer = vf->aq_resp;
 775         args.out_size = I40E_AQ_BUF_SZ;
 776         err = i40evf_execute_vf_cmd(dev, &args);
 777         if (err)
 778                 PMD_DRV_LOG(ERR, "fail to execute command "
 779                             "OP_ADD_ETHER_ADDRESS");
 780         else
 781                 vf->vsi.mac_num++;
 782
 783         return err;
 784 }
 785
 786 static void
 787 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 788                             struct ether_addr *addr)
 789 {
 790         struct virtchnl_ether_addr_list *list;
 791         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 792         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 793                         sizeof(struct virtchnl_ether_addr)];
 794         int err;
 795         struct vf_cmd_info args;
 796
 797         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 798                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 799                             addr->addr_bytes[0], addr->addr_bytes[1],
 800                             addr->addr_bytes[2], addr->addr_bytes[3],
 801                             addr->addr_bytes[4], addr->addr_bytes[5]);
 802                 return;
 803         }
 804
 805         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 806         list->vsi_id = vf->vsi_res->vsi_id;
 807         list->num_elements = 1;
 808         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 809                         sizeof(addr->addr_bytes));
 810
 811         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 812         args.in_args = cmd_buffer;
 813         args.in_args_size = sizeof(cmd_buffer);
 814         args.out_buffer = vf->aq_resp;
 815         args.out_size = I40E_AQ_BUF_SZ;
 816         err = i40evf_execute_vf_cmd(dev, &args);
 817         if (err)
 818                 PMD_DRV_LOG(ERR, "fail to execute command "
 819                             "OP_DEL_ETHER_ADDRESS");
 820         else
 821                 vf->vsi.mac_num--;
 822         return;
 823 }
 824
 825 static void
 826 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 827 {
 828         struct rte_eth_dev_data *data = dev->data;
 829         struct ether_addr *addr;
 830
 831         addr = &data->mac_addrs[index];
 832
 833         i40evf_del_mac_addr_by_addr(dev, addr);
 834 }
 835
 836 static int
 837 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 838 {
 839         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 840         struct virtchnl_queue_select q_stats;
 841         int err;
 842         struct vf_cmd_info args;
 843
 844         memset(&q_stats, 0, sizeof(q_stats));
 845         q_stats.vsi_id = vf->vsi_res->vsi_id;
 846         args.ops = VIRTCHNL_OP_GET_STATS;
 847         args.in_args = (u8 *)&q_stats;
 848         args.in_args_size = sizeof(q_stats);
 849         args.out_buffer = vf->aq_resp;
 850         args.out_size = I40E_AQ_BUF_SZ;
 851
 852         err = i40evf_execute_vf_cmd(dev, &args);
 853         if (err) {
 854                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 855                 *pstats = NULL;
 856                 return err;
 857         }
 858         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 859         return 0;
 860 }
 861
 862 static void
 863 i40evf_stat_update_48(uint64_t *offset,
 864                    uint64_t *stat)
 865 {
 866         if (*stat >= *offset)
 867                 *stat = *stat - *offset;
 868         else
 869                 *stat = (uint64_t)((*stat +
 870                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 871
 872         *stat &= I40E_48_BIT_MASK;
 873 }
 874
 875 static void
 876 i40evf_stat_update_32(uint64_t *offset,
 877                    uint64_t *stat)
 878 {
 879         if (*stat >= *offset)
 880                 *stat = (uint64_t)(*stat - *offset);
 881         else
 882                 *stat = (uint64_t)((*stat +
 883                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 884 }
 885
 886 static void
 887 i40evf_update_stats(struct i40e_vsi *vsi,
 888                                         struct i40e_eth_stats *nes)
 889 {
 890         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 891
 892         i40evf_stat_update_48(&oes->rx_bytes,
 893                             &nes->rx_bytes);
 894         i40evf_stat_update_48(&oes->rx_unicast,
 895                             &nes->rx_unicast);
 896         i40evf_stat_update_48(&oes->rx_multicast,
 897                             &nes->rx_multicast);
 898         i40evf_stat_update_48(&oes->rx_broadcast,
 899                             &nes->rx_broadcast);
 900         i40evf_stat_update_32(&oes->rx_discards,
 901                                 &nes->rx_discards);
 902         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 903                             &nes->rx_unknown_protocol);
 904         i40evf_stat_update_48(&oes->tx_bytes,
 905                             &nes->tx_bytes);
 906         i40evf_stat_update_48(&oes->tx_unicast,
 907                             &nes->tx_unicast);
 908         i40evf_stat_update_48(&oes->tx_multicast,
 909                             &nes->tx_multicast);
 910         i40evf_stat_update_48(&oes->tx_broadcast,
 911                             &nes->tx_broadcast);
 912         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 913         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 914 }
 915
 916 static void
 917 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 918 {
 919         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 920         struct i40e_eth_stats *pstats = NULL;
 921
 922         /* read stat values to clear hardware registers */
 923         i40evf_query_stats(dev, &pstats);
 924
 925         /* set stats offset base on current values */
 926         vf->vsi.eth_stats_offset = *pstats;
 927 }
 928
 929 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 930                                       struct rte_eth_xstat_name *xstats_names,
 931                                       __rte_unused unsigned limit)
 932 {
 933         unsigned i;
 934
 935         if (xstats_names != NULL)
 936                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 937                         snprintf(xstats_names[i].name,
 938                                 sizeof(xstats_names[i].name),
 939                                 "%s", rte_i40evf_stats_strings[i].name);
 940                 }
 941         return I40EVF_NB_XSTATS;
 942 }
 943
 944 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 945                                  struct rte_eth_xstat *xstats, unsigned n)
 946 {
 947         int ret;
 948         unsigned i;
 949         struct i40e_eth_stats *pstats = NULL;
 950         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 951         struct i40e_vsi *vsi = &vf->vsi;
 952
 953         if (n < I40EVF_NB_XSTATS)
 954                 return I40EVF_NB_XSTATS;
 955
 956         ret = i40evf_query_stats(dev, &pstats);
 957         if (ret != 0)
 958                 return 0;
 959
 960         if (!xstats)
 961                 return 0;
 962
 963         i40evf_update_stats(vsi, pstats);
 964
 965         /* loop over xstats array and values from pstats */
 966         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 967                 xstats[i].id = i;
 968                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
 969                         rte_i40evf_stats_strings[i].offset);
 970         }
 971
 972         return I40EVF_NB_XSTATS;
 973 }
 974
 975 static int
 976 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 977 {
 978         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 979         struct virtchnl_vlan_filter_list *vlan_list;
 980         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
 981                                                         sizeof(uint16_t)];
 982         int err;
 983         struct vf_cmd_info args;
 984
 985         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
 986         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 987         vlan_list->num_elements = 1;
 988         vlan_list->vlan_id[0] = vlanid;
 989
 990         args.ops = VIRTCHNL_OP_ADD_VLAN;
 991         args.in_args = (u8 *)&cmd_buffer;
 992         args.in_args_size = sizeof(cmd_buffer);
 993         args.out_buffer = vf->aq_resp;
 994         args.out_size = I40E_AQ_BUF_SZ;
 995         err = i40evf_execute_vf_cmd(dev, &args);
 996         if (err)
 997                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
 998
 999         return err;
1000 }
1001
1002 static int
1003 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1004 {
1005         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1006         struct virtchnl_vlan_filter_list *vlan_list;
1007         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1008                                                         sizeof(uint16_t)];
1009         int err;
1010         struct vf_cmd_info args;
1011
1012         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1013         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1014         vlan_list->num_elements = 1;
1015         vlan_list->vlan_id[0] = vlanid;
1016
1017         args.ops = VIRTCHNL_OP_DEL_VLAN;
1018         args.in_args = (u8 *)&cmd_buffer;
1019         args.in_args_size = sizeof(cmd_buffer);
1020         args.out_buffer = vf->aq_resp;
1021         args.out_size = I40E_AQ_BUF_SZ;
1022         err = i40evf_execute_vf_cmd(dev, &args);
1023         if (err)
1024                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1025
1026         return err;
1027 }
1028
1029 static const struct rte_pci_id pci_id_i40evf_map[] = {
1030         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1031         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1032         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1033         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1034         { .vendor_id = 0, /* sentinel */ },
1035 };
1036
1037 static inline int
1038 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1039                                     struct rte_eth_link *link)
1040 {
1041         struct rte_eth_link *dst = &(dev->data->dev_link);
1042         struct rte_eth_link *src = link;
1043
1044         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1045                                         *(uint64_t *)src) == 0)
1046                 return -1;
1047
1048         return 0;
1049 }
1050
1051 /* Disable IRQ0 */
1052 static inline void
1053 i40evf_disable_irq0(struct i40e_hw *hw)
1054 {
1055         /* Disable all interrupt types */
1056         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1057         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1058                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1059         I40EVF_WRITE_FLUSH(hw);
1060 }
1061
1062 /* Enable IRQ0 */
1063 static inline void
1064 i40evf_enable_irq0(struct i40e_hw *hw)
1065 {
1066         /* Enable admin queue interrupt trigger */
1067         uint32_t val;
1068
1069         i40evf_disable_irq0(hw);
1070         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1071         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1072                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1073         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1074
1075         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1076                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1077                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1078                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1079
1080         I40EVF_WRITE_FLUSH(hw);
1081 }
1082
1083 static int
1084 i40evf_check_vf_reset_done(struct i40e_hw *hw)
1085 {
1086         int i, reset;
1087
1088         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1089                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1090                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1091                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1092                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1093                     reset == VIRTCHNL_VFR_COMPLETED)
1094                         break;
1095                 rte_delay_ms(50);
1096         }
1097
1098         if (i >= MAX_RESET_WAIT_CNT)
1099                 return -1;
1100
1101         return 0;
1102 }
1103 static int
1104 i40evf_reset_vf(struct i40e_hw *hw)
1105 {
1106         int ret;
1107
1108         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1109                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1110                 return -1;
1111         }
1112         /**
1113           * After issuing vf reset command to pf, pf won't necessarily
1114           * reset vf, it depends on what state it exactly is. If it's not
1115           * initialized yet, it won't have vf reset since it's in a certain
1116           * state. If not, it will try to reset. Even vf is reset, pf will
1117           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1118           * it to ACTIVE. In this duration, vf may not catch the moment that
1119           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1120           */
1121         rte_delay_ms(200);
1122
1123         ret = i40evf_check_vf_reset_done(hw);
1124         if (ret) {
1125                 PMD_INIT_LOG(ERR, "VF is still resetting");
1126                 return ret;
1127         }
1128
1129         return 0;
1130 }
1131
1132 static int
1133 i40evf_init_vf(struct rte_eth_dev *dev)
1134 {
1135         int i, err, bufsz;
1136         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1137         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1138         uint16_t interval =
1139                 i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
1140
1141         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1142         vf->dev_data = dev->data;
1143         err = i40e_set_mac_type(hw);
1144         if (err) {
1145                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1146                 goto err;
1147         }
1148
1149         err = i40evf_check_vf_reset_done(hw);
1150         if (err)
1151                 goto err;
1152
1153         i40e_init_adminq_parameter(hw);
1154         err = i40e_init_adminq(hw);
1155         if (err) {
1156                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1157                 goto err;
1158         }
1159
1160         /* Reset VF and wait until it's complete */
1161         if (i40evf_reset_vf(hw)) {
1162                 PMD_INIT_LOG(ERR, "reset NIC failed");
1163                 goto err_aq;
1164         }
1165
1166         /* VF reset, shutdown admin queue and initialize again */
1167         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1168                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1169                 goto err;
1170         }
1171
1172         i40e_init_adminq_parameter(hw);
1173         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1174                 PMD_INIT_LOG(ERR, "init_adminq failed");
1175                 goto err;
1176         }
1177
1178         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1179         if (!vf->aq_resp) {
1180                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1181                 goto err_aq;
1182         }
1183         if (i40evf_check_api_version(dev) != 0) {
1184                 PMD_INIT_LOG(ERR, "check_api version failed");
1185                 goto err_api;
1186         }
1187         bufsz = sizeof(struct virtchnl_vf_resource) +
1188                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1189         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1190         if (!vf->vf_res) {
1191                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1192                 goto err_api;
1193         }
1194
1195         if (i40evf_get_vf_resource(dev) != 0) {
1196                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1197                 goto err_alloc;
1198         }
1199
1200         /* got VF config message back from PF, now we can parse it */
1201         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1202                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1203                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1204         }
1205
1206         if (!vf->vsi_res) {
1207                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1208                 goto err_alloc;
1209         }
1210
1211         if (hw->mac.type == I40E_MAC_X722_VF)
1212                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1213         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1214
1215         switch (vf->vsi_res->vsi_type) {
1216         case VIRTCHNL_VSI_SRIOV:
1217                 vf->vsi.type = I40E_VSI_SRIOV;
1218                 break;
1219         default:
1220                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1221                 break;
1222         }
1223         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1224         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1225
1226         /* Store the MAC address configured by host, or generate random one */
1227         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1228                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1229         else
1230                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1231
1232         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1233                        (I40E_ITR_INDEX_DEFAULT <<
1234                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1235                        (interval <<
1236                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1237         I40EVF_WRITE_FLUSH(hw);
1238
1239         return 0;
1240
1241 err_alloc:
1242         rte_free(vf->vf_res);
1243         vf->vsi_res = NULL;
1244 err_api:
1245         rte_free(vf->aq_resp);
1246 err_aq:
1247         i40e_shutdown_adminq(hw); /* ignore error */
1248 err:
1249         return -1;
1250 }
1251
1252 static int
1253 i40evf_uninit_vf(struct rte_eth_dev *dev)
1254 {
1255         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1256         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1257
1258         PMD_INIT_FUNC_TRACE();
1259
1260         if (hw->adapter_stopped == 0)
1261                 i40evf_dev_close(dev);
1262         rte_free(vf->vf_res);
1263         vf->vf_res = NULL;
1264         rte_free(vf->aq_resp);
1265         vf->aq_resp = NULL;
1266
1267         return 0;
1268 }
1269
1270 static void
1271 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1272                 __rte_unused uint16_t msglen)
1273 {
1274         struct virtchnl_pf_event *pf_msg =
1275                         (struct virtchnl_pf_event *)msg;
1276         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1277
1278         switch (pf_msg->event) {
1279         case VIRTCHNL_EVENT_RESET_IMPENDING:
1280                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1281                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1282                                               NULL, NULL);
1283                 break;
1284         case VIRTCHNL_EVENT_LINK_CHANGE:
1285                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1286                 vf->link_up = pf_msg->event_data.link_event.link_status;
1287                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1288                 break;
1289         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1290                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1291                 break;
1292         default:
1293                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1294                 break;
1295         }
1296 }
1297
1298 static void
1299 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1300 {
1301         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1302         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1303         struct i40e_arq_event_info info;
1304         uint16_t pending, aq_opc;
1305         enum virtchnl_ops msg_opc;
1306         enum i40e_status_code msg_ret;
1307         int ret;
1308
1309         info.buf_len = I40E_AQ_BUF_SZ;
1310         if (!vf->aq_resp) {
1311                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1312                 return;
1313         }
1314         info.msg_buf = vf->aq_resp;
1315
1316         pending = 1;
1317         while (pending) {
1318                 ret = i40e_clean_arq_element(hw, &info, &pending);
1319
1320                 if (ret != I40E_SUCCESS) {
1321                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1322                                     "ret: %d", ret);
1323                         break;
1324                 }
1325                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1326                 /* For the message sent from pf to vf, opcode is stored in
1327                  * cookie_high of struct i40e_aq_desc, while return error code
1328                  * are stored in cookie_low, Which is done by
1329                  * i40e_aq_send_msg_to_vf in PF driver.*/
1330                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1331                                                   info.desc.cookie_high);
1332                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1333                                                   info.desc.cookie_low);
1334                 switch (aq_opc) {
1335                 case i40e_aqc_opc_send_msg_to_vf:
1336                         if (msg_opc == VIRTCHNL_OP_EVENT)
1337                                 /* process event*/
1338                                 i40evf_handle_pf_event(dev, info.msg_buf,
1339                                                        info.msg_len);
1340                         else {
1341                                 /* read message and it's expected one */
1342                                 if (msg_opc == vf->pend_cmd) {
1343                                         vf->cmd_retval = msg_ret;
1344                                         /* prevent compiler reordering */
1345                                         rte_compiler_barrier();
1346                                         _clear_cmd(vf);
1347                                 } else
1348                                         PMD_DRV_LOG(ERR, "command mismatch,"
1349                                                 "expect %u, get %u",
1350                                                 vf->pend_cmd, msg_opc);
1351                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1352                                              " opcode = %d", msg_opc);
1353                         }
1354                         break;
1355                 default:
1356                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1357                                     aq_opc);
1358                         break;
1359                 }
1360         }
1361 }
1362
1363 /**
1364  * Interrupt handler triggered by NIC  for handling
1365  * specific interrupt. Only adminq interrupt is processed in VF.
1366  *
1367  * @param handle
1368  *  Pointer to interrupt handle.
1369  * @param param
1370  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1371  *
1372  * @return
1373  *  void
1374  */
1375 static void
1376 i40evf_dev_interrupt_handler(void *param)
1377 {
1378         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1379         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1380         uint32_t icr0;
1381
1382         i40evf_disable_irq0(hw);
1383
1384         /* read out interrupt causes */
1385         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1386
1387         /* No interrupt event indicated */
1388         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1389                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1390                 goto done;
1391         }
1392
1393         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1394                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1395                 i40evf_handle_aq_msg(dev);
1396         }
1397
1398         /* Link Status Change interrupt */
1399         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1400                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1401                                    " do nothing");
1402
1403 done:
1404         i40evf_enable_irq0(hw);
1405 }
1406
1407 static int
1408 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1409 {
1410         struct i40e_hw *hw
1411                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1412         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1413
1414         PMD_INIT_FUNC_TRACE();
1415
1416         /* assign ops func pointer */
1417         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1418         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1419         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1420
1421         /*
1422          * For secondary processes, we don't initialise any further as primary
1423          * has already done this work.
1424          */
1425         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1426                 i40e_set_rx_function(eth_dev);
1427                 i40e_set_tx_function(eth_dev);
1428                 return 0;
1429         }
1430         i40e_set_default_ptype_table(eth_dev);
1431         i40e_set_default_pctype_table(eth_dev);
1432         rte_eth_copy_pci_info(eth_dev, pci_dev);
1433
1434         hw->vendor_id = pci_dev->id.vendor_id;
1435         hw->device_id = pci_dev->id.device_id;
1436         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1437         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1438         hw->bus.device = pci_dev->addr.devid;
1439         hw->bus.func = pci_dev->addr.function;
1440         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1441         hw->adapter_stopped = 0;
1442
1443         if(i40evf_init_vf(eth_dev) != 0) {
1444                 PMD_INIT_LOG(ERR, "Init vf failed");
1445                 return -1;
1446         }
1447
1448         /* register callback func to eal lib */
1449         rte_intr_callback_register(&pci_dev->intr_handle,
1450                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1451
1452         /* enable uio intr after callback register */
1453         rte_intr_enable(&pci_dev->intr_handle);
1454
1455         /* configure and enable device interrupt */
1456         i40evf_enable_irq0(hw);
1457
1458         /* copy mac addr */
1459         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1460                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1461                                         0);
1462         if (eth_dev->data->mac_addrs == NULL) {
1463                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1464                                 " store MAC addresses",
1465                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1466                 return -ENOMEM;
1467         }
1468         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1469                         &eth_dev->data->mac_addrs[0]);
1470
1471         return 0;
1472 }
1473
1474 static int
1475 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1476 {
1477         PMD_INIT_FUNC_TRACE();
1478
1479         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1480                 return -EPERM;
1481
1482         eth_dev->dev_ops = NULL;
1483         eth_dev->rx_pkt_burst = NULL;
1484         eth_dev->tx_pkt_burst = NULL;
1485
1486         if (i40evf_uninit_vf(eth_dev) != 0) {
1487                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1488                 return -1;
1489         }
1490
1491         rte_free(eth_dev->data->mac_addrs);
1492         eth_dev->data->mac_addrs = NULL;
1493
1494         return 0;
1495 }
1496
1497 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1498         struct rte_pci_device *pci_dev)
1499 {
1500         return rte_eth_dev_pci_generic_probe(pci_dev,
1501                 sizeof(struct i40e_adapter), i40evf_dev_init);
1502 }
1503
1504 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1505 {
1506         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1507 }
1508
1509 /*
1510  * virtual function driver struct
1511  */
1512 static struct rte_pci_driver rte_i40evf_pmd = {
1513         .id_table = pci_id_i40evf_map,
1514         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1515         .probe = eth_i40evf_pci_probe,
1516         .remove = eth_i40evf_pci_remove,
1517 };
1518
1519 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1520 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1521 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1522
1523 static int
1524 i40evf_dev_configure(struct rte_eth_dev *dev)
1525 {
1526         struct i40e_adapter *ad =
1527                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1528         struct rte_eth_conf *conf = &dev->data->dev_conf;
1529         struct i40e_vf *vf;
1530
1531         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1532          * allocation or vector Rx preconditions we will reset it.
1533          */
1534         ad->rx_bulk_alloc_allowed = true;
1535         ad->rx_vec_allowed = true;
1536         ad->tx_simple_allowed = true;
1537         ad->tx_vec_allowed = true;
1538
1539         /* For non-DPDK PF drivers, VF has no ability to disable HW
1540          * CRC strip, and is implicitly enabled by the PF.
1541          */
1542         if (!conf->rxmode.hw_strip_crc) {
1543                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1544                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1545                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1546                         /* Peer is running non-DPDK PF driver. */
1547                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1548                         return -EINVAL;
1549                 }
1550         }
1551
1552         return i40evf_init_vlan(dev);
1553 }
1554
1555 static int
1556 i40evf_init_vlan(struct rte_eth_dev *dev)
1557 {
1558         /* Apply vlan offload setting */
1559         return i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1560 }
1561
1562 static int
1563 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1564 {
1565         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1566
1567         /* Vlan stripping setting */
1568         if (mask & ETH_VLAN_STRIP_MASK) {
1569                 /* Enable or disable VLAN stripping */
1570                 if (dev_conf->rxmode.hw_vlan_strip)
1571                         i40evf_enable_vlan_strip(dev);
1572                 else
1573                         i40evf_disable_vlan_strip(dev);
1574         }
1575
1576         return 0;
1577 }
1578
1579 static int
1580 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1581 {
1582         struct i40e_rx_queue *rxq;
1583         int err = 0;
1584         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1585
1586         PMD_INIT_FUNC_TRACE();
1587
1588         if (rx_queue_id < dev->data->nb_rx_queues) {
1589                 rxq = dev->data->rx_queues[rx_queue_id];
1590
1591                 err = i40e_alloc_rx_queue_mbufs(rxq);
1592                 if (err) {
1593                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1594                         return err;
1595                 }
1596
1597                 rte_wmb();
1598
1599                 /* Init the RX tail register. */
1600                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1601                 I40EVF_WRITE_FLUSH(hw);
1602
1603                 /* Ready to switch the queue on */
1604                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1605
1606                 if (err)
1607                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1608                                     rx_queue_id);
1609                 else
1610                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1611         }
1612
1613         return err;
1614 }
1615
1616 static int
1617 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1618 {
1619         struct i40e_rx_queue *rxq;
1620         int err;
1621
1622         if (rx_queue_id < dev->data->nb_rx_queues) {
1623                 rxq = dev->data->rx_queues[rx_queue_id];
1624
1625                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1626
1627                 if (err) {
1628                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1629                                     rx_queue_id);
1630                         return err;
1631                 }
1632
1633                 i40e_rx_queue_release_mbufs(rxq);
1634                 i40e_reset_rx_queue(rxq);
1635                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1636         }
1637
1638         return 0;
1639 }
1640
1641 static int
1642 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1643 {
1644         int err = 0;
1645
1646         PMD_INIT_FUNC_TRACE();
1647
1648         if (tx_queue_id < dev->data->nb_tx_queues) {
1649
1650                 /* Ready to switch the queue on */
1651                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1652
1653                 if (err)
1654                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1655                                     tx_queue_id);
1656                 else
1657                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1658         }
1659
1660         return err;
1661 }
1662
1663 static int
1664 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1665 {
1666         struct i40e_tx_queue *txq;
1667         int err;
1668
1669         if (tx_queue_id < dev->data->nb_tx_queues) {
1670                 txq = dev->data->tx_queues[tx_queue_id];
1671
1672                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1673
1674                 if (err) {
1675                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1676                                     tx_queue_id);
1677                         return err;
1678                 }
1679
1680                 i40e_tx_queue_release_mbufs(txq);
1681                 i40e_reset_tx_queue(txq);
1682                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1683         }
1684
1685         return 0;
1686 }
1687
1688 static int
1689 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1690 {
1691         int ret;
1692
1693         if (on)
1694                 ret = i40evf_add_vlan(dev, vlan_id);
1695         else
1696                 ret = i40evf_del_vlan(dev,vlan_id);
1697
1698         return ret;
1699 }
1700
1701 static int
1702 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1703 {
1704         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1705         struct rte_eth_dev_data *dev_data = dev->data;
1706         struct rte_pktmbuf_pool_private *mbp_priv;
1707         uint16_t buf_size, len;
1708
1709         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1710         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1711         I40EVF_WRITE_FLUSH(hw);
1712
1713         /* Calculate the maximum packet length allowed */
1714         mbp_priv = rte_mempool_get_priv(rxq->mp);
1715         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1716                                         RTE_PKTMBUF_HEADROOM);
1717         rxq->hs_mode = i40e_header_split_none;
1718         rxq->rx_hdr_len = 0;
1719         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1720         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1721         rxq->max_pkt_len = RTE_MIN(len,
1722                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1723
1724         /**
1725          * Check if the jumbo frame and maximum packet length are set correctly
1726          */
1727         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1728                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1729                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1730                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1731                                 "larger than %u and smaller than %u, as jumbo "
1732                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1733                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1734                         return I40E_ERR_CONFIG;
1735                 }
1736         } else {
1737                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1738                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1739                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1740                                 "larger than %u and smaller than %u, as jumbo "
1741                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1742                                                 (uint32_t)ETHER_MAX_LEN);
1743                         return I40E_ERR_CONFIG;
1744                 }
1745         }
1746
1747         if (dev_data->dev_conf.rxmode.enable_scatter ||
1748             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1749                 dev_data->scattered_rx = 1;
1750         }
1751
1752         return 0;
1753 }
1754
1755 static int
1756 i40evf_rx_init(struct rte_eth_dev *dev)
1757 {
1758         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1759         uint16_t i;
1760         int ret = I40E_SUCCESS;
1761         struct i40e_rx_queue **rxq =
1762                 (struct i40e_rx_queue **)dev->data->rx_queues;
1763
1764         i40evf_config_rss(vf);
1765         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1766                 if (!rxq[i] || !rxq[i]->q_set)
1767                         continue;
1768                 ret = i40evf_rxq_init(dev, rxq[i]);
1769                 if (ret != I40E_SUCCESS)
1770                         break;
1771         }
1772         if (ret == I40E_SUCCESS)
1773                 i40e_set_rx_function(dev);
1774
1775         return ret;
1776 }
1777
1778 static void
1779 i40evf_tx_init(struct rte_eth_dev *dev)
1780 {
1781         uint16_t i;
1782         struct i40e_tx_queue **txq =
1783                 (struct i40e_tx_queue **)dev->data->tx_queues;
1784         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1785
1786         for (i = 0; i < dev->data->nb_tx_queues; i++)
1787                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1788
1789         i40e_set_tx_function(dev);
1790 }
1791
1792 static inline void
1793 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1794 {
1795         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1796         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1797         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1798
1799         if (!rte_intr_allow_others(intr_handle)) {
1800                 I40E_WRITE_REG(hw,
1801                                I40E_VFINT_DYN_CTL01,
1802                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1803                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1804                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1805                 I40EVF_WRITE_FLUSH(hw);
1806                 return;
1807         }
1808
1809         I40EVF_WRITE_FLUSH(hw);
1810 }
1811
1812 static inline void
1813 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1814 {
1815         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1816         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1817         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1818
1819         if (!rte_intr_allow_others(intr_handle)) {
1820                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1821                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1822                 I40EVF_WRITE_FLUSH(hw);
1823                 return;
1824         }
1825
1826         I40EVF_WRITE_FLUSH(hw);
1827 }
1828
1829 static int
1830 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1831 {
1832         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1833         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1834         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1835         uint16_t interval =
1836                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1837         uint16_t msix_intr;
1838
1839         msix_intr = intr_handle->intr_vec[queue_id];
1840         if (msix_intr == I40E_MISC_VEC_ID)
1841                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1842                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1843                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1844                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1845                                (interval <<
1846                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1847         else
1848                 I40E_WRITE_REG(hw,
1849                                I40E_VFINT_DYN_CTLN1(msix_intr -
1850                                                     I40E_RX_VEC_START),
1851                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1852                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1853                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1854                                (interval <<
1855                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1856
1857         I40EVF_WRITE_FLUSH(hw);
1858
1859         rte_intr_enable(&pci_dev->intr_handle);
1860
1861         return 0;
1862 }
1863
1864 static int
1865 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1866 {
1867         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1868         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1869         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1870         uint16_t msix_intr;
1871
1872         msix_intr = intr_handle->intr_vec[queue_id];
1873         if (msix_intr == I40E_MISC_VEC_ID)
1874                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1875         else
1876                 I40E_WRITE_REG(hw,
1877                                I40E_VFINT_DYN_CTLN1(msix_intr -
1878                                                     I40E_RX_VEC_START),
1879                                0);
1880
1881         I40EVF_WRITE_FLUSH(hw);
1882
1883         return 0;
1884 }
1885
1886 static void
1887 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1888 {
1889         struct virtchnl_ether_addr_list *list;
1890         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1891         int err, i, j;
1892         int next_begin = 0;
1893         int begin = 0;
1894         uint32_t len;
1895         struct ether_addr *addr;
1896         struct vf_cmd_info args;
1897
1898         do {
1899                 j = 0;
1900                 len = sizeof(struct virtchnl_ether_addr_list);
1901                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1902                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1903                                 continue;
1904                         len += sizeof(struct virtchnl_ether_addr);
1905                         if (len >= I40E_AQ_BUF_SZ) {
1906                                 next_begin = i + 1;
1907                                 break;
1908                         }
1909                 }
1910
1911                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1912                 if (!list) {
1913                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1914                         return;
1915                 }
1916
1917                 for (i = begin; i < next_begin; i++) {
1918                         addr = &dev->data->mac_addrs[i];
1919                         if (is_zero_ether_addr(addr))
1920                                 continue;
1921                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1922                                          sizeof(addr->addr_bytes));
1923                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1924                                     addr->addr_bytes[0], addr->addr_bytes[1],
1925                                     addr->addr_bytes[2], addr->addr_bytes[3],
1926                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1927                         j++;
1928                 }
1929                 list->vsi_id = vf->vsi_res->vsi_id;
1930                 list->num_elements = j;
1931                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1932                            VIRTCHNL_OP_DEL_ETH_ADDR;
1933                 args.in_args = (uint8_t *)list;
1934                 args.in_args_size = len;
1935                 args.out_buffer = vf->aq_resp;
1936                 args.out_size = I40E_AQ_BUF_SZ;
1937                 err = i40evf_execute_vf_cmd(dev, &args);
1938                 if (err) {
1939                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1940                                     add ? "OP_ADD_ETHER_ADDRESS" :
1941                                     "OP_DEL_ETHER_ADDRESS");
1942                 } else {
1943                         if (add)
1944                                 vf->vsi.mac_num++;
1945                         else
1946                                 vf->vsi.mac_num--;
1947                 }
1948                 rte_free(list);
1949                 begin = next_begin;
1950         } while (begin < I40E_NUM_MACADDR_MAX);
1951 }
1952
1953 static int
1954 i40evf_dev_start(struct rte_eth_dev *dev)
1955 {
1956         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1957         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1958         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1959         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1960         uint32_t intr_vector = 0;
1961
1962         PMD_INIT_FUNC_TRACE();
1963
1964         hw->adapter_stopped = 0;
1965
1966         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1967         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1968                                         dev->data->nb_tx_queues);
1969
1970         /* check and configure queue intr-vector mapping */
1971         if (dev->data->dev_conf.intr_conf.rxq != 0) {
1972                 intr_vector = dev->data->nb_rx_queues;
1973                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1974                         return -1;
1975         }
1976
1977         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1978                 intr_handle->intr_vec =
1979                         rte_zmalloc("intr_vec",
1980                                     dev->data->nb_rx_queues * sizeof(int), 0);
1981                 if (!intr_handle->intr_vec) {
1982                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1983                                      " intr_vec", dev->data->nb_rx_queues);
1984                         return -ENOMEM;
1985                 }
1986         }
1987
1988         if (i40evf_rx_init(dev) != 0){
1989                 PMD_DRV_LOG(ERR, "failed to do RX init");
1990                 return -1;
1991         }
1992
1993         i40evf_tx_init(dev);
1994
1995         if (i40evf_configure_vsi_queues(dev) != 0) {
1996                 PMD_DRV_LOG(ERR, "configure queues failed");
1997                 goto err_queue;
1998         }
1999         if (i40evf_config_irq_map(dev)) {
2000                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2001                 goto err_queue;
2002         }
2003
2004         /* Set all mac addrs */
2005         i40evf_add_del_all_mac_addr(dev, TRUE);
2006
2007         if (i40evf_start_queues(dev) != 0) {
2008                 PMD_DRV_LOG(ERR, "enable queues failed");
2009                 goto err_mac;
2010         }
2011
2012         /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt
2013          * is mapped to VFIO vector 0 in i40evf_dev_init( ).
2014          * If previous VFIO interrupt mapping set in i40evf_dev_init( ) is
2015          * not cleared, it will fail when rte_intr_enable( ) tries to map Rx
2016          * queue interrupt to other VFIO vectors.
2017          * So clear uio/vfio intr/evevnfd first to avoid failure.
2018          */
2019         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2020                 rte_intr_disable(intr_handle);
2021                 rte_intr_enable(intr_handle);
2022         }
2023
2024         i40evf_enable_queues_intr(dev);
2025
2026         return 0;
2027
2028 err_mac:
2029         i40evf_add_del_all_mac_addr(dev, FALSE);
2030 err_queue:
2031         return -1;
2032 }
2033
2034 static void
2035 i40evf_dev_stop(struct rte_eth_dev *dev)
2036 {
2037         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2038         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2039         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2040
2041         PMD_INIT_FUNC_TRACE();
2042
2043         if (hw->adapter_stopped == 1)
2044                 return;
2045         i40evf_stop_queues(dev);
2046         i40evf_disable_queues_intr(dev);
2047         i40e_dev_clear_queues(dev);
2048
2049         /* Clean datapath event and queue/vec mapping */
2050         rte_intr_efd_disable(intr_handle);
2051         if (intr_handle->intr_vec) {
2052                 rte_free(intr_handle->intr_vec);
2053                 intr_handle->intr_vec = NULL;
2054         }
2055         /* remove all mac addrs */
2056         i40evf_add_del_all_mac_addr(dev, FALSE);
2057         hw->adapter_stopped = 1;
2058
2059 }
2060
2061 static int
2062 i40evf_dev_link_update(struct rte_eth_dev *dev,
2063                        __rte_unused int wait_to_complete)
2064 {
2065         struct rte_eth_link new_link;
2066         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2067         /*
2068          * DPDK pf host provide interfacet to acquire link status
2069          * while Linux driver does not
2070          */
2071
2072         /* Linux driver PF host */
2073         switch (vf->link_speed) {
2074         case I40E_LINK_SPEED_100MB:
2075                 new_link.link_speed = ETH_SPEED_NUM_100M;
2076                 break;
2077         case I40E_LINK_SPEED_1GB:
2078                 new_link.link_speed = ETH_SPEED_NUM_1G;
2079                 break;
2080         case I40E_LINK_SPEED_10GB:
2081                 new_link.link_speed = ETH_SPEED_NUM_10G;
2082                 break;
2083         case I40E_LINK_SPEED_20GB:
2084                 new_link.link_speed = ETH_SPEED_NUM_20G;
2085                 break;
2086         case I40E_LINK_SPEED_25GB:
2087                 new_link.link_speed = ETH_SPEED_NUM_25G;
2088                 break;
2089         case I40E_LINK_SPEED_40GB:
2090                 new_link.link_speed = ETH_SPEED_NUM_40G;
2091                 break;
2092         default:
2093                 new_link.link_speed = ETH_SPEED_NUM_100M;
2094                 break;
2095         }
2096         /* full duplex only */
2097         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2098         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2099                                              ETH_LINK_DOWN;
2100         new_link.link_autoneg =
2101                 dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED;
2102
2103         i40evf_dev_atomic_write_link_status(dev, &new_link);
2104
2105         return 0;
2106 }
2107
2108 static void
2109 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2110 {
2111         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2112         int ret;
2113
2114         /* If enabled, just return */
2115         if (vf->promisc_unicast_enabled)
2116                 return;
2117
2118         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2119         if (ret == 0)
2120                 vf->promisc_unicast_enabled = TRUE;
2121 }
2122
2123 static void
2124 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2125 {
2126         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2127         int ret;
2128
2129         /* If disabled, just return */
2130         if (!vf->promisc_unicast_enabled)
2131                 return;
2132
2133         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2134         if (ret == 0)
2135                 vf->promisc_unicast_enabled = FALSE;
2136 }
2137
2138 static void
2139 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2140 {
2141         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2142         int ret;
2143
2144         /* If enabled, just return */
2145         if (vf->promisc_multicast_enabled)
2146                 return;
2147
2148         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2149         if (ret == 0)
2150                 vf->promisc_multicast_enabled = TRUE;
2151 }
2152
2153 static void
2154 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2155 {
2156         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2157         int ret;
2158
2159         /* If enabled, just return */
2160         if (!vf->promisc_multicast_enabled)
2161                 return;
2162
2163         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2164         if (ret == 0)
2165                 vf->promisc_multicast_enabled = FALSE;
2166 }
2167
2168 static void
2169 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2170 {
2171         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2172
2173         memset(dev_info, 0, sizeof(*dev_info));
2174         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2175         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2176         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2177         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2178         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2179         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2180         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2181         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2182         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2183         dev_info->rx_offload_capa =
2184                 DEV_RX_OFFLOAD_VLAN_STRIP |
2185                 DEV_RX_OFFLOAD_QINQ_STRIP |
2186                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2187                 DEV_RX_OFFLOAD_UDP_CKSUM |
2188                 DEV_RX_OFFLOAD_TCP_CKSUM;
2189         dev_info->tx_offload_capa =
2190                 DEV_TX_OFFLOAD_VLAN_INSERT |
2191                 DEV_TX_OFFLOAD_QINQ_INSERT |
2192                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2193                 DEV_TX_OFFLOAD_UDP_CKSUM |
2194                 DEV_TX_OFFLOAD_TCP_CKSUM |
2195                 DEV_TX_OFFLOAD_SCTP_CKSUM;
2196
2197         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2198                 .rx_thresh = {
2199                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2200                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2201                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2202                 },
2203                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2204                 .rx_drop_en = 0,
2205         };
2206
2207         dev_info->default_txconf = (struct rte_eth_txconf) {
2208                 .tx_thresh = {
2209                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2210                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2211                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2212                 },
2213                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2214                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2215                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2216                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2217         };
2218
2219         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2220                 .nb_max = I40E_MAX_RING_DESC,
2221                 .nb_min = I40E_MIN_RING_DESC,
2222                 .nb_align = I40E_ALIGN_RING_DESC,
2223         };
2224
2225         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2226                 .nb_max = I40E_MAX_RING_DESC,
2227                 .nb_min = I40E_MIN_RING_DESC,
2228                 .nb_align = I40E_ALIGN_RING_DESC,
2229         };
2230 }
2231
2232 static int
2233 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2234 {
2235         int ret;
2236         struct i40e_eth_stats *pstats = NULL;
2237         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2238         struct i40e_vsi *vsi = &vf->vsi;
2239
2240         ret = i40evf_query_stats(dev, &pstats);
2241         if (ret == 0) {
2242                 i40evf_update_stats(vsi, pstats);
2243
2244                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2245                                                 pstats->rx_broadcast;
2246                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2247                                                 pstats->tx_unicast;
2248                 stats->imissed = pstats->rx_discards;
2249                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2250                 stats->ibytes = pstats->rx_bytes;
2251                 stats->obytes = pstats->tx_bytes;
2252         } else {
2253                 PMD_DRV_LOG(ERR, "Get statistics failed");
2254         }
2255         return ret;
2256 }
2257
2258 static void
2259 i40evf_dev_close(struct rte_eth_dev *dev)
2260 {
2261         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2262         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2263         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2264
2265         i40evf_dev_stop(dev);
2266         i40e_dev_free_queues(dev);
2267         i40evf_reset_vf(hw);
2268         i40e_shutdown_adminq(hw);
2269         /* disable uio intr before callback unregister */
2270         rte_intr_disable(intr_handle);
2271
2272         /* unregister callback func from eal lib */
2273         rte_intr_callback_unregister(intr_handle,
2274                                      i40evf_dev_interrupt_handler, dev);
2275         i40evf_disable_irq0(hw);
2276 }
2277
2278 /*
2279  * Reset VF device only to re-initialize resources in PMD layer
2280  */
2281 static int
2282 i40evf_dev_reset(struct rte_eth_dev *dev)
2283 {
2284         int ret;
2285
2286         ret = i40evf_dev_uninit(dev);
2287         if (ret)
2288                 return ret;
2289
2290         ret = i40evf_dev_init(dev);
2291
2292         return ret;
2293 }
2294
2295 static int
2296 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2297 {
2298         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2299         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2300         int ret;
2301
2302         if (!lut)
2303                 return -EINVAL;
2304
2305         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2306                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2307                                           lut, lut_size);
2308                 if (ret) {
2309                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2310                         return ret;
2311                 }
2312         } else {
2313                 uint32_t *lut_dw = (uint32_t *)lut;
2314                 uint16_t i, lut_size_dw = lut_size / 4;
2315
2316                 for (i = 0; i < lut_size_dw; i++)
2317                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2318         }
2319
2320         return 0;
2321 }
2322
2323 static int
2324 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2325 {
2326         struct i40e_vf *vf;
2327         struct i40e_hw *hw;
2328         int ret;
2329
2330         if (!vsi || !lut)
2331                 return -EINVAL;
2332
2333         vf = I40E_VSI_TO_VF(vsi);
2334         hw = I40E_VSI_TO_HW(vsi);
2335
2336         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2337                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2338                                           lut, lut_size);
2339                 if (ret) {
2340                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2341                         return ret;
2342                 }
2343         } else {
2344                 uint32_t *lut_dw = (uint32_t *)lut;
2345                 uint16_t i, lut_size_dw = lut_size / 4;
2346
2347                 for (i = 0; i < lut_size_dw; i++)
2348                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2349                 I40EVF_WRITE_FLUSH(hw);
2350         }
2351
2352         return 0;
2353 }
2354
2355 static int
2356 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2357                            struct rte_eth_rss_reta_entry64 *reta_conf,
2358                            uint16_t reta_size)
2359 {
2360         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2361         uint8_t *lut;
2362         uint16_t i, idx, shift;
2363         int ret;
2364
2365         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2366                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2367                         "(%d) doesn't match the number of hardware can "
2368                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2369                 return -EINVAL;
2370         }
2371
2372         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2373         if (!lut) {
2374                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2375                 return -ENOMEM;
2376         }
2377         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2378         if (ret)
2379                 goto out;
2380         for (i = 0; i < reta_size; i++) {
2381                 idx = i / RTE_RETA_GROUP_SIZE;
2382                 shift = i % RTE_RETA_GROUP_SIZE;
2383                 if (reta_conf[idx].mask & (1ULL << shift))
2384                         lut[i] = reta_conf[idx].reta[shift];
2385         }
2386         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2387
2388 out:
2389         rte_free(lut);
2390
2391         return ret;
2392 }
2393
2394 static int
2395 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2396                           struct rte_eth_rss_reta_entry64 *reta_conf,
2397                           uint16_t reta_size)
2398 {
2399         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2400         uint16_t i, idx, shift;
2401         uint8_t *lut;
2402         int ret;
2403
2404         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2405                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2406                         "(%d) doesn't match the number of hardware can "
2407                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2408                 return -EINVAL;
2409         }
2410
2411         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2412         if (!lut) {
2413                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2414                 return -ENOMEM;
2415         }
2416
2417         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2418         if (ret)
2419                 goto out;
2420         for (i = 0; i < reta_size; i++) {
2421                 idx = i / RTE_RETA_GROUP_SIZE;
2422                 shift = i % RTE_RETA_GROUP_SIZE;
2423                 if (reta_conf[idx].mask & (1ULL << shift))
2424                         reta_conf[idx].reta[shift] = lut[i];
2425         }
2426
2427 out:
2428         rte_free(lut);
2429
2430         return ret;
2431 }
2432
2433 static int
2434 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2435 {
2436         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2437         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2438         int ret = 0;
2439
2440         if (!key || key_len == 0) {
2441                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2442                 return 0;
2443         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2444                 sizeof(uint32_t)) {
2445                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2446                 return -EINVAL;
2447         }
2448
2449         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2450                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2451                         (struct i40e_aqc_get_set_rss_key_data *)key;
2452
2453                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2454                 if (ret)
2455                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2456                                      "via AQ");
2457         } else {
2458                 uint32_t *hash_key = (uint32_t *)key;
2459                 uint16_t i;
2460
2461                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2462                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2463                 I40EVF_WRITE_FLUSH(hw);
2464         }
2465
2466         return ret;
2467 }
2468
2469 static int
2470 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2471 {
2472         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2473         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2474         int ret;
2475
2476         if (!key || !key_len)
2477                 return -EINVAL;
2478
2479         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2480                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2481                         (struct i40e_aqc_get_set_rss_key_data *)key);
2482                 if (ret) {
2483                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2484                         return ret;
2485                 }
2486         } else {
2487                 uint32_t *key_dw = (uint32_t *)key;
2488                 uint16_t i;
2489
2490                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2491                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2492         }
2493         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2494
2495         return 0;
2496 }
2497
2498 static int
2499 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2500 {
2501         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2502         uint64_t hena;
2503         int ret;
2504
2505         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2506                                  rss_conf->rss_key_len);
2507         if (ret)
2508                 return ret;
2509
2510         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2511         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2512         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2513         I40EVF_WRITE_FLUSH(hw);
2514
2515         return 0;
2516 }
2517
2518 static void
2519 i40evf_disable_rss(struct i40e_vf *vf)
2520 {
2521         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2522
2523         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2524         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2525         I40EVF_WRITE_FLUSH(hw);
2526 }
2527
2528 static int
2529 i40evf_config_rss(struct i40e_vf *vf)
2530 {
2531         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2532         struct rte_eth_rss_conf rss_conf;
2533         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2534         uint16_t num;
2535
2536         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2537                 i40evf_disable_rss(vf);
2538                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2539                 return 0;
2540         }
2541
2542         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2543         /* Fill out the look up table */
2544         for (i = 0, j = 0; i < nb_q; i++, j++) {
2545                 if (j >= num)
2546                         j = 0;
2547                 lut = (lut << 8) | j;
2548                 if ((i & 3) == 3)
2549                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2550         }
2551
2552         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2553         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2554                 i40evf_disable_rss(vf);
2555                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2556                 return 0;
2557         }
2558
2559         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2560                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2561                 /* Calculate the default hash key */
2562                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2563                         rss_key_default[i] = (uint32_t)rte_rand();
2564                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2565                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2566                         sizeof(uint32_t);
2567         }
2568
2569         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2570 }
2571
2572 static int
2573 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2574                            struct rte_eth_rss_conf *rss_conf)
2575 {
2576         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2577         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2578         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2579         uint64_t hena;
2580
2581         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2582         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2583
2584         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2585                 if (rss_hf != 0) /* Enable RSS */
2586                         return -EINVAL;
2587                 return 0;
2588         }
2589
2590         /* RSS enabled */
2591         if (rss_hf == 0) /* Disable RSS */
2592                 return -EINVAL;
2593
2594         return i40evf_hw_rss_hash_set(vf, rss_conf);
2595 }
2596
2597 static int
2598 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2599                              struct rte_eth_rss_conf *rss_conf)
2600 {
2601         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2602         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2603         uint64_t hena;
2604
2605         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2606                            &rss_conf->rss_key_len);
2607
2608         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2609         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2610         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2611
2612         return 0;
2613 }
2614
2615 static int
2616 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2617 {
2618         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2619         struct rte_eth_dev_data *dev_data = vf->dev_data;
2620         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2621         int ret = 0;
2622
2623         /* check if mtu is within the allowed range */
2624         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2625                 return -EINVAL;
2626
2627         /* mtu setting is forbidden if port is start */
2628         if (dev_data->dev_started) {
2629                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2630                             dev_data->port_id);
2631                 return -EBUSY;
2632         }
2633
2634         if (frame_size > ETHER_MAX_LEN)
2635                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2636         else
2637                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2638
2639         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2640
2641         return ret;
2642 }
2643
2644 static void
2645 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2646                             struct ether_addr *mac_addr)
2647 {
2648         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2649
2650         if (!is_valid_assigned_ether_addr(mac_addr)) {
2651                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2652                 return;
2653         }
2654
2655         if (is_same_ether_addr(mac_addr, dev->data->mac_addrs))
2656                 return;
2657
2658         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2659                 return;
2660
2661         i40evf_del_mac_addr_by_addr(dev, dev->data->mac_addrs);
2662
2663         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2664 }