drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                 struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
 141                         uint32_t nb_mc_addr);
 142
 143 /* Default hash key buffer for RSS */
 144 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 145
 146 struct rte_i40evf_xstats_name_off {
 147         char name[RTE_ETH_XSTATS_NAME_SIZE];
 148         unsigned offset;
 149 };
 150
 151 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 152         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 153         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 154         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 155         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 156         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 157         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 158                 rx_unknown_protocol)},
 159         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 160         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 161         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 162         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 163         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 164         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 165 };
 166
 167 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 168                 sizeof(rte_i40evf_stats_strings[0]))
 169
 170 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 171         .dev_configure        = i40evf_dev_configure,
 172         .dev_start            = i40evf_dev_start,
 173         .dev_stop             = i40evf_dev_stop,
 174         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 175         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 176         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 177         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 178         .link_update          = i40evf_dev_link_update,
 179         .stats_get            = i40evf_dev_stats_get,
 180         .stats_reset          = i40evf_dev_xstats_reset,
 181         .xstats_get           = i40evf_dev_xstats_get,
 182         .xstats_get_names     = i40evf_dev_xstats_get_names,
 183         .xstats_reset         = i40evf_dev_xstats_reset,
 184         .dev_close            = i40evf_dev_close,
 185         .dev_reset            = i40evf_dev_reset,
 186         .dev_infos_get        = i40evf_dev_info_get,
 187         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 188         .vlan_filter_set      = i40evf_vlan_filter_set,
 189         .vlan_offload_set     = i40evf_vlan_offload_set,
 190         .rx_queue_start       = i40evf_dev_rx_queue_start,
 191         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 192         .tx_queue_start       = i40evf_dev_tx_queue_start,
 193         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 194         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 195         .rx_queue_release     = i40e_dev_rx_queue_release,
 196         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 197         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 198         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 199         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 200         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 201         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 202         .tx_queue_release     = i40e_dev_tx_queue_release,
 203         .rx_queue_count       = i40e_dev_rx_queue_count,
 204         .rxq_info_get         = i40e_rxq_info_get,
 205         .txq_info_get         = i40e_txq_info_get,
 206         .mac_addr_add         = i40evf_add_mac_addr,
 207         .mac_addr_remove      = i40evf_del_mac_addr,
 208         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 209         .reta_update          = i40evf_dev_rss_reta_update,
 210         .reta_query           = i40evf_dev_rss_reta_query,
 211         .rss_hash_update      = i40evf_dev_rss_hash_update,
 212         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 213         .mtu_set              = i40evf_dev_mtu_set,
 214         .mac_addr_set         = i40evf_set_default_mac_addr,
 215 };
 216
 217 /*
 218  * Read data in admin queue to get msg from pf driver
 219  */
 220 static enum i40evf_aq_result
 221 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 222 {
 223         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 224         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 225         struct i40e_arq_event_info event;
 226         enum virtchnl_ops opcode;
 227         enum i40e_status_code retval;
 228         int ret;
 229         enum i40evf_aq_result result = I40EVF_MSG_NON;
 230
 231         event.buf_len = data->buf_len;
 232         event.msg_buf = data->msg;
 233         ret = i40e_clean_arq_element(hw, &event, NULL);
 234         /* Can't read any msg from adminQ */
 235         if (ret) {
 236                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 237                         result = I40EVF_MSG_ERR;
 238                 return result;
 239         }
 240
 241         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 242         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 243         /* pf sys event */
 244         if (opcode == VIRTCHNL_OP_EVENT) {
 245                 struct virtchnl_pf_event *vpe =
 246                         (struct virtchnl_pf_event *)event.msg_buf;
 247
 248                 result = I40EVF_MSG_SYS;
 249                 switch (vpe->event) {
 250                 case VIRTCHNL_EVENT_LINK_CHANGE:
 251                         vf->link_up =
 252                                 vpe->event_data.link_event.link_status;
 253                         vf->link_speed =
 254                                 vpe->event_data.link_event.link_speed;
 255                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 256                         PMD_DRV_LOG(INFO, "Link status update:%s",
 257                                     vf->link_up ? "up" : "down");
 258                         break;
 259                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 260                         vf->vf_reset = true;
 261                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 262                         PMD_DRV_LOG(INFO, "vf is reseting");
 263                         break;
 264                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 265                         vf->dev_closed = true;
 266                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 267                         PMD_DRV_LOG(INFO, "PF driver closed");
 268                         break;
 269                 default:
 270                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 271                                     __func__, vpe->event);
 272                 }
 273         } else {
 274                 /* async reply msg on command issued by vf previously */
 275                 result = I40EVF_MSG_CMD;
 276                 /* Actual data length read from PF */
 277                 data->msg_len = event.msg_len;
 278         }
 279
 280         data->result = retval;
 281         data->ops = opcode;
 282
 283         return result;
 284 }
 285
 286 /**
 287  * clear current command. Only call in case execute
 288  * _atomic_set_cmd successfully.
 289  */
 290 static inline void
 291 _clear_cmd(struct i40e_vf *vf)
 292 {
 293         rte_wmb();
 294         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 295 }
 296
 297 /*
 298  * Check there is pending cmd in execution. If none, set new command.
 299  */
 300 static inline int
 301 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 302 {
 303         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 304                         VIRTCHNL_OP_UNKNOWN, ops);
 305
 306         if (!ret)
 307                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 308
 309         return !ret;
 310 }
 311
 312 #define MAX_TRY_TIMES 200
 313 #define ASQ_DELAY_MS  10
 314
 315 static int
 316 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 317 {
 318         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 319         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 320         struct i40evf_arq_msg_info info;
 321         enum i40evf_aq_result ret;
 322         int err, i = 0;
 323
 324         if (_atomic_set_cmd(vf, args->ops))
 325                 return -1;
 326
 327         info.msg = args->out_buffer;
 328         info.buf_len = args->out_size;
 329         info.ops = VIRTCHNL_OP_UNKNOWN;
 330         info.result = I40E_SUCCESS;
 331
 332         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 333                      args->in_args, args->in_args_size, NULL);
 334         if (err) {
 335                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 336                 _clear_cmd(vf);
 337                 return err;
 338         }
 339
 340         switch (args->ops) {
 341         case VIRTCHNL_OP_RESET_VF:
 342                 /*no need to process in this function */
 343                 err = 0;
 344                 break;
 345         case VIRTCHNL_OP_VERSION:
 346         case VIRTCHNL_OP_GET_VF_RESOURCES:
 347                 /* for init adminq commands, need to poll the response */
 348                 err = -1;
 349                 do {
 350                         ret = i40evf_read_pfmsg(dev, &info);
 351                         vf->cmd_retval = info.result;
 352                         if (ret == I40EVF_MSG_CMD) {
 353                                 err = 0;
 354                                 break;
 355                         } else if (ret == I40EVF_MSG_ERR)
 356                                 break;
 357                         rte_delay_ms(ASQ_DELAY_MS);
 358                         /* If don't read msg or read sys event, continue */
 359                 } while (i++ < MAX_TRY_TIMES);
 360                 _clear_cmd(vf);
 361                 break;
 362
 363         default:
 364                 /* for other adminq in running time, waiting the cmd done flag */
 365                 err = -1;
 366                 do {
 367                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 368                                 err = 0;
 369                                 break;
 370                         }
 371                         rte_delay_ms(ASQ_DELAY_MS);
 372                         /* If don't read msg or read sys event, continue */
 373                 } while (i++ < MAX_TRY_TIMES);
 374                 /* If there's no response is received, clear command */
 375                 if (i >= MAX_TRY_TIMES) {
 376                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 377                         _clear_cmd(vf);
 378                 }
 379                 break;
 380         }
 381
 382         return err | vf->cmd_retval;
 383 }
 384
 385 /*
 386  * Check API version with sync wait until version read or fail from admin queue
 387  */
 388 static int
 389 i40evf_check_api_version(struct rte_eth_dev *dev)
 390 {
 391         struct virtchnl_version_info version, *pver;
 392         int err;
 393         struct vf_cmd_info args;
 394         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 395
 396         version.major = VIRTCHNL_VERSION_MAJOR;
 397         version.minor = VIRTCHNL_VERSION_MINOR;
 398
 399         args.ops = VIRTCHNL_OP_VERSION;
 400         args.in_args = (uint8_t *)&version;
 401         args.in_args_size = sizeof(version);
 402         args.out_buffer = vf->aq_resp;
 403         args.out_size = I40E_AQ_BUF_SZ;
 404
 405         err = i40evf_execute_vf_cmd(dev, &args);
 406         if (err) {
 407                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 408                 return err;
 409         }
 410
 411         pver = (struct virtchnl_version_info *)args.out_buffer;
 412         vf->version_major = pver->major;
 413         vf->version_minor = pver->minor;
 414         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 415                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 416                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 417         else {
 418                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 419                                         vf->version_major, vf->version_minor,
 420                                                 VIRTCHNL_VERSION_MAJOR,
 421                                                 VIRTCHNL_VERSION_MINOR);
 422                 return -1;
 423         }
 424
 425         return 0;
 426 }
 427
 428 static int
 429 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 430 {
 431         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 432         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 433         int err;
 434         struct vf_cmd_info args;
 435         uint32_t caps, len;
 436
 437         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 438         args.out_buffer = vf->aq_resp;
 439         args.out_size = I40E_AQ_BUF_SZ;
 440         if (PF_IS_V11(vf)) {
 441                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 442                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 443                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 444                        VIRTCHNL_VF_OFFLOAD_VLAN |
 445                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 446                 args.in_args = (uint8_t *)&caps;
 447                 args.in_args_size = sizeof(caps);
 448         } else {
 449                 args.in_args = NULL;
 450                 args.in_args_size = 0;
 451         }
 452         err = i40evf_execute_vf_cmd(dev, &args);
 453
 454         if (err) {
 455                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 456                 return err;
 457         }
 458
 459         len =  sizeof(struct virtchnl_vf_resource) +
 460                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 461
 462         rte_memcpy(vf->vf_res, args.out_buffer,
 463                         RTE_MIN(args.out_size, len));
 464         i40e_vf_parse_hw_config(hw, vf->vf_res);
 465
 466         return 0;
 467 }
 468
 469 static int
 470 i40evf_config_promisc(struct rte_eth_dev *dev,
 471                       bool enable_unicast,
 472                       bool enable_multicast)
 473 {
 474         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 475         int err;
 476         struct vf_cmd_info args;
 477         struct virtchnl_promisc_info promisc;
 478
 479         promisc.flags = 0;
 480         promisc.vsi_id = vf->vsi_res->vsi_id;
 481
 482         if (enable_unicast)
 483                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 484
 485         if (enable_multicast)
 486                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 487
 488         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 489         args.in_args = (uint8_t *)&promisc;
 490         args.in_args_size = sizeof(promisc);
 491         args.out_buffer = vf->aq_resp;
 492         args.out_size = I40E_AQ_BUF_SZ;
 493
 494         err = i40evf_execute_vf_cmd(dev, &args);
 495
 496         if (err)
 497                 PMD_DRV_LOG(ERR, "fail to execute command "
 498                             "CONFIG_PROMISCUOUS_MODE");
 499         return err;
 500 }
 501
 502 static int
 503 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 504 {
 505         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 506         struct vf_cmd_info args;
 507         int ret;
 508
 509         memset(&args, 0, sizeof(args));
 510         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 511         args.in_args = NULL;
 512         args.in_args_size = 0;
 513         args.out_buffer = vf->aq_resp;
 514         args.out_size = I40E_AQ_BUF_SZ;
 515         ret = i40evf_execute_vf_cmd(dev, &args);
 516         if (ret)
 517                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 518                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 519
 520         return ret;
 521 }
 522
 523 static int
 524 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 525 {
 526         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 527         struct vf_cmd_info args;
 528         int ret;
 529
 530         memset(&args, 0, sizeof(args));
 531         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 532         args.in_args = NULL;
 533         args.in_args_size = 0;
 534         args.out_buffer = vf->aq_resp;
 535         args.out_size = I40E_AQ_BUF_SZ;
 536         ret = i40evf_execute_vf_cmd(dev, &args);
 537         if (ret)
 538                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 539                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 540
 541         return ret;
 542 }
 543
 544 static void
 545 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 546                                   uint16_t vsi_id,
 547                                   uint16_t queue_id,
 548                                   uint16_t nb_txq,
 549                                   struct i40e_tx_queue *txq)
 550 {
 551         txq_info->vsi_id = vsi_id;
 552         txq_info->queue_id = queue_id;
 553         if (queue_id < nb_txq) {
 554                 txq_info->ring_len = txq->nb_tx_desc;
 555                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 556         }
 557 }
 558
 559 static void
 560 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 561                                   uint16_t vsi_id,
 562                                   uint16_t queue_id,
 563                                   uint16_t nb_rxq,
 564                                   uint32_t max_pkt_size,
 565                                   struct i40e_rx_queue *rxq)
 566 {
 567         rxq_info->vsi_id = vsi_id;
 568         rxq_info->queue_id = queue_id;
 569         rxq_info->max_pkt_size = max_pkt_size;
 570         if (queue_id < nb_rxq) {
 571                 rxq_info->ring_len = rxq->nb_rx_desc;
 572                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 573                 rxq_info->databuffer_size =
 574                         (rte_pktmbuf_data_room_size(rxq->mp) -
 575                                 RTE_PKTMBUF_HEADROOM);
 576         }
 577 }
 578
 579 static int
 580 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 581 {
 582         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 583         struct i40e_rx_queue **rxq =
 584                 (struct i40e_rx_queue **)dev->data->rx_queues;
 585         struct i40e_tx_queue **txq =
 586                 (struct i40e_tx_queue **)dev->data->tx_queues;
 587         struct virtchnl_vsi_queue_config_info *vc_vqci;
 588         struct virtchnl_queue_pair_info *vc_qpi;
 589         struct vf_cmd_info args;
 590         uint16_t i, nb_qp = vf->num_queue_pairs;
 591         const uint32_t size =
 592                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 593         uint8_t buff[size];
 594         int ret;
 595
 596         memset(buff, 0, sizeof(buff));
 597         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 598         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 599         vc_vqci->num_queue_pairs = nb_qp;
 600
 601         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 602                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 603                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 604                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 605                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 606                                         vf->max_pkt_len, rxq[i]);
 607         }
 608         memset(&args, 0, sizeof(args));
 609         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 610         args.in_args = (uint8_t *)vc_vqci;
 611         args.in_args_size = size;
 612         args.out_buffer = vf->aq_resp;
 613         args.out_size = I40E_AQ_BUF_SZ;
 614         ret = i40evf_execute_vf_cmd(dev, &args);
 615         if (ret)
 616                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 617                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 618
 619         return ret;
 620 }
 621
 622 static int
 623 i40evf_config_irq_map(struct rte_eth_dev *dev)
 624 {
 625         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 626         struct vf_cmd_info args;
 627         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 628                 sizeof(struct virtchnl_vector_map)];
 629         struct virtchnl_irq_map_info *map_info;
 630         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 631         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 632         uint32_t vector_id;
 633         int i, err;
 634
 635         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 636             rte_intr_allow_others(intr_handle))
 637                 vector_id = I40E_RX_VEC_START;
 638         else
 639                 vector_id = I40E_MISC_VEC_ID;
 640
 641         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 642         map_info->num_vectors = 1;
 643         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 644         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 645         /* Alway use default dynamic MSIX interrupt */
 646         map_info->vecmap[0].vector_id = vector_id;
 647         /* Don't map any tx queue */
 648         map_info->vecmap[0].txq_map = 0;
 649         map_info->vecmap[0].rxq_map = 0;
 650         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 651                 map_info->vecmap[0].rxq_map |= 1 << i;
 652                 if (rte_intr_dp_is_en(intr_handle))
 653                         intr_handle->intr_vec[i] = vector_id;
 654         }
 655
 656         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 657         args.in_args = (u8 *)cmd_buffer;
 658         args.in_args_size = sizeof(cmd_buffer);
 659         args.out_buffer = vf->aq_resp;
 660         args.out_size = I40E_AQ_BUF_SZ;
 661         err = i40evf_execute_vf_cmd(dev, &args);
 662         if (err)
 663                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 664
 665         return err;
 666 }
 667
 668 static int
 669 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 670                                 bool on)
 671 {
 672         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 673         struct virtchnl_queue_select queue_select;
 674         int err;
 675         struct vf_cmd_info args;
 676         memset(&queue_select, 0, sizeof(queue_select));
 677         queue_select.vsi_id = vf->vsi_res->vsi_id;
 678
 679         if (isrx)
 680                 queue_select.rx_queues |= 1 << qid;
 681         else
 682                 queue_select.tx_queues |= 1 << qid;
 683
 684         if (on)
 685                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 686         else
 687                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 688         args.in_args = (u8 *)&queue_select;
 689         args.in_args_size = sizeof(queue_select);
 690         args.out_buffer = vf->aq_resp;
 691         args.out_size = I40E_AQ_BUF_SZ;
 692         err = i40evf_execute_vf_cmd(dev, &args);
 693         if (err)
 694                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 695                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 696
 697         return err;
 698 }
 699
 700 static int
 701 i40evf_start_queues(struct rte_eth_dev *dev)
 702 {
 703         struct rte_eth_dev_data *dev_data = dev->data;
 704         int i;
 705         struct i40e_rx_queue *rxq;
 706         struct i40e_tx_queue *txq;
 707
 708         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 709                 rxq = dev_data->rx_queues[i];
 710                 if (rxq->rx_deferred_start)
 711                         continue;
 712                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 713                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 714                         return -1;
 715                 }
 716         }
 717
 718         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 719                 txq = dev_data->tx_queues[i];
 720                 if (txq->tx_deferred_start)
 721                         continue;
 722                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 723                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 724                         return -1;
 725                 }
 726         }
 727
 728         return 0;
 729 }
 730
 731 static int
 732 i40evf_stop_queues(struct rte_eth_dev *dev)
 733 {
 734         int i;
 735
 736         /* Stop TX queues first */
 737         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 738                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 739                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 740                         return -1;
 741                 }
 742         }
 743
 744         /* Then stop RX queues */
 745         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 746                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 747                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 748                         return -1;
 749                 }
 750         }
 751
 752         return 0;
 753 }
 754
 755 static int
 756 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 757                     struct ether_addr *addr,
 758                     __rte_unused uint32_t index,
 759                     __rte_unused uint32_t pool)
 760 {
 761         struct virtchnl_ether_addr_list *list;
 762         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 763         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 764                         sizeof(struct virtchnl_ether_addr)];
 765         int err;
 766         struct vf_cmd_info args;
 767
 768         if (is_zero_ether_addr(addr)) {
 769                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 770                             addr->addr_bytes[0], addr->addr_bytes[1],
 771                             addr->addr_bytes[2], addr->addr_bytes[3],
 772                             addr->addr_bytes[4], addr->addr_bytes[5]);
 773                 return I40E_ERR_INVALID_MAC_ADDR;
 774         }
 775
 776         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 777         list->vsi_id = vf->vsi_res->vsi_id;
 778         list->num_elements = 1;
 779         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 780                                         sizeof(addr->addr_bytes));
 781
 782         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 783         args.in_args = cmd_buffer;
 784         args.in_args_size = sizeof(cmd_buffer);
 785         args.out_buffer = vf->aq_resp;
 786         args.out_size = I40E_AQ_BUF_SZ;
 787         err = i40evf_execute_vf_cmd(dev, &args);
 788         if (err)
 789                 PMD_DRV_LOG(ERR, "fail to execute command "
 790                             "OP_ADD_ETHER_ADDRESS");
 791         else
 792                 vf->vsi.mac_num++;
 793
 794         return err;
 795 }
 796
 797 static void
 798 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 799                             struct ether_addr *addr)
 800 {
 801         struct virtchnl_ether_addr_list *list;
 802         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 803         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 804                         sizeof(struct virtchnl_ether_addr)];
 805         int err;
 806         struct vf_cmd_info args;
 807
 808         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 809                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 810                             addr->addr_bytes[0], addr->addr_bytes[1],
 811                             addr->addr_bytes[2], addr->addr_bytes[3],
 812                             addr->addr_bytes[4], addr->addr_bytes[5]);
 813                 return;
 814         }
 815
 816         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 817         list->vsi_id = vf->vsi_res->vsi_id;
 818         list->num_elements = 1;
 819         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 820                         sizeof(addr->addr_bytes));
 821
 822         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 823         args.in_args = cmd_buffer;
 824         args.in_args_size = sizeof(cmd_buffer);
 825         args.out_buffer = vf->aq_resp;
 826         args.out_size = I40E_AQ_BUF_SZ;
 827         err = i40evf_execute_vf_cmd(dev, &args);
 828         if (err)
 829                 PMD_DRV_LOG(ERR, "fail to execute command "
 830                             "OP_DEL_ETHER_ADDRESS");
 831         else
 832                 vf->vsi.mac_num--;
 833         return;
 834 }
 835
 836 static void
 837 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 838 {
 839         struct rte_eth_dev_data *data = dev->data;
 840         struct ether_addr *addr;
 841
 842         addr = &data->mac_addrs[index];
 843
 844         i40evf_del_mac_addr_by_addr(dev, addr);
 845 }
 846
 847 static int
 848 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 849 {
 850         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 851         struct virtchnl_queue_select q_stats;
 852         int err;
 853         struct vf_cmd_info args;
 854
 855         memset(&q_stats, 0, sizeof(q_stats));
 856         q_stats.vsi_id = vf->vsi_res->vsi_id;
 857         args.ops = VIRTCHNL_OP_GET_STATS;
 858         args.in_args = (u8 *)&q_stats;
 859         args.in_args_size = sizeof(q_stats);
 860         args.out_buffer = vf->aq_resp;
 861         args.out_size = I40E_AQ_BUF_SZ;
 862
 863         err = i40evf_execute_vf_cmd(dev, &args);
 864         if (err) {
 865                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 866                 *pstats = NULL;
 867                 return err;
 868         }
 869         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 870         return 0;
 871 }
 872
 873 static void
 874 i40evf_stat_update_48(uint64_t *offset,
 875                    uint64_t *stat)
 876 {
 877         if (*stat >= *offset)
 878                 *stat = *stat - *offset;
 879         else
 880                 *stat = (uint64_t)((*stat +
 881                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 882
 883         *stat &= I40E_48_BIT_MASK;
 884 }
 885
 886 static void
 887 i40evf_stat_update_32(uint64_t *offset,
 888                    uint64_t *stat)
 889 {
 890         if (*stat >= *offset)
 891                 *stat = (uint64_t)(*stat - *offset);
 892         else
 893                 *stat = (uint64_t)((*stat +
 894                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 895 }
 896
 897 static void
 898 i40evf_update_stats(struct i40e_vsi *vsi,
 899                                         struct i40e_eth_stats *nes)
 900 {
 901         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 902
 903         i40evf_stat_update_48(&oes->rx_bytes,
 904                             &nes->rx_bytes);
 905         i40evf_stat_update_48(&oes->rx_unicast,
 906                             &nes->rx_unicast);
 907         i40evf_stat_update_48(&oes->rx_multicast,
 908                             &nes->rx_multicast);
 909         i40evf_stat_update_48(&oes->rx_broadcast,
 910                             &nes->rx_broadcast);
 911         i40evf_stat_update_32(&oes->rx_discards,
 912                                 &nes->rx_discards);
 913         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 914                             &nes->rx_unknown_protocol);
 915         i40evf_stat_update_48(&oes->tx_bytes,
 916                             &nes->tx_bytes);
 917         i40evf_stat_update_48(&oes->tx_unicast,
 918                             &nes->tx_unicast);
 919         i40evf_stat_update_48(&oes->tx_multicast,
 920                             &nes->tx_multicast);
 921         i40evf_stat_update_48(&oes->tx_broadcast,
 922                             &nes->tx_broadcast);
 923         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 924         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 925 }
 926
 927 static void
 928 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 929 {
 930         int ret;
 931         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 932         struct i40e_eth_stats *pstats = NULL;
 933
 934         /* read stat values to clear hardware registers */
 935         ret = i40evf_query_stats(dev, &pstats);
 936
 937         /* set stats offset base on current values */
 938         if (ret == 0)
 939                 vf->vsi.eth_stats_offset = *pstats;
 940 }
 941
 942 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 943                                       struct rte_eth_xstat_name *xstats_names,
 944                                       __rte_unused unsigned limit)
 945 {
 946         unsigned i;
 947
 948         if (xstats_names != NULL)
 949                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 950                         snprintf(xstats_names[i].name,
 951                                 sizeof(xstats_names[i].name),
 952                                 "%s", rte_i40evf_stats_strings[i].name);
 953                 }
 954         return I40EVF_NB_XSTATS;
 955 }
 956
 957 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 958                                  struct rte_eth_xstat *xstats, unsigned n)
 959 {
 960         int ret;
 961         unsigned i;
 962         struct i40e_eth_stats *pstats = NULL;
 963         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 964         struct i40e_vsi *vsi = &vf->vsi;
 965
 966         if (n < I40EVF_NB_XSTATS)
 967                 return I40EVF_NB_XSTATS;
 968
 969         ret = i40evf_query_stats(dev, &pstats);
 970         if (ret != 0)
 971                 return 0;
 972
 973         if (!xstats)
 974                 return 0;
 975
 976         i40evf_update_stats(vsi, pstats);
 977
 978         /* loop over xstats array and values from pstats */
 979         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 980                 xstats[i].id = i;
 981                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
 982                         rte_i40evf_stats_strings[i].offset);
 983         }
 984
 985         return I40EVF_NB_XSTATS;
 986 }
 987
 988 static int
 989 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 990 {
 991         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 992         struct virtchnl_vlan_filter_list *vlan_list;
 993         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
 994                                                         sizeof(uint16_t)];
 995         int err;
 996         struct vf_cmd_info args;
 997
 998         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
 999         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1000         vlan_list->num_elements = 1;
1001         vlan_list->vlan_id[0] = vlanid;
1002
1003         args.ops = VIRTCHNL_OP_ADD_VLAN;
1004         args.in_args = (u8 *)&cmd_buffer;
1005         args.in_args_size = sizeof(cmd_buffer);
1006         args.out_buffer = vf->aq_resp;
1007         args.out_size = I40E_AQ_BUF_SZ;
1008         err = i40evf_execute_vf_cmd(dev, &args);
1009         if (err)
1010                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1011
1012         return err;
1013 }
1014
1015 static int
1016 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1017 {
1018         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1019         struct virtchnl_vlan_filter_list *vlan_list;
1020         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1021                                                         sizeof(uint16_t)];
1022         int err;
1023         struct vf_cmd_info args;
1024
1025         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1026         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1027         vlan_list->num_elements = 1;
1028         vlan_list->vlan_id[0] = vlanid;
1029
1030         args.ops = VIRTCHNL_OP_DEL_VLAN;
1031         args.in_args = (u8 *)&cmd_buffer;
1032         args.in_args_size = sizeof(cmd_buffer);
1033         args.out_buffer = vf->aq_resp;
1034         args.out_size = I40E_AQ_BUF_SZ;
1035         err = i40evf_execute_vf_cmd(dev, &args);
1036         if (err)
1037                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1038
1039         return err;
1040 }
1041
1042 static const struct rte_pci_id pci_id_i40evf_map[] = {
1043         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1044         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1045         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1046         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1047         { .vendor_id = 0, /* sentinel */ },
1048 };
1049
1050 /* Disable IRQ0 */
1051 static inline void
1052 i40evf_disable_irq0(struct i40e_hw *hw)
1053 {
1054         /* Disable all interrupt types */
1055         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1056         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1057                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1058         I40EVF_WRITE_FLUSH(hw);
1059 }
1060
1061 /* Enable IRQ0 */
1062 static inline void
1063 i40evf_enable_irq0(struct i40e_hw *hw)
1064 {
1065         /* Enable admin queue interrupt trigger */
1066         uint32_t val;
1067
1068         i40evf_disable_irq0(hw);
1069         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1070         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1071                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1072         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1073
1074         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1075                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1076                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1077                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1078
1079         I40EVF_WRITE_FLUSH(hw);
1080 }
1081
1082 static int
1083 i40evf_check_vf_reset_done(struct i40e_hw *hw)
1084 {
1085         int i, reset;
1086
1087         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1088                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1089                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1090                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1091                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1092                     reset == VIRTCHNL_VFR_COMPLETED)
1093                         break;
1094                 rte_delay_ms(50);
1095         }
1096
1097         if (i >= MAX_RESET_WAIT_CNT)
1098                 return -1;
1099
1100         return 0;
1101 }
1102 static int
1103 i40evf_reset_vf(struct i40e_hw *hw)
1104 {
1105         int ret;
1106
1107         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1108                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1109                 return -1;
1110         }
1111         /**
1112           * After issuing vf reset command to pf, pf won't necessarily
1113           * reset vf, it depends on what state it exactly is. If it's not
1114           * initialized yet, it won't have vf reset since it's in a certain
1115           * state. If not, it will try to reset. Even vf is reset, pf will
1116           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1117           * it to ACTIVE. In this duration, vf may not catch the moment that
1118           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1119           */
1120         rte_delay_ms(200);
1121
1122         ret = i40evf_check_vf_reset_done(hw);
1123         if (ret) {
1124                 PMD_INIT_LOG(ERR, "VF is still resetting");
1125                 return ret;
1126         }
1127
1128         return 0;
1129 }
1130
1131 static int
1132 i40evf_init_vf(struct rte_eth_dev *dev)
1133 {
1134         int i, err, bufsz;
1135         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1136         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1137         uint16_t interval =
1138                 i40e_calc_itr_interval(0, 0);
1139
1140         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1141         vf->dev_data = dev->data;
1142         err = i40e_set_mac_type(hw);
1143         if (err) {
1144                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1145                 goto err;
1146         }
1147
1148         err = i40evf_check_vf_reset_done(hw);
1149         if (err)
1150                 goto err;
1151
1152         i40e_init_adminq_parameter(hw);
1153         err = i40e_init_adminq(hw);
1154         if (err) {
1155                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1156                 goto err;
1157         }
1158
1159         /* Reset VF and wait until it's complete */
1160         if (i40evf_reset_vf(hw)) {
1161                 PMD_INIT_LOG(ERR, "reset NIC failed");
1162                 goto err_aq;
1163         }
1164
1165         /* VF reset, shutdown admin queue and initialize again */
1166         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1167                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1168                 goto err;
1169         }
1170
1171         i40e_init_adminq_parameter(hw);
1172         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1173                 PMD_INIT_LOG(ERR, "init_adminq failed");
1174                 goto err;
1175         }
1176
1177         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1178         if (!vf->aq_resp) {
1179                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1180                 goto err_aq;
1181         }
1182         if (i40evf_check_api_version(dev) != 0) {
1183                 PMD_INIT_LOG(ERR, "check_api version failed");
1184                 goto err_api;
1185         }
1186         bufsz = sizeof(struct virtchnl_vf_resource) +
1187                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1188         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1189         if (!vf->vf_res) {
1190                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1191                 goto err_api;
1192         }
1193
1194         if (i40evf_get_vf_resource(dev) != 0) {
1195                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1196                 goto err_alloc;
1197         }
1198
1199         /* got VF config message back from PF, now we can parse it */
1200         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1201                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1202                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1203         }
1204
1205         if (!vf->vsi_res) {
1206                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1207                 goto err_alloc;
1208         }
1209
1210         if (hw->mac.type == I40E_MAC_X722_VF)
1211                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1212         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1213
1214         switch (vf->vsi_res->vsi_type) {
1215         case VIRTCHNL_VSI_SRIOV:
1216                 vf->vsi.type = I40E_VSI_SRIOV;
1217                 break;
1218         default:
1219                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1220                 break;
1221         }
1222         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1223         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1224
1225         /* Store the MAC address configured by host, or generate random one */
1226         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1227                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1228         else
1229                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1230
1231         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1232                        (I40E_ITR_INDEX_DEFAULT <<
1233                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1234                        (interval <<
1235                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1236         I40EVF_WRITE_FLUSH(hw);
1237
1238         return 0;
1239
1240 err_alloc:
1241         rte_free(vf->vf_res);
1242         vf->vsi_res = NULL;
1243 err_api:
1244         rte_free(vf->aq_resp);
1245 err_aq:
1246         i40e_shutdown_adminq(hw); /* ignore error */
1247 err:
1248         return -1;
1249 }
1250
1251 static int
1252 i40evf_uninit_vf(struct rte_eth_dev *dev)
1253 {
1254         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1255         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1256
1257         PMD_INIT_FUNC_TRACE();
1258
1259         if (hw->adapter_stopped == 0)
1260                 i40evf_dev_close(dev);
1261         rte_free(vf->vf_res);
1262         vf->vf_res = NULL;
1263         rte_free(vf->aq_resp);
1264         vf->aq_resp = NULL;
1265
1266         return 0;
1267 }
1268
1269 static void
1270 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1271                 __rte_unused uint16_t msglen)
1272 {
1273         struct virtchnl_pf_event *pf_msg =
1274                         (struct virtchnl_pf_event *)msg;
1275         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1276
1277         switch (pf_msg->event) {
1278         case VIRTCHNL_EVENT_RESET_IMPENDING:
1279                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1280                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1281                                               NULL);
1282                 break;
1283         case VIRTCHNL_EVENT_LINK_CHANGE:
1284                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1285                 vf->link_up = pf_msg->event_data.link_event.link_status;
1286                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1287                 break;
1288         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1289                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1290                 break;
1291         default:
1292                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1293                 break;
1294         }
1295 }
1296
1297 static void
1298 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1299 {
1300         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1301         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1302         struct i40e_arq_event_info info;
1303         uint16_t pending, aq_opc;
1304         enum virtchnl_ops msg_opc;
1305         enum i40e_status_code msg_ret;
1306         int ret;
1307
1308         info.buf_len = I40E_AQ_BUF_SZ;
1309         if (!vf->aq_resp) {
1310                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1311                 return;
1312         }
1313         info.msg_buf = vf->aq_resp;
1314
1315         pending = 1;
1316         while (pending) {
1317                 ret = i40e_clean_arq_element(hw, &info, &pending);
1318
1319                 if (ret != I40E_SUCCESS) {
1320                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1321                                     "ret: %d", ret);
1322                         break;
1323                 }
1324                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1325                 /* For the message sent from pf to vf, opcode is stored in
1326                  * cookie_high of struct i40e_aq_desc, while return error code
1327                  * are stored in cookie_low, Which is done by
1328                  * i40e_aq_send_msg_to_vf in PF driver.*/
1329                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1330                                                   info.desc.cookie_high);
1331                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1332                                                   info.desc.cookie_low);
1333                 switch (aq_opc) {
1334                 case i40e_aqc_opc_send_msg_to_vf:
1335                         if (msg_opc == VIRTCHNL_OP_EVENT)
1336                                 /* process event*/
1337                                 i40evf_handle_pf_event(dev, info.msg_buf,
1338                                                        info.msg_len);
1339                         else {
1340                                 /* read message and it's expected one */
1341                                 if (msg_opc == vf->pend_cmd) {
1342                                         vf->cmd_retval = msg_ret;
1343                                         /* prevent compiler reordering */
1344                                         rte_compiler_barrier();
1345                                         _clear_cmd(vf);
1346                                 } else
1347                                         PMD_DRV_LOG(ERR, "command mismatch,"
1348                                                 "expect %u, get %u",
1349                                                 vf->pend_cmd, msg_opc);
1350                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1351                                              " opcode = %d", msg_opc);
1352                         }
1353                         break;
1354                 default:
1355                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1356                                     aq_opc);
1357                         break;
1358                 }
1359         }
1360 }
1361
1362 /**
1363  * Interrupt handler triggered by NIC  for handling
1364  * specific interrupt. Only adminq interrupt is processed in VF.
1365  *
1366  * @param handle
1367  *  Pointer to interrupt handle.
1368  * @param param
1369  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1370  *
1371  * @return
1372  *  void
1373  */
1374 static void
1375 i40evf_dev_alarm_handler(void *param)
1376 {
1377         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1378         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1379         uint32_t icr0;
1380
1381         i40evf_disable_irq0(hw);
1382
1383         /* read out interrupt causes */
1384         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1385
1386         /* No interrupt event indicated */
1387         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1388                 goto done;
1389
1390         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1391                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1392                 i40evf_handle_aq_msg(dev);
1393         }
1394
1395         /* Link Status Change interrupt */
1396         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1397                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1398                                    " do nothing");
1399
1400 done:
1401         i40evf_enable_irq0(hw);
1402         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1403                           i40evf_dev_alarm_handler, dev);
1404 }
1405
1406 static int
1407 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1408 {
1409         struct i40e_hw *hw
1410                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1411         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1412
1413         PMD_INIT_FUNC_TRACE();
1414
1415         /* assign ops func pointer */
1416         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1417         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1418         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1419
1420         /*
1421          * For secondary processes, we don't initialise any further as primary
1422          * has already done this work.
1423          */
1424         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1425                 i40e_set_rx_function(eth_dev);
1426                 i40e_set_tx_function(eth_dev);
1427                 return 0;
1428         }
1429         i40e_set_default_ptype_table(eth_dev);
1430         i40e_set_default_pctype_table(eth_dev);
1431         rte_eth_copy_pci_info(eth_dev, pci_dev);
1432
1433         hw->vendor_id = pci_dev->id.vendor_id;
1434         hw->device_id = pci_dev->id.device_id;
1435         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1436         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1437         hw->bus.device = pci_dev->addr.devid;
1438         hw->bus.func = pci_dev->addr.function;
1439         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1440         hw->adapter_stopped = 0;
1441
1442         if(i40evf_init_vf(eth_dev) != 0) {
1443                 PMD_INIT_LOG(ERR, "Init vf failed");
1444                 return -1;
1445         }
1446
1447         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1448                           i40evf_dev_alarm_handler, eth_dev);
1449
1450         /* configure and enable device interrupt */
1451         i40evf_enable_irq0(hw);
1452
1453         /* copy mac addr */
1454         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1455                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1456                                         0);
1457         if (eth_dev->data->mac_addrs == NULL) {
1458                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1459                                 " store MAC addresses",
1460                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1461                 return -ENOMEM;
1462         }
1463         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1464                         &eth_dev->data->mac_addrs[0]);
1465
1466         return 0;
1467 }
1468
1469 static int
1470 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1471 {
1472         PMD_INIT_FUNC_TRACE();
1473
1474         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1475                 return -EPERM;
1476
1477         eth_dev->dev_ops = NULL;
1478         eth_dev->rx_pkt_burst = NULL;
1479         eth_dev->tx_pkt_burst = NULL;
1480
1481         if (i40evf_uninit_vf(eth_dev) != 0) {
1482                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1483                 return -1;
1484         }
1485
1486         rte_free(eth_dev->data->mac_addrs);
1487         eth_dev->data->mac_addrs = NULL;
1488
1489         return 0;
1490 }
1491
1492 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1493         struct rte_pci_device *pci_dev)
1494 {
1495         return rte_eth_dev_pci_generic_probe(pci_dev,
1496                 sizeof(struct i40e_adapter), i40evf_dev_init);
1497 }
1498
1499 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1500 {
1501         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1502 }
1503
1504 /*
1505  * virtual function driver struct
1506  */
1507 static struct rte_pci_driver rte_i40evf_pmd = {
1508         .id_table = pci_id_i40evf_map,
1509         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1510         .probe = eth_i40evf_pci_probe,
1511         .remove = eth_i40evf_pci_remove,
1512 };
1513
1514 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1515 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1516 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1517
1518 static int
1519 i40evf_dev_configure(struct rte_eth_dev *dev)
1520 {
1521         struct i40e_adapter *ad =
1522                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1523         struct rte_eth_conf *conf = &dev->data->dev_conf;
1524         struct i40e_vf *vf;
1525
1526         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1527          * allocation or vector Rx preconditions we will reset it.
1528          */
1529         ad->rx_bulk_alloc_allowed = true;
1530         ad->rx_vec_allowed = true;
1531         ad->tx_simple_allowed = true;
1532         ad->tx_vec_allowed = true;
1533
1534         /* For non-DPDK PF drivers, VF has no ability to disable HW
1535          * CRC strip, and is implicitly enabled by the PF.
1536          */
1537         if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1538                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1539                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1540                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1541                         /* Peer is running non-DPDK PF driver. */
1542                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1543                         return -EINVAL;
1544                 }
1545         }
1546
1547         return i40evf_init_vlan(dev);
1548 }
1549
1550 static int
1551 i40evf_init_vlan(struct rte_eth_dev *dev)
1552 {
1553         /* Apply vlan offload setting */
1554         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1555
1556         return 0;
1557 }
1558
1559 static int
1560 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1561 {
1562         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1563         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1564
1565         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1566                 return -ENOTSUP;
1567
1568         /* Vlan stripping setting */
1569         if (mask & ETH_VLAN_STRIP_MASK) {
1570                 /* Enable or disable VLAN stripping */
1571                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1572                         i40evf_enable_vlan_strip(dev);
1573                 else
1574                         i40evf_disable_vlan_strip(dev);
1575         }
1576
1577         return 0;
1578 }
1579
1580 static int
1581 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1582 {
1583         struct i40e_rx_queue *rxq;
1584         int err;
1585         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1586
1587         PMD_INIT_FUNC_TRACE();
1588
1589         rxq = dev->data->rx_queues[rx_queue_id];
1590
1591         err = i40e_alloc_rx_queue_mbufs(rxq);
1592         if (err) {
1593                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1594                 return err;
1595         }
1596
1597         rte_wmb();
1598
1599         /* Init the RX tail register. */
1600         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1601         I40EVF_WRITE_FLUSH(hw);
1602
1603         /* Ready to switch the queue on */
1604         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1605         if (err) {
1606                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1607                             rx_queue_id);
1608                 return err;
1609         }
1610         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1611
1612         return 0;
1613 }
1614
1615 static int
1616 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1617 {
1618         struct i40e_rx_queue *rxq;
1619         int err;
1620
1621         rxq = dev->data->rx_queues[rx_queue_id];
1622
1623         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1624         if (err) {
1625                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1626                             rx_queue_id);
1627                 return err;
1628         }
1629
1630         i40e_rx_queue_release_mbufs(rxq);
1631         i40e_reset_rx_queue(rxq);
1632         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1633
1634         return 0;
1635 }
1636
1637 static int
1638 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1639 {
1640         int err;
1641
1642         PMD_INIT_FUNC_TRACE();
1643
1644         /* Ready to switch the queue on */
1645         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1646         if (err) {
1647                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1648                             tx_queue_id);
1649                 return err;
1650         }
1651         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1652
1653         return 0;
1654 }
1655
1656 static int
1657 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1658 {
1659         struct i40e_tx_queue *txq;
1660         int err;
1661
1662         txq = dev->data->tx_queues[tx_queue_id];
1663
1664         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1665         if (err) {
1666                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1667                             tx_queue_id);
1668                 return err;
1669         }
1670
1671         i40e_tx_queue_release_mbufs(txq);
1672         i40e_reset_tx_queue(txq);
1673         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1674
1675         return 0;
1676 }
1677
1678 static int
1679 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1680 {
1681         int ret;
1682
1683         if (on)
1684                 ret = i40evf_add_vlan(dev, vlan_id);
1685         else
1686                 ret = i40evf_del_vlan(dev,vlan_id);
1687
1688         return ret;
1689 }
1690
1691 static int
1692 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1693 {
1694         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1695         struct rte_eth_dev_data *dev_data = dev->data;
1696         struct rte_pktmbuf_pool_private *mbp_priv;
1697         uint16_t buf_size, len;
1698
1699         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1700         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1701         I40EVF_WRITE_FLUSH(hw);
1702
1703         /* Calculate the maximum packet length allowed */
1704         mbp_priv = rte_mempool_get_priv(rxq->mp);
1705         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1706                                         RTE_PKTMBUF_HEADROOM);
1707         rxq->hs_mode = i40e_header_split_none;
1708         rxq->rx_hdr_len = 0;
1709         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1710         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1711         rxq->max_pkt_len = RTE_MIN(len,
1712                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1713
1714         /**
1715          * Check if the jumbo frame and maximum packet length are set correctly
1716          */
1717         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1718                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1719                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1720                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1721                                 "larger than %u and smaller than %u, as jumbo "
1722                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1723                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1724                         return I40E_ERR_CONFIG;
1725                 }
1726         } else {
1727                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1728                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1729                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1730                                 "larger than %u and smaller than %u, as jumbo "
1731                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1732                                                 (uint32_t)ETHER_MAX_LEN);
1733                         return I40E_ERR_CONFIG;
1734                 }
1735         }
1736
1737         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1738             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1739                 dev_data->scattered_rx = 1;
1740         }
1741
1742         return 0;
1743 }
1744
1745 static int
1746 i40evf_rx_init(struct rte_eth_dev *dev)
1747 {
1748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1749         uint16_t i;
1750         int ret = I40E_SUCCESS;
1751         struct i40e_rx_queue **rxq =
1752                 (struct i40e_rx_queue **)dev->data->rx_queues;
1753
1754         i40evf_config_rss(vf);
1755         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1756                 if (!rxq[i] || !rxq[i]->q_set)
1757                         continue;
1758                 ret = i40evf_rxq_init(dev, rxq[i]);
1759                 if (ret != I40E_SUCCESS)
1760                         break;
1761         }
1762         if (ret == I40E_SUCCESS)
1763                 i40e_set_rx_function(dev);
1764
1765         return ret;
1766 }
1767
1768 static void
1769 i40evf_tx_init(struct rte_eth_dev *dev)
1770 {
1771         uint16_t i;
1772         struct i40e_tx_queue **txq =
1773                 (struct i40e_tx_queue **)dev->data->tx_queues;
1774         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1775
1776         for (i = 0; i < dev->data->nb_tx_queues; i++)
1777                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1778
1779         i40e_set_tx_function(dev);
1780 }
1781
1782 static inline void
1783 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1784 {
1785         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1786         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1787         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1788
1789         if (!rte_intr_allow_others(intr_handle)) {
1790                 I40E_WRITE_REG(hw,
1791                                I40E_VFINT_DYN_CTL01,
1792                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1793                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1794                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1795                 I40EVF_WRITE_FLUSH(hw);
1796                 return;
1797         }
1798
1799         I40EVF_WRITE_FLUSH(hw);
1800 }
1801
1802 static inline void
1803 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1804 {
1805         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1806         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1807         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1808
1809         if (!rte_intr_allow_others(intr_handle)) {
1810                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1811                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1812                 I40EVF_WRITE_FLUSH(hw);
1813                 return;
1814         }
1815
1816         I40EVF_WRITE_FLUSH(hw);
1817 }
1818
1819 static int
1820 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1821 {
1822         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1823         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1824         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1825         uint16_t interval =
1826                 i40e_calc_itr_interval(0, 0);
1827         uint16_t msix_intr;
1828
1829         msix_intr = intr_handle->intr_vec[queue_id];
1830         if (msix_intr == I40E_MISC_VEC_ID)
1831                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1832                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1833                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1834                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1835                                (interval <<
1836                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1837         else
1838                 I40E_WRITE_REG(hw,
1839                                I40E_VFINT_DYN_CTLN1(msix_intr -
1840                                                     I40E_RX_VEC_START),
1841                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1842                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1843                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1844                                (interval <<
1845                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1846
1847         I40EVF_WRITE_FLUSH(hw);
1848
1849         return 0;
1850 }
1851
1852 static int
1853 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1854 {
1855         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1856         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1857         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1858         uint16_t msix_intr;
1859
1860         msix_intr = intr_handle->intr_vec[queue_id];
1861         if (msix_intr == I40E_MISC_VEC_ID)
1862                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1863         else
1864                 I40E_WRITE_REG(hw,
1865                                I40E_VFINT_DYN_CTLN1(msix_intr -
1866                                                     I40E_RX_VEC_START),
1867                                0);
1868
1869         I40EVF_WRITE_FLUSH(hw);
1870
1871         return 0;
1872 }
1873
1874 static void
1875 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1876 {
1877         struct virtchnl_ether_addr_list *list;
1878         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1879         int err, i, j;
1880         int next_begin = 0;
1881         int begin = 0;
1882         uint32_t len;
1883         struct ether_addr *addr;
1884         struct vf_cmd_info args;
1885
1886         do {
1887                 j = 0;
1888                 len = sizeof(struct virtchnl_ether_addr_list);
1889                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1890                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1891                                 continue;
1892                         len += sizeof(struct virtchnl_ether_addr);
1893                         if (len >= I40E_AQ_BUF_SZ) {
1894                                 next_begin = i + 1;
1895                                 break;
1896                         }
1897                 }
1898
1899                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1900                 if (!list) {
1901                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1902                         return;
1903                 }
1904
1905                 for (i = begin; i < next_begin; i++) {
1906                         addr = &dev->data->mac_addrs[i];
1907                         if (is_zero_ether_addr(addr))
1908                                 continue;
1909                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1910                                          sizeof(addr->addr_bytes));
1911                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1912                                     addr->addr_bytes[0], addr->addr_bytes[1],
1913                                     addr->addr_bytes[2], addr->addr_bytes[3],
1914                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1915                         j++;
1916                 }
1917                 list->vsi_id = vf->vsi_res->vsi_id;
1918                 list->num_elements = j;
1919                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1920                            VIRTCHNL_OP_DEL_ETH_ADDR;
1921                 args.in_args = (uint8_t *)list;
1922                 args.in_args_size = len;
1923                 args.out_buffer = vf->aq_resp;
1924                 args.out_size = I40E_AQ_BUF_SZ;
1925                 err = i40evf_execute_vf_cmd(dev, &args);
1926                 if (err) {
1927                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1928                                     add ? "OP_ADD_ETHER_ADDRESS" :
1929                                     "OP_DEL_ETHER_ADDRESS");
1930                 } else {
1931                         if (add)
1932                                 vf->vsi.mac_num++;
1933                         else
1934                                 vf->vsi.mac_num--;
1935                 }
1936                 rte_free(list);
1937                 begin = next_begin;
1938         } while (begin < I40E_NUM_MACADDR_MAX);
1939 }
1940
1941 static int
1942 i40evf_dev_start(struct rte_eth_dev *dev)
1943 {
1944         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1945         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1946         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1947         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1948         uint32_t intr_vector = 0;
1949
1950         PMD_INIT_FUNC_TRACE();
1951
1952         hw->adapter_stopped = 0;
1953
1954         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1955         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1956                                         dev->data->nb_tx_queues);
1957
1958         /* check and configure queue intr-vector mapping */
1959         if (rte_intr_cap_multiple(intr_handle) &&
1960             dev->data->dev_conf.intr_conf.rxq) {
1961                 intr_vector = dev->data->nb_rx_queues;
1962                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1963                         return -1;
1964         }
1965
1966         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1967                 intr_handle->intr_vec =
1968                         rte_zmalloc("intr_vec",
1969                                     dev->data->nb_rx_queues * sizeof(int), 0);
1970                 if (!intr_handle->intr_vec) {
1971                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1972                                      " intr_vec", dev->data->nb_rx_queues);
1973                         return -ENOMEM;
1974                 }
1975         }
1976
1977         if (i40evf_rx_init(dev) != 0){
1978                 PMD_DRV_LOG(ERR, "failed to do RX init");
1979                 return -1;
1980         }
1981
1982         i40evf_tx_init(dev);
1983
1984         if (i40evf_configure_vsi_queues(dev) != 0) {
1985                 PMD_DRV_LOG(ERR, "configure queues failed");
1986                 goto err_queue;
1987         }
1988         if (i40evf_config_irq_map(dev)) {
1989                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1990                 goto err_queue;
1991         }
1992
1993         /* Set all mac addrs */
1994         i40evf_add_del_all_mac_addr(dev, TRUE);
1995         /* Set all multicast addresses */
1996         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
1997                                 TRUE);
1998
1999         if (i40evf_start_queues(dev) != 0) {
2000                 PMD_DRV_LOG(ERR, "enable queues failed");
2001                 goto err_mac;
2002         }
2003
2004         /* only enable interrupt in rx interrupt mode */
2005         if (dev->data->dev_conf.intr_conf.rxq != 0)
2006                 rte_intr_enable(intr_handle);
2007
2008         i40evf_enable_queues_intr(dev);
2009
2010         return 0;
2011
2012 err_mac:
2013         i40evf_add_del_all_mac_addr(dev, FALSE);
2014         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2015                                 FALSE);
2016 err_queue:
2017         return -1;
2018 }
2019
2020 static void
2021 i40evf_dev_stop(struct rte_eth_dev *dev)
2022 {
2023         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2024         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2025         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2026         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2027
2028         PMD_INIT_FUNC_TRACE();
2029
2030         if (dev->data->dev_conf.intr_conf.rxq != 0)
2031                 rte_intr_disable(intr_handle);
2032
2033         if (hw->adapter_stopped == 1)
2034                 return;
2035         i40evf_stop_queues(dev);
2036         i40evf_disable_queues_intr(dev);
2037         i40e_dev_clear_queues(dev);
2038
2039         /* Clean datapath event and queue/vec mapping */
2040         rte_intr_efd_disable(intr_handle);
2041         if (intr_handle->intr_vec) {
2042                 rte_free(intr_handle->intr_vec);
2043                 intr_handle->intr_vec = NULL;
2044         }
2045         /* remove all mac addrs */
2046         i40evf_add_del_all_mac_addr(dev, FALSE);
2047         /* remove all multicast addresses */
2048         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2049                                 FALSE);
2050         hw->adapter_stopped = 1;
2051
2052 }
2053
2054 static int
2055 i40evf_dev_link_update(struct rte_eth_dev *dev,
2056                        __rte_unused int wait_to_complete)
2057 {
2058         struct rte_eth_link new_link;
2059         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2060         /*
2061          * DPDK pf host provide interfacet to acquire link status
2062          * while Linux driver does not
2063          */
2064
2065         memset(&new_link, 0, sizeof(new_link));
2066         /* Linux driver PF host */
2067         switch (vf->link_speed) {
2068         case I40E_LINK_SPEED_100MB:
2069                 new_link.link_speed = ETH_SPEED_NUM_100M;
2070                 break;
2071         case I40E_LINK_SPEED_1GB:
2072                 new_link.link_speed = ETH_SPEED_NUM_1G;
2073                 break;
2074         case I40E_LINK_SPEED_10GB:
2075                 new_link.link_speed = ETH_SPEED_NUM_10G;
2076                 break;
2077         case I40E_LINK_SPEED_20GB:
2078                 new_link.link_speed = ETH_SPEED_NUM_20G;
2079                 break;
2080         case I40E_LINK_SPEED_25GB:
2081                 new_link.link_speed = ETH_SPEED_NUM_25G;
2082                 break;
2083         case I40E_LINK_SPEED_40GB:
2084                 new_link.link_speed = ETH_SPEED_NUM_40G;
2085                 break;
2086         default:
2087                 new_link.link_speed = ETH_SPEED_NUM_100M;
2088                 break;
2089         }
2090         /* full duplex only */
2091         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2092         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2093                                              ETH_LINK_DOWN;
2094         new_link.link_autoneg =
2095                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2096
2097         return rte_eth_linkstatus_set(dev, &new_link);
2098 }
2099
2100 static void
2101 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2102 {
2103         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2104         int ret;
2105
2106         /* If enabled, just return */
2107         if (vf->promisc_unicast_enabled)
2108                 return;
2109
2110         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2111         if (ret == 0)
2112                 vf->promisc_unicast_enabled = TRUE;
2113 }
2114
2115 static void
2116 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2117 {
2118         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2119         int ret;
2120
2121         /* If disabled, just return */
2122         if (!vf->promisc_unicast_enabled)
2123                 return;
2124
2125         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2126         if (ret == 0)
2127                 vf->promisc_unicast_enabled = FALSE;
2128 }
2129
2130 static void
2131 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2132 {
2133         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2134         int ret;
2135
2136         /* If enabled, just return */
2137         if (vf->promisc_multicast_enabled)
2138                 return;
2139
2140         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2141         if (ret == 0)
2142                 vf->promisc_multicast_enabled = TRUE;
2143 }
2144
2145 static void
2146 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2147 {
2148         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2149         int ret;
2150
2151         /* If enabled, just return */
2152         if (!vf->promisc_multicast_enabled)
2153                 return;
2154
2155         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2156         if (ret == 0)
2157                 vf->promisc_multicast_enabled = FALSE;
2158 }
2159
2160 static void
2161 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2162 {
2163         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2164
2165         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2166         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2167         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2168         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2169         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2170         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2171         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2172         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2173         dev_info->rx_queue_offload_capa = 0;
2174         dev_info->rx_offload_capa =
2175                 DEV_RX_OFFLOAD_VLAN_STRIP |
2176                 DEV_RX_OFFLOAD_QINQ_STRIP |
2177                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2178                 DEV_RX_OFFLOAD_UDP_CKSUM |
2179                 DEV_RX_OFFLOAD_TCP_CKSUM |
2180                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2181                 DEV_RX_OFFLOAD_KEEP_CRC |
2182                 DEV_RX_OFFLOAD_SCATTER |
2183                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2184                 DEV_RX_OFFLOAD_VLAN_FILTER;
2185
2186         dev_info->tx_queue_offload_capa = 0;
2187         dev_info->tx_offload_capa =
2188                 DEV_TX_OFFLOAD_VLAN_INSERT |
2189                 DEV_TX_OFFLOAD_QINQ_INSERT |
2190                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2191                 DEV_TX_OFFLOAD_UDP_CKSUM |
2192                 DEV_TX_OFFLOAD_TCP_CKSUM |
2193                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2194                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2195                 DEV_TX_OFFLOAD_TCP_TSO |
2196                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2197                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2198                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2199                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2200                 DEV_TX_OFFLOAD_MULTI_SEGS;
2201
2202         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2203                 .rx_thresh = {
2204                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2205                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2206                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2207                 },
2208                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2209                 .rx_drop_en = 0,
2210                 .offloads = 0,
2211         };
2212
2213         dev_info->default_txconf = (struct rte_eth_txconf) {
2214                 .tx_thresh = {
2215                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2216                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2217                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2218                 },
2219                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2220                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2221                 .offloads = 0,
2222         };
2223
2224         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2225                 .nb_max = I40E_MAX_RING_DESC,
2226                 .nb_min = I40E_MIN_RING_DESC,
2227                 .nb_align = I40E_ALIGN_RING_DESC,
2228         };
2229
2230         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2231                 .nb_max = I40E_MAX_RING_DESC,
2232                 .nb_min = I40E_MIN_RING_DESC,
2233                 .nb_align = I40E_ALIGN_RING_DESC,
2234         };
2235 }
2236
2237 static int
2238 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2239 {
2240         int ret;
2241         struct i40e_eth_stats *pstats = NULL;
2242         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2243         struct i40e_vsi *vsi = &vf->vsi;
2244
2245         ret = i40evf_query_stats(dev, &pstats);
2246         if (ret == 0) {
2247                 i40evf_update_stats(vsi, pstats);
2248
2249                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2250                                                 pstats->rx_broadcast;
2251                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2252                                                 pstats->tx_unicast;
2253                 stats->imissed = pstats->rx_discards;
2254                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2255                 stats->ibytes = pstats->rx_bytes;
2256                 stats->obytes = pstats->tx_bytes;
2257         } else {
2258                 PMD_DRV_LOG(ERR, "Get statistics failed");
2259         }
2260         return ret;
2261 }
2262
2263 static void
2264 i40evf_dev_close(struct rte_eth_dev *dev)
2265 {
2266         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2267
2268         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2269         i40evf_dev_stop(dev);
2270         i40e_dev_free_queues(dev);
2271         /*
2272          * disable promiscuous mode before reset vf
2273          * it is a workaround solution when work with kernel driver
2274          * and it is not the normal way
2275          */
2276         i40evf_dev_promiscuous_disable(dev);
2277         i40evf_dev_allmulticast_disable(dev);
2278
2279         i40evf_reset_vf(hw);
2280         i40e_shutdown_adminq(hw);
2281         i40evf_disable_irq0(hw);
2282 }
2283
2284 /*
2285  * Reset VF device only to re-initialize resources in PMD layer
2286  */
2287 static int
2288 i40evf_dev_reset(struct rte_eth_dev *dev)
2289 {
2290         int ret;
2291
2292         ret = i40evf_dev_uninit(dev);
2293         if (ret)
2294                 return ret;
2295
2296         ret = i40evf_dev_init(dev);
2297
2298         return ret;
2299 }
2300
2301 static int
2302 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2303 {
2304         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2305         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2306         int ret;
2307
2308         if (!lut)
2309                 return -EINVAL;
2310
2311         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2312                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2313                                           lut, lut_size);
2314                 if (ret) {
2315                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2316                         return ret;
2317                 }
2318         } else {
2319                 uint32_t *lut_dw = (uint32_t *)lut;
2320                 uint16_t i, lut_size_dw = lut_size / 4;
2321
2322                 for (i = 0; i < lut_size_dw; i++)
2323                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2324         }
2325
2326         return 0;
2327 }
2328
2329 static int
2330 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2331 {
2332         struct i40e_vf *vf;
2333         struct i40e_hw *hw;
2334         int ret;
2335
2336         if (!vsi || !lut)
2337                 return -EINVAL;
2338
2339         vf = I40E_VSI_TO_VF(vsi);
2340         hw = I40E_VSI_TO_HW(vsi);
2341
2342         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2343                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2344                                           lut, lut_size);
2345                 if (ret) {
2346                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2347                         return ret;
2348                 }
2349         } else {
2350                 uint32_t *lut_dw = (uint32_t *)lut;
2351                 uint16_t i, lut_size_dw = lut_size / 4;
2352
2353                 for (i = 0; i < lut_size_dw; i++)
2354                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2355                 I40EVF_WRITE_FLUSH(hw);
2356         }
2357
2358         return 0;
2359 }
2360
2361 static int
2362 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2363                            struct rte_eth_rss_reta_entry64 *reta_conf,
2364                            uint16_t reta_size)
2365 {
2366         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2367         uint8_t *lut;
2368         uint16_t i, idx, shift;
2369         int ret;
2370
2371         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2372                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2373                         "(%d) doesn't match the number of hardware can "
2374                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2375                 return -EINVAL;
2376         }
2377
2378         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2379         if (!lut) {
2380                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2381                 return -ENOMEM;
2382         }
2383         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2384         if (ret)
2385                 goto out;
2386         for (i = 0; i < reta_size; i++) {
2387                 idx = i / RTE_RETA_GROUP_SIZE;
2388                 shift = i % RTE_RETA_GROUP_SIZE;
2389                 if (reta_conf[idx].mask & (1ULL << shift))
2390                         lut[i] = reta_conf[idx].reta[shift];
2391         }
2392         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2393
2394 out:
2395         rte_free(lut);
2396
2397         return ret;
2398 }
2399
2400 static int
2401 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2402                           struct rte_eth_rss_reta_entry64 *reta_conf,
2403                           uint16_t reta_size)
2404 {
2405         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2406         uint16_t i, idx, shift;
2407         uint8_t *lut;
2408         int ret;
2409
2410         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2411                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2412                         "(%d) doesn't match the number of hardware can "
2413                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2414                 return -EINVAL;
2415         }
2416
2417         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2418         if (!lut) {
2419                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2420                 return -ENOMEM;
2421         }
2422
2423         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2424         if (ret)
2425                 goto out;
2426         for (i = 0; i < reta_size; i++) {
2427                 idx = i / RTE_RETA_GROUP_SIZE;
2428                 shift = i % RTE_RETA_GROUP_SIZE;
2429                 if (reta_conf[idx].mask & (1ULL << shift))
2430                         reta_conf[idx].reta[shift] = lut[i];
2431         }
2432
2433 out:
2434         rte_free(lut);
2435
2436         return ret;
2437 }
2438
2439 static int
2440 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2441 {
2442         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2443         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2444         int ret = 0;
2445
2446         if (!key || key_len == 0) {
2447                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2448                 return 0;
2449         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2450                 sizeof(uint32_t)) {
2451                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2452                 return -EINVAL;
2453         }
2454
2455         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2456                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2457                         (struct i40e_aqc_get_set_rss_key_data *)key;
2458
2459                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2460                 if (ret)
2461                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2462                                      "via AQ");
2463         } else {
2464                 uint32_t *hash_key = (uint32_t *)key;
2465                 uint16_t i;
2466
2467                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2468                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2469                 I40EVF_WRITE_FLUSH(hw);
2470         }
2471
2472         return ret;
2473 }
2474
2475 static int
2476 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2477 {
2478         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2479         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2480         int ret;
2481
2482         if (!key || !key_len)
2483                 return -EINVAL;
2484
2485         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2486                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2487                         (struct i40e_aqc_get_set_rss_key_data *)key);
2488                 if (ret) {
2489                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2490                         return ret;
2491                 }
2492         } else {
2493                 uint32_t *key_dw = (uint32_t *)key;
2494                 uint16_t i;
2495
2496                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2497                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2498         }
2499         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2500
2501         return 0;
2502 }
2503
2504 static int
2505 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2506 {
2507         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2508         uint64_t hena;
2509         int ret;
2510
2511         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2512                                  rss_conf->rss_key_len);
2513         if (ret)
2514                 return ret;
2515
2516         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2517         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2518         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2519         I40EVF_WRITE_FLUSH(hw);
2520
2521         return 0;
2522 }
2523
2524 static void
2525 i40evf_disable_rss(struct i40e_vf *vf)
2526 {
2527         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2528
2529         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2530         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2531         I40EVF_WRITE_FLUSH(hw);
2532 }
2533
2534 static int
2535 i40evf_config_rss(struct i40e_vf *vf)
2536 {
2537         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2538         struct rte_eth_rss_conf rss_conf;
2539         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2540         uint16_t num;
2541
2542         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2543                 i40evf_disable_rss(vf);
2544                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2545                 return 0;
2546         }
2547
2548         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2549         /* Fill out the look up table */
2550         for (i = 0, j = 0; i < nb_q; i++, j++) {
2551                 if (j >= num)
2552                         j = 0;
2553                 lut = (lut << 8) | j;
2554                 if ((i & 3) == 3)
2555                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2556         }
2557
2558         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2559         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2560                 i40evf_disable_rss(vf);
2561                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2562                 return 0;
2563         }
2564
2565         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2566                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2567                 /* Calculate the default hash key */
2568                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2569                         rss_key_default[i] = (uint32_t)rte_rand();
2570                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2571                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2572                         sizeof(uint32_t);
2573         }
2574
2575         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2576 }
2577
2578 static int
2579 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2580                            struct rte_eth_rss_conf *rss_conf)
2581 {
2582         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2583         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2584         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2585         uint64_t hena;
2586
2587         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2588         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2589
2590         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2591                 if (rss_hf != 0) /* Enable RSS */
2592                         return -EINVAL;
2593                 return 0;
2594         }
2595
2596         /* RSS enabled */
2597         if (rss_hf == 0) /* Disable RSS */
2598                 return -EINVAL;
2599
2600         return i40evf_hw_rss_hash_set(vf, rss_conf);
2601 }
2602
2603 static int
2604 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2605                              struct rte_eth_rss_conf *rss_conf)
2606 {
2607         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2608         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2609         uint64_t hena;
2610
2611         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2612                            &rss_conf->rss_key_len);
2613
2614         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2615         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2616         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2617
2618         return 0;
2619 }
2620
2621 static int
2622 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2623 {
2624         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2625         struct rte_eth_dev_data *dev_data = vf->dev_data;
2626         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2627         int ret = 0;
2628
2629         /* check if mtu is within the allowed range */
2630         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2631                 return -EINVAL;
2632
2633         /* mtu setting is forbidden if port is start */
2634         if (dev_data->dev_started) {
2635                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2636                             dev_data->port_id);
2637                 return -EBUSY;
2638         }
2639
2640         if (frame_size > ETHER_MAX_LEN)
2641                 dev_data->dev_conf.rxmode.offloads |=
2642                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2643         else
2644                 dev_data->dev_conf.rxmode.offloads &=
2645                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2646         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2647
2648         return ret;
2649 }
2650
2651 static int
2652 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2653                             struct ether_addr *mac_addr)
2654 {
2655         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2656         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2657
2658         if (!is_valid_assigned_ether_addr(mac_addr)) {
2659                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2660                 return -EINVAL;
2661         }
2662
2663         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2664                 return -EPERM;
2665
2666         i40evf_del_mac_addr_by_addr(dev, (struct ether_addr *)hw->mac.addr);
2667
2668         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2669                 return -EIO;
2670
2671         ether_addr_copy(mac_addr, (struct ether_addr *)hw->mac.addr);
2672         return 0;
2673 }
2674
2675 static int
2676 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2677                         struct ether_addr *mc_addrs,
2678                         uint32_t mc_addrs_num, bool add)
2679 {
2680         struct virtchnl_ether_addr_list *list;
2681         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2682         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2683                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2684         uint32_t i;
2685         int err;
2686         struct vf_cmd_info args;
2687
2688         if (mc_addrs == NULL || mc_addrs_num == 0)
2689                 return 0;
2690
2691         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2692                 return -EINVAL;
2693
2694         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2695         list->vsi_id = vf->vsi_res->vsi_id;
2696         list->num_elements = mc_addrs_num;
2697
2698         for (i = 0; i < mc_addrs_num; i++) {
2699                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2700                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2701                                     mc_addrs[i].addr_bytes[0],
2702                                     mc_addrs[i].addr_bytes[1],
2703                                     mc_addrs[i].addr_bytes[2],
2704                                     mc_addrs[i].addr_bytes[3],
2705                                     mc_addrs[i].addr_bytes[4],
2706                                     mc_addrs[i].addr_bytes[5]);
2707                         return -EINVAL;
2708                 }
2709
2710                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2711                         sizeof(list->list[i].addr));
2712         }
2713
2714         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2715         args.in_args = cmd_buffer;
2716         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2717                 i * sizeof(struct virtchnl_ether_addr);
2718         args.out_buffer = vf->aq_resp;
2719         args.out_size = I40E_AQ_BUF_SZ;
2720         err = i40evf_execute_vf_cmd(dev, &args);
2721         if (err) {
2722                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2723                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2724                 return err;
2725         }
2726
2727         return 0;
2728 }
2729
2730 static int
2731 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addrs,
2732                         uint32_t mc_addrs_num)
2733 {
2734         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2735         int err;
2736
2737         /* flush previous addresses */
2738         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2739                                 FALSE);
2740         if (err)
2741                 return err;
2742
2743         vf->mc_addrs_num = 0;
2744
2745         /* add new ones */
2746         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2747                                         TRUE);
2748         if (err)
2749                 return err;
2750
2751         vf->mc_addrs_num = mc_addrs_num;
2752         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2753
2754         return 0;
2755 }