drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_ethdev_pci.h>
  59 #include <rte_malloc.h>
  60 #include <rte_dev.h>
  61
  62 #include "i40e_logs.h"
  63 #include "base/i40e_prototype.h"
  64 #include "base/i40e_adminq_cmd.h"
  65 #include "base/i40e_type.h"
  66
  67 #include "i40e_rxtx.h"
  68 #include "i40e_ethdev.h"
  69 #include "i40e_pf.h"
  70 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77
  78 struct i40evf_arq_msg_info {
  79         enum virtchnl_ops ops;
  80         enum i40e_status_code result;
  81         uint16_t buf_len;
  82         uint16_t msg_len;
  83         uint8_t *msg;
  84 };
  85
  86 struct vf_cmd_info {
  87         enum virtchnl_ops ops;
  88         uint8_t *in_args;
  89         uint32_t in_args_size;
  90         uint8_t *out_buffer;
  91         /* Input & output type. pass in buffer size and pass out
  92          * actual return result
  93          */
  94         uint32_t out_size;
  95 };
  96
  97 enum i40evf_aq_result {
  98         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  99         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 100         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 101         I40EVF_MSG_CMD,      /* Read async command result */
 102 };
 103
 104 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 105 static int i40evf_dev_start(struct rte_eth_dev *dev);
 106 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 107 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 108                                 struct rte_eth_dev_info *dev_info);
 109 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 110                                   int wait_to_complete);
 111 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 112                                 struct rte_eth_stats *stats);
 113 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 114                                  struct rte_eth_xstat *xstats, unsigned n);
 115 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
 116                                        struct rte_eth_xstat_name *xstats_names,
 117                                        unsigned limit);
 118 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
 119 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 120                                   uint16_t vlan_id, int on);
 121 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 122 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 123                                 int on);
 124 static void i40evf_dev_close(struct rte_eth_dev *dev);
 125 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 126 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 127 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 128 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 129 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 130 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 131                                      uint16_t rx_queue_id);
 132 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 133                                     uint16_t rx_queue_id);
 134 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 135                                      uint16_t tx_queue_id);
 136 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 137                                     uint16_t tx_queue_id);
 138 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 139                                struct ether_addr *addr,
 140                                uint32_t index,
 141                                uint32_t pool);
 142 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 143 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 144                         struct rte_eth_rss_reta_entry64 *reta_conf,
 145                         uint16_t reta_size);
 146 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 147                         struct rte_eth_rss_reta_entry64 *reta_conf,
 148                         uint16_t reta_size);
 149 static int i40evf_config_rss(struct i40e_vf *vf);
 150 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 151                                       struct rte_eth_rss_conf *rss_conf);
 152 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 153                                         struct rte_eth_rss_conf *rss_conf);
 154 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 155 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 156                                         struct ether_addr *mac_addr);
 157 static int
 158 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 159 static int
 160 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 161 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 162                                    uint8_t *msg,
 163                                    uint16_t msglen);
 164
 165 /* Default hash key buffer for RSS */
 166 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 167
 168 struct rte_i40evf_xstats_name_off {
 169         char name[RTE_ETH_XSTATS_NAME_SIZE];
 170         unsigned offset;
 171 };
 172
 173 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 174         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 175         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 176         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 177         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 178         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 179         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 180                 rx_unknown_protocol)},
 181         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 182         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 183         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 184         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 185         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 186         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 187 };
 188
 189 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 190                 sizeof(rte_i40evf_stats_strings[0]))
 191
 192 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 193         .dev_configure        = i40evf_dev_configure,
 194         .dev_start            = i40evf_dev_start,
 195         .dev_stop             = i40evf_dev_stop,
 196         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 197         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 198         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 199         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 200         .link_update          = i40evf_dev_link_update,
 201         .stats_get            = i40evf_dev_stats_get,
 202         .xstats_get           = i40evf_dev_xstats_get,
 203         .xstats_get_names     = i40evf_dev_xstats_get_names,
 204         .xstats_reset         = i40evf_dev_xstats_reset,
 205         .dev_close            = i40evf_dev_close,
 206         .dev_infos_get        = i40evf_dev_info_get,
 207         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 208         .vlan_filter_set      = i40evf_vlan_filter_set,
 209         .vlan_offload_set     = i40evf_vlan_offload_set,
 210         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 211         .rx_queue_start       = i40evf_dev_rx_queue_start,
 212         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 213         .tx_queue_start       = i40evf_dev_tx_queue_start,
 214         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 215         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 216         .rx_queue_release     = i40e_dev_rx_queue_release,
 217         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 218         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 219         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 220         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 221         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 222         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 223         .tx_queue_release     = i40e_dev_tx_queue_release,
 224         .rx_queue_count       = i40e_dev_rx_queue_count,
 225         .rxq_info_get         = i40e_rxq_info_get,
 226         .txq_info_get         = i40e_txq_info_get,
 227         .mac_addr_add         = i40evf_add_mac_addr,
 228         .mac_addr_remove      = i40evf_del_mac_addr,
 229         .reta_update          = i40evf_dev_rss_reta_update,
 230         .reta_query           = i40evf_dev_rss_reta_query,
 231         .rss_hash_update      = i40evf_dev_rss_hash_update,
 232         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 233         .mtu_set              = i40evf_dev_mtu_set,
 234         .mac_addr_set         = i40evf_set_default_mac_addr,
 235 };
 236
 237 /*
 238  * Read data in admin queue to get msg from pf driver
 239  */
 240 static enum i40evf_aq_result
 241 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 242 {
 243         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 244         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 245         struct i40e_arq_event_info event;
 246         enum virtchnl_ops opcode;
 247         enum i40e_status_code retval;
 248         int ret;
 249         enum i40evf_aq_result result = I40EVF_MSG_NON;
 250
 251         event.buf_len = data->buf_len;
 252         event.msg_buf = data->msg;
 253         ret = i40e_clean_arq_element(hw, &event, NULL);
 254         /* Can't read any msg from adminQ */
 255         if (ret) {
 256                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 257                         result = I40EVF_MSG_ERR;
 258                 return result;
 259         }
 260
 261         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 262         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 263         /* pf sys event */
 264         if (opcode == VIRTCHNL_OP_EVENT) {
 265                 struct virtchnl_pf_event *vpe =
 266                         (struct virtchnl_pf_event *)event.msg_buf;
 267
 268                 result = I40EVF_MSG_SYS;
 269                 switch (vpe->event) {
 270                 case VIRTCHNL_EVENT_LINK_CHANGE:
 271                         vf->link_up =
 272                                 vpe->event_data.link_event.link_status;
 273                         vf->link_speed =
 274                                 vpe->event_data.link_event.link_speed;
 275                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 276                         PMD_DRV_LOG(INFO, "Link status update:%s",
 277                                     vf->link_up ? "up" : "down");
 278                         break;
 279                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 280                         vf->vf_reset = true;
 281                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 282                         PMD_DRV_LOG(INFO, "vf is reseting");
 283                         break;
 284                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 285                         vf->dev_closed = true;
 286                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 287                         PMD_DRV_LOG(INFO, "PF driver closed");
 288                         break;
 289                 default:
 290                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 291                                     __func__, vpe->event);
 292                 }
 293         } else {
 294                 /* async reply msg on command issued by vf previously */
 295                 result = I40EVF_MSG_CMD;
 296                 /* Actual data length read from PF */
 297                 data->msg_len = event.msg_len;
 298         }
 299
 300         data->result = retval;
 301         data->ops = opcode;
 302
 303         return result;
 304 }
 305
 306 /**
 307  * clear current command. Only call in case execute
 308  * _atomic_set_cmd successfully.
 309  */
 310 static inline void
 311 _clear_cmd(struct i40e_vf *vf)
 312 {
 313         rte_wmb();
 314         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 315 }
 316
 317 /*
 318  * Check there is pending cmd in execution. If none, set new command.
 319  */
 320 static inline int
 321 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 322 {
 323         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 324                         VIRTCHNL_OP_UNKNOWN, ops);
 325
 326         if (!ret)
 327                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 328
 329         return !ret;
 330 }
 331
 332 #define MAX_TRY_TIMES 200
 333 #define ASQ_DELAY_MS  10
 334
 335 static int
 336 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 337 {
 338         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 339         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 340         struct i40evf_arq_msg_info info;
 341         enum i40evf_aq_result ret;
 342         int err, i = 0;
 343
 344         if (_atomic_set_cmd(vf, args->ops))
 345                 return -1;
 346
 347         info.msg = args->out_buffer;
 348         info.buf_len = args->out_size;
 349         info.ops = VIRTCHNL_OP_UNKNOWN;
 350         info.result = I40E_SUCCESS;
 351
 352         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 353                      args->in_args, args->in_args_size, NULL);
 354         if (err) {
 355                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 356                 _clear_cmd(vf);
 357                 return err;
 358         }
 359
 360         switch (args->ops) {
 361         case VIRTCHNL_OP_RESET_VF:
 362                 /*no need to process in this function */
 363                 err = 0;
 364                 break;
 365         case VIRTCHNL_OP_VERSION:
 366         case VIRTCHNL_OP_GET_VF_RESOURCES:
 367                 /* for init adminq commands, need to poll the response */
 368                 err = -1;
 369                 do {
 370                         ret = i40evf_read_pfmsg(dev, &info);
 371                         vf->cmd_retval = info.result;
 372                         if (ret == I40EVF_MSG_CMD) {
 373                                 err = 0;
 374                                 break;
 375                         } else if (ret == I40EVF_MSG_ERR)
 376                                 break;
 377                         rte_delay_ms(ASQ_DELAY_MS);
 378                         /* If don't read msg or read sys event, continue */
 379                 } while (i++ < MAX_TRY_TIMES);
 380                 _clear_cmd(vf);
 381                 break;
 382
 383         default:
 384                 /* for other adminq in running time, waiting the cmd done flag */
 385                 err = -1;
 386                 do {
 387                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 388                                 err = 0;
 389                                 break;
 390                         }
 391                         rte_delay_ms(ASQ_DELAY_MS);
 392                         /* If don't read msg or read sys event, continue */
 393                 } while (i++ < MAX_TRY_TIMES);
 394                 /* If there's no response is received, clear command */
 395                 if (i >= MAX_TRY_TIMES) {
 396                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 397                         _clear_cmd(vf);
 398                 }
 399                 break;
 400         }
 401
 402         return err | vf->cmd_retval;
 403 }
 404
 405 /*
 406  * Check API version with sync wait until version read or fail from admin queue
 407  */
 408 static int
 409 i40evf_check_api_version(struct rte_eth_dev *dev)
 410 {
 411         struct virtchnl_version_info version, *pver;
 412         int err;
 413         struct vf_cmd_info args;
 414         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 415
 416         version.major = VIRTCHNL_VERSION_MAJOR;
 417         version.minor = VIRTCHNL_VERSION_MINOR;
 418
 419         args.ops = VIRTCHNL_OP_VERSION;
 420         args.in_args = (uint8_t *)&version;
 421         args.in_args_size = sizeof(version);
 422         args.out_buffer = vf->aq_resp;
 423         args.out_size = I40E_AQ_BUF_SZ;
 424
 425         err = i40evf_execute_vf_cmd(dev, &args);
 426         if (err) {
 427                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 428                 return err;
 429         }
 430
 431         pver = (struct virtchnl_version_info *)args.out_buffer;
 432         vf->version_major = pver->major;
 433         vf->version_minor = pver->minor;
 434         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 435                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 436         else if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 437                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 438                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 439         else {
 440                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 441                                         vf->version_major, vf->version_minor,
 442                                                 VIRTCHNL_VERSION_MAJOR,
 443                                                 VIRTCHNL_VERSION_MINOR);
 444                 return -1;
 445         }
 446
 447         return 0;
 448 }
 449
 450 static int
 451 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 452 {
 453         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 454         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 455         int err;
 456         struct vf_cmd_info args;
 457         uint32_t caps, len;
 458
 459         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 460         args.out_buffer = vf->aq_resp;
 461         args.out_size = I40E_AQ_BUF_SZ;
 462         if (PF_IS_V11(vf)) {
 463                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 464                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 465                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 466                        VIRTCHNL_VF_OFFLOAD_VLAN |
 467                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 468                 args.in_args = (uint8_t *)&caps;
 469                 args.in_args_size = sizeof(caps);
 470         } else {
 471                 args.in_args = NULL;
 472                 args.in_args_size = 0;
 473         }
 474         err = i40evf_execute_vf_cmd(dev, &args);
 475
 476         if (err) {
 477                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 478                 return err;
 479         }
 480
 481         len =  sizeof(struct virtchnl_vf_resource) +
 482                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 483
 484         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 485                         RTE_MIN(args.out_size, len));
 486         i40e_vf_parse_hw_config(hw, vf->vf_res);
 487
 488         return 0;
 489 }
 490
 491 static int
 492 i40evf_config_promisc(struct rte_eth_dev *dev,
 493                       bool enable_unicast,
 494                       bool enable_multicast)
 495 {
 496         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 497         int err;
 498         struct vf_cmd_info args;
 499         struct virtchnl_promisc_info promisc;
 500
 501         promisc.flags = 0;
 502         promisc.vsi_id = vf->vsi_res->vsi_id;
 503
 504         if (enable_unicast)
 505                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 506
 507         if (enable_multicast)
 508                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 509
 510         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 511         args.in_args = (uint8_t *)&promisc;
 512         args.in_args_size = sizeof(promisc);
 513         args.out_buffer = vf->aq_resp;
 514         args.out_size = I40E_AQ_BUF_SZ;
 515
 516         err = i40evf_execute_vf_cmd(dev, &args);
 517
 518         if (err)
 519                 PMD_DRV_LOG(ERR, "fail to execute command "
 520                             "CONFIG_PROMISCUOUS_MODE");
 521         return err;
 522 }
 523
 524 static int
 525 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 526 {
 527         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 528         struct vf_cmd_info args;
 529         int ret;
 530
 531         memset(&args, 0, sizeof(args));
 532         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 533         args.in_args = NULL;
 534         args.in_args_size = 0;
 535         args.out_buffer = vf->aq_resp;
 536         args.out_size = I40E_AQ_BUF_SZ;
 537         ret = i40evf_execute_vf_cmd(dev, &args);
 538         if (ret)
 539                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 540                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 541
 542         return ret;
 543 }
 544
 545 static int
 546 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 547 {
 548         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 549         struct vf_cmd_info args;
 550         int ret;
 551
 552         memset(&args, 0, sizeof(args));
 553         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 554         args.in_args = NULL;
 555         args.in_args_size = 0;
 556         args.out_buffer = vf->aq_resp;
 557         args.out_size = I40E_AQ_BUF_SZ;
 558         ret = i40evf_execute_vf_cmd(dev, &args);
 559         if (ret)
 560                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 561                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 562
 563         return ret;
 564 }
 565
 566 static int
 567 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 568                                 struct i40e_vsi_vlan_pvid_info *info)
 569 {
 570         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 571         int err;
 572         struct vf_cmd_info args;
 573         struct virtchnl_pvid_info tpid_info;
 574
 575         if (info == NULL) {
 576                 PMD_DRV_LOG(ERR, "invalid parameters");
 577                 return I40E_ERR_PARAM;
 578         }
 579
 580         memset(&tpid_info, 0, sizeof(tpid_info));
 581         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 582         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 583
 584         args.ops = (enum virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 585         args.in_args = (uint8_t *)&tpid_info;
 586         args.in_args_size = sizeof(tpid_info);
 587         args.out_buffer = vf->aq_resp;
 588         args.out_size = I40E_AQ_BUF_SZ;
 589
 590         err = i40evf_execute_vf_cmd(dev, &args);
 591         if (err)
 592                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 593
 594         return err;
 595 }
 596
 597 static void
 598 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 599                                   uint16_t vsi_id,
 600                                   uint16_t queue_id,
 601                                   uint16_t nb_txq,
 602                                   struct i40e_tx_queue *txq)
 603 {
 604         txq_info->vsi_id = vsi_id;
 605         txq_info->queue_id = queue_id;
 606         if (queue_id < nb_txq) {
 607                 txq_info->ring_len = txq->nb_tx_desc;
 608                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 609         }
 610 }
 611
 612 static void
 613 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 614                                   uint16_t vsi_id,
 615                                   uint16_t queue_id,
 616                                   uint16_t nb_rxq,
 617                                   uint32_t max_pkt_size,
 618                                   struct i40e_rx_queue *rxq)
 619 {
 620         rxq_info->vsi_id = vsi_id;
 621         rxq_info->queue_id = queue_id;
 622         rxq_info->max_pkt_size = max_pkt_size;
 623         if (queue_id < nb_rxq) {
 624                 rxq_info->ring_len = rxq->nb_rx_desc;
 625                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 626                 rxq_info->databuffer_size =
 627                         (rte_pktmbuf_data_room_size(rxq->mp) -
 628                                 RTE_PKTMBUF_HEADROOM);
 629         }
 630 }
 631
 632 /* It configures VSI queues to co-work with Linux PF host */
 633 static int
 634 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 635 {
 636         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 637         struct i40e_rx_queue **rxq =
 638                 (struct i40e_rx_queue **)dev->data->rx_queues;
 639         struct i40e_tx_queue **txq =
 640                 (struct i40e_tx_queue **)dev->data->tx_queues;
 641         struct virtchnl_vsi_queue_config_info *vc_vqci;
 642         struct virtchnl_queue_pair_info *vc_qpi;
 643         struct vf_cmd_info args;
 644         uint16_t i, nb_qp = vf->num_queue_pairs;
 645         const uint32_t size =
 646                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 647         uint8_t buff[size];
 648         int ret;
 649
 650         memset(buff, 0, sizeof(buff));
 651         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 652         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 653         vc_vqci->num_queue_pairs = nb_qp;
 654
 655         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 656                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 657                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 658                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 659                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 660                                         vf->max_pkt_len, rxq[i]);
 661         }
 662         memset(&args, 0, sizeof(args));
 663         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 664         args.in_args = (uint8_t *)vc_vqci;
 665         args.in_args_size = size;
 666         args.out_buffer = vf->aq_resp;
 667         args.out_size = I40E_AQ_BUF_SZ;
 668         ret = i40evf_execute_vf_cmd(dev, &args);
 669         if (ret)
 670                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 671                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 672
 673         return ret;
 674 }
 675
 676 /* It configures VSI queues to co-work with DPDK PF host */
 677 static int
 678 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 679 {
 680         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 681         struct i40e_rx_queue **rxq =
 682                 (struct i40e_rx_queue **)dev->data->rx_queues;
 683         struct i40e_tx_queue **txq =
 684                 (struct i40e_tx_queue **)dev->data->tx_queues;
 685         struct virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 686         struct virtchnl_queue_pair_ext_info *vc_qpei;
 687         struct vf_cmd_info args;
 688         uint16_t i, nb_qp = vf->num_queue_pairs;
 689         const uint32_t size =
 690                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 691         uint8_t buff[size];
 692         int ret;
 693
 694         memset(buff, 0, sizeof(buff));
 695         vc_vqcei = (struct virtchnl_vsi_queue_config_ext_info *)buff;
 696         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 697         vc_vqcei->num_queue_pairs = nb_qp;
 698         vc_qpei = vc_vqcei->qpair;
 699         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 700                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 701                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 702                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 703                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 704                                         vf->max_pkt_len, rxq[i]);
 705                 if (i < dev->data->nb_rx_queues)
 706                         /*
 707                          * It adds extra info for configuring VSI queues, which
 708                          * is needed to enable the configurable crc stripping
 709                          * in VF.
 710                          */
 711                         vc_qpei->rxq_ext.crcstrip =
 712                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 713         }
 714         memset(&args, 0, sizeof(args));
 715         args.ops =
 716                 (enum virtchnl_ops)VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 717         args.in_args = (uint8_t *)vc_vqcei;
 718         args.in_args_size = size;
 719         args.out_buffer = vf->aq_resp;
 720         args.out_size = I40E_AQ_BUF_SZ;
 721         ret = i40evf_execute_vf_cmd(dev, &args);
 722         if (ret)
 723                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 724                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT");
 725
 726         return ret;
 727 }
 728
 729 static int
 730 i40evf_configure_queues(struct rte_eth_dev *dev)
 731 {
 732         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 733
 734         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 735                 /* To support DPDK PF host */
 736                 return i40evf_configure_vsi_queues_ext(dev);
 737         else
 738                 /* To support Linux PF host */
 739                 return i40evf_configure_vsi_queues(dev);
 740 }
 741
 742 static int
 743 i40evf_config_irq_map(struct rte_eth_dev *dev)
 744 {
 745         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 746         struct vf_cmd_info args;
 747         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 748                 sizeof(struct virtchnl_vector_map)];
 749         struct virtchnl_irq_map_info *map_info;
 750         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 751         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 752         uint32_t vector_id;
 753         int i, err;
 754
 755         if (rte_intr_allow_others(intr_handle)) {
 756                 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 757                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 758                 else
 759                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 760         } else {
 761                 vector_id = I40E_MISC_VEC_ID;
 762         }
 763
 764         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 765         map_info->num_vectors = 1;
 766         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 767         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 768         /* Alway use default dynamic MSIX interrupt */
 769         map_info->vecmap[0].vector_id = vector_id;
 770         /* Don't map any tx queue */
 771         map_info->vecmap[0].txq_map = 0;
 772         map_info->vecmap[0].rxq_map = 0;
 773         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 774                 map_info->vecmap[0].rxq_map |= 1 << i;
 775                 if (rte_intr_dp_is_en(intr_handle))
 776                         intr_handle->intr_vec[i] = vector_id;
 777         }
 778
 779         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 780         args.in_args = (u8 *)cmd_buffer;
 781         args.in_args_size = sizeof(cmd_buffer);
 782         args.out_buffer = vf->aq_resp;
 783         args.out_size = I40E_AQ_BUF_SZ;
 784         err = i40evf_execute_vf_cmd(dev, &args);
 785         if (err)
 786                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 787
 788         return err;
 789 }
 790
 791 static int
 792 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 793                                 bool on)
 794 {
 795         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 796         struct virtchnl_queue_select queue_select;
 797         int err;
 798         struct vf_cmd_info args;
 799         memset(&queue_select, 0, sizeof(queue_select));
 800         queue_select.vsi_id = vf->vsi_res->vsi_id;
 801
 802         if (isrx)
 803                 queue_select.rx_queues |= 1 << qid;
 804         else
 805                 queue_select.tx_queues |= 1 << qid;
 806
 807         if (on)
 808                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 809         else
 810                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 811         args.in_args = (u8 *)&queue_select;
 812         args.in_args_size = sizeof(queue_select);
 813         args.out_buffer = vf->aq_resp;
 814         args.out_size = I40E_AQ_BUF_SZ;
 815         err = i40evf_execute_vf_cmd(dev, &args);
 816         if (err)
 817                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 818                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 819
 820         return err;
 821 }
 822
 823 static int
 824 i40evf_start_queues(struct rte_eth_dev *dev)
 825 {
 826         struct rte_eth_dev_data *dev_data = dev->data;
 827         int i;
 828         struct i40e_rx_queue *rxq;
 829         struct i40e_tx_queue *txq;
 830
 831         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 832                 rxq = dev_data->rx_queues[i];
 833                 if (rxq->rx_deferred_start)
 834                         continue;
 835                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 836                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 837                         return -1;
 838                 }
 839         }
 840
 841         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 842                 txq = dev_data->tx_queues[i];
 843                 if (txq->tx_deferred_start)
 844                         continue;
 845                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 846                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 847                         return -1;
 848                 }
 849         }
 850
 851         return 0;
 852 }
 853
 854 static int
 855 i40evf_stop_queues(struct rte_eth_dev *dev)
 856 {
 857         int i;
 858
 859         /* Stop TX queues first */
 860         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 861                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 862                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 863                         return -1;
 864                 }
 865         }
 866
 867         /* Then stop RX queues */
 868         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 869                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 870                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 871                         return -1;
 872                 }
 873         }
 874
 875         return 0;
 876 }
 877
 878 static int
 879 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 880                     struct ether_addr *addr,
 881                     __rte_unused uint32_t index,
 882                     __rte_unused uint32_t pool)
 883 {
 884         struct virtchnl_ether_addr_list *list;
 885         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 886         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 887                         sizeof(struct virtchnl_ether_addr)];
 888         int err;
 889         struct vf_cmd_info args;
 890
 891         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 892                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 893                             addr->addr_bytes[0], addr->addr_bytes[1],
 894                             addr->addr_bytes[2], addr->addr_bytes[3],
 895                             addr->addr_bytes[4], addr->addr_bytes[5]);
 896                 return I40E_ERR_INVALID_MAC_ADDR;
 897         }
 898
 899         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 900         list->vsi_id = vf->vsi_res->vsi_id;
 901         list->num_elements = 1;
 902         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 903                                         sizeof(addr->addr_bytes));
 904
 905         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 906         args.in_args = cmd_buffer;
 907         args.in_args_size = sizeof(cmd_buffer);
 908         args.out_buffer = vf->aq_resp;
 909         args.out_size = I40E_AQ_BUF_SZ;
 910         err = i40evf_execute_vf_cmd(dev, &args);
 911         if (err)
 912                 PMD_DRV_LOG(ERR, "fail to execute command "
 913                             "OP_ADD_ETHER_ADDRESS");
 914
 915         return err;
 916 }
 917
 918 static void
 919 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 920                             struct ether_addr *addr)
 921 {
 922         struct virtchnl_ether_addr_list *list;
 923         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 924         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 925                         sizeof(struct virtchnl_ether_addr)];
 926         int err;
 927         struct vf_cmd_info args;
 928
 929         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 930                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 931                             addr->addr_bytes[0], addr->addr_bytes[1],
 932                             addr->addr_bytes[2], addr->addr_bytes[3],
 933                             addr->addr_bytes[4], addr->addr_bytes[5]);
 934                 return;
 935         }
 936
 937         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 938         list->vsi_id = vf->vsi_res->vsi_id;
 939         list->num_elements = 1;
 940         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 941                         sizeof(addr->addr_bytes));
 942
 943         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 944         args.in_args = cmd_buffer;
 945         args.in_args_size = sizeof(cmd_buffer);
 946         args.out_buffer = vf->aq_resp;
 947         args.out_size = I40E_AQ_BUF_SZ;
 948         err = i40evf_execute_vf_cmd(dev, &args);
 949         if (err)
 950                 PMD_DRV_LOG(ERR, "fail to execute command "
 951                             "OP_DEL_ETHER_ADDRESS");
 952         return;
 953 }
 954
 955 static void
 956 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 957 {
 958         struct rte_eth_dev_data *data = dev->data;
 959         struct ether_addr *addr;
 960
 961         addr = &data->mac_addrs[index];
 962
 963         i40evf_del_mac_addr_by_addr(dev, addr);
 964 }
 965
 966 static int
 967 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 968 {
 969         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 970         struct virtchnl_queue_select q_stats;
 971         int err;
 972         struct vf_cmd_info args;
 973
 974         memset(&q_stats, 0, sizeof(q_stats));
 975         q_stats.vsi_id = vf->vsi_res->vsi_id;
 976         args.ops = VIRTCHNL_OP_GET_STATS;
 977         args.in_args = (u8 *)&q_stats;
 978         args.in_args_size = sizeof(q_stats);
 979         args.out_buffer = vf->aq_resp;
 980         args.out_size = I40E_AQ_BUF_SZ;
 981
 982         err = i40evf_execute_vf_cmd(dev, &args);
 983         if (err) {
 984                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 985                 *pstats = NULL;
 986                 return err;
 987         }
 988         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 989         return 0;
 990 }
 991
 992 static int
 993 i40evf_get_statistics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 994 {
 995         int ret;
 996         struct i40e_eth_stats *pstats = NULL;
 997
 998         ret = i40evf_update_stats(dev, &pstats);
 999         if (ret != 0)
1000                 return 0;
1001
1002         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
1003                                                 pstats->rx_broadcast;
1004         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
1005                                                 pstats->tx_unicast;
1006         stats->imissed = pstats->rx_discards;
1007         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
1008         stats->ibytes = pstats->rx_bytes;
1009         stats->obytes = pstats->tx_bytes;
1010
1011         return 0;
1012 }
1013
1014 static void
1015 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
1016 {
1017         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1018         struct i40e_eth_stats *pstats = NULL;
1019
1020         /* read stat values to clear hardware registers */
1021         i40evf_update_stats(dev, &pstats);
1022
1023         /* set stats offset base on current values */
1024         vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
1025 }
1026
1027 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1028                                       struct rte_eth_xstat_name *xstats_names,
1029                                       __rte_unused unsigned limit)
1030 {
1031         unsigned i;
1032
1033         if (xstats_names != NULL)
1034                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1035                         snprintf(xstats_names[i].name,
1036                                 sizeof(xstats_names[i].name),
1037                                 "%s", rte_i40evf_stats_strings[i].name);
1038                 }
1039         return I40EVF_NB_XSTATS;
1040 }
1041
1042 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1043                                  struct rte_eth_xstat *xstats, unsigned n)
1044 {
1045         int ret;
1046         unsigned i;
1047         struct i40e_eth_stats *pstats = NULL;
1048
1049         if (n < I40EVF_NB_XSTATS)
1050                 return I40EVF_NB_XSTATS;
1051
1052         ret = i40evf_update_stats(dev, &pstats);
1053         if (ret != 0)
1054                 return 0;
1055
1056         if (!xstats)
1057                 return 0;
1058
1059         /* loop over xstats array and values from pstats */
1060         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1061                 xstats[i].id = i;
1062                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1063                         rte_i40evf_stats_strings[i].offset);
1064         }
1065
1066         return I40EVF_NB_XSTATS;
1067 }
1068
1069 static int
1070 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1071 {
1072         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1073         struct virtchnl_vlan_filter_list *vlan_list;
1074         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1075                                                         sizeof(uint16_t)];
1076         int err;
1077         struct vf_cmd_info args;
1078
1079         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1080         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1081         vlan_list->num_elements = 1;
1082         vlan_list->vlan_id[0] = vlanid;
1083
1084         args.ops = VIRTCHNL_OP_ADD_VLAN;
1085         args.in_args = (u8 *)&cmd_buffer;
1086         args.in_args_size = sizeof(cmd_buffer);
1087         args.out_buffer = vf->aq_resp;
1088         args.out_size = I40E_AQ_BUF_SZ;
1089         err = i40evf_execute_vf_cmd(dev, &args);
1090         if (err)
1091                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1092
1093         return err;
1094 }
1095
1096 static int
1097 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1098 {
1099         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1100         struct virtchnl_vlan_filter_list *vlan_list;
1101         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1102                                                         sizeof(uint16_t)];
1103         int err;
1104         struct vf_cmd_info args;
1105
1106         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1107         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1108         vlan_list->num_elements = 1;
1109         vlan_list->vlan_id[0] = vlanid;
1110
1111         args.ops = VIRTCHNL_OP_DEL_VLAN;
1112         args.in_args = (u8 *)&cmd_buffer;
1113         args.in_args_size = sizeof(cmd_buffer);
1114         args.out_buffer = vf->aq_resp;
1115         args.out_size = I40E_AQ_BUF_SZ;
1116         err = i40evf_execute_vf_cmd(dev, &args);
1117         if (err)
1118                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1119
1120         return err;
1121 }
1122
1123 static const struct rte_pci_id pci_id_i40evf_map[] = {
1124         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1125         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1126         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1127         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1128         { .vendor_id = 0, /* sentinel */ },
1129 };
1130
1131 static inline int
1132 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1133                                     struct rte_eth_link *link)
1134 {
1135         struct rte_eth_link *dst = &(dev->data->dev_link);
1136         struct rte_eth_link *src = link;
1137
1138         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1139                                         *(uint64_t *)src) == 0)
1140                 return -1;
1141
1142         return 0;
1143 }
1144
1145 /* Disable IRQ0 */
1146 static inline void
1147 i40evf_disable_irq0(struct i40e_hw *hw)
1148 {
1149         /* Disable all interrupt types */
1150         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1151         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1152                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1153         I40EVF_WRITE_FLUSH(hw);
1154 }
1155
1156 /* Enable IRQ0 */
1157 static inline void
1158 i40evf_enable_irq0(struct i40e_hw *hw)
1159 {
1160         /* Enable admin queue interrupt trigger */
1161         uint32_t val;
1162
1163         i40evf_disable_irq0(hw);
1164         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1165         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1166                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1167         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1168
1169         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1170                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1171                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1172                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1173
1174         I40EVF_WRITE_FLUSH(hw);
1175 }
1176
1177 static int
1178 i40evf_reset_vf(struct i40e_hw *hw)
1179 {
1180         int i, reset;
1181
1182         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1183                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1184                 return -1;
1185         }
1186         /**
1187           * After issuing vf reset command to pf, pf won't necessarily
1188           * reset vf, it depends on what state it exactly is. If it's not
1189           * initialized yet, it won't have vf reset since it's in a certain
1190           * state. If not, it will try to reset. Even vf is reset, pf will
1191           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1192           * it to ACTIVE. In this duration, vf may not catch the moment that
1193           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1194           */
1195         rte_delay_ms(200);
1196
1197         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1198                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1199                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1200                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1201                 if (VIRTCHNL_VFR_COMPLETED == reset || VIRTCHNL_VFR_VFACTIVE == reset)
1202                         break;
1203                 else
1204                         rte_delay_ms(50);
1205         }
1206
1207         if (i >= MAX_RESET_WAIT_CNT) {
1208                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1209                 return -1;
1210         }
1211
1212         return 0;
1213 }
1214
1215 static int
1216 i40evf_init_vf(struct rte_eth_dev *dev)
1217 {
1218         int i, err, bufsz;
1219         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1220         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1221         uint16_t interval =
1222                 i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
1223
1224         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1225         vf->dev_data = dev->data;
1226         err = i40e_set_mac_type(hw);
1227         if (err) {
1228                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1229                 goto err;
1230         }
1231
1232         i40e_init_adminq_parameter(hw);
1233         err = i40e_init_adminq(hw);
1234         if (err) {
1235                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1236                 goto err;
1237         }
1238
1239         /* Reset VF and wait until it's complete */
1240         if (i40evf_reset_vf(hw)) {
1241                 PMD_INIT_LOG(ERR, "reset NIC failed");
1242                 goto err_aq;
1243         }
1244
1245         /* VF reset, shutdown admin queue and initialize again */
1246         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1247                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1248                 return -1;
1249         }
1250
1251         i40e_init_adminq_parameter(hw);
1252         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1253                 PMD_INIT_LOG(ERR, "init_adminq failed");
1254                 return -1;
1255         }
1256         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1257         if (!vf->aq_resp) {
1258                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1259                         goto err_aq;
1260         }
1261         if (i40evf_check_api_version(dev) != 0) {
1262                 PMD_INIT_LOG(ERR, "check_api version failed");
1263                 goto err_aq;
1264         }
1265         bufsz = sizeof(struct virtchnl_vf_resource) +
1266                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1267         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1268         if (!vf->vf_res) {
1269                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1270                         goto err_aq;
1271         }
1272
1273         if (i40evf_get_vf_resource(dev) != 0) {
1274                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1275                 goto err_alloc;
1276         }
1277
1278         /* got VF config message back from PF, now we can parse it */
1279         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1280                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1281                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1282         }
1283
1284         if (!vf->vsi_res) {
1285                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1286                 goto err_alloc;
1287         }
1288
1289         if (hw->mac.type == I40E_MAC_X722_VF)
1290                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1291         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1292         vf->vsi.type = (enum i40e_vsi_type)vf->vsi_res->vsi_type;
1293         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1294         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1295
1296         /* Store the MAC address configured by host, or generate random one */
1297         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1298                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1299         else
1300                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1301
1302         /* If the PF host is not DPDK, set the interval of ITR0 to max*/
1303         if (vf->version_major != I40E_DPDK_VERSION_MAJOR) {
1304                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1305                                (I40E_ITR_INDEX_DEFAULT <<
1306                                 I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1307                                (interval <<
1308                                 I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1309                 I40EVF_WRITE_FLUSH(hw);
1310         }
1311
1312         return 0;
1313
1314 err_alloc:
1315         rte_free(vf->vf_res);
1316 err_aq:
1317         i40e_shutdown_adminq(hw); /* ignore error */
1318 err:
1319         return -1;
1320 }
1321
1322 static int
1323 i40evf_uninit_vf(struct rte_eth_dev *dev)
1324 {
1325         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1326         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1327
1328         PMD_INIT_FUNC_TRACE();
1329
1330         if (hw->adapter_stopped == 0)
1331                 i40evf_dev_close(dev);
1332         rte_free(vf->vf_res);
1333         vf->vf_res = NULL;
1334         rte_free(vf->aq_resp);
1335         vf->aq_resp = NULL;
1336
1337         return 0;
1338 }
1339
1340 static void
1341 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1342                 __rte_unused uint16_t msglen)
1343 {
1344         struct virtchnl_pf_event *pf_msg =
1345                         (struct virtchnl_pf_event *)msg;
1346         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1347
1348         switch (pf_msg->event) {
1349         case VIRTCHNL_EVENT_RESET_IMPENDING:
1350                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1351                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1352                                               NULL, NULL);
1353                 break;
1354         case VIRTCHNL_EVENT_LINK_CHANGE:
1355                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1356                 vf->link_up = pf_msg->event_data.link_event.link_status;
1357                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1358                 break;
1359         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1360                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1361                 break;
1362         default:
1363                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1364                 break;
1365         }
1366 }
1367
1368 static void
1369 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1370 {
1371         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1372         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1373         struct i40e_arq_event_info info;
1374         uint16_t pending, aq_opc;
1375         enum virtchnl_ops msg_opc;
1376         enum i40e_status_code msg_ret;
1377         int ret;
1378
1379         info.buf_len = I40E_AQ_BUF_SZ;
1380         if (!vf->aq_resp) {
1381                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1382                 return;
1383         }
1384         info.msg_buf = vf->aq_resp;
1385
1386         pending = 1;
1387         while (pending) {
1388                 ret = i40e_clean_arq_element(hw, &info, &pending);
1389
1390                 if (ret != I40E_SUCCESS) {
1391                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1392                                     "ret: %d", ret);
1393                         break;
1394                 }
1395                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1396                 /* For the message sent from pf to vf, opcode is stored in
1397                  * cookie_high of struct i40e_aq_desc, while return error code
1398                  * are stored in cookie_low, Which is done by
1399                  * i40e_aq_send_msg_to_vf in PF driver.*/
1400                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1401                                                   info.desc.cookie_high);
1402                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1403                                                   info.desc.cookie_low);
1404                 switch (aq_opc) {
1405                 case i40e_aqc_opc_send_msg_to_vf:
1406                         if (msg_opc == VIRTCHNL_OP_EVENT)
1407                                 /* process event*/
1408                                 i40evf_handle_pf_event(dev, info.msg_buf,
1409                                                        info.msg_len);
1410                         else {
1411                                 /* read message and it's expected one */
1412                                 if (msg_opc == vf->pend_cmd) {
1413                                         vf->cmd_retval = msg_ret;
1414                                         /* prevent compiler reordering */
1415                                         rte_compiler_barrier();
1416                                         _clear_cmd(vf);
1417                                 } else
1418                                         PMD_DRV_LOG(ERR, "command mismatch,"
1419                                                 "expect %u, get %u",
1420                                                 vf->pend_cmd, msg_opc);
1421                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1422                                              " opcode = %d", msg_opc);
1423                         }
1424                         break;
1425                 default:
1426                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1427                                     aq_opc);
1428                         break;
1429                 }
1430         }
1431 }
1432
1433 /**
1434  * Interrupt handler triggered by NIC  for handling
1435  * specific interrupt. Only adminq interrupt is processed in VF.
1436  *
1437  * @param handle
1438  *  Pointer to interrupt handle.
1439  * @param param
1440  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1441  *
1442  * @return
1443  *  void
1444  */
1445 static void
1446 i40evf_dev_interrupt_handler(void *param)
1447 {
1448         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1449         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1450         uint32_t icr0;
1451
1452         i40evf_disable_irq0(hw);
1453
1454         /* read out interrupt causes */
1455         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1456
1457         /* No interrupt event indicated */
1458         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1459                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1460                 goto done;
1461         }
1462
1463         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1464                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1465                 i40evf_handle_aq_msg(dev);
1466         }
1467
1468         /* Link Status Change interrupt */
1469         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1470                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1471                                    " do nothing");
1472
1473 done:
1474         i40evf_enable_irq0(hw);
1475         rte_intr_enable(dev->intr_handle);
1476 }
1477
1478 static int
1479 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1480 {
1481         struct i40e_hw *hw
1482                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1483         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1484
1485         PMD_INIT_FUNC_TRACE();
1486
1487         /* assign ops func pointer */
1488         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1489         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1490         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1491
1492         /*
1493          * For secondary processes, we don't initialise any further as primary
1494          * has already done this work.
1495          */
1496         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1497                 i40e_set_rx_function(eth_dev);
1498                 i40e_set_tx_function(eth_dev);
1499                 return 0;
1500         }
1501         i40e_set_default_ptype_table(eth_dev);
1502         rte_eth_copy_pci_info(eth_dev, pci_dev);
1503         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1504
1505         hw->vendor_id = pci_dev->id.vendor_id;
1506         hw->device_id = pci_dev->id.device_id;
1507         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1508         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1509         hw->bus.device = pci_dev->addr.devid;
1510         hw->bus.func = pci_dev->addr.function;
1511         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1512         hw->adapter_stopped = 0;
1513
1514         if(i40evf_init_vf(eth_dev) != 0) {
1515                 PMD_INIT_LOG(ERR, "Init vf failed");
1516                 return -1;
1517         }
1518
1519         /* register callback func to eal lib */
1520         rte_intr_callback_register(&pci_dev->intr_handle,
1521                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1522
1523         /* enable uio intr after callback register */
1524         rte_intr_enable(&pci_dev->intr_handle);
1525
1526         /* configure and enable device interrupt */
1527         i40evf_enable_irq0(hw);
1528
1529         /* copy mac addr */
1530         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1531                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1532                                         0);
1533         if (eth_dev->data->mac_addrs == NULL) {
1534                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1535                                 " store MAC addresses",
1536                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1537                 return -ENOMEM;
1538         }
1539         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1540                         &eth_dev->data->mac_addrs[0]);
1541
1542         return 0;
1543 }
1544
1545 static int
1546 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1547 {
1548         PMD_INIT_FUNC_TRACE();
1549
1550         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1551                 return -EPERM;
1552
1553         eth_dev->dev_ops = NULL;
1554         eth_dev->rx_pkt_burst = NULL;
1555         eth_dev->tx_pkt_burst = NULL;
1556
1557         if (i40evf_uninit_vf(eth_dev) != 0) {
1558                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1559                 return -1;
1560         }
1561
1562         rte_free(eth_dev->data->mac_addrs);
1563         eth_dev->data->mac_addrs = NULL;
1564
1565         return 0;
1566 }
1567
1568 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1569         struct rte_pci_device *pci_dev)
1570 {
1571         return rte_eth_dev_pci_generic_probe(pci_dev,
1572                 sizeof(struct i40e_adapter), i40evf_dev_init);
1573 }
1574
1575 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1576 {
1577         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1578 }
1579
1580 /*
1581  * virtual function driver struct
1582  */
1583 static struct rte_pci_driver rte_i40evf_pmd = {
1584         .id_table = pci_id_i40evf_map,
1585         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1586         .probe = eth_i40evf_pci_probe,
1587         .remove = eth_i40evf_pci_remove,
1588 };
1589
1590 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1591 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1592 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1593
1594 static int
1595 i40evf_dev_configure(struct rte_eth_dev *dev)
1596 {
1597         struct i40e_adapter *ad =
1598                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1599         struct rte_eth_conf *conf = &dev->data->dev_conf;
1600         struct i40e_vf *vf;
1601
1602         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1603          * allocation or vector Rx preconditions we will reset it.
1604          */
1605         ad->rx_bulk_alloc_allowed = true;
1606         ad->rx_vec_allowed = true;
1607         ad->tx_simple_allowed = true;
1608         ad->tx_vec_allowed = true;
1609
1610         /* For non-DPDK PF drivers, VF has no ability to disable HW
1611          * CRC strip, and is implicitly enabled by the PF.
1612          */
1613         if (!conf->rxmode.hw_strip_crc) {
1614                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1615                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1616                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1617                         /* Peer is running non-DPDK PF driver. */
1618                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1619                         return -EINVAL;
1620                 }
1621         }
1622
1623         return i40evf_init_vlan(dev);
1624 }
1625
1626 static int
1627 i40evf_init_vlan(struct rte_eth_dev *dev)
1628 {
1629         struct rte_eth_dev_data *data = dev->data;
1630         int ret;
1631
1632         /* Apply vlan offload setting */
1633         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1634
1635         /* Apply pvid setting */
1636         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1637                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1638         return ret;
1639 }
1640
1641 static void
1642 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1643 {
1644         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1645
1646         /* Vlan stripping setting */
1647         if (mask & ETH_VLAN_STRIP_MASK) {
1648                 /* Enable or disable VLAN stripping */
1649                 if (dev_conf->rxmode.hw_vlan_strip)
1650                         i40evf_enable_vlan_strip(dev);
1651                 else
1652                         i40evf_disable_vlan_strip(dev);
1653         }
1654 }
1655
1656 static int
1657 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1658 {
1659         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1660         struct i40e_vsi_vlan_pvid_info info;
1661         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1662
1663         memset(&info, 0, sizeof(info));
1664         info.on = on;
1665
1666         /* Linux pf host don't support vlan offload yet */
1667         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1668                 if (info.on)
1669                         info.config.pvid = pvid;
1670                 else {
1671                         info.config.reject.tagged =
1672                                 dev_conf->txmode.hw_vlan_reject_tagged;
1673                         info.config.reject.untagged =
1674                                 dev_conf->txmode.hw_vlan_reject_untagged;
1675                 }
1676                 return i40evf_config_vlan_pvid(dev, &info);
1677         }
1678
1679         return 0;
1680 }
1681
1682 static int
1683 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1684 {
1685         struct i40e_rx_queue *rxq;
1686         int err = 0;
1687         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1688
1689         PMD_INIT_FUNC_TRACE();
1690
1691         if (rx_queue_id < dev->data->nb_rx_queues) {
1692                 rxq = dev->data->rx_queues[rx_queue_id];
1693
1694                 err = i40e_alloc_rx_queue_mbufs(rxq);
1695                 if (err) {
1696                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1697                         return err;
1698                 }
1699
1700                 rte_wmb();
1701
1702                 /* Init the RX tail register. */
1703                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1704                 I40EVF_WRITE_FLUSH(hw);
1705
1706                 /* Ready to switch the queue on */
1707                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1708
1709                 if (err)
1710                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1711                                     rx_queue_id);
1712                 else
1713                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1714         }
1715
1716         return err;
1717 }
1718
1719 static int
1720 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1721 {
1722         struct i40e_rx_queue *rxq;
1723         int err;
1724
1725         if (rx_queue_id < dev->data->nb_rx_queues) {
1726                 rxq = dev->data->rx_queues[rx_queue_id];
1727
1728                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1729
1730                 if (err) {
1731                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1732                                     rx_queue_id);
1733                         return err;
1734                 }
1735
1736                 i40e_rx_queue_release_mbufs(rxq);
1737                 i40e_reset_rx_queue(rxq);
1738                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1739         }
1740
1741         return 0;
1742 }
1743
1744 static int
1745 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1746 {
1747         int err = 0;
1748
1749         PMD_INIT_FUNC_TRACE();
1750
1751         if (tx_queue_id < dev->data->nb_tx_queues) {
1752
1753                 /* Ready to switch the queue on */
1754                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1755
1756                 if (err)
1757                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1758                                     tx_queue_id);
1759                 else
1760                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1761         }
1762
1763         return err;
1764 }
1765
1766 static int
1767 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1768 {
1769         struct i40e_tx_queue *txq;
1770         int err;
1771
1772         if (tx_queue_id < dev->data->nb_tx_queues) {
1773                 txq = dev->data->tx_queues[tx_queue_id];
1774
1775                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1776
1777                 if (err) {
1778                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1779                                     tx_queue_id);
1780                         return err;
1781                 }
1782
1783                 i40e_tx_queue_release_mbufs(txq);
1784                 i40e_reset_tx_queue(txq);
1785                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1786         }
1787
1788         return 0;
1789 }
1790
1791 static int
1792 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1793 {
1794         int ret;
1795
1796         if (on)
1797                 ret = i40evf_add_vlan(dev, vlan_id);
1798         else
1799                 ret = i40evf_del_vlan(dev,vlan_id);
1800
1801         return ret;
1802 }
1803
1804 static int
1805 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1806 {
1807         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1808         struct rte_eth_dev_data *dev_data = dev->data;
1809         struct rte_pktmbuf_pool_private *mbp_priv;
1810         uint16_t buf_size, len;
1811
1812         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1813         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1814         I40EVF_WRITE_FLUSH(hw);
1815
1816         /* Calculate the maximum packet length allowed */
1817         mbp_priv = rte_mempool_get_priv(rxq->mp);
1818         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1819                                         RTE_PKTMBUF_HEADROOM);
1820         rxq->hs_mode = i40e_header_split_none;
1821         rxq->rx_hdr_len = 0;
1822         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1823         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1824         rxq->max_pkt_len = RTE_MIN(len,
1825                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1826
1827         /**
1828          * Check if the jumbo frame and maximum packet length are set correctly
1829          */
1830         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1831                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1832                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1833                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1834                                 "larger than %u and smaller than %u, as jumbo "
1835                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1836                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1837                         return I40E_ERR_CONFIG;
1838                 }
1839         } else {
1840                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1841                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1842                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1843                                 "larger than %u and smaller than %u, as jumbo "
1844                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1845                                                 (uint32_t)ETHER_MAX_LEN);
1846                         return I40E_ERR_CONFIG;
1847                 }
1848         }
1849
1850         if (dev_data->dev_conf.rxmode.enable_scatter ||
1851             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1852                 dev_data->scattered_rx = 1;
1853         }
1854
1855         return 0;
1856 }
1857
1858 static int
1859 i40evf_rx_init(struct rte_eth_dev *dev)
1860 {
1861         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1862         uint16_t i;
1863         int ret = I40E_SUCCESS;
1864         struct i40e_rx_queue **rxq =
1865                 (struct i40e_rx_queue **)dev->data->rx_queues;
1866
1867         i40evf_config_rss(vf);
1868         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1869                 if (!rxq[i] || !rxq[i]->q_set)
1870                         continue;
1871                 ret = i40evf_rxq_init(dev, rxq[i]);
1872                 if (ret != I40E_SUCCESS)
1873                         break;
1874         }
1875         if (ret == I40E_SUCCESS)
1876                 i40e_set_rx_function(dev);
1877
1878         return ret;
1879 }
1880
1881 static void
1882 i40evf_tx_init(struct rte_eth_dev *dev)
1883 {
1884         uint16_t i;
1885         struct i40e_tx_queue **txq =
1886                 (struct i40e_tx_queue **)dev->data->tx_queues;
1887         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1888
1889         for (i = 0; i < dev->data->nb_tx_queues; i++)
1890                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1891
1892         i40e_set_tx_function(dev);
1893 }
1894
1895 static inline void
1896 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1897 {
1898         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1899         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1900         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1901         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1902
1903         if (!rte_intr_allow_others(intr_handle)) {
1904                 I40E_WRITE_REG(hw,
1905                                I40E_VFINT_DYN_CTL01,
1906                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1907                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1908                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1909                 I40EVF_WRITE_FLUSH(hw);
1910                 return;
1911         }
1912
1913         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1914                 /* To support DPDK PF host */
1915                 I40E_WRITE_REG(hw,
1916                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1917                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1918                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1919         /* If host driver is kernel driver, do nothing.
1920          * Interrupt 0 is used for rx packets, but don't set
1921          * I40E_VFINT_DYN_CTL01,
1922          * because it is already done in i40evf_enable_irq0.
1923          */
1924
1925         I40EVF_WRITE_FLUSH(hw);
1926 }
1927
1928 static inline void
1929 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1930 {
1931         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1932         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1933         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1934         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1935
1936         if (!rte_intr_allow_others(intr_handle)) {
1937                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1938                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1939                 I40EVF_WRITE_FLUSH(hw);
1940                 return;
1941         }
1942
1943         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1944                 I40E_WRITE_REG(hw,
1945                                I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR
1946                                                     - 1),
1947                                0);
1948         /* If host driver is kernel driver, do nothing.
1949          * Interrupt 0 is used for rx packets, but don't zero
1950          * I40E_VFINT_DYN_CTL01,
1951          * because interrupt 0 is also used for adminq processing.
1952          */
1953
1954         I40EVF_WRITE_FLUSH(hw);
1955 }
1956
1957 static int
1958 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1959 {
1960         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1961         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1962         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1963         uint16_t interval =
1964                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1965         uint16_t msix_intr;
1966
1967         msix_intr = intr_handle->intr_vec[queue_id];
1968         if (msix_intr == I40E_MISC_VEC_ID)
1969                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1970                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1971                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1972                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1973                                (interval <<
1974                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1975         else
1976                 I40E_WRITE_REG(hw,
1977                                I40E_VFINT_DYN_CTLN1(msix_intr -
1978                                                     I40E_RX_VEC_START),
1979                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1980                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1981                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1982                                (interval <<
1983                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1984
1985         I40EVF_WRITE_FLUSH(hw);
1986
1987         rte_intr_enable(&pci_dev->intr_handle);
1988
1989         return 0;
1990 }
1991
1992 static int
1993 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1994 {
1995         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1996         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1997         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1998         uint16_t msix_intr;
1999
2000         msix_intr = intr_handle->intr_vec[queue_id];
2001         if (msix_intr == I40E_MISC_VEC_ID)
2002                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
2003         else
2004                 I40E_WRITE_REG(hw,
2005                                I40E_VFINT_DYN_CTLN1(msix_intr -
2006                                                     I40E_RX_VEC_START),
2007                                0);
2008
2009         I40EVF_WRITE_FLUSH(hw);
2010
2011         return 0;
2012 }
2013
2014 static void
2015 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2016 {
2017         struct virtchnl_ether_addr_list *list;
2018         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2019         int err, i, j;
2020         int next_begin = 0;
2021         int begin = 0;
2022         uint32_t len;
2023         struct ether_addr *addr;
2024         struct vf_cmd_info args;
2025
2026         do {
2027                 j = 0;
2028                 len = sizeof(struct virtchnl_ether_addr_list);
2029                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2030                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
2031                                 continue;
2032                         len += sizeof(struct virtchnl_ether_addr);
2033                         if (len >= I40E_AQ_BUF_SZ) {
2034                                 next_begin = i + 1;
2035                                 break;
2036                         }
2037                 }
2038
2039                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2040                 if (!list) {
2041                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2042                         return;
2043                 }
2044
2045                 for (i = begin; i < next_begin; i++) {
2046                         addr = &dev->data->mac_addrs[i];
2047                         if (is_zero_ether_addr(addr))
2048                                 continue;
2049                         (void)rte_memcpy(list->list[j].addr, addr->addr_bytes,
2050                                          sizeof(addr->addr_bytes));
2051                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2052                                     addr->addr_bytes[0], addr->addr_bytes[1],
2053                                     addr->addr_bytes[2], addr->addr_bytes[3],
2054                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2055                         j++;
2056                 }
2057                 list->vsi_id = vf->vsi_res->vsi_id;
2058                 list->num_elements = j;
2059                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2060                            VIRTCHNL_OP_DEL_ETH_ADDR;
2061                 args.in_args = (uint8_t *)list;
2062                 args.in_args_size = len;
2063                 args.out_buffer = vf->aq_resp;
2064                 args.out_size = I40E_AQ_BUF_SZ;
2065                 err = i40evf_execute_vf_cmd(dev, &args);
2066                 if (err)
2067                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2068                                     add ? "OP_ADD_ETHER_ADDRESS" :
2069                                     "OP_DEL_ETHER_ADDRESS");
2070                 rte_free(list);
2071                 begin = next_begin;
2072         } while (begin < I40E_NUM_MACADDR_MAX);
2073 }
2074
2075 static int
2076 i40evf_dev_start(struct rte_eth_dev *dev)
2077 {
2078         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2079         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2080         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2081         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2082         uint32_t intr_vector = 0;
2083
2084         PMD_INIT_FUNC_TRACE();
2085
2086         hw->adapter_stopped = 0;
2087
2088         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2089         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2090                                         dev->data->nb_tx_queues);
2091
2092         /* check and configure queue intr-vector mapping */
2093         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2094                 intr_vector = dev->data->nb_rx_queues;
2095                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2096                         return -1;
2097         }
2098
2099         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2100                 intr_handle->intr_vec =
2101                         rte_zmalloc("intr_vec",
2102                                     dev->data->nb_rx_queues * sizeof(int), 0);
2103                 if (!intr_handle->intr_vec) {
2104                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2105                                      " intr_vec", dev->data->nb_rx_queues);
2106                         return -ENOMEM;
2107                 }
2108         }
2109
2110         if (i40evf_rx_init(dev) != 0){
2111                 PMD_DRV_LOG(ERR, "failed to do RX init");
2112                 return -1;
2113         }
2114
2115         i40evf_tx_init(dev);
2116
2117         if (i40evf_configure_queues(dev) != 0) {
2118                 PMD_DRV_LOG(ERR, "configure queues failed");
2119                 goto err_queue;
2120         }
2121         if (i40evf_config_irq_map(dev)) {
2122                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2123                 goto err_queue;
2124         }
2125
2126         /* Set all mac addrs */
2127         i40evf_add_del_all_mac_addr(dev, TRUE);
2128
2129         if (i40evf_start_queues(dev) != 0) {
2130                 PMD_DRV_LOG(ERR, "enable queues failed");
2131                 goto err_mac;
2132         }
2133
2134         i40evf_enable_queues_intr(dev);
2135         return 0;
2136
2137 err_mac:
2138         i40evf_add_del_all_mac_addr(dev, FALSE);
2139 err_queue:
2140         return -1;
2141 }
2142
2143 static void
2144 i40evf_dev_stop(struct rte_eth_dev *dev)
2145 {
2146         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2147         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2148
2149         PMD_INIT_FUNC_TRACE();
2150
2151         i40evf_stop_queues(dev);
2152         i40evf_disable_queues_intr(dev);
2153         i40e_dev_clear_queues(dev);
2154
2155         /* Clean datapath event and queue/vec mapping */
2156         rte_intr_efd_disable(intr_handle);
2157         if (intr_handle->intr_vec) {
2158                 rte_free(intr_handle->intr_vec);
2159                 intr_handle->intr_vec = NULL;
2160         }
2161         /* remove all mac addrs */
2162         i40evf_add_del_all_mac_addr(dev, FALSE);
2163
2164 }
2165
2166 static int
2167 i40evf_dev_link_update(struct rte_eth_dev *dev,
2168                        __rte_unused int wait_to_complete)
2169 {
2170         struct rte_eth_link new_link;
2171         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2172         /*
2173          * DPDK pf host provide interfacet to acquire link status
2174          * while Linux driver does not
2175          */
2176
2177         /* Linux driver PF host */
2178         switch (vf->link_speed) {
2179         case I40E_LINK_SPEED_100MB:
2180                 new_link.link_speed = ETH_SPEED_NUM_100M;
2181                 break;
2182         case I40E_LINK_SPEED_1GB:
2183                 new_link.link_speed = ETH_SPEED_NUM_1G;
2184                 break;
2185         case I40E_LINK_SPEED_10GB:
2186                 new_link.link_speed = ETH_SPEED_NUM_10G;
2187                 break;
2188         case I40E_LINK_SPEED_20GB:
2189                 new_link.link_speed = ETH_SPEED_NUM_20G;
2190                 break;
2191         case I40E_LINK_SPEED_25GB:
2192                 new_link.link_speed = ETH_SPEED_NUM_25G;
2193                 break;
2194         case I40E_LINK_SPEED_40GB:
2195                 new_link.link_speed = ETH_SPEED_NUM_40G;
2196                 break;
2197         default:
2198                 new_link.link_speed = ETH_SPEED_NUM_100M;
2199                 break;
2200         }
2201         /* full duplex only */
2202         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2203         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2204                                              ETH_LINK_DOWN;
2205
2206         i40evf_dev_atomic_write_link_status(dev, &new_link);
2207
2208         return 0;
2209 }
2210
2211 static void
2212 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2213 {
2214         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2215         int ret;
2216
2217         /* If enabled, just return */
2218         if (vf->promisc_unicast_enabled)
2219                 return;
2220
2221         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2222         if (ret == 0)
2223                 vf->promisc_unicast_enabled = TRUE;
2224 }
2225
2226 static void
2227 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2228 {
2229         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2230         int ret;
2231
2232         /* If disabled, just return */
2233         if (!vf->promisc_unicast_enabled)
2234                 return;
2235
2236         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2237         if (ret == 0)
2238                 vf->promisc_unicast_enabled = FALSE;
2239 }
2240
2241 static void
2242 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2243 {
2244         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2245         int ret;
2246
2247         /* If enabled, just return */
2248         if (vf->promisc_multicast_enabled)
2249                 return;
2250
2251         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2252         if (ret == 0)
2253                 vf->promisc_multicast_enabled = TRUE;
2254 }
2255
2256 static void
2257 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2258 {
2259         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2260         int ret;
2261
2262         /* If enabled, just return */
2263         if (!vf->promisc_multicast_enabled)
2264                 return;
2265
2266         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2267         if (ret == 0)
2268                 vf->promisc_multicast_enabled = FALSE;
2269 }
2270
2271 static void
2272 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2273 {
2274         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2275
2276         memset(dev_info, 0, sizeof(*dev_info));
2277         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2278         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2279         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2280         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2281         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2282         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2283         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2284         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
2285         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2286         dev_info->rx_offload_capa =
2287                 DEV_RX_OFFLOAD_VLAN_STRIP |
2288                 DEV_RX_OFFLOAD_QINQ_STRIP |
2289                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2290                 DEV_RX_OFFLOAD_UDP_CKSUM |
2291                 DEV_RX_OFFLOAD_TCP_CKSUM;
2292         dev_info->tx_offload_capa =
2293                 DEV_TX_OFFLOAD_VLAN_INSERT |
2294                 DEV_TX_OFFLOAD_QINQ_INSERT |
2295                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2296                 DEV_TX_OFFLOAD_UDP_CKSUM |
2297                 DEV_TX_OFFLOAD_TCP_CKSUM |
2298                 DEV_TX_OFFLOAD_SCTP_CKSUM;
2299
2300         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2301                 .rx_thresh = {
2302                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2303                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2304                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2305                 },
2306                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2307                 .rx_drop_en = 0,
2308         };
2309
2310         dev_info->default_txconf = (struct rte_eth_txconf) {
2311                 .tx_thresh = {
2312                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2313                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2314                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2315                 },
2316                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2317                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2318                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2319                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2320         };
2321
2322         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2323                 .nb_max = I40E_MAX_RING_DESC,
2324                 .nb_min = I40E_MIN_RING_DESC,
2325                 .nb_align = I40E_ALIGN_RING_DESC,
2326         };
2327
2328         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2329                 .nb_max = I40E_MAX_RING_DESC,
2330                 .nb_min = I40E_MIN_RING_DESC,
2331                 .nb_align = I40E_ALIGN_RING_DESC,
2332         };
2333 }
2334
2335 static void
2336 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2337 {
2338         if (i40evf_get_statistics(dev, stats))
2339                 PMD_DRV_LOG(ERR, "Get statistics failed");
2340 }
2341
2342 static void
2343 i40evf_dev_close(struct rte_eth_dev *dev)
2344 {
2345         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2346         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2347         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2348
2349         i40evf_dev_stop(dev);
2350         hw->adapter_stopped = 1;
2351         i40e_dev_free_queues(dev);
2352         i40evf_reset_vf(hw);
2353         i40e_shutdown_adminq(hw);
2354         /* disable uio intr before callback unregister */
2355         rte_intr_disable(intr_handle);
2356
2357         /* unregister callback func from eal lib */
2358         rte_intr_callback_unregister(intr_handle,
2359                                      i40evf_dev_interrupt_handler, dev);
2360         i40evf_disable_irq0(hw);
2361 }
2362
2363 static int
2364 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2365 {
2366         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2367         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2368         int ret;
2369
2370         if (!lut)
2371                 return -EINVAL;
2372
2373         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2374                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2375                                           lut, lut_size);
2376                 if (ret) {
2377                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2378                         return ret;
2379                 }
2380         } else {
2381                 uint32_t *lut_dw = (uint32_t *)lut;
2382                 uint16_t i, lut_size_dw = lut_size / 4;
2383
2384                 for (i = 0; i < lut_size_dw; i++)
2385                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2386         }
2387
2388         return 0;
2389 }
2390
2391 static int
2392 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2393 {
2394         struct i40e_vf *vf;
2395         struct i40e_hw *hw;
2396         int ret;
2397
2398         if (!vsi || !lut)
2399                 return -EINVAL;
2400
2401         vf = I40E_VSI_TO_VF(vsi);
2402         hw = I40E_VSI_TO_HW(vsi);
2403
2404         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2405                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2406                                           lut, lut_size);
2407                 if (ret) {
2408                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2409                         return ret;
2410                 }
2411         } else {
2412                 uint32_t *lut_dw = (uint32_t *)lut;
2413                 uint16_t i, lut_size_dw = lut_size / 4;
2414
2415                 for (i = 0; i < lut_size_dw; i++)
2416                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2417                 I40EVF_WRITE_FLUSH(hw);
2418         }
2419
2420         return 0;
2421 }
2422
2423 static int
2424 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2425                            struct rte_eth_rss_reta_entry64 *reta_conf,
2426                            uint16_t reta_size)
2427 {
2428         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2429         uint8_t *lut;
2430         uint16_t i, idx, shift;
2431         int ret;
2432
2433         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2434                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2435                         "(%d) doesn't match the number of hardware can "
2436                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2437                 return -EINVAL;
2438         }
2439
2440         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2441         if (!lut) {
2442                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2443                 return -ENOMEM;
2444         }
2445         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2446         if (ret)
2447                 goto out;
2448         for (i = 0; i < reta_size; i++) {
2449                 idx = i / RTE_RETA_GROUP_SIZE;
2450                 shift = i % RTE_RETA_GROUP_SIZE;
2451                 if (reta_conf[idx].mask & (1ULL << shift))
2452                         lut[i] = reta_conf[idx].reta[shift];
2453         }
2454         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2455
2456 out:
2457         rte_free(lut);
2458
2459         return ret;
2460 }
2461
2462 static int
2463 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2464                           struct rte_eth_rss_reta_entry64 *reta_conf,
2465                           uint16_t reta_size)
2466 {
2467         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2468         uint16_t i, idx, shift;
2469         uint8_t *lut;
2470         int ret;
2471
2472         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2473                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2474                         "(%d) doesn't match the number of hardware can "
2475                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2476                 return -EINVAL;
2477         }
2478
2479         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2480         if (!lut) {
2481                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2482                 return -ENOMEM;
2483         }
2484
2485         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2486         if (ret)
2487                 goto out;
2488         for (i = 0; i < reta_size; i++) {
2489                 idx = i / RTE_RETA_GROUP_SIZE;
2490                 shift = i % RTE_RETA_GROUP_SIZE;
2491                 if (reta_conf[idx].mask & (1ULL << shift))
2492                         reta_conf[idx].reta[shift] = lut[i];
2493         }
2494
2495 out:
2496         rte_free(lut);
2497
2498         return ret;
2499 }
2500
2501 static int
2502 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2503 {
2504         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2505         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2506         int ret = 0;
2507
2508         if (!key || key_len == 0) {
2509                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2510                 return 0;
2511         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2512                 sizeof(uint32_t)) {
2513                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2514                 return -EINVAL;
2515         }
2516
2517         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2518                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2519                         (struct i40e_aqc_get_set_rss_key_data *)key;
2520
2521                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2522                 if (ret)
2523                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2524                                      "via AQ");
2525         } else {
2526                 uint32_t *hash_key = (uint32_t *)key;
2527                 uint16_t i;
2528
2529                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2530                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2531                 I40EVF_WRITE_FLUSH(hw);
2532         }
2533
2534         return ret;
2535 }
2536
2537 static int
2538 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2539 {
2540         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2541         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2542         int ret;
2543
2544         if (!key || !key_len)
2545                 return -EINVAL;
2546
2547         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2548                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2549                         (struct i40e_aqc_get_set_rss_key_data *)key);
2550                 if (ret) {
2551                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2552                         return ret;
2553                 }
2554         } else {
2555                 uint32_t *key_dw = (uint32_t *)key;
2556                 uint16_t i;
2557
2558                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2559                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2560         }
2561         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2562
2563         return 0;
2564 }
2565
2566 static int
2567 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2568 {
2569         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2570         uint64_t rss_hf, hena;
2571         int ret;
2572
2573         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2574                                  rss_conf->rss_key_len);
2575         if (ret)
2576                 return ret;
2577
2578         rss_hf = rss_conf->rss_hf;
2579         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2580         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2581         if (hw->mac.type == I40E_MAC_X722)
2582                 hena &= ~I40E_RSS_HENA_ALL_X722;
2583         else
2584                 hena &= ~I40E_RSS_HENA_ALL;
2585         hena |= i40e_config_hena(rss_hf, hw->mac.type);
2586         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2587         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2588         I40EVF_WRITE_FLUSH(hw);
2589
2590         return 0;
2591 }
2592
2593 static void
2594 i40evf_disable_rss(struct i40e_vf *vf)
2595 {
2596         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2597         uint64_t hena;
2598
2599         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2600         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2601         if (hw->mac.type == I40E_MAC_X722)
2602                 hena &= ~I40E_RSS_HENA_ALL_X722;
2603         else
2604                 hena &= ~I40E_RSS_HENA_ALL;
2605         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2606         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2607         I40EVF_WRITE_FLUSH(hw);
2608 }
2609
2610 static int
2611 i40evf_config_rss(struct i40e_vf *vf)
2612 {
2613         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2614         struct rte_eth_rss_conf rss_conf;
2615         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2616         uint16_t num;
2617
2618         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2619                 i40evf_disable_rss(vf);
2620                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2621                 return 0;
2622         }
2623
2624         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2625         /* Fill out the look up table */
2626         for (i = 0, j = 0; i < nb_q; i++, j++) {
2627                 if (j >= num)
2628                         j = 0;
2629                 lut = (lut << 8) | j;
2630                 if ((i & 3) == 3)
2631                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2632         }
2633
2634         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2635         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2636                 i40evf_disable_rss(vf);
2637                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2638                 return 0;
2639         }
2640
2641         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2642                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2643                 /* Calculate the default hash key */
2644                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2645                         rss_key_default[i] = (uint32_t)rte_rand();
2646                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2647                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2648                         sizeof(uint32_t);
2649         }
2650
2651         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2652 }
2653
2654 static int
2655 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2656                            struct rte_eth_rss_conf *rss_conf)
2657 {
2658         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2659         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2660         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2661         uint64_t hena;
2662
2663         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2664         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2665         if (!(hena & ((hw->mac.type == I40E_MAC_X722)
2666                  ? I40E_RSS_HENA_ALL_X722
2667                  : I40E_RSS_HENA_ALL))) { /* RSS disabled */
2668                 if (rss_hf != 0) /* Enable RSS */
2669                         return -EINVAL;
2670                 return 0;
2671         }
2672
2673         /* RSS enabled */
2674         if (rss_hf == 0) /* Disable RSS */
2675                 return -EINVAL;
2676
2677         return i40evf_hw_rss_hash_set(vf, rss_conf);
2678 }
2679
2680 static int
2681 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2682                              struct rte_eth_rss_conf *rss_conf)
2683 {
2684         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2685         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2686         uint64_t hena;
2687
2688         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2689                            &rss_conf->rss_key_len);
2690
2691         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2692         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2693         rss_conf->rss_hf = i40e_parse_hena(hena);
2694
2695         return 0;
2696 }
2697
2698 static int
2699 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2700 {
2701         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2702         struct rte_eth_dev_data *dev_data = vf->dev_data;
2703         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2704         int ret = 0;
2705
2706         /* check if mtu is within the allowed range */
2707         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2708                 return -EINVAL;
2709
2710         /* mtu setting is forbidden if port is start */
2711         if (dev_data->dev_started) {
2712                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2713                             dev_data->port_id);
2714                 return -EBUSY;
2715         }
2716
2717         if (frame_size > ETHER_MAX_LEN)
2718                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2719         else
2720                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2721
2722         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2723
2724         return ret;
2725 }
2726
2727 static void
2728 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2729                             struct ether_addr *mac_addr)
2730 {
2731         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2732
2733         if (!is_valid_assigned_ether_addr(mac_addr)) {
2734                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2735                 return;
2736         }
2737
2738         if (is_same_ether_addr(mac_addr, dev->data->mac_addrs))
2739                 return;
2740
2741         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2742                 return;
2743
2744         i40evf_del_mac_addr_by_addr(dev, dev->data->mac_addrs);
2745
2746         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2747 }