drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_ethdev_pci.h>
  59 #include <rte_atomic.h>
  60 #include <rte_malloc.h>
  61 #include <rte_dev.h>
  62
  63 #include "i40e_logs.h"
  64 #include "base/i40e_prototype.h"
  65 #include "base/i40e_adminq_cmd.h"
  66 #include "base/i40e_type.h"
  67
  68 #include "i40e_rxtx.h"
  69 #include "i40e_ethdev.h"
  70 #include "i40e_pf.h"
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  72 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  73
  74 /* busy wait delay in msec */
  75 #define I40EVF_BUSY_WAIT_DELAY 10
  76 #define I40EVF_BUSY_WAIT_COUNT 50
  77 #define MAX_RESET_WAIT_CNT     20
  78
  79 struct i40evf_arq_msg_info {
  80         enum virtchnl_ops ops;
  81         enum i40e_status_code result;
  82         uint16_t buf_len;
  83         uint16_t msg_len;
  84         uint8_t *msg;
  85 };
  86
  87 struct vf_cmd_info {
  88         enum virtchnl_ops ops;
  89         uint8_t *in_args;
  90         uint32_t in_args_size;
  91         uint8_t *out_buffer;
  92         /* Input & output type. pass in buffer size and pass out
  93          * actual return result
  94          */
  95         uint32_t out_size;
  96 };
  97
  98 enum i40evf_aq_result {
  99         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
 100         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 101         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 102         I40EVF_MSG_CMD,      /* Read async command result */
 103 };
 104
 105 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 106 static int i40evf_dev_start(struct rte_eth_dev *dev);
 107 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 108 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 109                                 struct rte_eth_dev_info *dev_info);
 110 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 111                                   int wait_to_complete);
 112 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 113                                 struct rte_eth_stats *stats);
 114 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 115                                  struct rte_eth_xstat *xstats, unsigned n);
 116 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
 117                                        struct rte_eth_xstat_name *xstats_names,
 118                                        unsigned limit);
 119 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
 120 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 121                                   uint16_t vlan_id, int on);
 122 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 123 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 124                                 int on);
 125 static void i40evf_dev_close(struct rte_eth_dev *dev);
 126 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 127 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 128 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 129 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 130 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 131 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 132                                      uint16_t rx_queue_id);
 133 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 134                                     uint16_t rx_queue_id);
 135 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 136                                      uint16_t tx_queue_id);
 137 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 138                                     uint16_t tx_queue_id);
 139 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 140                                struct ether_addr *addr,
 141                                uint32_t index,
 142                                uint32_t pool);
 143 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 144 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 145                         struct rte_eth_rss_reta_entry64 *reta_conf,
 146                         uint16_t reta_size);
 147 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 148                         struct rte_eth_rss_reta_entry64 *reta_conf,
 149                         uint16_t reta_size);
 150 static int i40evf_config_rss(struct i40e_vf *vf);
 151 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 152                                       struct rte_eth_rss_conf *rss_conf);
 153 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 154                                         struct rte_eth_rss_conf *rss_conf);
 155 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 156 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 157                                         struct ether_addr *mac_addr);
 158 static int
 159 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 160 static int
 161 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 162 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 163                                    uint8_t *msg,
 164                                    uint16_t msglen);
 165
 166 /* Default hash key buffer for RSS */
 167 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 168
 169 struct rte_i40evf_xstats_name_off {
 170         char name[RTE_ETH_XSTATS_NAME_SIZE];
 171         unsigned offset;
 172 };
 173
 174 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 175         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 176         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 177         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 178         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 179         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 180         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 181                 rx_unknown_protocol)},
 182         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 183         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 184         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 185         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 186         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 187         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 188 };
 189
 190 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 191                 sizeof(rte_i40evf_stats_strings[0]))
 192
 193 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 194         .dev_configure        = i40evf_dev_configure,
 195         .dev_start            = i40evf_dev_start,
 196         .dev_stop             = i40evf_dev_stop,
 197         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 198         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 199         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 200         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 201         .link_update          = i40evf_dev_link_update,
 202         .stats_get            = i40evf_dev_stats_get,
 203         .xstats_get           = i40evf_dev_xstats_get,
 204         .xstats_get_names     = i40evf_dev_xstats_get_names,
 205         .xstats_reset         = i40evf_dev_xstats_reset,
 206         .dev_close            = i40evf_dev_close,
 207         .dev_infos_get        = i40evf_dev_info_get,
 208         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 209         .vlan_filter_set      = i40evf_vlan_filter_set,
 210         .vlan_offload_set     = i40evf_vlan_offload_set,
 211         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 212         .rx_queue_start       = i40evf_dev_rx_queue_start,
 213         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 214         .tx_queue_start       = i40evf_dev_tx_queue_start,
 215         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 216         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 217         .rx_queue_release     = i40e_dev_rx_queue_release,
 218         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 219         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 220         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 221         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 222         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 223         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 224         .tx_queue_release     = i40e_dev_tx_queue_release,
 225         .rx_queue_count       = i40e_dev_rx_queue_count,
 226         .rxq_info_get         = i40e_rxq_info_get,
 227         .txq_info_get         = i40e_txq_info_get,
 228         .mac_addr_add         = i40evf_add_mac_addr,
 229         .mac_addr_remove      = i40evf_del_mac_addr,
 230         .reta_update          = i40evf_dev_rss_reta_update,
 231         .reta_query           = i40evf_dev_rss_reta_query,
 232         .rss_hash_update      = i40evf_dev_rss_hash_update,
 233         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 234         .mtu_set              = i40evf_dev_mtu_set,
 235         .mac_addr_set         = i40evf_set_default_mac_addr,
 236 };
 237
 238 /*
 239  * Read data in admin queue to get msg from pf driver
 240  */
 241 static enum i40evf_aq_result
 242 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 243 {
 244         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 245         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 246         struct i40e_arq_event_info event;
 247         enum virtchnl_ops opcode;
 248         enum i40e_status_code retval;
 249         int ret;
 250         enum i40evf_aq_result result = I40EVF_MSG_NON;
 251
 252         event.buf_len = data->buf_len;
 253         event.msg_buf = data->msg;
 254         ret = i40e_clean_arq_element(hw, &event, NULL);
 255         /* Can't read any msg from adminQ */
 256         if (ret) {
 257                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 258                         result = I40EVF_MSG_ERR;
 259                 return result;
 260         }
 261
 262         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 263         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 264         /* pf sys event */
 265         if (opcode == VIRTCHNL_OP_EVENT) {
 266                 struct virtchnl_pf_event *vpe =
 267                         (struct virtchnl_pf_event *)event.msg_buf;
 268
 269                 result = I40EVF_MSG_SYS;
 270                 switch (vpe->event) {
 271                 case VIRTCHNL_EVENT_LINK_CHANGE:
 272                         vf->link_up =
 273                                 vpe->event_data.link_event.link_status;
 274                         vf->link_speed =
 275                                 vpe->event_data.link_event.link_speed;
 276                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 277                         PMD_DRV_LOG(INFO, "Link status update:%s",
 278                                     vf->link_up ? "up" : "down");
 279                         break;
 280                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 281                         vf->vf_reset = true;
 282                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 283                         PMD_DRV_LOG(INFO, "vf is reseting");
 284                         break;
 285                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 286                         vf->dev_closed = true;
 287                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 288                         PMD_DRV_LOG(INFO, "PF driver closed");
 289                         break;
 290                 default:
 291                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 292                                     __func__, vpe->event);
 293                 }
 294         } else {
 295                 /* async reply msg on command issued by vf previously */
 296                 result = I40EVF_MSG_CMD;
 297                 /* Actual data length read from PF */
 298                 data->msg_len = event.msg_len;
 299         }
 300
 301         data->result = retval;
 302         data->ops = opcode;
 303
 304         return result;
 305 }
 306
 307 /**
 308  * clear current command. Only call in case execute
 309  * _atomic_set_cmd successfully.
 310  */
 311 static inline void
 312 _clear_cmd(struct i40e_vf *vf)
 313 {
 314         rte_wmb();
 315         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 316 }
 317
 318 /*
 319  * Check there is pending cmd in execution. If none, set new command.
 320  */
 321 static inline int
 322 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 323 {
 324         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 325                         VIRTCHNL_OP_UNKNOWN, ops);
 326
 327         if (!ret)
 328                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 329
 330         return !ret;
 331 }
 332
 333 #define MAX_TRY_TIMES 200
 334 #define ASQ_DELAY_MS  10
 335
 336 static int
 337 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 338 {
 339         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 340         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 341         struct i40evf_arq_msg_info info;
 342         enum i40evf_aq_result ret;
 343         int err, i = 0;
 344
 345         if (_atomic_set_cmd(vf, args->ops))
 346                 return -1;
 347
 348         info.msg = args->out_buffer;
 349         info.buf_len = args->out_size;
 350         info.ops = VIRTCHNL_OP_UNKNOWN;
 351         info.result = I40E_SUCCESS;
 352
 353         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 354                      args->in_args, args->in_args_size, NULL);
 355         if (err) {
 356                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 357                 _clear_cmd(vf);
 358                 return err;
 359         }
 360
 361         switch (args->ops) {
 362         case VIRTCHNL_OP_RESET_VF:
 363                 /*no need to process in this function */
 364                 err = 0;
 365                 break;
 366         case VIRTCHNL_OP_VERSION:
 367         case VIRTCHNL_OP_GET_VF_RESOURCES:
 368                 /* for init adminq commands, need to poll the response */
 369                 err = -1;
 370                 do {
 371                         ret = i40evf_read_pfmsg(dev, &info);
 372                         vf->cmd_retval = info.result;
 373                         if (ret == I40EVF_MSG_CMD) {
 374                                 err = 0;
 375                                 break;
 376                         } else if (ret == I40EVF_MSG_ERR)
 377                                 break;
 378                         rte_delay_ms(ASQ_DELAY_MS);
 379                         /* If don't read msg or read sys event, continue */
 380                 } while (i++ < MAX_TRY_TIMES);
 381                 _clear_cmd(vf);
 382                 break;
 383
 384         default:
 385                 /* for other adminq in running time, waiting the cmd done flag */
 386                 err = -1;
 387                 do {
 388                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 389                                 err = 0;
 390                                 break;
 391                         }
 392                         rte_delay_ms(ASQ_DELAY_MS);
 393                         /* If don't read msg or read sys event, continue */
 394                 } while (i++ < MAX_TRY_TIMES);
 395                 break;
 396         }
 397
 398         return err | vf->cmd_retval;
 399 }
 400
 401 /*
 402  * Check API version with sync wait until version read or fail from admin queue
 403  */
 404 static int
 405 i40evf_check_api_version(struct rte_eth_dev *dev)
 406 {
 407         struct virtchnl_version_info version, *pver;
 408         int err;
 409         struct vf_cmd_info args;
 410         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 411
 412         version.major = VIRTCHNL_VERSION_MAJOR;
 413         version.minor = VIRTCHNL_VERSION_MINOR;
 414
 415         args.ops = VIRTCHNL_OP_VERSION;
 416         args.in_args = (uint8_t *)&version;
 417         args.in_args_size = sizeof(version);
 418         args.out_buffer = vf->aq_resp;
 419         args.out_size = I40E_AQ_BUF_SZ;
 420
 421         err = i40evf_execute_vf_cmd(dev, &args);
 422         if (err) {
 423                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 424                 return err;
 425         }
 426
 427         pver = (struct virtchnl_version_info *)args.out_buffer;
 428         vf->version_major = pver->major;
 429         vf->version_minor = pver->minor;
 430         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 431                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 432         else if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 433                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 434                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 435         else {
 436                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 437                                         vf->version_major, vf->version_minor,
 438                                                 VIRTCHNL_VERSION_MAJOR,
 439                                                 VIRTCHNL_VERSION_MINOR);
 440                 return -1;
 441         }
 442
 443         return 0;
 444 }
 445
 446 static int
 447 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 448 {
 449         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 450         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 451         int err;
 452         struct vf_cmd_info args;
 453         uint32_t caps, len;
 454
 455         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 456         args.out_buffer = vf->aq_resp;
 457         args.out_size = I40E_AQ_BUF_SZ;
 458         if (PF_IS_V11(vf)) {
 459                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 460                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 461                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 462                        VIRTCHNL_VF_OFFLOAD_VLAN |
 463                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 464                 args.in_args = (uint8_t *)&caps;
 465                 args.in_args_size = sizeof(caps);
 466         } else {
 467                 args.in_args = NULL;
 468                 args.in_args_size = 0;
 469         }
 470         err = i40evf_execute_vf_cmd(dev, &args);
 471
 472         if (err) {
 473                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 474                 return err;
 475         }
 476
 477         len =  sizeof(struct virtchnl_vf_resource) +
 478                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 479
 480         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 481                         RTE_MIN(args.out_size, len));
 482         i40e_vf_parse_hw_config(hw, vf->vf_res);
 483
 484         return 0;
 485 }
 486
 487 static int
 488 i40evf_config_promisc(struct rte_eth_dev *dev,
 489                       bool enable_unicast,
 490                       bool enable_multicast)
 491 {
 492         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 493         int err;
 494         struct vf_cmd_info args;
 495         struct virtchnl_promisc_info promisc;
 496
 497         promisc.flags = 0;
 498         promisc.vsi_id = vf->vsi_res->vsi_id;
 499
 500         if (enable_unicast)
 501                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 502
 503         if (enable_multicast)
 504                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 505
 506         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 507         args.in_args = (uint8_t *)&promisc;
 508         args.in_args_size = sizeof(promisc);
 509         args.out_buffer = vf->aq_resp;
 510         args.out_size = I40E_AQ_BUF_SZ;
 511
 512         err = i40evf_execute_vf_cmd(dev, &args);
 513
 514         if (err)
 515                 PMD_DRV_LOG(ERR, "fail to execute command "
 516                             "CONFIG_PROMISCUOUS_MODE");
 517         return err;
 518 }
 519
 520 static int
 521 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 522 {
 523         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 524         struct vf_cmd_info args;
 525         int ret;
 526
 527         memset(&args, 0, sizeof(args));
 528         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 529         args.in_args = NULL;
 530         args.in_args_size = 0;
 531         args.out_buffer = vf->aq_resp;
 532         args.out_size = I40E_AQ_BUF_SZ;
 533         ret = i40evf_execute_vf_cmd(dev, &args);
 534         if (ret)
 535                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 536                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 537
 538         return ret;
 539 }
 540
 541 static int
 542 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 543 {
 544         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 545         struct vf_cmd_info args;
 546         int ret;
 547
 548         memset(&args, 0, sizeof(args));
 549         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 550         args.in_args = NULL;
 551         args.in_args_size = 0;
 552         args.out_buffer = vf->aq_resp;
 553         args.out_size = I40E_AQ_BUF_SZ;
 554         ret = i40evf_execute_vf_cmd(dev, &args);
 555         if (ret)
 556                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 557                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 558
 559         return ret;
 560 }
 561
 562 static int
 563 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 564                                 struct i40e_vsi_vlan_pvid_info *info)
 565 {
 566         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 567         int err;
 568         struct vf_cmd_info args;
 569         struct virtchnl_pvid_info tpid_info;
 570
 571         if (info == NULL) {
 572                 PMD_DRV_LOG(ERR, "invalid parameters");
 573                 return I40E_ERR_PARAM;
 574         }
 575
 576         memset(&tpid_info, 0, sizeof(tpid_info));
 577         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 578         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 579
 580         args.ops = (enum virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 581         args.in_args = (uint8_t *)&tpid_info;
 582         args.in_args_size = sizeof(tpid_info);
 583         args.out_buffer = vf->aq_resp;
 584         args.out_size = I40E_AQ_BUF_SZ;
 585
 586         err = i40evf_execute_vf_cmd(dev, &args);
 587         if (err)
 588                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 589
 590         return err;
 591 }
 592
 593 static void
 594 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 595                                   uint16_t vsi_id,
 596                                   uint16_t queue_id,
 597                                   uint16_t nb_txq,
 598                                   struct i40e_tx_queue *txq)
 599 {
 600         txq_info->vsi_id = vsi_id;
 601         txq_info->queue_id = queue_id;
 602         if (queue_id < nb_txq) {
 603                 txq_info->ring_len = txq->nb_tx_desc;
 604                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 605         }
 606 }
 607
 608 static void
 609 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 610                                   uint16_t vsi_id,
 611                                   uint16_t queue_id,
 612                                   uint16_t nb_rxq,
 613                                   uint32_t max_pkt_size,
 614                                   struct i40e_rx_queue *rxq)
 615 {
 616         rxq_info->vsi_id = vsi_id;
 617         rxq_info->queue_id = queue_id;
 618         rxq_info->max_pkt_size = max_pkt_size;
 619         if (queue_id < nb_rxq) {
 620                 rxq_info->ring_len = rxq->nb_rx_desc;
 621                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 622                 rxq_info->databuffer_size =
 623                         (rte_pktmbuf_data_room_size(rxq->mp) -
 624                                 RTE_PKTMBUF_HEADROOM);
 625         }
 626 }
 627
 628 /* It configures VSI queues to co-work with Linux PF host */
 629 static int
 630 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 631 {
 632         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 633         struct i40e_rx_queue **rxq =
 634                 (struct i40e_rx_queue **)dev->data->rx_queues;
 635         struct i40e_tx_queue **txq =
 636                 (struct i40e_tx_queue **)dev->data->tx_queues;
 637         struct virtchnl_vsi_queue_config_info *vc_vqci;
 638         struct virtchnl_queue_pair_info *vc_qpi;
 639         struct vf_cmd_info args;
 640         uint16_t i, nb_qp = vf->num_queue_pairs;
 641         const uint32_t size =
 642                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 643         uint8_t buff[size];
 644         int ret;
 645
 646         memset(buff, 0, sizeof(buff));
 647         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 648         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 649         vc_vqci->num_queue_pairs = nb_qp;
 650
 651         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 652                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 653                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 654                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 655                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 656                                         vf->max_pkt_len, rxq[i]);
 657         }
 658         memset(&args, 0, sizeof(args));
 659         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 660         args.in_args = (uint8_t *)vc_vqci;
 661         args.in_args_size = size;
 662         args.out_buffer = vf->aq_resp;
 663         args.out_size = I40E_AQ_BUF_SZ;
 664         ret = i40evf_execute_vf_cmd(dev, &args);
 665         if (ret)
 666                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 667                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 668
 669         return ret;
 670 }
 671
 672 /* It configures VSI queues to co-work with DPDK PF host */
 673 static int
 674 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 675 {
 676         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 677         struct i40e_rx_queue **rxq =
 678                 (struct i40e_rx_queue **)dev->data->rx_queues;
 679         struct i40e_tx_queue **txq =
 680                 (struct i40e_tx_queue **)dev->data->tx_queues;
 681         struct virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 682         struct virtchnl_queue_pair_ext_info *vc_qpei;
 683         struct vf_cmd_info args;
 684         uint16_t i, nb_qp = vf->num_queue_pairs;
 685         const uint32_t size =
 686                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 687         uint8_t buff[size];
 688         int ret;
 689
 690         memset(buff, 0, sizeof(buff));
 691         vc_vqcei = (struct virtchnl_vsi_queue_config_ext_info *)buff;
 692         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 693         vc_vqcei->num_queue_pairs = nb_qp;
 694         vc_qpei = vc_vqcei->qpair;
 695         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 696                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 697                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 698                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 699                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 700                                         vf->max_pkt_len, rxq[i]);
 701                 if (i < dev->data->nb_rx_queues)
 702                         /*
 703                          * It adds extra info for configuring VSI queues, which
 704                          * is needed to enable the configurable crc stripping
 705                          * in VF.
 706                          */
 707                         vc_qpei->rxq_ext.crcstrip =
 708                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 709         }
 710         memset(&args, 0, sizeof(args));
 711         args.ops =
 712                 (enum virtchnl_ops)VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 713         args.in_args = (uint8_t *)vc_vqcei;
 714         args.in_args_size = size;
 715         args.out_buffer = vf->aq_resp;
 716         args.out_size = I40E_AQ_BUF_SZ;
 717         ret = i40evf_execute_vf_cmd(dev, &args);
 718         if (ret)
 719                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 720                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT");
 721
 722         return ret;
 723 }
 724
 725 static int
 726 i40evf_configure_queues(struct rte_eth_dev *dev)
 727 {
 728         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 729
 730         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 731                 /* To support DPDK PF host */
 732                 return i40evf_configure_vsi_queues_ext(dev);
 733         else
 734                 /* To support Linux PF host */
 735                 return i40evf_configure_vsi_queues(dev);
 736 }
 737
 738 static int
 739 i40evf_config_irq_map(struct rte_eth_dev *dev)
 740 {
 741         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 742         struct vf_cmd_info args;
 743         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 744                 sizeof(struct virtchnl_vector_map)];
 745         struct virtchnl_irq_map_info *map_info;
 746         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 747         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 748         uint32_t vector_id;
 749         int i, err;
 750
 751         if (rte_intr_allow_others(intr_handle)) {
 752                 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 753                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 754                 else
 755                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 756         } else {
 757                 vector_id = I40E_MISC_VEC_ID;
 758         }
 759
 760         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 761         map_info->num_vectors = 1;
 762         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 763         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 764         /* Alway use default dynamic MSIX interrupt */
 765         map_info->vecmap[0].vector_id = vector_id;
 766         /* Don't map any tx queue */
 767         map_info->vecmap[0].txq_map = 0;
 768         map_info->vecmap[0].rxq_map = 0;
 769         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 770                 map_info->vecmap[0].rxq_map |= 1 << i;
 771                 if (rte_intr_dp_is_en(intr_handle))
 772                         intr_handle->intr_vec[i] = vector_id;
 773         }
 774
 775         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 776         args.in_args = (u8 *)cmd_buffer;
 777         args.in_args_size = sizeof(cmd_buffer);
 778         args.out_buffer = vf->aq_resp;
 779         args.out_size = I40E_AQ_BUF_SZ;
 780         err = i40evf_execute_vf_cmd(dev, &args);
 781         if (err)
 782                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 783
 784         return err;
 785 }
 786
 787 static int
 788 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 789                                 bool on)
 790 {
 791         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 792         struct virtchnl_queue_select queue_select;
 793         int err;
 794         struct vf_cmd_info args;
 795         memset(&queue_select, 0, sizeof(queue_select));
 796         queue_select.vsi_id = vf->vsi_res->vsi_id;
 797
 798         if (isrx)
 799                 queue_select.rx_queues |= 1 << qid;
 800         else
 801                 queue_select.tx_queues |= 1 << qid;
 802
 803         if (on)
 804                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 805         else
 806                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 807         args.in_args = (u8 *)&queue_select;
 808         args.in_args_size = sizeof(queue_select);
 809         args.out_buffer = vf->aq_resp;
 810         args.out_size = I40E_AQ_BUF_SZ;
 811         err = i40evf_execute_vf_cmd(dev, &args);
 812         if (err)
 813                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 814                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 815
 816         return err;
 817 }
 818
 819 static int
 820 i40evf_start_queues(struct rte_eth_dev *dev)
 821 {
 822         struct rte_eth_dev_data *dev_data = dev->data;
 823         int i;
 824         struct i40e_rx_queue *rxq;
 825         struct i40e_tx_queue *txq;
 826
 827         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 828                 rxq = dev_data->rx_queues[i];
 829                 if (rxq->rx_deferred_start)
 830                         continue;
 831                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 832                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 833                         return -1;
 834                 }
 835         }
 836
 837         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 838                 txq = dev_data->tx_queues[i];
 839                 if (txq->tx_deferred_start)
 840                         continue;
 841                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 842                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 843                         return -1;
 844                 }
 845         }
 846
 847         return 0;
 848 }
 849
 850 static int
 851 i40evf_stop_queues(struct rte_eth_dev *dev)
 852 {
 853         int i;
 854
 855         /* Stop TX queues first */
 856         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 857                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 858                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 859                         return -1;
 860                 }
 861         }
 862
 863         /* Then stop RX queues */
 864         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 865                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 866                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 867                         return -1;
 868                 }
 869         }
 870
 871         return 0;
 872 }
 873
 874 static int
 875 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 876                     struct ether_addr *addr,
 877                     __rte_unused uint32_t index,
 878                     __rte_unused uint32_t pool)
 879 {
 880         struct virtchnl_ether_addr_list *list;
 881         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 882         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 883                         sizeof(struct virtchnl_ether_addr)];
 884         int err;
 885         struct vf_cmd_info args;
 886
 887         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 888                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 889                             addr->addr_bytes[0], addr->addr_bytes[1],
 890                             addr->addr_bytes[2], addr->addr_bytes[3],
 891                             addr->addr_bytes[4], addr->addr_bytes[5]);
 892                 return I40E_ERR_INVALID_MAC_ADDR;
 893         }
 894
 895         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 896         list->vsi_id = vf->vsi_res->vsi_id;
 897         list->num_elements = 1;
 898         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 899                                         sizeof(addr->addr_bytes));
 900
 901         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 902         args.in_args = cmd_buffer;
 903         args.in_args_size = sizeof(cmd_buffer);
 904         args.out_buffer = vf->aq_resp;
 905         args.out_size = I40E_AQ_BUF_SZ;
 906         err = i40evf_execute_vf_cmd(dev, &args);
 907         if (err)
 908                 PMD_DRV_LOG(ERR, "fail to execute command "
 909                             "OP_ADD_ETHER_ADDRESS");
 910
 911         return err;
 912 }
 913
 914 static void
 915 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 916                             struct ether_addr *addr)
 917 {
 918         struct virtchnl_ether_addr_list *list;
 919         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 920         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 921                         sizeof(struct virtchnl_ether_addr)];
 922         int err;
 923         struct vf_cmd_info args;
 924
 925         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 926                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 927                             addr->addr_bytes[0], addr->addr_bytes[1],
 928                             addr->addr_bytes[2], addr->addr_bytes[3],
 929                             addr->addr_bytes[4], addr->addr_bytes[5]);
 930                 return;
 931         }
 932
 933         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 934         list->vsi_id = vf->vsi_res->vsi_id;
 935         list->num_elements = 1;
 936         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 937                         sizeof(addr->addr_bytes));
 938
 939         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 940         args.in_args = cmd_buffer;
 941         args.in_args_size = sizeof(cmd_buffer);
 942         args.out_buffer = vf->aq_resp;
 943         args.out_size = I40E_AQ_BUF_SZ;
 944         err = i40evf_execute_vf_cmd(dev, &args);
 945         if (err)
 946                 PMD_DRV_LOG(ERR, "fail to execute command "
 947                             "OP_DEL_ETHER_ADDRESS");
 948         return;
 949 }
 950
 951 static void
 952 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 953 {
 954         struct rte_eth_dev_data *data = dev->data;
 955         struct ether_addr *addr;
 956
 957         addr = &data->mac_addrs[index];
 958
 959         i40evf_del_mac_addr_by_addr(dev, addr);
 960 }
 961
 962 static int
 963 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 964 {
 965         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 966         struct virtchnl_queue_select q_stats;
 967         int err;
 968         struct vf_cmd_info args;
 969
 970         memset(&q_stats, 0, sizeof(q_stats));
 971         q_stats.vsi_id = vf->vsi_res->vsi_id;
 972         args.ops = VIRTCHNL_OP_GET_STATS;
 973         args.in_args = (u8 *)&q_stats;
 974         args.in_args_size = sizeof(q_stats);
 975         args.out_buffer = vf->aq_resp;
 976         args.out_size = I40E_AQ_BUF_SZ;
 977
 978         err = i40evf_execute_vf_cmd(dev, &args);
 979         if (err) {
 980                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 981                 *pstats = NULL;
 982                 return err;
 983         }
 984         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 985         return 0;
 986 }
 987
 988 static int
 989 i40evf_get_statistics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 990 {
 991         int ret;
 992         struct i40e_eth_stats *pstats = NULL;
 993
 994         ret = i40evf_update_stats(dev, &pstats);
 995         if (ret != 0)
 996                 return 0;
 997
 998         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
 999                                                 pstats->rx_broadcast;
1000         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
1001                                                 pstats->tx_unicast;
1002         stats->imissed = pstats->rx_discards;
1003         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
1004         stats->ibytes = pstats->rx_bytes;
1005         stats->obytes = pstats->tx_bytes;
1006
1007         return 0;
1008 }
1009
1010 static void
1011 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
1012 {
1013         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1014         struct i40e_eth_stats *pstats = NULL;
1015
1016         /* read stat values to clear hardware registers */
1017         i40evf_update_stats(dev, &pstats);
1018
1019         /* set stats offset base on current values */
1020         vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
1021 }
1022
1023 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1024                                       struct rte_eth_xstat_name *xstats_names,
1025                                       __rte_unused unsigned limit)
1026 {
1027         unsigned i;
1028
1029         if (xstats_names != NULL)
1030                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1031                         snprintf(xstats_names[i].name,
1032                                 sizeof(xstats_names[i].name),
1033                                 "%s", rte_i40evf_stats_strings[i].name);
1034                 }
1035         return I40EVF_NB_XSTATS;
1036 }
1037
1038 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1039                                  struct rte_eth_xstat *xstats, unsigned n)
1040 {
1041         int ret;
1042         unsigned i;
1043         struct i40e_eth_stats *pstats = NULL;
1044
1045         if (n < I40EVF_NB_XSTATS)
1046                 return I40EVF_NB_XSTATS;
1047
1048         ret = i40evf_update_stats(dev, &pstats);
1049         if (ret != 0)
1050                 return 0;
1051
1052         if (!xstats)
1053                 return 0;
1054
1055         /* loop over xstats array and values from pstats */
1056         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1057                 xstats[i].id = i;
1058                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1059                         rte_i40evf_stats_strings[i].offset);
1060         }
1061
1062         return I40EVF_NB_XSTATS;
1063 }
1064
1065 static int
1066 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1067 {
1068         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1069         struct virtchnl_vlan_filter_list *vlan_list;
1070         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1071                                                         sizeof(uint16_t)];
1072         int err;
1073         struct vf_cmd_info args;
1074
1075         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1076         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1077         vlan_list->num_elements = 1;
1078         vlan_list->vlan_id[0] = vlanid;
1079
1080         args.ops = VIRTCHNL_OP_ADD_VLAN;
1081         args.in_args = (u8 *)&cmd_buffer;
1082         args.in_args_size = sizeof(cmd_buffer);
1083         args.out_buffer = vf->aq_resp;
1084         args.out_size = I40E_AQ_BUF_SZ;
1085         err = i40evf_execute_vf_cmd(dev, &args);
1086         if (err)
1087                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1088
1089         return err;
1090 }
1091
1092 static int
1093 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1094 {
1095         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1096         struct virtchnl_vlan_filter_list *vlan_list;
1097         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1098                                                         sizeof(uint16_t)];
1099         int err;
1100         struct vf_cmd_info args;
1101
1102         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1103         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1104         vlan_list->num_elements = 1;
1105         vlan_list->vlan_id[0] = vlanid;
1106
1107         args.ops = VIRTCHNL_OP_DEL_VLAN;
1108         args.in_args = (u8 *)&cmd_buffer;
1109         args.in_args_size = sizeof(cmd_buffer);
1110         args.out_buffer = vf->aq_resp;
1111         args.out_size = I40E_AQ_BUF_SZ;
1112         err = i40evf_execute_vf_cmd(dev, &args);
1113         if (err)
1114                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1115
1116         return err;
1117 }
1118
1119 static const struct rte_pci_id pci_id_i40evf_map[] = {
1120         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1121         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1122         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1123         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1124         { .vendor_id = 0, /* sentinel */ },
1125 };
1126
1127 static inline int
1128 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1129                                     struct rte_eth_link *link)
1130 {
1131         struct rte_eth_link *dst = &(dev->data->dev_link);
1132         struct rte_eth_link *src = link;
1133
1134         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1135                                         *(uint64_t *)src) == 0)
1136                 return -1;
1137
1138         return 0;
1139 }
1140
1141 /* Disable IRQ0 */
1142 static inline void
1143 i40evf_disable_irq0(struct i40e_hw *hw)
1144 {
1145         /* Disable all interrupt types */
1146         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1147         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1148                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1149         I40EVF_WRITE_FLUSH(hw);
1150 }
1151
1152 /* Enable IRQ0 */
1153 static inline void
1154 i40evf_enable_irq0(struct i40e_hw *hw)
1155 {
1156         /* Enable admin queue interrupt trigger */
1157         uint32_t val;
1158
1159         i40evf_disable_irq0(hw);
1160         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1161         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1162                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1163         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1164
1165         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1166                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1167                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1168                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1169
1170         I40EVF_WRITE_FLUSH(hw);
1171 }
1172
1173 static int
1174 i40evf_reset_vf(struct i40e_hw *hw)
1175 {
1176         int i, reset;
1177
1178         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1179                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1180                 return -1;
1181         }
1182         /**
1183           * After issuing vf reset command to pf, pf won't necessarily
1184           * reset vf, it depends on what state it exactly is. If it's not
1185           * initialized yet, it won't have vf reset since it's in a certain
1186           * state. If not, it will try to reset. Even vf is reset, pf will
1187           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1188           * it to ACTIVE. In this duration, vf may not catch the moment that
1189           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1190           */
1191         rte_delay_ms(200);
1192
1193         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1194                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1195                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1196                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1197                 if (VIRTCHNL_VFR_COMPLETED == reset || VIRTCHNL_VFR_VFACTIVE == reset)
1198                         break;
1199                 else
1200                         rte_delay_ms(50);
1201         }
1202
1203         if (i >= MAX_RESET_WAIT_CNT) {
1204                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1205                 return -1;
1206         }
1207
1208         return 0;
1209 }
1210
1211 static int
1212 i40evf_init_vf(struct rte_eth_dev *dev)
1213 {
1214         int i, err, bufsz;
1215         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1216         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1217         uint16_t interval =
1218                 i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
1219
1220         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1221         vf->dev_data = dev->data;
1222         err = i40e_set_mac_type(hw);
1223         if (err) {
1224                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1225                 goto err;
1226         }
1227
1228         i40e_init_adminq_parameter(hw);
1229         err = i40e_init_adminq(hw);
1230         if (err) {
1231                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1232                 goto err;
1233         }
1234
1235         /* Reset VF and wait until it's complete */
1236         if (i40evf_reset_vf(hw)) {
1237                 PMD_INIT_LOG(ERR, "reset NIC failed");
1238                 goto err_aq;
1239         }
1240
1241         /* VF reset, shutdown admin queue and initialize again */
1242         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1243                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1244                 return -1;
1245         }
1246
1247         i40e_init_adminq_parameter(hw);
1248         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1249                 PMD_INIT_LOG(ERR, "init_adminq failed");
1250                 return -1;
1251         }
1252         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1253         if (!vf->aq_resp) {
1254                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1255                         goto err_aq;
1256         }
1257         if (i40evf_check_api_version(dev) != 0) {
1258                 PMD_INIT_LOG(ERR, "check_api version failed");
1259                 goto err_aq;
1260         }
1261         bufsz = sizeof(struct virtchnl_vf_resource) +
1262                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1263         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1264         if (!vf->vf_res) {
1265                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1266                         goto err_aq;
1267         }
1268
1269         if (i40evf_get_vf_resource(dev) != 0) {
1270                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1271                 goto err_alloc;
1272         }
1273
1274         /* got VF config message back from PF, now we can parse it */
1275         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1276                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1277                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1278         }
1279
1280         if (!vf->vsi_res) {
1281                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1282                 goto err_alloc;
1283         }
1284
1285         if (hw->mac.type == I40E_MAC_X722_VF)
1286                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1287         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1288         vf->vsi.type = (enum i40e_vsi_type)vf->vsi_res->vsi_type;
1289         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1290         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1291
1292         /* Store the MAC address configured by host, or generate random one */
1293         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1294                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1295         else
1296                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1297
1298         /* If the PF host is not DPDK, set the interval of ITR0 to max*/
1299         if (vf->version_major != I40E_DPDK_VERSION_MAJOR) {
1300                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1301                                (I40E_ITR_INDEX_DEFAULT <<
1302                                 I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1303                                (interval <<
1304                                 I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1305                 I40EVF_WRITE_FLUSH(hw);
1306         }
1307
1308         return 0;
1309
1310 err_alloc:
1311         rte_free(vf->vf_res);
1312 err_aq:
1313         i40e_shutdown_adminq(hw); /* ignore error */
1314 err:
1315         return -1;
1316 }
1317
1318 static int
1319 i40evf_uninit_vf(struct rte_eth_dev *dev)
1320 {
1321         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1322         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1323
1324         PMD_INIT_FUNC_TRACE();
1325
1326         if (hw->adapter_stopped == 0)
1327                 i40evf_dev_close(dev);
1328         rte_free(vf->vf_res);
1329         vf->vf_res = NULL;
1330         rte_free(vf->aq_resp);
1331         vf->aq_resp = NULL;
1332
1333         return 0;
1334 }
1335
1336 static void
1337 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1338                 __rte_unused uint16_t msglen)
1339 {
1340         struct virtchnl_pf_event *pf_msg =
1341                         (struct virtchnl_pf_event *)msg;
1342         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1343
1344         switch (pf_msg->event) {
1345         case VIRTCHNL_EVENT_RESET_IMPENDING:
1346                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1347                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1348                                               NULL, NULL);
1349                 break;
1350         case VIRTCHNL_EVENT_LINK_CHANGE:
1351                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1352                 vf->link_up = pf_msg->event_data.link_event.link_status;
1353                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1354                 break;
1355         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1356                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1357                 break;
1358         default:
1359                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1360                 break;
1361         }
1362 }
1363
1364 static void
1365 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1366 {
1367         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1368         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1369         struct i40e_arq_event_info info;
1370         uint16_t pending, aq_opc;
1371         enum virtchnl_ops msg_opc;
1372         enum i40e_status_code msg_ret;
1373         int ret;
1374
1375         info.buf_len = I40E_AQ_BUF_SZ;
1376         if (!vf->aq_resp) {
1377                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1378                 return;
1379         }
1380         info.msg_buf = vf->aq_resp;
1381
1382         pending = 1;
1383         while (pending) {
1384                 ret = i40e_clean_arq_element(hw, &info, &pending);
1385
1386                 if (ret != I40E_SUCCESS) {
1387                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1388                                     "ret: %d", ret);
1389                         break;
1390                 }
1391                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1392                 /* For the message sent from pf to vf, opcode is stored in
1393                  * cookie_high of struct i40e_aq_desc, while return error code
1394                  * are stored in cookie_low, Which is done by
1395                  * i40e_aq_send_msg_to_vf in PF driver.*/
1396                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1397                                                   info.desc.cookie_high);
1398                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1399                                                   info.desc.cookie_low);
1400                 switch (aq_opc) {
1401                 case i40e_aqc_opc_send_msg_to_vf:
1402                         if (msg_opc == VIRTCHNL_OP_EVENT)
1403                                 /* process event*/
1404                                 i40evf_handle_pf_event(dev, info.msg_buf,
1405                                                        info.msg_len);
1406                         else {
1407                                 /* read message and it's expected one */
1408                                 if (msg_opc == vf->pend_cmd) {
1409                                         vf->cmd_retval = msg_ret;
1410                                         /* prevent compiler reordering */
1411                                         rte_compiler_barrier();
1412                                         _clear_cmd(vf);
1413                                 } else
1414                                         PMD_DRV_LOG(ERR, "command mismatch,"
1415                                                 "expect %u, get %u",
1416                                                 vf->pend_cmd, msg_opc);
1417                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1418                                              " opcode = %d", msg_opc);
1419                         }
1420                         break;
1421                 default:
1422                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1423                                     aq_opc);
1424                         break;
1425                 }
1426         }
1427 }
1428
1429 /**
1430  * Interrupt handler triggered by NIC  for handling
1431  * specific interrupt. Only adminq interrupt is processed in VF.
1432  *
1433  * @param handle
1434  *  Pointer to interrupt handle.
1435  * @param param
1436  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1437  *
1438  * @return
1439  *  void
1440  */
1441 static void
1442 i40evf_dev_interrupt_handler(void *param)
1443 {
1444         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1445         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1446         uint32_t icr0;
1447
1448         i40evf_disable_irq0(hw);
1449
1450         /* read out interrupt causes */
1451         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1452
1453         /* No interrupt event indicated */
1454         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1455                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1456                 goto done;
1457         }
1458
1459         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1460                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1461                 i40evf_handle_aq_msg(dev);
1462         }
1463
1464         /* Link Status Change interrupt */
1465         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1466                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1467                                    " do nothing");
1468
1469 done:
1470         i40evf_enable_irq0(hw);
1471         rte_intr_enable(dev->intr_handle);
1472 }
1473
1474 static int
1475 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1476 {
1477         struct i40e_hw *hw
1478                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1479         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1480
1481         PMD_INIT_FUNC_TRACE();
1482
1483         /* assign ops func pointer */
1484         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1485         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1486         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1487
1488         /*
1489          * For secondary processes, we don't initialise any further as primary
1490          * has already done this work.
1491          */
1492         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1493                 i40e_set_rx_function(eth_dev);
1494                 i40e_set_tx_function(eth_dev);
1495                 return 0;
1496         }
1497         i40e_set_default_ptype_table(eth_dev);
1498         rte_eth_copy_pci_info(eth_dev, pci_dev);
1499         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1500
1501         hw->vendor_id = pci_dev->id.vendor_id;
1502         hw->device_id = pci_dev->id.device_id;
1503         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1504         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1505         hw->bus.device = pci_dev->addr.devid;
1506         hw->bus.func = pci_dev->addr.function;
1507         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1508         hw->adapter_stopped = 0;
1509
1510         if(i40evf_init_vf(eth_dev) != 0) {
1511                 PMD_INIT_LOG(ERR, "Init vf failed");
1512                 return -1;
1513         }
1514
1515         /* register callback func to eal lib */
1516         rte_intr_callback_register(&pci_dev->intr_handle,
1517                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1518
1519         /* enable uio intr after callback register */
1520         rte_intr_enable(&pci_dev->intr_handle);
1521
1522         /* configure and enable device interrupt */
1523         i40evf_enable_irq0(hw);
1524
1525         /* copy mac addr */
1526         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1527                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1528                                         0);
1529         if (eth_dev->data->mac_addrs == NULL) {
1530                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1531                                 " store MAC addresses",
1532                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1533                 return -ENOMEM;
1534         }
1535         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1536                         &eth_dev->data->mac_addrs[0]);
1537
1538         return 0;
1539 }
1540
1541 static int
1542 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1543 {
1544         PMD_INIT_FUNC_TRACE();
1545
1546         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1547                 return -EPERM;
1548
1549         eth_dev->dev_ops = NULL;
1550         eth_dev->rx_pkt_burst = NULL;
1551         eth_dev->tx_pkt_burst = NULL;
1552
1553         if (i40evf_uninit_vf(eth_dev) != 0) {
1554                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1555                 return -1;
1556         }
1557
1558         rte_free(eth_dev->data->mac_addrs);
1559         eth_dev->data->mac_addrs = NULL;
1560
1561         return 0;
1562 }
1563
1564 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1565         struct rte_pci_device *pci_dev)
1566 {
1567         return rte_eth_dev_pci_generic_probe(pci_dev,
1568                 sizeof(struct i40e_adapter), i40evf_dev_init);
1569 }
1570
1571 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1572 {
1573         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1574 }
1575
1576 /*
1577  * virtual function driver struct
1578  */
1579 static struct rte_pci_driver rte_i40evf_pmd = {
1580         .id_table = pci_id_i40evf_map,
1581         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1582         .probe = eth_i40evf_pci_probe,
1583         .remove = eth_i40evf_pci_remove,
1584 };
1585
1586 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1587 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1588 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1589
1590 static int
1591 i40evf_dev_configure(struct rte_eth_dev *dev)
1592 {
1593         struct i40e_adapter *ad =
1594                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1595         struct rte_eth_conf *conf = &dev->data->dev_conf;
1596         struct i40e_vf *vf;
1597
1598         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1599          * allocation or vector Rx preconditions we will reset it.
1600          */
1601         ad->rx_bulk_alloc_allowed = true;
1602         ad->rx_vec_allowed = true;
1603         ad->tx_simple_allowed = true;
1604         ad->tx_vec_allowed = true;
1605
1606         /* For non-DPDK PF drivers, VF has no ability to disable HW
1607          * CRC strip, and is implicitly enabled by the PF.
1608          */
1609         if (!conf->rxmode.hw_strip_crc) {
1610                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1611                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1612                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1613                         /* Peer is running non-DPDK PF driver. */
1614                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1615                         return -EINVAL;
1616                 }
1617         }
1618
1619         return i40evf_init_vlan(dev);
1620 }
1621
1622 static int
1623 i40evf_init_vlan(struct rte_eth_dev *dev)
1624 {
1625         struct rte_eth_dev_data *data = dev->data;
1626         int ret;
1627
1628         /* Apply vlan offload setting */
1629         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1630
1631         /* Apply pvid setting */
1632         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1633                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1634         return ret;
1635 }
1636
1637 static void
1638 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1639 {
1640         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1641
1642         /* Vlan stripping setting */
1643         if (mask & ETH_VLAN_STRIP_MASK) {
1644                 /* Enable or disable VLAN stripping */
1645                 if (dev_conf->rxmode.hw_vlan_strip)
1646                         i40evf_enable_vlan_strip(dev);
1647                 else
1648                         i40evf_disable_vlan_strip(dev);
1649         }
1650 }
1651
1652 static int
1653 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1654 {
1655         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1656         struct i40e_vsi_vlan_pvid_info info;
1657         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1658
1659         memset(&info, 0, sizeof(info));
1660         info.on = on;
1661
1662         /* Linux pf host don't support vlan offload yet */
1663         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1664                 if (info.on)
1665                         info.config.pvid = pvid;
1666                 else {
1667                         info.config.reject.tagged =
1668                                 dev_conf->txmode.hw_vlan_reject_tagged;
1669                         info.config.reject.untagged =
1670                                 dev_conf->txmode.hw_vlan_reject_untagged;
1671                 }
1672                 return i40evf_config_vlan_pvid(dev, &info);
1673         }
1674
1675         return 0;
1676 }
1677
1678 static int
1679 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1680 {
1681         struct i40e_rx_queue *rxq;
1682         int err = 0;
1683         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1684
1685         PMD_INIT_FUNC_TRACE();
1686
1687         if (rx_queue_id < dev->data->nb_rx_queues) {
1688                 rxq = dev->data->rx_queues[rx_queue_id];
1689
1690                 err = i40e_alloc_rx_queue_mbufs(rxq);
1691                 if (err) {
1692                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1693                         return err;
1694                 }
1695
1696                 rte_wmb();
1697
1698                 /* Init the RX tail register. */
1699                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1700                 I40EVF_WRITE_FLUSH(hw);
1701
1702                 /* Ready to switch the queue on */
1703                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1704
1705                 if (err)
1706                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1707                                     rx_queue_id);
1708                 else
1709                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1710         }
1711
1712         return err;
1713 }
1714
1715 static int
1716 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1717 {
1718         struct i40e_rx_queue *rxq;
1719         int err;
1720
1721         if (rx_queue_id < dev->data->nb_rx_queues) {
1722                 rxq = dev->data->rx_queues[rx_queue_id];
1723
1724                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1725
1726                 if (err) {
1727                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1728                                     rx_queue_id);
1729                         return err;
1730                 }
1731
1732                 i40e_rx_queue_release_mbufs(rxq);
1733                 i40e_reset_rx_queue(rxq);
1734                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1735         }
1736
1737         return 0;
1738 }
1739
1740 static int
1741 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1742 {
1743         int err = 0;
1744
1745         PMD_INIT_FUNC_TRACE();
1746
1747         if (tx_queue_id < dev->data->nb_tx_queues) {
1748
1749                 /* Ready to switch the queue on */
1750                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1751
1752                 if (err)
1753                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1754                                     tx_queue_id);
1755                 else
1756                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1757         }
1758
1759         return err;
1760 }
1761
1762 static int
1763 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1764 {
1765         struct i40e_tx_queue *txq;
1766         int err;
1767
1768         if (tx_queue_id < dev->data->nb_tx_queues) {
1769                 txq = dev->data->tx_queues[tx_queue_id];
1770
1771                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1772
1773                 if (err) {
1774                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1775                                     tx_queue_id);
1776                         return err;
1777                 }
1778
1779                 i40e_tx_queue_release_mbufs(txq);
1780                 i40e_reset_tx_queue(txq);
1781                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1782         }
1783
1784         return 0;
1785 }
1786
1787 static int
1788 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1789 {
1790         int ret;
1791
1792         if (on)
1793                 ret = i40evf_add_vlan(dev, vlan_id);
1794         else
1795                 ret = i40evf_del_vlan(dev,vlan_id);
1796
1797         return ret;
1798 }
1799
1800 static int
1801 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1802 {
1803         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1804         struct rte_eth_dev_data *dev_data = dev->data;
1805         struct rte_pktmbuf_pool_private *mbp_priv;
1806         uint16_t buf_size, len;
1807
1808         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1809         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1810         I40EVF_WRITE_FLUSH(hw);
1811
1812         /* Calculate the maximum packet length allowed */
1813         mbp_priv = rte_mempool_get_priv(rxq->mp);
1814         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1815                                         RTE_PKTMBUF_HEADROOM);
1816         rxq->hs_mode = i40e_header_split_none;
1817         rxq->rx_hdr_len = 0;
1818         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1819         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1820         rxq->max_pkt_len = RTE_MIN(len,
1821                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1822
1823         /**
1824          * Check if the jumbo frame and maximum packet length are set correctly
1825          */
1826         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1827                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1828                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1829                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1830                                 "larger than %u and smaller than %u, as jumbo "
1831                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1832                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1833                         return I40E_ERR_CONFIG;
1834                 }
1835         } else {
1836                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1837                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1838                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1839                                 "larger than %u and smaller than %u, as jumbo "
1840                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1841                                                 (uint32_t)ETHER_MAX_LEN);
1842                         return I40E_ERR_CONFIG;
1843                 }
1844         }
1845
1846         if (dev_data->dev_conf.rxmode.enable_scatter ||
1847             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1848                 dev_data->scattered_rx = 1;
1849         }
1850
1851         return 0;
1852 }
1853
1854 static int
1855 i40evf_rx_init(struct rte_eth_dev *dev)
1856 {
1857         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1858         uint16_t i;
1859         int ret = I40E_SUCCESS;
1860         struct i40e_rx_queue **rxq =
1861                 (struct i40e_rx_queue **)dev->data->rx_queues;
1862
1863         i40evf_config_rss(vf);
1864         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1865                 if (!rxq[i] || !rxq[i]->q_set)
1866                         continue;
1867                 ret = i40evf_rxq_init(dev, rxq[i]);
1868                 if (ret != I40E_SUCCESS)
1869                         break;
1870         }
1871         if (ret == I40E_SUCCESS)
1872                 i40e_set_rx_function(dev);
1873
1874         return ret;
1875 }
1876
1877 static void
1878 i40evf_tx_init(struct rte_eth_dev *dev)
1879 {
1880         uint16_t i;
1881         struct i40e_tx_queue **txq =
1882                 (struct i40e_tx_queue **)dev->data->tx_queues;
1883         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1884
1885         for (i = 0; i < dev->data->nb_tx_queues; i++)
1886                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1887
1888         i40e_set_tx_function(dev);
1889 }
1890
1891 static inline void
1892 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1893 {
1894         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1895         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1896         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1897         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1898
1899         if (!rte_intr_allow_others(intr_handle)) {
1900                 I40E_WRITE_REG(hw,
1901                                I40E_VFINT_DYN_CTL01,
1902                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1903                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1904                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1905                 I40EVF_WRITE_FLUSH(hw);
1906                 return;
1907         }
1908
1909         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1910                 /* To support DPDK PF host */
1911                 I40E_WRITE_REG(hw,
1912                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1913                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1914                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1915         /* If host driver is kernel driver, do nothing.
1916          * Interrupt 0 is used for rx packets, but don't set
1917          * I40E_VFINT_DYN_CTL01,
1918          * because it is already done in i40evf_enable_irq0.
1919          */
1920
1921         I40EVF_WRITE_FLUSH(hw);
1922 }
1923
1924 static inline void
1925 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1926 {
1927         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1928         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1929         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1930         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1931
1932         if (!rte_intr_allow_others(intr_handle)) {
1933                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1934                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1935                 I40EVF_WRITE_FLUSH(hw);
1936                 return;
1937         }
1938
1939         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1940                 I40E_WRITE_REG(hw,
1941                                I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR
1942                                                     - 1),
1943                                0);
1944         /* If host driver is kernel driver, do nothing.
1945          * Interrupt 0 is used for rx packets, but don't zero
1946          * I40E_VFINT_DYN_CTL01,
1947          * because interrupt 0 is also used for adminq processing.
1948          */
1949
1950         I40EVF_WRITE_FLUSH(hw);
1951 }
1952
1953 static int
1954 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1955 {
1956         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1957         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1958         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1959         uint16_t interval =
1960                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1961         uint16_t msix_intr;
1962
1963         msix_intr = intr_handle->intr_vec[queue_id];
1964         if (msix_intr == I40E_MISC_VEC_ID)
1965                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1966                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1967                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1968                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1969                                (interval <<
1970                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1971         else
1972                 I40E_WRITE_REG(hw,
1973                                I40E_VFINT_DYN_CTLN1(msix_intr -
1974                                                     I40E_RX_VEC_START),
1975                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1976                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1977                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1978                                (interval <<
1979                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1980
1981         I40EVF_WRITE_FLUSH(hw);
1982
1983         rte_intr_enable(&pci_dev->intr_handle);
1984
1985         return 0;
1986 }
1987
1988 static int
1989 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1990 {
1991         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1992         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1993         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1994         uint16_t msix_intr;
1995
1996         msix_intr = intr_handle->intr_vec[queue_id];
1997         if (msix_intr == I40E_MISC_VEC_ID)
1998                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1999         else
2000                 I40E_WRITE_REG(hw,
2001                                I40E_VFINT_DYN_CTLN1(msix_intr -
2002                                                     I40E_RX_VEC_START),
2003                                0);
2004
2005         I40EVF_WRITE_FLUSH(hw);
2006
2007         return 0;
2008 }
2009
2010 static void
2011 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2012 {
2013         struct virtchnl_ether_addr_list *list;
2014         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2015         int err, i, j;
2016         int next_begin = 0;
2017         int begin = 0;
2018         uint32_t len;
2019         struct ether_addr *addr;
2020         struct vf_cmd_info args;
2021
2022         do {
2023                 j = 0;
2024                 len = sizeof(struct virtchnl_ether_addr_list);
2025                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2026                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
2027                                 continue;
2028                         len += sizeof(struct virtchnl_ether_addr);
2029                         if (len >= I40E_AQ_BUF_SZ) {
2030                                 next_begin = i + 1;
2031                                 break;
2032                         }
2033                 }
2034
2035                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2036                 if (!list) {
2037                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2038                         return;
2039                 }
2040
2041                 for (i = begin; i < next_begin; i++) {
2042                         addr = &dev->data->mac_addrs[i];
2043                         if (is_zero_ether_addr(addr))
2044                                 continue;
2045                         (void)rte_memcpy(list->list[j].addr, addr->addr_bytes,
2046                                          sizeof(addr->addr_bytes));
2047                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2048                                     addr->addr_bytes[0], addr->addr_bytes[1],
2049                                     addr->addr_bytes[2], addr->addr_bytes[3],
2050                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2051                         j++;
2052                 }
2053                 list->vsi_id = vf->vsi_res->vsi_id;
2054                 list->num_elements = j;
2055                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2056                            VIRTCHNL_OP_DEL_ETH_ADDR;
2057                 args.in_args = (uint8_t *)list;
2058                 args.in_args_size = len;
2059                 args.out_buffer = vf->aq_resp;
2060                 args.out_size = I40E_AQ_BUF_SZ;
2061                 err = i40evf_execute_vf_cmd(dev, &args);
2062                 if (err)
2063                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2064                                     add ? "OP_ADD_ETHER_ADDRESS" :
2065                                     "OP_DEL_ETHER_ADDRESS");
2066                 rte_free(list);
2067                 begin = next_begin;
2068         } while (begin < I40E_NUM_MACADDR_MAX);
2069 }
2070
2071 static int
2072 i40evf_dev_start(struct rte_eth_dev *dev)
2073 {
2074         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2075         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2076         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2077         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2078         uint32_t intr_vector = 0;
2079
2080         PMD_INIT_FUNC_TRACE();
2081
2082         hw->adapter_stopped = 0;
2083
2084         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2085         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2086                                         dev->data->nb_tx_queues);
2087
2088         /* check and configure queue intr-vector mapping */
2089         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2090                 intr_vector = dev->data->nb_rx_queues;
2091                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2092                         return -1;
2093         }
2094
2095         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2096                 intr_handle->intr_vec =
2097                         rte_zmalloc("intr_vec",
2098                                     dev->data->nb_rx_queues * sizeof(int), 0);
2099                 if (!intr_handle->intr_vec) {
2100                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2101                                      " intr_vec", dev->data->nb_rx_queues);
2102                         return -ENOMEM;
2103                 }
2104         }
2105
2106         if (i40evf_rx_init(dev) != 0){
2107                 PMD_DRV_LOG(ERR, "failed to do RX init");
2108                 return -1;
2109         }
2110
2111         i40evf_tx_init(dev);
2112
2113         if (i40evf_configure_queues(dev) != 0) {
2114                 PMD_DRV_LOG(ERR, "configure queues failed");
2115                 goto err_queue;
2116         }
2117         if (i40evf_config_irq_map(dev)) {
2118                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2119                 goto err_queue;
2120         }
2121
2122         /* Set all mac addrs */
2123         i40evf_add_del_all_mac_addr(dev, TRUE);
2124
2125         if (i40evf_start_queues(dev) != 0) {
2126                 PMD_DRV_LOG(ERR, "enable queues failed");
2127                 goto err_mac;
2128         }
2129
2130         i40evf_enable_queues_intr(dev);
2131         return 0;
2132
2133 err_mac:
2134         i40evf_add_del_all_mac_addr(dev, FALSE);
2135 err_queue:
2136         return -1;
2137 }
2138
2139 static void
2140 i40evf_dev_stop(struct rte_eth_dev *dev)
2141 {
2142         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2143         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2144
2145         PMD_INIT_FUNC_TRACE();
2146
2147         i40evf_stop_queues(dev);
2148         i40evf_disable_queues_intr(dev);
2149         i40e_dev_clear_queues(dev);
2150
2151         /* Clean datapath event and queue/vec mapping */
2152         rte_intr_efd_disable(intr_handle);
2153         if (intr_handle->intr_vec) {
2154                 rte_free(intr_handle->intr_vec);
2155                 intr_handle->intr_vec = NULL;
2156         }
2157         /* remove all mac addrs */
2158         i40evf_add_del_all_mac_addr(dev, FALSE);
2159
2160 }
2161
2162 static int
2163 i40evf_dev_link_update(struct rte_eth_dev *dev,
2164                        __rte_unused int wait_to_complete)
2165 {
2166         struct rte_eth_link new_link;
2167         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2168         /*
2169          * DPDK pf host provide interfacet to acquire link status
2170          * while Linux driver does not
2171          */
2172
2173         /* Linux driver PF host */
2174         switch (vf->link_speed) {
2175         case I40E_LINK_SPEED_100MB:
2176                 new_link.link_speed = ETH_SPEED_NUM_100M;
2177                 break;
2178         case I40E_LINK_SPEED_1GB:
2179                 new_link.link_speed = ETH_SPEED_NUM_1G;
2180                 break;
2181         case I40E_LINK_SPEED_10GB:
2182                 new_link.link_speed = ETH_SPEED_NUM_10G;
2183                 break;
2184         case I40E_LINK_SPEED_20GB:
2185                 new_link.link_speed = ETH_SPEED_NUM_20G;
2186                 break;
2187         case I40E_LINK_SPEED_25GB:
2188                 new_link.link_speed = ETH_SPEED_NUM_25G;
2189                 break;
2190         case I40E_LINK_SPEED_40GB:
2191                 new_link.link_speed = ETH_SPEED_NUM_40G;
2192                 break;
2193         default:
2194                 new_link.link_speed = ETH_SPEED_NUM_100M;
2195                 break;
2196         }
2197         /* full duplex only */
2198         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2199         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2200                                              ETH_LINK_DOWN;
2201
2202         i40evf_dev_atomic_write_link_status(dev, &new_link);
2203
2204         return 0;
2205 }
2206
2207 static void
2208 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2209 {
2210         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2211         int ret;
2212
2213         /* If enabled, just return */
2214         if (vf->promisc_unicast_enabled)
2215                 return;
2216
2217         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2218         if (ret == 0)
2219                 vf->promisc_unicast_enabled = TRUE;
2220 }
2221
2222 static void
2223 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2224 {
2225         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2226         int ret;
2227
2228         /* If disabled, just return */
2229         if (!vf->promisc_unicast_enabled)
2230                 return;
2231
2232         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2233         if (ret == 0)
2234                 vf->promisc_unicast_enabled = FALSE;
2235 }
2236
2237 static void
2238 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2239 {
2240         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2241         int ret;
2242
2243         /* If enabled, just return */
2244         if (vf->promisc_multicast_enabled)
2245                 return;
2246
2247         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2248         if (ret == 0)
2249                 vf->promisc_multicast_enabled = TRUE;
2250 }
2251
2252 static void
2253 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2254 {
2255         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2256         int ret;
2257
2258         /* If enabled, just return */
2259         if (!vf->promisc_multicast_enabled)
2260                 return;
2261
2262         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2263         if (ret == 0)
2264                 vf->promisc_multicast_enabled = FALSE;
2265 }
2266
2267 static void
2268 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2269 {
2270         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2271
2272         memset(dev_info, 0, sizeof(*dev_info));
2273         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2274         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2275         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2276         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2277         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2278         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2279         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2280         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
2281         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2282         dev_info->rx_offload_capa =
2283                 DEV_RX_OFFLOAD_VLAN_STRIP |
2284                 DEV_RX_OFFLOAD_QINQ_STRIP |
2285                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2286                 DEV_RX_OFFLOAD_UDP_CKSUM |
2287                 DEV_RX_OFFLOAD_TCP_CKSUM;
2288         dev_info->tx_offload_capa =
2289                 DEV_TX_OFFLOAD_VLAN_INSERT |
2290                 DEV_TX_OFFLOAD_QINQ_INSERT |
2291                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2292                 DEV_TX_OFFLOAD_UDP_CKSUM |
2293                 DEV_TX_OFFLOAD_TCP_CKSUM |
2294                 DEV_TX_OFFLOAD_SCTP_CKSUM;
2295
2296         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2297                 .rx_thresh = {
2298                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2299                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2300                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2301                 },
2302                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2303                 .rx_drop_en = 0,
2304         };
2305
2306         dev_info->default_txconf = (struct rte_eth_txconf) {
2307                 .tx_thresh = {
2308                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2309                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2310                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2311                 },
2312                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2313                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2314                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2315                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2316         };
2317
2318         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2319                 .nb_max = I40E_MAX_RING_DESC,
2320                 .nb_min = I40E_MIN_RING_DESC,
2321                 .nb_align = I40E_ALIGN_RING_DESC,
2322         };
2323
2324         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2325                 .nb_max = I40E_MAX_RING_DESC,
2326                 .nb_min = I40E_MIN_RING_DESC,
2327                 .nb_align = I40E_ALIGN_RING_DESC,
2328         };
2329 }
2330
2331 static void
2332 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2333 {
2334         if (i40evf_get_statistics(dev, stats))
2335                 PMD_DRV_LOG(ERR, "Get statistics failed");
2336 }
2337
2338 static void
2339 i40evf_dev_close(struct rte_eth_dev *dev)
2340 {
2341         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2342         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2343         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2344
2345         i40evf_dev_stop(dev);
2346         hw->adapter_stopped = 1;
2347         i40e_dev_free_queues(dev);
2348         i40evf_reset_vf(hw);
2349         i40e_shutdown_adminq(hw);
2350         /* disable uio intr before callback unregister */
2351         rte_intr_disable(intr_handle);
2352
2353         /* unregister callback func from eal lib */
2354         rte_intr_callback_unregister(intr_handle,
2355                                      i40evf_dev_interrupt_handler, dev);
2356         i40evf_disable_irq0(hw);
2357 }
2358
2359 static int
2360 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2361 {
2362         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2363         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2364         int ret;
2365
2366         if (!lut)
2367                 return -EINVAL;
2368
2369         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2370                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2371                                           lut, lut_size);
2372                 if (ret) {
2373                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2374                         return ret;
2375                 }
2376         } else {
2377                 uint32_t *lut_dw = (uint32_t *)lut;
2378                 uint16_t i, lut_size_dw = lut_size / 4;
2379
2380                 for (i = 0; i < lut_size_dw; i++)
2381                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2382         }
2383
2384         return 0;
2385 }
2386
2387 static int
2388 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2389 {
2390         struct i40e_vf *vf;
2391         struct i40e_hw *hw;
2392         int ret;
2393
2394         if (!vsi || !lut)
2395                 return -EINVAL;
2396
2397         vf = I40E_VSI_TO_VF(vsi);
2398         hw = I40E_VSI_TO_HW(vsi);
2399
2400         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2401                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2402                                           lut, lut_size);
2403                 if (ret) {
2404                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2405                         return ret;
2406                 }
2407         } else {
2408                 uint32_t *lut_dw = (uint32_t *)lut;
2409                 uint16_t i, lut_size_dw = lut_size / 4;
2410
2411                 for (i = 0; i < lut_size_dw; i++)
2412                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2413                 I40EVF_WRITE_FLUSH(hw);
2414         }
2415
2416         return 0;
2417 }
2418
2419 static int
2420 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2421                            struct rte_eth_rss_reta_entry64 *reta_conf,
2422                            uint16_t reta_size)
2423 {
2424         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2425         uint8_t *lut;
2426         uint16_t i, idx, shift;
2427         int ret;
2428
2429         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2430                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2431                         "(%d) doesn't match the number of hardware can "
2432                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2433                 return -EINVAL;
2434         }
2435
2436         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2437         if (!lut) {
2438                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2439                 return -ENOMEM;
2440         }
2441         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2442         if (ret)
2443                 goto out;
2444         for (i = 0; i < reta_size; i++) {
2445                 idx = i / RTE_RETA_GROUP_SIZE;
2446                 shift = i % RTE_RETA_GROUP_SIZE;
2447                 if (reta_conf[idx].mask & (1ULL << shift))
2448                         lut[i] = reta_conf[idx].reta[shift];
2449         }
2450         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2451
2452 out:
2453         rte_free(lut);
2454
2455         return ret;
2456 }
2457
2458 static int
2459 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2460                           struct rte_eth_rss_reta_entry64 *reta_conf,
2461                           uint16_t reta_size)
2462 {
2463         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2464         uint16_t i, idx, shift;
2465         uint8_t *lut;
2466         int ret;
2467
2468         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2469                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2470                         "(%d) doesn't match the number of hardware can "
2471                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2472                 return -EINVAL;
2473         }
2474
2475         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2476         if (!lut) {
2477                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2478                 return -ENOMEM;
2479         }
2480
2481         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2482         if (ret)
2483                 goto out;
2484         for (i = 0; i < reta_size; i++) {
2485                 idx = i / RTE_RETA_GROUP_SIZE;
2486                 shift = i % RTE_RETA_GROUP_SIZE;
2487                 if (reta_conf[idx].mask & (1ULL << shift))
2488                         reta_conf[idx].reta[shift] = lut[i];
2489         }
2490
2491 out:
2492         rte_free(lut);
2493
2494         return ret;
2495 }
2496
2497 static int
2498 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2499 {
2500         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2501         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2502         int ret = 0;
2503
2504         if (!key || key_len == 0) {
2505                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2506                 return 0;
2507         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2508                 sizeof(uint32_t)) {
2509                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2510                 return -EINVAL;
2511         }
2512
2513         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2514                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2515                         (struct i40e_aqc_get_set_rss_key_data *)key;
2516
2517                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2518                 if (ret)
2519                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2520                                      "via AQ");
2521         } else {
2522                 uint32_t *hash_key = (uint32_t *)key;
2523                 uint16_t i;
2524
2525                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2526                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2527                 I40EVF_WRITE_FLUSH(hw);
2528         }
2529
2530         return ret;
2531 }
2532
2533 static int
2534 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2535 {
2536         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2537         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2538         int ret;
2539
2540         if (!key || !key_len)
2541                 return -EINVAL;
2542
2543         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2544                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2545                         (struct i40e_aqc_get_set_rss_key_data *)key);
2546                 if (ret) {
2547                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2548                         return ret;
2549                 }
2550         } else {
2551                 uint32_t *key_dw = (uint32_t *)key;
2552                 uint16_t i;
2553
2554                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2555                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2556         }
2557         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2558
2559         return 0;
2560 }
2561
2562 static int
2563 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2564 {
2565         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2566         uint64_t rss_hf, hena;
2567         int ret;
2568
2569         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2570                                  rss_conf->rss_key_len);
2571         if (ret)
2572                 return ret;
2573
2574         rss_hf = rss_conf->rss_hf;
2575         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2576         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2577         if (hw->mac.type == I40E_MAC_X722)
2578                 hena &= ~I40E_RSS_HENA_ALL_X722;
2579         else
2580                 hena &= ~I40E_RSS_HENA_ALL;
2581         hena |= i40e_config_hena(rss_hf, hw->mac.type);
2582         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2583         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2584         I40EVF_WRITE_FLUSH(hw);
2585
2586         return 0;
2587 }
2588
2589 static void
2590 i40evf_disable_rss(struct i40e_vf *vf)
2591 {
2592         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2593         uint64_t hena;
2594
2595         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2596         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2597         if (hw->mac.type == I40E_MAC_X722)
2598                 hena &= ~I40E_RSS_HENA_ALL_X722;
2599         else
2600                 hena &= ~I40E_RSS_HENA_ALL;
2601         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2602         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2603         I40EVF_WRITE_FLUSH(hw);
2604 }
2605
2606 static int
2607 i40evf_config_rss(struct i40e_vf *vf)
2608 {
2609         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2610         struct rte_eth_rss_conf rss_conf;
2611         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2612         uint16_t num;
2613
2614         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2615                 i40evf_disable_rss(vf);
2616                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2617                 return 0;
2618         }
2619
2620         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2621         /* Fill out the look up table */
2622         for (i = 0, j = 0; i < nb_q; i++, j++) {
2623                 if (j >= num)
2624                         j = 0;
2625                 lut = (lut << 8) | j;
2626                 if ((i & 3) == 3)
2627                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2628         }
2629
2630         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2631         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2632                 i40evf_disable_rss(vf);
2633                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2634                 return 0;
2635         }
2636
2637         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2638                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2639                 /* Calculate the default hash key */
2640                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2641                         rss_key_default[i] = (uint32_t)rte_rand();
2642                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2643                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2644                         sizeof(uint32_t);
2645         }
2646
2647         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2648 }
2649
2650 static int
2651 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2652                            struct rte_eth_rss_conf *rss_conf)
2653 {
2654         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2655         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2656         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2657         uint64_t hena;
2658
2659         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2660         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2661         if (!(hena & ((hw->mac.type == I40E_MAC_X722)
2662                  ? I40E_RSS_HENA_ALL_X722
2663                  : I40E_RSS_HENA_ALL))) { /* RSS disabled */
2664                 if (rss_hf != 0) /* Enable RSS */
2665                         return -EINVAL;
2666                 return 0;
2667         }
2668
2669         /* RSS enabled */
2670         if (rss_hf == 0) /* Disable RSS */
2671                 return -EINVAL;
2672
2673         return i40evf_hw_rss_hash_set(vf, rss_conf);
2674 }
2675
2676 static int
2677 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2678                              struct rte_eth_rss_conf *rss_conf)
2679 {
2680         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2681         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2682         uint64_t hena;
2683
2684         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2685                            &rss_conf->rss_key_len);
2686
2687         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2688         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2689         rss_conf->rss_hf = i40e_parse_hena(hena);
2690
2691         return 0;
2692 }
2693
2694 static int
2695 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2696 {
2697         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2698         struct rte_eth_dev_data *dev_data = vf->dev_data;
2699         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2700         int ret = 0;
2701
2702         /* check if mtu is within the allowed range */
2703         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2704                 return -EINVAL;
2705
2706         /* mtu setting is forbidden if port is start */
2707         if (dev_data->dev_started) {
2708                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2709                             dev_data->port_id);
2710                 return -EBUSY;
2711         }
2712
2713         if (frame_size > ETHER_MAX_LEN)
2714                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2715         else
2716                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2717
2718         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2719
2720         return ret;
2721 }
2722
2723 static void
2724 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2725                             struct ether_addr *mac_addr)
2726 {
2727         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2728
2729         if (!is_valid_assigned_ether_addr(mac_addr)) {
2730                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2731                 return;
2732         }
2733
2734         if (is_same_ether_addr(mac_addr, dev->data->mac_addrs))
2735                 return;
2736
2737         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2738                 return;
2739
2740         i40evf_del_mac_addr_by_addr(dev, dev->data->mac_addrs);
2741
2742         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2743 }