drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_ethdev_pci.h>
  59 #include <rte_malloc.h>
  60 #include <rte_dev.h>
  61
  62 #include "i40e_logs.h"
  63 #include "base/i40e_prototype.h"
  64 #include "base/i40e_adminq_cmd.h"
  65 #include "base/i40e_type.h"
  66
  67 #include "i40e_rxtx.h"
  68 #include "i40e_ethdev.h"
  69 #include "i40e_pf.h"
  70 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77
  78 struct i40evf_arq_msg_info {
  79         enum virtchnl_ops ops;
  80         enum i40e_status_code result;
  81         uint16_t buf_len;
  82         uint16_t msg_len;
  83         uint8_t *msg;
  84 };
  85
  86 struct vf_cmd_info {
  87         enum virtchnl_ops ops;
  88         uint8_t *in_args;
  89         uint32_t in_args_size;
  90         uint8_t *out_buffer;
  91         /* Input & output type. pass in buffer size and pass out
  92          * actual return result
  93          */
  94         uint32_t out_size;
  95 };
  96
  97 enum i40evf_aq_result {
  98         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  99         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 100         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 101         I40EVF_MSG_CMD,      /* Read async command result */
 102 };
 103
 104 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 105 static int i40evf_dev_start(struct rte_eth_dev *dev);
 106 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 107 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 108                                 struct rte_eth_dev_info *dev_info);
 109 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 110                                   int wait_to_complete);
 111 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 112                                 struct rte_eth_stats *stats);
 113 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 114                                  struct rte_eth_xstat *xstats, unsigned n);
 115 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
 116                                        struct rte_eth_xstat_name *xstats_names,
 117                                        unsigned limit);
 118 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
 119 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 120                                   uint16_t vlan_id, int on);
 121 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 122 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 123                                 int on);
 124 static void i40evf_dev_close(struct rte_eth_dev *dev);
 125 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 126 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 127 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 128 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 129 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 130 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 131                                      uint16_t rx_queue_id);
 132 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 133                                     uint16_t rx_queue_id);
 134 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 135                                      uint16_t tx_queue_id);
 136 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 137                                     uint16_t tx_queue_id);
 138 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 139                                struct ether_addr *addr,
 140                                uint32_t index,
 141                                uint32_t pool);
 142 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 143 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 144                         struct rte_eth_rss_reta_entry64 *reta_conf,
 145                         uint16_t reta_size);
 146 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 147                         struct rte_eth_rss_reta_entry64 *reta_conf,
 148                         uint16_t reta_size);
 149 static int i40evf_config_rss(struct i40e_vf *vf);
 150 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 151                                       struct rte_eth_rss_conf *rss_conf);
 152 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 153                                         struct rte_eth_rss_conf *rss_conf);
 154 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 155 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 156                                         struct ether_addr *mac_addr);
 157 static int
 158 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 159 static int
 160 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 161 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 162                                    uint8_t *msg,
 163                                    uint16_t msglen);
 164
 165 /* Default hash key buffer for RSS */
 166 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 167
 168 struct rte_i40evf_xstats_name_off {
 169         char name[RTE_ETH_XSTATS_NAME_SIZE];
 170         unsigned offset;
 171 };
 172
 173 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 174         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 175         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 176         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 177         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 178         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 179         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 180                 rx_unknown_protocol)},
 181         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 182         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 183         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 184         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 185         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 186         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 187 };
 188
 189 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 190                 sizeof(rte_i40evf_stats_strings[0]))
 191
 192 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 193         .dev_configure        = i40evf_dev_configure,
 194         .dev_start            = i40evf_dev_start,
 195         .dev_stop             = i40evf_dev_stop,
 196         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 197         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 198         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 199         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 200         .link_update          = i40evf_dev_link_update,
 201         .stats_get            = i40evf_dev_stats_get,
 202         .xstats_get           = i40evf_dev_xstats_get,
 203         .xstats_get_names     = i40evf_dev_xstats_get_names,
 204         .xstats_reset         = i40evf_dev_xstats_reset,
 205         .dev_close            = i40evf_dev_close,
 206         .dev_infos_get        = i40evf_dev_info_get,
 207         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 208         .vlan_filter_set      = i40evf_vlan_filter_set,
 209         .vlan_offload_set     = i40evf_vlan_offload_set,
 210         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 211         .rx_queue_start       = i40evf_dev_rx_queue_start,
 212         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 213         .tx_queue_start       = i40evf_dev_tx_queue_start,
 214         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 215         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 216         .rx_queue_release     = i40e_dev_rx_queue_release,
 217         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 218         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 219         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 220         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 221         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 222         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 223         .tx_queue_release     = i40e_dev_tx_queue_release,
 224         .rx_queue_count       = i40e_dev_rx_queue_count,
 225         .rxq_info_get         = i40e_rxq_info_get,
 226         .txq_info_get         = i40e_txq_info_get,
 227         .mac_addr_add         = i40evf_add_mac_addr,
 228         .mac_addr_remove      = i40evf_del_mac_addr,
 229         .reta_update          = i40evf_dev_rss_reta_update,
 230         .reta_query           = i40evf_dev_rss_reta_query,
 231         .rss_hash_update      = i40evf_dev_rss_hash_update,
 232         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 233         .mtu_set              = i40evf_dev_mtu_set,
 234         .mac_addr_set         = i40evf_set_default_mac_addr,
 235 };
 236
 237 /*
 238  * Read data in admin queue to get msg from pf driver
 239  */
 240 static enum i40evf_aq_result
 241 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 242 {
 243         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 244         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 245         struct i40e_arq_event_info event;
 246         enum virtchnl_ops opcode;
 247         enum i40e_status_code retval;
 248         int ret;
 249         enum i40evf_aq_result result = I40EVF_MSG_NON;
 250
 251         event.buf_len = data->buf_len;
 252         event.msg_buf = data->msg;
 253         ret = i40e_clean_arq_element(hw, &event, NULL);
 254         /* Can't read any msg from adminQ */
 255         if (ret) {
 256                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 257                         result = I40EVF_MSG_ERR;
 258                 return result;
 259         }
 260
 261         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 262         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 263         /* pf sys event */
 264         if (opcode == VIRTCHNL_OP_EVENT) {
 265                 struct virtchnl_pf_event *vpe =
 266                         (struct virtchnl_pf_event *)event.msg_buf;
 267
 268                 result = I40EVF_MSG_SYS;
 269                 switch (vpe->event) {
 270                 case VIRTCHNL_EVENT_LINK_CHANGE:
 271                         vf->link_up =
 272                                 vpe->event_data.link_event.link_status;
 273                         vf->link_speed =
 274                                 vpe->event_data.link_event.link_speed;
 275                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 276                         PMD_DRV_LOG(INFO, "Link status update:%s",
 277                                     vf->link_up ? "up" : "down");
 278                         break;
 279                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 280                         vf->vf_reset = true;
 281                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 282                         PMD_DRV_LOG(INFO, "vf is reseting");
 283                         break;
 284                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 285                         vf->dev_closed = true;
 286                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 287                         PMD_DRV_LOG(INFO, "PF driver closed");
 288                         break;
 289                 default:
 290                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 291                                     __func__, vpe->event);
 292                 }
 293         } else {
 294                 /* async reply msg on command issued by vf previously */
 295                 result = I40EVF_MSG_CMD;
 296                 /* Actual data length read from PF */
 297                 data->msg_len = event.msg_len;
 298         }
 299
 300         data->result = retval;
 301         data->ops = opcode;
 302
 303         return result;
 304 }
 305
 306 /**
 307  * clear current command. Only call in case execute
 308  * _atomic_set_cmd successfully.
 309  */
 310 static inline void
 311 _clear_cmd(struct i40e_vf *vf)
 312 {
 313         rte_wmb();
 314         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 315 }
 316
 317 /*
 318  * Check there is pending cmd in execution. If none, set new command.
 319  */
 320 static inline int
 321 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 322 {
 323         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 324                         VIRTCHNL_OP_UNKNOWN, ops);
 325
 326         if (!ret)
 327                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 328
 329         return !ret;
 330 }
 331
 332 #define MAX_TRY_TIMES 200
 333 #define ASQ_DELAY_MS  10
 334
 335 static int
 336 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 337 {
 338         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 339         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 340         struct i40evf_arq_msg_info info;
 341         enum i40evf_aq_result ret;
 342         int err, i = 0;
 343
 344         if (_atomic_set_cmd(vf, args->ops))
 345                 return -1;
 346
 347         info.msg = args->out_buffer;
 348         info.buf_len = args->out_size;
 349         info.ops = VIRTCHNL_OP_UNKNOWN;
 350         info.result = I40E_SUCCESS;
 351
 352         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 353                      args->in_args, args->in_args_size, NULL);
 354         if (err) {
 355                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 356                 _clear_cmd(vf);
 357                 return err;
 358         }
 359
 360         switch (args->ops) {
 361         case VIRTCHNL_OP_RESET_VF:
 362                 /*no need to process in this function */
 363                 err = 0;
 364                 break;
 365         case VIRTCHNL_OP_VERSION:
 366         case VIRTCHNL_OP_GET_VF_RESOURCES:
 367                 /* for init adminq commands, need to poll the response */
 368                 err = -1;
 369                 do {
 370                         ret = i40evf_read_pfmsg(dev, &info);
 371                         vf->cmd_retval = info.result;
 372                         if (ret == I40EVF_MSG_CMD) {
 373                                 err = 0;
 374                                 break;
 375                         } else if (ret == I40EVF_MSG_ERR)
 376                                 break;
 377                         rte_delay_ms(ASQ_DELAY_MS);
 378                         /* If don't read msg or read sys event, continue */
 379                 } while (i++ < MAX_TRY_TIMES);
 380                 _clear_cmd(vf);
 381                 break;
 382
 383         default:
 384                 /* for other adminq in running time, waiting the cmd done flag */
 385                 err = -1;
 386                 do {
 387                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 388                                 err = 0;
 389                                 break;
 390                         }
 391                         rte_delay_ms(ASQ_DELAY_MS);
 392                         /* If don't read msg or read sys event, continue */
 393                 } while (i++ < MAX_TRY_TIMES);
 394                 break;
 395         }
 396
 397         return err | vf->cmd_retval;
 398 }
 399
 400 /*
 401  * Check API version with sync wait until version read or fail from admin queue
 402  */
 403 static int
 404 i40evf_check_api_version(struct rte_eth_dev *dev)
 405 {
 406         struct virtchnl_version_info version, *pver;
 407         int err;
 408         struct vf_cmd_info args;
 409         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 410
 411         version.major = VIRTCHNL_VERSION_MAJOR;
 412         version.minor = VIRTCHNL_VERSION_MINOR;
 413
 414         args.ops = VIRTCHNL_OP_VERSION;
 415         args.in_args = (uint8_t *)&version;
 416         args.in_args_size = sizeof(version);
 417         args.out_buffer = vf->aq_resp;
 418         args.out_size = I40E_AQ_BUF_SZ;
 419
 420         err = i40evf_execute_vf_cmd(dev, &args);
 421         if (err) {
 422                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 423                 return err;
 424         }
 425
 426         pver = (struct virtchnl_version_info *)args.out_buffer;
 427         vf->version_major = pver->major;
 428         vf->version_minor = pver->minor;
 429         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 430                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 431         else if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 432                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 433                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 434         else {
 435                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 436                                         vf->version_major, vf->version_minor,
 437                                                 VIRTCHNL_VERSION_MAJOR,
 438                                                 VIRTCHNL_VERSION_MINOR);
 439                 return -1;
 440         }
 441
 442         return 0;
 443 }
 444
 445 static int
 446 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 447 {
 448         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 449         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 450         int err;
 451         struct vf_cmd_info args;
 452         uint32_t caps, len;
 453
 454         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 455         args.out_buffer = vf->aq_resp;
 456         args.out_size = I40E_AQ_BUF_SZ;
 457         if (PF_IS_V11(vf)) {
 458                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 459                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 460                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 461                        VIRTCHNL_VF_OFFLOAD_VLAN |
 462                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 463                 args.in_args = (uint8_t *)&caps;
 464                 args.in_args_size = sizeof(caps);
 465         } else {
 466                 args.in_args = NULL;
 467                 args.in_args_size = 0;
 468         }
 469         err = i40evf_execute_vf_cmd(dev, &args);
 470
 471         if (err) {
 472                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 473                 return err;
 474         }
 475
 476         len =  sizeof(struct virtchnl_vf_resource) +
 477                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 478
 479         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 480                         RTE_MIN(args.out_size, len));
 481         i40e_vf_parse_hw_config(hw, vf->vf_res);
 482
 483         return 0;
 484 }
 485
 486 static int
 487 i40evf_config_promisc(struct rte_eth_dev *dev,
 488                       bool enable_unicast,
 489                       bool enable_multicast)
 490 {
 491         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 492         int err;
 493         struct vf_cmd_info args;
 494         struct virtchnl_promisc_info promisc;
 495
 496         promisc.flags = 0;
 497         promisc.vsi_id = vf->vsi_res->vsi_id;
 498
 499         if (enable_unicast)
 500                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 501
 502         if (enable_multicast)
 503                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 504
 505         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 506         args.in_args = (uint8_t *)&promisc;
 507         args.in_args_size = sizeof(promisc);
 508         args.out_buffer = vf->aq_resp;
 509         args.out_size = I40E_AQ_BUF_SZ;
 510
 511         err = i40evf_execute_vf_cmd(dev, &args);
 512
 513         if (err)
 514                 PMD_DRV_LOG(ERR, "fail to execute command "
 515                             "CONFIG_PROMISCUOUS_MODE");
 516         return err;
 517 }
 518
 519 static int
 520 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 521 {
 522         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 523         struct vf_cmd_info args;
 524         int ret;
 525
 526         memset(&args, 0, sizeof(args));
 527         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 528         args.in_args = NULL;
 529         args.in_args_size = 0;
 530         args.out_buffer = vf->aq_resp;
 531         args.out_size = I40E_AQ_BUF_SZ;
 532         ret = i40evf_execute_vf_cmd(dev, &args);
 533         if (ret)
 534                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 535                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 536
 537         return ret;
 538 }
 539
 540 static int
 541 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 542 {
 543         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 544         struct vf_cmd_info args;
 545         int ret;
 546
 547         memset(&args, 0, sizeof(args));
 548         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 549         args.in_args = NULL;
 550         args.in_args_size = 0;
 551         args.out_buffer = vf->aq_resp;
 552         args.out_size = I40E_AQ_BUF_SZ;
 553         ret = i40evf_execute_vf_cmd(dev, &args);
 554         if (ret)
 555                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 556                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 557
 558         return ret;
 559 }
 560
 561 static int
 562 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 563                                 struct i40e_vsi_vlan_pvid_info *info)
 564 {
 565         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 566         int err;
 567         struct vf_cmd_info args;
 568         struct virtchnl_pvid_info tpid_info;
 569
 570         if (info == NULL) {
 571                 PMD_DRV_LOG(ERR, "invalid parameters");
 572                 return I40E_ERR_PARAM;
 573         }
 574
 575         memset(&tpid_info, 0, sizeof(tpid_info));
 576         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 577         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 578
 579         args.ops = (enum virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 580         args.in_args = (uint8_t *)&tpid_info;
 581         args.in_args_size = sizeof(tpid_info);
 582         args.out_buffer = vf->aq_resp;
 583         args.out_size = I40E_AQ_BUF_SZ;
 584
 585         err = i40evf_execute_vf_cmd(dev, &args);
 586         if (err)
 587                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 588
 589         return err;
 590 }
 591
 592 static void
 593 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 594                                   uint16_t vsi_id,
 595                                   uint16_t queue_id,
 596                                   uint16_t nb_txq,
 597                                   struct i40e_tx_queue *txq)
 598 {
 599         txq_info->vsi_id = vsi_id;
 600         txq_info->queue_id = queue_id;
 601         if (queue_id < nb_txq) {
 602                 txq_info->ring_len = txq->nb_tx_desc;
 603                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 604         }
 605 }
 606
 607 static void
 608 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 609                                   uint16_t vsi_id,
 610                                   uint16_t queue_id,
 611                                   uint16_t nb_rxq,
 612                                   uint32_t max_pkt_size,
 613                                   struct i40e_rx_queue *rxq)
 614 {
 615         rxq_info->vsi_id = vsi_id;
 616         rxq_info->queue_id = queue_id;
 617         rxq_info->max_pkt_size = max_pkt_size;
 618         if (queue_id < nb_rxq) {
 619                 rxq_info->ring_len = rxq->nb_rx_desc;
 620                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 621                 rxq_info->databuffer_size =
 622                         (rte_pktmbuf_data_room_size(rxq->mp) -
 623                                 RTE_PKTMBUF_HEADROOM);
 624         }
 625 }
 626
 627 /* It configures VSI queues to co-work with Linux PF host */
 628 static int
 629 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 630 {
 631         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 632         struct i40e_rx_queue **rxq =
 633                 (struct i40e_rx_queue **)dev->data->rx_queues;
 634         struct i40e_tx_queue **txq =
 635                 (struct i40e_tx_queue **)dev->data->tx_queues;
 636         struct virtchnl_vsi_queue_config_info *vc_vqci;
 637         struct virtchnl_queue_pair_info *vc_qpi;
 638         struct vf_cmd_info args;
 639         uint16_t i, nb_qp = vf->num_queue_pairs;
 640         const uint32_t size =
 641                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 642         uint8_t buff[size];
 643         int ret;
 644
 645         memset(buff, 0, sizeof(buff));
 646         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 647         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 648         vc_vqci->num_queue_pairs = nb_qp;
 649
 650         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 651                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 652                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 653                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 654                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 655                                         vf->max_pkt_len, rxq[i]);
 656         }
 657         memset(&args, 0, sizeof(args));
 658         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 659         args.in_args = (uint8_t *)vc_vqci;
 660         args.in_args_size = size;
 661         args.out_buffer = vf->aq_resp;
 662         args.out_size = I40E_AQ_BUF_SZ;
 663         ret = i40evf_execute_vf_cmd(dev, &args);
 664         if (ret)
 665                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 666                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 667
 668         return ret;
 669 }
 670
 671 /* It configures VSI queues to co-work with DPDK PF host */
 672 static int
 673 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 674 {
 675         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 676         struct i40e_rx_queue **rxq =
 677                 (struct i40e_rx_queue **)dev->data->rx_queues;
 678         struct i40e_tx_queue **txq =
 679                 (struct i40e_tx_queue **)dev->data->tx_queues;
 680         struct virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 681         struct virtchnl_queue_pair_ext_info *vc_qpei;
 682         struct vf_cmd_info args;
 683         uint16_t i, nb_qp = vf->num_queue_pairs;
 684         const uint32_t size =
 685                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 686         uint8_t buff[size];
 687         int ret;
 688
 689         memset(buff, 0, sizeof(buff));
 690         vc_vqcei = (struct virtchnl_vsi_queue_config_ext_info *)buff;
 691         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 692         vc_vqcei->num_queue_pairs = nb_qp;
 693         vc_qpei = vc_vqcei->qpair;
 694         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 695                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 696                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 697                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 698                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 699                                         vf->max_pkt_len, rxq[i]);
 700                 if (i < dev->data->nb_rx_queues)
 701                         /*
 702                          * It adds extra info for configuring VSI queues, which
 703                          * is needed to enable the configurable crc stripping
 704                          * in VF.
 705                          */
 706                         vc_qpei->rxq_ext.crcstrip =
 707                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 708         }
 709         memset(&args, 0, sizeof(args));
 710         args.ops =
 711                 (enum virtchnl_ops)VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 712         args.in_args = (uint8_t *)vc_vqcei;
 713         args.in_args_size = size;
 714         args.out_buffer = vf->aq_resp;
 715         args.out_size = I40E_AQ_BUF_SZ;
 716         ret = i40evf_execute_vf_cmd(dev, &args);
 717         if (ret)
 718                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 719                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT");
 720
 721         return ret;
 722 }
 723
 724 static int
 725 i40evf_configure_queues(struct rte_eth_dev *dev)
 726 {
 727         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 728
 729         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 730                 /* To support DPDK PF host */
 731                 return i40evf_configure_vsi_queues_ext(dev);
 732         else
 733                 /* To support Linux PF host */
 734                 return i40evf_configure_vsi_queues(dev);
 735 }
 736
 737 static int
 738 i40evf_config_irq_map(struct rte_eth_dev *dev)
 739 {
 740         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 741         struct vf_cmd_info args;
 742         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 743                 sizeof(struct virtchnl_vector_map)];
 744         struct virtchnl_irq_map_info *map_info;
 745         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 746         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 747         uint32_t vector_id;
 748         int i, err;
 749
 750         if (rte_intr_allow_others(intr_handle)) {
 751                 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 752                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 753                 else
 754                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 755         } else {
 756                 vector_id = I40E_MISC_VEC_ID;
 757         }
 758
 759         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 760         map_info->num_vectors = 1;
 761         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 762         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 763         /* Alway use default dynamic MSIX interrupt */
 764         map_info->vecmap[0].vector_id = vector_id;
 765         /* Don't map any tx queue */
 766         map_info->vecmap[0].txq_map = 0;
 767         map_info->vecmap[0].rxq_map = 0;
 768         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 769                 map_info->vecmap[0].rxq_map |= 1 << i;
 770                 if (rte_intr_dp_is_en(intr_handle))
 771                         intr_handle->intr_vec[i] = vector_id;
 772         }
 773
 774         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 775         args.in_args = (u8 *)cmd_buffer;
 776         args.in_args_size = sizeof(cmd_buffer);
 777         args.out_buffer = vf->aq_resp;
 778         args.out_size = I40E_AQ_BUF_SZ;
 779         err = i40evf_execute_vf_cmd(dev, &args);
 780         if (err)
 781                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 782
 783         return err;
 784 }
 785
 786 static int
 787 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 788                                 bool on)
 789 {
 790         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 791         struct virtchnl_queue_select queue_select;
 792         int err;
 793         struct vf_cmd_info args;
 794         memset(&queue_select, 0, sizeof(queue_select));
 795         queue_select.vsi_id = vf->vsi_res->vsi_id;
 796
 797         if (isrx)
 798                 queue_select.rx_queues |= 1 << qid;
 799         else
 800                 queue_select.tx_queues |= 1 << qid;
 801
 802         if (on)
 803                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 804         else
 805                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 806         args.in_args = (u8 *)&queue_select;
 807         args.in_args_size = sizeof(queue_select);
 808         args.out_buffer = vf->aq_resp;
 809         args.out_size = I40E_AQ_BUF_SZ;
 810         err = i40evf_execute_vf_cmd(dev, &args);
 811         if (err)
 812                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 813                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 814
 815         return err;
 816 }
 817
 818 static int
 819 i40evf_start_queues(struct rte_eth_dev *dev)
 820 {
 821         struct rte_eth_dev_data *dev_data = dev->data;
 822         int i;
 823         struct i40e_rx_queue *rxq;
 824         struct i40e_tx_queue *txq;
 825
 826         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 827                 rxq = dev_data->rx_queues[i];
 828                 if (rxq->rx_deferred_start)
 829                         continue;
 830                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 831                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 832                         return -1;
 833                 }
 834         }
 835
 836         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 837                 txq = dev_data->tx_queues[i];
 838                 if (txq->tx_deferred_start)
 839                         continue;
 840                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 841                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 842                         return -1;
 843                 }
 844         }
 845
 846         return 0;
 847 }
 848
 849 static int
 850 i40evf_stop_queues(struct rte_eth_dev *dev)
 851 {
 852         int i;
 853
 854         /* Stop TX queues first */
 855         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 856                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 857                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 858                         return -1;
 859                 }
 860         }
 861
 862         /* Then stop RX queues */
 863         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 864                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 865                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 866                         return -1;
 867                 }
 868         }
 869
 870         return 0;
 871 }
 872
 873 static int
 874 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 875                     struct ether_addr *addr,
 876                     __rte_unused uint32_t index,
 877                     __rte_unused uint32_t pool)
 878 {
 879         struct virtchnl_ether_addr_list *list;
 880         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 881         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 882                         sizeof(struct virtchnl_ether_addr)];
 883         int err;
 884         struct vf_cmd_info args;
 885
 886         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 887                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 888                             addr->addr_bytes[0], addr->addr_bytes[1],
 889                             addr->addr_bytes[2], addr->addr_bytes[3],
 890                             addr->addr_bytes[4], addr->addr_bytes[5]);
 891                 return I40E_ERR_INVALID_MAC_ADDR;
 892         }
 893
 894         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 895         list->vsi_id = vf->vsi_res->vsi_id;
 896         list->num_elements = 1;
 897         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 898                                         sizeof(addr->addr_bytes));
 899
 900         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 901         args.in_args = cmd_buffer;
 902         args.in_args_size = sizeof(cmd_buffer);
 903         args.out_buffer = vf->aq_resp;
 904         args.out_size = I40E_AQ_BUF_SZ;
 905         err = i40evf_execute_vf_cmd(dev, &args);
 906         if (err)
 907                 PMD_DRV_LOG(ERR, "fail to execute command "
 908                             "OP_ADD_ETHER_ADDRESS");
 909
 910         return err;
 911 }
 912
 913 static void
 914 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 915                             struct ether_addr *addr)
 916 {
 917         struct virtchnl_ether_addr_list *list;
 918         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 919         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 920                         sizeof(struct virtchnl_ether_addr)];
 921         int err;
 922         struct vf_cmd_info args;
 923
 924         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 925                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 926                             addr->addr_bytes[0], addr->addr_bytes[1],
 927                             addr->addr_bytes[2], addr->addr_bytes[3],
 928                             addr->addr_bytes[4], addr->addr_bytes[5]);
 929                 return;
 930         }
 931
 932         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 933         list->vsi_id = vf->vsi_res->vsi_id;
 934         list->num_elements = 1;
 935         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 936                         sizeof(addr->addr_bytes));
 937
 938         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 939         args.in_args = cmd_buffer;
 940         args.in_args_size = sizeof(cmd_buffer);
 941         args.out_buffer = vf->aq_resp;
 942         args.out_size = I40E_AQ_BUF_SZ;
 943         err = i40evf_execute_vf_cmd(dev, &args);
 944         if (err)
 945                 PMD_DRV_LOG(ERR, "fail to execute command "
 946                             "OP_DEL_ETHER_ADDRESS");
 947         return;
 948 }
 949
 950 static void
 951 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 952 {
 953         struct rte_eth_dev_data *data = dev->data;
 954         struct ether_addr *addr;
 955
 956         addr = &data->mac_addrs[index];
 957
 958         i40evf_del_mac_addr_by_addr(dev, addr);
 959 }
 960
 961 static int
 962 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 963 {
 964         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 965         struct virtchnl_queue_select q_stats;
 966         int err;
 967         struct vf_cmd_info args;
 968
 969         memset(&q_stats, 0, sizeof(q_stats));
 970         q_stats.vsi_id = vf->vsi_res->vsi_id;
 971         args.ops = VIRTCHNL_OP_GET_STATS;
 972         args.in_args = (u8 *)&q_stats;
 973         args.in_args_size = sizeof(q_stats);
 974         args.out_buffer = vf->aq_resp;
 975         args.out_size = I40E_AQ_BUF_SZ;
 976
 977         err = i40evf_execute_vf_cmd(dev, &args);
 978         if (err) {
 979                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 980                 *pstats = NULL;
 981                 return err;
 982         }
 983         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 984         return 0;
 985 }
 986
 987 static int
 988 i40evf_get_statistics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 989 {
 990         int ret;
 991         struct i40e_eth_stats *pstats = NULL;
 992
 993         ret = i40evf_update_stats(dev, &pstats);
 994         if (ret != 0)
 995                 return 0;
 996
 997         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
 998                                                 pstats->rx_broadcast;
 999         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
1000                                                 pstats->tx_unicast;
1001         stats->imissed = pstats->rx_discards;
1002         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
1003         stats->ibytes = pstats->rx_bytes;
1004         stats->obytes = pstats->tx_bytes;
1005
1006         return 0;
1007 }
1008
1009 static void
1010 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
1011 {
1012         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1013         struct i40e_eth_stats *pstats = NULL;
1014
1015         /* read stat values to clear hardware registers */
1016         i40evf_update_stats(dev, &pstats);
1017
1018         /* set stats offset base on current values */
1019         vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
1020 }
1021
1022 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1023                                       struct rte_eth_xstat_name *xstats_names,
1024                                       __rte_unused unsigned limit)
1025 {
1026         unsigned i;
1027
1028         if (xstats_names != NULL)
1029                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1030                         snprintf(xstats_names[i].name,
1031                                 sizeof(xstats_names[i].name),
1032                                 "%s", rte_i40evf_stats_strings[i].name);
1033                 }
1034         return I40EVF_NB_XSTATS;
1035 }
1036
1037 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1038                                  struct rte_eth_xstat *xstats, unsigned n)
1039 {
1040         int ret;
1041         unsigned i;
1042         struct i40e_eth_stats *pstats = NULL;
1043
1044         if (n < I40EVF_NB_XSTATS)
1045                 return I40EVF_NB_XSTATS;
1046
1047         ret = i40evf_update_stats(dev, &pstats);
1048         if (ret != 0)
1049                 return 0;
1050
1051         if (!xstats)
1052                 return 0;
1053
1054         /* loop over xstats array and values from pstats */
1055         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1056                 xstats[i].id = i;
1057                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1058                         rte_i40evf_stats_strings[i].offset);
1059         }
1060
1061         return I40EVF_NB_XSTATS;
1062 }
1063
1064 static int
1065 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1066 {
1067         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1068         struct virtchnl_vlan_filter_list *vlan_list;
1069         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1070                                                         sizeof(uint16_t)];
1071         int err;
1072         struct vf_cmd_info args;
1073
1074         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1075         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1076         vlan_list->num_elements = 1;
1077         vlan_list->vlan_id[0] = vlanid;
1078
1079         args.ops = VIRTCHNL_OP_ADD_VLAN;
1080         args.in_args = (u8 *)&cmd_buffer;
1081         args.in_args_size = sizeof(cmd_buffer);
1082         args.out_buffer = vf->aq_resp;
1083         args.out_size = I40E_AQ_BUF_SZ;
1084         err = i40evf_execute_vf_cmd(dev, &args);
1085         if (err)
1086                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1087
1088         return err;
1089 }
1090
1091 static int
1092 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1093 {
1094         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1095         struct virtchnl_vlan_filter_list *vlan_list;
1096         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1097                                                         sizeof(uint16_t)];
1098         int err;
1099         struct vf_cmd_info args;
1100
1101         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1102         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1103         vlan_list->num_elements = 1;
1104         vlan_list->vlan_id[0] = vlanid;
1105
1106         args.ops = VIRTCHNL_OP_DEL_VLAN;
1107         args.in_args = (u8 *)&cmd_buffer;
1108         args.in_args_size = sizeof(cmd_buffer);
1109         args.out_buffer = vf->aq_resp;
1110         args.out_size = I40E_AQ_BUF_SZ;
1111         err = i40evf_execute_vf_cmd(dev, &args);
1112         if (err)
1113                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1114
1115         return err;
1116 }
1117
1118 static const struct rte_pci_id pci_id_i40evf_map[] = {
1119         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1120         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1121         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1122         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1123         { .vendor_id = 0, /* sentinel */ },
1124 };
1125
1126 static inline int
1127 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1128                                     struct rte_eth_link *link)
1129 {
1130         struct rte_eth_link *dst = &(dev->data->dev_link);
1131         struct rte_eth_link *src = link;
1132
1133         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1134                                         *(uint64_t *)src) == 0)
1135                 return -1;
1136
1137         return 0;
1138 }
1139
1140 /* Disable IRQ0 */
1141 static inline void
1142 i40evf_disable_irq0(struct i40e_hw *hw)
1143 {
1144         /* Disable all interrupt types */
1145         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1146         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1147                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1148         I40EVF_WRITE_FLUSH(hw);
1149 }
1150
1151 /* Enable IRQ0 */
1152 static inline void
1153 i40evf_enable_irq0(struct i40e_hw *hw)
1154 {
1155         /* Enable admin queue interrupt trigger */
1156         uint32_t val;
1157
1158         i40evf_disable_irq0(hw);
1159         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1160         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1161                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1162         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1163
1164         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1165                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1166                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1167                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1168
1169         I40EVF_WRITE_FLUSH(hw);
1170 }
1171
1172 static int
1173 i40evf_reset_vf(struct i40e_hw *hw)
1174 {
1175         int i, reset;
1176
1177         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1178                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1179                 return -1;
1180         }
1181         /**
1182           * After issuing vf reset command to pf, pf won't necessarily
1183           * reset vf, it depends on what state it exactly is. If it's not
1184           * initialized yet, it won't have vf reset since it's in a certain
1185           * state. If not, it will try to reset. Even vf is reset, pf will
1186           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1187           * it to ACTIVE. In this duration, vf may not catch the moment that
1188           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1189           */
1190         rte_delay_ms(200);
1191
1192         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1193                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1194                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1195                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1196                 if (VIRTCHNL_VFR_COMPLETED == reset || VIRTCHNL_VFR_VFACTIVE == reset)
1197                         break;
1198                 else
1199                         rte_delay_ms(50);
1200         }
1201
1202         if (i >= MAX_RESET_WAIT_CNT) {
1203                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1204                 return -1;
1205         }
1206
1207         return 0;
1208 }
1209
1210 static int
1211 i40evf_init_vf(struct rte_eth_dev *dev)
1212 {
1213         int i, err, bufsz;
1214         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1215         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1216         uint16_t interval =
1217                 i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
1218
1219         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1220         vf->dev_data = dev->data;
1221         err = i40e_set_mac_type(hw);
1222         if (err) {
1223                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1224                 goto err;
1225         }
1226
1227         i40e_init_adminq_parameter(hw);
1228         err = i40e_init_adminq(hw);
1229         if (err) {
1230                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1231                 goto err;
1232         }
1233
1234         /* Reset VF and wait until it's complete */
1235         if (i40evf_reset_vf(hw)) {
1236                 PMD_INIT_LOG(ERR, "reset NIC failed");
1237                 goto err_aq;
1238         }
1239
1240         /* VF reset, shutdown admin queue and initialize again */
1241         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1242                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1243                 return -1;
1244         }
1245
1246         i40e_init_adminq_parameter(hw);
1247         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1248                 PMD_INIT_LOG(ERR, "init_adminq failed");
1249                 return -1;
1250         }
1251         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1252         if (!vf->aq_resp) {
1253                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1254                         goto err_aq;
1255         }
1256         if (i40evf_check_api_version(dev) != 0) {
1257                 PMD_INIT_LOG(ERR, "check_api version failed");
1258                 goto err_aq;
1259         }
1260         bufsz = sizeof(struct virtchnl_vf_resource) +
1261                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1262         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1263         if (!vf->vf_res) {
1264                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1265                         goto err_aq;
1266         }
1267
1268         if (i40evf_get_vf_resource(dev) != 0) {
1269                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1270                 goto err_alloc;
1271         }
1272
1273         /* got VF config message back from PF, now we can parse it */
1274         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1275                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1276                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1277         }
1278
1279         if (!vf->vsi_res) {
1280                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1281                 goto err_alloc;
1282         }
1283
1284         if (hw->mac.type == I40E_MAC_X722_VF)
1285                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1286         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1287         vf->vsi.type = (enum i40e_vsi_type)vf->vsi_res->vsi_type;
1288         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1289         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1290
1291         /* Store the MAC address configured by host, or generate random one */
1292         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1293                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1294         else
1295                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1296
1297         /* If the PF host is not DPDK, set the interval of ITR0 to max*/
1298         if (vf->version_major != I40E_DPDK_VERSION_MAJOR) {
1299                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1300                                (I40E_ITR_INDEX_DEFAULT <<
1301                                 I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1302                                (interval <<
1303                                 I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1304                 I40EVF_WRITE_FLUSH(hw);
1305         }
1306
1307         return 0;
1308
1309 err_alloc:
1310         rte_free(vf->vf_res);
1311 err_aq:
1312         i40e_shutdown_adminq(hw); /* ignore error */
1313 err:
1314         return -1;
1315 }
1316
1317 static int
1318 i40evf_uninit_vf(struct rte_eth_dev *dev)
1319 {
1320         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1321         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1322
1323         PMD_INIT_FUNC_TRACE();
1324
1325         if (hw->adapter_stopped == 0)
1326                 i40evf_dev_close(dev);
1327         rte_free(vf->vf_res);
1328         vf->vf_res = NULL;
1329         rte_free(vf->aq_resp);
1330         vf->aq_resp = NULL;
1331
1332         return 0;
1333 }
1334
1335 static void
1336 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1337                 __rte_unused uint16_t msglen)
1338 {
1339         struct virtchnl_pf_event *pf_msg =
1340                         (struct virtchnl_pf_event *)msg;
1341         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1342
1343         switch (pf_msg->event) {
1344         case VIRTCHNL_EVENT_RESET_IMPENDING:
1345                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1346                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1347                                               NULL, NULL);
1348                 break;
1349         case VIRTCHNL_EVENT_LINK_CHANGE:
1350                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1351                 vf->link_up = pf_msg->event_data.link_event.link_status;
1352                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1353                 break;
1354         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1355                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1356                 break;
1357         default:
1358                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1359                 break;
1360         }
1361 }
1362
1363 static void
1364 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1365 {
1366         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1367         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1368         struct i40e_arq_event_info info;
1369         uint16_t pending, aq_opc;
1370         enum virtchnl_ops msg_opc;
1371         enum i40e_status_code msg_ret;
1372         int ret;
1373
1374         info.buf_len = I40E_AQ_BUF_SZ;
1375         if (!vf->aq_resp) {
1376                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1377                 return;
1378         }
1379         info.msg_buf = vf->aq_resp;
1380
1381         pending = 1;
1382         while (pending) {
1383                 ret = i40e_clean_arq_element(hw, &info, &pending);
1384
1385                 if (ret != I40E_SUCCESS) {
1386                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1387                                     "ret: %d", ret);
1388                         break;
1389                 }
1390                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1391                 /* For the message sent from pf to vf, opcode is stored in
1392                  * cookie_high of struct i40e_aq_desc, while return error code
1393                  * are stored in cookie_low, Which is done by
1394                  * i40e_aq_send_msg_to_vf in PF driver.*/
1395                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1396                                                   info.desc.cookie_high);
1397                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1398                                                   info.desc.cookie_low);
1399                 switch (aq_opc) {
1400                 case i40e_aqc_opc_send_msg_to_vf:
1401                         if (msg_opc == VIRTCHNL_OP_EVENT)
1402                                 /* process event*/
1403                                 i40evf_handle_pf_event(dev, info.msg_buf,
1404                                                        info.msg_len);
1405                         else {
1406                                 /* read message and it's expected one */
1407                                 if (msg_opc == vf->pend_cmd) {
1408                                         vf->cmd_retval = msg_ret;
1409                                         /* prevent compiler reordering */
1410                                         rte_compiler_barrier();
1411                                         _clear_cmd(vf);
1412                                 } else
1413                                         PMD_DRV_LOG(ERR, "command mismatch,"
1414                                                 "expect %u, get %u",
1415                                                 vf->pend_cmd, msg_opc);
1416                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1417                                              " opcode = %d", msg_opc);
1418                         }
1419                         break;
1420                 default:
1421                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1422                                     aq_opc);
1423                         break;
1424                 }
1425         }
1426 }
1427
1428 /**
1429  * Interrupt handler triggered by NIC  for handling
1430  * specific interrupt. Only adminq interrupt is processed in VF.
1431  *
1432  * @param handle
1433  *  Pointer to interrupt handle.
1434  * @param param
1435  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1436  *
1437  * @return
1438  *  void
1439  */
1440 static void
1441 i40evf_dev_interrupt_handler(void *param)
1442 {
1443         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1444         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1445         uint32_t icr0;
1446
1447         i40evf_disable_irq0(hw);
1448
1449         /* read out interrupt causes */
1450         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1451
1452         /* No interrupt event indicated */
1453         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1454                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1455                 goto done;
1456         }
1457
1458         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1459                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1460                 i40evf_handle_aq_msg(dev);
1461         }
1462
1463         /* Link Status Change interrupt */
1464         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1465                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1466                                    " do nothing");
1467
1468 done:
1469         i40evf_enable_irq0(hw);
1470         rte_intr_enable(dev->intr_handle);
1471 }
1472
1473 static int
1474 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1475 {
1476         struct i40e_hw *hw
1477                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1478         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1479
1480         PMD_INIT_FUNC_TRACE();
1481
1482         /* assign ops func pointer */
1483         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1484         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1485         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1486
1487         /*
1488          * For secondary processes, we don't initialise any further as primary
1489          * has already done this work.
1490          */
1491         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1492                 i40e_set_rx_function(eth_dev);
1493                 i40e_set_tx_function(eth_dev);
1494                 return 0;
1495         }
1496         i40e_set_default_ptype_table(eth_dev);
1497         rte_eth_copy_pci_info(eth_dev, pci_dev);
1498         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1499
1500         hw->vendor_id = pci_dev->id.vendor_id;
1501         hw->device_id = pci_dev->id.device_id;
1502         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1503         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1504         hw->bus.device = pci_dev->addr.devid;
1505         hw->bus.func = pci_dev->addr.function;
1506         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1507         hw->adapter_stopped = 0;
1508
1509         if(i40evf_init_vf(eth_dev) != 0) {
1510                 PMD_INIT_LOG(ERR, "Init vf failed");
1511                 return -1;
1512         }
1513
1514         /* register callback func to eal lib */
1515         rte_intr_callback_register(&pci_dev->intr_handle,
1516                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1517
1518         /* enable uio intr after callback register */
1519         rte_intr_enable(&pci_dev->intr_handle);
1520
1521         /* configure and enable device interrupt */
1522         i40evf_enable_irq0(hw);
1523
1524         /* copy mac addr */
1525         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1526                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1527                                         0);
1528         if (eth_dev->data->mac_addrs == NULL) {
1529                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1530                                 " store MAC addresses",
1531                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1532                 return -ENOMEM;
1533         }
1534         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1535                         &eth_dev->data->mac_addrs[0]);
1536
1537         return 0;
1538 }
1539
1540 static int
1541 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1542 {
1543         PMD_INIT_FUNC_TRACE();
1544
1545         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1546                 return -EPERM;
1547
1548         eth_dev->dev_ops = NULL;
1549         eth_dev->rx_pkt_burst = NULL;
1550         eth_dev->tx_pkt_burst = NULL;
1551
1552         if (i40evf_uninit_vf(eth_dev) != 0) {
1553                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1554                 return -1;
1555         }
1556
1557         rte_free(eth_dev->data->mac_addrs);
1558         eth_dev->data->mac_addrs = NULL;
1559
1560         return 0;
1561 }
1562
1563 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1564         struct rte_pci_device *pci_dev)
1565 {
1566         return rte_eth_dev_pci_generic_probe(pci_dev,
1567                 sizeof(struct i40e_adapter), i40evf_dev_init);
1568 }
1569
1570 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1571 {
1572         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1573 }
1574
1575 /*
1576  * virtual function driver struct
1577  */
1578 static struct rte_pci_driver rte_i40evf_pmd = {
1579         .id_table = pci_id_i40evf_map,
1580         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1581         .probe = eth_i40evf_pci_probe,
1582         .remove = eth_i40evf_pci_remove,
1583 };
1584
1585 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1586 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1587 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1588
1589 static int
1590 i40evf_dev_configure(struct rte_eth_dev *dev)
1591 {
1592         struct i40e_adapter *ad =
1593                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1594         struct rte_eth_conf *conf = &dev->data->dev_conf;
1595         struct i40e_vf *vf;
1596
1597         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1598          * allocation or vector Rx preconditions we will reset it.
1599          */
1600         ad->rx_bulk_alloc_allowed = true;
1601         ad->rx_vec_allowed = true;
1602         ad->tx_simple_allowed = true;
1603         ad->tx_vec_allowed = true;
1604
1605         /* For non-DPDK PF drivers, VF has no ability to disable HW
1606          * CRC strip, and is implicitly enabled by the PF.
1607          */
1608         if (!conf->rxmode.hw_strip_crc) {
1609                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1610                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1611                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1612                         /* Peer is running non-DPDK PF driver. */
1613                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1614                         return -EINVAL;
1615                 }
1616         }
1617
1618         return i40evf_init_vlan(dev);
1619 }
1620
1621 static int
1622 i40evf_init_vlan(struct rte_eth_dev *dev)
1623 {
1624         struct rte_eth_dev_data *data = dev->data;
1625         int ret;
1626
1627         /* Apply vlan offload setting */
1628         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1629
1630         /* Apply pvid setting */
1631         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1632                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1633         return ret;
1634 }
1635
1636 static void
1637 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1638 {
1639         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1640
1641         /* Vlan stripping setting */
1642         if (mask & ETH_VLAN_STRIP_MASK) {
1643                 /* Enable or disable VLAN stripping */
1644                 if (dev_conf->rxmode.hw_vlan_strip)
1645                         i40evf_enable_vlan_strip(dev);
1646                 else
1647                         i40evf_disable_vlan_strip(dev);
1648         }
1649 }
1650
1651 static int
1652 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1653 {
1654         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1655         struct i40e_vsi_vlan_pvid_info info;
1656         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1657
1658         memset(&info, 0, sizeof(info));
1659         info.on = on;
1660
1661         /* Linux pf host don't support vlan offload yet */
1662         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1663                 if (info.on)
1664                         info.config.pvid = pvid;
1665                 else {
1666                         info.config.reject.tagged =
1667                                 dev_conf->txmode.hw_vlan_reject_tagged;
1668                         info.config.reject.untagged =
1669                                 dev_conf->txmode.hw_vlan_reject_untagged;
1670                 }
1671                 return i40evf_config_vlan_pvid(dev, &info);
1672         }
1673
1674         return 0;
1675 }
1676
1677 static int
1678 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1679 {
1680         struct i40e_rx_queue *rxq;
1681         int err = 0;
1682         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1683
1684         PMD_INIT_FUNC_TRACE();
1685
1686         if (rx_queue_id < dev->data->nb_rx_queues) {
1687                 rxq = dev->data->rx_queues[rx_queue_id];
1688
1689                 err = i40e_alloc_rx_queue_mbufs(rxq);
1690                 if (err) {
1691                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1692                         return err;
1693                 }
1694
1695                 rte_wmb();
1696
1697                 /* Init the RX tail register. */
1698                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1699                 I40EVF_WRITE_FLUSH(hw);
1700
1701                 /* Ready to switch the queue on */
1702                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1703
1704                 if (err)
1705                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1706                                     rx_queue_id);
1707                 else
1708                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1709         }
1710
1711         return err;
1712 }
1713
1714 static int
1715 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1716 {
1717         struct i40e_rx_queue *rxq;
1718         int err;
1719
1720         if (rx_queue_id < dev->data->nb_rx_queues) {
1721                 rxq = dev->data->rx_queues[rx_queue_id];
1722
1723                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1724
1725                 if (err) {
1726                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1727                                     rx_queue_id);
1728                         return err;
1729                 }
1730
1731                 i40e_rx_queue_release_mbufs(rxq);
1732                 i40e_reset_rx_queue(rxq);
1733                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1734         }
1735
1736         return 0;
1737 }
1738
1739 static int
1740 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1741 {
1742         int err = 0;
1743
1744         PMD_INIT_FUNC_TRACE();
1745
1746         if (tx_queue_id < dev->data->nb_tx_queues) {
1747
1748                 /* Ready to switch the queue on */
1749                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1750
1751                 if (err)
1752                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1753                                     tx_queue_id);
1754                 else
1755                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1756         }
1757
1758         return err;
1759 }
1760
1761 static int
1762 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1763 {
1764         struct i40e_tx_queue *txq;
1765         int err;
1766
1767         if (tx_queue_id < dev->data->nb_tx_queues) {
1768                 txq = dev->data->tx_queues[tx_queue_id];
1769
1770                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1771
1772                 if (err) {
1773                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1774                                     tx_queue_id);
1775                         return err;
1776                 }
1777
1778                 i40e_tx_queue_release_mbufs(txq);
1779                 i40e_reset_tx_queue(txq);
1780                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1781         }
1782
1783         return 0;
1784 }
1785
1786 static int
1787 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1788 {
1789         int ret;
1790
1791         if (on)
1792                 ret = i40evf_add_vlan(dev, vlan_id);
1793         else
1794                 ret = i40evf_del_vlan(dev,vlan_id);
1795
1796         return ret;
1797 }
1798
1799 static int
1800 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1801 {
1802         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1803         struct rte_eth_dev_data *dev_data = dev->data;
1804         struct rte_pktmbuf_pool_private *mbp_priv;
1805         uint16_t buf_size, len;
1806
1807         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1808         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1809         I40EVF_WRITE_FLUSH(hw);
1810
1811         /* Calculate the maximum packet length allowed */
1812         mbp_priv = rte_mempool_get_priv(rxq->mp);
1813         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1814                                         RTE_PKTMBUF_HEADROOM);
1815         rxq->hs_mode = i40e_header_split_none;
1816         rxq->rx_hdr_len = 0;
1817         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1818         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1819         rxq->max_pkt_len = RTE_MIN(len,
1820                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1821
1822         /**
1823          * Check if the jumbo frame and maximum packet length are set correctly
1824          */
1825         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1826                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1827                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1828                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1829                                 "larger than %u and smaller than %u, as jumbo "
1830                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1831                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1832                         return I40E_ERR_CONFIG;
1833                 }
1834         } else {
1835                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1836                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1837                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1838                                 "larger than %u and smaller than %u, as jumbo "
1839                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1840                                                 (uint32_t)ETHER_MAX_LEN);
1841                         return I40E_ERR_CONFIG;
1842                 }
1843         }
1844
1845         if (dev_data->dev_conf.rxmode.enable_scatter ||
1846             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1847                 dev_data->scattered_rx = 1;
1848         }
1849
1850         return 0;
1851 }
1852
1853 static int
1854 i40evf_rx_init(struct rte_eth_dev *dev)
1855 {
1856         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1857         uint16_t i;
1858         int ret = I40E_SUCCESS;
1859         struct i40e_rx_queue **rxq =
1860                 (struct i40e_rx_queue **)dev->data->rx_queues;
1861
1862         i40evf_config_rss(vf);
1863         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1864                 if (!rxq[i] || !rxq[i]->q_set)
1865                         continue;
1866                 ret = i40evf_rxq_init(dev, rxq[i]);
1867                 if (ret != I40E_SUCCESS)
1868                         break;
1869         }
1870         if (ret == I40E_SUCCESS)
1871                 i40e_set_rx_function(dev);
1872
1873         return ret;
1874 }
1875
1876 static void
1877 i40evf_tx_init(struct rte_eth_dev *dev)
1878 {
1879         uint16_t i;
1880         struct i40e_tx_queue **txq =
1881                 (struct i40e_tx_queue **)dev->data->tx_queues;
1882         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1883
1884         for (i = 0; i < dev->data->nb_tx_queues; i++)
1885                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1886
1887         i40e_set_tx_function(dev);
1888 }
1889
1890 static inline void
1891 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1892 {
1893         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1894         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1895         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1896         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1897
1898         if (!rte_intr_allow_others(intr_handle)) {
1899                 I40E_WRITE_REG(hw,
1900                                I40E_VFINT_DYN_CTL01,
1901                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1902                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1903                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1904                 I40EVF_WRITE_FLUSH(hw);
1905                 return;
1906         }
1907
1908         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1909                 /* To support DPDK PF host */
1910                 I40E_WRITE_REG(hw,
1911                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1912                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1913                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1914         /* If host driver is kernel driver, do nothing.
1915          * Interrupt 0 is used for rx packets, but don't set
1916          * I40E_VFINT_DYN_CTL01,
1917          * because it is already done in i40evf_enable_irq0.
1918          */
1919
1920         I40EVF_WRITE_FLUSH(hw);
1921 }
1922
1923 static inline void
1924 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1925 {
1926         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1927         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1928         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1929         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1930
1931         if (!rte_intr_allow_others(intr_handle)) {
1932                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1933                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1934                 I40EVF_WRITE_FLUSH(hw);
1935                 return;
1936         }
1937
1938         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1939                 I40E_WRITE_REG(hw,
1940                                I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR
1941                                                     - 1),
1942                                0);
1943         /* If host driver is kernel driver, do nothing.
1944          * Interrupt 0 is used for rx packets, but don't zero
1945          * I40E_VFINT_DYN_CTL01,
1946          * because interrupt 0 is also used for adminq processing.
1947          */
1948
1949         I40EVF_WRITE_FLUSH(hw);
1950 }
1951
1952 static int
1953 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1954 {
1955         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1956         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1957         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1958         uint16_t interval =
1959                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1960         uint16_t msix_intr;
1961
1962         msix_intr = intr_handle->intr_vec[queue_id];
1963         if (msix_intr == I40E_MISC_VEC_ID)
1964                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1965                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1966                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1967                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1968                                (interval <<
1969                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1970         else
1971                 I40E_WRITE_REG(hw,
1972                                I40E_VFINT_DYN_CTLN1(msix_intr -
1973                                                     I40E_RX_VEC_START),
1974                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1975                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1976                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1977                                (interval <<
1978                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1979
1980         I40EVF_WRITE_FLUSH(hw);
1981
1982         rte_intr_enable(&pci_dev->intr_handle);
1983
1984         return 0;
1985 }
1986
1987 static int
1988 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1989 {
1990         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1991         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1992         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1993         uint16_t msix_intr;
1994
1995         msix_intr = intr_handle->intr_vec[queue_id];
1996         if (msix_intr == I40E_MISC_VEC_ID)
1997                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1998         else
1999                 I40E_WRITE_REG(hw,
2000                                I40E_VFINT_DYN_CTLN1(msix_intr -
2001                                                     I40E_RX_VEC_START),
2002                                0);
2003
2004         I40EVF_WRITE_FLUSH(hw);
2005
2006         return 0;
2007 }
2008
2009 static void
2010 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2011 {
2012         struct virtchnl_ether_addr_list *list;
2013         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2014         int err, i, j;
2015         int next_begin = 0;
2016         int begin = 0;
2017         uint32_t len;
2018         struct ether_addr *addr;
2019         struct vf_cmd_info args;
2020
2021         do {
2022                 j = 0;
2023                 len = sizeof(struct virtchnl_ether_addr_list);
2024                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2025                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
2026                                 continue;
2027                         len += sizeof(struct virtchnl_ether_addr);
2028                         if (len >= I40E_AQ_BUF_SZ) {
2029                                 next_begin = i + 1;
2030                                 break;
2031                         }
2032                 }
2033
2034                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2035                 if (!list) {
2036                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2037                         return;
2038                 }
2039
2040                 for (i = begin; i < next_begin; i++) {
2041                         addr = &dev->data->mac_addrs[i];
2042                         if (is_zero_ether_addr(addr))
2043                                 continue;
2044                         (void)rte_memcpy(list->list[j].addr, addr->addr_bytes,
2045                                          sizeof(addr->addr_bytes));
2046                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2047                                     addr->addr_bytes[0], addr->addr_bytes[1],
2048                                     addr->addr_bytes[2], addr->addr_bytes[3],
2049                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2050                         j++;
2051                 }
2052                 list->vsi_id = vf->vsi_res->vsi_id;
2053                 list->num_elements = j;
2054                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2055                            VIRTCHNL_OP_DEL_ETH_ADDR;
2056                 args.in_args = (uint8_t *)list;
2057                 args.in_args_size = len;
2058                 args.out_buffer = vf->aq_resp;
2059                 args.out_size = I40E_AQ_BUF_SZ;
2060                 err = i40evf_execute_vf_cmd(dev, &args);
2061                 if (err)
2062                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2063                                     add ? "OP_ADD_ETHER_ADDRESS" :
2064                                     "OP_DEL_ETHER_ADDRESS");
2065                 rte_free(list);
2066                 begin = next_begin;
2067         } while (begin < I40E_NUM_MACADDR_MAX);
2068 }
2069
2070 static int
2071 i40evf_dev_start(struct rte_eth_dev *dev)
2072 {
2073         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2074         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2075         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2076         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2077         uint32_t intr_vector = 0;
2078
2079         PMD_INIT_FUNC_TRACE();
2080
2081         hw->adapter_stopped = 0;
2082
2083         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2084         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2085                                         dev->data->nb_tx_queues);
2086
2087         /* check and configure queue intr-vector mapping */
2088         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2089                 intr_vector = dev->data->nb_rx_queues;
2090                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2091                         return -1;
2092         }
2093
2094         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2095                 intr_handle->intr_vec =
2096                         rte_zmalloc("intr_vec",
2097                                     dev->data->nb_rx_queues * sizeof(int), 0);
2098                 if (!intr_handle->intr_vec) {
2099                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2100                                      " intr_vec", dev->data->nb_rx_queues);
2101                         return -ENOMEM;
2102                 }
2103         }
2104
2105         if (i40evf_rx_init(dev) != 0){
2106                 PMD_DRV_LOG(ERR, "failed to do RX init");
2107                 return -1;
2108         }
2109
2110         i40evf_tx_init(dev);
2111
2112         if (i40evf_configure_queues(dev) != 0) {
2113                 PMD_DRV_LOG(ERR, "configure queues failed");
2114                 goto err_queue;
2115         }
2116         if (i40evf_config_irq_map(dev)) {
2117                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2118                 goto err_queue;
2119         }
2120
2121         /* Set all mac addrs */
2122         i40evf_add_del_all_mac_addr(dev, TRUE);
2123
2124         if (i40evf_start_queues(dev) != 0) {
2125                 PMD_DRV_LOG(ERR, "enable queues failed");
2126                 goto err_mac;
2127         }
2128
2129         i40evf_enable_queues_intr(dev);
2130         return 0;
2131
2132 err_mac:
2133         i40evf_add_del_all_mac_addr(dev, FALSE);
2134 err_queue:
2135         return -1;
2136 }
2137
2138 static void
2139 i40evf_dev_stop(struct rte_eth_dev *dev)
2140 {
2141         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2142         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2143
2144         PMD_INIT_FUNC_TRACE();
2145
2146         i40evf_stop_queues(dev);
2147         i40evf_disable_queues_intr(dev);
2148         i40e_dev_clear_queues(dev);
2149
2150         /* Clean datapath event and queue/vec mapping */
2151         rte_intr_efd_disable(intr_handle);
2152         if (intr_handle->intr_vec) {
2153                 rte_free(intr_handle->intr_vec);
2154                 intr_handle->intr_vec = NULL;
2155         }
2156         /* remove all mac addrs */
2157         i40evf_add_del_all_mac_addr(dev, FALSE);
2158
2159 }
2160
2161 static int
2162 i40evf_dev_link_update(struct rte_eth_dev *dev,
2163                        __rte_unused int wait_to_complete)
2164 {
2165         struct rte_eth_link new_link;
2166         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2167         /*
2168          * DPDK pf host provide interfacet to acquire link status
2169          * while Linux driver does not
2170          */
2171
2172         /* Linux driver PF host */
2173         switch (vf->link_speed) {
2174         case I40E_LINK_SPEED_100MB:
2175                 new_link.link_speed = ETH_SPEED_NUM_100M;
2176                 break;
2177         case I40E_LINK_SPEED_1GB:
2178                 new_link.link_speed = ETH_SPEED_NUM_1G;
2179                 break;
2180         case I40E_LINK_SPEED_10GB:
2181                 new_link.link_speed = ETH_SPEED_NUM_10G;
2182                 break;
2183         case I40E_LINK_SPEED_20GB:
2184                 new_link.link_speed = ETH_SPEED_NUM_20G;
2185                 break;
2186         case I40E_LINK_SPEED_25GB:
2187                 new_link.link_speed = ETH_SPEED_NUM_25G;
2188                 break;
2189         case I40E_LINK_SPEED_40GB:
2190                 new_link.link_speed = ETH_SPEED_NUM_40G;
2191                 break;
2192         default:
2193                 new_link.link_speed = ETH_SPEED_NUM_100M;
2194                 break;
2195         }
2196         /* full duplex only */
2197         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2198         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2199                                              ETH_LINK_DOWN;
2200
2201         i40evf_dev_atomic_write_link_status(dev, &new_link);
2202
2203         return 0;
2204 }
2205
2206 static void
2207 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2208 {
2209         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2210         int ret;
2211
2212         /* If enabled, just return */
2213         if (vf->promisc_unicast_enabled)
2214                 return;
2215
2216         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2217         if (ret == 0)
2218                 vf->promisc_unicast_enabled = TRUE;
2219 }
2220
2221 static void
2222 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2223 {
2224         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2225         int ret;
2226
2227         /* If disabled, just return */
2228         if (!vf->promisc_unicast_enabled)
2229                 return;
2230
2231         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2232         if (ret == 0)
2233                 vf->promisc_unicast_enabled = FALSE;
2234 }
2235
2236 static void
2237 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2238 {
2239         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2240         int ret;
2241
2242         /* If enabled, just return */
2243         if (vf->promisc_multicast_enabled)
2244                 return;
2245
2246         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2247         if (ret == 0)
2248                 vf->promisc_multicast_enabled = TRUE;
2249 }
2250
2251 static void
2252 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2253 {
2254         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2255         int ret;
2256
2257         /* If enabled, just return */
2258         if (!vf->promisc_multicast_enabled)
2259                 return;
2260
2261         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2262         if (ret == 0)
2263                 vf->promisc_multicast_enabled = FALSE;
2264 }
2265
2266 static void
2267 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2268 {
2269         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2270
2271         memset(dev_info, 0, sizeof(*dev_info));
2272         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2273         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2274         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2275         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2276         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2277         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2278         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2279         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
2280         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2281         dev_info->rx_offload_capa =
2282                 DEV_RX_OFFLOAD_VLAN_STRIP |
2283                 DEV_RX_OFFLOAD_QINQ_STRIP |
2284                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2285                 DEV_RX_OFFLOAD_UDP_CKSUM |
2286                 DEV_RX_OFFLOAD_TCP_CKSUM;
2287         dev_info->tx_offload_capa =
2288                 DEV_TX_OFFLOAD_VLAN_INSERT |
2289                 DEV_TX_OFFLOAD_QINQ_INSERT |
2290                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2291                 DEV_TX_OFFLOAD_UDP_CKSUM |
2292                 DEV_TX_OFFLOAD_TCP_CKSUM |
2293                 DEV_TX_OFFLOAD_SCTP_CKSUM;
2294
2295         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2296                 .rx_thresh = {
2297                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2298                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2299                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2300                 },
2301                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2302                 .rx_drop_en = 0,
2303         };
2304
2305         dev_info->default_txconf = (struct rte_eth_txconf) {
2306                 .tx_thresh = {
2307                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2308                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2309                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2310                 },
2311                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2312                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2313                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2314                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2315         };
2316
2317         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2318                 .nb_max = I40E_MAX_RING_DESC,
2319                 .nb_min = I40E_MIN_RING_DESC,
2320                 .nb_align = I40E_ALIGN_RING_DESC,
2321         };
2322
2323         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2324                 .nb_max = I40E_MAX_RING_DESC,
2325                 .nb_min = I40E_MIN_RING_DESC,
2326                 .nb_align = I40E_ALIGN_RING_DESC,
2327         };
2328 }
2329
2330 static void
2331 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2332 {
2333         if (i40evf_get_statistics(dev, stats))
2334                 PMD_DRV_LOG(ERR, "Get statistics failed");
2335 }
2336
2337 static void
2338 i40evf_dev_close(struct rte_eth_dev *dev)
2339 {
2340         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2341         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2342         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2343
2344         i40evf_dev_stop(dev);
2345         hw->adapter_stopped = 1;
2346         i40e_dev_free_queues(dev);
2347         i40evf_reset_vf(hw);
2348         i40e_shutdown_adminq(hw);
2349         /* disable uio intr before callback unregister */
2350         rte_intr_disable(intr_handle);
2351
2352         /* unregister callback func from eal lib */
2353         rte_intr_callback_unregister(intr_handle,
2354                                      i40evf_dev_interrupt_handler, dev);
2355         i40evf_disable_irq0(hw);
2356 }
2357
2358 static int
2359 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2360 {
2361         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2362         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2363         int ret;
2364
2365         if (!lut)
2366                 return -EINVAL;
2367
2368         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2369                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2370                                           lut, lut_size);
2371                 if (ret) {
2372                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2373                         return ret;
2374                 }
2375         } else {
2376                 uint32_t *lut_dw = (uint32_t *)lut;
2377                 uint16_t i, lut_size_dw = lut_size / 4;
2378
2379                 for (i = 0; i < lut_size_dw; i++)
2380                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2381         }
2382
2383         return 0;
2384 }
2385
2386 static int
2387 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2388 {
2389         struct i40e_vf *vf;
2390         struct i40e_hw *hw;
2391         int ret;
2392
2393         if (!vsi || !lut)
2394                 return -EINVAL;
2395
2396         vf = I40E_VSI_TO_VF(vsi);
2397         hw = I40E_VSI_TO_HW(vsi);
2398
2399         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2400                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2401                                           lut, lut_size);
2402                 if (ret) {
2403                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2404                         return ret;
2405                 }
2406         } else {
2407                 uint32_t *lut_dw = (uint32_t *)lut;
2408                 uint16_t i, lut_size_dw = lut_size / 4;
2409
2410                 for (i = 0; i < lut_size_dw; i++)
2411                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2412                 I40EVF_WRITE_FLUSH(hw);
2413         }
2414
2415         return 0;
2416 }
2417
2418 static int
2419 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2420                            struct rte_eth_rss_reta_entry64 *reta_conf,
2421                            uint16_t reta_size)
2422 {
2423         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2424         uint8_t *lut;
2425         uint16_t i, idx, shift;
2426         int ret;
2427
2428         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2429                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2430                         "(%d) doesn't match the number of hardware can "
2431                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2432                 return -EINVAL;
2433         }
2434
2435         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2436         if (!lut) {
2437                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2438                 return -ENOMEM;
2439         }
2440         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2441         if (ret)
2442                 goto out;
2443         for (i = 0; i < reta_size; i++) {
2444                 idx = i / RTE_RETA_GROUP_SIZE;
2445                 shift = i % RTE_RETA_GROUP_SIZE;
2446                 if (reta_conf[idx].mask & (1ULL << shift))
2447                         lut[i] = reta_conf[idx].reta[shift];
2448         }
2449         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2450
2451 out:
2452         rte_free(lut);
2453
2454         return ret;
2455 }
2456
2457 static int
2458 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2459                           struct rte_eth_rss_reta_entry64 *reta_conf,
2460                           uint16_t reta_size)
2461 {
2462         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2463         uint16_t i, idx, shift;
2464         uint8_t *lut;
2465         int ret;
2466
2467         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2468                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2469                         "(%d) doesn't match the number of hardware can "
2470                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2471                 return -EINVAL;
2472         }
2473
2474         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2475         if (!lut) {
2476                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2477                 return -ENOMEM;
2478         }
2479
2480         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2481         if (ret)
2482                 goto out;
2483         for (i = 0; i < reta_size; i++) {
2484                 idx = i / RTE_RETA_GROUP_SIZE;
2485                 shift = i % RTE_RETA_GROUP_SIZE;
2486                 if (reta_conf[idx].mask & (1ULL << shift))
2487                         reta_conf[idx].reta[shift] = lut[i];
2488         }
2489
2490 out:
2491         rte_free(lut);
2492
2493         return ret;
2494 }
2495
2496 static int
2497 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2498 {
2499         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2500         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2501         int ret = 0;
2502
2503         if (!key || key_len == 0) {
2504                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2505                 return 0;
2506         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2507                 sizeof(uint32_t)) {
2508                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2509                 return -EINVAL;
2510         }
2511
2512         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2513                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2514                         (struct i40e_aqc_get_set_rss_key_data *)key;
2515
2516                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2517                 if (ret)
2518                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2519                                      "via AQ");
2520         } else {
2521                 uint32_t *hash_key = (uint32_t *)key;
2522                 uint16_t i;
2523
2524                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2525                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2526                 I40EVF_WRITE_FLUSH(hw);
2527         }
2528
2529         return ret;
2530 }
2531
2532 static int
2533 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2534 {
2535         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2536         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2537         int ret;
2538
2539         if (!key || !key_len)
2540                 return -EINVAL;
2541
2542         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2543                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2544                         (struct i40e_aqc_get_set_rss_key_data *)key);
2545                 if (ret) {
2546                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2547                         return ret;
2548                 }
2549         } else {
2550                 uint32_t *key_dw = (uint32_t *)key;
2551                 uint16_t i;
2552
2553                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2554                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2555         }
2556         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2557
2558         return 0;
2559 }
2560
2561 static int
2562 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2563 {
2564         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2565         uint64_t rss_hf, hena;
2566         int ret;
2567
2568         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2569                                  rss_conf->rss_key_len);
2570         if (ret)
2571                 return ret;
2572
2573         rss_hf = rss_conf->rss_hf;
2574         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2575         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2576         if (hw->mac.type == I40E_MAC_X722)
2577                 hena &= ~I40E_RSS_HENA_ALL_X722;
2578         else
2579                 hena &= ~I40E_RSS_HENA_ALL;
2580         hena |= i40e_config_hena(rss_hf, hw->mac.type);
2581         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2582         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2583         I40EVF_WRITE_FLUSH(hw);
2584
2585         return 0;
2586 }
2587
2588 static void
2589 i40evf_disable_rss(struct i40e_vf *vf)
2590 {
2591         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2592         uint64_t hena;
2593
2594         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2595         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2596         if (hw->mac.type == I40E_MAC_X722)
2597                 hena &= ~I40E_RSS_HENA_ALL_X722;
2598         else
2599                 hena &= ~I40E_RSS_HENA_ALL;
2600         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2601         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2602         I40EVF_WRITE_FLUSH(hw);
2603 }
2604
2605 static int
2606 i40evf_config_rss(struct i40e_vf *vf)
2607 {
2608         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2609         struct rte_eth_rss_conf rss_conf;
2610         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2611         uint16_t num;
2612
2613         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2614                 i40evf_disable_rss(vf);
2615                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2616                 return 0;
2617         }
2618
2619         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2620         /* Fill out the look up table */
2621         for (i = 0, j = 0; i < nb_q; i++, j++) {
2622                 if (j >= num)
2623                         j = 0;
2624                 lut = (lut << 8) | j;
2625                 if ((i & 3) == 3)
2626                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2627         }
2628
2629         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2630         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2631                 i40evf_disable_rss(vf);
2632                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2633                 return 0;
2634         }
2635
2636         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2637                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2638                 /* Calculate the default hash key */
2639                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2640                         rss_key_default[i] = (uint32_t)rte_rand();
2641                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2642                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2643                         sizeof(uint32_t);
2644         }
2645
2646         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2647 }
2648
2649 static int
2650 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2651                            struct rte_eth_rss_conf *rss_conf)
2652 {
2653         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2654         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2655         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2656         uint64_t hena;
2657
2658         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2659         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2660         if (!(hena & ((hw->mac.type == I40E_MAC_X722)
2661                  ? I40E_RSS_HENA_ALL_X722
2662                  : I40E_RSS_HENA_ALL))) { /* RSS disabled */
2663                 if (rss_hf != 0) /* Enable RSS */
2664                         return -EINVAL;
2665                 return 0;
2666         }
2667
2668         /* RSS enabled */
2669         if (rss_hf == 0) /* Disable RSS */
2670                 return -EINVAL;
2671
2672         return i40evf_hw_rss_hash_set(vf, rss_conf);
2673 }
2674
2675 static int
2676 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2677                              struct rte_eth_rss_conf *rss_conf)
2678 {
2679         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2680         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2681         uint64_t hena;
2682
2683         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2684                            &rss_conf->rss_key_len);
2685
2686         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2687         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2688         rss_conf->rss_hf = i40e_parse_hena(hena);
2689
2690         return 0;
2691 }
2692
2693 static int
2694 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2695 {
2696         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2697         struct rte_eth_dev_data *dev_data = vf->dev_data;
2698         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2699         int ret = 0;
2700
2701         /* check if mtu is within the allowed range */
2702         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2703                 return -EINVAL;
2704
2705         /* mtu setting is forbidden if port is start */
2706         if (dev_data->dev_started) {
2707                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2708                             dev_data->port_id);
2709                 return -EBUSY;
2710         }
2711
2712         if (frame_size > ETHER_MAX_LEN)
2713                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2714         else
2715                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2716
2717         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2718
2719         return ret;
2720 }
2721
2722 static void
2723 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2724                             struct ether_addr *mac_addr)
2725 {
2726         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2727
2728         if (!is_valid_assigned_ether_addr(mac_addr)) {
2729                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2730                 return;
2731         }
2732
2733         if (is_same_ether_addr(mac_addr, dev->data->mac_addrs))
2734                 return;
2735
2736         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2737                 return;
2738
2739         i40evf_del_mac_addr_by_addr(dev, dev->data->mac_addrs);
2740
2741         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2742 }