drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct rte_ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct rte_ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct rte_ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr);
 143 static void
 144 i40evf_dev_alarm_handler(void *param);
 145
 146 /* Default hash key buffer for RSS */
 147 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 148
 149 struct rte_i40evf_xstats_name_off {
 150         char name[RTE_ETH_XSTATS_NAME_SIZE];
 151         unsigned offset;
 152 };
 153
 154 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 155         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 156         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 157         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 158         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 159         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 160         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 161                 rx_unknown_protocol)},
 162         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 163         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 164         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 165         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 166         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 167         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 168 };
 169
 170 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 171                 sizeof(rte_i40evf_stats_strings[0]))
 172
 173 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 174         .dev_configure        = i40evf_dev_configure,
 175         .dev_start            = i40evf_dev_start,
 176         .dev_stop             = i40evf_dev_stop,
 177         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 178         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 179         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 180         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 181         .link_update          = i40evf_dev_link_update,
 182         .stats_get            = i40evf_dev_stats_get,
 183         .stats_reset          = i40evf_dev_xstats_reset,
 184         .xstats_get           = i40evf_dev_xstats_get,
 185         .xstats_get_names     = i40evf_dev_xstats_get_names,
 186         .xstats_reset         = i40evf_dev_xstats_reset,
 187         .dev_close            = i40evf_dev_close,
 188         .dev_reset            = i40evf_dev_reset,
 189         .dev_infos_get        = i40evf_dev_info_get,
 190         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 191         .vlan_filter_set      = i40evf_vlan_filter_set,
 192         .vlan_offload_set     = i40evf_vlan_offload_set,
 193         .rx_queue_start       = i40evf_dev_rx_queue_start,
 194         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 195         .tx_queue_start       = i40evf_dev_tx_queue_start,
 196         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 197         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 198         .rx_queue_release     = i40e_dev_rx_queue_release,
 199         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 200         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 201         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 202         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 203         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 204         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 205         .tx_queue_release     = i40e_dev_tx_queue_release,
 206         .rx_queue_count       = i40e_dev_rx_queue_count,
 207         .rxq_info_get         = i40e_rxq_info_get,
 208         .txq_info_get         = i40e_txq_info_get,
 209         .mac_addr_add         = i40evf_add_mac_addr,
 210         .mac_addr_remove      = i40evf_del_mac_addr,
 211         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 212         .reta_update          = i40evf_dev_rss_reta_update,
 213         .reta_query           = i40evf_dev_rss_reta_query,
 214         .rss_hash_update      = i40evf_dev_rss_hash_update,
 215         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 216         .mtu_set              = i40evf_dev_mtu_set,
 217         .mac_addr_set         = i40evf_set_default_mac_addr,
 218 };
 219
 220 /*
 221  * Read data in admin queue to get msg from pf driver
 222  */
 223 static enum i40evf_aq_result
 224 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 225 {
 226         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 227         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 228         struct i40e_arq_event_info event;
 229         enum virtchnl_ops opcode;
 230         enum i40e_status_code retval;
 231         int ret;
 232         enum i40evf_aq_result result = I40EVF_MSG_NON;
 233
 234         event.buf_len = data->buf_len;
 235         event.msg_buf = data->msg;
 236         ret = i40e_clean_arq_element(hw, &event, NULL);
 237         /* Can't read any msg from adminQ */
 238         if (ret) {
 239                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 240                         result = I40EVF_MSG_ERR;
 241                 return result;
 242         }
 243
 244         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 245         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 246         /* pf sys event */
 247         if (opcode == VIRTCHNL_OP_EVENT) {
 248                 struct virtchnl_pf_event *vpe =
 249                         (struct virtchnl_pf_event *)event.msg_buf;
 250
 251                 result = I40EVF_MSG_SYS;
 252                 switch (vpe->event) {
 253                 case VIRTCHNL_EVENT_LINK_CHANGE:
 254                         vf->link_up =
 255                                 vpe->event_data.link_event.link_status;
 256                         vf->link_speed =
 257                                 vpe->event_data.link_event.link_speed;
 258                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 259                         PMD_DRV_LOG(INFO, "Link status update:%s",
 260                                     vf->link_up ? "up" : "down");
 261                         break;
 262                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 263                         vf->vf_reset = true;
 264                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 265                         PMD_DRV_LOG(INFO, "vf is reseting");
 266                         break;
 267                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 268                         vf->dev_closed = true;
 269                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 270                         PMD_DRV_LOG(INFO, "PF driver closed");
 271                         break;
 272                 default:
 273                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 274                                     __func__, vpe->event);
 275                 }
 276         } else {
 277                 /* async reply msg on command issued by vf previously */
 278                 result = I40EVF_MSG_CMD;
 279                 /* Actual data length read from PF */
 280                 data->msg_len = event.msg_len;
 281         }
 282
 283         data->result = retval;
 284         data->ops = opcode;
 285
 286         return result;
 287 }
 288
 289 /**
 290  * clear current command. Only call in case execute
 291  * _atomic_set_cmd successfully.
 292  */
 293 static inline void
 294 _clear_cmd(struct i40e_vf *vf)
 295 {
 296         rte_wmb();
 297         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 298 }
 299
 300 /*
 301  * Check there is pending cmd in execution. If none, set new command.
 302  */
 303 static inline int
 304 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 305 {
 306         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 307                         VIRTCHNL_OP_UNKNOWN, ops);
 308
 309         if (!ret)
 310                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 311
 312         return !ret;
 313 }
 314
 315 #define MAX_TRY_TIMES 200
 316 #define ASQ_DELAY_MS  10
 317
 318 static int
 319 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 320 {
 321         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 322         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 323         struct i40evf_arq_msg_info info;
 324         enum i40evf_aq_result ret;
 325         int err, i = 0;
 326
 327         if (_atomic_set_cmd(vf, args->ops))
 328                 return -1;
 329
 330         info.msg = args->out_buffer;
 331         info.buf_len = args->out_size;
 332         info.ops = VIRTCHNL_OP_UNKNOWN;
 333         info.result = I40E_SUCCESS;
 334
 335         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 336                      args->in_args, args->in_args_size, NULL);
 337         if (err) {
 338                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 339                 _clear_cmd(vf);
 340                 return err;
 341         }
 342
 343         switch (args->ops) {
 344         case VIRTCHNL_OP_RESET_VF:
 345                 /*no need to process in this function */
 346                 err = 0;
 347                 break;
 348         case VIRTCHNL_OP_VERSION:
 349         case VIRTCHNL_OP_GET_VF_RESOURCES:
 350                 /* for init adminq commands, need to poll the response */
 351                 err = -1;
 352                 do {
 353                         ret = i40evf_read_pfmsg(dev, &info);
 354                         vf->cmd_retval = info.result;
 355                         if (ret == I40EVF_MSG_CMD) {
 356                                 err = 0;
 357                                 break;
 358                         } else if (ret == I40EVF_MSG_ERR)
 359                                 break;
 360                         rte_delay_ms(ASQ_DELAY_MS);
 361                         /* If don't read msg or read sys event, continue */
 362                 } while (i++ < MAX_TRY_TIMES);
 363                 _clear_cmd(vf);
 364                 break;
 365         case VIRTCHNL_OP_REQUEST_QUEUES:
 366                 /**
 367                  * ignore async reply, only wait for system message,
 368                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 369                  * if not, means request queues failed.
 370                  */
 371                 err = -1;
 372                 do {
 373                         ret = i40evf_read_pfmsg(dev, &info);
 374                         vf->cmd_retval = info.result;
 375                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 376                                 err = 0;
 377                                 break;
 378                         } else if (ret == I40EVF_MSG_ERR ||
 379                                            ret == I40EVF_MSG_CMD) {
 380                                 break;
 381                         }
 382                         rte_delay_ms(ASQ_DELAY_MS);
 383                         /* If don't read msg or read sys event, continue */
 384                 } while (i++ < MAX_TRY_TIMES);
 385                 _clear_cmd(vf);
 386                 break;
 387
 388         default:
 389                 /* for other adminq in running time, waiting the cmd done flag */
 390                 err = -1;
 391                 do {
 392                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 393                                 err = 0;
 394                                 break;
 395                         }
 396                         rte_delay_ms(ASQ_DELAY_MS);
 397                         /* If don't read msg or read sys event, continue */
 398                 } while (i++ < MAX_TRY_TIMES);
 399                 /* If there's no response is received, clear command */
 400                 if (i >= MAX_TRY_TIMES) {
 401                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 402                         _clear_cmd(vf);
 403                 }
 404                 break;
 405         }
 406
 407         return err | vf->cmd_retval;
 408 }
 409
 410 /*
 411  * Check API version with sync wait until version read or fail from admin queue
 412  */
 413 static int
 414 i40evf_check_api_version(struct rte_eth_dev *dev)
 415 {
 416         struct virtchnl_version_info version, *pver;
 417         int err;
 418         struct vf_cmd_info args;
 419         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 420
 421         version.major = VIRTCHNL_VERSION_MAJOR;
 422         version.minor = VIRTCHNL_VERSION_MINOR;
 423
 424         args.ops = VIRTCHNL_OP_VERSION;
 425         args.in_args = (uint8_t *)&version;
 426         args.in_args_size = sizeof(version);
 427         args.out_buffer = vf->aq_resp;
 428         args.out_size = I40E_AQ_BUF_SZ;
 429
 430         err = i40evf_execute_vf_cmd(dev, &args);
 431         if (err) {
 432                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 433                 return err;
 434         }
 435
 436         pver = (struct virtchnl_version_info *)args.out_buffer;
 437         vf->version_major = pver->major;
 438         vf->version_minor = pver->minor;
 439         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 440                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 441                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 442         else {
 443                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 444                                         vf->version_major, vf->version_minor,
 445                                                 VIRTCHNL_VERSION_MAJOR,
 446                                                 VIRTCHNL_VERSION_MINOR);
 447                 return -1;
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int
 454 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 455 {
 456         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 457         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 458         int err;
 459         struct vf_cmd_info args;
 460         uint32_t caps, len;
 461
 462         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 463         args.out_buffer = vf->aq_resp;
 464         args.out_size = I40E_AQ_BUF_SZ;
 465         if (PF_IS_V11(vf)) {
 466                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 467                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 468                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 469                        VIRTCHNL_VF_OFFLOAD_VLAN |
 470                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 471                 args.in_args = (uint8_t *)&caps;
 472                 args.in_args_size = sizeof(caps);
 473         } else {
 474                 args.in_args = NULL;
 475                 args.in_args_size = 0;
 476         }
 477         err = i40evf_execute_vf_cmd(dev, &args);
 478
 479         if (err) {
 480                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 481                 return err;
 482         }
 483
 484         len =  sizeof(struct virtchnl_vf_resource) +
 485                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 486
 487         rte_memcpy(vf->vf_res, args.out_buffer,
 488                         RTE_MIN(args.out_size, len));
 489         i40e_vf_parse_hw_config(hw, vf->vf_res);
 490
 491         return 0;
 492 }
 493
 494 static int
 495 i40evf_config_promisc(struct rte_eth_dev *dev,
 496                       bool enable_unicast,
 497                       bool enable_multicast)
 498 {
 499         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 500         int err;
 501         struct vf_cmd_info args;
 502         struct virtchnl_promisc_info promisc;
 503
 504         promisc.flags = 0;
 505         promisc.vsi_id = vf->vsi_res->vsi_id;
 506
 507         if (enable_unicast)
 508                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 509
 510         if (enable_multicast)
 511                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 512
 513         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 514         args.in_args = (uint8_t *)&promisc;
 515         args.in_args_size = sizeof(promisc);
 516         args.out_buffer = vf->aq_resp;
 517         args.out_size = I40E_AQ_BUF_SZ;
 518
 519         err = i40evf_execute_vf_cmd(dev, &args);
 520
 521         if (err)
 522                 PMD_DRV_LOG(ERR, "fail to execute command "
 523                             "CONFIG_PROMISCUOUS_MODE");
 524         return err;
 525 }
 526
 527 static int
 528 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 529 {
 530         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 531         struct vf_cmd_info args;
 532         int ret;
 533
 534         memset(&args, 0, sizeof(args));
 535         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 536         args.in_args = NULL;
 537         args.in_args_size = 0;
 538         args.out_buffer = vf->aq_resp;
 539         args.out_size = I40E_AQ_BUF_SZ;
 540         ret = i40evf_execute_vf_cmd(dev, &args);
 541         if (ret)
 542                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 543                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 544
 545         return ret;
 546 }
 547
 548 static int
 549 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 550 {
 551         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 552         struct vf_cmd_info args;
 553         int ret;
 554
 555         memset(&args, 0, sizeof(args));
 556         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 557         args.in_args = NULL;
 558         args.in_args_size = 0;
 559         args.out_buffer = vf->aq_resp;
 560         args.out_size = I40E_AQ_BUF_SZ;
 561         ret = i40evf_execute_vf_cmd(dev, &args);
 562         if (ret)
 563                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 564                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 565
 566         return ret;
 567 }
 568
 569 static void
 570 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 571                                   uint16_t vsi_id,
 572                                   uint16_t queue_id,
 573                                   uint16_t nb_txq,
 574                                   struct i40e_tx_queue *txq)
 575 {
 576         txq_info->vsi_id = vsi_id;
 577         txq_info->queue_id = queue_id;
 578         if (queue_id < nb_txq && txq) {
 579                 txq_info->ring_len = txq->nb_tx_desc;
 580                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 581         }
 582 }
 583
 584 static void
 585 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 586                                   uint16_t vsi_id,
 587                                   uint16_t queue_id,
 588                                   uint16_t nb_rxq,
 589                                   uint32_t max_pkt_size,
 590                                   struct i40e_rx_queue *rxq)
 591 {
 592         rxq_info->vsi_id = vsi_id;
 593         rxq_info->queue_id = queue_id;
 594         rxq_info->max_pkt_size = max_pkt_size;
 595         if (queue_id < nb_rxq && rxq) {
 596                 rxq_info->ring_len = rxq->nb_rx_desc;
 597                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 598                 rxq_info->databuffer_size =
 599                         (rte_pktmbuf_data_room_size(rxq->mp) -
 600                                 RTE_PKTMBUF_HEADROOM);
 601         }
 602 }
 603
 604 static int
 605 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 606 {
 607         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 608         struct i40e_rx_queue **rxq =
 609                 (struct i40e_rx_queue **)dev->data->rx_queues;
 610         struct i40e_tx_queue **txq =
 611                 (struct i40e_tx_queue **)dev->data->tx_queues;
 612         struct virtchnl_vsi_queue_config_info *vc_vqci;
 613         struct virtchnl_queue_pair_info *vc_qpi;
 614         struct vf_cmd_info args;
 615         uint16_t i, nb_qp = vf->num_queue_pairs;
 616         const uint32_t size =
 617                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 618         uint8_t buff[size];
 619         int ret;
 620
 621         memset(buff, 0, sizeof(buff));
 622         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 623         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 624         vc_vqci->num_queue_pairs = nb_qp;
 625
 626         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 627                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 628                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 629                         txq ? txq[i] : NULL);
 630                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 631                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 632                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 633         }
 634         memset(&args, 0, sizeof(args));
 635         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 636         args.in_args = (uint8_t *)vc_vqci;
 637         args.in_args_size = size;
 638         args.out_buffer = vf->aq_resp;
 639         args.out_size = I40E_AQ_BUF_SZ;
 640         ret = i40evf_execute_vf_cmd(dev, &args);
 641         if (ret)
 642                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 643                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 644
 645         return ret;
 646 }
 647
 648 static int
 649 i40evf_config_irq_map(struct rte_eth_dev *dev)
 650 {
 651         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 652         struct vf_cmd_info args;
 653         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 654                 sizeof(struct virtchnl_vector_map)];
 655         struct virtchnl_irq_map_info *map_info;
 656         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 657         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 658         uint32_t vector_id;
 659         int i, err;
 660
 661         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 662             rte_intr_allow_others(intr_handle))
 663                 vector_id = I40E_RX_VEC_START;
 664         else
 665                 vector_id = I40E_MISC_VEC_ID;
 666
 667         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 668         map_info->num_vectors = 1;
 669         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 670         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 671         /* Alway use default dynamic MSIX interrupt */
 672         map_info->vecmap[0].vector_id = vector_id;
 673         /* Don't map any tx queue */
 674         map_info->vecmap[0].txq_map = 0;
 675         map_info->vecmap[0].rxq_map = 0;
 676         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 677                 map_info->vecmap[0].rxq_map |= 1 << i;
 678                 if (rte_intr_dp_is_en(intr_handle))
 679                         intr_handle->intr_vec[i] = vector_id;
 680         }
 681
 682         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 683         args.in_args = (u8 *)cmd_buffer;
 684         args.in_args_size = sizeof(cmd_buffer);
 685         args.out_buffer = vf->aq_resp;
 686         args.out_size = I40E_AQ_BUF_SZ;
 687         err = i40evf_execute_vf_cmd(dev, &args);
 688         if (err)
 689                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 690
 691         return err;
 692 }
 693
 694 static int
 695 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 696                                 bool on)
 697 {
 698         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 699         struct virtchnl_queue_select queue_select;
 700         int err;
 701         struct vf_cmd_info args;
 702         memset(&queue_select, 0, sizeof(queue_select));
 703         queue_select.vsi_id = vf->vsi_res->vsi_id;
 704
 705         if (isrx)
 706                 queue_select.rx_queues |= 1 << qid;
 707         else
 708                 queue_select.tx_queues |= 1 << qid;
 709
 710         if (on)
 711                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 712         else
 713                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 714         args.in_args = (u8 *)&queue_select;
 715         args.in_args_size = sizeof(queue_select);
 716         args.out_buffer = vf->aq_resp;
 717         args.out_size = I40E_AQ_BUF_SZ;
 718         err = i40evf_execute_vf_cmd(dev, &args);
 719         if (err)
 720                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 721                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 722
 723         return err;
 724 }
 725
 726 static int
 727 i40evf_start_queues(struct rte_eth_dev *dev)
 728 {
 729         struct rte_eth_dev_data *dev_data = dev->data;
 730         int i;
 731         struct i40e_rx_queue *rxq;
 732         struct i40e_tx_queue *txq;
 733
 734         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 735                 rxq = dev_data->rx_queues[i];
 736                 if (rxq->rx_deferred_start)
 737                         continue;
 738                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 739                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 740                         return -1;
 741                 }
 742         }
 743
 744         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 745                 txq = dev_data->tx_queues[i];
 746                 if (txq->tx_deferred_start)
 747                         continue;
 748                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 749                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 750                         return -1;
 751                 }
 752         }
 753
 754         return 0;
 755 }
 756
 757 static int
 758 i40evf_stop_queues(struct rte_eth_dev *dev)
 759 {
 760         int i;
 761
 762         /* Stop TX queues first */
 763         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 764                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 765                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 766                         return -1;
 767                 }
 768         }
 769
 770         /* Then stop RX queues */
 771         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 772                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 773                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 774                         return -1;
 775                 }
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int
 782 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 783                     struct rte_ether_addr *addr,
 784                     __rte_unused uint32_t index,
 785                     __rte_unused uint32_t pool)
 786 {
 787         struct virtchnl_ether_addr_list *list;
 788         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 789         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 790                         sizeof(struct virtchnl_ether_addr)];
 791         int err;
 792         struct vf_cmd_info args;
 793
 794         if (rte_is_zero_ether_addr(addr)) {
 795                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 796                             addr->addr_bytes[0], addr->addr_bytes[1],
 797                             addr->addr_bytes[2], addr->addr_bytes[3],
 798                             addr->addr_bytes[4], addr->addr_bytes[5]);
 799                 return I40E_ERR_INVALID_MAC_ADDR;
 800         }
 801
 802         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 803         list->vsi_id = vf->vsi_res->vsi_id;
 804         list->num_elements = 1;
 805         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 806                                         sizeof(addr->addr_bytes));
 807
 808         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 809         args.in_args = cmd_buffer;
 810         args.in_args_size = sizeof(cmd_buffer);
 811         args.out_buffer = vf->aq_resp;
 812         args.out_size = I40E_AQ_BUF_SZ;
 813         err = i40evf_execute_vf_cmd(dev, &args);
 814         if (err)
 815                 PMD_DRV_LOG(ERR, "fail to execute command "
 816                             "OP_ADD_ETHER_ADDRESS");
 817         else
 818                 vf->vsi.mac_num++;
 819
 820         return err;
 821 }
 822
 823 static void
 824 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 825                             struct rte_ether_addr *addr)
 826 {
 827         struct virtchnl_ether_addr_list *list;
 828         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 829         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 830                         sizeof(struct virtchnl_ether_addr)];
 831         int err;
 832         struct vf_cmd_info args;
 833
 834         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 835                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 836                             addr->addr_bytes[0], addr->addr_bytes[1],
 837                             addr->addr_bytes[2], addr->addr_bytes[3],
 838                             addr->addr_bytes[4], addr->addr_bytes[5]);
 839                 return;
 840         }
 841
 842         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 843         list->vsi_id = vf->vsi_res->vsi_id;
 844         list->num_elements = 1;
 845         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 846                         sizeof(addr->addr_bytes));
 847
 848         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 849         args.in_args = cmd_buffer;
 850         args.in_args_size = sizeof(cmd_buffer);
 851         args.out_buffer = vf->aq_resp;
 852         args.out_size = I40E_AQ_BUF_SZ;
 853         err = i40evf_execute_vf_cmd(dev, &args);
 854         if (err)
 855                 PMD_DRV_LOG(ERR, "fail to execute command "
 856                             "OP_DEL_ETHER_ADDRESS");
 857         else
 858                 vf->vsi.mac_num--;
 859         return;
 860 }
 861
 862 static void
 863 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 864 {
 865         struct rte_eth_dev_data *data = dev->data;
 866         struct rte_ether_addr *addr;
 867
 868         addr = &data->mac_addrs[index];
 869
 870         i40evf_del_mac_addr_by_addr(dev, addr);
 871 }
 872
 873 static int
 874 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 875 {
 876         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 877         struct virtchnl_queue_select q_stats;
 878         int err;
 879         struct vf_cmd_info args;
 880
 881         memset(&q_stats, 0, sizeof(q_stats));
 882         q_stats.vsi_id = vf->vsi_res->vsi_id;
 883         args.ops = VIRTCHNL_OP_GET_STATS;
 884         args.in_args = (u8 *)&q_stats;
 885         args.in_args_size = sizeof(q_stats);
 886         args.out_buffer = vf->aq_resp;
 887         args.out_size = I40E_AQ_BUF_SZ;
 888
 889         err = i40evf_execute_vf_cmd(dev, &args);
 890         if (err) {
 891                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 892                 *pstats = NULL;
 893                 return err;
 894         }
 895         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 896         return 0;
 897 }
 898
 899 static void
 900 i40evf_stat_update_48(uint64_t *offset,
 901                    uint64_t *stat)
 902 {
 903         if (*stat >= *offset)
 904                 *stat = *stat - *offset;
 905         else
 906                 *stat = (uint64_t)((*stat +
 907                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 908
 909         *stat &= I40E_48_BIT_MASK;
 910 }
 911
 912 static void
 913 i40evf_stat_update_32(uint64_t *offset,
 914                    uint64_t *stat)
 915 {
 916         if (*stat >= *offset)
 917                 *stat = (uint64_t)(*stat - *offset);
 918         else
 919                 *stat = (uint64_t)((*stat +
 920                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 921 }
 922
 923 static void
 924 i40evf_update_stats(struct i40e_vsi *vsi,
 925                                         struct i40e_eth_stats *nes)
 926 {
 927         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 928
 929         i40evf_stat_update_48(&oes->rx_bytes,
 930                             &nes->rx_bytes);
 931         i40evf_stat_update_48(&oes->rx_unicast,
 932                             &nes->rx_unicast);
 933         i40evf_stat_update_48(&oes->rx_multicast,
 934                             &nes->rx_multicast);
 935         i40evf_stat_update_48(&oes->rx_broadcast,
 936                             &nes->rx_broadcast);
 937         i40evf_stat_update_32(&oes->rx_discards,
 938                                 &nes->rx_discards);
 939         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 940                             &nes->rx_unknown_protocol);
 941         i40evf_stat_update_48(&oes->tx_bytes,
 942                             &nes->tx_bytes);
 943         i40evf_stat_update_48(&oes->tx_unicast,
 944                             &nes->tx_unicast);
 945         i40evf_stat_update_48(&oes->tx_multicast,
 946                             &nes->tx_multicast);
 947         i40evf_stat_update_48(&oes->tx_broadcast,
 948                             &nes->tx_broadcast);
 949         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 950         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 951 }
 952
 953 static int
 954 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 955 {
 956         int ret;
 957         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 958         struct i40e_eth_stats *pstats = NULL;
 959
 960         /* read stat values to clear hardware registers */
 961         ret = i40evf_query_stats(dev, &pstats);
 962
 963         /* set stats offset base on current values */
 964         if (ret == 0)
 965                 vf->vsi.eth_stats_offset = *pstats;
 966
 967         return ret;
 968 }
 969
 970 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 971                                       struct rte_eth_xstat_name *xstats_names,
 972                                       __rte_unused unsigned limit)
 973 {
 974         unsigned i;
 975
 976         if (xstats_names != NULL)
 977                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 978                         snprintf(xstats_names[i].name,
 979                                 sizeof(xstats_names[i].name),
 980                                 "%s", rte_i40evf_stats_strings[i].name);
 981                 }
 982         return I40EVF_NB_XSTATS;
 983 }
 984
 985 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 986                                  struct rte_eth_xstat *xstats, unsigned n)
 987 {
 988         int ret;
 989         unsigned i;
 990         struct i40e_eth_stats *pstats = NULL;
 991         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 992         struct i40e_vsi *vsi = &vf->vsi;
 993
 994         if (n < I40EVF_NB_XSTATS)
 995                 return I40EVF_NB_XSTATS;
 996
 997         ret = i40evf_query_stats(dev, &pstats);
 998         if (ret != 0)
 999                 return 0;
1000
1001         if (!xstats)
1002                 return 0;
1003
1004         i40evf_update_stats(vsi, pstats);
1005
1006         /* loop over xstats array and values from pstats */
1007         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1008                 xstats[i].id = i;
1009                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1010                         rte_i40evf_stats_strings[i].offset);
1011         }
1012
1013         return I40EVF_NB_XSTATS;
1014 }
1015
1016 static int
1017 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1018 {
1019         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1020         struct virtchnl_vlan_filter_list *vlan_list;
1021         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1022                                                         sizeof(uint16_t)];
1023         int err;
1024         struct vf_cmd_info args;
1025
1026         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1027         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1028         vlan_list->num_elements = 1;
1029         vlan_list->vlan_id[0] = vlanid;
1030
1031         args.ops = VIRTCHNL_OP_ADD_VLAN;
1032         args.in_args = (u8 *)&cmd_buffer;
1033         args.in_args_size = sizeof(cmd_buffer);
1034         args.out_buffer = vf->aq_resp;
1035         args.out_size = I40E_AQ_BUF_SZ;
1036         err = i40evf_execute_vf_cmd(dev, &args);
1037         if (err)
1038                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1039
1040         return err;
1041 }
1042
1043 static int
1044 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1045 {
1046         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1047         struct virtchnl_vf_res_request vfres;
1048         struct vf_cmd_info args;
1049         int err;
1050
1051         vfres.num_queue_pairs = num;
1052
1053         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1054         args.in_args = (u8 *)&vfres;
1055         args.in_args_size = sizeof(vfres);
1056         args.out_buffer = vf->aq_resp;
1057         args.out_size = I40E_AQ_BUF_SZ;
1058
1059         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1060         err = i40evf_execute_vf_cmd(dev, &args);
1061         if (err)
1062                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1063
1064         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1065                           i40evf_dev_alarm_handler, dev);
1066         return err;
1067 }
1068
1069 static int
1070 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1071 {
1072         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1073         struct virtchnl_vlan_filter_list *vlan_list;
1074         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1075                                                         sizeof(uint16_t)];
1076         int err;
1077         struct vf_cmd_info args;
1078
1079         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1080         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1081         vlan_list->num_elements = 1;
1082         vlan_list->vlan_id[0] = vlanid;
1083
1084         args.ops = VIRTCHNL_OP_DEL_VLAN;
1085         args.in_args = (u8 *)&cmd_buffer;
1086         args.in_args_size = sizeof(cmd_buffer);
1087         args.out_buffer = vf->aq_resp;
1088         args.out_size = I40E_AQ_BUF_SZ;
1089         err = i40evf_execute_vf_cmd(dev, &args);
1090         if (err)
1091                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1092
1093         return err;
1094 }
1095
1096 static const struct rte_pci_id pci_id_i40evf_map[] = {
1097         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1098         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1099         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1100         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1101         { .vendor_id = 0, /* sentinel */ },
1102 };
1103
1104 /* Disable IRQ0 */
1105 static inline void
1106 i40evf_disable_irq0(struct i40e_hw *hw)
1107 {
1108         /* Disable all interrupt types */
1109         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1110         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1111                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1112         I40EVF_WRITE_FLUSH(hw);
1113 }
1114
1115 /* Enable IRQ0 */
1116 static inline void
1117 i40evf_enable_irq0(struct i40e_hw *hw)
1118 {
1119         /* Enable admin queue interrupt trigger */
1120         uint32_t val;
1121
1122         i40evf_disable_irq0(hw);
1123         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1124         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1125                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1126         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1127
1128         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1129                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1130                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1131                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1132
1133         I40EVF_WRITE_FLUSH(hw);
1134 }
1135
1136 static int
1137 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1138 {
1139         int i, reset;
1140         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1141         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1142
1143         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1144                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1145                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1146                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1147                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1148                     reset == VIRTCHNL_VFR_COMPLETED)
1149                         break;
1150                 rte_delay_ms(50);
1151         }
1152
1153         if (i >= MAX_RESET_WAIT_CNT)
1154                 return -1;
1155
1156         vf->vf_reset = false;
1157         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1158
1159         return 0;
1160 }
1161 static int
1162 i40evf_reset_vf(struct rte_eth_dev *dev)
1163 {
1164         int ret;
1165         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1166
1167         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1168                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1169                 return -1;
1170         }
1171         /**
1172           * After issuing vf reset command to pf, pf won't necessarily
1173           * reset vf, it depends on what state it exactly is. If it's not
1174           * initialized yet, it won't have vf reset since it's in a certain
1175           * state. If not, it will try to reset. Even vf is reset, pf will
1176           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1177           * it to ACTIVE. In this duration, vf may not catch the moment that
1178           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1179           */
1180         rte_delay_ms(200);
1181
1182         ret = i40evf_check_vf_reset_done(dev);
1183         if (ret) {
1184                 PMD_INIT_LOG(ERR, "VF is still resetting");
1185                 return ret;
1186         }
1187
1188         return 0;
1189 }
1190
1191 static int
1192 i40evf_init_vf(struct rte_eth_dev *dev)
1193 {
1194         int i, err, bufsz;
1195         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1196         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1197         uint16_t interval =
1198                 i40e_calc_itr_interval(0, 0);
1199
1200         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1201         vf->dev_data = dev->data;
1202         err = i40e_set_mac_type(hw);
1203         if (err) {
1204                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1205                 goto err;
1206         }
1207
1208         err = i40evf_check_vf_reset_done(dev);
1209         if (err)
1210                 goto err;
1211
1212         i40e_init_adminq_parameter(hw);
1213         err = i40e_init_adminq(hw);
1214         if (err) {
1215                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1216                 goto err;
1217         }
1218
1219         /* Reset VF and wait until it's complete */
1220         if (i40evf_reset_vf(dev)) {
1221                 PMD_INIT_LOG(ERR, "reset NIC failed");
1222                 goto err_aq;
1223         }
1224
1225         /* VF reset, shutdown admin queue and initialize again */
1226         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1227                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1228                 goto err;
1229         }
1230
1231         i40e_init_adminq_parameter(hw);
1232         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1233                 PMD_INIT_LOG(ERR, "init_adminq failed");
1234                 goto err;
1235         }
1236
1237         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1238         if (!vf->aq_resp) {
1239                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1240                 goto err_aq;
1241         }
1242         if (i40evf_check_api_version(dev) != 0) {
1243                 PMD_INIT_LOG(ERR, "check_api version failed");
1244                 goto err_api;
1245         }
1246         bufsz = sizeof(struct virtchnl_vf_resource) +
1247                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1248         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1249         if (!vf->vf_res) {
1250                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1251                 goto err_api;
1252         }
1253
1254         if (i40evf_get_vf_resource(dev) != 0) {
1255                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1256                 goto err_alloc;
1257         }
1258
1259         /* got VF config message back from PF, now we can parse it */
1260         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1261                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1262                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1263         }
1264
1265         if (!vf->vsi_res) {
1266                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1267                 goto err_alloc;
1268         }
1269
1270         if (hw->mac.type == I40E_MAC_X722_VF)
1271                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1272         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1273
1274         switch (vf->vsi_res->vsi_type) {
1275         case VIRTCHNL_VSI_SRIOV:
1276                 vf->vsi.type = I40E_VSI_SRIOV;
1277                 break;
1278         default:
1279                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1280                 break;
1281         }
1282         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1283         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1284
1285         /* Store the MAC address configured by host, or generate random one */
1286         if (rte_is_valid_assigned_ether_addr(
1287                         (struct rte_ether_addr *)hw->mac.addr))
1288                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1289         else
1290                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1291
1292         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1293                        (I40E_ITR_INDEX_DEFAULT <<
1294                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1295                        (interval <<
1296                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1297         I40EVF_WRITE_FLUSH(hw);
1298
1299         return 0;
1300
1301 err_alloc:
1302         rte_free(vf->vf_res);
1303         vf->vsi_res = NULL;
1304 err_api:
1305         rte_free(vf->aq_resp);
1306 err_aq:
1307         i40e_shutdown_adminq(hw); /* ignore error */
1308 err:
1309         return -1;
1310 }
1311
1312 static int
1313 i40evf_uninit_vf(struct rte_eth_dev *dev)
1314 {
1315         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1316         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1317
1318         PMD_INIT_FUNC_TRACE();
1319
1320         if (hw->adapter_closed == 0)
1321                 i40evf_dev_close(dev);
1322         rte_free(vf->vf_res);
1323         vf->vf_res = NULL;
1324         rte_free(vf->aq_resp);
1325         vf->aq_resp = NULL;
1326
1327         return 0;
1328 }
1329
1330 static void
1331 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1332                 __rte_unused uint16_t msglen)
1333 {
1334         struct virtchnl_pf_event *pf_msg =
1335                         (struct virtchnl_pf_event *)msg;
1336         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1337
1338         switch (pf_msg->event) {
1339         case VIRTCHNL_EVENT_RESET_IMPENDING:
1340                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1341                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1342                                               NULL);
1343                 break;
1344         case VIRTCHNL_EVENT_LINK_CHANGE:
1345                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1346                 vf->link_up = pf_msg->event_data.link_event.link_status;
1347                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1348                 break;
1349         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1350                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1351                 break;
1352         default:
1353                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1354                 break;
1355         }
1356 }
1357
1358 static void
1359 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1360 {
1361         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1362         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1363         struct i40e_arq_event_info info;
1364         uint16_t pending, aq_opc;
1365         enum virtchnl_ops msg_opc;
1366         enum i40e_status_code msg_ret;
1367         int ret;
1368
1369         info.buf_len = I40E_AQ_BUF_SZ;
1370         if (!vf->aq_resp) {
1371                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1372                 return;
1373         }
1374         info.msg_buf = vf->aq_resp;
1375
1376         pending = 1;
1377         while (pending) {
1378                 ret = i40e_clean_arq_element(hw, &info, &pending);
1379
1380                 if (ret != I40E_SUCCESS) {
1381                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1382                                     "ret: %d", ret);
1383                         break;
1384                 }
1385                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1386                 /* For the message sent from pf to vf, opcode is stored in
1387                  * cookie_high of struct i40e_aq_desc, while return error code
1388                  * are stored in cookie_low, Which is done by
1389                  * i40e_aq_send_msg_to_vf in PF driver.*/
1390                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1391                                                   info.desc.cookie_high);
1392                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1393                                                   info.desc.cookie_low);
1394                 switch (aq_opc) {
1395                 case i40e_aqc_opc_send_msg_to_vf:
1396                         if (msg_opc == VIRTCHNL_OP_EVENT)
1397                                 /* process event*/
1398                                 i40evf_handle_pf_event(dev, info.msg_buf,
1399                                                        info.msg_len);
1400                         else {
1401                                 /* read message and it's expected one */
1402                                 if (msg_opc == vf->pend_cmd) {
1403                                         vf->cmd_retval = msg_ret;
1404                                         /* prevent compiler reordering */
1405                                         rte_compiler_barrier();
1406                                         _clear_cmd(vf);
1407                                 } else
1408                                         PMD_DRV_LOG(ERR, "command mismatch,"
1409                                                 "expect %u, get %u",
1410                                                 vf->pend_cmd, msg_opc);
1411                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1412                                              " opcode = %d", msg_opc);
1413                         }
1414                         break;
1415                 default:
1416                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1417                                     aq_opc);
1418                         break;
1419                 }
1420         }
1421 }
1422
1423 /**
1424  * Interrupt handler triggered by NIC  for handling
1425  * specific interrupt. Only adminq interrupt is processed in VF.
1426  *
1427  * @param handle
1428  *  Pointer to interrupt handle.
1429  * @param param
1430  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1431  *
1432  * @return
1433  *  void
1434  */
1435 static void
1436 i40evf_dev_alarm_handler(void *param)
1437 {
1438         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1439         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1440         uint32_t icr0;
1441
1442         i40evf_disable_irq0(hw);
1443
1444         /* read out interrupt causes */
1445         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1446
1447         /* No interrupt event indicated */
1448         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1449                 goto done;
1450
1451         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1452                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1453                 i40evf_handle_aq_msg(dev);
1454         }
1455
1456         /* Link Status Change interrupt */
1457         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1458                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1459                                    " do nothing");
1460
1461 done:
1462         i40evf_enable_irq0(hw);
1463         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1464                           i40evf_dev_alarm_handler, dev);
1465 }
1466
1467 static int
1468 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1469 {
1470         struct i40e_hw *hw
1471                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1472         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1473
1474         PMD_INIT_FUNC_TRACE();
1475
1476         /* assign ops func pointer */
1477         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1478         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1479         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1480
1481         /*
1482          * For secondary processes, we don't initialise any further as primary
1483          * has already done this work.
1484          */
1485         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1486                 i40e_set_rx_function(eth_dev);
1487                 i40e_set_tx_function(eth_dev);
1488                 return 0;
1489         }
1490         i40e_set_default_ptype_table(eth_dev);
1491         rte_eth_copy_pci_info(eth_dev, pci_dev);
1492
1493         hw->vendor_id = pci_dev->id.vendor_id;
1494         hw->device_id = pci_dev->id.device_id;
1495         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1496         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1497         hw->bus.device = pci_dev->addr.devid;
1498         hw->bus.func = pci_dev->addr.function;
1499         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1500         hw->adapter_stopped = 0;
1501         hw->adapter_closed = 0;
1502
1503         if(i40evf_init_vf(eth_dev) != 0) {
1504                 PMD_INIT_LOG(ERR, "Init vf failed");
1505                 return -1;
1506         }
1507
1508         i40e_set_default_pctype_table(eth_dev);
1509         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1510                           i40evf_dev_alarm_handler, eth_dev);
1511
1512         /* configure and enable device interrupt */
1513         i40evf_enable_irq0(hw);
1514
1515         /* copy mac addr */
1516         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1517                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1518                                 0);
1519         if (eth_dev->data->mac_addrs == NULL) {
1520                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1521                                 " store MAC addresses",
1522                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1523                 return -ENOMEM;
1524         }
1525         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1526                         &eth_dev->data->mac_addrs[0]);
1527
1528         return 0;
1529 }
1530
1531 static int
1532 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1533 {
1534         PMD_INIT_FUNC_TRACE();
1535
1536         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1537                 return -EPERM;
1538
1539         eth_dev->dev_ops = NULL;
1540         eth_dev->rx_pkt_burst = NULL;
1541         eth_dev->tx_pkt_burst = NULL;
1542
1543         if (i40evf_uninit_vf(eth_dev) != 0) {
1544                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1545                 return -1;
1546         }
1547
1548         return 0;
1549 }
1550
1551 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1552         struct rte_pci_device *pci_dev)
1553 {
1554         return rte_eth_dev_pci_generic_probe(pci_dev,
1555                 sizeof(struct i40e_adapter), i40evf_dev_init);
1556 }
1557
1558 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1559 {
1560         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1561 }
1562
1563 /*
1564  * virtual function driver struct
1565  */
1566 static struct rte_pci_driver rte_i40evf_pmd = {
1567         .id_table = pci_id_i40evf_map,
1568         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1569         .probe = eth_i40evf_pci_probe,
1570         .remove = eth_i40evf_pci_remove,
1571 };
1572
1573 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1574 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1575 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1576
1577 static int
1578 i40evf_dev_configure(struct rte_eth_dev *dev)
1579 {
1580         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1581         struct i40e_adapter *ad =
1582                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1583         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1584                                 dev->data->nb_tx_queues);
1585
1586         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1587          * allocation or vector Rx preconditions we will reset it.
1588          */
1589         ad->rx_bulk_alloc_allowed = true;
1590         ad->rx_vec_allowed = true;
1591         ad->tx_simple_allowed = true;
1592         ad->tx_vec_allowed = true;
1593
1594         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1595                 int ret = 0;
1596
1597                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1598                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1599                 ret = i40evf_request_queues(dev, num_queue_pairs);
1600                 if (ret != 0)
1601                         return ret;
1602
1603                 ret = i40evf_dev_reset(dev);
1604                 if (ret != 0)
1605                         return ret;
1606         }
1607
1608         return i40evf_init_vlan(dev);
1609 }
1610
1611 static int
1612 i40evf_init_vlan(struct rte_eth_dev *dev)
1613 {
1614         /* Apply vlan offload setting */
1615         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1616
1617         return 0;
1618 }
1619
1620 static int
1621 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1622 {
1623         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1624         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1625
1626         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1627                 return -ENOTSUP;
1628
1629         /* Vlan stripping setting */
1630         if (mask & ETH_VLAN_STRIP_MASK) {
1631                 /* Enable or disable VLAN stripping */
1632                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1633                         i40evf_enable_vlan_strip(dev);
1634                 else
1635                         i40evf_disable_vlan_strip(dev);
1636         }
1637
1638         return 0;
1639 }
1640
1641 static int
1642 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1643 {
1644         struct i40e_rx_queue *rxq;
1645         int err;
1646         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1647
1648         PMD_INIT_FUNC_TRACE();
1649
1650         rxq = dev->data->rx_queues[rx_queue_id];
1651
1652         err = i40e_alloc_rx_queue_mbufs(rxq);
1653         if (err) {
1654                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1655                 return err;
1656         }
1657
1658         rte_wmb();
1659
1660         /* Init the RX tail register. */
1661         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1662         I40EVF_WRITE_FLUSH(hw);
1663
1664         /* Ready to switch the queue on */
1665         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1666         if (err) {
1667                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1668                             rx_queue_id);
1669                 return err;
1670         }
1671         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1672
1673         return 0;
1674 }
1675
1676 static int
1677 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1678 {
1679         struct i40e_rx_queue *rxq;
1680         int err;
1681
1682         rxq = dev->data->rx_queues[rx_queue_id];
1683
1684         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1685         if (err) {
1686                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1687                             rx_queue_id);
1688                 return err;
1689         }
1690
1691         i40e_rx_queue_release_mbufs(rxq);
1692         i40e_reset_rx_queue(rxq);
1693         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1694
1695         return 0;
1696 }
1697
1698 static int
1699 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1700 {
1701         int err;
1702
1703         PMD_INIT_FUNC_TRACE();
1704
1705         /* Ready to switch the queue on */
1706         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1707         if (err) {
1708                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1709                             tx_queue_id);
1710                 return err;
1711         }
1712         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1713
1714         return 0;
1715 }
1716
1717 static int
1718 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1719 {
1720         struct i40e_tx_queue *txq;
1721         int err;
1722
1723         txq = dev->data->tx_queues[tx_queue_id];
1724
1725         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1726         if (err) {
1727                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1728                             tx_queue_id);
1729                 return err;
1730         }
1731
1732         i40e_tx_queue_release_mbufs(txq);
1733         i40e_reset_tx_queue(txq);
1734         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1735
1736         return 0;
1737 }
1738
1739 static int
1740 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1741 {
1742         int ret;
1743
1744         if (on)
1745                 ret = i40evf_add_vlan(dev, vlan_id);
1746         else
1747                 ret = i40evf_del_vlan(dev,vlan_id);
1748
1749         return ret;
1750 }
1751
1752 static int
1753 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1754 {
1755         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1756         struct rte_eth_dev_data *dev_data = dev->data;
1757         struct rte_pktmbuf_pool_private *mbp_priv;
1758         uint16_t buf_size, len;
1759
1760         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1761         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1762         I40EVF_WRITE_FLUSH(hw);
1763
1764         /* Calculate the maximum packet length allowed */
1765         mbp_priv = rte_mempool_get_priv(rxq->mp);
1766         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1767                                         RTE_PKTMBUF_HEADROOM);
1768         rxq->hs_mode = i40e_header_split_none;
1769         rxq->rx_hdr_len = 0;
1770         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1771         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1772         rxq->max_pkt_len = RTE_MIN(len,
1773                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1774
1775         /**
1776          * Check if the jumbo frame and maximum packet length are set correctly
1777          */
1778         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1779                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1780                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1781                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1782                                 "larger than %u and smaller than %u, as jumbo "
1783                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1784                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1785                         return I40E_ERR_CONFIG;
1786                 }
1787         } else {
1788                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1789                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1790                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1791                                 "larger than %u and smaller than %u, as jumbo "
1792                                 "frame is disabled",
1793                                 (uint32_t)RTE_ETHER_MIN_LEN,
1794                                 (uint32_t)RTE_ETHER_MAX_LEN);
1795                         return I40E_ERR_CONFIG;
1796                 }
1797         }
1798
1799         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1800             rxq->max_pkt_len > buf_size)
1801                 dev_data->scattered_rx = 1;
1802
1803         return 0;
1804 }
1805
1806 static int
1807 i40evf_rx_init(struct rte_eth_dev *dev)
1808 {
1809         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1810         uint16_t i;
1811         int ret = I40E_SUCCESS;
1812         struct i40e_rx_queue **rxq =
1813                 (struct i40e_rx_queue **)dev->data->rx_queues;
1814
1815         i40evf_config_rss(vf);
1816         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1817                 if (!rxq[i] || !rxq[i]->q_set)
1818                         continue;
1819                 ret = i40evf_rxq_init(dev, rxq[i]);
1820                 if (ret != I40E_SUCCESS)
1821                         break;
1822         }
1823         if (ret == I40E_SUCCESS)
1824                 i40e_set_rx_function(dev);
1825
1826         return ret;
1827 }
1828
1829 static void
1830 i40evf_tx_init(struct rte_eth_dev *dev)
1831 {
1832         uint16_t i;
1833         struct i40e_tx_queue **txq =
1834                 (struct i40e_tx_queue **)dev->data->tx_queues;
1835         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1836
1837         for (i = 0; i < dev->data->nb_tx_queues; i++)
1838                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1839
1840         i40e_set_tx_function(dev);
1841 }
1842
1843 static inline void
1844 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1845 {
1846         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1847         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1848         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1849
1850         if (!rte_intr_allow_others(intr_handle)) {
1851                 I40E_WRITE_REG(hw,
1852                                I40E_VFINT_DYN_CTL01,
1853                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1854                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1855                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1856                 I40EVF_WRITE_FLUSH(hw);
1857                 return;
1858         }
1859
1860         I40EVF_WRITE_FLUSH(hw);
1861 }
1862
1863 static inline void
1864 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1865 {
1866         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1867         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1868         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1869
1870         if (!rte_intr_allow_others(intr_handle)) {
1871                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1872                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1873                 I40EVF_WRITE_FLUSH(hw);
1874                 return;
1875         }
1876
1877         I40EVF_WRITE_FLUSH(hw);
1878 }
1879
1880 static int
1881 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1882 {
1883         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1884         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1885         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1886         uint16_t interval =
1887                 i40e_calc_itr_interval(0, 0);
1888         uint16_t msix_intr;
1889
1890         msix_intr = intr_handle->intr_vec[queue_id];
1891         if (msix_intr == I40E_MISC_VEC_ID)
1892                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1893                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1894                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1895                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1896                                (interval <<
1897                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1898         else
1899                 I40E_WRITE_REG(hw,
1900                                I40E_VFINT_DYN_CTLN1(msix_intr -
1901                                                     I40E_RX_VEC_START),
1902                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1903                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1904                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1905                                (interval <<
1906                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1907
1908         I40EVF_WRITE_FLUSH(hw);
1909
1910         return 0;
1911 }
1912
1913 static int
1914 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1915 {
1916         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1917         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1918         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1919         uint16_t msix_intr;
1920
1921         msix_intr = intr_handle->intr_vec[queue_id];
1922         if (msix_intr == I40E_MISC_VEC_ID)
1923                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1924         else
1925                 I40E_WRITE_REG(hw,
1926                                I40E_VFINT_DYN_CTLN1(msix_intr -
1927                                                     I40E_RX_VEC_START),
1928                                0);
1929
1930         I40EVF_WRITE_FLUSH(hw);
1931
1932         return 0;
1933 }
1934
1935 static void
1936 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1937 {
1938         struct virtchnl_ether_addr_list *list;
1939         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1940         int err, i, j;
1941         int next_begin = 0;
1942         int begin = 0;
1943         uint32_t len;
1944         struct rte_ether_addr *addr;
1945         struct vf_cmd_info args;
1946
1947         do {
1948                 j = 0;
1949                 len = sizeof(struct virtchnl_ether_addr_list);
1950                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1951                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
1952                                 continue;
1953                         len += sizeof(struct virtchnl_ether_addr);
1954                         if (len >= I40E_AQ_BUF_SZ) {
1955                                 next_begin = i + 1;
1956                                 break;
1957                         }
1958                 }
1959
1960                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1961                 if (!list) {
1962                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1963                         return;
1964                 }
1965
1966                 for (i = begin; i < next_begin; i++) {
1967                         addr = &dev->data->mac_addrs[i];
1968                         if (rte_is_zero_ether_addr(addr))
1969                                 continue;
1970                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1971                                          sizeof(addr->addr_bytes));
1972                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1973                                     addr->addr_bytes[0], addr->addr_bytes[1],
1974                                     addr->addr_bytes[2], addr->addr_bytes[3],
1975                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1976                         j++;
1977                 }
1978                 list->vsi_id = vf->vsi_res->vsi_id;
1979                 list->num_elements = j;
1980                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1981                            VIRTCHNL_OP_DEL_ETH_ADDR;
1982                 args.in_args = (uint8_t *)list;
1983                 args.in_args_size = len;
1984                 args.out_buffer = vf->aq_resp;
1985                 args.out_size = I40E_AQ_BUF_SZ;
1986                 err = i40evf_execute_vf_cmd(dev, &args);
1987                 if (err) {
1988                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1989                                     add ? "OP_ADD_ETHER_ADDRESS" :
1990                                     "OP_DEL_ETHER_ADDRESS");
1991                 } else {
1992                         if (add)
1993                                 vf->vsi.mac_num++;
1994                         else
1995                                 vf->vsi.mac_num--;
1996                 }
1997                 rte_free(list);
1998                 begin = next_begin;
1999         } while (begin < I40E_NUM_MACADDR_MAX);
2000 }
2001
2002 static int
2003 i40evf_dev_start(struct rte_eth_dev *dev)
2004 {
2005         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2006         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2007         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2008         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2009         uint32_t intr_vector = 0;
2010
2011         PMD_INIT_FUNC_TRACE();
2012
2013         hw->adapter_stopped = 0;
2014
2015         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2016         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2017                                         dev->data->nb_tx_queues);
2018
2019         /* check and configure queue intr-vector mapping */
2020         if (rte_intr_cap_multiple(intr_handle) &&
2021             dev->data->dev_conf.intr_conf.rxq) {
2022                 intr_vector = dev->data->nb_rx_queues;
2023                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2024                         return -1;
2025         }
2026
2027         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2028                 intr_handle->intr_vec =
2029                         rte_zmalloc("intr_vec",
2030                                     dev->data->nb_rx_queues * sizeof(int), 0);
2031                 if (!intr_handle->intr_vec) {
2032                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2033                                      " intr_vec", dev->data->nb_rx_queues);
2034                         return -ENOMEM;
2035                 }
2036         }
2037
2038         if (i40evf_rx_init(dev) != 0){
2039                 PMD_DRV_LOG(ERR, "failed to do RX init");
2040                 return -1;
2041         }
2042
2043         i40evf_tx_init(dev);
2044
2045         if (i40evf_configure_vsi_queues(dev) != 0) {
2046                 PMD_DRV_LOG(ERR, "configure queues failed");
2047                 goto err_queue;
2048         }
2049         if (i40evf_config_irq_map(dev)) {
2050                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2051                 goto err_queue;
2052         }
2053
2054         /* Set all mac addrs */
2055         i40evf_add_del_all_mac_addr(dev, TRUE);
2056         /* Set all multicast addresses */
2057         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2058                                 TRUE);
2059
2060         if (i40evf_start_queues(dev) != 0) {
2061                 PMD_DRV_LOG(ERR, "enable queues failed");
2062                 goto err_mac;
2063         }
2064
2065         /* only enable interrupt in rx interrupt mode */
2066         if (dev->data->dev_conf.intr_conf.rxq != 0)
2067                 rte_intr_enable(intr_handle);
2068
2069         i40evf_enable_queues_intr(dev);
2070
2071         return 0;
2072
2073 err_mac:
2074         i40evf_add_del_all_mac_addr(dev, FALSE);
2075         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2076                                 FALSE);
2077 err_queue:
2078         return -1;
2079 }
2080
2081 static void
2082 i40evf_dev_stop(struct rte_eth_dev *dev)
2083 {
2084         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2085         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2086         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2087         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2088
2089         PMD_INIT_FUNC_TRACE();
2090
2091         if (dev->data->dev_conf.intr_conf.rxq != 0)
2092                 rte_intr_disable(intr_handle);
2093
2094         if (hw->adapter_stopped == 1)
2095                 return;
2096         i40evf_stop_queues(dev);
2097         i40evf_disable_queues_intr(dev);
2098         i40e_dev_clear_queues(dev);
2099
2100         /* Clean datapath event and queue/vec mapping */
2101         rte_intr_efd_disable(intr_handle);
2102         if (intr_handle->intr_vec) {
2103                 rte_free(intr_handle->intr_vec);
2104                 intr_handle->intr_vec = NULL;
2105         }
2106         /* remove all mac addrs */
2107         i40evf_add_del_all_mac_addr(dev, FALSE);
2108         /* remove all multicast addresses */
2109         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2110                                 FALSE);
2111         hw->adapter_stopped = 1;
2112
2113 }
2114
2115 static int
2116 i40evf_dev_link_update(struct rte_eth_dev *dev,
2117                        __rte_unused int wait_to_complete)
2118 {
2119         struct rte_eth_link new_link;
2120         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2121         /*
2122          * DPDK pf host provide interfacet to acquire link status
2123          * while Linux driver does not
2124          */
2125
2126         memset(&new_link, 0, sizeof(new_link));
2127         /* Linux driver PF host */
2128         switch (vf->link_speed) {
2129         case I40E_LINK_SPEED_100MB:
2130                 new_link.link_speed = ETH_SPEED_NUM_100M;
2131                 break;
2132         case I40E_LINK_SPEED_1GB:
2133                 new_link.link_speed = ETH_SPEED_NUM_1G;
2134                 break;
2135         case I40E_LINK_SPEED_10GB:
2136                 new_link.link_speed = ETH_SPEED_NUM_10G;
2137                 break;
2138         case I40E_LINK_SPEED_20GB:
2139                 new_link.link_speed = ETH_SPEED_NUM_20G;
2140                 break;
2141         case I40E_LINK_SPEED_25GB:
2142                 new_link.link_speed = ETH_SPEED_NUM_25G;
2143                 break;
2144         case I40E_LINK_SPEED_40GB:
2145                 new_link.link_speed = ETH_SPEED_NUM_40G;
2146                 break;
2147         default:
2148                 new_link.link_speed = ETH_SPEED_NUM_100M;
2149                 break;
2150         }
2151         /* full duplex only */
2152         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2153         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2154                                              ETH_LINK_DOWN;
2155         new_link.link_autoneg =
2156                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2157
2158         return rte_eth_linkstatus_set(dev, &new_link);
2159 }
2160
2161 static int
2162 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2163 {
2164         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2165         int ret;
2166
2167         /* If enabled, just return */
2168         if (vf->promisc_unicast_enabled)
2169                 return 0;
2170
2171         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2172         if (ret == 0)
2173                 vf->promisc_unicast_enabled = TRUE;
2174         else
2175                 ret = -EAGAIN;
2176
2177         return ret;
2178 }
2179
2180 static int
2181 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2182 {
2183         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2184         int ret;
2185
2186         /* If disabled, just return */
2187         if (!vf->promisc_unicast_enabled)
2188                 return 0;
2189
2190         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2191         if (ret == 0)
2192                 vf->promisc_unicast_enabled = FALSE;
2193         else
2194                 ret = -EAGAIN;
2195
2196         return ret;
2197 }
2198
2199 static void
2200 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2201 {
2202         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2203         int ret;
2204
2205         /* If enabled, just return */
2206         if (vf->promisc_multicast_enabled)
2207                 return;
2208
2209         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2210         if (ret == 0)
2211                 vf->promisc_multicast_enabled = TRUE;
2212 }
2213
2214 static void
2215 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2216 {
2217         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2218         int ret;
2219
2220         /* If enabled, just return */
2221         if (!vf->promisc_multicast_enabled)
2222                 return;
2223
2224         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2225         if (ret == 0)
2226                 vf->promisc_multicast_enabled = FALSE;
2227 }
2228
2229 static int
2230 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2231 {
2232         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2233
2234         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2235         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2236         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2237         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2238         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2239         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2240         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2241         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2242         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2243         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2244         dev_info->rx_queue_offload_capa = 0;
2245         dev_info->rx_offload_capa =
2246                 DEV_RX_OFFLOAD_VLAN_STRIP |
2247                 DEV_RX_OFFLOAD_QINQ_STRIP |
2248                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2249                 DEV_RX_OFFLOAD_UDP_CKSUM |
2250                 DEV_RX_OFFLOAD_TCP_CKSUM |
2251                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2252                 DEV_RX_OFFLOAD_SCATTER |
2253                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2254                 DEV_RX_OFFLOAD_VLAN_FILTER;
2255
2256         dev_info->tx_queue_offload_capa = 0;
2257         dev_info->tx_offload_capa =
2258                 DEV_TX_OFFLOAD_VLAN_INSERT |
2259                 DEV_TX_OFFLOAD_QINQ_INSERT |
2260                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2261                 DEV_TX_OFFLOAD_UDP_CKSUM |
2262                 DEV_TX_OFFLOAD_TCP_CKSUM |
2263                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2264                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2265                 DEV_TX_OFFLOAD_TCP_TSO |
2266                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2267                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2268                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2269                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2270                 DEV_TX_OFFLOAD_MULTI_SEGS;
2271
2272         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2273                 .rx_thresh = {
2274                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2275                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2276                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2277                 },
2278                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2279                 .rx_drop_en = 0,
2280                 .offloads = 0,
2281         };
2282
2283         dev_info->default_txconf = (struct rte_eth_txconf) {
2284                 .tx_thresh = {
2285                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2286                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2287                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2288                 },
2289                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2290                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2291                 .offloads = 0,
2292         };
2293
2294         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2295                 .nb_max = I40E_MAX_RING_DESC,
2296                 .nb_min = I40E_MIN_RING_DESC,
2297                 .nb_align = I40E_ALIGN_RING_DESC,
2298         };
2299
2300         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2301                 .nb_max = I40E_MAX_RING_DESC,
2302                 .nb_min = I40E_MIN_RING_DESC,
2303                 .nb_align = I40E_ALIGN_RING_DESC,
2304         };
2305
2306         return 0;
2307 }
2308
2309 static int
2310 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2311 {
2312         int ret;
2313         struct i40e_eth_stats *pstats = NULL;
2314         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2315         struct i40e_vsi *vsi = &vf->vsi;
2316
2317         ret = i40evf_query_stats(dev, &pstats);
2318         if (ret == 0) {
2319                 i40evf_update_stats(vsi, pstats);
2320
2321                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2322                                                 pstats->rx_broadcast;
2323                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2324                                                 pstats->tx_unicast;
2325                 stats->imissed = pstats->rx_discards;
2326                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2327                 stats->ibytes = pstats->rx_bytes;
2328                 stats->obytes = pstats->tx_bytes;
2329         } else {
2330                 PMD_DRV_LOG(ERR, "Get statistics failed");
2331         }
2332         return ret;
2333 }
2334
2335 static void
2336 i40evf_dev_close(struct rte_eth_dev *dev)
2337 {
2338         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2339
2340         i40evf_dev_stop(dev);
2341         i40e_dev_free_queues(dev);
2342         /*
2343          * disable promiscuous mode before reset vf
2344          * it is a workaround solution when work with kernel driver
2345          * and it is not the normal way
2346          */
2347         i40evf_dev_promiscuous_disable(dev);
2348         i40evf_dev_allmulticast_disable(dev);
2349         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2350
2351         i40evf_reset_vf(dev);
2352         i40e_shutdown_adminq(hw);
2353         i40evf_disable_irq0(hw);
2354         hw->adapter_closed = 1;
2355 }
2356
2357 /*
2358  * Reset VF device only to re-initialize resources in PMD layer
2359  */
2360 static int
2361 i40evf_dev_reset(struct rte_eth_dev *dev)
2362 {
2363         int ret;
2364
2365         ret = i40evf_dev_uninit(dev);
2366         if (ret)
2367                 return ret;
2368
2369         ret = i40evf_dev_init(dev);
2370
2371         return ret;
2372 }
2373
2374 static int
2375 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2376 {
2377         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2378         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2379         int ret;
2380
2381         if (!lut)
2382                 return -EINVAL;
2383
2384         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2385                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2386                                           lut, lut_size);
2387                 if (ret) {
2388                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2389                         return ret;
2390                 }
2391         } else {
2392                 uint32_t *lut_dw = (uint32_t *)lut;
2393                 uint16_t i, lut_size_dw = lut_size / 4;
2394
2395                 for (i = 0; i < lut_size_dw; i++)
2396                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2397         }
2398
2399         return 0;
2400 }
2401
2402 static int
2403 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2404 {
2405         struct i40e_vf *vf;
2406         struct i40e_hw *hw;
2407         int ret;
2408
2409         if (!vsi || !lut)
2410                 return -EINVAL;
2411
2412         vf = I40E_VSI_TO_VF(vsi);
2413         hw = I40E_VSI_TO_HW(vsi);
2414
2415         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2416                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2417                                           lut, lut_size);
2418                 if (ret) {
2419                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2420                         return ret;
2421                 }
2422         } else {
2423                 uint32_t *lut_dw = (uint32_t *)lut;
2424                 uint16_t i, lut_size_dw = lut_size / 4;
2425
2426                 for (i = 0; i < lut_size_dw; i++)
2427                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2428                 I40EVF_WRITE_FLUSH(hw);
2429         }
2430
2431         return 0;
2432 }
2433
2434 static int
2435 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2436                            struct rte_eth_rss_reta_entry64 *reta_conf,
2437                            uint16_t reta_size)
2438 {
2439         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2440         uint8_t *lut;
2441         uint16_t i, idx, shift;
2442         int ret;
2443
2444         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2445                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2446                         "(%d) doesn't match the number of hardware can "
2447                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2448                 return -EINVAL;
2449         }
2450
2451         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2452         if (!lut) {
2453                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2454                 return -ENOMEM;
2455         }
2456         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2457         if (ret)
2458                 goto out;
2459         for (i = 0; i < reta_size; i++) {
2460                 idx = i / RTE_RETA_GROUP_SIZE;
2461                 shift = i % RTE_RETA_GROUP_SIZE;
2462                 if (reta_conf[idx].mask & (1ULL << shift))
2463                         lut[i] = reta_conf[idx].reta[shift];
2464         }
2465         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2466
2467 out:
2468         rte_free(lut);
2469
2470         return ret;
2471 }
2472
2473 static int
2474 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2475                           struct rte_eth_rss_reta_entry64 *reta_conf,
2476                           uint16_t reta_size)
2477 {
2478         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2479         uint16_t i, idx, shift;
2480         uint8_t *lut;
2481         int ret;
2482
2483         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2484                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2485                         "(%d) doesn't match the number of hardware can "
2486                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2487                 return -EINVAL;
2488         }
2489
2490         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2491         if (!lut) {
2492                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2493                 return -ENOMEM;
2494         }
2495
2496         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2497         if (ret)
2498                 goto out;
2499         for (i = 0; i < reta_size; i++) {
2500                 idx = i / RTE_RETA_GROUP_SIZE;
2501                 shift = i % RTE_RETA_GROUP_SIZE;
2502                 if (reta_conf[idx].mask & (1ULL << shift))
2503                         reta_conf[idx].reta[shift] = lut[i];
2504         }
2505
2506 out:
2507         rte_free(lut);
2508
2509         return ret;
2510 }
2511
2512 static int
2513 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2514 {
2515         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2516         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2517         int ret = 0;
2518
2519         if (!key || key_len == 0) {
2520                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2521                 return 0;
2522         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2523                 sizeof(uint32_t)) {
2524                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2525                 return -EINVAL;
2526         }
2527
2528         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2529                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2530                         (struct i40e_aqc_get_set_rss_key_data *)key;
2531
2532                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2533                 if (ret)
2534                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2535                                      "via AQ");
2536         } else {
2537                 uint32_t *hash_key = (uint32_t *)key;
2538                 uint16_t i;
2539
2540                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2541                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2542                 I40EVF_WRITE_FLUSH(hw);
2543         }
2544
2545         return ret;
2546 }
2547
2548 static int
2549 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2550 {
2551         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2552         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2553         int ret;
2554
2555         if (!key || !key_len)
2556                 return -EINVAL;
2557
2558         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2559                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2560                         (struct i40e_aqc_get_set_rss_key_data *)key);
2561                 if (ret) {
2562                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2563                         return ret;
2564                 }
2565         } else {
2566                 uint32_t *key_dw = (uint32_t *)key;
2567                 uint16_t i;
2568
2569                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2570                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2571         }
2572         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2573
2574         return 0;
2575 }
2576
2577 static int
2578 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2579 {
2580         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2581         uint64_t hena;
2582         int ret;
2583
2584         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2585                                  rss_conf->rss_key_len);
2586         if (ret)
2587                 return ret;
2588
2589         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2590         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2591         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2592         I40EVF_WRITE_FLUSH(hw);
2593
2594         return 0;
2595 }
2596
2597 static void
2598 i40evf_disable_rss(struct i40e_vf *vf)
2599 {
2600         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2601
2602         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2603         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2604         I40EVF_WRITE_FLUSH(hw);
2605 }
2606
2607 static int
2608 i40evf_config_rss(struct i40e_vf *vf)
2609 {
2610         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2611         struct rte_eth_rss_conf rss_conf;
2612         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2613         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2614         uint16_t num;
2615         uint8_t *lut_info;
2616         int ret;
2617
2618         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2619                 i40evf_disable_rss(vf);
2620                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2621                 return 0;
2622         }
2623
2624         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2625         /* Fill out the look up table */
2626         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2627                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2628                         if (j >= num)
2629                                 j = 0;
2630                         lut = (lut << 8) | j;
2631                         if ((i & 3) == 3)
2632                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2633                 }
2634         } else {
2635                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2636                 if (!lut_info) {
2637                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2638                         return -ENOMEM;
2639                 }
2640
2641                 for (i = 0; i < rss_lut_size; i++)
2642                         lut_info[i] = i % vf->num_queue_pairs;
2643
2644                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2645                                          rss_lut_size);
2646                 rte_free(lut_info);
2647                 if (ret)
2648                         return ret;
2649         }
2650
2651         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2652         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2653                 i40evf_disable_rss(vf);
2654                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2655                 return 0;
2656         }
2657
2658         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2659                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2660                 /* Calculate the default hash key */
2661                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2662                         rss_key_default[i] = (uint32_t)rte_rand();
2663                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2664                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2665                         sizeof(uint32_t);
2666         }
2667
2668         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2669 }
2670
2671 static int
2672 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2673                            struct rte_eth_rss_conf *rss_conf)
2674 {
2675         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2676         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2677         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2678         uint64_t hena;
2679
2680         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2681         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2682
2683         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2684                 if (rss_hf != 0) /* Enable RSS */
2685                         return -EINVAL;
2686                 return 0;
2687         }
2688
2689         /* RSS enabled */
2690         if (rss_hf == 0) /* Disable RSS */
2691                 return -EINVAL;
2692
2693         return i40evf_hw_rss_hash_set(vf, rss_conf);
2694 }
2695
2696 static int
2697 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2698                              struct rte_eth_rss_conf *rss_conf)
2699 {
2700         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2701         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2702         uint64_t hena;
2703
2704         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2705                            &rss_conf->rss_key_len);
2706
2707         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2708         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2709         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2710
2711         return 0;
2712 }
2713
2714 static int
2715 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2716 {
2717         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2718         struct rte_eth_dev_data *dev_data = vf->dev_data;
2719         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2720         int ret = 0;
2721
2722         /* check if mtu is within the allowed range */
2723         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2724                 return -EINVAL;
2725
2726         /* mtu setting is forbidden if port is start */
2727         if (dev_data->dev_started) {
2728                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2729                             dev_data->port_id);
2730                 return -EBUSY;
2731         }
2732
2733         if (frame_size > RTE_ETHER_MAX_LEN)
2734                 dev_data->dev_conf.rxmode.offloads |=
2735                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2736         else
2737                 dev_data->dev_conf.rxmode.offloads &=
2738                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2739         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2740
2741         return ret;
2742 }
2743
2744 static int
2745 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2746                             struct rte_ether_addr *mac_addr)
2747 {
2748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2749         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2750
2751         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2752                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2753                 return -EINVAL;
2754         }
2755
2756         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2757                 return -EPERM;
2758
2759         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2760
2761         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2762                 return -EIO;
2763
2764         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2765         return 0;
2766 }
2767
2768 static int
2769 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2770                         struct rte_ether_addr *mc_addrs,
2771                         uint32_t mc_addrs_num, bool add)
2772 {
2773         struct virtchnl_ether_addr_list *list;
2774         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2775         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2776                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2777         uint32_t i;
2778         int err;
2779         struct vf_cmd_info args;
2780
2781         if (mc_addrs == NULL || mc_addrs_num == 0)
2782                 return 0;
2783
2784         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2785                 return -EINVAL;
2786
2787         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2788         list->vsi_id = vf->vsi_res->vsi_id;
2789         list->num_elements = mc_addrs_num;
2790
2791         for (i = 0; i < mc_addrs_num; i++) {
2792                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2793                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2794                                     mc_addrs[i].addr_bytes[0],
2795                                     mc_addrs[i].addr_bytes[1],
2796                                     mc_addrs[i].addr_bytes[2],
2797                                     mc_addrs[i].addr_bytes[3],
2798                                     mc_addrs[i].addr_bytes[4],
2799                                     mc_addrs[i].addr_bytes[5]);
2800                         return -EINVAL;
2801                 }
2802
2803                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2804                         sizeof(list->list[i].addr));
2805         }
2806
2807         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2808         args.in_args = cmd_buffer;
2809         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2810                 i * sizeof(struct virtchnl_ether_addr);
2811         args.out_buffer = vf->aq_resp;
2812         args.out_size = I40E_AQ_BUF_SZ;
2813         err = i40evf_execute_vf_cmd(dev, &args);
2814         if (err) {
2815                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2816                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2817                 return err;
2818         }
2819
2820         return 0;
2821 }
2822
2823 static int
2824 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2825                         struct rte_ether_addr *mc_addrs,
2826                         uint32_t mc_addrs_num)
2827 {
2828         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2829         int err;
2830
2831         /* flush previous addresses */
2832         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2833                                 FALSE);
2834         if (err)
2835                 return err;
2836
2837         vf->mc_addrs_num = 0;
2838
2839         /* add new ones */
2840         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2841                                         TRUE);
2842         if (err)
2843                 return err;
2844
2845         vf->mc_addrs_num = mc_addrs_num;
2846         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2847
2848         return 0;
2849 }
2850
2851 bool
2852 is_i40evf_supported(struct rte_eth_dev *dev)
2853 {
2854         return is_device_supported(dev, &rte_i40evf_pmd);
2855 }