drivers/net/iavf/iavf_rxtx_vec_sse.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Intel Corporation
   3  */
   4
   5 #include <stdint.h>
   6 #include <rte_ethdev_driver.h>
   7 #include <rte_malloc.h>
   8
   9 #include "iavf.h"
  10 #include "iavf_rxtx.h"
  11 #include "iavf_rxtx_vec_common.h"
  12
  13 #include <tmmintrin.h>
  14
  15 #ifndef __INTEL_COMPILER
  16 #pragma GCC diagnostic ignored "-Wcast-qual"
  17 #endif
  18
  19 static inline void
  20 iavf_rxq_rearm(struct iavf_rx_queue *rxq)
  21 {
  22         int i;
  23         uint16_t rx_id;
  24
  25         volatile union iavf_rx_desc *rxdp;
  26         struct rte_mbuf **rxp = &rxq->sw_ring[rxq->rxrearm_start];
  27         struct rte_mbuf *mb0, *mb1;
  28         __m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM,
  29                         RTE_PKTMBUF_HEADROOM);
  30         __m128i dma_addr0, dma_addr1;
  31
  32         rxdp = rxq->rx_ring + rxq->rxrearm_start;
  33
  34         /* Pull 'n' more MBUFs into the software ring */
  35         if (rte_mempool_get_bulk(rxq->mp, (void *)rxp,
  36                                  rxq->rx_free_thresh) < 0) {
  37                 if (rxq->rxrearm_nb + rxq->rx_free_thresh >= rxq->nb_rx_desc) {
  38                         dma_addr0 = _mm_setzero_si128();
  39                         for (i = 0; i < IAVF_VPMD_DESCS_PER_LOOP; i++) {
  40                                 rxp[i] = &rxq->fake_mbuf;
  41                                 _mm_store_si128((__m128i *)&rxdp[i].read,
  42                                                 dma_addr0);
  43                         }
  44                 }
  45                 rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
  46                         rxq->rx_free_thresh;
  47                 return;
  48         }
  49
  50         /* Initialize the mbufs in vector, process 2 mbufs in one loop */
  51         for (i = 0; i < rxq->rx_free_thresh; i += 2, rxp += 2) {
  52                 __m128i vaddr0, vaddr1;
  53
  54                 mb0 = rxp[0];
  55                 mb1 = rxp[1];
  56
  57                 /* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */
  58                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=
  59                                 offsetof(struct rte_mbuf, buf_addr) + 8);
  60                 vaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);
  61                 vaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);
  62
  63                 /* convert pa to dma_addr hdr/data */
  64                 dma_addr0 = _mm_unpackhi_epi64(vaddr0, vaddr0);
  65                 dma_addr1 = _mm_unpackhi_epi64(vaddr1, vaddr1);
  66
  67                 /* add headroom to pa values */
  68                 dma_addr0 = _mm_add_epi64(dma_addr0, hdr_room);
  69                 dma_addr1 = _mm_add_epi64(dma_addr1, hdr_room);
  70
  71                 /* flush desc with pa dma_addr */
  72                 _mm_store_si128((__m128i *)&rxdp++->read, dma_addr0);
  73                 _mm_store_si128((__m128i *)&rxdp++->read, dma_addr1);
  74         }
  75
  76         rxq->rxrearm_start += rxq->rx_free_thresh;
  77         if (rxq->rxrearm_start >= rxq->nb_rx_desc)
  78                 rxq->rxrearm_start = 0;
  79
  80         rxq->rxrearm_nb -= rxq->rx_free_thresh;
  81
  82         rx_id = (uint16_t)((rxq->rxrearm_start == 0) ?
  83                            (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));
  84
  85         PMD_RX_LOG(DEBUG, "port_id=%u queue_id=%u rx_tail=%u "
  86                    "rearm_start=%u rearm_nb=%u",
  87                    rxq->port_id, rxq->queue_id,
  88                    rx_id, rxq->rxrearm_start, rxq->rxrearm_nb);
  89
  90         /* Update the tail pointer on the NIC */
  91         IAVF_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
  92 }
  93
  94 static inline void
  95 desc_to_olflags_v(struct iavf_rx_queue *rxq, __m128i descs[4],
  96                   struct rte_mbuf **rx_pkts)
  97 {
  98         const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
  99         __m128i rearm0, rearm1, rearm2, rearm3;
 100
 101         __m128i vlan0, vlan1, rss, l3_l4e;
 102
 103         /* mask everything except RSS, flow director and VLAN flags
 104          * bit2 is for VLAN tag, bit11 for flow director indication
 105          * bit13:12 for RSS indication.
 106          */
 107         const __m128i rss_vlan_msk = _mm_set_epi32(
 108                         0x1c03804, 0x1c03804, 0x1c03804, 0x1c03804);
 109
 110         const __m128i cksum_mask = _mm_set_epi32(
 111                         PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |
 112                         PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |
 113                         PKT_RX_EIP_CKSUM_BAD,
 114                         PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |
 115                         PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |
 116                         PKT_RX_EIP_CKSUM_BAD,
 117                         PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |
 118                         PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |
 119                         PKT_RX_EIP_CKSUM_BAD,
 120                         PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |
 121                         PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |
 122                         PKT_RX_EIP_CKSUM_BAD);
 123
 124         /* map rss and vlan type to rss hash and vlan flag */
 125         const __m128i vlan_flags = _mm_set_epi8(0, 0, 0, 0,
 126                         0, 0, 0, 0,
 127                         0, 0, 0, PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
 128                         0, 0, 0, 0);
 129
 130         const __m128i rss_flags = _mm_set_epi8(0, 0, 0, 0,
 131                         0, 0, 0, 0,
 132                         PKT_RX_RSS_HASH | PKT_RX_FDIR, PKT_RX_RSS_HASH, 0, 0,
 133                         0, 0, PKT_RX_FDIR, 0);
 134
 135         const __m128i l3_l4e_flags = _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0,
 136                         /* shift right 1 bit to make sure it not exceed 255 */
 137                         (PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD |
 138                          PKT_RX_IP_CKSUM_BAD) >> 1,
 139                         (PKT_RX_IP_CKSUM_GOOD | PKT_RX_EIP_CKSUM_BAD |
 140                          PKT_RX_L4_CKSUM_BAD) >> 1,
 141                         (PKT_RX_EIP_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,
 142                         (PKT_RX_IP_CKSUM_GOOD | PKT_RX_EIP_CKSUM_BAD) >> 1,
 143                         (PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD) >> 1,
 144                         (PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD) >> 1,
 145                         PKT_RX_IP_CKSUM_BAD >> 1,
 146                         (PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD) >> 1);
 147
 148         vlan0 = _mm_unpackhi_epi32(descs[0], descs[1]);
 149         vlan1 = _mm_unpackhi_epi32(descs[2], descs[3]);
 150         vlan0 = _mm_unpacklo_epi64(vlan0, vlan1);
 151
 152         vlan1 = _mm_and_si128(vlan0, rss_vlan_msk);
 153         vlan0 = _mm_shuffle_epi8(vlan_flags, vlan1);
 154
 155         rss = _mm_srli_epi32(vlan1, 11);
 156         rss = _mm_shuffle_epi8(rss_flags, rss);
 157
 158         l3_l4e = _mm_srli_epi32(vlan1, 22);
 159         l3_l4e = _mm_shuffle_epi8(l3_l4e_flags, l3_l4e);
 160         /* then we shift left 1 bit */
 161         l3_l4e = _mm_slli_epi32(l3_l4e, 1);
 162         /* we need to mask out the reduntant bits */
 163         l3_l4e = _mm_and_si128(l3_l4e, cksum_mask);
 164
 165         vlan0 = _mm_or_si128(vlan0, rss);
 166         vlan0 = _mm_or_si128(vlan0, l3_l4e);
 167
 168         /* At this point, we have the 4 sets of flags in the low 16-bits
 169          * of each 32-bit value in vlan0.
 170          * We want to extract these, and merge them with the mbuf init data
 171          * so we can do a single 16-byte write to the mbuf to set the flags
 172          * and all the other initialization fields. Extracting the
 173          * appropriate flags means that we have to do a shift and blend for
 174          * each mbuf before we do the write.
 175          */
 176         rearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vlan0, 8), 0x10);
 177         rearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vlan0, 4), 0x10);
 178         rearm2 = _mm_blend_epi16(mbuf_init, vlan0, 0x10);
 179         rearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(vlan0, 4), 0x10);
 180
 181         /* write the rearm data and the olflags in one write */
 182         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) !=
 183                         offsetof(struct rte_mbuf, rearm_data) + 8);
 184         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=
 185                         RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16));
 186         _mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0);
 187         _mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1);
 188         _mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2);
 189         _mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3);
 190 }
 191
 192 #define PKTLEN_SHIFT     10
 193
 194 static inline void
 195 desc_to_ptype_v(__m128i descs[4], struct rte_mbuf **rx_pkts)
 196 {
 197         __m128i ptype0 = _mm_unpackhi_epi64(descs[0], descs[1]);
 198         __m128i ptype1 = _mm_unpackhi_epi64(descs[2], descs[3]);
 199         static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
 200                 /* [0] reserved */
 201                 [1] = RTE_PTYPE_L2_ETHER,
 202                 /* [2] - [21] reserved */
 203                 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 204                         RTE_PTYPE_L4_FRAG,
 205                 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 206                         RTE_PTYPE_L4_NONFRAG,
 207                 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 208                         RTE_PTYPE_L4_UDP,
 209                 /* [25] reserved */
 210                 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 211                         RTE_PTYPE_L4_TCP,
 212                 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 213                         RTE_PTYPE_L4_SCTP,
 214                 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
 215                         RTE_PTYPE_L4_ICMP,
 216                 /* All others reserved */
 217         };
 218
 219         ptype0 = _mm_srli_epi64(ptype0, 30);
 220         ptype1 = _mm_srli_epi64(ptype1, 30);
 221
 222         rx_pkts[0]->packet_type = type_table[_mm_extract_epi8(ptype0, 0)];
 223         rx_pkts[1]->packet_type = type_table[_mm_extract_epi8(ptype0, 8)];
 224         rx_pkts[2]->packet_type = type_table[_mm_extract_epi8(ptype1, 0)];
 225         rx_pkts[3]->packet_type = type_table[_mm_extract_epi8(ptype1, 8)];
 226 }
 227
 228 /* Notice:
 229  * - nb_pkts < IAVF_VPMD_DESCS_PER_LOOP, just return no packet
 230  * - nb_pkts > IAVF_VPMD_RX_MAX_BURST, only scan IAVF_VPMD_RX_MAX_BURST
 231  *   numbers of DD bits
 232  */
 233 static inline uint16_t
 234 _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 235                    uint16_t nb_pkts, uint8_t *split_packet)
 236 {
 237         volatile union iavf_rx_desc *rxdp;
 238         struct rte_mbuf **sw_ring;
 239         uint16_t nb_pkts_recd;
 240         int pos;
 241         uint64_t var;
 242         __m128i shuf_msk;
 243
 244         __m128i crc_adjust = _mm_set_epi16(
 245                                 0, 0, 0,    /* ignore non-length fields */
 246                                 -rxq->crc_len, /* sub crc on data_len */
 247                                 0,          /* ignore high-16bits of pkt_len */
 248                                 -rxq->crc_len, /* sub crc on pkt_len */
 249                                 0, 0            /* ignore pkt_type field */
 250                         );
 251         /* compile-time check the above crc_adjust layout is correct.
 252          * NOTE: the first field (lowest address) is given last in set_epi16
 253          * call above.
 254          */
 255         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
 256                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
 257         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
 258                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
 259         __m128i dd_check, eop_check;
 260
 261         /* nb_pkts shall be less equal than IAVF_VPMD_RX_MAX_BURST */
 262         nb_pkts = RTE_MIN(nb_pkts, IAVF_VPMD_RX_MAX_BURST);
 263
 264         /* nb_pkts has to be floor-aligned to IAVF_VPMD_DESCS_PER_LOOP */
 265         nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, IAVF_VPMD_DESCS_PER_LOOP);
 266
 267         /* Just the act of getting into the function from the application is
 268          * going to cost about 7 cycles
 269          */
 270         rxdp = rxq->rx_ring + rxq->rx_tail;
 271
 272         rte_prefetch0(rxdp);
 273
 274         /* See if we need to rearm the RX queue - gives the prefetch a bit
 275          * of time to act
 276          */
 277         if (rxq->rxrearm_nb > rxq->rx_free_thresh)
 278                 iavf_rxq_rearm(rxq);
 279
 280         /* Before we start moving massive data around, check to see if
 281          * there is actually a packet available
 282          */
 283         if (!(rxdp->wb.qword1.status_error_len &
 284               rte_cpu_to_le_32(1 << IAVF_RX_DESC_STATUS_DD_SHIFT)))
 285                 return 0;
 286
 287         /* 4 packets DD mask */
 288         dd_check = _mm_set_epi64x(0x0000000100000001LL, 0x0000000100000001LL);
 289
 290         /* 4 packets EOP mask */
 291         eop_check = _mm_set_epi64x(0x0000000200000002LL, 0x0000000200000002LL);
 292
 293         /* mask to shuffle from desc. to mbuf */
 294         shuf_msk = _mm_set_epi8(
 295                 7, 6, 5, 4,  /* octet 4~7, 32bits rss */
 296                 3, 2,        /* octet 2~3, low 16 bits vlan_macip */
 297                 15, 14,      /* octet 15~14, 16 bits data_len */
 298                 0xFF, 0xFF,  /* skip high 16 bits pkt_len, zero out */
 299                 15, 14,      /* octet 15~14, low 16 bits pkt_len */
 300                 0xFF, 0xFF, 0xFF, 0xFF /* pkt_type set as unknown */
 301                 );
 302         /* Compile-time verify the shuffle mask
 303          * NOTE: some field positions already verified above, but duplicated
 304          * here for completeness in case of future modifications.
 305          */
 306         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) !=
 307                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
 308         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
 309                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
 310         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
 311                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10);
 312         RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) !=
 313                         offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
 314
 315         /* Cache is empty -> need to scan the buffer rings, but first move
 316          * the next 'n' mbufs into the cache
 317          */
 318         sw_ring = &rxq->sw_ring[rxq->rx_tail];
 319
 320         /* A. load 4 packet in one loop
 321          * [A*. mask out 4 unused dirty field in desc]
 322          * B. copy 4 mbuf point from swring to rx_pkts
 323          * C. calc the number of DD bits among the 4 packets
 324          * [C*. extract the end-of-packet bit, if requested]
 325          * D. fill info. from desc to mbuf
 326          */
 327
 328         for (pos = 0, nb_pkts_recd = 0; pos < nb_pkts;
 329              pos += IAVF_VPMD_DESCS_PER_LOOP,
 330              rxdp += IAVF_VPMD_DESCS_PER_LOOP) {
 331                 __m128i descs[IAVF_VPMD_DESCS_PER_LOOP];
 332                 __m128i pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
 333                 __m128i zero, staterr, sterr_tmp1, sterr_tmp2;
 334                 /* 2 64 bit or 4 32 bit mbuf pointers in one XMM reg. */
 335                 __m128i mbp1;
 336 #if defined(RTE_ARCH_X86_64)
 337                 __m128i mbp2;
 338 #endif
 339
 340                 /* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */
 341                 mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
 342                 /* Read desc statuses backwards to avoid race condition */
 343                 /* A.1 load 4 pkts desc */
 344                 descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
 345                 rte_compiler_barrier();
 346
 347                 /* B.2 copy 2 64 bit or 4 32 bit mbuf point into rx_pkts */
 348                 _mm_storeu_si128((__m128i *)&rx_pkts[pos], mbp1);
 349
 350 #if defined(RTE_ARCH_X86_64)
 351                 /* B.1 load 2 64 bit mbuf points */
 352                 mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);
 353 #endif
 354
 355                 descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
 356                 rte_compiler_barrier();
 357                 /* B.1 load 2 mbuf point */
 358                 descs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));
 359                 rte_compiler_barrier();
 360                 descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
 361
 362 #if defined(RTE_ARCH_X86_64)
 363                 /* B.2 copy 2 mbuf point into rx_pkts  */
 364                 _mm_storeu_si128((__m128i *)&rx_pkts[pos + 2], mbp2);
 365 #endif
 366
 367                 if (split_packet) {
 368                         rte_mbuf_prefetch_part2(rx_pkts[pos]);
 369                         rte_mbuf_prefetch_part2(rx_pkts[pos + 1]);
 370                         rte_mbuf_prefetch_part2(rx_pkts[pos + 2]);
 371                         rte_mbuf_prefetch_part2(rx_pkts[pos + 3]);
 372                 }
 373
 374                 /* avoid compiler reorder optimization */
 375                 rte_compiler_barrier();
 376
 377                 /* pkt 3,4 shift the pktlen field to be 16-bit aligned*/
 378                 const __m128i len3 = _mm_slli_epi32(descs[3], PKTLEN_SHIFT);
 379                 const __m128i len2 = _mm_slli_epi32(descs[2], PKTLEN_SHIFT);
 380
 381                 /* merge the now-aligned packet length fields back in */
 382                 descs[3] = _mm_blend_epi16(descs[3], len3, 0x80);
 383                 descs[2] = _mm_blend_epi16(descs[2], len2, 0x80);
 384
 385                 /* D.1 pkt 3,4 convert format from desc to pktmbuf */
 386                 pkt_mb4 = _mm_shuffle_epi8(descs[3], shuf_msk);
 387                 pkt_mb3 = _mm_shuffle_epi8(descs[2], shuf_msk);
 388
 389                 /* C.1 4=>2 status err info only */
 390                 sterr_tmp2 = _mm_unpackhi_epi32(descs[3], descs[2]);
 391                 sterr_tmp1 = _mm_unpackhi_epi32(descs[1], descs[0]);
 392
 393                 desc_to_olflags_v(rxq, descs, &rx_pkts[pos]);
 394
 395                 /* D.2 pkt 3,4 set in_port/nb_seg and remove crc */
 396                 pkt_mb4 = _mm_add_epi16(pkt_mb4, crc_adjust);
 397                 pkt_mb3 = _mm_add_epi16(pkt_mb3, crc_adjust);
 398
 399                 /* pkt 1,2 shift the pktlen field to be 16-bit aligned*/
 400                 const __m128i len1 = _mm_slli_epi32(descs[1], PKTLEN_SHIFT);
 401                 const __m128i len0 = _mm_slli_epi32(descs[0], PKTLEN_SHIFT);
 402
 403                 /* merge the now-aligned packet length fields back in */
 404                 descs[1] = _mm_blend_epi16(descs[1], len1, 0x80);
 405                 descs[0] = _mm_blend_epi16(descs[0], len0, 0x80);
 406
 407                 /* D.1 pkt 1,2 convert format from desc to pktmbuf */
 408                 pkt_mb2 = _mm_shuffle_epi8(descs[1], shuf_msk);
 409                 pkt_mb1 = _mm_shuffle_epi8(descs[0], shuf_msk);
 410
 411                 /* C.2 get 4 pkts status err value  */
 412                 zero = _mm_xor_si128(dd_check, dd_check);
 413                 staterr = _mm_unpacklo_epi32(sterr_tmp1, sterr_tmp2);
 414
 415                 /* D.3 copy final 3,4 data to rx_pkts */
 416                 _mm_storeu_si128(
 417                         (void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,
 418                         pkt_mb4);
 419                 _mm_storeu_si128(
 420                         (void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,
 421                         pkt_mb3);
 422
 423                 /* D.2 pkt 1,2 remove crc */
 424                 pkt_mb2 = _mm_add_epi16(pkt_mb2, crc_adjust);
 425                 pkt_mb1 = _mm_add_epi16(pkt_mb1, crc_adjust);
 426
 427                 /* C* extract and record EOP bit */
 428                 if (split_packet) {
 429                         __m128i eop_shuf_mask = _mm_set_epi8(
 430                                         0xFF, 0xFF, 0xFF, 0xFF,
 431                                         0xFF, 0xFF, 0xFF, 0xFF,
 432                                         0xFF, 0xFF, 0xFF, 0xFF,
 433                                         0x04, 0x0C, 0x00, 0x08
 434                                         );
 435
 436                         /* and with mask to extract bits, flipping 1-0 */
 437                         __m128i eop_bits = _mm_andnot_si128(staterr, eop_check);
 438                         /* the staterr values are not in order, as the count
 439                          * count of dd bits doesn't care. However, for end of
 440                          * packet tracking, we do care, so shuffle. This also
 441                          * compresses the 32-bit values to 8-bit
 442                          */
 443                         eop_bits = _mm_shuffle_epi8(eop_bits, eop_shuf_mask);
 444                         /* store the resulting 32-bit value */
 445                         *(int *)split_packet = _mm_cvtsi128_si32(eop_bits);
 446                         split_packet += IAVF_VPMD_DESCS_PER_LOOP;
 447                 }
 448
 449                 /* C.3 calc available number of desc */
 450                 staterr = _mm_and_si128(staterr, dd_check);
 451                 staterr = _mm_packs_epi32(staterr, zero);
 452
 453                 /* D.3 copy final 1,2 data to rx_pkts */
 454                 _mm_storeu_si128(
 455                         (void *)&rx_pkts[pos + 1]->rx_descriptor_fields1,
 456                         pkt_mb2);
 457                 _mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,
 458                                  pkt_mb1);
 459                 desc_to_ptype_v(descs, &rx_pkts[pos]);
 460                 /* C.4 calc avaialbe number of desc */
 461                 var = __builtin_popcountll(_mm_cvtsi128_si64(staterr));
 462                 nb_pkts_recd += var;
 463                 if (likely(var != IAVF_VPMD_DESCS_PER_LOOP))
 464                         break;
 465         }
 466
 467         /* Update our internal tail pointer */
 468         rxq->rx_tail = (uint16_t)(rxq->rx_tail + nb_pkts_recd);
 469         rxq->rx_tail = (uint16_t)(rxq->rx_tail & (rxq->nb_rx_desc - 1));
 470         rxq->rxrearm_nb = (uint16_t)(rxq->rxrearm_nb + nb_pkts_recd);
 471
 472         return nb_pkts_recd;
 473 }
 474
 475 /* Notice:
 476  * - nb_pkts < IAVF_DESCS_PER_LOOP, just return no packet
 477  * - nb_pkts > IAVF_VPMD_RX_MAX_BURST, only scan IAVF_VPMD_RX_MAX_BURST
 478  *   numbers of DD bits
 479  */
 480 uint16_t
 481 iavf_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 482                   uint16_t nb_pkts)
 483 {
 484         return _recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL);
 485 }
 486
 487 /* vPMD receive routine that reassembles scattered packets
 488  * Notice:
 489  * - nb_pkts < IAVF_VPMD_DESCS_PER_LOOP, just return no packet
 490  * - nb_pkts > VPMD_RX_MAX_BURST, only scan IAVF_VPMD_RX_MAX_BURST
 491  *   numbers of DD bits
 492  */
 493 uint16_t
 494 iavf_recv_scattered_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 495                             uint16_t nb_pkts)
 496 {
 497         struct iavf_rx_queue *rxq = rx_queue;
 498         uint8_t split_flags[IAVF_VPMD_RX_MAX_BURST] = {0};
 499         unsigned int i = 0;
 500
 501         /* get some new buffers */
 502         uint16_t nb_bufs = _recv_raw_pkts_vec(rxq, rx_pkts, nb_pkts,
 503                                               split_flags);
 504         if (nb_bufs == 0)
 505                 return 0;
 506
 507         /* happy day case, full burst + no packets to be joined */
 508         const uint64_t *split_fl64 = (uint64_t *)split_flags;
 509
 510         if (!rxq->pkt_first_seg &&
 511             split_fl64[0] == 0 && split_fl64[1] == 0 &&
 512             split_fl64[2] == 0 && split_fl64[3] == 0)
 513                 return nb_bufs;
 514
 515         /* reassemble any packets that need reassembly*/
 516         if (!rxq->pkt_first_seg) {
 517                 /* find the first split flag, and only reassemble then*/
 518                 while (i < nb_bufs && !split_flags[i])
 519                         i++;
 520                 if (i == nb_bufs)
 521                         return nb_bufs;
 522                 rxq->pkt_first_seg = rx_pkts[i];
 523         }
 524         return i + reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i,
 525                 &split_flags[i]);
 526 }
 527
 528 static inline void
 529 vtx1(volatile struct iavf_tx_desc *txdp, struct rte_mbuf *pkt, uint64_t flags)
 530 {
 531         uint64_t high_qw =
 532                         (IAVF_TX_DESC_DTYPE_DATA |
 533                          ((uint64_t)flags  << IAVF_TXD_QW1_CMD_SHIFT) |
 534                          ((uint64_t)pkt->data_len <<
 535                           IAVF_TXD_QW1_TX_BUF_SZ_SHIFT));
 536
 537         __m128i descriptor = _mm_set_epi64x(high_qw,
 538                                             pkt->buf_iova + pkt->data_off);
 539         _mm_store_si128((__m128i *)txdp, descriptor);
 540 }
 541
 542 static inline void
 543 iavf_vtx(volatile struct iavf_tx_desc *txdp, struct rte_mbuf **pkt,
 544         uint16_t nb_pkts,  uint64_t flags)
 545 {
 546         int i;
 547
 548         for (i = 0; i < nb_pkts; ++i, ++txdp, ++pkt)
 549                 vtx1(txdp, *pkt, flags);
 550 }
 551
 552 uint16_t
 553 iavf_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
 554                          uint16_t nb_pkts)
 555 {
 556         struct iavf_tx_queue *txq = (struct iavf_tx_queue *)tx_queue;
 557         volatile struct iavf_tx_desc *txdp;
 558         struct iavf_tx_entry *txep;
 559         uint16_t n, nb_commit, tx_id;
 560         uint64_t flags = IAVF_TX_DESC_CMD_EOP | 0x04;  /* bit 2 must be set */
 561         uint64_t rs = IAVF_TX_DESC_CMD_RS | flags;
 562         int i;
 563
 564         /* cross rx_thresh boundary is not allowed */
 565         nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
 566
 567         if (txq->nb_free < txq->free_thresh)
 568                 iavf_tx_free_bufs(txq);
 569
 570         nb_pkts = (uint16_t)RTE_MIN(txq->nb_free, nb_pkts);
 571         if (unlikely(nb_pkts == 0))
 572                 return 0;
 573         nb_commit = nb_pkts;
 574
 575         tx_id = txq->tx_tail;
 576         txdp = &txq->tx_ring[tx_id];
 577         txep = &txq->sw_ring[tx_id];
 578
 579         txq->nb_free = (uint16_t)(txq->nb_free - nb_pkts);
 580
 581         n = (uint16_t)(txq->nb_tx_desc - tx_id);
 582         if (nb_commit >= n) {
 583                 tx_backlog_entry(txep, tx_pkts, n);
 584
 585                 for (i = 0; i < n - 1; ++i, ++tx_pkts, ++txdp)
 586                         vtx1(txdp, *tx_pkts, flags);
 587
 588                 vtx1(txdp, *tx_pkts++, rs);
 589
 590                 nb_commit = (uint16_t)(nb_commit - n);
 591
 592                 tx_id = 0;
 593                 txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
 594
 595                 /* avoid reach the end of ring */
 596                 txdp = &txq->tx_ring[tx_id];
 597                 txep = &txq->sw_ring[tx_id];
 598         }
 599
 600         tx_backlog_entry(txep, tx_pkts, nb_commit);
 601
 602         iavf_vtx(txdp, tx_pkts, nb_commit, flags);
 603
 604         tx_id = (uint16_t)(tx_id + nb_commit);
 605         if (tx_id > txq->next_rs) {
 606                 txq->tx_ring[txq->next_rs].cmd_type_offset_bsz |=
 607                         rte_cpu_to_le_64(((uint64_t)IAVF_TX_DESC_CMD_RS) <<
 608                                          IAVF_TXD_QW1_CMD_SHIFT);
 609                 txq->next_rs =
 610                         (uint16_t)(txq->next_rs + txq->rs_thresh);
 611         }
 612
 613         txq->tx_tail = tx_id;
 614
 615         PMD_TX_LOG(DEBUG, "port_id=%u queue_id=%u tx_tail=%u nb_pkts=%u",
 616                    txq->port_id, txq->queue_id, tx_id, nb_pkts);
 617
 618         IAVF_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);
 619
 620         return nb_pkts;
 621 }
 622
 623 uint16_t
 624 iavf_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
 625                    uint16_t nb_pkts)
 626 {
 627         uint16_t nb_tx = 0;
 628         struct iavf_tx_queue *txq = (struct iavf_tx_queue *)tx_queue;
 629
 630         while (nb_pkts) {
 631                 uint16_t ret, num;
 632
 633                 num = (uint16_t)RTE_MIN(nb_pkts, txq->rs_thresh);
 634                 ret = iavf_xmit_fixed_burst_vec(tx_queue, &tx_pkts[nb_tx], num);
 635                 nb_tx += ret;
 636                 nb_pkts -= ret;
 637                 if (ret < num)
 638                         break;
 639         }
 640
 641         return nb_tx;
 642 }
 643
 644 static void __attribute__((cold))
 645 iavf_rx_queue_release_mbufs_sse(struct iavf_rx_queue *rxq)
 646 {
 647         _iavf_rx_queue_release_mbufs_vec(rxq);
 648 }
 649
 650 static void __attribute__((cold))
 651 iavf_tx_queue_release_mbufs_sse(struct iavf_tx_queue *txq)
 652 {
 653         _iavf_tx_queue_release_mbufs_vec(txq);
 654 }
 655
 656 static const struct iavf_rxq_ops sse_vec_rxq_ops = {
 657         .release_mbufs = iavf_rx_queue_release_mbufs_sse,
 658 };
 659
 660 static const struct iavf_txq_ops sse_vec_txq_ops = {
 661         .release_mbufs = iavf_tx_queue_release_mbufs_sse,
 662 };
 663
 664 int __attribute__((cold))
 665 iavf_txq_vec_setup(struct iavf_tx_queue *txq)
 666 {
 667         txq->ops = &sse_vec_txq_ops;
 668         return 0;
 669 }
 670
 671 int __attribute__((cold))
 672 iavf_rxq_vec_setup(struct iavf_rx_queue *rxq)
 673 {
 674         rxq->ops = &sse_vec_rxq_ops;
 675         return iavf_rxq_vec_setup_default(rxq);
 676 }
 677
 678 int __attribute__((cold))
 679 iavf_rx_vec_dev_check(struct rte_eth_dev *dev)
 680 {
 681         return iavf_rx_vec_dev_check_default(dev);
 682 }
 683
 684 int __attribute__((cold))
 685 iavf_tx_vec_dev_check(struct rte_eth_dev *dev)
 686 {
 687         return iavf_tx_vec_dev_check_default(dev);
 688 }