drivers/net/ice/ice_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #include <rte_string_fns.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include <stdio.h>
   9 #include <sys/types.h>
  10 #include <sys/stat.h>
  11 #include <unistd.h>
  12
  13 #include "base/ice_sched.h"
  14 #include "base/ice_flow.h"
  15 #include "base/ice_dcb.h"
  16 #include "ice_ethdev.h"
  17 #include "ice_rxtx.h"
  18 #include "ice_switch_filter.h"
  19
  20 /* devargs */
  21 #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
  22
  23 static const char * const ice_valid_args[] = {
  24         ICE_SAFE_MODE_SUPPORT_ARG,
  25         NULL
  26 };
  27
  28 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
  29
  30 /* DDP package search path */
  31 #define ICE_PKG_FILE_DEFAULT "/lib/firmware/intel/ice/ddp/ice.pkg"
  32 #define ICE_PKG_FILE_UPDATES "/lib/firmware/updates/intel/ice/ddp/ice.pkg"
  33 #define ICE_PKG_FILE_SEARCH_PATH_DEFAULT "/lib/firmware/intel/ice/ddp/"
  34 #define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/"
  35
  36 #define ICE_OS_DEFAULT_PKG_NAME         "ICE OS Default Package"
  37 #define ICE_COMMS_PKG_NAME                      "ICE COMMS Package"
  38 #define ICE_MAX_PKG_FILENAME_SIZE   256
  39
  40 int ice_logtype_init;
  41 int ice_logtype_driver;
  42
  43 static int ice_dev_configure(struct rte_eth_dev *dev);
  44 static int ice_dev_start(struct rte_eth_dev *dev);
  45 static void ice_dev_stop(struct rte_eth_dev *dev);
  46 static void ice_dev_close(struct rte_eth_dev *dev);
  47 static int ice_dev_reset(struct rte_eth_dev *dev);
  48 static int ice_dev_info_get(struct rte_eth_dev *dev,
  49                             struct rte_eth_dev_info *dev_info);
  50 static int ice_link_update(struct rte_eth_dev *dev,
  51                            int wait_to_complete);
  52 static int ice_dev_set_link_up(struct rte_eth_dev *dev);
  53 static int ice_dev_set_link_down(struct rte_eth_dev *dev);
  54
  55 static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  56 static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  57 static int ice_vlan_tpid_set(struct rte_eth_dev *dev,
  58                              enum rte_vlan_type vlan_type,
  59                              uint16_t tpid);
  60 static int ice_rss_reta_update(struct rte_eth_dev *dev,
  61                                struct rte_eth_rss_reta_entry64 *reta_conf,
  62                                uint16_t reta_size);
  63 static int ice_rss_reta_query(struct rte_eth_dev *dev,
  64                               struct rte_eth_rss_reta_entry64 *reta_conf,
  65                               uint16_t reta_size);
  66 static int ice_rss_hash_update(struct rte_eth_dev *dev,
  67                                struct rte_eth_rss_conf *rss_conf);
  68 static int ice_rss_hash_conf_get(struct rte_eth_dev *dev,
  69                                  struct rte_eth_rss_conf *rss_conf);
  70 static int ice_promisc_enable(struct rte_eth_dev *dev);
  71 static int ice_promisc_disable(struct rte_eth_dev *dev);
  72 static void ice_allmulti_enable(struct rte_eth_dev *dev);
  73 static void ice_allmulti_disable(struct rte_eth_dev *dev);
  74 static int ice_vlan_filter_set(struct rte_eth_dev *dev,
  75                                uint16_t vlan_id,
  76                                int on);
  77 static int ice_macaddr_set(struct rte_eth_dev *dev,
  78                            struct rte_ether_addr *mac_addr);
  79 static int ice_macaddr_add(struct rte_eth_dev *dev,
  80                            struct rte_ether_addr *mac_addr,
  81                            __rte_unused uint32_t index,
  82                            uint32_t pool);
  83 static void ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index);
  84 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
  85                                     uint16_t queue_id);
  86 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
  87                                      uint16_t queue_id);
  88 static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  89                               size_t fw_size);
  90 static int ice_vlan_pvid_set(struct rte_eth_dev *dev,
  91                              uint16_t pvid, int on);
  92 static int ice_get_eeprom_length(struct rte_eth_dev *dev);
  93 static int ice_get_eeprom(struct rte_eth_dev *dev,
  94                           struct rte_dev_eeprom_info *eeprom);
  95 static int ice_stats_get(struct rte_eth_dev *dev,
  96                          struct rte_eth_stats *stats);
  97 static void ice_stats_reset(struct rte_eth_dev *dev);
  98 static int ice_xstats_get(struct rte_eth_dev *dev,
  99                           struct rte_eth_xstat *xstats, unsigned int n);
 100 static int ice_xstats_get_names(struct rte_eth_dev *dev,
 101                                 struct rte_eth_xstat_name *xstats_names,
 102                                 unsigned int limit);
 103 static int ice_dev_filter_ctrl(struct rte_eth_dev *dev,
 104                         enum rte_filter_type filter_type,
 105                         enum rte_filter_op filter_op,
 106                         void *arg);
 107 static int ice_dev_udp_tunnel_port_add(struct rte_eth_dev *dev,
 108                         struct rte_eth_udp_tunnel *udp_tunnel);
 109 static int ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
 110                         struct rte_eth_udp_tunnel *udp_tunnel);
 111
 112 static const struct rte_pci_id pci_id_ice_map[] = {
 113         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
 114         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
 115         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
 116         { .vendor_id = 0, /* sentinel */ },
 117 };
 118
 119 static const struct eth_dev_ops ice_eth_dev_ops = {
 120         .dev_configure                = ice_dev_configure,
 121         .dev_start                    = ice_dev_start,
 122         .dev_stop                     = ice_dev_stop,
 123         .dev_close                    = ice_dev_close,
 124         .dev_reset                    = ice_dev_reset,
 125         .dev_set_link_up              = ice_dev_set_link_up,
 126         .dev_set_link_down            = ice_dev_set_link_down,
 127         .rx_queue_start               = ice_rx_queue_start,
 128         .rx_queue_stop                = ice_rx_queue_stop,
 129         .tx_queue_start               = ice_tx_queue_start,
 130         .tx_queue_stop                = ice_tx_queue_stop,
 131         .rx_queue_setup               = ice_rx_queue_setup,
 132         .rx_queue_release             = ice_rx_queue_release,
 133         .tx_queue_setup               = ice_tx_queue_setup,
 134         .tx_queue_release             = ice_tx_queue_release,
 135         .dev_infos_get                = ice_dev_info_get,
 136         .dev_supported_ptypes_get     = ice_dev_supported_ptypes_get,
 137         .link_update                  = ice_link_update,
 138         .mtu_set                      = ice_mtu_set,
 139         .mac_addr_set                 = ice_macaddr_set,
 140         .mac_addr_add                 = ice_macaddr_add,
 141         .mac_addr_remove              = ice_macaddr_remove,
 142         .vlan_filter_set              = ice_vlan_filter_set,
 143         .vlan_offload_set             = ice_vlan_offload_set,
 144         .vlan_tpid_set                = ice_vlan_tpid_set,
 145         .reta_update                  = ice_rss_reta_update,
 146         .reta_query                   = ice_rss_reta_query,
 147         .rss_hash_update              = ice_rss_hash_update,
 148         .rss_hash_conf_get            = ice_rss_hash_conf_get,
 149         .promiscuous_enable           = ice_promisc_enable,
 150         .promiscuous_disable          = ice_promisc_disable,
 151         .allmulticast_enable          = ice_allmulti_enable,
 152         .allmulticast_disable         = ice_allmulti_disable,
 153         .rx_queue_intr_enable         = ice_rx_queue_intr_enable,
 154         .rx_queue_intr_disable        = ice_rx_queue_intr_disable,
 155         .fw_version_get               = ice_fw_version_get,
 156         .vlan_pvid_set                = ice_vlan_pvid_set,
 157         .rxq_info_get                 = ice_rxq_info_get,
 158         .txq_info_get                 = ice_txq_info_get,
 159         .get_eeprom_length            = ice_get_eeprom_length,
 160         .get_eeprom                   = ice_get_eeprom,
 161         .rx_queue_count               = ice_rx_queue_count,
 162         .rx_descriptor_status         = ice_rx_descriptor_status,
 163         .tx_descriptor_status         = ice_tx_descriptor_status,
 164         .stats_get                    = ice_stats_get,
 165         .stats_reset                  = ice_stats_reset,
 166         .xstats_get                   = ice_xstats_get,
 167         .xstats_get_names             = ice_xstats_get_names,
 168         .xstats_reset                 = ice_stats_reset,
 169         .filter_ctrl                  = ice_dev_filter_ctrl,
 170         .udp_tunnel_port_add          = ice_dev_udp_tunnel_port_add,
 171         .udp_tunnel_port_del          = ice_dev_udp_tunnel_port_del,
 172 };
 173
 174 /* store statistics names and its offset in stats structure */
 175 struct ice_xstats_name_off {
 176         char name[RTE_ETH_XSTATS_NAME_SIZE];
 177         unsigned int offset;
 178 };
 179
 180 static const struct ice_xstats_name_off ice_stats_strings[] = {
 181         {"rx_unicast_packets", offsetof(struct ice_eth_stats, rx_unicast)},
 182         {"rx_multicast_packets", offsetof(struct ice_eth_stats, rx_multicast)},
 183         {"rx_broadcast_packets", offsetof(struct ice_eth_stats, rx_broadcast)},
 184         {"rx_dropped_packets", offsetof(struct ice_eth_stats, rx_discards)},
 185         {"rx_unknown_protocol_packets", offsetof(struct ice_eth_stats,
 186                 rx_unknown_protocol)},
 187         {"tx_unicast_packets", offsetof(struct ice_eth_stats, tx_unicast)},
 188         {"tx_multicast_packets", offsetof(struct ice_eth_stats, tx_multicast)},
 189         {"tx_broadcast_packets", offsetof(struct ice_eth_stats, tx_broadcast)},
 190         {"tx_dropped_packets", offsetof(struct ice_eth_stats, tx_discards)},
 191 };
 192
 193 #define ICE_NB_ETH_XSTATS (sizeof(ice_stats_strings) / \
 194                 sizeof(ice_stats_strings[0]))
 195
 196 static const struct ice_xstats_name_off ice_hw_port_strings[] = {
 197         {"tx_link_down_dropped", offsetof(struct ice_hw_port_stats,
 198                 tx_dropped_link_down)},
 199         {"rx_crc_errors", offsetof(struct ice_hw_port_stats, crc_errors)},
 200         {"rx_illegal_byte_errors", offsetof(struct ice_hw_port_stats,
 201                 illegal_bytes)},
 202         {"rx_error_bytes", offsetof(struct ice_hw_port_stats, error_bytes)},
 203         {"mac_local_errors", offsetof(struct ice_hw_port_stats,
 204                 mac_local_faults)},
 205         {"mac_remote_errors", offsetof(struct ice_hw_port_stats,
 206                 mac_remote_faults)},
 207         {"rx_len_errors", offsetof(struct ice_hw_port_stats,
 208                 rx_len_errors)},
 209         {"tx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_tx)},
 210         {"rx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_rx)},
 211         {"tx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_tx)},
 212         {"rx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_rx)},
 213         {"rx_size_64_packets", offsetof(struct ice_hw_port_stats, rx_size_64)},
 214         {"rx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 215                 rx_size_127)},
 216         {"rx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 217                 rx_size_255)},
 218         {"rx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 219                 rx_size_511)},
 220         {"rx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 221                 rx_size_1023)},
 222         {"rx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 223                 rx_size_1522)},
 224         {"rx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 225                 rx_size_big)},
 226         {"rx_undersized_errors", offsetof(struct ice_hw_port_stats,
 227                 rx_undersize)},
 228         {"rx_oversize_errors", offsetof(struct ice_hw_port_stats,
 229                 rx_oversize)},
 230         {"rx_mac_short_pkt_dropped", offsetof(struct ice_hw_port_stats,
 231                 mac_short_pkt_dropped)},
 232         {"rx_fragmented_errors", offsetof(struct ice_hw_port_stats,
 233                 rx_fragments)},
 234         {"rx_jabber_errors", offsetof(struct ice_hw_port_stats, rx_jabber)},
 235         {"tx_size_64_packets", offsetof(struct ice_hw_port_stats, tx_size_64)},
 236         {"tx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 237                 tx_size_127)},
 238         {"tx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 239                 tx_size_255)},
 240         {"tx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 241                 tx_size_511)},
 242         {"tx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 243                 tx_size_1023)},
 244         {"tx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 245                 tx_size_1522)},
 246         {"tx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 247                 tx_size_big)},
 248 };
 249
 250 #define ICE_NB_HW_PORT_XSTATS (sizeof(ice_hw_port_strings) / \
 251                 sizeof(ice_hw_port_strings[0]))
 252
 253 static void
 254 ice_init_controlq_parameter(struct ice_hw *hw)
 255 {
 256         /* fields for adminq */
 257         hw->adminq.num_rq_entries = ICE_ADMINQ_LEN;
 258         hw->adminq.num_sq_entries = ICE_ADMINQ_LEN;
 259         hw->adminq.rq_buf_size = ICE_ADMINQ_BUF_SZ;
 260         hw->adminq.sq_buf_size = ICE_ADMINQ_BUF_SZ;
 261
 262         /* fields for mailboxq, DPDK used as PF host */
 263         hw->mailboxq.num_rq_entries = ICE_MAILBOXQ_LEN;
 264         hw->mailboxq.num_sq_entries = ICE_MAILBOXQ_LEN;
 265         hw->mailboxq.rq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 266         hw->mailboxq.sq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 267 }
 268
 269 static int
 270 ice_res_pool_init(struct ice_res_pool_info *pool, uint32_t base,
 271                   uint32_t num)
 272 {
 273         struct pool_entry *entry;
 274
 275         if (!pool || !num)
 276                 return -EINVAL;
 277
 278         entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 279         if (!entry) {
 280                 PMD_INIT_LOG(ERR,
 281                              "Failed to allocate memory for resource pool");
 282                 return -ENOMEM;
 283         }
 284
 285         /* queue heap initialize */
 286         pool->num_free = num;
 287         pool->num_alloc = 0;
 288         pool->base = base;
 289         LIST_INIT(&pool->alloc_list);
 290         LIST_INIT(&pool->free_list);
 291
 292         /* Initialize element  */
 293         entry->base = 0;
 294         entry->len = num;
 295
 296         LIST_INSERT_HEAD(&pool->free_list, entry, next);
 297         return 0;
 298 }
 299
 300 static int
 301 ice_res_pool_alloc(struct ice_res_pool_info *pool,
 302                    uint16_t num)
 303 {
 304         struct pool_entry *entry, *valid_entry;
 305
 306         if (!pool || !num) {
 307                 PMD_INIT_LOG(ERR, "Invalid parameter");
 308                 return -EINVAL;
 309         }
 310
 311         if (pool->num_free < num) {
 312                 PMD_INIT_LOG(ERR, "No resource. ask:%u, available:%u",
 313                              num, pool->num_free);
 314                 return -ENOMEM;
 315         }
 316
 317         valid_entry = NULL;
 318         /* Lookup  in free list and find most fit one */
 319         LIST_FOREACH(entry, &pool->free_list, next) {
 320                 if (entry->len >= num) {
 321                         /* Find best one */
 322                         if (entry->len == num) {
 323                                 valid_entry = entry;
 324                                 break;
 325                         }
 326                         if (!valid_entry ||
 327                             valid_entry->len > entry->len)
 328                                 valid_entry = entry;
 329                 }
 330         }
 331
 332         /* Not find one to satisfy the request, return */
 333         if (!valid_entry) {
 334                 PMD_INIT_LOG(ERR, "No valid entry found");
 335                 return -ENOMEM;
 336         }
 337         /**
 338          * The entry have equal queue number as requested,
 339          * remove it from alloc_list.
 340          */
 341         if (valid_entry->len == num) {
 342                 LIST_REMOVE(valid_entry, next);
 343         } else {
 344                 /**
 345                  * The entry have more numbers than requested,
 346                  * create a new entry for alloc_list and minus its
 347                  * queue base and number in free_list.
 348                  */
 349                 entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 350                 if (!entry) {
 351                         PMD_INIT_LOG(ERR,
 352                                      "Failed to allocate memory for "
 353                                      "resource pool");
 354                         return -ENOMEM;
 355                 }
 356                 entry->base = valid_entry->base;
 357                 entry->len = num;
 358                 valid_entry->base += num;
 359                 valid_entry->len -= num;
 360                 valid_entry = entry;
 361         }
 362
 363         /* Insert it into alloc list, not sorted */
 364         LIST_INSERT_HEAD(&pool->alloc_list, valid_entry, next);
 365
 366         pool->num_free -= valid_entry->len;
 367         pool->num_alloc += valid_entry->len;
 368
 369         return valid_entry->base + pool->base;
 370 }
 371
 372 static void
 373 ice_res_pool_destroy(struct ice_res_pool_info *pool)
 374 {
 375         struct pool_entry *entry, *next_entry;
 376
 377         if (!pool)
 378                 return;
 379
 380         for (entry = LIST_FIRST(&pool->alloc_list);
 381              entry && (next_entry = LIST_NEXT(entry, next), 1);
 382              entry = next_entry) {
 383                 LIST_REMOVE(entry, next);
 384                 rte_free(entry);
 385         }
 386
 387         for (entry = LIST_FIRST(&pool->free_list);
 388              entry && (next_entry = LIST_NEXT(entry, next), 1);
 389              entry = next_entry) {
 390                 LIST_REMOVE(entry, next);
 391                 rte_free(entry);
 392         }
 393
 394         pool->num_free = 0;
 395         pool->num_alloc = 0;
 396         pool->base = 0;
 397         LIST_INIT(&pool->alloc_list);
 398         LIST_INIT(&pool->free_list);
 399 }
 400
 401 static void
 402 ice_vsi_config_default_rss(struct ice_aqc_vsi_props *info)
 403 {
 404         /* Set VSI LUT selection */
 405         info->q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI &
 406                           ICE_AQ_VSI_Q_OPT_RSS_LUT_M;
 407         /* Set Hash scheme */
 408         info->q_opt_rss |= ICE_AQ_VSI_Q_OPT_RSS_TPLZ &
 409                            ICE_AQ_VSI_Q_OPT_RSS_HASH_M;
 410         /* enable TC */
 411         info->q_opt_tc = ICE_AQ_VSI_Q_OPT_TC_OVR_M;
 412 }
 413
 414 static enum ice_status
 415 ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi,
 416                                 struct ice_aqc_vsi_props *info,
 417                                 uint8_t enabled_tcmap)
 418 {
 419         uint16_t bsf, qp_idx;
 420
 421         /* default tc 0 now. Multi-TC supporting need to be done later.
 422          * Configure TC and queue mapping parameters, for enabled TC,
 423          * allocate qpnum_per_tc queues to this traffic.
 424          */
 425         if (enabled_tcmap != 0x01) {
 426                 PMD_INIT_LOG(ERR, "only TC0 is supported");
 427                 return -ENOTSUP;
 428         }
 429
 430         vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC);
 431         bsf = rte_bsf32(vsi->nb_qps);
 432         /* Adjust the queue number to actual queues that can be applied */
 433         vsi->nb_qps = 0x1 << bsf;
 434
 435         qp_idx = 0;
 436         /* Set tc and queue mapping with VSI */
 437         info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx <<
 438                                                 ICE_AQ_VSI_TC_Q_OFFSET_S) |
 439                                                (bsf << ICE_AQ_VSI_TC_Q_NUM_S));
 440
 441         /* Associate queue number with VSI */
 442         info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG);
 443         info->q_mapping[0] = rte_cpu_to_le_16(vsi->base_queue);
 444         info->q_mapping[1] = rte_cpu_to_le_16(vsi->nb_qps);
 445         info->valid_sections |=
 446                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
 447         /* Set the info.ingress_table and info.egress_table
 448          * for UP translate table. Now just set it to 1:1 map by default
 449          * -- 0b 111 110 101 100 011 010 001 000 == 0xFAC688
 450          */
 451 #define ICE_TC_QUEUE_TABLE_DFLT 0x00FAC688
 452         info->ingress_table  = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 453         info->egress_table   = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 454         info->outer_up_table = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 455         return 0;
 456 }
 457
 458 static int
 459 ice_init_mac_address(struct rte_eth_dev *dev)
 460 {
 461         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 462
 463         if (!rte_is_unicast_ether_addr
 464                 ((struct rte_ether_addr *)hw->port_info[0].mac.lan_addr)) {
 465                 PMD_INIT_LOG(ERR, "Invalid MAC address");
 466                 return -EINVAL;
 467         }
 468
 469         rte_ether_addr_copy(
 470                 (struct rte_ether_addr *)hw->port_info[0].mac.lan_addr,
 471                 (struct rte_ether_addr *)hw->port_info[0].mac.perm_addr);
 472
 473         dev->data->mac_addrs =
 474                 rte_zmalloc(NULL, sizeof(struct rte_ether_addr), 0);
 475         if (!dev->data->mac_addrs) {
 476                 PMD_INIT_LOG(ERR,
 477                              "Failed to allocate memory to store mac address");
 478                 return -ENOMEM;
 479         }
 480         /* store it to dev data */
 481         rte_ether_addr_copy(
 482                 (struct rte_ether_addr *)hw->port_info[0].mac.perm_addr,
 483                 &dev->data->mac_addrs[0]);
 484         return 0;
 485 }
 486
 487 /* Find out specific MAC filter */
 488 static struct ice_mac_filter *
 489 ice_find_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *macaddr)
 490 {
 491         struct ice_mac_filter *f;
 492
 493         TAILQ_FOREACH(f, &vsi->mac_list, next) {
 494                 if (rte_is_same_ether_addr(macaddr, &f->mac_info.mac_addr))
 495                         return f;
 496         }
 497
 498         return NULL;
 499 }
 500
 501 static int
 502 ice_add_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *mac_addr)
 503 {
 504         struct ice_fltr_list_entry *m_list_itr = NULL;
 505         struct ice_mac_filter *f;
 506         struct LIST_HEAD_TYPE list_head;
 507         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 508         int ret = 0;
 509
 510         /* If it's added and configured, return */
 511         f = ice_find_mac_filter(vsi, mac_addr);
 512         if (f) {
 513                 PMD_DRV_LOG(INFO, "This MAC filter already exists.");
 514                 return 0;
 515         }
 516
 517         INIT_LIST_HEAD(&list_head);
 518
 519         m_list_itr = (struct ice_fltr_list_entry *)
 520                 ice_malloc(hw, sizeof(*m_list_itr));
 521         if (!m_list_itr) {
 522                 ret = -ENOMEM;
 523                 goto DONE;
 524         }
 525         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 526                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 527         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 528         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 529         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 530         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 531         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 532
 533         LIST_ADD(&m_list_itr->list_entry, &list_head);
 534
 535         /* Add the mac */
 536         ret = ice_add_mac(hw, &list_head);
 537         if (ret != ICE_SUCCESS) {
 538                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
 539                 ret = -EINVAL;
 540                 goto DONE;
 541         }
 542         /* Add the mac addr into mac list */
 543         f = rte_zmalloc(NULL, sizeof(*f), 0);
 544         if (!f) {
 545                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 546                 ret = -ENOMEM;
 547                 goto DONE;
 548         }
 549         rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN);
 550         TAILQ_INSERT_TAIL(&vsi->mac_list, f, next);
 551         vsi->mac_num++;
 552
 553         ret = 0;
 554
 555 DONE:
 556         rte_free(m_list_itr);
 557         return ret;
 558 }
 559
 560 static int
 561 ice_remove_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *mac_addr)
 562 {
 563         struct ice_fltr_list_entry *m_list_itr = NULL;
 564         struct ice_mac_filter *f;
 565         struct LIST_HEAD_TYPE list_head;
 566         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 567         int ret = 0;
 568
 569         /* Can't find it, return an error */
 570         f = ice_find_mac_filter(vsi, mac_addr);
 571         if (!f)
 572                 return -EINVAL;
 573
 574         INIT_LIST_HEAD(&list_head);
 575
 576         m_list_itr = (struct ice_fltr_list_entry *)
 577                 ice_malloc(hw, sizeof(*m_list_itr));
 578         if (!m_list_itr) {
 579                 ret = -ENOMEM;
 580                 goto DONE;
 581         }
 582         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 583                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 584         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 585         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 586         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 587         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 588         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 589
 590         LIST_ADD(&m_list_itr->list_entry, &list_head);
 591
 592         /* remove the mac filter */
 593         ret = ice_remove_mac(hw, &list_head);
 594         if (ret != ICE_SUCCESS) {
 595                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
 596                 ret = -EINVAL;
 597                 goto DONE;
 598         }
 599
 600         /* Remove the mac addr from mac list */
 601         TAILQ_REMOVE(&vsi->mac_list, f, next);
 602         rte_free(f);
 603         vsi->mac_num--;
 604
 605         ret = 0;
 606 DONE:
 607         rte_free(m_list_itr);
 608         return ret;
 609 }
 610
 611 /* Find out specific VLAN filter */
 612 static struct ice_vlan_filter *
 613 ice_find_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 614 {
 615         struct ice_vlan_filter *f;
 616
 617         TAILQ_FOREACH(f, &vsi->vlan_list, next) {
 618                 if (vlan_id == f->vlan_info.vlan_id)
 619                         return f;
 620         }
 621
 622         return NULL;
 623 }
 624
 625 static int
 626 ice_add_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 627 {
 628         struct ice_fltr_list_entry *v_list_itr = NULL;
 629         struct ice_vlan_filter *f;
 630         struct LIST_HEAD_TYPE list_head;
 631         struct ice_hw *hw;
 632         int ret = 0;
 633
 634         if (!vsi || vlan_id > RTE_ETHER_MAX_VLAN_ID)
 635                 return -EINVAL;
 636
 637         hw = ICE_VSI_TO_HW(vsi);
 638
 639         /* If it's added and configured, return. */
 640         f = ice_find_vlan_filter(vsi, vlan_id);
 641         if (f) {
 642                 PMD_DRV_LOG(INFO, "This VLAN filter already exists.");
 643                 return 0;
 644         }
 645
 646         if (!vsi->vlan_anti_spoof_on && !vsi->vlan_filter_on)
 647                 return 0;
 648
 649         INIT_LIST_HEAD(&list_head);
 650
 651         v_list_itr = (struct ice_fltr_list_entry *)
 652                       ice_malloc(hw, sizeof(*v_list_itr));
 653         if (!v_list_itr) {
 654                 ret = -ENOMEM;
 655                 goto DONE;
 656         }
 657         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 658         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 659         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 660         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 661         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 662         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 663
 664         LIST_ADD(&v_list_itr->list_entry, &list_head);
 665
 666         /* Add the vlan */
 667         ret = ice_add_vlan(hw, &list_head);
 668         if (ret != ICE_SUCCESS) {
 669                 PMD_DRV_LOG(ERR, "Failed to add VLAN filter");
 670                 ret = -EINVAL;
 671                 goto DONE;
 672         }
 673
 674         /* Add vlan into vlan list */
 675         f = rte_zmalloc(NULL, sizeof(*f), 0);
 676         if (!f) {
 677                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 678                 ret = -ENOMEM;
 679                 goto DONE;
 680         }
 681         f->vlan_info.vlan_id = vlan_id;
 682         TAILQ_INSERT_TAIL(&vsi->vlan_list, f, next);
 683         vsi->vlan_num++;
 684
 685         ret = 0;
 686
 687 DONE:
 688         rte_free(v_list_itr);
 689         return ret;
 690 }
 691
 692 static int
 693 ice_remove_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 694 {
 695         struct ice_fltr_list_entry *v_list_itr = NULL;
 696         struct ice_vlan_filter *f;
 697         struct LIST_HEAD_TYPE list_head;
 698         struct ice_hw *hw;
 699         int ret = 0;
 700
 701         /**
 702          * Vlan 0 is the generic filter for untagged packets
 703          * and can't be removed.
 704          */
 705         if (!vsi || vlan_id == 0 || vlan_id > RTE_ETHER_MAX_VLAN_ID)
 706                 return -EINVAL;
 707
 708         hw = ICE_VSI_TO_HW(vsi);
 709
 710         /* Can't find it, return an error */
 711         f = ice_find_vlan_filter(vsi, vlan_id);
 712         if (!f)
 713                 return -EINVAL;
 714
 715         INIT_LIST_HEAD(&list_head);
 716
 717         v_list_itr = (struct ice_fltr_list_entry *)
 718                       ice_malloc(hw, sizeof(*v_list_itr));
 719         if (!v_list_itr) {
 720                 ret = -ENOMEM;
 721                 goto DONE;
 722         }
 723
 724         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 725         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 726         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 727         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 728         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 729         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 730
 731         LIST_ADD(&v_list_itr->list_entry, &list_head);
 732
 733         /* remove the vlan filter */
 734         ret = ice_remove_vlan(hw, &list_head);
 735         if (ret != ICE_SUCCESS) {
 736                 PMD_DRV_LOG(ERR, "Failed to remove VLAN filter");
 737                 ret = -EINVAL;
 738                 goto DONE;
 739         }
 740
 741         /* Remove the vlan id from vlan list */
 742         TAILQ_REMOVE(&vsi->vlan_list, f, next);
 743         rte_free(f);
 744         vsi->vlan_num--;
 745
 746         ret = 0;
 747 DONE:
 748         rte_free(v_list_itr);
 749         return ret;
 750 }
 751
 752 static int
 753 ice_remove_all_mac_vlan_filters(struct ice_vsi *vsi)
 754 {
 755         struct ice_mac_filter *m_f;
 756         struct ice_vlan_filter *v_f;
 757         int ret = 0;
 758
 759         if (!vsi || !vsi->mac_num)
 760                 return -EINVAL;
 761
 762         TAILQ_FOREACH(m_f, &vsi->mac_list, next) {
 763                 ret = ice_remove_mac_filter(vsi, &m_f->mac_info.mac_addr);
 764                 if (ret != ICE_SUCCESS) {
 765                         ret = -EINVAL;
 766                         goto DONE;
 767                 }
 768         }
 769
 770         if (vsi->vlan_num == 0)
 771                 return 0;
 772
 773         TAILQ_FOREACH(v_f, &vsi->vlan_list, next) {
 774                 ret = ice_remove_vlan_filter(vsi, v_f->vlan_info.vlan_id);
 775                 if (ret != ICE_SUCCESS) {
 776                         ret = -EINVAL;
 777                         goto DONE;
 778                 }
 779         }
 780
 781 DONE:
 782         return ret;
 783 }
 784
 785 static int
 786 ice_vsi_config_qinq_insertion(struct ice_vsi *vsi, bool on)
 787 {
 788         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 789         struct ice_vsi_ctx ctxt;
 790         uint8_t qinq_flags;
 791         int ret = 0;
 792
 793         /* Check if it has been already on or off */
 794         if (vsi->info.valid_sections &
 795                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 796                 if (on) {
 797                         if ((vsi->info.outer_tag_flags &
 798                              ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST) ==
 799                             ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST)
 800                                 return 0; /* already on */
 801                 } else {
 802                         if (!(vsi->info.outer_tag_flags &
 803                               ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST))
 804                                 return 0; /* already off */
 805                 }
 806         }
 807
 808         if (on)
 809                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST;
 810         else
 811                 qinq_flags = 0;
 812         /* clear global insertion and use per packet insertion */
 813         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_INSERT);
 814         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST);
 815         vsi->info.outer_tag_flags |= qinq_flags;
 816         /* use default vlan type 0x8100 */
 817         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 818         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 819                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 820         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 821         ctxt.info.valid_sections =
 822                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 823         ctxt.vsi_num = vsi->vsi_id;
 824         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 825         if (ret) {
 826                 PMD_DRV_LOG(INFO,
 827                             "Update VSI failed to %s qinq stripping",
 828                             on ? "enable" : "disable");
 829                 return -EINVAL;
 830         }
 831
 832         vsi->info.valid_sections |=
 833                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 834
 835         return ret;
 836 }
 837
 838 static int
 839 ice_vsi_config_qinq_stripping(struct ice_vsi *vsi, bool on)
 840 {
 841         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 842         struct ice_vsi_ctx ctxt;
 843         uint8_t qinq_flags;
 844         int ret = 0;
 845
 846         /* Check if it has been already on or off */
 847         if (vsi->info.valid_sections &
 848                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 849                 if (on) {
 850                         if ((vsi->info.outer_tag_flags &
 851                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 852                             ICE_AQ_VSI_OUTER_TAG_COPY)
 853                                 return 0; /* already on */
 854                 } else {
 855                         if ((vsi->info.outer_tag_flags &
 856                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 857                             ICE_AQ_VSI_OUTER_TAG_NOTHING)
 858                                 return 0; /* already off */
 859                 }
 860         }
 861
 862         if (on)
 863                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_COPY;
 864         else
 865                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_NOTHING;
 866         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_MODE_M);
 867         vsi->info.outer_tag_flags |= qinq_flags;
 868         /* use default vlan type 0x8100 */
 869         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 870         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 871                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 872         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 873         ctxt.info.valid_sections =
 874                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 875         ctxt.vsi_num = vsi->vsi_id;
 876         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 877         if (ret) {
 878                 PMD_DRV_LOG(INFO,
 879                             "Update VSI failed to %s qinq stripping",
 880                             on ? "enable" : "disable");
 881                 return -EINVAL;
 882         }
 883
 884         vsi->info.valid_sections |=
 885                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 886
 887         return ret;
 888 }
 889
 890 static int
 891 ice_vsi_config_double_vlan(struct ice_vsi *vsi, int on)
 892 {
 893         int ret;
 894
 895         ret = ice_vsi_config_qinq_stripping(vsi, on);
 896         if (ret)
 897                 PMD_DRV_LOG(ERR, "Fail to set qinq stripping - %d", ret);
 898
 899         ret = ice_vsi_config_qinq_insertion(vsi, on);
 900         if (ret)
 901                 PMD_DRV_LOG(ERR, "Fail to set qinq insertion - %d", ret);
 902
 903         return ret;
 904 }
 905
 906 /* Enable IRQ0 */
 907 static void
 908 ice_pf_enable_irq0(struct ice_hw *hw)
 909 {
 910         /* reset the registers */
 911         ICE_WRITE_REG(hw, PFINT_OICR_ENA, 0);
 912         ICE_READ_REG(hw, PFINT_OICR);
 913
 914 #ifdef ICE_LSE_SPT
 915         ICE_WRITE_REG(hw, PFINT_OICR_ENA,
 916                       (uint32_t)(PFINT_OICR_ENA_INT_ENA_M &
 917                                  (~PFINT_OICR_LINK_STAT_CHANGE_M)));
 918
 919         ICE_WRITE_REG(hw, PFINT_OICR_CTL,
 920                       (0 & PFINT_OICR_CTL_MSIX_INDX_M) |
 921                       ((0 << PFINT_OICR_CTL_ITR_INDX_S) &
 922                        PFINT_OICR_CTL_ITR_INDX_M) |
 923                       PFINT_OICR_CTL_CAUSE_ENA_M);
 924
 925         ICE_WRITE_REG(hw, PFINT_FW_CTL,
 926                       (0 & PFINT_FW_CTL_MSIX_INDX_M) |
 927                       ((0 << PFINT_FW_CTL_ITR_INDX_S) &
 928                        PFINT_FW_CTL_ITR_INDX_M) |
 929                       PFINT_FW_CTL_CAUSE_ENA_M);
 930 #else
 931         ICE_WRITE_REG(hw, PFINT_OICR_ENA, PFINT_OICR_ENA_INT_ENA_M);
 932 #endif
 933
 934         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
 935                       GLINT_DYN_CTL_INTENA_M |
 936                       GLINT_DYN_CTL_CLEARPBA_M |
 937                       GLINT_DYN_CTL_ITR_INDX_M);
 938
 939         ice_flush(hw);
 940 }
 941
 942 /* Disable IRQ0 */
 943 static void
 944 ice_pf_disable_irq0(struct ice_hw *hw)
 945 {
 946         /* Disable all interrupt types */
 947         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
 948         ice_flush(hw);
 949 }
 950
 951 #ifdef ICE_LSE_SPT
 952 static void
 953 ice_handle_aq_msg(struct rte_eth_dev *dev)
 954 {
 955         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 956         struct ice_ctl_q_info *cq = &hw->adminq;
 957         struct ice_rq_event_info event;
 958         uint16_t pending, opcode;
 959         int ret;
 960
 961         event.buf_len = ICE_AQ_MAX_BUF_LEN;
 962         event.msg_buf = rte_zmalloc(NULL, event.buf_len, 0);
 963         if (!event.msg_buf) {
 964                 PMD_DRV_LOG(ERR, "Failed to allocate mem");
 965                 return;
 966         }
 967
 968         pending = 1;
 969         while (pending) {
 970                 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
 971
 972                 if (ret != ICE_SUCCESS) {
 973                         PMD_DRV_LOG(INFO,
 974                                     "Failed to read msg from AdminQ, "
 975                                     "adminq_err: %u",
 976                                     hw->adminq.sq_last_status);
 977                         break;
 978                 }
 979                 opcode = rte_le_to_cpu_16(event.desc.opcode);
 980
 981                 switch (opcode) {
 982                 case ice_aqc_opc_get_link_status:
 983                         ret = ice_link_update(dev, 0);
 984                         if (!ret)
 985                                 _rte_eth_dev_callback_process
 986                                         (dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 987                         break;
 988                 default:
 989                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
 990                                     opcode);
 991                         break;
 992                 }
 993         }
 994         rte_free(event.msg_buf);
 995 }
 996 #endif
 997
 998 /**
 999  * Interrupt handler triggered by NIC for handling
1000  * specific interrupt.
1001  *
1002  * @param handle
1003  *  Pointer to interrupt handle.
1004  * @param param
1005  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1006  *
1007  * @return
1008  *  void
1009  */
1010 static void
1011 ice_interrupt_handler(void *param)
1012 {
1013         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1014         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1015         uint32_t oicr;
1016         uint32_t reg;
1017         uint8_t pf_num;
1018         uint8_t event;
1019         uint16_t queue;
1020 #ifdef ICE_LSE_SPT
1021         uint32_t int_fw_ctl;
1022 #endif
1023
1024         /* Disable interrupt */
1025         ice_pf_disable_irq0(hw);
1026
1027         /* read out interrupt causes */
1028         oicr = ICE_READ_REG(hw, PFINT_OICR);
1029 #ifdef ICE_LSE_SPT
1030         int_fw_ctl = ICE_READ_REG(hw, PFINT_FW_CTL);
1031 #endif
1032
1033         /* No interrupt event indicated */
1034         if (!(oicr & PFINT_OICR_INTEVENT_M)) {
1035                 PMD_DRV_LOG(INFO, "No interrupt event");
1036                 goto done;
1037         }
1038
1039 #ifdef ICE_LSE_SPT
1040         if (int_fw_ctl & PFINT_FW_CTL_INTEVENT_M) {
1041                 PMD_DRV_LOG(INFO, "FW_CTL: link state change event");
1042                 ice_handle_aq_msg(dev);
1043         }
1044 #else
1045         if (oicr & PFINT_OICR_LINK_STAT_CHANGE_M) {
1046                 PMD_DRV_LOG(INFO, "OICR: link state change event");
1047                 ice_link_update(dev, 0);
1048         }
1049 #endif
1050
1051         if (oicr & PFINT_OICR_MAL_DETECT_M) {
1052                 PMD_DRV_LOG(WARNING, "OICR: MDD event");
1053                 reg = ICE_READ_REG(hw, GL_MDET_TX_PQM);
1054                 if (reg & GL_MDET_TX_PQM_VALID_M) {
1055                         pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1056                                  GL_MDET_TX_PQM_PF_NUM_S;
1057                         event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1058                                 GL_MDET_TX_PQM_MAL_TYPE_S;
1059                         queue = (reg & GL_MDET_TX_PQM_QNUM_M) >>
1060                                 GL_MDET_TX_PQM_QNUM_S;
1061
1062                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1063                                     "%d by PQM on TX queue %d PF# %d",
1064                                     event, queue, pf_num);
1065                 }
1066
1067                 reg = ICE_READ_REG(hw, GL_MDET_TX_TCLAN);
1068                 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1069                         pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1070                                  GL_MDET_TX_TCLAN_PF_NUM_S;
1071                         event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1072                                 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1073                         queue = (reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1074                                 GL_MDET_TX_TCLAN_QNUM_S;
1075
1076                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1077                                     "%d by TCLAN on TX queue %d PF# %d",
1078                                     event, queue, pf_num);
1079                 }
1080         }
1081 done:
1082         /* Enable interrupt */
1083         ice_pf_enable_irq0(hw);
1084         rte_intr_ack(dev->intr_handle);
1085 }
1086
1087 /*  Initialize SW parameters of PF */
1088 static int
1089 ice_pf_sw_init(struct rte_eth_dev *dev)
1090 {
1091         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1092         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1093
1094         pf->lan_nb_qp_max =
1095                 (uint16_t)RTE_MIN(hw->func_caps.common_cap.num_txq,
1096                                   hw->func_caps.common_cap.num_rxq);
1097
1098         pf->lan_nb_qps = pf->lan_nb_qp_max;
1099
1100         return 0;
1101 }
1102
1103 static struct ice_vsi *
1104 ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type)
1105 {
1106         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1107         struct ice_vsi *vsi = NULL;
1108         struct ice_vsi_ctx vsi_ctx;
1109         int ret;
1110         struct rte_ether_addr broadcast = {
1111                 .addr_bytes = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff} };
1112         struct rte_ether_addr mac_addr;
1113         uint16_t max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
1114         uint8_t tc_bitmap = 0x1;
1115
1116         /* hw->num_lports = 1 in NIC mode */
1117         vsi = rte_zmalloc(NULL, sizeof(struct ice_vsi), 0);
1118         if (!vsi)
1119                 return NULL;
1120
1121         vsi->idx = pf->next_vsi_idx;
1122         pf->next_vsi_idx++;
1123         vsi->type = type;
1124         vsi->adapter = ICE_PF_TO_ADAPTER(pf);
1125         vsi->max_macaddrs = ICE_NUM_MACADDR_MAX;
1126         vsi->vlan_anti_spoof_on = 0;
1127         vsi->vlan_filter_on = 1;
1128         TAILQ_INIT(&vsi->mac_list);
1129         TAILQ_INIT(&vsi->vlan_list);
1130
1131         /* Be sync with ETH_RSS_RETA_SIZE_x maximum value definition */
1132         pf->hash_lut_size = hw->func_caps.common_cap.rss_table_size >
1133                         ETH_RSS_RETA_SIZE_512 ? ETH_RSS_RETA_SIZE_512 :
1134                         hw->func_caps.common_cap.rss_table_size;
1135         pf->flags |= ICE_FLAG_RSS_AQ_CAPABLE;
1136
1137         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1138         /* base_queue in used in queue mapping of VSI add/update command.
1139          * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ
1140          * cases in the first stage. Only Main VSI.
1141          */
1142         vsi->base_queue = 0;
1143         switch (type) {
1144         case ICE_VSI_PF:
1145                 vsi->nb_qps = pf->lan_nb_qps;
1146                 ice_vsi_config_default_rss(&vsi_ctx.info);
1147                 vsi_ctx.alloc_from_pool = true;
1148                 vsi_ctx.flags = ICE_AQ_VSI_TYPE_PF;
1149                 /* switch_id is queried by get_switch_config aq, which is done
1150                  * by ice_init_hw
1151                  */
1152                 vsi_ctx.info.sw_id = hw->port_info->sw_id;
1153                 vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
1154                 /* Allow all untagged or tagged packets */
1155                 vsi_ctx.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1156                 vsi_ctx.info.vlan_flags |= ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1157                 vsi_ctx.info.q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF |
1158                                          ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1159                 /* Enable VLAN/UP trip */
1160                 ret = ice_vsi_config_tc_queue_mapping(vsi,
1161                                                       &vsi_ctx.info,
1162                                                       ICE_DEFAULT_TCMAP);
1163                 if (ret) {
1164                         PMD_INIT_LOG(ERR,
1165                                      "tc queue mapping with vsi failed, "
1166                                      "err = %d",
1167                                      ret);
1168                         goto fail_mem;
1169                 }
1170
1171                 break;
1172         default:
1173                 /* for other types of VSI */
1174                 PMD_INIT_LOG(ERR, "other types of VSI not supported");
1175                 goto fail_mem;
1176         }
1177
1178         /* VF has MSIX interrupt in VF range, don't allocate here */
1179         if (type == ICE_VSI_PF) {
1180                 ret = ice_res_pool_alloc(&pf->msix_pool,
1181                                          RTE_MIN(vsi->nb_qps,
1182                                                  RTE_MAX_RXTX_INTR_VEC_ID));
1183                 if (ret < 0) {
1184                         PMD_INIT_LOG(ERR, "VSI MAIN %d get heap failed %d",
1185                                      vsi->vsi_id, ret);
1186                 }
1187                 vsi->msix_intr = ret;
1188                 vsi->nb_msix = RTE_MIN(vsi->nb_qps, RTE_MAX_RXTX_INTR_VEC_ID);
1189         } else {
1190                 vsi->msix_intr = 0;
1191                 vsi->nb_msix = 0;
1192         }
1193         ret = ice_add_vsi(hw, vsi->idx, &vsi_ctx, NULL);
1194         if (ret != ICE_SUCCESS) {
1195                 PMD_INIT_LOG(ERR, "add vsi failed, err = %d", ret);
1196                 goto fail_mem;
1197         }
1198         /* store vsi information is SW structure */
1199         vsi->vsi_id = vsi_ctx.vsi_num;
1200         vsi->info = vsi_ctx.info;
1201         pf->vsis_allocated = vsi_ctx.vsis_allocd;
1202         pf->vsis_unallocated = vsi_ctx.vsis_unallocated;
1203
1204         /* MAC configuration */
1205         rte_memcpy(pf->dev_addr.addr_bytes,
1206                    hw->port_info->mac.perm_addr,
1207                    ETH_ADDR_LEN);
1208
1209         rte_memcpy(&mac_addr, &pf->dev_addr, RTE_ETHER_ADDR_LEN);
1210         ret = ice_add_mac_filter(vsi, &mac_addr);
1211         if (ret != ICE_SUCCESS)
1212                 PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter");
1213
1214         rte_memcpy(&mac_addr, &broadcast, RTE_ETHER_ADDR_LEN);
1215         ret = ice_add_mac_filter(vsi, &mac_addr);
1216         if (ret != ICE_SUCCESS)
1217                 PMD_INIT_LOG(ERR, "Failed to add MAC filter");
1218
1219         /* At the beginning, only TC0. */
1220         /* What we need here is the maximam number of the TX queues.
1221          * Currently vsi->nb_qps means it.
1222          * Correct it if any change.
1223          */
1224         max_txqs[0] = vsi->nb_qps;
1225         ret = ice_cfg_vsi_lan(hw->port_info, vsi->idx,
1226                               tc_bitmap, max_txqs);
1227         if (ret != ICE_SUCCESS)
1228                 PMD_INIT_LOG(ERR, "Failed to config vsi sched");
1229
1230         return vsi;
1231 fail_mem:
1232         rte_free(vsi);
1233         pf->next_vsi_idx--;
1234         return NULL;
1235 }
1236
1237 static int
1238 ice_send_driver_ver(struct ice_hw *hw)
1239 {
1240         struct ice_driver_ver dv;
1241
1242         /* we don't have driver version use 0 for dummy */
1243         dv.major_ver = 0;
1244         dv.minor_ver = 0;
1245         dv.build_ver = 0;
1246         dv.subbuild_ver = 0;
1247         strncpy((char *)dv.driver_string, "dpdk", sizeof(dv.driver_string));
1248
1249         return ice_aq_send_driver_ver(hw, &dv, NULL);
1250 }
1251
1252 static int
1253 ice_pf_setup(struct ice_pf *pf)
1254 {
1255         struct ice_vsi *vsi;
1256
1257         /* Clear all stats counters */
1258         pf->offset_loaded = FALSE;
1259         memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats));
1260         memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats));
1261         memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats));
1262         memset(&pf->internal_stats_offset, 0, sizeof(struct ice_eth_stats));
1263
1264         vsi = ice_setup_vsi(pf, ICE_VSI_PF);
1265         if (!vsi) {
1266                 PMD_INIT_LOG(ERR, "Failed to add vsi for PF");
1267                 return -EINVAL;
1268         }
1269
1270         pf->main_vsi = vsi;
1271
1272         return 0;
1273 }
1274
1275 /* PCIe configuration space setting */
1276 #define PCI_CFG_SPACE_SIZE          256
1277 #define PCI_CFG_SPACE_EXP_SIZE      4096
1278 #define PCI_EXT_CAP_ID(header)      (int)((header) & 0x0000ffff)
1279 #define PCI_EXT_CAP_NEXT(header)    (((header) >> 20) & 0xffc)
1280 #define PCI_EXT_CAP_ID_DSN          0x03
1281
1282 static int
1283 ice_pci_find_next_ext_capability(struct rte_pci_device *dev, int cap)
1284 {
1285         uint32_t header;
1286         int ttl;
1287         int pos = PCI_CFG_SPACE_SIZE;
1288
1289         /* minimum 8 bytes per capability */
1290         ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
1291
1292         if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
1293                 PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
1294                 return -1;
1295         }
1296
1297         /*
1298          * If we have no capabilities, this is indicated by cap ID,
1299          * cap version and next pointer all being 0.
1300          */
1301         if (header == 0)
1302                 return 0;
1303
1304         while (ttl-- > 0) {
1305                 if (PCI_EXT_CAP_ID(header) == cap)
1306                         return pos;
1307
1308                 pos = PCI_EXT_CAP_NEXT(header);
1309
1310                 if (pos < PCI_CFG_SPACE_SIZE)
1311                         break;
1312
1313                 if (rte_pci_read_config(dev, &header, 4, pos) < 0) {
1314                         PMD_INIT_LOG(ERR, "ice error reading extended capabilities\n");
1315                         return -1;
1316                 }
1317         }
1318
1319         return 0;
1320 }
1321
1322 /*
1323  * Extract device serial number from PCIe Configuration Space and
1324  * determine the pkg file path according to the DSN.
1325  */
1326 static int
1327 ice_pkg_file_search_path(struct rte_pci_device *pci_dev, char *pkg_file)
1328 {
1329         int pos;
1330         char opt_ddp_filename[ICE_MAX_PKG_FILENAME_SIZE];
1331         uint32_t dsn_low, dsn_high;
1332         memset(opt_ddp_filename, 0, ICE_MAX_PKG_FILENAME_SIZE);
1333
1334         pos = ice_pci_find_next_ext_capability(pci_dev, PCI_EXT_CAP_ID_DSN);
1335
1336         if (pos) {
1337                 rte_pci_read_config(pci_dev, &dsn_low, 4, pos + 4);
1338                 rte_pci_read_config(pci_dev, &dsn_high, 4, pos + 8);
1339                 snprintf(opt_ddp_filename, ICE_MAX_PKG_FILENAME_SIZE,
1340                          "ice-%08x%08x.pkg", dsn_high, dsn_low);
1341         } else {
1342                 PMD_INIT_LOG(ERR, "Failed to read device serial number\n");
1343                 goto fail_dsn;
1344         }
1345
1346         strncpy(pkg_file, ICE_PKG_FILE_SEARCH_PATH_UPDATES,
1347                 ICE_MAX_PKG_FILENAME_SIZE);
1348         if (!access(strcat(pkg_file, opt_ddp_filename), 0))
1349                 return 0;
1350
1351         strncpy(pkg_file, ICE_PKG_FILE_SEARCH_PATH_DEFAULT,
1352                 ICE_MAX_PKG_FILENAME_SIZE);
1353         if (!access(strcat(pkg_file, opt_ddp_filename), 0))
1354                 return 0;
1355
1356 fail_dsn:
1357         strncpy(pkg_file, ICE_PKG_FILE_UPDATES, ICE_MAX_PKG_FILENAME_SIZE);
1358         if (!access(pkg_file, 0))
1359                 return 0;
1360         strncpy(pkg_file, ICE_PKG_FILE_DEFAULT, ICE_MAX_PKG_FILENAME_SIZE);
1361         return 0;
1362 }
1363
1364 static enum ice_pkg_type
1365 ice_load_pkg_type(struct ice_hw *hw)
1366 {
1367         enum ice_pkg_type package_type;
1368
1369         /* store the activated package type (OS default or Comms) */
1370         if (!strncmp((char *)hw->active_pkg_name, ICE_OS_DEFAULT_PKG_NAME,
1371                 ICE_PKG_NAME_SIZE))
1372                 package_type = ICE_PKG_TYPE_OS_DEFAULT;
1373         else if (!strncmp((char *)hw->active_pkg_name, ICE_COMMS_PKG_NAME,
1374                 ICE_PKG_NAME_SIZE))
1375                 package_type = ICE_PKG_TYPE_COMMS;
1376         else
1377                 package_type = ICE_PKG_TYPE_UNKNOWN;
1378
1379         PMD_INIT_LOG(NOTICE, "Active package is: %d.%d.%d.%d, %s",
1380                 hw->active_pkg_ver.major, hw->active_pkg_ver.minor,
1381                 hw->active_pkg_ver.update, hw->active_pkg_ver.draft,
1382                 hw->active_pkg_name);
1383
1384         return package_type;
1385 }
1386
1387 static int ice_load_pkg(struct rte_eth_dev *dev)
1388 {
1389         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1390         char pkg_file[ICE_MAX_PKG_FILENAME_SIZE];
1391         int err;
1392         uint8_t *buf;
1393         int buf_len;
1394         FILE *file;
1395         struct stat fstat;
1396         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1397         struct ice_adapter *ad =
1398                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1399
1400         ice_pkg_file_search_path(pci_dev, pkg_file);
1401
1402         file = fopen(pkg_file, "rb");
1403         if (!file)  {
1404                 PMD_INIT_LOG(ERR, "failed to open file: %s\n", pkg_file);
1405                 return -1;
1406         }
1407
1408         err = stat(pkg_file, &fstat);
1409         if (err) {
1410                 PMD_INIT_LOG(ERR, "failed to get file stats\n");
1411                 fclose(file);
1412                 return err;
1413         }
1414
1415         buf_len = fstat.st_size;
1416         buf = rte_malloc(NULL, buf_len, 0);
1417
1418         if (!buf) {
1419                 PMD_INIT_LOG(ERR, "failed to allocate buf of size %d for package\n",
1420                                 buf_len);
1421                 fclose(file);
1422                 return -1;
1423         }
1424
1425         err = fread(buf, buf_len, 1, file);
1426         if (err != 1) {
1427                 PMD_INIT_LOG(ERR, "failed to read package data\n");
1428                 fclose(file);
1429                 err = -1;
1430                 goto fail_exit;
1431         }
1432
1433         fclose(file);
1434
1435         err = ice_copy_and_init_pkg(hw, buf, buf_len);
1436         if (err) {
1437                 PMD_INIT_LOG(ERR, "ice_copy_and_init_hw failed: %d\n", err);
1438                 goto fail_exit;
1439         }
1440
1441         /* store the loaded pkg type info */
1442         ad->active_pkg_type = ice_load_pkg_type(hw);
1443
1444         err = ice_init_hw_tbls(hw);
1445         if (err) {
1446                 PMD_INIT_LOG(ERR, "ice_init_hw_tbls failed: %d\n", err);
1447                 goto fail_init_tbls;
1448         }
1449
1450         return 0;
1451
1452 fail_init_tbls:
1453         rte_free(hw->pkg_copy);
1454 fail_exit:
1455         rte_free(buf);
1456         return err;
1457 }
1458
1459 static void
1460 ice_base_queue_get(struct ice_pf *pf)
1461 {
1462         uint32_t reg;
1463         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1464
1465         reg = ICE_READ_REG(hw, PFLAN_RX_QALLOC);
1466         if (reg & PFLAN_RX_QALLOC_VALID_M) {
1467                 pf->base_queue = reg & PFLAN_RX_QALLOC_FIRSTQ_M;
1468         } else {
1469                 PMD_INIT_LOG(WARNING, "Failed to get Rx base queue"
1470                                         " index");
1471         }
1472 }
1473
1474 static int
1475 parse_bool(const char *key, const char *value, void *args)
1476 {
1477         int *i = (int *)args;
1478         char *end;
1479         int num;
1480
1481         num = strtoul(value, &end, 10);
1482
1483         if (num != 0 && num != 1) {
1484                 PMD_DRV_LOG(WARNING, "invalid value:\"%s\" for key:\"%s\", "
1485                         "value must be 0 or 1",
1486                         value, key);
1487                 return -1;
1488         }
1489
1490         *i = num;
1491         return 0;
1492 }
1493
1494 static int ice_parse_devargs(struct rte_eth_dev *dev)
1495 {
1496         struct ice_adapter *ad =
1497                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1498         struct rte_devargs *devargs = dev->device->devargs;
1499         struct rte_kvargs *kvlist;
1500         int ret;
1501
1502         if (devargs == NULL)
1503                 return 0;
1504
1505         kvlist = rte_kvargs_parse(devargs->args, ice_valid_args);
1506         if (kvlist == NULL) {
1507                 PMD_INIT_LOG(ERR, "Invalid kvargs key\n");
1508                 return -EINVAL;
1509         }
1510
1511         ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
1512                                  &parse_bool, &ad->devargs.safe_mode_support);
1513
1514         rte_kvargs_free(kvlist);
1515         return ret;
1516 }
1517
1518 /* Forward LLDP packets to default VSI by set switch rules */
1519 static int
1520 ice_vsi_config_sw_lldp(struct ice_vsi *vsi,  bool on)
1521 {
1522         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1523         struct ice_fltr_list_entry *s_list_itr = NULL;
1524         struct LIST_HEAD_TYPE list_head;
1525         int ret = 0;
1526
1527         INIT_LIST_HEAD(&list_head);
1528
1529         s_list_itr = (struct ice_fltr_list_entry *)
1530                         ice_malloc(hw, sizeof(*s_list_itr));
1531         if (!s_list_itr)
1532                 return -ENOMEM;
1533         s_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_ETHERTYPE;
1534         s_list_itr->fltr_info.vsi_handle = vsi->idx;
1535         s_list_itr->fltr_info.l_data.ethertype_mac.ethertype =
1536                         RTE_ETHER_TYPE_LLDP;
1537         s_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
1538         s_list_itr->fltr_info.flag = ICE_FLTR_RX;
1539         s_list_itr->fltr_info.src_id = ICE_SRC_ID_LPORT;
1540         LIST_ADD(&s_list_itr->list_entry, &list_head);
1541         if (on)
1542                 ret = ice_add_eth_mac(hw, &list_head);
1543         else
1544                 ret = ice_remove_eth_mac(hw, &list_head);
1545
1546         rte_free(s_list_itr);
1547         return ret;
1548 }
1549
1550 static int
1551 ice_dev_init(struct rte_eth_dev *dev)
1552 {
1553         struct rte_pci_device *pci_dev;
1554         struct rte_intr_handle *intr_handle;
1555         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1556         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1557         struct ice_adapter *ad =
1558                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1559         struct ice_vsi *vsi;
1560         int ret;
1561
1562         dev->dev_ops = &ice_eth_dev_ops;
1563         dev->rx_pkt_burst = ice_recv_pkts;
1564         dev->tx_pkt_burst = ice_xmit_pkts;
1565         dev->tx_pkt_prepare = ice_prep_pkts;
1566
1567         /* for secondary processes, we don't initialise any further as primary
1568          * has already done this work.
1569          */
1570         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1571                 ice_set_rx_function(dev);
1572                 ice_set_tx_function(dev);
1573                 return 0;
1574         }
1575
1576         ice_set_default_ptype_table(dev);
1577         pci_dev = RTE_DEV_TO_PCI(dev->device);
1578         intr_handle = &pci_dev->intr_handle;
1579
1580         pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1581         pf->adapter->eth_dev = dev;
1582         pf->dev_data = dev->data;
1583         hw->back = pf->adapter;
1584         hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr;
1585         hw->vendor_id = pci_dev->id.vendor_id;
1586         hw->device_id = pci_dev->id.device_id;
1587         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1588         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1589         hw->bus.device = pci_dev->addr.devid;
1590         hw->bus.func = pci_dev->addr.function;
1591
1592         ret = ice_parse_devargs(dev);
1593         if (ret) {
1594                 PMD_INIT_LOG(ERR, "Failed to parse devargs");
1595                 return -EINVAL;
1596         }
1597
1598         ice_init_controlq_parameter(hw);
1599
1600         ret = ice_init_hw(hw);
1601         if (ret) {
1602                 PMD_INIT_LOG(ERR, "Failed to initialize HW");
1603                 return -EINVAL;
1604         }
1605
1606         ret = ice_load_pkg(dev);
1607         if (ret) {
1608                 if (ad->devargs.safe_mode_support == 0) {
1609                         PMD_INIT_LOG(ERR, "Failed to load the DDP package,"
1610                                         "Use safe-mode-support=1 to enter Safe Mode");
1611                         return ret;
1612                 }
1613
1614                 PMD_INIT_LOG(WARNING, "Failed to load the DDP package,"
1615                                         "Entering Safe Mode");
1616                 ad->is_safe_mode = 1;
1617         }
1618
1619         PMD_INIT_LOG(INFO, "FW %d.%d.%05d API %d.%d",
1620                      hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
1621                      hw->api_maj_ver, hw->api_min_ver);
1622
1623         ice_pf_sw_init(dev);
1624         ret = ice_init_mac_address(dev);
1625         if (ret) {
1626                 PMD_INIT_LOG(ERR, "Failed to initialize mac address");
1627                 goto err_init_mac;
1628         }
1629
1630         ret = ice_res_pool_init(&pf->msix_pool, 1,
1631                                 hw->func_caps.common_cap.num_msix_vectors - 1);
1632         if (ret) {
1633                 PMD_INIT_LOG(ERR, "Failed to init MSIX pool");
1634                 goto err_msix_pool_init;
1635         }
1636
1637         ret = ice_pf_setup(pf);
1638         if (ret) {
1639                 PMD_INIT_LOG(ERR, "Failed to setup PF");
1640                 goto err_pf_setup;
1641         }
1642
1643         ret = ice_send_driver_ver(hw);
1644         if (ret) {
1645                 PMD_INIT_LOG(ERR, "Failed to send driver version");
1646                 goto err_pf_setup;
1647         }
1648
1649         vsi = pf->main_vsi;
1650
1651         /* Disable double vlan by default */
1652         ice_vsi_config_double_vlan(vsi, FALSE);
1653
1654         ret = ice_aq_stop_lldp(hw, TRUE, FALSE, NULL);
1655         if (ret != ICE_SUCCESS)
1656                 PMD_INIT_LOG(DEBUG, "lldp has already stopped\n");
1657         ret = ice_init_dcb(hw, TRUE);
1658         if (ret != ICE_SUCCESS)
1659                 PMD_INIT_LOG(DEBUG, "Failed to init DCB\n");
1660         /* Forward LLDP packets to default VSI */
1661         ret = ice_vsi_config_sw_lldp(vsi, TRUE);
1662         if (ret != ICE_SUCCESS)
1663                 PMD_INIT_LOG(DEBUG, "Failed to cfg lldp\n");
1664         /* register callback func to eal lib */
1665         rte_intr_callback_register(intr_handle,
1666                                    ice_interrupt_handler, dev);
1667
1668         ice_pf_enable_irq0(hw);
1669
1670         /* enable uio intr after callback register */
1671         rte_intr_enable(intr_handle);
1672
1673         /* get base queue pairs index  in the device */
1674         ice_base_queue_get(pf);
1675
1676         TAILQ_INIT(&pf->flow_list);
1677
1678         return 0;
1679
1680 err_pf_setup:
1681         ice_res_pool_destroy(&pf->msix_pool);
1682 err_msix_pool_init:
1683         rte_free(dev->data->mac_addrs);
1684         dev->data->mac_addrs = NULL;
1685 err_init_mac:
1686         ice_sched_cleanup_all(hw);
1687         rte_free(hw->port_info);
1688         ice_shutdown_all_ctrlq(hw);
1689
1690         return ret;
1691 }
1692
1693 static int
1694 ice_release_vsi(struct ice_vsi *vsi)
1695 {
1696         struct ice_hw *hw;
1697         struct ice_vsi_ctx vsi_ctx;
1698         enum ice_status ret;
1699
1700         if (!vsi)
1701                 return 0;
1702
1703         hw = ICE_VSI_TO_HW(vsi);
1704
1705         ice_remove_all_mac_vlan_filters(vsi);
1706
1707         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1708
1709         vsi_ctx.vsi_num = vsi->vsi_id;
1710         vsi_ctx.info = vsi->info;
1711         ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
1712         if (ret != ICE_SUCCESS) {
1713                 PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
1714                 rte_free(vsi);
1715                 return -1;
1716         }
1717
1718         rte_free(vsi);
1719         return 0;
1720 }
1721
1722 static void
1723 ice_vsi_disable_queues_intr(struct ice_vsi *vsi)
1724 {
1725         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1726         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1727         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1728         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1729         uint16_t msix_intr, i;
1730
1731         /* disable interrupt and also clear all the exist config */
1732         for (i = 0; i < vsi->nb_qps; i++) {
1733                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1734                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1735                 rte_wmb();
1736         }
1737
1738         if (rte_intr_allow_others(intr_handle))
1739                 /* vfio-pci */
1740                 for (i = 0; i < vsi->nb_msix; i++) {
1741                         msix_intr = vsi->msix_intr + i;
1742                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1743                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1744                 }
1745         else
1746                 /* igb_uio */
1747                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
1748 }
1749
1750 static void
1751 ice_dev_stop(struct rte_eth_dev *dev)
1752 {
1753         struct rte_eth_dev_data *data = dev->data;
1754         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1755         struct ice_vsi *main_vsi = pf->main_vsi;
1756         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1757         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1758         uint16_t i;
1759
1760         /* avoid stopping again */
1761         if (pf->adapter_stopped)
1762                 return;
1763
1764         /* stop and clear all Rx queues */
1765         for (i = 0; i < data->nb_rx_queues; i++)
1766                 ice_rx_queue_stop(dev, i);
1767
1768         /* stop and clear all Tx queues */
1769         for (i = 0; i < data->nb_tx_queues; i++)
1770                 ice_tx_queue_stop(dev, i);
1771
1772         /* disable all queue interrupts */
1773         ice_vsi_disable_queues_intr(main_vsi);
1774
1775         /* Clear all queues and release mbufs */
1776         ice_clear_queues(dev);
1777
1778         ice_dev_set_link_down(dev);
1779
1780         /* Clean datapath event and queue/vec mapping */
1781         rte_intr_efd_disable(intr_handle);
1782         if (intr_handle->intr_vec) {
1783                 rte_free(intr_handle->intr_vec);
1784                 intr_handle->intr_vec = NULL;
1785         }
1786
1787         pf->adapter_stopped = true;
1788 }
1789
1790 static void
1791 ice_dev_close(struct rte_eth_dev *dev)
1792 {
1793         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1794         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1795
1796         /* Since stop will make link down, then the link event will be
1797          * triggered, disable the irq firstly to avoid the port_infoe etc
1798          * resources deallocation causing the interrupt service thread
1799          * crash.
1800          */
1801         ice_pf_disable_irq0(hw);
1802
1803         ice_dev_stop(dev);
1804
1805         /* release all queue resource */
1806         ice_free_queues(dev);
1807
1808         ice_res_pool_destroy(&pf->msix_pool);
1809         ice_release_vsi(pf->main_vsi);
1810         ice_sched_cleanup_all(hw);
1811         rte_free(hw->port_info);
1812         hw->port_info = NULL;
1813         ice_shutdown_all_ctrlq(hw);
1814 }
1815
1816 static int
1817 ice_dev_uninit(struct rte_eth_dev *dev)
1818 {
1819         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1820         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1821         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1822         struct rte_flow *p_flow;
1823
1824         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1825                 return 0;
1826
1827         ice_dev_close(dev);
1828
1829         dev->dev_ops = NULL;
1830         dev->rx_pkt_burst = NULL;
1831         dev->tx_pkt_burst = NULL;
1832
1833         rte_free(dev->data->mac_addrs);
1834         dev->data->mac_addrs = NULL;
1835
1836         /* disable uio intr before callback unregister */
1837         rte_intr_disable(intr_handle);
1838
1839         /* unregister callback func from eal lib */
1840         rte_intr_callback_unregister(intr_handle,
1841                                      ice_interrupt_handler, dev);
1842
1843         /* Remove all flows */
1844         while ((p_flow = TAILQ_FIRST(&pf->flow_list))) {
1845                 TAILQ_REMOVE(&pf->flow_list, p_flow, node);
1846                 ice_free_switch_filter_rule(p_flow->rule);
1847                 rte_free(p_flow);
1848         }
1849
1850         return 0;
1851 }
1852
1853 static int
1854 ice_dev_configure(struct rte_eth_dev *dev)
1855 {
1856         struct ice_adapter *ad =
1857                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1858
1859         /* Initialize to TRUE. If any of Rx queues doesn't meet the
1860          * bulk allocation or vector Rx preconditions we will reset it.
1861          */
1862         ad->rx_bulk_alloc_allowed = true;
1863         ad->tx_simple_allowed = true;
1864
1865         return 0;
1866 }
1867
1868 static int ice_init_rss(struct ice_pf *pf)
1869 {
1870         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1871         struct ice_vsi *vsi = pf->main_vsi;
1872         struct rte_eth_dev *dev = pf->adapter->eth_dev;
1873         struct rte_eth_rss_conf *rss_conf;
1874         struct ice_aqc_get_set_rss_keys key;
1875         uint16_t i, nb_q;
1876         int ret = 0;
1877         bool is_safe_mode = pf->adapter->is_safe_mode;
1878
1879         rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
1880         nb_q = dev->data->nb_rx_queues;
1881         vsi->rss_key_size = ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE;
1882         vsi->rss_lut_size = pf->hash_lut_size;
1883
1884         if (is_safe_mode) {
1885                 PMD_DRV_LOG(WARNING, "RSS is not supported in safe mode\n");
1886                 return 0;
1887         }
1888
1889         if (!vsi->rss_key)
1890                 vsi->rss_key = rte_zmalloc(NULL,
1891                                            vsi->rss_key_size, 0);
1892         if (!vsi->rss_lut)
1893                 vsi->rss_lut = rte_zmalloc(NULL,
1894                                            vsi->rss_lut_size, 0);
1895
1896         /* configure RSS key */
1897         if (!rss_conf->rss_key) {
1898                 /* Calculate the default hash key */
1899                 for (i = 0; i <= vsi->rss_key_size; i++)
1900                         vsi->rss_key[i] = (uint8_t)rte_rand();
1901         } else {
1902                 rte_memcpy(vsi->rss_key, rss_conf->rss_key,
1903                            RTE_MIN(rss_conf->rss_key_len,
1904                                    vsi->rss_key_size));
1905         }
1906         rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
1907         ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
1908         if (ret)
1909                 return -EINVAL;
1910
1911         /* init RSS LUT table */
1912         for (i = 0; i < vsi->rss_lut_size; i++)
1913                 vsi->rss_lut[i] = i % nb_q;
1914
1915         ret = ice_aq_set_rss_lut(hw, vsi->idx,
1916                                  ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
1917                                  vsi->rss_lut, vsi->rss_lut_size);
1918         if (ret)
1919                 return -EINVAL;
1920
1921         /* configure RSS for IPv4 with input set IPv4 src/dst */
1922         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
1923                               ICE_FLOW_SEG_HDR_IPV4);
1924         if (ret)
1925                 PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret);
1926
1927         /* configure RSS for IPv6 with input set IPv6 src/dst */
1928         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
1929                               ICE_FLOW_SEG_HDR_IPV6);
1930         if (ret)
1931                 PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret);
1932
1933         /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1934         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6,
1935                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1936         if (ret)
1937                 PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret);
1938
1939         /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1940         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6,
1941                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1942         if (ret)
1943                 PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret);
1944
1945         /* configure RSS for sctp6 with input set IPv6 src/dst */
1946         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
1947                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1948         if (ret)
1949                 PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d",
1950                                 __func__, ret);
1951
1952         /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1953         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4,
1954                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1955         if (ret)
1956                 PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret);
1957
1958         /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1959         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4,
1960                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1961         if (ret)
1962                 PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret);
1963
1964         /* configure RSS for sctp4 with input set IP src/dst */
1965         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
1966                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1967         if (ret)
1968                 PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d",
1969                                 __func__, ret);
1970
1971         return 0;
1972 }
1973
1974 static void
1975 __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
1976                        int base_queue, int nb_queue)
1977 {
1978         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1979         uint32_t val, val_tx;
1980         int i;
1981
1982         for (i = 0; i < nb_queue; i++) {
1983                 /*do actual bind*/
1984                 val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
1985                       (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
1986                 val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
1987                          (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
1988
1989                 PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
1990                             base_queue + i, msix_vect);
1991                 /* set ITR0 value */
1992                 ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x10);
1993                 ICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val);
1994                 ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx);
1995         }
1996 }
1997
1998 static void
1999 ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
2000 {
2001         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
2002         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2003         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2004         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2005         uint16_t msix_vect = vsi->msix_intr;
2006         uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
2007         uint16_t queue_idx = 0;
2008         int record = 0;
2009         int i;
2010
2011         /* clear Rx/Tx queue interrupt */
2012         for (i = 0; i < vsi->nb_used_qps; i++) {
2013                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
2014                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
2015         }
2016
2017         /* PF bind interrupt */
2018         if (rte_intr_dp_is_en(intr_handle)) {
2019                 queue_idx = 0;
2020                 record = 1;
2021         }
2022
2023         for (i = 0; i < vsi->nb_used_qps; i++) {
2024                 if (nb_msix <= 1) {
2025                         if (!rte_intr_allow_others(intr_handle))
2026                                 msix_vect = ICE_MISC_VEC_ID;
2027
2028                         /* uio mapping all queue to one msix_vect */
2029                         __vsi_queues_bind_intr(vsi, msix_vect,
2030                                                vsi->base_queue + i,
2031                                                vsi->nb_used_qps - i);
2032
2033                         for (; !!record && i < vsi->nb_used_qps; i++)
2034                                 intr_handle->intr_vec[queue_idx + i] =
2035                                         msix_vect;
2036                         break;
2037                 }
2038
2039                 /* vfio 1:1 queue/msix_vect mapping */
2040                 __vsi_queues_bind_intr(vsi, msix_vect,
2041                                        vsi->base_queue + i, 1);
2042
2043                 if (!!record)
2044                         intr_handle->intr_vec[queue_idx + i] = msix_vect;
2045
2046                 msix_vect++;
2047                 nb_msix--;
2048         }
2049 }
2050
2051 static void
2052 ice_vsi_enable_queues_intr(struct ice_vsi *vsi)
2053 {
2054         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
2055         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2056         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2057         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2058         uint16_t msix_intr, i;
2059
2060         if (rte_intr_allow_others(intr_handle))
2061                 for (i = 0; i < vsi->nb_used_qps; i++) {
2062                         msix_intr = vsi->msix_intr + i;
2063                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
2064                                       GLINT_DYN_CTL_INTENA_M |
2065                                       GLINT_DYN_CTL_CLEARPBA_M |
2066                                       GLINT_DYN_CTL_ITR_INDX_M |
2067                                       GLINT_DYN_CTL_WB_ON_ITR_M);
2068                 }
2069         else
2070                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
2071                               GLINT_DYN_CTL_INTENA_M |
2072                               GLINT_DYN_CTL_CLEARPBA_M |
2073                               GLINT_DYN_CTL_ITR_INDX_M |
2074                               GLINT_DYN_CTL_WB_ON_ITR_M);
2075 }
2076
2077 static int
2078 ice_rxq_intr_setup(struct rte_eth_dev *dev)
2079 {
2080         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2081         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2082         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2083         struct ice_vsi *vsi = pf->main_vsi;
2084         uint32_t intr_vector = 0;
2085
2086         rte_intr_disable(intr_handle);
2087
2088         /* check and configure queue intr-vector mapping */
2089         if ((rte_intr_cap_multiple(intr_handle) ||
2090              !RTE_ETH_DEV_SRIOV(dev).active) &&
2091             dev->data->dev_conf.intr_conf.rxq != 0) {
2092                 intr_vector = dev->data->nb_rx_queues;
2093                 if (intr_vector > ICE_MAX_INTR_QUEUE_NUM) {
2094                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
2095                                     ICE_MAX_INTR_QUEUE_NUM);
2096                         return -ENOTSUP;
2097                 }
2098                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2099                         return -1;
2100         }
2101
2102         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2103                 intr_handle->intr_vec =
2104                 rte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),
2105                             0);
2106                 if (!intr_handle->intr_vec) {
2107                         PMD_DRV_LOG(ERR,
2108                                     "Failed to allocate %d rx_queues intr_vec",
2109                                     dev->data->nb_rx_queues);
2110                         return -ENOMEM;
2111                 }
2112         }
2113
2114         /* Map queues with MSIX interrupt */
2115         vsi->nb_used_qps = dev->data->nb_rx_queues;
2116         ice_vsi_queues_bind_intr(vsi);
2117
2118         /* Enable interrupts for all the queues */
2119         ice_vsi_enable_queues_intr(vsi);
2120
2121         rte_intr_enable(intr_handle);
2122
2123         return 0;
2124 }
2125
2126 static int
2127 ice_dev_start(struct rte_eth_dev *dev)
2128 {
2129         struct rte_eth_dev_data *data = dev->data;
2130         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2131         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2132         struct ice_vsi *vsi = pf->main_vsi;
2133         uint16_t nb_rxq = 0;
2134         uint16_t nb_txq, i;
2135         int mask, ret;
2136
2137         /* program Tx queues' context in hardware */
2138         for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
2139                 ret = ice_tx_queue_start(dev, nb_txq);
2140                 if (ret) {
2141                         PMD_DRV_LOG(ERR, "fail to start Tx queue %u", nb_txq);
2142                         goto tx_err;
2143                 }
2144         }
2145
2146         /* program Rx queues' context in hardware*/
2147         for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
2148                 ret = ice_rx_queue_start(dev, nb_rxq);
2149                 if (ret) {
2150                         PMD_DRV_LOG(ERR, "fail to start Rx queue %u", nb_rxq);
2151                         goto rx_err;
2152                 }
2153         }
2154
2155         ret = ice_init_rss(pf);
2156         if (ret) {
2157                 PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
2158                 goto rx_err;
2159         }
2160
2161         ice_set_rx_function(dev);
2162         ice_set_tx_function(dev);
2163
2164         mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK |
2165                         ETH_VLAN_EXTEND_MASK;
2166         ret = ice_vlan_offload_set(dev, mask);
2167         if (ret) {
2168                 PMD_INIT_LOG(ERR, "Unable to set VLAN offload");
2169                 goto rx_err;
2170         }
2171
2172         /* enable Rx interrput and mapping Rx queue to interrupt vector */
2173         if (ice_rxq_intr_setup(dev))
2174                 return -EIO;
2175
2176         /* Enable receiving broadcast packets and transmitting packets */
2177         ret = ice_set_vsi_promisc(hw, vsi->idx,
2178                                   ICE_PROMISC_BCAST_RX | ICE_PROMISC_BCAST_TX |
2179                                   ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX,
2180                                   0);
2181         if (ret != ICE_SUCCESS)
2182                 PMD_DRV_LOG(INFO, "fail to set vsi broadcast");
2183
2184         ret = ice_aq_set_event_mask(hw, hw->port_info->lport,
2185                                     ((u16)(ICE_AQ_LINK_EVENT_LINK_FAULT |
2186                                      ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM |
2187                                      ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS |
2188                                      ICE_AQ_LINK_EVENT_SIGNAL_DETECT |
2189                                      ICE_AQ_LINK_EVENT_AN_COMPLETED |
2190                                      ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED)),
2191                                      NULL);
2192         if (ret != ICE_SUCCESS)
2193                 PMD_DRV_LOG(WARNING, "Fail to set phy mask");
2194
2195         ice_dev_set_link_up(dev);
2196
2197         /* Call get_link_info aq commond to enable/disable LSE */
2198         ice_link_update(dev, 0);
2199
2200         pf->adapter_stopped = false;
2201
2202         return 0;
2203
2204         /* stop the started queues if failed to start all queues */
2205 rx_err:
2206         for (i = 0; i < nb_rxq; i++)
2207                 ice_rx_queue_stop(dev, i);
2208 tx_err:
2209         for (i = 0; i < nb_txq; i++)
2210                 ice_tx_queue_stop(dev, i);
2211
2212         return -EIO;
2213 }
2214
2215 static int
2216 ice_dev_reset(struct rte_eth_dev *dev)
2217 {
2218         int ret;
2219
2220         if (dev->data->sriov.active)
2221                 return -ENOTSUP;
2222
2223         ret = ice_dev_uninit(dev);
2224         if (ret) {
2225                 PMD_INIT_LOG(ERR, "failed to uninit device, status = %d", ret);
2226                 return -ENXIO;
2227         }
2228
2229         ret = ice_dev_init(dev);
2230         if (ret) {
2231                 PMD_INIT_LOG(ERR, "failed to init device, status = %d", ret);
2232                 return -ENXIO;
2233         }
2234
2235         return 0;
2236 }
2237
2238 static int
2239 ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2240 {
2241         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2242         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2243         struct ice_vsi *vsi = pf->main_vsi;
2244         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
2245         bool is_safe_mode = pf->adapter->is_safe_mode;
2246         u64 phy_type_low;
2247         u64 phy_type_high;
2248
2249         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
2250         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
2251         dev_info->max_rx_queues = vsi->nb_qps;
2252         dev_info->max_tx_queues = vsi->nb_qps;
2253         dev_info->max_mac_addrs = vsi->max_macaddrs;
2254         dev_info->max_vfs = pci_dev->max_vfs;
2255         dev_info->max_mtu = dev_info->max_rx_pktlen - ICE_ETH_OVERHEAD;
2256         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2257
2258         dev_info->rx_offload_capa =
2259                 DEV_RX_OFFLOAD_VLAN_STRIP |
2260                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2261                 DEV_RX_OFFLOAD_KEEP_CRC |
2262                 DEV_RX_OFFLOAD_SCATTER |
2263                 DEV_RX_OFFLOAD_VLAN_FILTER;
2264         dev_info->tx_offload_capa =
2265                 DEV_TX_OFFLOAD_VLAN_INSERT |
2266                 DEV_TX_OFFLOAD_TCP_TSO |
2267                 DEV_TX_OFFLOAD_MULTI_SEGS |
2268                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
2269         dev_info->flow_type_rss_offloads = 0;
2270
2271         if (!is_safe_mode) {
2272                 dev_info->rx_offload_capa |=
2273                         DEV_RX_OFFLOAD_IPV4_CKSUM |
2274                         DEV_RX_OFFLOAD_UDP_CKSUM |
2275                         DEV_RX_OFFLOAD_TCP_CKSUM |
2276                         DEV_RX_OFFLOAD_QINQ_STRIP |
2277                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2278                         DEV_RX_OFFLOAD_VLAN_EXTEND;
2279                 dev_info->tx_offload_capa |=
2280                         DEV_TX_OFFLOAD_QINQ_INSERT |
2281                         DEV_TX_OFFLOAD_IPV4_CKSUM |
2282                         DEV_TX_OFFLOAD_UDP_CKSUM |
2283                         DEV_TX_OFFLOAD_TCP_CKSUM |
2284                         DEV_TX_OFFLOAD_SCTP_CKSUM |
2285                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2286                         DEV_TX_OFFLOAD_OUTER_UDP_CKSUM;
2287                 dev_info->flow_type_rss_offloads |= ICE_RSS_OFFLOAD_ALL;
2288         }
2289
2290         dev_info->rx_queue_offload_capa = 0;
2291         dev_info->tx_queue_offload_capa = 0;
2292
2293         dev_info->reta_size = pf->hash_lut_size;
2294         dev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2295
2296         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2297                 .rx_thresh = {
2298                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
2299                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
2300                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
2301                 },
2302                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
2303                 .rx_drop_en = 0,
2304                 .offloads = 0,
2305         };
2306
2307         dev_info->default_txconf = (struct rte_eth_txconf) {
2308                 .tx_thresh = {
2309                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
2310                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
2311                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
2312                 },
2313                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
2314                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
2315                 .offloads = 0,
2316         };
2317
2318         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2319                 .nb_max = ICE_MAX_RING_DESC,
2320                 .nb_min = ICE_MIN_RING_DESC,
2321                 .nb_align = ICE_ALIGN_RING_DESC,
2322         };
2323
2324         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2325                 .nb_max = ICE_MAX_RING_DESC,
2326                 .nb_min = ICE_MIN_RING_DESC,
2327                 .nb_align = ICE_ALIGN_RING_DESC,
2328         };
2329
2330         dev_info->speed_capa = ETH_LINK_SPEED_10M |
2331                                ETH_LINK_SPEED_100M |
2332                                ETH_LINK_SPEED_1G |
2333                                ETH_LINK_SPEED_2_5G |
2334                                ETH_LINK_SPEED_5G |
2335                                ETH_LINK_SPEED_10G |
2336                                ETH_LINK_SPEED_20G |
2337                                ETH_LINK_SPEED_25G;
2338
2339         phy_type_low = hw->port_info->phy.phy_type_low;
2340         phy_type_high = hw->port_info->phy.phy_type_high;
2341
2342         if (ICE_PHY_TYPE_SUPPORT_50G(phy_type_low))
2343                 dev_info->speed_capa |= ETH_LINK_SPEED_50G;
2344
2345         if (ICE_PHY_TYPE_SUPPORT_100G_LOW(phy_type_low) ||
2346                         ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type_high))
2347                 dev_info->speed_capa |= ETH_LINK_SPEED_100G;
2348
2349         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2350         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2351
2352         dev_info->default_rxportconf.burst_size = ICE_RX_MAX_BURST;
2353         dev_info->default_txportconf.burst_size = ICE_TX_MAX_BURST;
2354         dev_info->default_rxportconf.nb_queues = 1;
2355         dev_info->default_txportconf.nb_queues = 1;
2356         dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
2357         dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
2358
2359         return 0;
2360 }
2361
2362 static inline int
2363 ice_atomic_read_link_status(struct rte_eth_dev *dev,
2364                             struct rte_eth_link *link)
2365 {
2366         struct rte_eth_link *dst = link;
2367         struct rte_eth_link *src = &dev->data->dev_link;
2368
2369         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2370                                 *(uint64_t *)src) == 0)
2371                 return -1;
2372
2373         return 0;
2374 }
2375
2376 static inline int
2377 ice_atomic_write_link_status(struct rte_eth_dev *dev,
2378                              struct rte_eth_link *link)
2379 {
2380         struct rte_eth_link *dst = &dev->data->dev_link;
2381         struct rte_eth_link *src = link;
2382
2383         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2384                                 *(uint64_t *)src) == 0)
2385                 return -1;
2386
2387         return 0;
2388 }
2389
2390 static int
2391 ice_link_update(struct rte_eth_dev *dev, int wait_to_complete)
2392 {
2393 #define CHECK_INTERVAL 100  /* 100ms */
2394 #define MAX_REPEAT_TIME 10  /* 1s (10 * 100ms) in total */
2395         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2396         struct ice_link_status link_status;
2397         struct rte_eth_link link, old;
2398         int status;
2399         unsigned int rep_cnt = MAX_REPEAT_TIME;
2400         bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
2401
2402         memset(&link, 0, sizeof(link));
2403         memset(&old, 0, sizeof(old));
2404         memset(&link_status, 0, sizeof(link_status));
2405         ice_atomic_read_link_status(dev, &old);
2406
2407         do {
2408                 /* Get link status information from hardware */
2409                 status = ice_aq_get_link_info(hw->port_info, enable_lse,
2410                                               &link_status, NULL);
2411                 if (status != ICE_SUCCESS) {
2412                         link.link_speed = ETH_SPEED_NUM_100M;
2413                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2414                         PMD_DRV_LOG(ERR, "Failed to get link info");
2415                         goto out;
2416                 }
2417
2418                 link.link_status = link_status.link_info & ICE_AQ_LINK_UP;
2419                 if (!wait_to_complete || link.link_status)
2420                         break;
2421
2422                 rte_delay_ms(CHECK_INTERVAL);
2423         } while (--rep_cnt);
2424
2425         if (!link.link_status)
2426                 goto out;
2427
2428         /* Full-duplex operation at all supported speeds */
2429         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2430
2431         /* Parse the link status */
2432         switch (link_status.link_speed) {
2433         case ICE_AQ_LINK_SPEED_10MB:
2434                 link.link_speed = ETH_SPEED_NUM_10M;
2435                 break;
2436         case ICE_AQ_LINK_SPEED_100MB:
2437                 link.link_speed = ETH_SPEED_NUM_100M;
2438                 break;
2439         case ICE_AQ_LINK_SPEED_1000MB:
2440                 link.link_speed = ETH_SPEED_NUM_1G;
2441                 break;
2442         case ICE_AQ_LINK_SPEED_2500MB:
2443                 link.link_speed = ETH_SPEED_NUM_2_5G;
2444                 break;
2445         case ICE_AQ_LINK_SPEED_5GB:
2446                 link.link_speed = ETH_SPEED_NUM_5G;
2447                 break;
2448         case ICE_AQ_LINK_SPEED_10GB:
2449                 link.link_speed = ETH_SPEED_NUM_10G;
2450                 break;
2451         case ICE_AQ_LINK_SPEED_20GB:
2452                 link.link_speed = ETH_SPEED_NUM_20G;
2453                 break;
2454         case ICE_AQ_LINK_SPEED_25GB:
2455                 link.link_speed = ETH_SPEED_NUM_25G;
2456                 break;
2457         case ICE_AQ_LINK_SPEED_40GB:
2458                 link.link_speed = ETH_SPEED_NUM_40G;
2459                 break;
2460         case ICE_AQ_LINK_SPEED_50GB:
2461                 link.link_speed = ETH_SPEED_NUM_50G;
2462                 break;
2463         case ICE_AQ_LINK_SPEED_100GB:
2464                 link.link_speed = ETH_SPEED_NUM_100G;
2465                 break;
2466         case ICE_AQ_LINK_SPEED_UNKNOWN:
2467         default:
2468                 PMD_DRV_LOG(ERR, "Unknown link speed");
2469                 link.link_speed = ETH_SPEED_NUM_NONE;
2470                 break;
2471         }
2472
2473         link.link_autoneg = !(dev->data->dev_conf.link_speeds &
2474                               ETH_LINK_SPEED_FIXED);
2475
2476 out:
2477         ice_atomic_write_link_status(dev, &link);
2478         if (link.link_status == old.link_status)
2479                 return -1;
2480
2481         return 0;
2482 }
2483
2484 /* Force the physical link state by getting the current PHY capabilities from
2485  * hardware and setting the PHY config based on the determined capabilities. If
2486  * link changes, link event will be triggered because both the Enable Automatic
2487  * Link Update and LESM Enable bits are set when setting the PHY capabilities.
2488  */
2489 static enum ice_status
2490 ice_force_phys_link_state(struct ice_hw *hw, bool link_up)
2491 {
2492         struct ice_aqc_set_phy_cfg_data cfg = { 0 };
2493         struct ice_aqc_get_phy_caps_data *pcaps;
2494         struct ice_port_info *pi;
2495         enum ice_status status;
2496
2497         if (!hw || !hw->port_info)
2498                 return ICE_ERR_PARAM;
2499
2500         pi = hw->port_info;
2501
2502         pcaps = (struct ice_aqc_get_phy_caps_data *)
2503                 ice_malloc(hw, sizeof(*pcaps));
2504         if (!pcaps)
2505                 return ICE_ERR_NO_MEMORY;
2506
2507         status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,
2508                                      NULL);
2509         if (status)
2510                 goto out;
2511
2512         /* No change in link */
2513         if (link_up == !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) &&
2514             link_up == !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP))
2515                 goto out;
2516
2517         cfg.phy_type_low = pcaps->phy_type_low;
2518         cfg.phy_type_high = pcaps->phy_type_high;
2519         cfg.caps = pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
2520         cfg.low_power_ctrl = pcaps->low_power_ctrl;
2521         cfg.eee_cap = pcaps->eee_cap;
2522         cfg.eeer_value = pcaps->eeer_value;
2523         cfg.link_fec_opt = pcaps->link_fec_options;
2524         if (link_up)
2525                 cfg.caps |= ICE_AQ_PHY_ENA_LINK;
2526         else
2527                 cfg.caps &= ~ICE_AQ_PHY_ENA_LINK;
2528
2529         status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL);
2530
2531 out:
2532         ice_free(hw, pcaps);
2533         return status;
2534 }
2535
2536 static int
2537 ice_dev_set_link_up(struct rte_eth_dev *dev)
2538 {
2539         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2540
2541         return ice_force_phys_link_state(hw, true);
2542 }
2543
2544 static int
2545 ice_dev_set_link_down(struct rte_eth_dev *dev)
2546 {
2547         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2548
2549         return ice_force_phys_link_state(hw, false);
2550 }
2551
2552 static int
2553 ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2554 {
2555         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2556         struct rte_eth_dev_data *dev_data = pf->dev_data;
2557         uint32_t frame_size = mtu + ICE_ETH_OVERHEAD;
2558
2559         /* check if mtu is within the allowed range */
2560         if (mtu < RTE_ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
2561                 return -EINVAL;
2562
2563         /* mtu setting is forbidden if port is start */
2564         if (dev_data->dev_started) {
2565                 PMD_DRV_LOG(ERR,
2566                             "port %d must be stopped before configuration",
2567                             dev_data->port_id);
2568                 return -EBUSY;
2569         }
2570
2571         if (frame_size > RTE_ETHER_MAX_LEN)
2572                 dev_data->dev_conf.rxmode.offloads |=
2573                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2574         else
2575                 dev_data->dev_conf.rxmode.offloads &=
2576                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2577
2578         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2579
2580         return 0;
2581 }
2582
2583 static int ice_macaddr_set(struct rte_eth_dev *dev,
2584                            struct rte_ether_addr *mac_addr)
2585 {
2586         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2587         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2588         struct ice_vsi *vsi = pf->main_vsi;
2589         struct ice_mac_filter *f;
2590         uint8_t flags = 0;
2591         int ret;
2592
2593         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2594                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2595                 return -EINVAL;
2596         }
2597
2598         TAILQ_FOREACH(f, &vsi->mac_list, next) {
2599                 if (rte_is_same_ether_addr(&pf->dev_addr, &f->mac_info.mac_addr))
2600                         break;
2601         }
2602
2603         if (!f) {
2604                 PMD_DRV_LOG(ERR, "Failed to find filter for default mac");
2605                 return -EIO;
2606         }
2607
2608         ret = ice_remove_mac_filter(vsi, &f->mac_info.mac_addr);
2609         if (ret != ICE_SUCCESS) {
2610                 PMD_DRV_LOG(ERR, "Failed to delete mac filter");
2611                 return -EIO;
2612         }
2613         ret = ice_add_mac_filter(vsi, mac_addr);
2614         if (ret != ICE_SUCCESS) {
2615                 PMD_DRV_LOG(ERR, "Failed to add mac filter");
2616                 return -EIO;
2617         }
2618         memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN);
2619
2620         flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
2621         ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL);
2622         if (ret != ICE_SUCCESS)
2623                 PMD_DRV_LOG(ERR, "Failed to set manage mac");
2624
2625         return 0;
2626 }
2627
2628 /* Add a MAC address, and update filters */
2629 static int
2630 ice_macaddr_add(struct rte_eth_dev *dev,
2631                 struct rte_ether_addr *mac_addr,
2632                 __rte_unused uint32_t index,
2633                 __rte_unused uint32_t pool)
2634 {
2635         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2636         struct ice_vsi *vsi = pf->main_vsi;
2637         int ret;
2638
2639         ret = ice_add_mac_filter(vsi, mac_addr);
2640         if (ret != ICE_SUCCESS) {
2641                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
2642                 return -EINVAL;
2643         }
2644
2645         return ICE_SUCCESS;
2646 }
2647
2648 /* Remove a MAC address, and update filters */
2649 static void
2650 ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index)
2651 {
2652         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2653         struct ice_vsi *vsi = pf->main_vsi;
2654         struct rte_eth_dev_data *data = dev->data;
2655         struct rte_ether_addr *macaddr;
2656         int ret;
2657
2658         macaddr = &data->mac_addrs[index];
2659         ret = ice_remove_mac_filter(vsi, macaddr);
2660         if (ret) {
2661                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
2662                 return;
2663         }
2664 }
2665
2666 static int
2667 ice_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
2668 {
2669         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2670         struct ice_vsi *vsi = pf->main_vsi;
2671         int ret;
2672
2673         PMD_INIT_FUNC_TRACE();
2674
2675         if (on) {
2676                 ret = ice_add_vlan_filter(vsi, vlan_id);
2677                 if (ret < 0) {
2678                         PMD_DRV_LOG(ERR, "Failed to add vlan filter");
2679                         return -EINVAL;
2680                 }
2681         } else {
2682                 ret = ice_remove_vlan_filter(vsi, vlan_id);
2683                 if (ret < 0) {
2684                         PMD_DRV_LOG(ERR, "Failed to remove vlan filter");
2685                         return -EINVAL;
2686                 }
2687         }
2688
2689         return 0;
2690 }
2691
2692 /* Configure vlan filter on or off */
2693 static int
2694 ice_vsi_config_vlan_filter(struct ice_vsi *vsi, bool on)
2695 {
2696         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2697         struct ice_vsi_ctx ctxt;
2698         uint8_t sec_flags, sw_flags2;
2699         int ret = 0;
2700
2701         sec_flags = ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2702                     ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2703         sw_flags2 = ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2704
2705         if (on) {
2706                 vsi->info.sec_flags |= sec_flags;
2707                 vsi->info.sw_flags2 |= sw_flags2;
2708         } else {
2709                 vsi->info.sec_flags &= ~sec_flags;
2710                 vsi->info.sw_flags2 &= ~sw_flags2;
2711         }
2712         vsi->info.sw_id = hw->port_info->sw_id;
2713         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2714         ctxt.info.valid_sections =
2715                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2716                                  ICE_AQ_VSI_PROP_SECURITY_VALID);
2717         ctxt.vsi_num = vsi->vsi_id;
2718
2719         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2720         if (ret) {
2721                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan rx pruning",
2722                             on ? "enable" : "disable");
2723                 return -EINVAL;
2724         } else {
2725                 vsi->info.valid_sections |=
2726                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2727                                          ICE_AQ_VSI_PROP_SECURITY_VALID);
2728         }
2729
2730         /* consist with other drivers, allow untagged packet when vlan filter on */
2731         if (on)
2732                 ret = ice_add_vlan_filter(vsi, 0);
2733         else
2734                 ret = ice_remove_vlan_filter(vsi, 0);
2735
2736         return 0;
2737 }
2738
2739 static int
2740 ice_vsi_config_vlan_stripping(struct ice_vsi *vsi, bool on)
2741 {
2742         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2743         struct ice_vsi_ctx ctxt;
2744         uint8_t vlan_flags;
2745         int ret = 0;
2746
2747         /* Check if it has been already on or off */
2748         if (vsi->info.valid_sections &
2749                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID)) {
2750                 if (on) {
2751                         if ((vsi->info.vlan_flags &
2752                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2753                             ICE_AQ_VSI_VLAN_EMOD_STR_BOTH)
2754                                 return 0; /* already on */
2755                 } else {
2756                         if ((vsi->info.vlan_flags &
2757                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2758                             ICE_AQ_VSI_VLAN_EMOD_NOTHING)
2759                                 return 0; /* already off */
2760                 }
2761         }
2762
2763         if (on)
2764                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
2765         else
2766                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
2767         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_VLAN_EMOD_M);
2768         vsi->info.vlan_flags |= vlan_flags;
2769         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2770         ctxt.info.valid_sections =
2771                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2772         ctxt.vsi_num = vsi->vsi_id;
2773         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2774         if (ret) {
2775                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan stripping",
2776                             on ? "enable" : "disable");
2777                 return -EINVAL;
2778         }
2779
2780         vsi->info.valid_sections |=
2781                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2782
2783         return ret;
2784 }
2785
2786 static int
2787 ice_vlan_offload_set(struct rte_eth_dev *dev, int mask)
2788 {
2789         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2790         struct ice_vsi *vsi = pf->main_vsi;
2791         struct rte_eth_rxmode *rxmode;
2792
2793         rxmode = &dev->data->dev_conf.rxmode;
2794         if (mask & ETH_VLAN_FILTER_MASK) {
2795                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2796                         ice_vsi_config_vlan_filter(vsi, TRUE);
2797                 else
2798                         ice_vsi_config_vlan_filter(vsi, FALSE);
2799         }
2800
2801         if (mask & ETH_VLAN_STRIP_MASK) {
2802                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2803                         ice_vsi_config_vlan_stripping(vsi, TRUE);
2804                 else
2805                         ice_vsi_config_vlan_stripping(vsi, FALSE);
2806         }
2807
2808         if (mask & ETH_VLAN_EXTEND_MASK) {
2809                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2810                         ice_vsi_config_double_vlan(vsi, TRUE);
2811                 else
2812                         ice_vsi_config_double_vlan(vsi, FALSE);
2813         }
2814
2815         return 0;
2816 }
2817
2818 static int
2819 ice_vlan_tpid_set(struct rte_eth_dev *dev,
2820                   enum rte_vlan_type vlan_type,
2821                   uint16_t tpid)
2822 {
2823         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2824         uint64_t reg_r = 0, reg_w = 0;
2825         uint16_t reg_id = 0;
2826         int ret = 0;
2827         int qinq = dev->data->dev_conf.rxmode.offloads &
2828                    DEV_RX_OFFLOAD_VLAN_EXTEND;
2829
2830         switch (vlan_type) {
2831         case ETH_VLAN_TYPE_OUTER:
2832                 if (qinq)
2833                         reg_id = 3;
2834                 else
2835                         reg_id = 5;
2836                 break;
2837         case ETH_VLAN_TYPE_INNER:
2838                 if (qinq) {
2839                         reg_id = 5;
2840                 } else {
2841                         PMD_DRV_LOG(ERR,
2842                                     "Unsupported vlan type in single vlan.");
2843                         return -EINVAL;
2844                 }
2845                 break;
2846         default:
2847                 PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type);
2848                 return -EINVAL;
2849         }
2850         reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id));
2851         PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: "
2852                     "0x%08"PRIx64"", reg_id, reg_r);
2853
2854         reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M));
2855         reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S);
2856         if (reg_r == reg_w) {
2857                 PMD_DRV_LOG(DEBUG, "No need to write");
2858                 return 0;
2859         }
2860
2861         ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w);
2862         PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to "
2863                     "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id);
2864
2865         return ret;
2866 }
2867
2868 static int
2869 ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2870 {
2871         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2872         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2873         int ret;
2874
2875         if (!lut)
2876                 return -EINVAL;
2877
2878         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2879                 ret = ice_aq_get_rss_lut(hw, vsi->idx, TRUE,
2880                                          lut, lut_size);
2881                 if (ret) {
2882                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2883                         return -EINVAL;
2884                 }
2885         } else {
2886                 uint64_t *lut_dw = (uint64_t *)lut;
2887                 uint16_t i, lut_size_dw = lut_size / 4;
2888
2889                 for (i = 0; i < lut_size_dw; i++)
2890                         lut_dw[i] = ICE_READ_REG(hw, PFQF_HLUT(i));
2891         }
2892
2893         return 0;
2894 }
2895
2896 static int
2897 ice_set_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2898 {
2899         struct ice_pf *pf;
2900         struct ice_hw *hw;
2901         int ret;
2902
2903         if (!vsi || !lut)
2904                 return -EINVAL;
2905
2906         pf = ICE_VSI_TO_PF(vsi);
2907         hw = ICE_VSI_TO_HW(vsi);
2908
2909         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2910                 ret = ice_aq_set_rss_lut(hw, vsi->idx, TRUE,
2911                                          lut, lut_size);
2912                 if (ret) {
2913                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2914                         return -EINVAL;
2915                 }
2916         } else {
2917                 uint64_t *lut_dw = (uint64_t *)lut;
2918                 uint16_t i, lut_size_dw = lut_size / 4;
2919
2920                 for (i = 0; i < lut_size_dw; i++)
2921                         ICE_WRITE_REG(hw, PFQF_HLUT(i), lut_dw[i]);
2922
2923                 ice_flush(hw);
2924         }
2925
2926         return 0;
2927 }
2928
2929 static int
2930 ice_rss_reta_update(struct rte_eth_dev *dev,
2931                     struct rte_eth_rss_reta_entry64 *reta_conf,
2932                     uint16_t reta_size)
2933 {
2934         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2935         uint16_t i, lut_size = pf->hash_lut_size;
2936         uint16_t idx, shift;
2937         uint8_t *lut;
2938         int ret;
2939
2940         if (reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128 &&
2941             reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512 &&
2942             reta_size != ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K) {
2943                 PMD_DRV_LOG(ERR,
2944                             "The size of hash lookup table configured (%d)"
2945                             "doesn't match the number hardware can "
2946                             "supported (128, 512, 2048)",
2947                             reta_size);
2948                 return -EINVAL;
2949         }
2950
2951         /* It MUST use the current LUT size to get the RSS lookup table,
2952          * otherwise if will fail with -100 error code.
2953          */
2954         lut = rte_zmalloc(NULL,  RTE_MAX(reta_size, lut_size), 0);
2955         if (!lut) {
2956                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2957                 return -ENOMEM;
2958         }
2959         ret = ice_get_rss_lut(pf->main_vsi, lut, lut_size);
2960         if (ret)
2961                 goto out;
2962
2963         for (i = 0; i < reta_size; i++) {
2964                 idx = i / RTE_RETA_GROUP_SIZE;
2965                 shift = i % RTE_RETA_GROUP_SIZE;
2966                 if (reta_conf[idx].mask & (1ULL << shift))
2967                         lut[i] = reta_conf[idx].reta[shift];
2968         }
2969         ret = ice_set_rss_lut(pf->main_vsi, lut, reta_size);
2970         if (ret == 0 && lut_size != reta_size) {
2971                 PMD_DRV_LOG(INFO,
2972                             "The size of hash lookup table is changed from (%d) to (%d)",
2973                             lut_size, reta_size);
2974                 pf->hash_lut_size = reta_size;
2975         }
2976
2977 out:
2978         rte_free(lut);
2979
2980         return ret;
2981 }
2982
2983 static int
2984 ice_rss_reta_query(struct rte_eth_dev *dev,
2985                    struct rte_eth_rss_reta_entry64 *reta_conf,
2986                    uint16_t reta_size)
2987 {
2988         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2989         uint16_t i, lut_size = pf->hash_lut_size;
2990         uint16_t idx, shift;
2991         uint8_t *lut;
2992         int ret;
2993
2994         if (reta_size != lut_size) {
2995                 PMD_DRV_LOG(ERR,
2996                             "The size of hash lookup table configured (%d)"
2997                             "doesn't match the number hardware can "
2998                             "supported (%d)",
2999                             reta_size, lut_size);
3000                 return -EINVAL;
3001         }
3002
3003         lut = rte_zmalloc(NULL, reta_size, 0);
3004         if (!lut) {
3005                 PMD_DRV_LOG(ERR, "No memory can be allocated");
3006                 return -ENOMEM;
3007         }
3008
3009         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
3010         if (ret)
3011                 goto out;
3012
3013         for (i = 0; i < reta_size; i++) {
3014                 idx = i / RTE_RETA_GROUP_SIZE;
3015                 shift = i % RTE_RETA_GROUP_SIZE;
3016                 if (reta_conf[idx].mask & (1ULL << shift))
3017                         reta_conf[idx].reta[shift] = lut[i];
3018         }
3019
3020 out:
3021         rte_free(lut);
3022
3023         return ret;
3024 }
3025
3026 static int
3027 ice_set_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t key_len)
3028 {
3029         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
3030         int ret = 0;
3031
3032         if (!key || key_len == 0) {
3033                 PMD_DRV_LOG(DEBUG, "No key to be configured");
3034                 return 0;
3035         } else if (key_len != (VSIQF_HKEY_MAX_INDEX + 1) *
3036                    sizeof(uint32_t)) {
3037                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
3038                 return -EINVAL;
3039         }
3040
3041         struct ice_aqc_get_set_rss_keys *key_dw =
3042                 (struct ice_aqc_get_set_rss_keys *)key;
3043
3044         ret = ice_aq_set_rss_key(hw, vsi->idx, key_dw);
3045         if (ret) {
3046                 PMD_DRV_LOG(ERR, "Failed to configure RSS key via AQ");
3047                 ret = -EINVAL;
3048         }
3049
3050         return ret;
3051 }
3052
3053 static int
3054 ice_get_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t *key_len)
3055 {
3056         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
3057         int ret;
3058
3059         if (!key || !key_len)
3060                 return -EINVAL;
3061
3062         ret = ice_aq_get_rss_key
3063                 (hw, vsi->idx,
3064                  (struct ice_aqc_get_set_rss_keys *)key);
3065         if (ret) {
3066                 PMD_DRV_LOG(ERR, "Failed to get RSS key via AQ");
3067                 return -EINVAL;
3068         }
3069         *key_len = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
3070
3071         return 0;
3072 }
3073
3074 static int
3075 ice_rss_hash_update(struct rte_eth_dev *dev,
3076                     struct rte_eth_rss_conf *rss_conf)
3077 {
3078         enum ice_status status = ICE_SUCCESS;
3079         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3080         struct ice_vsi *vsi = pf->main_vsi;
3081
3082         /* set hash key */
3083         status = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);
3084         if (status)
3085                 return status;
3086
3087         /* TODO: hash enable config, ice_add_rss_cfg */
3088         return 0;
3089 }
3090
3091 static int
3092 ice_rss_hash_conf_get(struct rte_eth_dev *dev,
3093                       struct rte_eth_rss_conf *rss_conf)
3094 {
3095         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3096         struct ice_vsi *vsi = pf->main_vsi;
3097
3098         ice_get_rss_key(vsi, rss_conf->rss_key,
3099                         &rss_conf->rss_key_len);
3100
3101         /* TODO: default set to 0 as hf config is not supported now */
3102         rss_conf->rss_hf = 0;
3103         return 0;
3104 }
3105
3106 static int
3107 ice_promisc_enable(struct rte_eth_dev *dev)
3108 {
3109         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3110         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3111         struct ice_vsi *vsi = pf->main_vsi;
3112         enum ice_status status;
3113         uint8_t pmask;
3114         int ret = 0;
3115
3116         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
3117                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
3118
3119         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
3120         switch (status) {
3121         case ICE_ERR_ALREADY_EXISTS:
3122                 PMD_DRV_LOG(DEBUG, "Promisc mode has already been enabled");
3123         case ICE_SUCCESS:
3124                 break;
3125         default:
3126                 PMD_DRV_LOG(ERR, "Failed to enable promisc, err=%d", status);
3127                 ret = -EAGAIN;
3128         }
3129
3130         return ret;
3131 }
3132
3133 static int
3134 ice_promisc_disable(struct rte_eth_dev *dev)
3135 {
3136         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3137         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3138         struct ice_vsi *vsi = pf->main_vsi;
3139         enum ice_status status;
3140         uint8_t pmask;
3141         int ret = 0;
3142
3143         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
3144                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
3145
3146         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
3147         if (status != ICE_SUCCESS) {
3148                 PMD_DRV_LOG(ERR, "Failed to clear promisc, err=%d", status);
3149                 ret = -EAGAIN;
3150         }
3151
3152         return ret;
3153 }
3154
3155 static void
3156 ice_allmulti_enable(struct rte_eth_dev *dev)
3157 {
3158         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3159         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3160         struct ice_vsi *vsi = pf->main_vsi;
3161         enum ice_status status;
3162         uint8_t pmask;
3163
3164         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
3165
3166         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
3167         if (status != ICE_SUCCESS)
3168                 PMD_DRV_LOG(ERR, "Failed to enable allmulti, err=%d", status);
3169 }
3170
3171 static void
3172 ice_allmulti_disable(struct rte_eth_dev *dev)
3173 {
3174         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3175         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3176         struct ice_vsi *vsi = pf->main_vsi;
3177         enum ice_status status;
3178         uint8_t pmask;
3179
3180         if (dev->data->promiscuous == 1)
3181                 return; /* must remain in all_multicast mode */
3182
3183         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
3184
3185         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
3186         if (status != ICE_SUCCESS)
3187                 PMD_DRV_LOG(ERR, "Failed to clear allmulti, err=%d", status);
3188 }
3189
3190 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
3191                                     uint16_t queue_id)
3192 {
3193         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
3194         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
3195         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3196         uint32_t val;
3197         uint16_t msix_intr;
3198
3199         msix_intr = intr_handle->intr_vec[queue_id];
3200
3201         val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
3202               GLINT_DYN_CTL_ITR_INDX_M;
3203         val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
3204
3205         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
3206         rte_intr_ack(&pci_dev->intr_handle);
3207
3208         return 0;
3209 }
3210
3211 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
3212                                      uint16_t queue_id)
3213 {
3214         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
3215         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
3216         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3217         uint16_t msix_intr;
3218
3219         msix_intr = intr_handle->intr_vec[queue_id];
3220
3221         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);
3222
3223         return 0;
3224 }
3225
3226 static int
3227 ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
3228 {
3229         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3230         u32 full_ver;
3231         u8 ver, patch;
3232         u16 build;
3233         int ret;
3234
3235         full_ver = hw->nvm.oem_ver;
3236         ver = (u8)(full_ver >> 24);
3237         build = (u16)((full_ver >> 8) & 0xffff);
3238         patch = (u8)(full_ver & 0xff);
3239
3240         ret = snprintf(fw_version, fw_size,
3241                         "%d.%d%d 0x%08x %d.%d.%d",
3242                         ((hw->nvm.ver >> 12) & 0xf),
3243                         ((hw->nvm.ver >> 4) & 0xff),
3244                         (hw->nvm.ver & 0xf), hw->nvm.eetrack,
3245                         ver, build, patch);
3246
3247         /* add the size of '\0' */
3248         ret += 1;
3249         if (fw_size < (u32)ret)
3250                 return ret;
3251         else
3252                 return 0;
3253 }
3254
3255 static int
3256 ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)
3257 {
3258         struct ice_hw *hw;
3259         struct ice_vsi_ctx ctxt;
3260         uint8_t vlan_flags = 0;
3261         int ret;
3262
3263         if (!vsi || !info) {
3264                 PMD_DRV_LOG(ERR, "invalid parameters");
3265                 return -EINVAL;
3266         }
3267
3268         if (info->on) {
3269                 vsi->info.pvid = info->config.pvid;
3270                 /**
3271                  * If insert pvid is enabled, only tagged pkts are
3272                  * allowed to be sent out.
3273                  */
3274                 vlan_flags = ICE_AQ_VSI_PVLAN_INSERT_PVID |
3275                              ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
3276         } else {
3277                 vsi->info.pvid = 0;
3278                 if (info->config.reject.tagged == 0)
3279                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_TAGGED;
3280
3281                 if (info->config.reject.untagged == 0)
3282                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
3283         }
3284         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_PVLAN_INSERT_PVID |
3285                                   ICE_AQ_VSI_VLAN_MODE_M);
3286         vsi->info.vlan_flags |= vlan_flags;
3287         memset(&ctxt, 0, sizeof(ctxt));
3288         rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3289         ctxt.info.valid_sections =
3290                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
3291         ctxt.vsi_num = vsi->vsi_id;
3292
3293         hw = ICE_VSI_TO_HW(vsi);
3294         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
3295         if (ret != ICE_SUCCESS) {
3296                 PMD_DRV_LOG(ERR,
3297                             "update VSI for VLAN insert failed, err %d",
3298                             ret);
3299                 return -EINVAL;
3300         }
3301
3302         vsi->info.valid_sections |=
3303                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
3304
3305         return ret;
3306 }
3307
3308 static int
3309 ice_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
3310 {
3311         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3312         struct ice_vsi *vsi = pf->main_vsi;
3313         struct rte_eth_dev_data *data = pf->dev_data;
3314         struct ice_vsi_vlan_pvid_info info;
3315         int ret;
3316
3317         memset(&info, 0, sizeof(info));
3318         info.on = on;
3319         if (info.on) {
3320                 info.config.pvid = pvid;
3321         } else {
3322                 info.config.reject.tagged =
3323                         data->dev_conf.txmode.hw_vlan_reject_tagged;
3324                 info.config.reject.untagged =
3325                         data->dev_conf.txmode.hw_vlan_reject_untagged;
3326         }
3327
3328         ret = ice_vsi_vlan_pvid_set(vsi, &info);
3329         if (ret < 0) {
3330                 PMD_DRV_LOG(ERR, "Failed to set pvid.");
3331                 return -EINVAL;
3332         }
3333
3334         return 0;
3335 }
3336
3337 static int
3338 ice_get_eeprom_length(struct rte_eth_dev *dev)
3339 {
3340         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3341
3342         /* Convert word count to byte count */
3343         return hw->nvm.sr_words << 1;
3344 }
3345
3346 static int
3347 ice_get_eeprom(struct rte_eth_dev *dev,
3348                struct rte_dev_eeprom_info *eeprom)
3349 {
3350         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3351         uint16_t *data = eeprom->data;
3352         uint16_t first_word, last_word, nwords;
3353         enum ice_status status = ICE_SUCCESS;
3354
3355         first_word = eeprom->offset >> 1;
3356         last_word = (eeprom->offset + eeprom->length - 1) >> 1;
3357         nwords = last_word - first_word + 1;
3358
3359         if (first_word >= hw->nvm.sr_words ||
3360             last_word >= hw->nvm.sr_words) {
3361                 PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range.");
3362                 return -EINVAL;
3363         }
3364
3365         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
3366
3367         status = ice_read_sr_buf(hw, first_word, &nwords, data);
3368         if (status) {
3369                 PMD_DRV_LOG(ERR, "EEPROM read failed.");
3370                 eeprom->length = sizeof(uint16_t) * nwords;
3371                 return -EIO;
3372         }
3373
3374         return 0;
3375 }
3376
3377 static void
3378 ice_stat_update_32(struct ice_hw *hw,
3379                    uint32_t reg,
3380                    bool offset_loaded,
3381                    uint64_t *offset,
3382                    uint64_t *stat)
3383 {
3384         uint64_t new_data;
3385
3386         new_data = (uint64_t)ICE_READ_REG(hw, reg);
3387         if (!offset_loaded)
3388                 *offset = new_data;
3389
3390         if (new_data >= *offset)
3391                 *stat = (uint64_t)(new_data - *offset);
3392         else
3393                 *stat = (uint64_t)((new_data +
3394                                     ((uint64_t)1 << ICE_32_BIT_WIDTH))
3395                                    - *offset);
3396 }
3397
3398 static void
3399 ice_stat_update_40(struct ice_hw *hw,
3400                    uint32_t hireg,
3401                    uint32_t loreg,
3402                    bool offset_loaded,
3403                    uint64_t *offset,
3404                    uint64_t *stat)
3405 {
3406         uint64_t new_data;
3407
3408         new_data = (uint64_t)ICE_READ_REG(hw, loreg);
3409         new_data |= (uint64_t)(ICE_READ_REG(hw, hireg) & ICE_8_BIT_MASK) <<
3410                     ICE_32_BIT_WIDTH;
3411
3412         if (!offset_loaded)
3413                 *offset = new_data;
3414
3415         if (new_data >= *offset)
3416                 *stat = new_data - *offset;
3417         else
3418                 *stat = (uint64_t)((new_data +
3419                                     ((uint64_t)1 << ICE_40_BIT_WIDTH)) -
3420                                    *offset);
3421
3422         *stat &= ICE_40_BIT_MASK;
3423 }
3424
3425 /* Get all the statistics of a VSI */
3426 static void
3427 ice_update_vsi_stats(struct ice_vsi *vsi)
3428 {
3429         struct ice_eth_stats *oes = &vsi->eth_stats_offset;
3430         struct ice_eth_stats *nes = &vsi->eth_stats;
3431         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
3432         int idx = rte_le_to_cpu_16(vsi->vsi_id);
3433
3434         ice_stat_update_40(hw, GLV_GORCH(idx), GLV_GORCL(idx),
3435                            vsi->offset_loaded, &oes->rx_bytes,
3436                            &nes->rx_bytes);
3437         ice_stat_update_40(hw, GLV_UPRCH(idx), GLV_UPRCL(idx),
3438                            vsi->offset_loaded, &oes->rx_unicast,
3439                            &nes->rx_unicast);
3440         ice_stat_update_40(hw, GLV_MPRCH(idx), GLV_MPRCL(idx),
3441                            vsi->offset_loaded, &oes->rx_multicast,
3442                            &nes->rx_multicast);
3443         ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),
3444                            vsi->offset_loaded, &oes->rx_broadcast,
3445                            &nes->rx_broadcast);
3446         /* exclude CRC bytes */
3447         nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
3448                           nes->rx_broadcast) * RTE_ETHER_CRC_LEN;
3449
3450         ice_stat_update_32(hw, GLV_RDPC(idx), vsi->offset_loaded,
3451                            &oes->rx_discards, &nes->rx_discards);
3452         /* GLV_REPC not supported */
3453         /* GLV_RMPC not supported */
3454         ice_stat_update_32(hw, GLSWID_RUPP(idx), vsi->offset_loaded,
3455                            &oes->rx_unknown_protocol,
3456                            &nes->rx_unknown_protocol);
3457         ice_stat_update_40(hw, GLV_GOTCH(idx), GLV_GOTCL(idx),
3458                            vsi->offset_loaded, &oes->tx_bytes,
3459                            &nes->tx_bytes);
3460         ice_stat_update_40(hw, GLV_UPTCH(idx), GLV_UPTCL(idx),
3461                            vsi->offset_loaded, &oes->tx_unicast,
3462                            &nes->tx_unicast);
3463         ice_stat_update_40(hw, GLV_MPTCH(idx), GLV_MPTCL(idx),
3464                            vsi->offset_loaded, &oes->tx_multicast,
3465                            &nes->tx_multicast);
3466         ice_stat_update_40(hw, GLV_BPTCH(idx), GLV_BPTCL(idx),
3467                            vsi->offset_loaded,  &oes->tx_broadcast,
3468                            &nes->tx_broadcast);
3469         /* GLV_TDPC not supported */
3470         ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,
3471                            &oes->tx_errors, &nes->tx_errors);
3472         vsi->offset_loaded = true;
3473
3474         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************",
3475                     vsi->vsi_id);
3476         PMD_DRV_LOG(DEBUG, "rx_bytes:            %"PRIu64"", nes->rx_bytes);
3477         PMD_DRV_LOG(DEBUG, "rx_unicast:          %"PRIu64"", nes->rx_unicast);
3478         PMD_DRV_LOG(DEBUG, "rx_multicast:        %"PRIu64"", nes->rx_multicast);
3479         PMD_DRV_LOG(DEBUG, "rx_broadcast:        %"PRIu64"", nes->rx_broadcast);
3480         PMD_DRV_LOG(DEBUG, "rx_discards:         %"PRIu64"", nes->rx_discards);
3481         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol: %"PRIu64"",
3482                     nes->rx_unknown_protocol);
3483         PMD_DRV_LOG(DEBUG, "tx_bytes:            %"PRIu64"", nes->tx_bytes);
3484         PMD_DRV_LOG(DEBUG, "tx_unicast:          %"PRIu64"", nes->tx_unicast);
3485         PMD_DRV_LOG(DEBUG, "tx_multicast:        %"PRIu64"", nes->tx_multicast);
3486         PMD_DRV_LOG(DEBUG, "tx_broadcast:        %"PRIu64"", nes->tx_broadcast);
3487         PMD_DRV_LOG(DEBUG, "tx_discards:         %"PRIu64"", nes->tx_discards);
3488         PMD_DRV_LOG(DEBUG, "tx_errors:           %"PRIu64"", nes->tx_errors);
3489         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats end ****************",
3490                     vsi->vsi_id);
3491 }
3492
3493 static void
3494 ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)
3495 {
3496         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3497         struct ice_hw_port_stats *os = &pf->stats_offset; /* old stats */
3498
3499         /* Get statistics of struct ice_eth_stats */
3500         ice_stat_update_40(hw, GLPRT_GORCH(hw->port_info->lport),
3501                            GLPRT_GORCL(hw->port_info->lport),
3502                            pf->offset_loaded, &os->eth.rx_bytes,
3503                            &ns->eth.rx_bytes);
3504         ice_stat_update_40(hw, GLPRT_UPRCH(hw->port_info->lport),
3505                            GLPRT_UPRCL(hw->port_info->lport),
3506                            pf->offset_loaded, &os->eth.rx_unicast,
3507                            &ns->eth.rx_unicast);
3508         ice_stat_update_40(hw, GLPRT_MPRCH(hw->port_info->lport),
3509                            GLPRT_MPRCL(hw->port_info->lport),
3510                            pf->offset_loaded, &os->eth.rx_multicast,
3511                            &ns->eth.rx_multicast);
3512         ice_stat_update_40(hw, GLPRT_BPRCH(hw->port_info->lport),
3513                            GLPRT_BPRCL(hw->port_info->lport),
3514                            pf->offset_loaded, &os->eth.rx_broadcast,
3515                            &ns->eth.rx_broadcast);
3516         ice_stat_update_32(hw, PRTRPB_RDPC,
3517                            pf->offset_loaded, &os->eth.rx_discards,
3518                            &ns->eth.rx_discards);
3519
3520         /* Workaround: CRC size should not be included in byte statistics,
3521          * so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx
3522          * packet.
3523          */
3524         ns->eth.rx_bytes -= (ns->eth.rx_unicast + ns->eth.rx_multicast +
3525                              ns->eth.rx_broadcast) * RTE_ETHER_CRC_LEN;
3526
3527         /* GLPRT_REPC not supported */
3528         /* GLPRT_RMPC not supported */
3529         ice_stat_update_32(hw, GLSWID_RUPP(hw->port_info->lport),
3530                            pf->offset_loaded,
3531                            &os->eth.rx_unknown_protocol,
3532                            &ns->eth.rx_unknown_protocol);
3533         ice_stat_update_40(hw, GLPRT_GOTCH(hw->port_info->lport),
3534                            GLPRT_GOTCL(hw->port_info->lport),
3535                            pf->offset_loaded, &os->eth.tx_bytes,
3536                            &ns->eth.tx_bytes);
3537         ice_stat_update_40(hw, GLPRT_UPTCH(hw->port_info->lport),
3538                            GLPRT_UPTCL(hw->port_info->lport),
3539                            pf->offset_loaded, &os->eth.tx_unicast,
3540                            &ns->eth.tx_unicast);
3541         ice_stat_update_40(hw, GLPRT_MPTCH(hw->port_info->lport),
3542                            GLPRT_MPTCL(hw->port_info->lport),
3543                            pf->offset_loaded, &os->eth.tx_multicast,
3544                            &ns->eth.tx_multicast);
3545         ice_stat_update_40(hw, GLPRT_BPTCH(hw->port_info->lport),
3546                            GLPRT_BPTCL(hw->port_info->lport),
3547                            pf->offset_loaded, &os->eth.tx_broadcast,
3548                            &ns->eth.tx_broadcast);
3549         ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +
3550                              ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN;
3551
3552         /* GLPRT_TEPC not supported */
3553
3554         /* additional port specific stats */
3555         ice_stat_update_32(hw, GLPRT_TDOLD(hw->port_info->lport),
3556                            pf->offset_loaded, &os->tx_dropped_link_down,
3557                            &ns->tx_dropped_link_down);
3558         ice_stat_update_32(hw, GLPRT_CRCERRS(hw->port_info->lport),
3559                            pf->offset_loaded, &os->crc_errors,
3560                            &ns->crc_errors);
3561         ice_stat_update_32(hw, GLPRT_ILLERRC(hw->port_info->lport),
3562                            pf->offset_loaded, &os->illegal_bytes,
3563                            &ns->illegal_bytes);
3564         /* GLPRT_ERRBC not supported */
3565         ice_stat_update_32(hw, GLPRT_MLFC(hw->port_info->lport),
3566                            pf->offset_loaded, &os->mac_local_faults,
3567                            &ns->mac_local_faults);
3568         ice_stat_update_32(hw, GLPRT_MRFC(hw->port_info->lport),
3569                            pf->offset_loaded, &os->mac_remote_faults,
3570                            &ns->mac_remote_faults);
3571
3572         ice_stat_update_32(hw, GLPRT_RLEC(hw->port_info->lport),
3573                            pf->offset_loaded, &os->rx_len_errors,
3574                            &ns->rx_len_errors);
3575
3576         ice_stat_update_32(hw, GLPRT_LXONRXC(hw->port_info->lport),
3577                            pf->offset_loaded, &os->link_xon_rx,
3578                            &ns->link_xon_rx);
3579         ice_stat_update_32(hw, GLPRT_LXOFFRXC(hw->port_info->lport),
3580                            pf->offset_loaded, &os->link_xoff_rx,
3581                            &ns->link_xoff_rx);
3582         ice_stat_update_32(hw, GLPRT_LXONTXC(hw->port_info->lport),
3583                            pf->offset_loaded, &os->link_xon_tx,
3584                            &ns->link_xon_tx);
3585         ice_stat_update_32(hw, GLPRT_LXOFFTXC(hw->port_info->lport),
3586                            pf->offset_loaded, &os->link_xoff_tx,
3587                            &ns->link_xoff_tx);
3588         ice_stat_update_40(hw, GLPRT_PRC64H(hw->port_info->lport),
3589                            GLPRT_PRC64L(hw->port_info->lport),
3590                            pf->offset_loaded, &os->rx_size_64,
3591                            &ns->rx_size_64);
3592         ice_stat_update_40(hw, GLPRT_PRC127H(hw->port_info->lport),
3593                            GLPRT_PRC127L(hw->port_info->lport),
3594                            pf->offset_loaded, &os->rx_size_127,
3595                            &ns->rx_size_127);
3596         ice_stat_update_40(hw, GLPRT_PRC255H(hw->port_info->lport),
3597                            GLPRT_PRC255L(hw->port_info->lport),
3598                            pf->offset_loaded, &os->rx_size_255,
3599                            &ns->rx_size_255);
3600         ice_stat_update_40(hw, GLPRT_PRC511H(hw->port_info->lport),
3601                            GLPRT_PRC511L(hw->port_info->lport),
3602                            pf->offset_loaded, &os->rx_size_511,
3603                            &ns->rx_size_511);
3604         ice_stat_update_40(hw, GLPRT_PRC1023H(hw->port_info->lport),
3605                            GLPRT_PRC1023L(hw->port_info->lport),
3606                            pf->offset_loaded, &os->rx_size_1023,
3607                            &ns->rx_size_1023);
3608         ice_stat_update_40(hw, GLPRT_PRC1522H(hw->port_info->lport),
3609                            GLPRT_PRC1522L(hw->port_info->lport),
3610                            pf->offset_loaded, &os->rx_size_1522,
3611                            &ns->rx_size_1522);
3612         ice_stat_update_40(hw, GLPRT_PRC9522H(hw->port_info->lport),
3613                            GLPRT_PRC9522L(hw->port_info->lport),
3614                            pf->offset_loaded, &os->rx_size_big,
3615                            &ns->rx_size_big);
3616         ice_stat_update_32(hw, GLPRT_RUC(hw->port_info->lport),
3617                            pf->offset_loaded, &os->rx_undersize,
3618                            &ns->rx_undersize);
3619         ice_stat_update_32(hw, GLPRT_RFC(hw->port_info->lport),
3620                            pf->offset_loaded, &os->rx_fragments,
3621                            &ns->rx_fragments);
3622         ice_stat_update_32(hw, GLPRT_ROC(hw->port_info->lport),
3623                            pf->offset_loaded, &os->rx_oversize,
3624                            &ns->rx_oversize);
3625         ice_stat_update_32(hw, GLPRT_RJC(hw->port_info->lport),
3626                            pf->offset_loaded, &os->rx_jabber,
3627                            &ns->rx_jabber);
3628         ice_stat_update_40(hw, GLPRT_PTC64H(hw->port_info->lport),
3629                            GLPRT_PTC64L(hw->port_info->lport),
3630                            pf->offset_loaded, &os->tx_size_64,
3631                            &ns->tx_size_64);
3632         ice_stat_update_40(hw, GLPRT_PTC127H(hw->port_info->lport),
3633                            GLPRT_PTC127L(hw->port_info->lport),
3634                            pf->offset_loaded, &os->tx_size_127,
3635                            &ns->tx_size_127);
3636         ice_stat_update_40(hw, GLPRT_PTC255H(hw->port_info->lport),
3637                            GLPRT_PTC255L(hw->port_info->lport),
3638                            pf->offset_loaded, &os->tx_size_255,
3639                            &ns->tx_size_255);
3640         ice_stat_update_40(hw, GLPRT_PTC511H(hw->port_info->lport),
3641                            GLPRT_PTC511L(hw->port_info->lport),
3642                            pf->offset_loaded, &os->tx_size_511,
3643                            &ns->tx_size_511);
3644         ice_stat_update_40(hw, GLPRT_PTC1023H(hw->port_info->lport),
3645                            GLPRT_PTC1023L(hw->port_info->lport),
3646                            pf->offset_loaded, &os->tx_size_1023,
3647                            &ns->tx_size_1023);
3648         ice_stat_update_40(hw, GLPRT_PTC1522H(hw->port_info->lport),
3649                            GLPRT_PTC1522L(hw->port_info->lport),
3650                            pf->offset_loaded, &os->tx_size_1522,
3651                            &ns->tx_size_1522);
3652         ice_stat_update_40(hw, GLPRT_PTC9522H(hw->port_info->lport),
3653                            GLPRT_PTC9522L(hw->port_info->lport),
3654                            pf->offset_loaded, &os->tx_size_big,
3655                            &ns->tx_size_big);
3656
3657         /* GLPRT_MSPDC not supported */
3658         /* GLPRT_XEC not supported */
3659
3660         pf->offset_loaded = true;
3661
3662         if (pf->main_vsi)
3663                 ice_update_vsi_stats(pf->main_vsi);
3664 }
3665
3666 /* Get all statistics of a port */
3667 static int
3668 ice_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
3669 {
3670         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3671         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3672         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3673
3674         /* call read registers - updates values, now write them to struct */
3675         ice_read_stats_registers(pf, hw);
3676
3677         stats->ipackets = pf->main_vsi->eth_stats.rx_unicast +
3678                           pf->main_vsi->eth_stats.rx_multicast +
3679                           pf->main_vsi->eth_stats.rx_broadcast -
3680                           pf->main_vsi->eth_stats.rx_discards;
3681         stats->opackets = ns->eth.tx_unicast +
3682                           ns->eth.tx_multicast +
3683                           ns->eth.tx_broadcast;
3684         stats->ibytes   = pf->main_vsi->eth_stats.rx_bytes;
3685         stats->obytes   = ns->eth.tx_bytes;
3686         stats->oerrors  = ns->eth.tx_errors +
3687                           pf->main_vsi->eth_stats.tx_errors;
3688
3689         /* Rx Errors */
3690         stats->imissed  = ns->eth.rx_discards +
3691                           pf->main_vsi->eth_stats.rx_discards;
3692         stats->ierrors  = ns->crc_errors +
3693                           ns->rx_undersize +
3694                           ns->rx_oversize + ns->rx_fragments + ns->rx_jabber;
3695
3696         PMD_DRV_LOG(DEBUG, "*************** PF stats start *****************");
3697         PMD_DRV_LOG(DEBUG, "rx_bytes:   %"PRIu64"", ns->eth.rx_bytes);
3698         PMD_DRV_LOG(DEBUG, "rx_unicast: %"PRIu64"", ns->eth.rx_unicast);
3699         PMD_DRV_LOG(DEBUG, "rx_multicast:%"PRIu64"", ns->eth.rx_multicast);
3700         PMD_DRV_LOG(DEBUG, "rx_broadcast:%"PRIu64"", ns->eth.rx_broadcast);
3701         PMD_DRV_LOG(DEBUG, "rx_discards:%"PRIu64"", ns->eth.rx_discards);
3702         PMD_DRV_LOG(DEBUG, "vsi rx_discards:%"PRIu64"",
3703                     pf->main_vsi->eth_stats.rx_discards);
3704         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol:  %"PRIu64"",
3705                     ns->eth.rx_unknown_protocol);
3706         PMD_DRV_LOG(DEBUG, "tx_bytes:   %"PRIu64"", ns->eth.tx_bytes);
3707         PMD_DRV_LOG(DEBUG, "tx_unicast: %"PRIu64"", ns->eth.tx_unicast);
3708         PMD_DRV_LOG(DEBUG, "tx_multicast:%"PRIu64"", ns->eth.tx_multicast);
3709         PMD_DRV_LOG(DEBUG, "tx_broadcast:%"PRIu64"", ns->eth.tx_broadcast);
3710         PMD_DRV_LOG(DEBUG, "tx_discards:%"PRIu64"", ns->eth.tx_discards);
3711         PMD_DRV_LOG(DEBUG, "vsi tx_discards:%"PRIu64"",
3712                     pf->main_vsi->eth_stats.tx_discards);
3713         PMD_DRV_LOG(DEBUG, "tx_errors:          %"PRIu64"", ns->eth.tx_errors);
3714
3715         PMD_DRV_LOG(DEBUG, "tx_dropped_link_down:       %"PRIu64"",
3716                     ns->tx_dropped_link_down);
3717         PMD_DRV_LOG(DEBUG, "crc_errors: %"PRIu64"", ns->crc_errors);
3718         PMD_DRV_LOG(DEBUG, "illegal_bytes:      %"PRIu64"",
3719                     ns->illegal_bytes);
3720         PMD_DRV_LOG(DEBUG, "error_bytes:        %"PRIu64"", ns->error_bytes);
3721         PMD_DRV_LOG(DEBUG, "mac_local_faults:   %"PRIu64"",
3722                     ns->mac_local_faults);
3723         PMD_DRV_LOG(DEBUG, "mac_remote_faults:  %"PRIu64"",
3724                     ns->mac_remote_faults);
3725         PMD_DRV_LOG(DEBUG, "link_xon_rx:        %"PRIu64"", ns->link_xon_rx);
3726         PMD_DRV_LOG(DEBUG, "link_xoff_rx:       %"PRIu64"", ns->link_xoff_rx);
3727         PMD_DRV_LOG(DEBUG, "link_xon_tx:        %"PRIu64"", ns->link_xon_tx);
3728         PMD_DRV_LOG(DEBUG, "link_xoff_tx:       %"PRIu64"", ns->link_xoff_tx);
3729         PMD_DRV_LOG(DEBUG, "rx_size_64:         %"PRIu64"", ns->rx_size_64);
3730         PMD_DRV_LOG(DEBUG, "rx_size_127:        %"PRIu64"", ns->rx_size_127);
3731         PMD_DRV_LOG(DEBUG, "rx_size_255:        %"PRIu64"", ns->rx_size_255);
3732         PMD_DRV_LOG(DEBUG, "rx_size_511:        %"PRIu64"", ns->rx_size_511);
3733         PMD_DRV_LOG(DEBUG, "rx_size_1023:       %"PRIu64"", ns->rx_size_1023);
3734         PMD_DRV_LOG(DEBUG, "rx_size_1522:       %"PRIu64"", ns->rx_size_1522);
3735         PMD_DRV_LOG(DEBUG, "rx_size_big:        %"PRIu64"", ns->rx_size_big);
3736         PMD_DRV_LOG(DEBUG, "rx_undersize:       %"PRIu64"", ns->rx_undersize);
3737         PMD_DRV_LOG(DEBUG, "rx_fragments:       %"PRIu64"", ns->rx_fragments);
3738         PMD_DRV_LOG(DEBUG, "rx_oversize:        %"PRIu64"", ns->rx_oversize);
3739         PMD_DRV_LOG(DEBUG, "rx_jabber:          %"PRIu64"", ns->rx_jabber);
3740         PMD_DRV_LOG(DEBUG, "tx_size_64:         %"PRIu64"", ns->tx_size_64);
3741         PMD_DRV_LOG(DEBUG, "tx_size_127:        %"PRIu64"", ns->tx_size_127);
3742         PMD_DRV_LOG(DEBUG, "tx_size_255:        %"PRIu64"", ns->tx_size_255);
3743         PMD_DRV_LOG(DEBUG, "tx_size_511:        %"PRIu64"", ns->tx_size_511);
3744         PMD_DRV_LOG(DEBUG, "tx_size_1023:       %"PRIu64"", ns->tx_size_1023);
3745         PMD_DRV_LOG(DEBUG, "tx_size_1522:       %"PRIu64"", ns->tx_size_1522);
3746         PMD_DRV_LOG(DEBUG, "tx_size_big:        %"PRIu64"", ns->tx_size_big);
3747         PMD_DRV_LOG(DEBUG, "rx_len_errors:      %"PRIu64"", ns->rx_len_errors);
3748         PMD_DRV_LOG(DEBUG, "************* PF stats end ****************");
3749         return 0;
3750 }
3751
3752 /* Reset the statistics */
3753 static void
3754 ice_stats_reset(struct rte_eth_dev *dev)
3755 {
3756         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3757         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3758
3759         /* Mark PF and VSI stats to update the offset, aka "reset" */
3760         pf->offset_loaded = false;
3761         if (pf->main_vsi)
3762                 pf->main_vsi->offset_loaded = false;
3763
3764         /* read the stats, reading current register values into offset */
3765         ice_read_stats_registers(pf, hw);
3766 }
3767
3768 static uint32_t
3769 ice_xstats_calc_num(void)
3770 {
3771         uint32_t num;
3772
3773         num = ICE_NB_ETH_XSTATS + ICE_NB_HW_PORT_XSTATS;
3774
3775         return num;
3776 }
3777
3778 static int
3779 ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
3780                unsigned int n)
3781 {
3782         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3783         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3784         unsigned int i;
3785         unsigned int count;
3786         struct ice_hw_port_stats *hw_stats = &pf->stats;
3787
3788         count = ice_xstats_calc_num();
3789         if (n < count)
3790                 return count;
3791
3792         ice_read_stats_registers(pf, hw);
3793
3794         if (!xstats)
3795                 return 0;
3796
3797         count = 0;
3798
3799         /* Get stats from ice_eth_stats struct */
3800         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3801                 xstats[count].value =
3802                         *(uint64_t *)((char *)&hw_stats->eth +
3803                                       ice_stats_strings[i].offset);
3804                 xstats[count].id = count;
3805                 count++;
3806         }
3807
3808         /* Get individiual stats from ice_hw_port struct */
3809         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3810                 xstats[count].value =
3811                         *(uint64_t *)((char *)hw_stats +
3812                                       ice_hw_port_strings[i].offset);
3813                 xstats[count].id = count;
3814                 count++;
3815         }
3816
3817         return count;
3818 }
3819
3820 static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
3821                                 struct rte_eth_xstat_name *xstats_names,
3822                                 __rte_unused unsigned int limit)
3823 {
3824         unsigned int count = 0;
3825         unsigned int i;
3826
3827         if (!xstats_names)
3828                 return ice_xstats_calc_num();
3829
3830         /* Note: limit checked in rte_eth_xstats_names() */
3831
3832         /* Get stats from ice_eth_stats struct */
3833         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3834                 strlcpy(xstats_names[count].name, ice_stats_strings[i].name,
3835                         sizeof(xstats_names[count].name));
3836                 count++;
3837         }
3838
3839         /* Get individiual stats from ice_hw_port struct */
3840         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3841                 strlcpy(xstats_names[count].name, ice_hw_port_strings[i].name,
3842                         sizeof(xstats_names[count].name));
3843                 count++;
3844         }
3845
3846         return count;
3847 }
3848
3849 static int
3850 ice_dev_filter_ctrl(struct rte_eth_dev *dev,
3851                      enum rte_filter_type filter_type,
3852                      enum rte_filter_op filter_op,
3853                      void *arg)
3854 {
3855         int ret = 0;
3856
3857         if (!dev)
3858                 return -EINVAL;
3859
3860         switch (filter_type) {
3861         case RTE_ETH_FILTER_GENERIC:
3862                 if (filter_op != RTE_ETH_FILTER_GET)
3863                         return -EINVAL;
3864                 *(const void **)arg = &ice_flow_ops;
3865                 break;
3866         default:
3867                 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
3868                                         filter_type);
3869                 ret = -EINVAL;
3870                 break;
3871         }
3872
3873         return ret;
3874 }
3875
3876 /* Add UDP tunneling port */
3877 static int
3878 ice_dev_udp_tunnel_port_add(struct rte_eth_dev *dev,
3879                              struct rte_eth_udp_tunnel *udp_tunnel)
3880 {
3881         int ret = 0;
3882         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3883
3884         if (udp_tunnel == NULL)
3885                 return -EINVAL;
3886
3887         switch (udp_tunnel->prot_type) {
3888         case RTE_TUNNEL_TYPE_VXLAN:
3889                 ret = ice_create_tunnel(hw, TNL_VXLAN, udp_tunnel->udp_port);
3890                 break;
3891         default:
3892                 PMD_DRV_LOG(ERR, "Invalid tunnel type");
3893                 ret = -EINVAL;
3894                 break;
3895         }
3896
3897         return ret;
3898 }
3899
3900 /* Delete UDP tunneling port */
3901 static int
3902 ice_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
3903                              struct rte_eth_udp_tunnel *udp_tunnel)
3904 {
3905         int ret = 0;
3906         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3907
3908         if (udp_tunnel == NULL)
3909                 return -EINVAL;
3910
3911         switch (udp_tunnel->prot_type) {
3912         case RTE_TUNNEL_TYPE_VXLAN:
3913                 ret = ice_destroy_tunnel(hw, udp_tunnel->udp_port, 0);
3914                 break;
3915         default:
3916                 PMD_DRV_LOG(ERR, "Invalid tunnel type");
3917                 ret = -EINVAL;
3918                 break;
3919         }
3920
3921         return ret;
3922 }
3923
3924 static int
3925 ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3926               struct rte_pci_device *pci_dev)
3927 {
3928         return rte_eth_dev_pci_generic_probe(pci_dev,
3929                                              sizeof(struct ice_adapter),
3930                                              ice_dev_init);
3931 }
3932
3933 static int
3934 ice_pci_remove(struct rte_pci_device *pci_dev)
3935 {
3936         return rte_eth_dev_pci_generic_remove(pci_dev, ice_dev_uninit);
3937 }
3938
3939 static struct rte_pci_driver rte_ice_pmd = {
3940         .id_table = pci_id_ice_map,
3941         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3942         .probe = ice_pci_probe,
3943         .remove = ice_pci_remove,
3944 };
3945
3946 /**
3947  * Driver initialization routine.
3948  * Invoked once at EAL init time.
3949  * Register itself as the [Poll Mode] Driver of PCI devices.
3950  */
3951 RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
3952 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
3953 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
3954 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
3955                               ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
3956
3957 RTE_INIT(ice_init_log)
3958 {
3959         ice_logtype_init = rte_log_register("pmd.net.ice.init");
3960         if (ice_logtype_init >= 0)
3961                 rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
3962         ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
3963         if (ice_logtype_driver >= 0)
3964                 rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
3965 }