drivers/net/ice/ice_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #include <rte_string_fns.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include <stdio.h>
   9 #include <sys/types.h>
  10 #include <sys/stat.h>
  11 #include <unistd.h>
  12
  13 #include "base/ice_sched.h"
  14 #include "base/ice_flow.h"
  15 #include "ice_ethdev.h"
  16 #include "ice_rxtx.h"
  17
  18 #define ICE_MAX_QP_NUM "max_queue_pair_num"
  19 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
  20 #define ICE_DFLT_PKG_FILE "/lib/firmware/intel/ice/ddp/ice.pkg"
  21
  22 int ice_logtype_init;
  23 int ice_logtype_driver;
  24
  25 static int ice_dev_configure(struct rte_eth_dev *dev);
  26 static int ice_dev_start(struct rte_eth_dev *dev);
  27 static void ice_dev_stop(struct rte_eth_dev *dev);
  28 static void ice_dev_close(struct rte_eth_dev *dev);
  29 static int ice_dev_reset(struct rte_eth_dev *dev);
  30 static void ice_dev_info_get(struct rte_eth_dev *dev,
  31                              struct rte_eth_dev_info *dev_info);
  32 static int ice_link_update(struct rte_eth_dev *dev,
  33                            int wait_to_complete);
  34 static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  35 static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  36 static int ice_vlan_tpid_set(struct rte_eth_dev *dev,
  37                              enum rte_vlan_type vlan_type,
  38                              uint16_t tpid);
  39 static int ice_rss_reta_update(struct rte_eth_dev *dev,
  40                                struct rte_eth_rss_reta_entry64 *reta_conf,
  41                                uint16_t reta_size);
  42 static int ice_rss_reta_query(struct rte_eth_dev *dev,
  43                               struct rte_eth_rss_reta_entry64 *reta_conf,
  44                               uint16_t reta_size);
  45 static int ice_rss_hash_update(struct rte_eth_dev *dev,
  46                                struct rte_eth_rss_conf *rss_conf);
  47 static int ice_rss_hash_conf_get(struct rte_eth_dev *dev,
  48                                  struct rte_eth_rss_conf *rss_conf);
  49 static void ice_promisc_enable(struct rte_eth_dev *dev);
  50 static void ice_promisc_disable(struct rte_eth_dev *dev);
  51 static void ice_allmulti_enable(struct rte_eth_dev *dev);
  52 static void ice_allmulti_disable(struct rte_eth_dev *dev);
  53 static int ice_vlan_filter_set(struct rte_eth_dev *dev,
  54                                uint16_t vlan_id,
  55                                int on);
  56 static int ice_macaddr_set(struct rte_eth_dev *dev,
  57                            struct ether_addr *mac_addr);
  58 static int ice_macaddr_add(struct rte_eth_dev *dev,
  59                            struct ether_addr *mac_addr,
  60                            __rte_unused uint32_t index,
  61                            uint32_t pool);
  62 static void ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index);
  63 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
  64                                     uint16_t queue_id);
  65 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
  66                                      uint16_t queue_id);
  67 static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  68                               size_t fw_size);
  69 static int ice_vlan_pvid_set(struct rte_eth_dev *dev,
  70                              uint16_t pvid, int on);
  71 static int ice_get_eeprom_length(struct rte_eth_dev *dev);
  72 static int ice_get_eeprom(struct rte_eth_dev *dev,
  73                           struct rte_dev_eeprom_info *eeprom);
  74 static int ice_stats_get(struct rte_eth_dev *dev,
  75                          struct rte_eth_stats *stats);
  76 static void ice_stats_reset(struct rte_eth_dev *dev);
  77 static int ice_xstats_get(struct rte_eth_dev *dev,
  78                           struct rte_eth_xstat *xstats, unsigned int n);
  79 static int ice_xstats_get_names(struct rte_eth_dev *dev,
  80                                 struct rte_eth_xstat_name *xstats_names,
  81                                 unsigned int limit);
  82
  83 static const struct rte_pci_id pci_id_ice_map[] = {
  84         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
  85         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
  86         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
  87         { .vendor_id = 0, /* sentinel */ },
  88 };
  89
  90 static const struct eth_dev_ops ice_eth_dev_ops = {
  91         .dev_configure                = ice_dev_configure,
  92         .dev_start                    = ice_dev_start,
  93         .dev_stop                     = ice_dev_stop,
  94         .dev_close                    = ice_dev_close,
  95         .dev_reset                    = ice_dev_reset,
  96         .rx_queue_start               = ice_rx_queue_start,
  97         .rx_queue_stop                = ice_rx_queue_stop,
  98         .tx_queue_start               = ice_tx_queue_start,
  99         .tx_queue_stop                = ice_tx_queue_stop,
 100         .rx_queue_setup               = ice_rx_queue_setup,
 101         .rx_queue_release             = ice_rx_queue_release,
 102         .tx_queue_setup               = ice_tx_queue_setup,
 103         .tx_queue_release             = ice_tx_queue_release,
 104         .dev_infos_get                = ice_dev_info_get,
 105         .dev_supported_ptypes_get     = ice_dev_supported_ptypes_get,
 106         .link_update                  = ice_link_update,
 107         .mtu_set                      = ice_mtu_set,
 108         .mac_addr_set                 = ice_macaddr_set,
 109         .mac_addr_add                 = ice_macaddr_add,
 110         .mac_addr_remove              = ice_macaddr_remove,
 111         .vlan_filter_set              = ice_vlan_filter_set,
 112         .vlan_offload_set             = ice_vlan_offload_set,
 113         .vlan_tpid_set                = ice_vlan_tpid_set,
 114         .reta_update                  = ice_rss_reta_update,
 115         .reta_query                   = ice_rss_reta_query,
 116         .rss_hash_update              = ice_rss_hash_update,
 117         .rss_hash_conf_get            = ice_rss_hash_conf_get,
 118         .promiscuous_enable           = ice_promisc_enable,
 119         .promiscuous_disable          = ice_promisc_disable,
 120         .allmulticast_enable          = ice_allmulti_enable,
 121         .allmulticast_disable         = ice_allmulti_disable,
 122         .rx_queue_intr_enable         = ice_rx_queue_intr_enable,
 123         .rx_queue_intr_disable        = ice_rx_queue_intr_disable,
 124         .fw_version_get               = ice_fw_version_get,
 125         .vlan_pvid_set                = ice_vlan_pvid_set,
 126         .rxq_info_get                 = ice_rxq_info_get,
 127         .txq_info_get                 = ice_txq_info_get,
 128         .get_eeprom_length            = ice_get_eeprom_length,
 129         .get_eeprom                   = ice_get_eeprom,
 130         .rx_queue_count               = ice_rx_queue_count,
 131         .rx_descriptor_status         = ice_rx_descriptor_status,
 132         .tx_descriptor_status         = ice_tx_descriptor_status,
 133         .stats_get                    = ice_stats_get,
 134         .stats_reset                  = ice_stats_reset,
 135         .xstats_get                   = ice_xstats_get,
 136         .xstats_get_names             = ice_xstats_get_names,
 137         .xstats_reset                 = ice_stats_reset,
 138 };
 139
 140 /* store statistics names and its offset in stats structure */
 141 struct ice_xstats_name_off {
 142         char name[RTE_ETH_XSTATS_NAME_SIZE];
 143         unsigned int offset;
 144 };
 145
 146 static const struct ice_xstats_name_off ice_stats_strings[] = {
 147         {"rx_unicast_packets", offsetof(struct ice_eth_stats, rx_unicast)},
 148         {"rx_multicast_packets", offsetof(struct ice_eth_stats, rx_multicast)},
 149         {"rx_broadcast_packets", offsetof(struct ice_eth_stats, rx_broadcast)},
 150         {"rx_dropped", offsetof(struct ice_eth_stats, rx_discards)},
 151         {"rx_unknown_protocol_packets", offsetof(struct ice_eth_stats,
 152                 rx_unknown_protocol)},
 153         {"tx_unicast_packets", offsetof(struct ice_eth_stats, tx_unicast)},
 154         {"tx_multicast_packets", offsetof(struct ice_eth_stats, tx_multicast)},
 155         {"tx_broadcast_packets", offsetof(struct ice_eth_stats, tx_broadcast)},
 156         {"tx_dropped", offsetof(struct ice_eth_stats, tx_discards)},
 157 };
 158
 159 #define ICE_NB_ETH_XSTATS (sizeof(ice_stats_strings) / \
 160                 sizeof(ice_stats_strings[0]))
 161
 162 static const struct ice_xstats_name_off ice_hw_port_strings[] = {
 163         {"tx_link_down_dropped", offsetof(struct ice_hw_port_stats,
 164                 tx_dropped_link_down)},
 165         {"rx_crc_errors", offsetof(struct ice_hw_port_stats, crc_errors)},
 166         {"rx_illegal_byte_errors", offsetof(struct ice_hw_port_stats,
 167                 illegal_bytes)},
 168         {"rx_error_bytes", offsetof(struct ice_hw_port_stats, error_bytes)},
 169         {"mac_local_errors", offsetof(struct ice_hw_port_stats,
 170                 mac_local_faults)},
 171         {"mac_remote_errors", offsetof(struct ice_hw_port_stats,
 172                 mac_remote_faults)},
 173         {"rx_len_errors", offsetof(struct ice_hw_port_stats,
 174                 rx_len_errors)},
 175         {"tx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_tx)},
 176         {"rx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_rx)},
 177         {"tx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_tx)},
 178         {"rx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_rx)},
 179         {"rx_size_64_packets", offsetof(struct ice_hw_port_stats, rx_size_64)},
 180         {"rx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 181                 rx_size_127)},
 182         {"rx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 183                 rx_size_255)},
 184         {"rx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 185                 rx_size_511)},
 186         {"rx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 187                 rx_size_1023)},
 188         {"rx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 189                 rx_size_1522)},
 190         {"rx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 191                 rx_size_big)},
 192         {"rx_undersized_errors", offsetof(struct ice_hw_port_stats,
 193                 rx_undersize)},
 194         {"rx_oversize_errors", offsetof(struct ice_hw_port_stats,
 195                 rx_oversize)},
 196         {"rx_mac_short_pkt_dropped", offsetof(struct ice_hw_port_stats,
 197                 mac_short_pkt_dropped)},
 198         {"rx_fragmented_errors", offsetof(struct ice_hw_port_stats,
 199                 rx_fragments)},
 200         {"rx_jabber_errors", offsetof(struct ice_hw_port_stats, rx_jabber)},
 201         {"tx_size_64_packets", offsetof(struct ice_hw_port_stats, tx_size_64)},
 202         {"tx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 203                 tx_size_127)},
 204         {"tx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 205                 tx_size_255)},
 206         {"tx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 207                 tx_size_511)},
 208         {"tx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 209                 tx_size_1023)},
 210         {"tx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 211                 tx_size_1522)},
 212         {"tx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 213                 tx_size_big)},
 214 };
 215
 216 #define ICE_NB_HW_PORT_XSTATS (sizeof(ice_hw_port_strings) / \
 217                 sizeof(ice_hw_port_strings[0]))
 218
 219 static void
 220 ice_init_controlq_parameter(struct ice_hw *hw)
 221 {
 222         /* fields for adminq */
 223         hw->adminq.num_rq_entries = ICE_ADMINQ_LEN;
 224         hw->adminq.num_sq_entries = ICE_ADMINQ_LEN;
 225         hw->adminq.rq_buf_size = ICE_ADMINQ_BUF_SZ;
 226         hw->adminq.sq_buf_size = ICE_ADMINQ_BUF_SZ;
 227
 228         /* fields for mailboxq, DPDK used as PF host */
 229         hw->mailboxq.num_rq_entries = ICE_MAILBOXQ_LEN;
 230         hw->mailboxq.num_sq_entries = ICE_MAILBOXQ_LEN;
 231         hw->mailboxq.rq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 232         hw->mailboxq.sq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 233 }
 234
 235 static int
 236 ice_check_qp_num(const char *key, const char *qp_value,
 237                  __rte_unused void *opaque)
 238 {
 239         char *end = NULL;
 240         int num = 0;
 241
 242         while (isblank(*qp_value))
 243                 qp_value++;
 244
 245         num = strtoul(qp_value, &end, 10);
 246
 247         if (!num || (*end == '-') || errno) {
 248                 PMD_DRV_LOG(WARNING, "invalid value:\"%s\" for key:\"%s\", "
 249                             "value must be > 0",
 250                             qp_value, key);
 251                 return -1;
 252         }
 253
 254         return num;
 255 }
 256
 257 static int
 258 ice_config_max_queue_pair_num(struct rte_devargs *devargs)
 259 {
 260         struct rte_kvargs *kvlist;
 261         const char *queue_num_key = ICE_MAX_QP_NUM;
 262         int ret;
 263
 264         if (!devargs)
 265                 return 0;
 266
 267         kvlist = rte_kvargs_parse(devargs->args, NULL);
 268         if (!kvlist)
 269                 return 0;
 270
 271         if (!rte_kvargs_count(kvlist, queue_num_key)) {
 272                 rte_kvargs_free(kvlist);
 273                 return 0;
 274         }
 275
 276         if (rte_kvargs_process(kvlist, queue_num_key,
 277                                ice_check_qp_num, NULL) < 0) {
 278                 rte_kvargs_free(kvlist);
 279                 return 0;
 280         }
 281         ret = rte_kvargs_process(kvlist, queue_num_key,
 282                                  ice_check_qp_num, NULL);
 283         rte_kvargs_free(kvlist);
 284
 285         return ret;
 286 }
 287
 288 static int
 289 ice_res_pool_init(struct ice_res_pool_info *pool, uint32_t base,
 290                   uint32_t num)
 291 {
 292         struct pool_entry *entry;
 293
 294         if (!pool || !num)
 295                 return -EINVAL;
 296
 297         entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 298         if (!entry) {
 299                 PMD_INIT_LOG(ERR,
 300                              "Failed to allocate memory for resource pool");
 301                 return -ENOMEM;
 302         }
 303
 304         /* queue heap initialize */
 305         pool->num_free = num;
 306         pool->num_alloc = 0;
 307         pool->base = base;
 308         LIST_INIT(&pool->alloc_list);
 309         LIST_INIT(&pool->free_list);
 310
 311         /* Initialize element  */
 312         entry->base = 0;
 313         entry->len = num;
 314
 315         LIST_INSERT_HEAD(&pool->free_list, entry, next);
 316         return 0;
 317 }
 318
 319 static int
 320 ice_res_pool_alloc(struct ice_res_pool_info *pool,
 321                    uint16_t num)
 322 {
 323         struct pool_entry *entry, *valid_entry;
 324
 325         if (!pool || !num) {
 326                 PMD_INIT_LOG(ERR, "Invalid parameter");
 327                 return -EINVAL;
 328         }
 329
 330         if (pool->num_free < num) {
 331                 PMD_INIT_LOG(ERR, "No resource. ask:%u, available:%u",
 332                              num, pool->num_free);
 333                 return -ENOMEM;
 334         }
 335
 336         valid_entry = NULL;
 337         /* Lookup  in free list and find most fit one */
 338         LIST_FOREACH(entry, &pool->free_list, next) {
 339                 if (entry->len >= num) {
 340                         /* Find best one */
 341                         if (entry->len == num) {
 342                                 valid_entry = entry;
 343                                 break;
 344                         }
 345                         if (!valid_entry ||
 346                             valid_entry->len > entry->len)
 347                                 valid_entry = entry;
 348                 }
 349         }
 350
 351         /* Not find one to satisfy the request, return */
 352         if (!valid_entry) {
 353                 PMD_INIT_LOG(ERR, "No valid entry found");
 354                 return -ENOMEM;
 355         }
 356         /**
 357          * The entry have equal queue number as requested,
 358          * remove it from alloc_list.
 359          */
 360         if (valid_entry->len == num) {
 361                 LIST_REMOVE(valid_entry, next);
 362         } else {
 363                 /**
 364                  * The entry have more numbers than requested,
 365                  * create a new entry for alloc_list and minus its
 366                  * queue base and number in free_list.
 367                  */
 368                 entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 369                 if (!entry) {
 370                         PMD_INIT_LOG(ERR,
 371                                      "Failed to allocate memory for "
 372                                      "resource pool");
 373                         return -ENOMEM;
 374                 }
 375                 entry->base = valid_entry->base;
 376                 entry->len = num;
 377                 valid_entry->base += num;
 378                 valid_entry->len -= num;
 379                 valid_entry = entry;
 380         }
 381
 382         /* Insert it into alloc list, not sorted */
 383         LIST_INSERT_HEAD(&pool->alloc_list, valid_entry, next);
 384
 385         pool->num_free -= valid_entry->len;
 386         pool->num_alloc += valid_entry->len;
 387
 388         return valid_entry->base + pool->base;
 389 }
 390
 391 static void
 392 ice_res_pool_destroy(struct ice_res_pool_info *pool)
 393 {
 394         struct pool_entry *entry, *next_entry;
 395
 396         if (!pool)
 397                 return;
 398
 399         for (entry = LIST_FIRST(&pool->alloc_list);
 400              entry && (next_entry = LIST_NEXT(entry, next), 1);
 401              entry = next_entry) {
 402                 LIST_REMOVE(entry, next);
 403                 rte_free(entry);
 404         }
 405
 406         for (entry = LIST_FIRST(&pool->free_list);
 407              entry && (next_entry = LIST_NEXT(entry, next), 1);
 408              entry = next_entry) {
 409                 LIST_REMOVE(entry, next);
 410                 rte_free(entry);
 411         }
 412
 413         pool->num_free = 0;
 414         pool->num_alloc = 0;
 415         pool->base = 0;
 416         LIST_INIT(&pool->alloc_list);
 417         LIST_INIT(&pool->free_list);
 418 }
 419
 420 static void
 421 ice_vsi_config_default_rss(struct ice_aqc_vsi_props *info)
 422 {
 423         /* Set VSI LUT selection */
 424         info->q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI &
 425                           ICE_AQ_VSI_Q_OPT_RSS_LUT_M;
 426         /* Set Hash scheme */
 427         info->q_opt_rss |= ICE_AQ_VSI_Q_OPT_RSS_TPLZ &
 428                            ICE_AQ_VSI_Q_OPT_RSS_HASH_M;
 429         /* enable TC */
 430         info->q_opt_tc = ICE_AQ_VSI_Q_OPT_TC_OVR_M;
 431 }
 432
 433 static enum ice_status
 434 ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi,
 435                                 struct ice_aqc_vsi_props *info,
 436                                 uint8_t enabled_tcmap)
 437 {
 438         uint16_t bsf, qp_idx;
 439
 440         /* default tc 0 now. Multi-TC supporting need to be done later.
 441          * Configure TC and queue mapping parameters, for enabled TC,
 442          * allocate qpnum_per_tc queues to this traffic.
 443          */
 444         if (enabled_tcmap != 0x01) {
 445                 PMD_INIT_LOG(ERR, "only TC0 is supported");
 446                 return -ENOTSUP;
 447         }
 448
 449         vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC);
 450         bsf = rte_bsf32(vsi->nb_qps);
 451         /* Adjust the queue number to actual queues that can be applied */
 452         vsi->nb_qps = 0x1 << bsf;
 453
 454         qp_idx = 0;
 455         /* Set tc and queue mapping with VSI */
 456         info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx <<
 457                                                 ICE_AQ_VSI_TC_Q_OFFSET_S) |
 458                                                (bsf << ICE_AQ_VSI_TC_Q_NUM_S));
 459
 460         /* Associate queue number with VSI */
 461         info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG);
 462         info->q_mapping[0] = rte_cpu_to_le_16(vsi->base_queue);
 463         info->q_mapping[1] = rte_cpu_to_le_16(vsi->nb_qps);
 464         info->valid_sections |=
 465                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
 466         /* Set the info.ingress_table and info.egress_table
 467          * for UP translate table. Now just set it to 1:1 map by default
 468          * -- 0b 111 110 101 100 011 010 001 000 == 0xFAC688
 469          */
 470 #define ICE_TC_QUEUE_TABLE_DFLT 0x00FAC688
 471         info->ingress_table  = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 472         info->egress_table   = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 473         info->outer_up_table = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 474         return 0;
 475 }
 476
 477 static int
 478 ice_init_mac_address(struct rte_eth_dev *dev)
 479 {
 480         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 481
 482         if (!is_unicast_ether_addr
 483                 ((struct ether_addr *)hw->port_info[0].mac.lan_addr)) {
 484                 PMD_INIT_LOG(ERR, "Invalid MAC address");
 485                 return -EINVAL;
 486         }
 487
 488         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.lan_addr,
 489                         (struct ether_addr *)hw->port_info[0].mac.perm_addr);
 490
 491         dev->data->mac_addrs = rte_zmalloc(NULL, sizeof(struct ether_addr), 0);
 492         if (!dev->data->mac_addrs) {
 493                 PMD_INIT_LOG(ERR,
 494                              "Failed to allocate memory to store mac address");
 495                 return -ENOMEM;
 496         }
 497         /* store it to dev data */
 498         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.perm_addr,
 499                         &dev->data->mac_addrs[0]);
 500         return 0;
 501 }
 502
 503 /* Find out specific MAC filter */
 504 static struct ice_mac_filter *
 505 ice_find_mac_filter(struct ice_vsi *vsi, struct ether_addr *macaddr)
 506 {
 507         struct ice_mac_filter *f;
 508
 509         TAILQ_FOREACH(f, &vsi->mac_list, next) {
 510                 if (is_same_ether_addr(macaddr, &f->mac_info.mac_addr))
 511                         return f;
 512         }
 513
 514         return NULL;
 515 }
 516
 517 static int
 518 ice_add_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 519 {
 520         struct ice_fltr_list_entry *m_list_itr = NULL;
 521         struct ice_mac_filter *f;
 522         struct LIST_HEAD_TYPE list_head;
 523         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 524         int ret = 0;
 525
 526         /* If it's added and configured, return */
 527         f = ice_find_mac_filter(vsi, mac_addr);
 528         if (f) {
 529                 PMD_DRV_LOG(INFO, "This MAC filter already exists.");
 530                 return 0;
 531         }
 532
 533         INIT_LIST_HEAD(&list_head);
 534
 535         m_list_itr = (struct ice_fltr_list_entry *)
 536                 ice_malloc(hw, sizeof(*m_list_itr));
 537         if (!m_list_itr) {
 538                 ret = -ENOMEM;
 539                 goto DONE;
 540         }
 541         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 542                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 543         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 544         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 545         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 546         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 547         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 548
 549         LIST_ADD(&m_list_itr->list_entry, &list_head);
 550
 551         /* Add the mac */
 552         ret = ice_add_mac(hw, &list_head);
 553         if (ret != ICE_SUCCESS) {
 554                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
 555                 ret = -EINVAL;
 556                 goto DONE;
 557         }
 558         /* Add the mac addr into mac list */
 559         f = rte_zmalloc(NULL, sizeof(*f), 0);
 560         if (!f) {
 561                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 562                 ret = -ENOMEM;
 563                 goto DONE;
 564         }
 565         rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN);
 566         TAILQ_INSERT_TAIL(&vsi->mac_list, f, next);
 567         vsi->mac_num++;
 568
 569         ret = 0;
 570
 571 DONE:
 572         rte_free(m_list_itr);
 573         return ret;
 574 }
 575
 576 static int
 577 ice_remove_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 578 {
 579         struct ice_fltr_list_entry *m_list_itr = NULL;
 580         struct ice_mac_filter *f;
 581         struct LIST_HEAD_TYPE list_head;
 582         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 583         int ret = 0;
 584
 585         /* Can't find it, return an error */
 586         f = ice_find_mac_filter(vsi, mac_addr);
 587         if (!f)
 588                 return -EINVAL;
 589
 590         INIT_LIST_HEAD(&list_head);
 591
 592         m_list_itr = (struct ice_fltr_list_entry *)
 593                 ice_malloc(hw, sizeof(*m_list_itr));
 594         if (!m_list_itr) {
 595                 ret = -ENOMEM;
 596                 goto DONE;
 597         }
 598         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 599                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 600         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 601         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 602         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 603         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 604         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 605
 606         LIST_ADD(&m_list_itr->list_entry, &list_head);
 607
 608         /* remove the mac filter */
 609         ret = ice_remove_mac(hw, &list_head);
 610         if (ret != ICE_SUCCESS) {
 611                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
 612                 ret = -EINVAL;
 613                 goto DONE;
 614         }
 615
 616         /* Remove the mac addr from mac list */
 617         TAILQ_REMOVE(&vsi->mac_list, f, next);
 618         rte_free(f);
 619         vsi->mac_num--;
 620
 621         ret = 0;
 622 DONE:
 623         rte_free(m_list_itr);
 624         return ret;
 625 }
 626
 627 /* Find out specific VLAN filter */
 628 static struct ice_vlan_filter *
 629 ice_find_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 630 {
 631         struct ice_vlan_filter *f;
 632
 633         TAILQ_FOREACH(f, &vsi->vlan_list, next) {
 634                 if (vlan_id == f->vlan_info.vlan_id)
 635                         return f;
 636         }
 637
 638         return NULL;
 639 }
 640
 641 static int
 642 ice_add_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 643 {
 644         struct ice_fltr_list_entry *v_list_itr = NULL;
 645         struct ice_vlan_filter *f;
 646         struct LIST_HEAD_TYPE list_head;
 647         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 648         int ret = 0;
 649
 650         if (!vsi || vlan_id > ETHER_MAX_VLAN_ID)
 651                 return -EINVAL;
 652
 653         /* If it's added and configured, return. */
 654         f = ice_find_vlan_filter(vsi, vlan_id);
 655         if (f) {
 656                 PMD_DRV_LOG(INFO, "This VLAN filter already exists.");
 657                 return 0;
 658         }
 659
 660         if (!vsi->vlan_anti_spoof_on && !vsi->vlan_filter_on)
 661                 return 0;
 662
 663         INIT_LIST_HEAD(&list_head);
 664
 665         v_list_itr = (struct ice_fltr_list_entry *)
 666                       ice_malloc(hw, sizeof(*v_list_itr));
 667         if (!v_list_itr) {
 668                 ret = -ENOMEM;
 669                 goto DONE;
 670         }
 671         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 672         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 673         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 674         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 675         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 676         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 677
 678         LIST_ADD(&v_list_itr->list_entry, &list_head);
 679
 680         /* Add the vlan */
 681         ret = ice_add_vlan(hw, &list_head);
 682         if (ret != ICE_SUCCESS) {
 683                 PMD_DRV_LOG(ERR, "Failed to add VLAN filter");
 684                 ret = -EINVAL;
 685                 goto DONE;
 686         }
 687
 688         /* Add vlan into vlan list */
 689         f = rte_zmalloc(NULL, sizeof(*f), 0);
 690         if (!f) {
 691                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 692                 ret = -ENOMEM;
 693                 goto DONE;
 694         }
 695         f->vlan_info.vlan_id = vlan_id;
 696         TAILQ_INSERT_TAIL(&vsi->vlan_list, f, next);
 697         vsi->vlan_num++;
 698
 699         ret = 0;
 700
 701 DONE:
 702         rte_free(v_list_itr);
 703         return ret;
 704 }
 705
 706 static int
 707 ice_remove_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 708 {
 709         struct ice_fltr_list_entry *v_list_itr = NULL;
 710         struct ice_vlan_filter *f;
 711         struct LIST_HEAD_TYPE list_head;
 712         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 713         int ret = 0;
 714
 715         /**
 716          * Vlan 0 is the generic filter for untagged packets
 717          * and can't be removed.
 718          */
 719         if (!vsi || vlan_id == 0 || vlan_id > ETHER_MAX_VLAN_ID)
 720                 return -EINVAL;
 721
 722         /* Can't find it, return an error */
 723         f = ice_find_vlan_filter(vsi, vlan_id);
 724         if (!f)
 725                 return -EINVAL;
 726
 727         INIT_LIST_HEAD(&list_head);
 728
 729         v_list_itr = (struct ice_fltr_list_entry *)
 730                       ice_malloc(hw, sizeof(*v_list_itr));
 731         if (!v_list_itr) {
 732                 ret = -ENOMEM;
 733                 goto DONE;
 734         }
 735
 736         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 737         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 738         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 739         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 740         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 741         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 742
 743         LIST_ADD(&v_list_itr->list_entry, &list_head);
 744
 745         /* remove the vlan filter */
 746         ret = ice_remove_vlan(hw, &list_head);
 747         if (ret != ICE_SUCCESS) {
 748                 PMD_DRV_LOG(ERR, "Failed to remove VLAN filter");
 749                 ret = -EINVAL;
 750                 goto DONE;
 751         }
 752
 753         /* Remove the vlan id from vlan list */
 754         TAILQ_REMOVE(&vsi->vlan_list, f, next);
 755         rte_free(f);
 756         vsi->vlan_num--;
 757
 758         ret = 0;
 759 DONE:
 760         rte_free(v_list_itr);
 761         return ret;
 762 }
 763
 764 static int
 765 ice_remove_all_mac_vlan_filters(struct ice_vsi *vsi)
 766 {
 767         struct ice_mac_filter *m_f;
 768         struct ice_vlan_filter *v_f;
 769         int ret = 0;
 770
 771         if (!vsi || !vsi->mac_num)
 772                 return -EINVAL;
 773
 774         TAILQ_FOREACH(m_f, &vsi->mac_list, next) {
 775                 ret = ice_remove_mac_filter(vsi, &m_f->mac_info.mac_addr);
 776                 if (ret != ICE_SUCCESS) {
 777                         ret = -EINVAL;
 778                         goto DONE;
 779                 }
 780         }
 781
 782         if (vsi->vlan_num == 0)
 783                 return 0;
 784
 785         TAILQ_FOREACH(v_f, &vsi->vlan_list, next) {
 786                 ret = ice_remove_vlan_filter(vsi, v_f->vlan_info.vlan_id);
 787                 if (ret != ICE_SUCCESS) {
 788                         ret = -EINVAL;
 789                         goto DONE;
 790                 }
 791         }
 792
 793 DONE:
 794         return ret;
 795 }
 796
 797 static int
 798 ice_vsi_config_qinq_insertion(struct ice_vsi *vsi, bool on)
 799 {
 800         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 801         struct ice_vsi_ctx ctxt;
 802         uint8_t qinq_flags;
 803         int ret = 0;
 804
 805         /* Check if it has been already on or off */
 806         if (vsi->info.valid_sections &
 807                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 808                 if (on) {
 809                         if ((vsi->info.outer_tag_flags &
 810                              ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST) ==
 811                             ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST)
 812                                 return 0; /* already on */
 813                 } else {
 814                         if (!(vsi->info.outer_tag_flags &
 815                               ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST))
 816                                 return 0; /* already off */
 817                 }
 818         }
 819
 820         if (on)
 821                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST;
 822         else
 823                 qinq_flags = 0;
 824         /* clear global insertion and use per packet insertion */
 825         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_INSERT);
 826         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST);
 827         vsi->info.outer_tag_flags |= qinq_flags;
 828         /* use default vlan type 0x8100 */
 829         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 830         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 831                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 832         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 833         ctxt.info.valid_sections =
 834                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 835         ctxt.vsi_num = vsi->vsi_id;
 836         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 837         if (ret) {
 838                 PMD_DRV_LOG(INFO,
 839                             "Update VSI failed to %s qinq stripping",
 840                             on ? "enable" : "disable");
 841                 return -EINVAL;
 842         }
 843
 844         vsi->info.valid_sections |=
 845                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 846
 847         return ret;
 848 }
 849
 850 static int
 851 ice_vsi_config_qinq_stripping(struct ice_vsi *vsi, bool on)
 852 {
 853         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 854         struct ice_vsi_ctx ctxt;
 855         uint8_t qinq_flags;
 856         int ret = 0;
 857
 858         /* Check if it has been already on or off */
 859         if (vsi->info.valid_sections &
 860                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 861                 if (on) {
 862                         if ((vsi->info.outer_tag_flags &
 863                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 864                             ICE_AQ_VSI_OUTER_TAG_COPY)
 865                                 return 0; /* already on */
 866                 } else {
 867                         if ((vsi->info.outer_tag_flags &
 868                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 869                             ICE_AQ_VSI_OUTER_TAG_NOTHING)
 870                                 return 0; /* already off */
 871                 }
 872         }
 873
 874         if (on)
 875                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_COPY;
 876         else
 877                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_NOTHING;
 878         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_MODE_M);
 879         vsi->info.outer_tag_flags |= qinq_flags;
 880         /* use default vlan type 0x8100 */
 881         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 882         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 883                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 884         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 885         ctxt.info.valid_sections =
 886                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 887         ctxt.vsi_num = vsi->vsi_id;
 888         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 889         if (ret) {
 890                 PMD_DRV_LOG(INFO,
 891                             "Update VSI failed to %s qinq stripping",
 892                             on ? "enable" : "disable");
 893                 return -EINVAL;
 894         }
 895
 896         vsi->info.valid_sections |=
 897                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 898
 899         return ret;
 900 }
 901
 902 static int
 903 ice_vsi_config_double_vlan(struct ice_vsi *vsi, int on)
 904 {
 905         int ret;
 906
 907         ret = ice_vsi_config_qinq_stripping(vsi, on);
 908         if (ret)
 909                 PMD_DRV_LOG(ERR, "Fail to set qinq stripping - %d", ret);
 910
 911         ret = ice_vsi_config_qinq_insertion(vsi, on);
 912         if (ret)
 913                 PMD_DRV_LOG(ERR, "Fail to set qinq insertion - %d", ret);
 914
 915         return ret;
 916 }
 917
 918 /* Enable IRQ0 */
 919 static void
 920 ice_pf_enable_irq0(struct ice_hw *hw)
 921 {
 922         /* reset the registers */
 923         ICE_WRITE_REG(hw, PFINT_OICR_ENA, 0);
 924         ICE_READ_REG(hw, PFINT_OICR);
 925
 926 #ifdef ICE_LSE_SPT
 927         ICE_WRITE_REG(hw, PFINT_OICR_ENA,
 928                       (uint32_t)(PFINT_OICR_ENA_INT_ENA_M &
 929                                  (~PFINT_OICR_LINK_STAT_CHANGE_M)));
 930
 931         ICE_WRITE_REG(hw, PFINT_OICR_CTL,
 932                       (0 & PFINT_OICR_CTL_MSIX_INDX_M) |
 933                       ((0 << PFINT_OICR_CTL_ITR_INDX_S) &
 934                        PFINT_OICR_CTL_ITR_INDX_M) |
 935                       PFINT_OICR_CTL_CAUSE_ENA_M);
 936
 937         ICE_WRITE_REG(hw, PFINT_FW_CTL,
 938                       (0 & PFINT_FW_CTL_MSIX_INDX_M) |
 939                       ((0 << PFINT_FW_CTL_ITR_INDX_S) &
 940                        PFINT_FW_CTL_ITR_INDX_M) |
 941                       PFINT_FW_CTL_CAUSE_ENA_M);
 942 #else
 943         ICE_WRITE_REG(hw, PFINT_OICR_ENA, PFINT_OICR_ENA_INT_ENA_M);
 944 #endif
 945
 946         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
 947                       GLINT_DYN_CTL_INTENA_M |
 948                       GLINT_DYN_CTL_CLEARPBA_M |
 949                       GLINT_DYN_CTL_ITR_INDX_M);
 950
 951         ice_flush(hw);
 952 }
 953
 954 /* Disable IRQ0 */
 955 static void
 956 ice_pf_disable_irq0(struct ice_hw *hw)
 957 {
 958         /* Disable all interrupt types */
 959         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
 960         ice_flush(hw);
 961 }
 962
 963 #ifdef ICE_LSE_SPT
 964 static void
 965 ice_handle_aq_msg(struct rte_eth_dev *dev)
 966 {
 967         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 968         struct ice_ctl_q_info *cq = &hw->adminq;
 969         struct ice_rq_event_info event;
 970         uint16_t pending, opcode;
 971         int ret;
 972
 973         event.buf_len = ICE_AQ_MAX_BUF_LEN;
 974         event.msg_buf = rte_zmalloc(NULL, event.buf_len, 0);
 975         if (!event.msg_buf) {
 976                 PMD_DRV_LOG(ERR, "Failed to allocate mem");
 977                 return;
 978         }
 979
 980         pending = 1;
 981         while (pending) {
 982                 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
 983
 984                 if (ret != ICE_SUCCESS) {
 985                         PMD_DRV_LOG(INFO,
 986                                     "Failed to read msg from AdminQ, "
 987                                     "adminq_err: %u",
 988                                     hw->adminq.sq_last_status);
 989                         break;
 990                 }
 991                 opcode = rte_le_to_cpu_16(event.desc.opcode);
 992
 993                 switch (opcode) {
 994                 case ice_aqc_opc_get_link_status:
 995                         ret = ice_link_update(dev, 0);
 996                         if (!ret)
 997                                 _rte_eth_dev_callback_process
 998                                         (dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 999                         break;
1000                 default:
1001                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1002                                     opcode);
1003                         break;
1004                 }
1005         }
1006         rte_free(event.msg_buf);
1007 }
1008 #endif
1009
1010 /**
1011  * Interrupt handler triggered by NIC for handling
1012  * specific interrupt.
1013  *
1014  * @param handle
1015  *  Pointer to interrupt handle.
1016  * @param param
1017  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1018  *
1019  * @return
1020  *  void
1021  */
1022 static void
1023 ice_interrupt_handler(void *param)
1024 {
1025         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1026         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1027         uint32_t oicr;
1028         uint32_t reg;
1029         uint8_t pf_num;
1030         uint8_t event;
1031         uint16_t queue;
1032 #ifdef ICE_LSE_SPT
1033         uint32_t int_fw_ctl;
1034 #endif
1035
1036         /* Disable interrupt */
1037         ice_pf_disable_irq0(hw);
1038
1039         /* read out interrupt causes */
1040         oicr = ICE_READ_REG(hw, PFINT_OICR);
1041 #ifdef ICE_LSE_SPT
1042         int_fw_ctl = ICE_READ_REG(hw, PFINT_FW_CTL);
1043 #endif
1044
1045         /* No interrupt event indicated */
1046         if (!(oicr & PFINT_OICR_INTEVENT_M)) {
1047                 PMD_DRV_LOG(INFO, "No interrupt event");
1048                 goto done;
1049         }
1050
1051 #ifdef ICE_LSE_SPT
1052         if (int_fw_ctl & PFINT_FW_CTL_INTEVENT_M) {
1053                 PMD_DRV_LOG(INFO, "FW_CTL: link state change event");
1054                 ice_handle_aq_msg(dev);
1055         }
1056 #else
1057         if (oicr & PFINT_OICR_LINK_STAT_CHANGE_M) {
1058                 PMD_DRV_LOG(INFO, "OICR: link state change event");
1059                 ice_link_update(dev, 0);
1060         }
1061 #endif
1062
1063         if (oicr & PFINT_OICR_MAL_DETECT_M) {
1064                 PMD_DRV_LOG(WARNING, "OICR: MDD event");
1065                 reg = ICE_READ_REG(hw, GL_MDET_TX_PQM);
1066                 if (reg & GL_MDET_TX_PQM_VALID_M) {
1067                         pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1068                                  GL_MDET_TX_PQM_PF_NUM_S;
1069                         event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1070                                 GL_MDET_TX_PQM_MAL_TYPE_S;
1071                         queue = (reg & GL_MDET_TX_PQM_QNUM_M) >>
1072                                 GL_MDET_TX_PQM_QNUM_S;
1073
1074                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1075                                     "%d by PQM on TX queue %d PF# %d",
1076                                     event, queue, pf_num);
1077                 }
1078
1079                 reg = ICE_READ_REG(hw, GL_MDET_TX_TCLAN);
1080                 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1081                         pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1082                                  GL_MDET_TX_TCLAN_PF_NUM_S;
1083                         event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1084                                 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1085                         queue = (reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1086                                 GL_MDET_TX_TCLAN_QNUM_S;
1087
1088                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1089                                     "%d by TCLAN on TX queue %d PF# %d",
1090                                     event, queue, pf_num);
1091                 }
1092         }
1093 done:
1094         /* Enable interrupt */
1095         ice_pf_enable_irq0(hw);
1096         rte_intr_enable(dev->intr_handle);
1097 }
1098
1099 /*  Initialize SW parameters of PF */
1100 static int
1101 ice_pf_sw_init(struct rte_eth_dev *dev)
1102 {
1103         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1104         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1105
1106         if (ice_config_max_queue_pair_num(dev->device->devargs) > 0)
1107                 pf->lan_nb_qp_max =
1108                         ice_config_max_queue_pair_num(dev->device->devargs);
1109         else
1110                 pf->lan_nb_qp_max =
1111                         (uint16_t)RTE_MIN(hw->func_caps.common_cap.num_txq,
1112                                           hw->func_caps.common_cap.num_rxq);
1113
1114         pf->lan_nb_qps = pf->lan_nb_qp_max;
1115
1116         return 0;
1117 }
1118
1119 static struct ice_vsi *
1120 ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type)
1121 {
1122         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1123         struct ice_vsi *vsi = NULL;
1124         struct ice_vsi_ctx vsi_ctx;
1125         int ret;
1126         struct ether_addr broadcast = {
1127                 .addr_bytes = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff} };
1128         struct ether_addr mac_addr;
1129         uint16_t max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
1130         uint8_t tc_bitmap = 0x1;
1131
1132         /* hw->num_lports = 1 in NIC mode */
1133         vsi = rte_zmalloc(NULL, sizeof(struct ice_vsi), 0);
1134         if (!vsi)
1135                 return NULL;
1136
1137         vsi->idx = pf->next_vsi_idx;
1138         pf->next_vsi_idx++;
1139         vsi->type = type;
1140         vsi->adapter = ICE_PF_TO_ADAPTER(pf);
1141         vsi->max_macaddrs = ICE_NUM_MACADDR_MAX;
1142         vsi->vlan_anti_spoof_on = 0;
1143         vsi->vlan_filter_on = 1;
1144         TAILQ_INIT(&vsi->mac_list);
1145         TAILQ_INIT(&vsi->vlan_list);
1146
1147         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1148         /* base_queue in used in queue mapping of VSI add/update command.
1149          * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ
1150          * cases in the first stage. Only Main VSI.
1151          */
1152         vsi->base_queue = 0;
1153         switch (type) {
1154         case ICE_VSI_PF:
1155                 vsi->nb_qps = pf->lan_nb_qps;
1156                 ice_vsi_config_default_rss(&vsi_ctx.info);
1157                 vsi_ctx.alloc_from_pool = true;
1158                 vsi_ctx.flags = ICE_AQ_VSI_TYPE_PF;
1159                 /* switch_id is queried by get_switch_config aq, which is done
1160                  * by ice_init_hw
1161                  */
1162                 vsi_ctx.info.sw_id = hw->port_info->sw_id;
1163                 vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
1164                 /* Allow all untagged or tagged packets */
1165                 vsi_ctx.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1166                 vsi_ctx.info.vlan_flags |= ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1167                 vsi_ctx.info.q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF |
1168                                          ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1169                 /* Enable VLAN/UP trip */
1170                 ret = ice_vsi_config_tc_queue_mapping(vsi,
1171                                                       &vsi_ctx.info,
1172                                                       ICE_DEFAULT_TCMAP);
1173                 if (ret) {
1174                         PMD_INIT_LOG(ERR,
1175                                      "tc queue mapping with vsi failed, "
1176                                      "err = %d",
1177                                      ret);
1178                         goto fail_mem;
1179                 }
1180
1181                 break;
1182         default:
1183                 /* for other types of VSI */
1184                 PMD_INIT_LOG(ERR, "other types of VSI not supported");
1185                 goto fail_mem;
1186         }
1187
1188         /* VF has MSIX interrupt in VF range, don't allocate here */
1189         if (type == ICE_VSI_PF) {
1190                 ret = ice_res_pool_alloc(&pf->msix_pool,
1191                                          RTE_MIN(vsi->nb_qps,
1192                                                  RTE_MAX_RXTX_INTR_VEC_ID));
1193                 if (ret < 0) {
1194                         PMD_INIT_LOG(ERR, "VSI MAIN %d get heap failed %d",
1195                                      vsi->vsi_id, ret);
1196                 }
1197                 vsi->msix_intr = ret;
1198                 vsi->nb_msix = RTE_MIN(vsi->nb_qps, RTE_MAX_RXTX_INTR_VEC_ID);
1199         } else {
1200                 vsi->msix_intr = 0;
1201                 vsi->nb_msix = 0;
1202         }
1203         ret = ice_add_vsi(hw, vsi->idx, &vsi_ctx, NULL);
1204         if (ret != ICE_SUCCESS) {
1205                 PMD_INIT_LOG(ERR, "add vsi failed, err = %d", ret);
1206                 goto fail_mem;
1207         }
1208         /* store vsi information is SW structure */
1209         vsi->vsi_id = vsi_ctx.vsi_num;
1210         vsi->info = vsi_ctx.info;
1211         pf->vsis_allocated = vsi_ctx.vsis_allocd;
1212         pf->vsis_unallocated = vsi_ctx.vsis_unallocated;
1213
1214         /* MAC configuration */
1215         rte_memcpy(pf->dev_addr.addr_bytes,
1216                    hw->port_info->mac.perm_addr,
1217                    ETH_ADDR_LEN);
1218
1219         rte_memcpy(&mac_addr, &pf->dev_addr, ETHER_ADDR_LEN);
1220         ret = ice_add_mac_filter(vsi, &mac_addr);
1221         if (ret != ICE_SUCCESS)
1222                 PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter");
1223
1224         rte_memcpy(&mac_addr, &broadcast, ETHER_ADDR_LEN);
1225         ret = ice_add_mac_filter(vsi, &mac_addr);
1226         if (ret != ICE_SUCCESS)
1227                 PMD_INIT_LOG(ERR, "Failed to add MAC filter");
1228
1229         /* At the beginning, only TC0. */
1230         /* What we need here is the maximam number of the TX queues.
1231          * Currently vsi->nb_qps means it.
1232          * Correct it if any change.
1233          */
1234         max_txqs[0] = vsi->nb_qps;
1235         ret = ice_cfg_vsi_lan(hw->port_info, vsi->idx,
1236                               tc_bitmap, max_txqs);
1237         if (ret != ICE_SUCCESS)
1238                 PMD_INIT_LOG(ERR, "Failed to config vsi sched");
1239
1240         return vsi;
1241 fail_mem:
1242         rte_free(vsi);
1243         pf->next_vsi_idx--;
1244         return NULL;
1245 }
1246
1247 static int
1248 ice_pf_setup(struct ice_pf *pf)
1249 {
1250         struct ice_vsi *vsi;
1251
1252         /* Clear all stats counters */
1253         pf->offset_loaded = FALSE;
1254         memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats));
1255         memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats));
1256         memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats));
1257         memset(&pf->internal_stats_offset, 0, sizeof(struct ice_eth_stats));
1258
1259         vsi = ice_setup_vsi(pf, ICE_VSI_PF);
1260         if (!vsi) {
1261                 PMD_INIT_LOG(ERR, "Failed to add vsi for PF");
1262                 return -EINVAL;
1263         }
1264
1265         pf->main_vsi = vsi;
1266
1267         return 0;
1268 }
1269
1270 static int ice_load_pkg(struct rte_eth_dev *dev)
1271 {
1272         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1273         const char *pkg_file = ICE_DFLT_PKG_FILE;
1274         int err;
1275         uint8_t *buf;
1276         int buf_len;
1277         FILE *file;
1278         struct stat fstat;
1279
1280         file = fopen(pkg_file, "rb");
1281         if (!file)  {
1282                 PMD_INIT_LOG(ERR, "failed to open file: %s\n", pkg_file);
1283                 return -1;
1284         }
1285
1286         err = stat(pkg_file, &fstat);
1287         if (err) {
1288                 PMD_INIT_LOG(ERR, "failed to get file stats\n");
1289                 fclose(file);
1290                 return err;
1291         }
1292
1293         buf_len = fstat.st_size;
1294         buf = rte_malloc(NULL, buf_len, 0);
1295
1296         if (!buf) {
1297                 PMD_INIT_LOG(ERR, "failed to allocate buf of size %d for package\n",
1298                                 buf_len);
1299                 fclose(file);
1300                 return -1;
1301         }
1302
1303         err = fread(buf, buf_len, 1, file);
1304         if (err != 1) {
1305                 PMD_INIT_LOG(ERR, "failed to read package data\n");
1306                 fclose(file);
1307                 err = -1;
1308                 goto fail_exit;
1309         }
1310
1311         fclose(file);
1312
1313         err = ice_copy_and_init_pkg(hw, buf, buf_len);
1314         if (err) {
1315                 PMD_INIT_LOG(ERR, "ice_copy_and_init_hw failed: %d\n", err);
1316                 goto fail_exit;
1317         }
1318         err = ice_init_hw_tbls(hw);
1319         if (err) {
1320                 PMD_INIT_LOG(ERR, "ice_init_hw_tbls failed: %d\n", err);
1321                 goto fail_init_tbls;
1322         }
1323
1324         return 0;
1325
1326 fail_init_tbls:
1327         rte_free(hw->pkg_copy);
1328 fail_exit:
1329         rte_free(buf);
1330         return err;
1331 }
1332
1333 static int
1334 ice_dev_init(struct rte_eth_dev *dev)
1335 {
1336         struct rte_pci_device *pci_dev;
1337         struct rte_intr_handle *intr_handle;
1338         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1339         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1340         struct ice_adapter *ad =
1341                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1342         struct ice_vsi *vsi;
1343         int ret;
1344
1345         dev->dev_ops = &ice_eth_dev_ops;
1346         dev->rx_pkt_burst = ice_recv_pkts;
1347         dev->tx_pkt_burst = ice_xmit_pkts;
1348         dev->tx_pkt_prepare = ice_prep_pkts;
1349
1350         ice_set_default_ptype_table(dev);
1351         pci_dev = RTE_DEV_TO_PCI(dev->device);
1352         intr_handle = &pci_dev->intr_handle;
1353
1354         pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1355         pf->adapter->eth_dev = dev;
1356         pf->dev_data = dev->data;
1357         hw->back = pf->adapter;
1358         hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr;
1359         hw->vendor_id = pci_dev->id.vendor_id;
1360         hw->device_id = pci_dev->id.device_id;
1361         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1362         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1363         hw->bus.device = pci_dev->addr.devid;
1364         hw->bus.func = pci_dev->addr.function;
1365
1366         ice_init_controlq_parameter(hw);
1367
1368         ret = ice_init_hw(hw);
1369         if (ret) {
1370                 PMD_INIT_LOG(ERR, "Failed to initialize HW");
1371                 return -EINVAL;
1372         }
1373
1374         ret = ice_load_pkg(dev);
1375         if (ret) {
1376                 PMD_INIT_LOG(WARNING, "Failed to load the DDP package,"
1377                                 "Entering Safe Mode");
1378                 ad->is_safe_mode = 1;
1379         }
1380
1381         PMD_INIT_LOG(INFO, "FW %d.%d.%05d API %d.%d",
1382                      hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
1383                      hw->api_maj_ver, hw->api_min_ver);
1384
1385         ice_pf_sw_init(dev);
1386         ret = ice_init_mac_address(dev);
1387         if (ret) {
1388                 PMD_INIT_LOG(ERR, "Failed to initialize mac address");
1389                 goto err_init_mac;
1390         }
1391
1392         ret = ice_res_pool_init(&pf->msix_pool, 1,
1393                                 hw->func_caps.common_cap.num_msix_vectors - 1);
1394         if (ret) {
1395                 PMD_INIT_LOG(ERR, "Failed to init MSIX pool");
1396                 goto err_msix_pool_init;
1397         }
1398
1399         ret = ice_pf_setup(pf);
1400         if (ret) {
1401                 PMD_INIT_LOG(ERR, "Failed to setup PF");
1402                 goto err_pf_setup;
1403         }
1404
1405         vsi = pf->main_vsi;
1406
1407         /* Disable double vlan by default */
1408         ice_vsi_config_double_vlan(vsi, FALSE);
1409
1410         /* register callback func to eal lib */
1411         rte_intr_callback_register(intr_handle,
1412                                    ice_interrupt_handler, dev);
1413
1414         ice_pf_enable_irq0(hw);
1415
1416         /* enable uio intr after callback register */
1417         rte_intr_enable(intr_handle);
1418
1419         return 0;
1420
1421 err_pf_setup:
1422         ice_res_pool_destroy(&pf->msix_pool);
1423 err_msix_pool_init:
1424         rte_free(dev->data->mac_addrs);
1425 err_init_mac:
1426         ice_sched_cleanup_all(hw);
1427         rte_free(hw->port_info);
1428         ice_shutdown_all_ctrlq(hw);
1429
1430         return ret;
1431 }
1432
1433 static int
1434 ice_release_vsi(struct ice_vsi *vsi)
1435 {
1436         struct ice_hw *hw;
1437         struct ice_vsi_ctx vsi_ctx;
1438         enum ice_status ret;
1439
1440         if (!vsi)
1441                 return 0;
1442
1443         hw = ICE_VSI_TO_HW(vsi);
1444
1445         ice_remove_all_mac_vlan_filters(vsi);
1446
1447         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1448
1449         vsi_ctx.vsi_num = vsi->vsi_id;
1450         vsi_ctx.info = vsi->info;
1451         ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
1452         if (ret != ICE_SUCCESS) {
1453                 PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
1454                 rte_free(vsi);
1455                 return -1;
1456         }
1457
1458         rte_free(vsi);
1459         return 0;
1460 }
1461
1462 static void
1463 ice_vsi_disable_queues_intr(struct ice_vsi *vsi)
1464 {
1465         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1466         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1467         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1468         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1469         uint16_t msix_intr, i;
1470
1471         /* disable interrupt and also clear all the exist config */
1472         for (i = 0; i < vsi->nb_qps; i++) {
1473                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1474                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1475                 rte_wmb();
1476         }
1477
1478         if (rte_intr_allow_others(intr_handle))
1479                 /* vfio-pci */
1480                 for (i = 0; i < vsi->nb_msix; i++) {
1481                         msix_intr = vsi->msix_intr + i;
1482                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1483                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1484                 }
1485         else
1486                 /* igb_uio */
1487                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
1488 }
1489
1490 static void
1491 ice_dev_stop(struct rte_eth_dev *dev)
1492 {
1493         struct rte_eth_dev_data *data = dev->data;
1494         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1495         struct ice_vsi *main_vsi = pf->main_vsi;
1496         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1497         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1498         uint16_t i;
1499
1500         /* avoid stopping again */
1501         if (pf->adapter_stopped)
1502                 return;
1503
1504         /* stop and clear all Rx queues */
1505         for (i = 0; i < data->nb_rx_queues; i++)
1506                 ice_rx_queue_stop(dev, i);
1507
1508         /* stop and clear all Tx queues */
1509         for (i = 0; i < data->nb_tx_queues; i++)
1510                 ice_tx_queue_stop(dev, i);
1511
1512         /* disable all queue interrupts */
1513         ice_vsi_disable_queues_intr(main_vsi);
1514
1515         /* Clear all queues and release mbufs */
1516         ice_clear_queues(dev);
1517
1518         /* Clean datapath event and queue/vec mapping */
1519         rte_intr_efd_disable(intr_handle);
1520         if (intr_handle->intr_vec) {
1521                 rte_free(intr_handle->intr_vec);
1522                 intr_handle->intr_vec = NULL;
1523         }
1524
1525         pf->adapter_stopped = true;
1526 }
1527
1528 static void
1529 ice_dev_close(struct rte_eth_dev *dev)
1530 {
1531         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1532         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1533
1534         ice_dev_stop(dev);
1535
1536         /* release all queue resource */
1537         ice_free_queues(dev);
1538
1539         ice_res_pool_destroy(&pf->msix_pool);
1540         ice_release_vsi(pf->main_vsi);
1541         ice_sched_cleanup_all(hw);
1542         rte_free(hw->port_info);
1543         ice_shutdown_all_ctrlq(hw);
1544 }
1545
1546 static int
1547 ice_dev_uninit(struct rte_eth_dev *dev)
1548 {
1549         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1550         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1551
1552         ice_dev_close(dev);
1553
1554         dev->dev_ops = NULL;
1555         dev->rx_pkt_burst = NULL;
1556         dev->tx_pkt_burst = NULL;
1557
1558         rte_free(dev->data->mac_addrs);
1559         dev->data->mac_addrs = NULL;
1560
1561         /* disable uio intr before callback unregister */
1562         rte_intr_disable(intr_handle);
1563
1564         /* register callback func to eal lib */
1565         rte_intr_callback_unregister(intr_handle,
1566                                      ice_interrupt_handler, dev);
1567
1568         return 0;
1569 }
1570
1571 static int
1572 ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
1573 {
1574         struct ice_adapter *ad =
1575                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1576
1577         /* Initialize to TRUE. If any of Rx queues doesn't meet the
1578          * bulk allocation or vector Rx preconditions we will reset it.
1579          */
1580         ad->rx_bulk_alloc_allowed = true;
1581         ad->tx_simple_allowed = true;
1582
1583         return 0;
1584 }
1585
1586 static int ice_init_rss(struct ice_pf *pf)
1587 {
1588         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1589         struct ice_vsi *vsi = pf->main_vsi;
1590         struct rte_eth_dev *dev = pf->adapter->eth_dev;
1591         struct rte_eth_rss_conf *rss_conf;
1592         struct ice_aqc_get_set_rss_keys key;
1593         uint16_t i, nb_q;
1594         int ret = 0;
1595         bool is_safe_mode = pf->adapter->is_safe_mode;
1596
1597         rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
1598         nb_q = dev->data->nb_rx_queues;
1599         vsi->rss_key_size = ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE;
1600         vsi->rss_lut_size = hw->func_caps.common_cap.rss_table_size;
1601
1602         if (is_safe_mode) {
1603                 PMD_DRV_LOG(WARNING, "RSS is not supported in safe mode\n");
1604                 return 0;
1605         }
1606
1607         if (!vsi->rss_key)
1608                 vsi->rss_key = rte_zmalloc(NULL,
1609                                            vsi->rss_key_size, 0);
1610         if (!vsi->rss_lut)
1611                 vsi->rss_lut = rte_zmalloc(NULL,
1612                                            vsi->rss_lut_size, 0);
1613
1614         /* configure RSS key */
1615         if (!rss_conf->rss_key) {
1616                 /* Calculate the default hash key */
1617                 for (i = 0; i <= vsi->rss_key_size; i++)
1618                         vsi->rss_key[i] = (uint8_t)rte_rand();
1619         } else {
1620                 rte_memcpy(vsi->rss_key, rss_conf->rss_key,
1621                            RTE_MIN(rss_conf->rss_key_len,
1622                                    vsi->rss_key_size));
1623         }
1624         rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
1625         ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
1626         if (ret)
1627                 return -EINVAL;
1628
1629         /* init RSS LUT table */
1630         for (i = 0; i < vsi->rss_lut_size; i++)
1631                 vsi->rss_lut[i] = i % nb_q;
1632
1633         ret = ice_aq_set_rss_lut(hw, vsi->idx,
1634                                  ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
1635                                  vsi->rss_lut, vsi->rss_lut_size);
1636         if (ret)
1637                 return -EINVAL;
1638
1639         /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1640         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6,
1641                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1642         if (ret)
1643                 PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret);
1644
1645         /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1646         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6,
1647                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1648         if (ret)
1649                 PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret);
1650
1651         /* configure RSS for sctp6 with input set IPv6 src/dst */
1652         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
1653                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1654         if (ret)
1655                 PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d",
1656                                 __func__, ret);
1657
1658         /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1659         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4,
1660                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1661         if (ret)
1662                 PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret);
1663
1664         /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1665         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4,
1666                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1667         if (ret)
1668                 PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret);
1669
1670         /* configure RSS for sctp4 with input set IP src/dst */
1671         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
1672                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1673         if (ret)
1674                 PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d",
1675                                 __func__, ret);
1676
1677         return 0;
1678 }
1679
1680 static void
1681 __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
1682                        int base_queue, int nb_queue)
1683 {
1684         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1685         uint32_t val, val_tx;
1686         int i;
1687
1688         for (i = 0; i < nb_queue; i++) {
1689                 /*do actual bind*/
1690                 val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
1691                       (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
1692                 val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
1693                          (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
1694
1695                 PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
1696                             base_queue + i, msix_vect);
1697                 /* set ITR0 value */
1698                 ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x10);
1699                 ICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val);
1700                 ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx);
1701         }
1702 }
1703
1704 static void
1705 ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
1706 {
1707         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1708         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1709         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1710         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1711         uint16_t msix_vect = vsi->msix_intr;
1712         uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
1713         uint16_t queue_idx = 0;
1714         int record = 0;
1715         int i;
1716
1717         /* clear Rx/Tx queue interrupt */
1718         for (i = 0; i < vsi->nb_used_qps; i++) {
1719                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1720                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1721         }
1722
1723         /* PF bind interrupt */
1724         if (rte_intr_dp_is_en(intr_handle)) {
1725                 queue_idx = 0;
1726                 record = 1;
1727         }
1728
1729         for (i = 0; i < vsi->nb_used_qps; i++) {
1730                 if (nb_msix <= 1) {
1731                         if (!rte_intr_allow_others(intr_handle))
1732                                 msix_vect = ICE_MISC_VEC_ID;
1733
1734                         /* uio mapping all queue to one msix_vect */
1735                         __vsi_queues_bind_intr(vsi, msix_vect,
1736                                                vsi->base_queue + i,
1737                                                vsi->nb_used_qps - i);
1738
1739                         for (; !!record && i < vsi->nb_used_qps; i++)
1740                                 intr_handle->intr_vec[queue_idx + i] =
1741                                         msix_vect;
1742                         break;
1743                 }
1744
1745                 /* vfio 1:1 queue/msix_vect mapping */
1746                 __vsi_queues_bind_intr(vsi, msix_vect,
1747                                        vsi->base_queue + i, 1);
1748
1749                 if (!!record)
1750                         intr_handle->intr_vec[queue_idx + i] = msix_vect;
1751
1752                 msix_vect++;
1753                 nb_msix--;
1754         }
1755 }
1756
1757 static void
1758 ice_vsi_enable_queues_intr(struct ice_vsi *vsi)
1759 {
1760         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1761         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1762         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1763         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1764         uint16_t msix_intr, i;
1765
1766         if (rte_intr_allow_others(intr_handle))
1767                 for (i = 0; i < vsi->nb_used_qps; i++) {
1768                         msix_intr = vsi->msix_intr + i;
1769                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1770                                       GLINT_DYN_CTL_INTENA_M |
1771                                       GLINT_DYN_CTL_CLEARPBA_M |
1772                                       GLINT_DYN_CTL_ITR_INDX_M |
1773                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1774                 }
1775         else
1776                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
1777                               GLINT_DYN_CTL_INTENA_M |
1778                               GLINT_DYN_CTL_CLEARPBA_M |
1779                               GLINT_DYN_CTL_ITR_INDX_M |
1780                               GLINT_DYN_CTL_WB_ON_ITR_M);
1781 }
1782
1783 static int
1784 ice_rxq_intr_setup(struct rte_eth_dev *dev)
1785 {
1786         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1787         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1788         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1789         struct ice_vsi *vsi = pf->main_vsi;
1790         uint32_t intr_vector = 0;
1791
1792         rte_intr_disable(intr_handle);
1793
1794         /* check and configure queue intr-vector mapping */
1795         if ((rte_intr_cap_multiple(intr_handle) ||
1796              !RTE_ETH_DEV_SRIOV(dev).active) &&
1797             dev->data->dev_conf.intr_conf.rxq != 0) {
1798                 intr_vector = dev->data->nb_rx_queues;
1799                 if (intr_vector > ICE_MAX_INTR_QUEUE_NUM) {
1800                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
1801                                     ICE_MAX_INTR_QUEUE_NUM);
1802                         return -ENOTSUP;
1803                 }
1804                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1805                         return -1;
1806         }
1807
1808         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1809                 intr_handle->intr_vec =
1810                 rte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),
1811                             0);
1812                 if (!intr_handle->intr_vec) {
1813                         PMD_DRV_LOG(ERR,
1814                                     "Failed to allocate %d rx_queues intr_vec",
1815                                     dev->data->nb_rx_queues);
1816                         return -ENOMEM;
1817                 }
1818         }
1819
1820         /* Map queues with MSIX interrupt */
1821         vsi->nb_used_qps = dev->data->nb_rx_queues;
1822         ice_vsi_queues_bind_intr(vsi);
1823
1824         /* Enable interrupts for all the queues */
1825         ice_vsi_enable_queues_intr(vsi);
1826
1827         rte_intr_enable(intr_handle);
1828
1829         return 0;
1830 }
1831
1832 static int
1833 ice_dev_start(struct rte_eth_dev *dev)
1834 {
1835         struct rte_eth_dev_data *data = dev->data;
1836         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1837         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1838         struct ice_vsi *vsi = pf->main_vsi;
1839         uint16_t nb_rxq = 0;
1840         uint16_t nb_txq, i;
1841         int mask, ret;
1842
1843         /* program Tx queues' context in hardware */
1844         for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
1845                 ret = ice_tx_queue_start(dev, nb_txq);
1846                 if (ret) {
1847                         PMD_DRV_LOG(ERR, "fail to start Tx queue %u", nb_txq);
1848                         goto tx_err;
1849                 }
1850         }
1851
1852         /* program Rx queues' context in hardware*/
1853         for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
1854                 ret = ice_rx_queue_start(dev, nb_rxq);
1855                 if (ret) {
1856                         PMD_DRV_LOG(ERR, "fail to start Rx queue %u", nb_rxq);
1857                         goto rx_err;
1858                 }
1859         }
1860
1861         ret = ice_init_rss(pf);
1862         if (ret) {
1863                 PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
1864                 goto rx_err;
1865         }
1866
1867         ice_set_rx_function(dev);
1868         ice_set_tx_function(dev);
1869
1870         mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK |
1871                         ETH_VLAN_EXTEND_MASK;
1872         ret = ice_vlan_offload_set(dev, mask);
1873         if (ret) {
1874                 PMD_INIT_LOG(ERR, "Unable to set VLAN offload");
1875                 goto rx_err;
1876         }
1877
1878         /* enable Rx interrput and mapping Rx queue to interrupt vector */
1879         if (ice_rxq_intr_setup(dev))
1880                 return -EIO;
1881
1882         /* Enable receiving broadcast packets and transmitting packets */
1883         ret = ice_set_vsi_promisc(hw, vsi->idx,
1884                                   ICE_PROMISC_BCAST_RX | ICE_PROMISC_BCAST_TX |
1885                                   ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX,
1886                                   0);
1887         if (ret != ICE_SUCCESS)
1888                 PMD_DRV_LOG(INFO, "fail to set vsi broadcast");
1889
1890         ret = ice_aq_set_event_mask(hw, hw->port_info->lport,
1891                                     ((u16)(ICE_AQ_LINK_EVENT_LINK_FAULT |
1892                                      ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM |
1893                                      ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS |
1894                                      ICE_AQ_LINK_EVENT_SIGNAL_DETECT |
1895                                      ICE_AQ_LINK_EVENT_AN_COMPLETED |
1896                                      ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED)),
1897                                      NULL);
1898         if (ret != ICE_SUCCESS)
1899                 PMD_DRV_LOG(WARNING, "Fail to set phy mask");
1900
1901         /* Call get_link_info aq commond to enable/disable LSE */
1902         ice_link_update(dev, 0);
1903
1904         pf->adapter_stopped = false;
1905
1906         return 0;
1907
1908         /* stop the started queues if failed to start all queues */
1909 rx_err:
1910         for (i = 0; i < nb_rxq; i++)
1911                 ice_rx_queue_stop(dev, i);
1912 tx_err:
1913         for (i = 0; i < nb_txq; i++)
1914                 ice_tx_queue_stop(dev, i);
1915
1916         return -EIO;
1917 }
1918
1919 static int
1920 ice_dev_reset(struct rte_eth_dev *dev)
1921 {
1922         int ret;
1923
1924         if (dev->data->sriov.active)
1925                 return -ENOTSUP;
1926
1927         ret = ice_dev_uninit(dev);
1928         if (ret) {
1929                 PMD_INIT_LOG(ERR, "failed to uninit device, status = %d", ret);
1930                 return -ENXIO;
1931         }
1932
1933         ret = ice_dev_init(dev);
1934         if (ret) {
1935                 PMD_INIT_LOG(ERR, "failed to init device, status = %d", ret);
1936                 return -ENXIO;
1937         }
1938
1939         return 0;
1940 }
1941
1942 static void
1943 ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1944 {
1945         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1946         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1947         struct ice_vsi *vsi = pf->main_vsi;
1948         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1949         bool is_safe_mode = pf->adapter->is_safe_mode;
1950         u64 phy_type_low;
1951         u64 phy_type_high;
1952
1953         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
1954         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
1955         dev_info->max_rx_queues = vsi->nb_qps;
1956         dev_info->max_tx_queues = vsi->nb_qps;
1957         dev_info->max_mac_addrs = vsi->max_macaddrs;
1958         dev_info->max_vfs = pci_dev->max_vfs;
1959
1960         dev_info->rx_offload_capa =
1961                 DEV_RX_OFFLOAD_VLAN_STRIP |
1962                 DEV_RX_OFFLOAD_JUMBO_FRAME |
1963                 DEV_RX_OFFLOAD_KEEP_CRC |
1964                 DEV_RX_OFFLOAD_SCATTER |
1965                 DEV_RX_OFFLOAD_VLAN_FILTER;
1966         dev_info->tx_offload_capa =
1967                 DEV_TX_OFFLOAD_VLAN_INSERT |
1968                 DEV_TX_OFFLOAD_TCP_TSO |
1969                 DEV_TX_OFFLOAD_MULTI_SEGS |
1970                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1971         dev_info->flow_type_rss_offloads = 0;
1972
1973         if (!is_safe_mode) {
1974                 dev_info->rx_offload_capa |=
1975                         DEV_RX_OFFLOAD_IPV4_CKSUM |
1976                         DEV_RX_OFFLOAD_UDP_CKSUM |
1977                         DEV_RX_OFFLOAD_TCP_CKSUM |
1978                         DEV_RX_OFFLOAD_QINQ_STRIP |
1979                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
1980                         DEV_RX_OFFLOAD_VLAN_EXTEND;
1981                 dev_info->tx_offload_capa |=
1982                         DEV_TX_OFFLOAD_QINQ_INSERT |
1983                         DEV_TX_OFFLOAD_IPV4_CKSUM |
1984                         DEV_TX_OFFLOAD_UDP_CKSUM |
1985                         DEV_TX_OFFLOAD_TCP_CKSUM |
1986                         DEV_TX_OFFLOAD_SCTP_CKSUM |
1987                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
1988                 dev_info->flow_type_rss_offloads |= ICE_RSS_OFFLOAD_ALL;
1989         }
1990
1991         dev_info->rx_queue_offload_capa = 0;
1992         dev_info->tx_queue_offload_capa = 0;
1993
1994         dev_info->reta_size = hw->func_caps.common_cap.rss_table_size;
1995         dev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1996
1997         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1998                 .rx_thresh = {
1999                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
2000                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
2001                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
2002                 },
2003                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
2004                 .rx_drop_en = 0,
2005                 .offloads = 0,
2006         };
2007
2008         dev_info->default_txconf = (struct rte_eth_txconf) {
2009                 .tx_thresh = {
2010                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
2011                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
2012                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
2013                 },
2014                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
2015                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
2016                 .offloads = 0,
2017         };
2018
2019         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2020                 .nb_max = ICE_MAX_RING_DESC,
2021                 .nb_min = ICE_MIN_RING_DESC,
2022                 .nb_align = ICE_ALIGN_RING_DESC,
2023         };
2024
2025         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2026                 .nb_max = ICE_MAX_RING_DESC,
2027                 .nb_min = ICE_MIN_RING_DESC,
2028                 .nb_align = ICE_ALIGN_RING_DESC,
2029         };
2030
2031         dev_info->speed_capa = ETH_LINK_SPEED_10M |
2032                                ETH_LINK_SPEED_100M |
2033                                ETH_LINK_SPEED_1G |
2034                                ETH_LINK_SPEED_2_5G |
2035                                ETH_LINK_SPEED_5G |
2036                                ETH_LINK_SPEED_10G |
2037                                ETH_LINK_SPEED_20G |
2038                                ETH_LINK_SPEED_25G;
2039
2040         phy_type_low = hw->port_info->phy.phy_type_low;
2041         phy_type_high = hw->port_info->phy.phy_type_high;
2042
2043         if (ICE_PHY_TYPE_SUPPORT_50G(phy_type_low))
2044                 dev_info->speed_capa |= ETH_LINK_SPEED_50G;
2045
2046         if (ICE_PHY_TYPE_SUPPORT_100G_LOW(phy_type_low) ||
2047                         ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type_high))
2048                 dev_info->speed_capa |= ETH_LINK_SPEED_100G;
2049
2050         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2051         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2052
2053         dev_info->default_rxportconf.burst_size = ICE_RX_MAX_BURST;
2054         dev_info->default_txportconf.burst_size = ICE_TX_MAX_BURST;
2055         dev_info->default_rxportconf.nb_queues = 1;
2056         dev_info->default_txportconf.nb_queues = 1;
2057         dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
2058         dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
2059 }
2060
2061 static inline int
2062 ice_atomic_read_link_status(struct rte_eth_dev *dev,
2063                             struct rte_eth_link *link)
2064 {
2065         struct rte_eth_link *dst = link;
2066         struct rte_eth_link *src = &dev->data->dev_link;
2067
2068         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2069                                 *(uint64_t *)src) == 0)
2070                 return -1;
2071
2072         return 0;
2073 }
2074
2075 static inline int
2076 ice_atomic_write_link_status(struct rte_eth_dev *dev,
2077                              struct rte_eth_link *link)
2078 {
2079         struct rte_eth_link *dst = &dev->data->dev_link;
2080         struct rte_eth_link *src = link;
2081
2082         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2083                                 *(uint64_t *)src) == 0)
2084                 return -1;
2085
2086         return 0;
2087 }
2088
2089 static int
2090 ice_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
2091 {
2092 #define CHECK_INTERVAL 100  /* 100ms */
2093 #define MAX_REPEAT_TIME 10  /* 1s (10 * 100ms) in total */
2094         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2095         struct ice_link_status link_status;
2096         struct rte_eth_link link, old;
2097         int status;
2098         unsigned int rep_cnt = MAX_REPEAT_TIME;
2099         bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
2100
2101         memset(&link, 0, sizeof(link));
2102         memset(&old, 0, sizeof(old));
2103         memset(&link_status, 0, sizeof(link_status));
2104         ice_atomic_read_link_status(dev, &old);
2105
2106         do {
2107                 /* Get link status information from hardware */
2108                 status = ice_aq_get_link_info(hw->port_info, enable_lse,
2109                                               &link_status, NULL);
2110                 if (status != ICE_SUCCESS) {
2111                         link.link_speed = ETH_SPEED_NUM_100M;
2112                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2113                         PMD_DRV_LOG(ERR, "Failed to get link info");
2114                         goto out;
2115                 }
2116
2117                 link.link_status = link_status.link_info & ICE_AQ_LINK_UP;
2118                 if (!wait_to_complete || link.link_status)
2119                         break;
2120
2121                 rte_delay_ms(CHECK_INTERVAL);
2122         } while (--rep_cnt);
2123
2124         if (!link.link_status)
2125                 goto out;
2126
2127         /* Full-duplex operation at all supported speeds */
2128         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2129
2130         /* Parse the link status */
2131         switch (link_status.link_speed) {
2132         case ICE_AQ_LINK_SPEED_10MB:
2133                 link.link_speed = ETH_SPEED_NUM_10M;
2134                 break;
2135         case ICE_AQ_LINK_SPEED_100MB:
2136                 link.link_speed = ETH_SPEED_NUM_100M;
2137                 break;
2138         case ICE_AQ_LINK_SPEED_1000MB:
2139                 link.link_speed = ETH_SPEED_NUM_1G;
2140                 break;
2141         case ICE_AQ_LINK_SPEED_2500MB:
2142                 link.link_speed = ETH_SPEED_NUM_2_5G;
2143                 break;
2144         case ICE_AQ_LINK_SPEED_5GB:
2145                 link.link_speed = ETH_SPEED_NUM_5G;
2146                 break;
2147         case ICE_AQ_LINK_SPEED_10GB:
2148                 link.link_speed = ETH_SPEED_NUM_10G;
2149                 break;
2150         case ICE_AQ_LINK_SPEED_20GB:
2151                 link.link_speed = ETH_SPEED_NUM_20G;
2152                 break;
2153         case ICE_AQ_LINK_SPEED_25GB:
2154                 link.link_speed = ETH_SPEED_NUM_25G;
2155                 break;
2156         case ICE_AQ_LINK_SPEED_40GB:
2157                 link.link_speed = ETH_SPEED_NUM_40G;
2158                 break;
2159         case ICE_AQ_LINK_SPEED_50GB:
2160                 link.link_speed = ETH_SPEED_NUM_50G;
2161                 break;
2162         case ICE_AQ_LINK_SPEED_100GB:
2163                 link.link_speed = ETH_SPEED_NUM_100G;
2164                 break;
2165         case ICE_AQ_LINK_SPEED_UNKNOWN:
2166         default:
2167                 PMD_DRV_LOG(ERR, "Unknown link speed");
2168                 link.link_speed = ETH_SPEED_NUM_NONE;
2169                 break;
2170         }
2171
2172         link.link_autoneg = !(dev->data->dev_conf.link_speeds &
2173                               ETH_LINK_SPEED_FIXED);
2174
2175 out:
2176         ice_atomic_write_link_status(dev, &link);
2177         if (link.link_status == old.link_status)
2178                 return -1;
2179
2180         return 0;
2181 }
2182
2183 static int
2184 ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2185 {
2186         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2187         struct rte_eth_dev_data *dev_data = pf->dev_data;
2188         uint32_t frame_size = mtu + ETHER_HDR_LEN
2189                               + ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE;
2190
2191         /* check if mtu is within the allowed range */
2192         if (mtu < ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
2193                 return -EINVAL;
2194
2195         /* mtu setting is forbidden if port is start */
2196         if (dev_data->dev_started) {
2197                 PMD_DRV_LOG(ERR,
2198                             "port %d must be stopped before configuration",
2199                             dev_data->port_id);
2200                 return -EBUSY;
2201         }
2202
2203         if (frame_size > ETHER_MAX_LEN)
2204                 dev_data->dev_conf.rxmode.offloads |=
2205                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2206         else
2207                 dev_data->dev_conf.rxmode.offloads &=
2208                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2209
2210         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2211
2212         return 0;
2213 }
2214
2215 static int ice_macaddr_set(struct rte_eth_dev *dev,
2216                            struct ether_addr *mac_addr)
2217 {
2218         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2219         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2220         struct ice_vsi *vsi = pf->main_vsi;
2221         struct ice_mac_filter *f;
2222         uint8_t flags = 0;
2223         int ret;
2224
2225         if (!is_valid_assigned_ether_addr(mac_addr)) {
2226                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2227                 return -EINVAL;
2228         }
2229
2230         TAILQ_FOREACH(f, &vsi->mac_list, next) {
2231                 if (is_same_ether_addr(&pf->dev_addr, &f->mac_info.mac_addr))
2232                         break;
2233         }
2234
2235         if (!f) {
2236                 PMD_DRV_LOG(ERR, "Failed to find filter for default mac");
2237                 return -EIO;
2238         }
2239
2240         ret = ice_remove_mac_filter(vsi, &f->mac_info.mac_addr);
2241         if (ret != ICE_SUCCESS) {
2242                 PMD_DRV_LOG(ERR, "Failed to delete mac filter");
2243                 return -EIO;
2244         }
2245         ret = ice_add_mac_filter(vsi, mac_addr);
2246         if (ret != ICE_SUCCESS) {
2247                 PMD_DRV_LOG(ERR, "Failed to add mac filter");
2248                 return -EIO;
2249         }
2250         memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN);
2251
2252         flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
2253         ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL);
2254         if (ret != ICE_SUCCESS)
2255                 PMD_DRV_LOG(ERR, "Failed to set manage mac");
2256
2257         return 0;
2258 }
2259
2260 /* Add a MAC address, and update filters */
2261 static int
2262 ice_macaddr_add(struct rte_eth_dev *dev,
2263                 struct ether_addr *mac_addr,
2264                 __rte_unused uint32_t index,
2265                 __rte_unused uint32_t pool)
2266 {
2267         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2268         struct ice_vsi *vsi = pf->main_vsi;
2269         int ret;
2270
2271         ret = ice_add_mac_filter(vsi, mac_addr);
2272         if (ret != ICE_SUCCESS) {
2273                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
2274                 return -EINVAL;
2275         }
2276
2277         return ICE_SUCCESS;
2278 }
2279
2280 /* Remove a MAC address, and update filters */
2281 static void
2282 ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index)
2283 {
2284         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2285         struct ice_vsi *vsi = pf->main_vsi;
2286         struct rte_eth_dev_data *data = dev->data;
2287         struct ether_addr *macaddr;
2288         int ret;
2289
2290         macaddr = &data->mac_addrs[index];
2291         ret = ice_remove_mac_filter(vsi, macaddr);
2292         if (ret) {
2293                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
2294                 return;
2295         }
2296 }
2297
2298 static int
2299 ice_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
2300 {
2301         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2302         struct ice_vsi *vsi = pf->main_vsi;
2303         int ret;
2304
2305         PMD_INIT_FUNC_TRACE();
2306
2307         if (on) {
2308                 ret = ice_add_vlan_filter(vsi, vlan_id);
2309                 if (ret < 0) {
2310                         PMD_DRV_LOG(ERR, "Failed to add vlan filter");
2311                         return -EINVAL;
2312                 }
2313         } else {
2314                 ret = ice_remove_vlan_filter(vsi, vlan_id);
2315                 if (ret < 0) {
2316                         PMD_DRV_LOG(ERR, "Failed to remove vlan filter");
2317                         return -EINVAL;
2318                 }
2319         }
2320
2321         return 0;
2322 }
2323
2324 /* Configure vlan filter on or off */
2325 static int
2326 ice_vsi_config_vlan_filter(struct ice_vsi *vsi, bool on)
2327 {
2328         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2329         struct ice_vsi_ctx ctxt;
2330         uint8_t sec_flags, sw_flags2;
2331         int ret = 0;
2332
2333         sec_flags = ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2334                     ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2335         sw_flags2 = ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2336
2337         if (on) {
2338                 vsi->info.sec_flags |= sec_flags;
2339                 vsi->info.sw_flags2 |= sw_flags2;
2340         } else {
2341                 vsi->info.sec_flags &= ~sec_flags;
2342                 vsi->info.sw_flags2 &= ~sw_flags2;
2343         }
2344         vsi->info.sw_id = hw->port_info->sw_id;
2345         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2346         ctxt.info.valid_sections =
2347                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2348                                  ICE_AQ_VSI_PROP_SECURITY_VALID);
2349         ctxt.vsi_num = vsi->vsi_id;
2350
2351         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2352         if (ret) {
2353                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan rx pruning",
2354                             on ? "enable" : "disable");
2355                 return -EINVAL;
2356         } else {
2357                 vsi->info.valid_sections |=
2358                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2359                                          ICE_AQ_VSI_PROP_SECURITY_VALID);
2360         }
2361
2362         /* consist with other drivers, allow untagged packet when vlan filter on */
2363         if (on)
2364                 ret = ice_add_vlan_filter(vsi, 0);
2365         else
2366                 ret = ice_remove_vlan_filter(vsi, 0);
2367
2368         return 0;
2369 }
2370
2371 static int
2372 ice_vsi_config_vlan_stripping(struct ice_vsi *vsi, bool on)
2373 {
2374         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2375         struct ice_vsi_ctx ctxt;
2376         uint8_t vlan_flags;
2377         int ret = 0;
2378
2379         /* Check if it has been already on or off */
2380         if (vsi->info.valid_sections &
2381                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID)) {
2382                 if (on) {
2383                         if ((vsi->info.vlan_flags &
2384                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2385                             ICE_AQ_VSI_VLAN_EMOD_STR_BOTH)
2386                                 return 0; /* already on */
2387                 } else {
2388                         if ((vsi->info.vlan_flags &
2389                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2390                             ICE_AQ_VSI_VLAN_EMOD_NOTHING)
2391                                 return 0; /* already off */
2392                 }
2393         }
2394
2395         if (on)
2396                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
2397         else
2398                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
2399         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_VLAN_EMOD_M);
2400         vsi->info.vlan_flags |= vlan_flags;
2401         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2402         ctxt.info.valid_sections =
2403                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2404         ctxt.vsi_num = vsi->vsi_id;
2405         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2406         if (ret) {
2407                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan stripping",
2408                             on ? "enable" : "disable");
2409                 return -EINVAL;
2410         }
2411
2412         vsi->info.valid_sections |=
2413                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2414
2415         return ret;
2416 }
2417
2418 static int
2419 ice_vlan_offload_set(struct rte_eth_dev *dev, int mask)
2420 {
2421         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2422         struct ice_vsi *vsi = pf->main_vsi;
2423         struct rte_eth_rxmode *rxmode;
2424
2425         rxmode = &dev->data->dev_conf.rxmode;
2426         if (mask & ETH_VLAN_FILTER_MASK) {
2427                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2428                         ice_vsi_config_vlan_filter(vsi, TRUE);
2429                 else
2430                         ice_vsi_config_vlan_filter(vsi, FALSE);
2431         }
2432
2433         if (mask & ETH_VLAN_STRIP_MASK) {
2434                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2435                         ice_vsi_config_vlan_stripping(vsi, TRUE);
2436                 else
2437                         ice_vsi_config_vlan_stripping(vsi, FALSE);
2438         }
2439
2440         if (mask & ETH_VLAN_EXTEND_MASK) {
2441                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2442                         ice_vsi_config_double_vlan(vsi, TRUE);
2443                 else
2444                         ice_vsi_config_double_vlan(vsi, FALSE);
2445         }
2446
2447         return 0;
2448 }
2449
2450 static int
2451 ice_vlan_tpid_set(struct rte_eth_dev *dev,
2452                   enum rte_vlan_type vlan_type,
2453                   uint16_t tpid)
2454 {
2455         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2456         uint64_t reg_r = 0, reg_w = 0;
2457         uint16_t reg_id = 0;
2458         int ret = 0;
2459         int qinq = dev->data->dev_conf.rxmode.offloads &
2460                    DEV_RX_OFFLOAD_VLAN_EXTEND;
2461
2462         switch (vlan_type) {
2463         case ETH_VLAN_TYPE_OUTER:
2464                 if (qinq)
2465                         reg_id = 3;
2466                 else
2467                         reg_id = 5;
2468         break;
2469         case ETH_VLAN_TYPE_INNER:
2470                 if (qinq) {
2471                         reg_id = 5;
2472                 } else {
2473                         PMD_DRV_LOG(ERR,
2474                                     "Unsupported vlan type in single vlan.");
2475                         return -EINVAL;
2476                 }
2477                 break;
2478         default:
2479                 PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type);
2480                 return -EINVAL;
2481         }
2482         reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id));
2483         PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: "
2484                     "0x%08"PRIx64"", reg_id, reg_r);
2485
2486         reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M));
2487         reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S);
2488         if (reg_r == reg_w) {
2489                 PMD_DRV_LOG(DEBUG, "No need to write");
2490                 return 0;
2491         }
2492
2493         ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w);
2494         PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to "
2495                     "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id);
2496
2497         return ret;
2498 }
2499
2500 static int
2501 ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2502 {
2503         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2504         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2505         int ret;
2506
2507         if (!lut)
2508                 return -EINVAL;
2509
2510         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2511                 ret = ice_aq_get_rss_lut(hw, vsi->idx, TRUE,
2512                                          lut, lut_size);
2513                 if (ret) {
2514                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2515                         return -EINVAL;
2516                 }
2517         } else {
2518                 uint64_t *lut_dw = (uint64_t *)lut;
2519                 uint16_t i, lut_size_dw = lut_size / 4;
2520
2521                 for (i = 0; i < lut_size_dw; i++)
2522                         lut_dw[i] = ICE_READ_REG(hw, PFQF_HLUT(i));
2523         }
2524
2525         return 0;
2526 }
2527
2528 static int
2529 ice_set_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2530 {
2531         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2532         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2533         int ret;
2534
2535         if (!vsi || !lut)
2536                 return -EINVAL;
2537
2538         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2539                 ret = ice_aq_set_rss_lut(hw, vsi->idx, TRUE,
2540                                          lut, lut_size);
2541                 if (ret) {
2542                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2543                         return -EINVAL;
2544                 }
2545         } else {
2546                 uint64_t *lut_dw = (uint64_t *)lut;
2547                 uint16_t i, lut_size_dw = lut_size / 4;
2548
2549                 for (i = 0; i < lut_size_dw; i++)
2550                         ICE_WRITE_REG(hw, PFQF_HLUT(i), lut_dw[i]);
2551
2552                 ice_flush(hw);
2553         }
2554
2555         return 0;
2556 }
2557
2558 static int
2559 ice_rss_reta_update(struct rte_eth_dev *dev,
2560                     struct rte_eth_rss_reta_entry64 *reta_conf,
2561                     uint16_t reta_size)
2562 {
2563         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2564         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2565         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2566         uint16_t idx, shift;
2567         uint8_t *lut;
2568         int ret;
2569
2570         if (reta_size != lut_size ||
2571             reta_size > ETH_RSS_RETA_SIZE_512) {
2572                 PMD_DRV_LOG(ERR,
2573                             "The size of hash lookup table configured (%d)"
2574                             "doesn't match the number hardware can "
2575                             "supported (%d)",
2576                             reta_size, lut_size);
2577                 return -EINVAL;
2578         }
2579
2580         lut = rte_zmalloc(NULL, reta_size, 0);
2581         if (!lut) {
2582                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2583                 return -ENOMEM;
2584         }
2585         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2586         if (ret)
2587                 goto out;
2588
2589         for (i = 0; i < reta_size; i++) {
2590                 idx = i / RTE_RETA_GROUP_SIZE;
2591                 shift = i % RTE_RETA_GROUP_SIZE;
2592                 if (reta_conf[idx].mask & (1ULL << shift))
2593                         lut[i] = reta_conf[idx].reta[shift];
2594         }
2595         ret = ice_set_rss_lut(pf->main_vsi, lut, reta_size);
2596
2597 out:
2598         rte_free(lut);
2599
2600         return ret;
2601 }
2602
2603 static int
2604 ice_rss_reta_query(struct rte_eth_dev *dev,
2605                    struct rte_eth_rss_reta_entry64 *reta_conf,
2606                    uint16_t reta_size)
2607 {
2608         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2609         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2610         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2611         uint16_t idx, shift;
2612         uint8_t *lut;
2613         int ret;
2614
2615         if (reta_size != lut_size ||
2616             reta_size > ETH_RSS_RETA_SIZE_512) {
2617                 PMD_DRV_LOG(ERR,
2618                             "The size of hash lookup table configured (%d)"
2619                             "doesn't match the number hardware can "
2620                             "supported (%d)",
2621                             reta_size, lut_size);
2622                 return -EINVAL;
2623         }
2624
2625         lut = rte_zmalloc(NULL, reta_size, 0);
2626         if (!lut) {
2627                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2628                 return -ENOMEM;
2629         }
2630
2631         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2632         if (ret)
2633                 goto out;
2634
2635         for (i = 0; i < reta_size; i++) {
2636                 idx = i / RTE_RETA_GROUP_SIZE;
2637                 shift = i % RTE_RETA_GROUP_SIZE;
2638                 if (reta_conf[idx].mask & (1ULL << shift))
2639                         reta_conf[idx].reta[shift] = lut[i];
2640         }
2641
2642 out:
2643         rte_free(lut);
2644
2645         return ret;
2646 }
2647
2648 static int
2649 ice_set_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t key_len)
2650 {
2651         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2652         int ret = 0;
2653
2654         if (!key || key_len == 0) {
2655                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2656                 return 0;
2657         } else if (key_len != (VSIQF_HKEY_MAX_INDEX + 1) *
2658                    sizeof(uint32_t)) {
2659                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2660                 return -EINVAL;
2661         }
2662
2663         struct ice_aqc_get_set_rss_keys *key_dw =
2664                 (struct ice_aqc_get_set_rss_keys *)key;
2665
2666         ret = ice_aq_set_rss_key(hw, vsi->idx, key_dw);
2667         if (ret) {
2668                 PMD_DRV_LOG(ERR, "Failed to configure RSS key via AQ");
2669                 ret = -EINVAL;
2670         }
2671
2672         return ret;
2673 }
2674
2675 static int
2676 ice_get_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t *key_len)
2677 {
2678         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2679         int ret;
2680
2681         if (!key || !key_len)
2682                 return -EINVAL;
2683
2684         ret = ice_aq_get_rss_key
2685                 (hw, vsi->idx,
2686                  (struct ice_aqc_get_set_rss_keys *)key);
2687         if (ret) {
2688                 PMD_DRV_LOG(ERR, "Failed to get RSS key via AQ");
2689                 return -EINVAL;
2690         }
2691         *key_len = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2692
2693         return 0;
2694 }
2695
2696 static int
2697 ice_rss_hash_update(struct rte_eth_dev *dev,
2698                     struct rte_eth_rss_conf *rss_conf)
2699 {
2700         enum ice_status status = ICE_SUCCESS;
2701         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2702         struct ice_vsi *vsi = pf->main_vsi;
2703
2704         /* set hash key */
2705         status = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);
2706         if (status)
2707                 return status;
2708
2709         /* TODO: hash enable config, ice_add_rss_cfg */
2710         return 0;
2711 }
2712
2713 static int
2714 ice_rss_hash_conf_get(struct rte_eth_dev *dev,
2715                       struct rte_eth_rss_conf *rss_conf)
2716 {
2717         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2718         struct ice_vsi *vsi = pf->main_vsi;
2719
2720         ice_get_rss_key(vsi, rss_conf->rss_key,
2721                         &rss_conf->rss_key_len);
2722
2723         /* TODO: default set to 0 as hf config is not supported now */
2724         rss_conf->rss_hf = 0;
2725         return 0;
2726 }
2727
2728 static void
2729 ice_promisc_enable(struct rte_eth_dev *dev)
2730 {
2731         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2732         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2733         struct ice_vsi *vsi = pf->main_vsi;
2734         uint8_t pmask;
2735         uint16_t status;
2736
2737         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
2738                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2739
2740         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
2741         if (status != ICE_SUCCESS)
2742                 PMD_DRV_LOG(ERR, "Failed to enable promisc, err=%d", status);
2743 }
2744
2745 static void
2746 ice_promisc_disable(struct rte_eth_dev *dev)
2747 {
2748         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2749         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2750         struct ice_vsi *vsi = pf->main_vsi;
2751         uint16_t status;
2752         uint8_t pmask;
2753
2754         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
2755                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2756
2757         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
2758         if (status != ICE_SUCCESS)
2759                 PMD_DRV_LOG(ERR, "Failed to clear promisc, err=%d", status);
2760 }
2761
2762 static void
2763 ice_allmulti_enable(struct rte_eth_dev *dev)
2764 {
2765         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2766         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2767         struct ice_vsi *vsi = pf->main_vsi;
2768         uint8_t pmask;
2769         uint16_t status;
2770
2771         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2772
2773         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
2774         if (status != ICE_SUCCESS)
2775                 PMD_DRV_LOG(ERR, "Failed to enable allmulti, err=%d", status);
2776 }
2777
2778 static void
2779 ice_allmulti_disable(struct rte_eth_dev *dev)
2780 {
2781         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2782         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2783         struct ice_vsi *vsi = pf->main_vsi;
2784         uint16_t status;
2785         uint8_t pmask;
2786
2787         if (dev->data->promiscuous == 1)
2788                 return; /* must remain in all_multicast mode */
2789
2790         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2791
2792         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
2793         if (status != ICE_SUCCESS)
2794                 PMD_DRV_LOG(ERR, "Failed to clear allmulti, err=%d", status);
2795 }
2796
2797 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
2798                                     uint16_t queue_id)
2799 {
2800         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2801         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2802         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2803         uint32_t val;
2804         uint16_t msix_intr;
2805
2806         msix_intr = intr_handle->intr_vec[queue_id];
2807
2808         val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
2809               GLINT_DYN_CTL_ITR_INDX_M;
2810         val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
2811
2812         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
2813         rte_intr_enable(&pci_dev->intr_handle);
2814
2815         return 0;
2816 }
2817
2818 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
2819                                      uint16_t queue_id)
2820 {
2821         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2822         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2823         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2824         uint16_t msix_intr;
2825
2826         msix_intr = intr_handle->intr_vec[queue_id];
2827
2828         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);
2829
2830         return 0;
2831 }
2832
2833 static int
2834 ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
2835 {
2836         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2837         u32 full_ver;
2838         u8 ver, patch;
2839         u16 build;
2840         int ret;
2841
2842         full_ver = hw->nvm.oem_ver;
2843         ver = (u8)(full_ver >> 24);
2844         build = (u16)((full_ver >> 8) & 0xffff);
2845         patch = (u8)(full_ver & 0xff);
2846
2847         ret = snprintf(fw_version, fw_size,
2848                         "%d.%d%d 0x%08x %d.%d.%d",
2849                         ((hw->nvm.ver >> 12) & 0xf),
2850                         ((hw->nvm.ver >> 4) & 0xff),
2851                         (hw->nvm.ver & 0xf), hw->nvm.eetrack,
2852                         ver, build, patch);
2853
2854         /* add the size of '\0' */
2855         ret += 1;
2856         if (fw_size < (u32)ret)
2857                 return ret;
2858         else
2859                 return 0;
2860 }
2861
2862 static int
2863 ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)
2864 {
2865         struct ice_hw *hw;
2866         struct ice_vsi_ctx ctxt;
2867         uint8_t vlan_flags = 0;
2868         int ret;
2869
2870         if (!vsi || !info) {
2871                 PMD_DRV_LOG(ERR, "invalid parameters");
2872                 return -EINVAL;
2873         }
2874
2875         if (info->on) {
2876                 vsi->info.pvid = info->config.pvid;
2877                 /**
2878                  * If insert pvid is enabled, only tagged pkts are
2879                  * allowed to be sent out.
2880                  */
2881                 vlan_flags = ICE_AQ_VSI_PVLAN_INSERT_PVID |
2882                              ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2883         } else {
2884                 vsi->info.pvid = 0;
2885                 if (info->config.reject.tagged == 0)
2886                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_TAGGED;
2887
2888                 if (info->config.reject.untagged == 0)
2889                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2890         }
2891         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_PVLAN_INSERT_PVID |
2892                                   ICE_AQ_VSI_VLAN_MODE_M);
2893         vsi->info.vlan_flags |= vlan_flags;
2894         memset(&ctxt, 0, sizeof(ctxt));
2895         rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2896         ctxt.info.valid_sections =
2897                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2898         ctxt.vsi_num = vsi->vsi_id;
2899
2900         hw = ICE_VSI_TO_HW(vsi);
2901         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2902         if (ret != ICE_SUCCESS) {
2903                 PMD_DRV_LOG(ERR,
2904                             "update VSI for VLAN insert failed, err %d",
2905                             ret);
2906                 return -EINVAL;
2907         }
2908
2909         vsi->info.valid_sections |=
2910                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2911
2912         return ret;
2913 }
2914
2915 static int
2916 ice_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
2917 {
2918         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2919         struct ice_vsi *vsi = pf->main_vsi;
2920         struct rte_eth_dev_data *data = pf->dev_data;
2921         struct ice_vsi_vlan_pvid_info info;
2922         int ret;
2923
2924         memset(&info, 0, sizeof(info));
2925         info.on = on;
2926         if (info.on) {
2927                 info.config.pvid = pvid;
2928         } else {
2929                 info.config.reject.tagged =
2930                         data->dev_conf.txmode.hw_vlan_reject_tagged;
2931                 info.config.reject.untagged =
2932                         data->dev_conf.txmode.hw_vlan_reject_untagged;
2933         }
2934
2935         ret = ice_vsi_vlan_pvid_set(vsi, &info);
2936         if (ret < 0) {
2937                 PMD_DRV_LOG(ERR, "Failed to set pvid.");
2938                 return -EINVAL;
2939         }
2940
2941         return 0;
2942 }
2943
2944 static int
2945 ice_get_eeprom_length(struct rte_eth_dev *dev)
2946 {
2947         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2948
2949         /* Convert word count to byte count */
2950         return hw->nvm.sr_words << 1;
2951 }
2952
2953 static int
2954 ice_get_eeprom(struct rte_eth_dev *dev,
2955                struct rte_dev_eeprom_info *eeprom)
2956 {
2957         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2958         uint16_t *data = eeprom->data;
2959         uint16_t first_word, last_word, nwords;
2960         enum ice_status status = ICE_SUCCESS;
2961
2962         first_word = eeprom->offset >> 1;
2963         last_word = (eeprom->offset + eeprom->length - 1) >> 1;
2964         nwords = last_word - first_word + 1;
2965
2966         if (first_word > hw->nvm.sr_words ||
2967             last_word > hw->nvm.sr_words) {
2968                 PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range.");
2969                 return -EINVAL;
2970         }
2971
2972         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
2973
2974         status = ice_read_sr_buf(hw, first_word, &nwords, data);
2975         if (status) {
2976                 PMD_DRV_LOG(ERR, "EEPROM read failed.");
2977                 eeprom->length = sizeof(uint16_t) * nwords;
2978                 return -EIO;
2979         }
2980
2981         return 0;
2982 }
2983
2984 static void
2985 ice_stat_update_32(struct ice_hw *hw,
2986                    uint32_t reg,
2987                    bool offset_loaded,
2988                    uint64_t *offset,
2989                    uint64_t *stat)
2990 {
2991         uint64_t new_data;
2992
2993         new_data = (uint64_t)ICE_READ_REG(hw, reg);
2994         if (!offset_loaded)
2995                 *offset = new_data;
2996
2997         if (new_data >= *offset)
2998                 *stat = (uint64_t)(new_data - *offset);
2999         else
3000                 *stat = (uint64_t)((new_data +
3001                                     ((uint64_t)1 << ICE_32_BIT_WIDTH))
3002                                    - *offset);
3003 }
3004
3005 static void
3006 ice_stat_update_40(struct ice_hw *hw,
3007                    uint32_t hireg,
3008                    uint32_t loreg,
3009                    bool offset_loaded,
3010                    uint64_t *offset,
3011                    uint64_t *stat)
3012 {
3013         uint64_t new_data;
3014
3015         new_data = (uint64_t)ICE_READ_REG(hw, loreg);
3016         new_data |= (uint64_t)(ICE_READ_REG(hw, hireg) & ICE_8_BIT_MASK) <<
3017                     ICE_32_BIT_WIDTH;
3018
3019         if (!offset_loaded)
3020                 *offset = new_data;
3021
3022         if (new_data >= *offset)
3023                 *stat = new_data - *offset;
3024         else
3025                 *stat = (uint64_t)((new_data +
3026                                     ((uint64_t)1 << ICE_40_BIT_WIDTH)) -
3027                                    *offset);
3028
3029         *stat &= ICE_40_BIT_MASK;
3030 }
3031
3032 /* Get all the statistics of a VSI */
3033 static void
3034 ice_update_vsi_stats(struct ice_vsi *vsi)
3035 {
3036         struct ice_eth_stats *oes = &vsi->eth_stats_offset;
3037         struct ice_eth_stats *nes = &vsi->eth_stats;
3038         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
3039         int idx = rte_le_to_cpu_16(vsi->vsi_id);
3040
3041         ice_stat_update_40(hw, GLV_GORCH(idx), GLV_GORCL(idx),
3042                            vsi->offset_loaded, &oes->rx_bytes,
3043                            &nes->rx_bytes);
3044         ice_stat_update_40(hw, GLV_UPRCH(idx), GLV_UPRCL(idx),
3045                            vsi->offset_loaded, &oes->rx_unicast,
3046                            &nes->rx_unicast);
3047         ice_stat_update_40(hw, GLV_MPRCH(idx), GLV_MPRCL(idx),
3048                            vsi->offset_loaded, &oes->rx_multicast,
3049                            &nes->rx_multicast);
3050         ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),
3051                            vsi->offset_loaded, &oes->rx_broadcast,
3052                            &nes->rx_broadcast);
3053         /* exclude CRC bytes */
3054         nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
3055                           nes->rx_broadcast) * ETHER_CRC_LEN;
3056
3057         ice_stat_update_32(hw, GLV_RDPC(idx), vsi->offset_loaded,
3058                            &oes->rx_discards, &nes->rx_discards);
3059         /* GLV_REPC not supported */
3060         /* GLV_RMPC not supported */
3061         ice_stat_update_32(hw, GLSWID_RUPP(idx), vsi->offset_loaded,
3062                            &oes->rx_unknown_protocol,
3063                            &nes->rx_unknown_protocol);
3064         ice_stat_update_40(hw, GLV_GOTCH(idx), GLV_GOTCL(idx),
3065                            vsi->offset_loaded, &oes->tx_bytes,
3066                            &nes->tx_bytes);
3067         ice_stat_update_40(hw, GLV_UPTCH(idx), GLV_UPTCL(idx),
3068                            vsi->offset_loaded, &oes->tx_unicast,
3069                            &nes->tx_unicast);
3070         ice_stat_update_40(hw, GLV_MPTCH(idx), GLV_MPTCL(idx),
3071                            vsi->offset_loaded, &oes->tx_multicast,
3072                            &nes->tx_multicast);
3073         ice_stat_update_40(hw, GLV_BPTCH(idx), GLV_BPTCL(idx),
3074                            vsi->offset_loaded,  &oes->tx_broadcast,
3075                            &nes->tx_broadcast);
3076         /* GLV_TDPC not supported */
3077         ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,
3078                            &oes->tx_errors, &nes->tx_errors);
3079         vsi->offset_loaded = true;
3080
3081         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************",
3082                     vsi->vsi_id);
3083         PMD_DRV_LOG(DEBUG, "rx_bytes:            %"PRIu64"", nes->rx_bytes);
3084         PMD_DRV_LOG(DEBUG, "rx_unicast:          %"PRIu64"", nes->rx_unicast);
3085         PMD_DRV_LOG(DEBUG, "rx_multicast:        %"PRIu64"", nes->rx_multicast);
3086         PMD_DRV_LOG(DEBUG, "rx_broadcast:        %"PRIu64"", nes->rx_broadcast);
3087         PMD_DRV_LOG(DEBUG, "rx_discards:         %"PRIu64"", nes->rx_discards);
3088         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol: %"PRIu64"",
3089                     nes->rx_unknown_protocol);
3090         PMD_DRV_LOG(DEBUG, "tx_bytes:            %"PRIu64"", nes->tx_bytes);
3091         PMD_DRV_LOG(DEBUG, "tx_unicast:          %"PRIu64"", nes->tx_unicast);
3092         PMD_DRV_LOG(DEBUG, "tx_multicast:        %"PRIu64"", nes->tx_multicast);
3093         PMD_DRV_LOG(DEBUG, "tx_broadcast:        %"PRIu64"", nes->tx_broadcast);
3094         PMD_DRV_LOG(DEBUG, "tx_discards:         %"PRIu64"", nes->tx_discards);
3095         PMD_DRV_LOG(DEBUG, "tx_errors:           %"PRIu64"", nes->tx_errors);
3096         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats end ****************",
3097                     vsi->vsi_id);
3098 }
3099
3100 static void
3101 ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)
3102 {
3103         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3104         struct ice_hw_port_stats *os = &pf->stats_offset; /* old stats */
3105
3106         /* Get statistics of struct ice_eth_stats */
3107         ice_stat_update_40(hw, GLPRT_GORCH(hw->port_info->lport),
3108                            GLPRT_GORCL(hw->port_info->lport),
3109                            pf->offset_loaded, &os->eth.rx_bytes,
3110                            &ns->eth.rx_bytes);
3111         ice_stat_update_40(hw, GLPRT_UPRCH(hw->port_info->lport),
3112                            GLPRT_UPRCL(hw->port_info->lport),
3113                            pf->offset_loaded, &os->eth.rx_unicast,
3114                            &ns->eth.rx_unicast);
3115         ice_stat_update_40(hw, GLPRT_MPRCH(hw->port_info->lport),
3116                            GLPRT_MPRCL(hw->port_info->lport),
3117                            pf->offset_loaded, &os->eth.rx_multicast,
3118                            &ns->eth.rx_multicast);
3119         ice_stat_update_40(hw, GLPRT_BPRCH(hw->port_info->lport),
3120                            GLPRT_BPRCL(hw->port_info->lport),
3121                            pf->offset_loaded, &os->eth.rx_broadcast,
3122                            &ns->eth.rx_broadcast);
3123         ice_stat_update_32(hw, PRTRPB_RDPC,
3124                            pf->offset_loaded, &os->eth.rx_discards,
3125                            &ns->eth.rx_discards);
3126
3127         /* Workaround: CRC size should not be included in byte statistics,
3128          * so subtract ETHER_CRC_LEN from the byte counter for each rx packet.
3129          */
3130         ns->eth.rx_bytes -= (ns->eth.rx_unicast + ns->eth.rx_multicast +
3131                              ns->eth.rx_broadcast) * ETHER_CRC_LEN;
3132
3133         /* GLPRT_REPC not supported */
3134         /* GLPRT_RMPC not supported */
3135         ice_stat_update_32(hw, GLSWID_RUPP(hw->port_info->lport),
3136                            pf->offset_loaded,
3137                            &os->eth.rx_unknown_protocol,
3138                            &ns->eth.rx_unknown_protocol);
3139         ice_stat_update_40(hw, GLPRT_GOTCH(hw->port_info->lport),
3140                            GLPRT_GOTCL(hw->port_info->lport),
3141                            pf->offset_loaded, &os->eth.tx_bytes,
3142                            &ns->eth.tx_bytes);
3143         ice_stat_update_40(hw, GLPRT_UPTCH(hw->port_info->lport),
3144                            GLPRT_UPTCL(hw->port_info->lport),
3145                            pf->offset_loaded, &os->eth.tx_unicast,
3146                            &ns->eth.tx_unicast);
3147         ice_stat_update_40(hw, GLPRT_MPTCH(hw->port_info->lport),
3148                            GLPRT_MPTCL(hw->port_info->lport),
3149                            pf->offset_loaded, &os->eth.tx_multicast,
3150                            &ns->eth.tx_multicast);
3151         ice_stat_update_40(hw, GLPRT_BPTCH(hw->port_info->lport),
3152                            GLPRT_BPTCL(hw->port_info->lport),
3153                            pf->offset_loaded, &os->eth.tx_broadcast,
3154                            &ns->eth.tx_broadcast);
3155         ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +
3156                              ns->eth.tx_broadcast) * ETHER_CRC_LEN;
3157
3158         /* GLPRT_TEPC not supported */
3159
3160         /* additional port specific stats */
3161         ice_stat_update_32(hw, GLPRT_TDOLD(hw->port_info->lport),
3162                            pf->offset_loaded, &os->tx_dropped_link_down,
3163                            &ns->tx_dropped_link_down);
3164         ice_stat_update_32(hw, GLPRT_CRCERRS(hw->port_info->lport),
3165                            pf->offset_loaded, &os->crc_errors,
3166                            &ns->crc_errors);
3167         ice_stat_update_32(hw, GLPRT_ILLERRC(hw->port_info->lport),
3168                            pf->offset_loaded, &os->illegal_bytes,
3169                            &ns->illegal_bytes);
3170         /* GLPRT_ERRBC not supported */
3171         ice_stat_update_32(hw, GLPRT_MLFC(hw->port_info->lport),
3172                            pf->offset_loaded, &os->mac_local_faults,
3173                            &ns->mac_local_faults);
3174         ice_stat_update_32(hw, GLPRT_MRFC(hw->port_info->lport),
3175                            pf->offset_loaded, &os->mac_remote_faults,
3176                            &ns->mac_remote_faults);
3177
3178         ice_stat_update_32(hw, GLPRT_RLEC(hw->port_info->lport),
3179                            pf->offset_loaded, &os->rx_len_errors,
3180                            &ns->rx_len_errors);
3181
3182         ice_stat_update_32(hw, GLPRT_LXONRXC(hw->port_info->lport),
3183                            pf->offset_loaded, &os->link_xon_rx,
3184                            &ns->link_xon_rx);
3185         ice_stat_update_32(hw, GLPRT_LXOFFRXC(hw->port_info->lport),
3186                            pf->offset_loaded, &os->link_xoff_rx,
3187                            &ns->link_xoff_rx);
3188         ice_stat_update_32(hw, GLPRT_LXONTXC(hw->port_info->lport),
3189                            pf->offset_loaded, &os->link_xon_tx,
3190                            &ns->link_xon_tx);
3191         ice_stat_update_32(hw, GLPRT_LXOFFTXC(hw->port_info->lport),
3192                            pf->offset_loaded, &os->link_xoff_tx,
3193                            &ns->link_xoff_tx);
3194         ice_stat_update_40(hw, GLPRT_PRC64H(hw->port_info->lport),
3195                            GLPRT_PRC64L(hw->port_info->lport),
3196                            pf->offset_loaded, &os->rx_size_64,
3197                            &ns->rx_size_64);
3198         ice_stat_update_40(hw, GLPRT_PRC127H(hw->port_info->lport),
3199                            GLPRT_PRC127L(hw->port_info->lport),
3200                            pf->offset_loaded, &os->rx_size_127,
3201                            &ns->rx_size_127);
3202         ice_stat_update_40(hw, GLPRT_PRC255H(hw->port_info->lport),
3203                            GLPRT_PRC255L(hw->port_info->lport),
3204                            pf->offset_loaded, &os->rx_size_255,
3205                            &ns->rx_size_255);
3206         ice_stat_update_40(hw, GLPRT_PRC511H(hw->port_info->lport),
3207                            GLPRT_PRC511L(hw->port_info->lport),
3208                            pf->offset_loaded, &os->rx_size_511,
3209                            &ns->rx_size_511);
3210         ice_stat_update_40(hw, GLPRT_PRC1023H(hw->port_info->lport),
3211                            GLPRT_PRC1023L(hw->port_info->lport),
3212                            pf->offset_loaded, &os->rx_size_1023,
3213                            &ns->rx_size_1023);
3214         ice_stat_update_40(hw, GLPRT_PRC1522H(hw->port_info->lport),
3215                            GLPRT_PRC1522L(hw->port_info->lport),
3216                            pf->offset_loaded, &os->rx_size_1522,
3217                            &ns->rx_size_1522);
3218         ice_stat_update_40(hw, GLPRT_PRC9522H(hw->port_info->lport),
3219                            GLPRT_PRC9522L(hw->port_info->lport),
3220                            pf->offset_loaded, &os->rx_size_big,
3221                            &ns->rx_size_big);
3222         ice_stat_update_32(hw, GLPRT_RUC(hw->port_info->lport),
3223                            pf->offset_loaded, &os->rx_undersize,
3224                            &ns->rx_undersize);
3225         ice_stat_update_32(hw, GLPRT_RFC(hw->port_info->lport),
3226                            pf->offset_loaded, &os->rx_fragments,
3227                            &ns->rx_fragments);
3228         ice_stat_update_32(hw, GLPRT_ROC(hw->port_info->lport),
3229                            pf->offset_loaded, &os->rx_oversize,
3230                            &ns->rx_oversize);
3231         ice_stat_update_32(hw, GLPRT_RJC(hw->port_info->lport),
3232                            pf->offset_loaded, &os->rx_jabber,
3233                            &ns->rx_jabber);
3234         ice_stat_update_40(hw, GLPRT_PTC64H(hw->port_info->lport),
3235                            GLPRT_PTC64L(hw->port_info->lport),
3236                            pf->offset_loaded, &os->tx_size_64,
3237                            &ns->tx_size_64);
3238         ice_stat_update_40(hw, GLPRT_PTC127H(hw->port_info->lport),
3239                            GLPRT_PTC127L(hw->port_info->lport),
3240                            pf->offset_loaded, &os->tx_size_127,
3241                            &ns->tx_size_127);
3242         ice_stat_update_40(hw, GLPRT_PTC255H(hw->port_info->lport),
3243                            GLPRT_PTC255L(hw->port_info->lport),
3244                            pf->offset_loaded, &os->tx_size_255,
3245                            &ns->tx_size_255);
3246         ice_stat_update_40(hw, GLPRT_PTC511H(hw->port_info->lport),
3247                            GLPRT_PTC511L(hw->port_info->lport),
3248                            pf->offset_loaded, &os->tx_size_511,
3249                            &ns->tx_size_511);
3250         ice_stat_update_40(hw, GLPRT_PTC1023H(hw->port_info->lport),
3251                            GLPRT_PTC1023L(hw->port_info->lport),
3252                            pf->offset_loaded, &os->tx_size_1023,
3253                            &ns->tx_size_1023);
3254         ice_stat_update_40(hw, GLPRT_PTC1522H(hw->port_info->lport),
3255                            GLPRT_PTC1522L(hw->port_info->lport),
3256                            pf->offset_loaded, &os->tx_size_1522,
3257                            &ns->tx_size_1522);
3258         ice_stat_update_40(hw, GLPRT_PTC9522H(hw->port_info->lport),
3259                            GLPRT_PTC9522L(hw->port_info->lport),
3260                            pf->offset_loaded, &os->tx_size_big,
3261                            &ns->tx_size_big);
3262
3263         /* GLPRT_MSPDC not supported */
3264         /* GLPRT_XEC not supported */
3265
3266         pf->offset_loaded = true;
3267
3268         if (pf->main_vsi)
3269                 ice_update_vsi_stats(pf->main_vsi);
3270 }
3271
3272 /* Get all statistics of a port */
3273 static int
3274 ice_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
3275 {
3276         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3277         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3278         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3279
3280         /* call read registers - updates values, now write them to struct */
3281         ice_read_stats_registers(pf, hw);
3282
3283         stats->ipackets = ns->eth.rx_unicast +
3284                           ns->eth.rx_multicast +
3285                           ns->eth.rx_broadcast -
3286                           ns->eth.rx_discards -
3287                           pf->main_vsi->eth_stats.rx_discards;
3288         stats->opackets = ns->eth.tx_unicast +
3289                           ns->eth.tx_multicast +
3290                           ns->eth.tx_broadcast;
3291         stats->ibytes   = ns->eth.rx_bytes;
3292         stats->obytes   = ns->eth.tx_bytes;
3293         stats->oerrors  = ns->eth.tx_errors +
3294                           pf->main_vsi->eth_stats.tx_errors;
3295
3296         /* Rx Errors */
3297         stats->imissed  = ns->eth.rx_discards +
3298                           pf->main_vsi->eth_stats.rx_discards;
3299         stats->ierrors  = ns->crc_errors +
3300                           ns->rx_undersize +
3301                           ns->rx_oversize + ns->rx_fragments + ns->rx_jabber;
3302
3303         PMD_DRV_LOG(DEBUG, "*************** PF stats start *****************");
3304         PMD_DRV_LOG(DEBUG, "rx_bytes:   %"PRIu64"", ns->eth.rx_bytes);
3305         PMD_DRV_LOG(DEBUG, "rx_unicast: %"PRIu64"", ns->eth.rx_unicast);
3306         PMD_DRV_LOG(DEBUG, "rx_multicast:%"PRIu64"", ns->eth.rx_multicast);
3307         PMD_DRV_LOG(DEBUG, "rx_broadcast:%"PRIu64"", ns->eth.rx_broadcast);
3308         PMD_DRV_LOG(DEBUG, "rx_discards:%"PRIu64"", ns->eth.rx_discards);
3309         PMD_DRV_LOG(DEBUG, "vsi rx_discards:%"PRIu64"",
3310                     pf->main_vsi->eth_stats.rx_discards);
3311         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol:  %"PRIu64"",
3312                     ns->eth.rx_unknown_protocol);
3313         PMD_DRV_LOG(DEBUG, "tx_bytes:   %"PRIu64"", ns->eth.tx_bytes);
3314         PMD_DRV_LOG(DEBUG, "tx_unicast: %"PRIu64"", ns->eth.tx_unicast);
3315         PMD_DRV_LOG(DEBUG, "tx_multicast:%"PRIu64"", ns->eth.tx_multicast);
3316         PMD_DRV_LOG(DEBUG, "tx_broadcast:%"PRIu64"", ns->eth.tx_broadcast);
3317         PMD_DRV_LOG(DEBUG, "tx_discards:%"PRIu64"", ns->eth.tx_discards);
3318         PMD_DRV_LOG(DEBUG, "vsi tx_discards:%"PRIu64"",
3319                     pf->main_vsi->eth_stats.tx_discards);
3320         PMD_DRV_LOG(DEBUG, "tx_errors:          %"PRIu64"", ns->eth.tx_errors);
3321
3322         PMD_DRV_LOG(DEBUG, "tx_dropped_link_down:       %"PRIu64"",
3323                     ns->tx_dropped_link_down);
3324         PMD_DRV_LOG(DEBUG, "crc_errors: %"PRIu64"", ns->crc_errors);
3325         PMD_DRV_LOG(DEBUG, "illegal_bytes:      %"PRIu64"",
3326                     ns->illegal_bytes);
3327         PMD_DRV_LOG(DEBUG, "error_bytes:        %"PRIu64"", ns->error_bytes);
3328         PMD_DRV_LOG(DEBUG, "mac_local_faults:   %"PRIu64"",
3329                     ns->mac_local_faults);
3330         PMD_DRV_LOG(DEBUG, "mac_remote_faults:  %"PRIu64"",
3331                     ns->mac_remote_faults);
3332         PMD_DRV_LOG(DEBUG, "link_xon_rx:        %"PRIu64"", ns->link_xon_rx);
3333         PMD_DRV_LOG(DEBUG, "link_xoff_rx:       %"PRIu64"", ns->link_xoff_rx);
3334         PMD_DRV_LOG(DEBUG, "link_xon_tx:        %"PRIu64"", ns->link_xon_tx);
3335         PMD_DRV_LOG(DEBUG, "link_xoff_tx:       %"PRIu64"", ns->link_xoff_tx);
3336         PMD_DRV_LOG(DEBUG, "rx_size_64:         %"PRIu64"", ns->rx_size_64);
3337         PMD_DRV_LOG(DEBUG, "rx_size_127:        %"PRIu64"", ns->rx_size_127);
3338         PMD_DRV_LOG(DEBUG, "rx_size_255:        %"PRIu64"", ns->rx_size_255);
3339         PMD_DRV_LOG(DEBUG, "rx_size_511:        %"PRIu64"", ns->rx_size_511);
3340         PMD_DRV_LOG(DEBUG, "rx_size_1023:       %"PRIu64"", ns->rx_size_1023);
3341         PMD_DRV_LOG(DEBUG, "rx_size_1522:       %"PRIu64"", ns->rx_size_1522);
3342         PMD_DRV_LOG(DEBUG, "rx_size_big:        %"PRIu64"", ns->rx_size_big);
3343         PMD_DRV_LOG(DEBUG, "rx_undersize:       %"PRIu64"", ns->rx_undersize);
3344         PMD_DRV_LOG(DEBUG, "rx_fragments:       %"PRIu64"", ns->rx_fragments);
3345         PMD_DRV_LOG(DEBUG, "rx_oversize:        %"PRIu64"", ns->rx_oversize);
3346         PMD_DRV_LOG(DEBUG, "rx_jabber:          %"PRIu64"", ns->rx_jabber);
3347         PMD_DRV_LOG(DEBUG, "tx_size_64:         %"PRIu64"", ns->tx_size_64);
3348         PMD_DRV_LOG(DEBUG, "tx_size_127:        %"PRIu64"", ns->tx_size_127);
3349         PMD_DRV_LOG(DEBUG, "tx_size_255:        %"PRIu64"", ns->tx_size_255);
3350         PMD_DRV_LOG(DEBUG, "tx_size_511:        %"PRIu64"", ns->tx_size_511);
3351         PMD_DRV_LOG(DEBUG, "tx_size_1023:       %"PRIu64"", ns->tx_size_1023);
3352         PMD_DRV_LOG(DEBUG, "tx_size_1522:       %"PRIu64"", ns->tx_size_1522);
3353         PMD_DRV_LOG(DEBUG, "tx_size_big:        %"PRIu64"", ns->tx_size_big);
3354         PMD_DRV_LOG(DEBUG, "rx_len_errors:      %"PRIu64"", ns->rx_len_errors);
3355         PMD_DRV_LOG(DEBUG, "************* PF stats end ****************");
3356         return 0;
3357 }
3358
3359 /* Reset the statistics */
3360 static void
3361 ice_stats_reset(struct rte_eth_dev *dev)
3362 {
3363         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3364         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3365
3366         /* Mark PF and VSI stats to update the offset, aka "reset" */
3367         pf->offset_loaded = false;
3368         if (pf->main_vsi)
3369                 pf->main_vsi->offset_loaded = false;
3370
3371         /* read the stats, reading current register values into offset */
3372         ice_read_stats_registers(pf, hw);
3373 }
3374
3375 static uint32_t
3376 ice_xstats_calc_num(void)
3377 {
3378         uint32_t num;
3379
3380         num = ICE_NB_ETH_XSTATS + ICE_NB_HW_PORT_XSTATS;
3381
3382         return num;
3383 }
3384
3385 static int
3386 ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
3387                unsigned int n)
3388 {
3389         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3390         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3391         unsigned int i;
3392         unsigned int count;
3393         struct ice_hw_port_stats *hw_stats = &pf->stats;
3394
3395         count = ice_xstats_calc_num();
3396         if (n < count)
3397                 return count;
3398
3399         ice_read_stats_registers(pf, hw);
3400
3401         if (!xstats)
3402                 return 0;
3403
3404         count = 0;
3405
3406         /* Get stats from ice_eth_stats struct */
3407         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3408                 xstats[count].value =
3409                         *(uint64_t *)((char *)&hw_stats->eth +
3410                                       ice_stats_strings[i].offset);
3411                 xstats[count].id = count;
3412                 count++;
3413         }
3414
3415         /* Get individiual stats from ice_hw_port struct */
3416         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3417                 xstats[count].value =
3418                         *(uint64_t *)((char *)hw_stats +
3419                                       ice_hw_port_strings[i].offset);
3420                 xstats[count].id = count;
3421                 count++;
3422         }
3423
3424         return count;
3425 }
3426
3427 static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
3428                                 struct rte_eth_xstat_name *xstats_names,
3429                                 __rte_unused unsigned int limit)
3430 {
3431         unsigned int count = 0;
3432         unsigned int i;
3433
3434         if (!xstats_names)
3435                 return ice_xstats_calc_num();
3436
3437         /* Note: limit checked in rte_eth_xstats_names() */
3438
3439         /* Get stats from ice_eth_stats struct */
3440         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3441                 strlcpy(xstats_names[count].name, ice_stats_strings[i].name,
3442                         sizeof(xstats_names[count].name));
3443                 count++;
3444         }
3445
3446         /* Get individiual stats from ice_hw_port struct */
3447         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3448                 strlcpy(xstats_names[count].name, ice_hw_port_strings[i].name,
3449                         sizeof(xstats_names[count].name));
3450                 count++;
3451         }
3452
3453         return count;
3454 }
3455
3456 static int
3457 ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3458               struct rte_pci_device *pci_dev)
3459 {
3460         return rte_eth_dev_pci_generic_probe(pci_dev,
3461                                              sizeof(struct ice_adapter),
3462                                              ice_dev_init);
3463 }
3464
3465 static int
3466 ice_pci_remove(struct rte_pci_device *pci_dev)
3467 {
3468         return rte_eth_dev_pci_generic_remove(pci_dev, ice_dev_uninit);
3469 }
3470
3471 static struct rte_pci_driver rte_ice_pmd = {
3472         .id_table = pci_id_ice_map,
3473         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
3474                      RTE_PCI_DRV_IOVA_AS_VA,
3475         .probe = ice_pci_probe,
3476         .remove = ice_pci_remove,
3477 };
3478
3479 /**
3480  * Driver initialization routine.
3481  * Invoked once at EAL init time.
3482  * Register itself as the [Poll Mode] Driver of PCI devices.
3483  */
3484 RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
3485 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
3486 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
3487 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
3488                               ICE_MAX_QP_NUM "=<int>");
3489
3490 RTE_INIT(ice_init_log)
3491 {
3492         ice_logtype_init = rte_log_register("pmd.net.ice.init");
3493         if (ice_logtype_init >= 0)
3494                 rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
3495         ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
3496         if (ice_logtype_driver >= 0)
3497                 rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
3498 }