drivers/net/ice/ice_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #include <rte_ethdev_pci.h>
   6
   7 #include "base/ice_sched.h"
   8 #include "ice_ethdev.h"
   9 #include "ice_rxtx.h"
  10
  11 #define ICE_MAX_QP_NUM "max_queue_pair_num"
  12 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
  13
  14 int ice_logtype_init;
  15 int ice_logtype_driver;
  16
  17 static int ice_dev_configure(struct rte_eth_dev *dev);
  18 static int ice_dev_start(struct rte_eth_dev *dev);
  19 static void ice_dev_stop(struct rte_eth_dev *dev);
  20 static void ice_dev_close(struct rte_eth_dev *dev);
  21 static int ice_dev_reset(struct rte_eth_dev *dev);
  22 static void ice_dev_info_get(struct rte_eth_dev *dev,
  23                              struct rte_eth_dev_info *dev_info);
  24
  25 static const struct rte_pci_id pci_id_ice_map[] = {
  26         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
  27         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
  28         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
  29         { .vendor_id = 0, /* sentinel */ },
  30 };
  31
  32 static const struct eth_dev_ops ice_eth_dev_ops = {
  33         .dev_configure                = ice_dev_configure,
  34         .dev_start                    = ice_dev_start,
  35         .dev_stop                     = ice_dev_stop,
  36         .dev_close                    = ice_dev_close,
  37         .dev_reset                    = ice_dev_reset,
  38         .rx_queue_start               = ice_rx_queue_start,
  39         .rx_queue_stop                = ice_rx_queue_stop,
  40         .tx_queue_start               = ice_tx_queue_start,
  41         .tx_queue_stop                = ice_tx_queue_stop,
  42         .rx_queue_setup               = ice_rx_queue_setup,
  43         .rx_queue_release             = ice_rx_queue_release,
  44         .tx_queue_setup               = ice_tx_queue_setup,
  45         .tx_queue_release             = ice_tx_queue_release,
  46         .dev_infos_get                = ice_dev_info_get,
  47 };
  48
  49 static void
  50 ice_init_controlq_parameter(struct ice_hw *hw)
  51 {
  52         /* fields for adminq */
  53         hw->adminq.num_rq_entries = ICE_ADMINQ_LEN;
  54         hw->adminq.num_sq_entries = ICE_ADMINQ_LEN;
  55         hw->adminq.rq_buf_size = ICE_ADMINQ_BUF_SZ;
  56         hw->adminq.sq_buf_size = ICE_ADMINQ_BUF_SZ;
  57
  58         /* fields for mailboxq, DPDK used as PF host */
  59         hw->mailboxq.num_rq_entries = ICE_MAILBOXQ_LEN;
  60         hw->mailboxq.num_sq_entries = ICE_MAILBOXQ_LEN;
  61         hw->mailboxq.rq_buf_size = ICE_MAILBOXQ_BUF_SZ;
  62         hw->mailboxq.sq_buf_size = ICE_MAILBOXQ_BUF_SZ;
  63 }
  64
  65 static int
  66 ice_check_qp_num(const char *key, const char *qp_value,
  67                  __rte_unused void *opaque)
  68 {
  69         char *end = NULL;
  70         int num = 0;
  71
  72         while (isblank(*qp_value))
  73                 qp_value++;
  74
  75         num = strtoul(qp_value, &end, 10);
  76
  77         if (!num || (*end == '-') || errno) {
  78                 PMD_DRV_LOG(WARNING, "invalid value:\"%s\" for key:\"%s\", "
  79                             "value must be > 0",
  80                             qp_value, key);
  81                 return -1;
  82         }
  83
  84         return num;
  85 }
  86
  87 static int
  88 ice_config_max_queue_pair_num(struct rte_devargs *devargs)
  89 {
  90         struct rte_kvargs *kvlist;
  91         const char *queue_num_key = ICE_MAX_QP_NUM;
  92         int ret;
  93
  94         if (!devargs)
  95                 return 0;
  96
  97         kvlist = rte_kvargs_parse(devargs->args, NULL);
  98         if (!kvlist)
  99                 return 0;
 100
 101         if (!rte_kvargs_count(kvlist, queue_num_key)) {
 102                 rte_kvargs_free(kvlist);
 103                 return 0;
 104         }
 105
 106         if (rte_kvargs_process(kvlist, queue_num_key,
 107                                ice_check_qp_num, NULL) < 0) {
 108                 rte_kvargs_free(kvlist);
 109                 return 0;
 110         }
 111         ret = rte_kvargs_process(kvlist, queue_num_key,
 112                                  ice_check_qp_num, NULL);
 113         rte_kvargs_free(kvlist);
 114
 115         return ret;
 116 }
 117
 118 static int
 119 ice_res_pool_init(struct ice_res_pool_info *pool, uint32_t base,
 120                   uint32_t num)
 121 {
 122         struct pool_entry *entry;
 123
 124         if (!pool || !num)
 125                 return -EINVAL;
 126
 127         entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 128         if (!entry) {
 129                 PMD_INIT_LOG(ERR,
 130                              "Failed to allocate memory for resource pool");
 131                 return -ENOMEM;
 132         }
 133
 134         /* queue heap initialize */
 135         pool->num_free = num;
 136         pool->num_alloc = 0;
 137         pool->base = base;
 138         LIST_INIT(&pool->alloc_list);
 139         LIST_INIT(&pool->free_list);
 140
 141         /* Initialize element  */
 142         entry->base = 0;
 143         entry->len = num;
 144
 145         LIST_INSERT_HEAD(&pool->free_list, entry, next);
 146         return 0;
 147 }
 148
 149 static int
 150 ice_res_pool_alloc(struct ice_res_pool_info *pool,
 151                    uint16_t num)
 152 {
 153         struct pool_entry *entry, *valid_entry;
 154
 155         if (!pool || !num) {
 156                 PMD_INIT_LOG(ERR, "Invalid parameter");
 157                 return -EINVAL;
 158         }
 159
 160         if (pool->num_free < num) {
 161                 PMD_INIT_LOG(ERR, "No resource. ask:%u, available:%u",
 162                              num, pool->num_free);
 163                 return -ENOMEM;
 164         }
 165
 166         valid_entry = NULL;
 167         /* Lookup  in free list and find most fit one */
 168         LIST_FOREACH(entry, &pool->free_list, next) {
 169                 if (entry->len >= num) {
 170                         /* Find best one */
 171                         if (entry->len == num) {
 172                                 valid_entry = entry;
 173                                 break;
 174                         }
 175                         if (!valid_entry ||
 176                             valid_entry->len > entry->len)
 177                                 valid_entry = entry;
 178                 }
 179         }
 180
 181         /* Not find one to satisfy the request, return */
 182         if (!valid_entry) {
 183                 PMD_INIT_LOG(ERR, "No valid entry found");
 184                 return -ENOMEM;
 185         }
 186         /**
 187          * The entry have equal queue number as requested,
 188          * remove it from alloc_list.
 189          */
 190         if (valid_entry->len == num) {
 191                 LIST_REMOVE(valid_entry, next);
 192         } else {
 193                 /**
 194                  * The entry have more numbers than requested,
 195                  * create a new entry for alloc_list and minus its
 196                  * queue base and number in free_list.
 197                  */
 198                 entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 199                 if (!entry) {
 200                         PMD_INIT_LOG(ERR,
 201                                      "Failed to allocate memory for "
 202                                      "resource pool");
 203                         return -ENOMEM;
 204                 }
 205                 entry->base = valid_entry->base;
 206                 entry->len = num;
 207                 valid_entry->base += num;
 208                 valid_entry->len -= num;
 209                 valid_entry = entry;
 210         }
 211
 212         /* Insert it into alloc list, not sorted */
 213         LIST_INSERT_HEAD(&pool->alloc_list, valid_entry, next);
 214
 215         pool->num_free -= valid_entry->len;
 216         pool->num_alloc += valid_entry->len;
 217
 218         return valid_entry->base + pool->base;
 219 }
 220
 221 static void
 222 ice_res_pool_destroy(struct ice_res_pool_info *pool)
 223 {
 224         struct pool_entry *entry, *next_entry;
 225
 226         if (!pool)
 227                 return;
 228
 229         for (entry = LIST_FIRST(&pool->alloc_list);
 230              entry && (next_entry = LIST_NEXT(entry, next), 1);
 231              entry = next_entry) {
 232                 LIST_REMOVE(entry, next);
 233                 rte_free(entry);
 234         }
 235
 236         for (entry = LIST_FIRST(&pool->free_list);
 237              entry && (next_entry = LIST_NEXT(entry, next), 1);
 238              entry = next_entry) {
 239                 LIST_REMOVE(entry, next);
 240                 rte_free(entry);
 241         }
 242
 243         pool->num_free = 0;
 244         pool->num_alloc = 0;
 245         pool->base = 0;
 246         LIST_INIT(&pool->alloc_list);
 247         LIST_INIT(&pool->free_list);
 248 }
 249
 250 static void
 251 ice_vsi_config_default_rss(struct ice_aqc_vsi_props *info)
 252 {
 253         /* Set VSI LUT selection */
 254         info->q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI &
 255                           ICE_AQ_VSI_Q_OPT_RSS_LUT_M;
 256         /* Set Hash scheme */
 257         info->q_opt_rss |= ICE_AQ_VSI_Q_OPT_RSS_TPLZ &
 258                            ICE_AQ_VSI_Q_OPT_RSS_HASH_M;
 259         /* enable TC */
 260         info->q_opt_tc = ICE_AQ_VSI_Q_OPT_TC_OVR_M;
 261 }
 262
 263 static enum ice_status
 264 ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi,
 265                                 struct ice_aqc_vsi_props *info,
 266                                 uint8_t enabled_tcmap)
 267 {
 268         uint16_t bsf, qp_idx;
 269
 270         /* default tc 0 now. Multi-TC supporting need to be done later.
 271          * Configure TC and queue mapping parameters, for enabled TC,
 272          * allocate qpnum_per_tc queues to this traffic.
 273          */
 274         if (enabled_tcmap != 0x01) {
 275                 PMD_INIT_LOG(ERR, "only TC0 is supported");
 276                 return -ENOTSUP;
 277         }
 278
 279         vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC);
 280         bsf = rte_bsf32(vsi->nb_qps);
 281         /* Adjust the queue number to actual queues that can be applied */
 282         vsi->nb_qps = 0x1 << bsf;
 283
 284         qp_idx = 0;
 285         /* Set tc and queue mapping with VSI */
 286         info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx <<
 287                                                 ICE_AQ_VSI_TC_Q_OFFSET_S) |
 288                                                (bsf << ICE_AQ_VSI_TC_Q_NUM_S));
 289
 290         /* Associate queue number with VSI */
 291         info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG);
 292         info->q_mapping[0] = rte_cpu_to_le_16(vsi->base_queue);
 293         info->q_mapping[1] = rte_cpu_to_le_16(vsi->nb_qps);
 294         info->valid_sections |=
 295                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
 296         /* Set the info.ingress_table and info.egress_table
 297          * for UP translate table. Now just set it to 1:1 map by default
 298          * -- 0b 111 110 101 100 011 010 001 000 == 0xFAC688
 299          */
 300 #define ICE_TC_QUEUE_TABLE_DFLT 0x00FAC688
 301         info->ingress_table  = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 302         info->egress_table   = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 303         info->outer_up_table = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 304         return 0;
 305 }
 306
 307 static int
 308 ice_init_mac_address(struct rte_eth_dev *dev)
 309 {
 310         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 311
 312         if (!is_unicast_ether_addr
 313                 ((struct ether_addr *)hw->port_info[0].mac.lan_addr)) {
 314                 PMD_INIT_LOG(ERR, "Invalid MAC address");
 315                 return -EINVAL;
 316         }
 317
 318         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.lan_addr,
 319                         (struct ether_addr *)hw->port_info[0].mac.perm_addr);
 320
 321         dev->data->mac_addrs = rte_zmalloc(NULL, sizeof(struct ether_addr), 0);
 322         if (!dev->data->mac_addrs) {
 323                 PMD_INIT_LOG(ERR,
 324                              "Failed to allocate memory to store mac address");
 325                 return -ENOMEM;
 326         }
 327         /* store it to dev data */
 328         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.perm_addr,
 329                         &dev->data->mac_addrs[0]);
 330         return 0;
 331 }
 332
 333 /*  Initialize SW parameters of PF */
 334 static int
 335 ice_pf_sw_init(struct rte_eth_dev *dev)
 336 {
 337         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 338         struct ice_hw *hw = ICE_PF_TO_HW(pf);
 339
 340         if (ice_config_max_queue_pair_num(dev->device->devargs) > 0)
 341                 pf->lan_nb_qp_max =
 342                         ice_config_max_queue_pair_num(dev->device->devargs);
 343         else
 344                 pf->lan_nb_qp_max =
 345                         (uint16_t)RTE_MIN(hw->func_caps.common_cap.num_txq,
 346                                           hw->func_caps.common_cap.num_rxq);
 347
 348         pf->lan_nb_qps = pf->lan_nb_qp_max;
 349
 350         return 0;
 351 }
 352
 353 static struct ice_vsi *
 354 ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type)
 355 {
 356         struct ice_hw *hw = ICE_PF_TO_HW(pf);
 357         struct ice_vsi *vsi = NULL;
 358         struct ice_vsi_ctx vsi_ctx;
 359         int ret;
 360         uint16_t max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
 361         uint8_t tc_bitmap = 0x1;
 362
 363         /* hw->num_lports = 1 in NIC mode */
 364         vsi = rte_zmalloc(NULL, sizeof(struct ice_vsi), 0);
 365         if (!vsi)
 366                 return NULL;
 367
 368         vsi->idx = pf->next_vsi_idx;
 369         pf->next_vsi_idx++;
 370         vsi->type = type;
 371         vsi->adapter = ICE_PF_TO_ADAPTER(pf);
 372         vsi->max_macaddrs = ICE_NUM_MACADDR_MAX;
 373         vsi->vlan_anti_spoof_on = 0;
 374         vsi->vlan_filter_on = 1;
 375         TAILQ_INIT(&vsi->mac_list);
 376         TAILQ_INIT(&vsi->vlan_list);
 377
 378         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
 379         /* base_queue in used in queue mapping of VSI add/update command.
 380          * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ
 381          * cases in the first stage. Only Main VSI.
 382          */
 383         vsi->base_queue = 0;
 384         switch (type) {
 385         case ICE_VSI_PF:
 386                 vsi->nb_qps = pf->lan_nb_qps;
 387                 ice_vsi_config_default_rss(&vsi_ctx.info);
 388                 vsi_ctx.alloc_from_pool = true;
 389                 vsi_ctx.flags = ICE_AQ_VSI_TYPE_PF;
 390                 /* switch_id is queried by get_switch_config aq, which is done
 391                  * by ice_init_hw
 392                  */
 393                 vsi_ctx.info.sw_id = hw->port_info->sw_id;
 394                 vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
 395                 /* Allow all untagged or tagged packets */
 396                 vsi_ctx.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
 397                 vsi_ctx.info.vlan_flags |= ICE_AQ_VSI_VLAN_EMOD_NOTHING;
 398                 vsi_ctx.info.q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF |
 399                                          ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
 400                 /* Enable VLAN/UP trip */
 401                 ret = ice_vsi_config_tc_queue_mapping(vsi,
 402                                                       &vsi_ctx.info,
 403                                                       ICE_DEFAULT_TCMAP);
 404                 if (ret) {
 405                         PMD_INIT_LOG(ERR,
 406                                      "tc queue mapping with vsi failed, "
 407                                      "err = %d",
 408                                      ret);
 409                         goto fail_mem;
 410                 }
 411
 412                 break;
 413         default:
 414                 /* for other types of VSI */
 415                 PMD_INIT_LOG(ERR, "other types of VSI not supported");
 416                 goto fail_mem;
 417         }
 418
 419         /* VF has MSIX interrupt in VF range, don't allocate here */
 420         if (type == ICE_VSI_PF) {
 421                 ret = ice_res_pool_alloc(&pf->msix_pool,
 422                                          RTE_MIN(vsi->nb_qps,
 423                                                  RTE_MAX_RXTX_INTR_VEC_ID));
 424                 if (ret < 0) {
 425                         PMD_INIT_LOG(ERR, "VSI MAIN %d get heap failed %d",
 426                                      vsi->vsi_id, ret);
 427                 }
 428                 vsi->msix_intr = ret;
 429                 vsi->nb_msix = RTE_MIN(vsi->nb_qps, RTE_MAX_RXTX_INTR_VEC_ID);
 430         } else {
 431                 vsi->msix_intr = 0;
 432                 vsi->nb_msix = 0;
 433         }
 434         ret = ice_add_vsi(hw, vsi->idx, &vsi_ctx, NULL);
 435         if (ret != ICE_SUCCESS) {
 436                 PMD_INIT_LOG(ERR, "add vsi failed, err = %d", ret);
 437                 goto fail_mem;
 438         }
 439         /* store vsi information is SW structure */
 440         vsi->vsi_id = vsi_ctx.vsi_num;
 441         vsi->info = vsi_ctx.info;
 442         pf->vsis_allocated = vsi_ctx.vsis_allocd;
 443         pf->vsis_unallocated = vsi_ctx.vsis_unallocated;
 444
 445         /* At the beginning, only TC0. */
 446         /* What we need here is the maximam number of the TX queues.
 447          * Currently vsi->nb_qps means it.
 448          * Correct it if any change.
 449          */
 450         max_txqs[0] = vsi->nb_qps;
 451         ret = ice_cfg_vsi_lan(hw->port_info, vsi->idx,
 452                               tc_bitmap, max_txqs);
 453         if (ret != ICE_SUCCESS)
 454                 PMD_INIT_LOG(ERR, "Failed to config vsi sched");
 455
 456         return vsi;
 457 fail_mem:
 458         rte_free(vsi);
 459         pf->next_vsi_idx--;
 460         return NULL;
 461 }
 462
 463 static int
 464 ice_pf_setup(struct ice_pf *pf)
 465 {
 466         struct ice_vsi *vsi;
 467
 468         /* Clear all stats counters */
 469         pf->offset_loaded = FALSE;
 470         memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats));
 471         memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats));
 472         memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats));
 473         memset(&pf->internal_stats_offset, 0, sizeof(struct ice_eth_stats));
 474
 475         vsi = ice_setup_vsi(pf, ICE_VSI_PF);
 476         if (!vsi) {
 477                 PMD_INIT_LOG(ERR, "Failed to add vsi for PF");
 478                 return -EINVAL;
 479         }
 480
 481         pf->main_vsi = vsi;
 482
 483         return 0;
 484 }
 485
 486 static int
 487 ice_dev_init(struct rte_eth_dev *dev)
 488 {
 489         struct rte_pci_device *pci_dev;
 490         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 491         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 492         int ret;
 493
 494         dev->dev_ops = &ice_eth_dev_ops;
 495
 496         pci_dev = RTE_DEV_TO_PCI(dev->device);
 497
 498         pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 499         pf->adapter->eth_dev = dev;
 500         pf->dev_data = dev->data;
 501         hw->back = pf->adapter;
 502         hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr;
 503         hw->vendor_id = pci_dev->id.vendor_id;
 504         hw->device_id = pci_dev->id.device_id;
 505         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
 506         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
 507         hw->bus.device = pci_dev->addr.devid;
 508         hw->bus.func = pci_dev->addr.function;
 509
 510         ice_init_controlq_parameter(hw);
 511
 512         ret = ice_init_hw(hw);
 513         if (ret) {
 514                 PMD_INIT_LOG(ERR, "Failed to initialize HW");
 515                 return -EINVAL;
 516         }
 517
 518         PMD_INIT_LOG(INFO, "FW %d.%d.%05d API %d.%d",
 519                      hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
 520                      hw->api_maj_ver, hw->api_min_ver);
 521
 522         ice_pf_sw_init(dev);
 523         ret = ice_init_mac_address(dev);
 524         if (ret) {
 525                 PMD_INIT_LOG(ERR, "Failed to initialize mac address");
 526                 goto err_init_mac;
 527         }
 528
 529         ret = ice_res_pool_init(&pf->msix_pool, 1,
 530                                 hw->func_caps.common_cap.num_msix_vectors - 1);
 531         if (ret) {
 532                 PMD_INIT_LOG(ERR, "Failed to init MSIX pool");
 533                 goto err_msix_pool_init;
 534         }
 535
 536         ret = ice_pf_setup(pf);
 537         if (ret) {
 538                 PMD_INIT_LOG(ERR, "Failed to setup PF");
 539                 goto err_pf_setup;
 540         }
 541
 542         return 0;
 543
 544 err_pf_setup:
 545         ice_res_pool_destroy(&pf->msix_pool);
 546 err_msix_pool_init:
 547         rte_free(dev->data->mac_addrs);
 548 err_init_mac:
 549         ice_sched_cleanup_all(hw);
 550         rte_free(hw->port_info);
 551         ice_shutdown_all_ctrlq(hw);
 552
 553         return ret;
 554 }
 555
 556 static int
 557 ice_release_vsi(struct ice_vsi *vsi)
 558 {
 559         struct ice_hw *hw;
 560         struct ice_vsi_ctx vsi_ctx;
 561         enum ice_status ret;
 562
 563         if (!vsi)
 564                 return 0;
 565
 566         hw = ICE_VSI_TO_HW(vsi);
 567
 568         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
 569
 570         vsi_ctx.vsi_num = vsi->vsi_id;
 571         vsi_ctx.info = vsi->info;
 572         ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
 573         if (ret != ICE_SUCCESS) {
 574                 PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
 575                 rte_free(vsi);
 576                 return -1;
 577         }
 578
 579         rte_free(vsi);
 580         return 0;
 581 }
 582
 583 static void
 584 ice_dev_stop(struct rte_eth_dev *dev)
 585 {
 586         struct rte_eth_dev_data *data = dev->data;
 587         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 588         uint16_t i;
 589
 590         /* avoid stopping again */
 591         if (pf->adapter_stopped)
 592                 return;
 593
 594         /* stop and clear all Rx queues */
 595         for (i = 0; i < data->nb_rx_queues; i++)
 596                 ice_rx_queue_stop(dev, i);
 597
 598         /* stop and clear all Tx queues */
 599         for (i = 0; i < data->nb_tx_queues; i++)
 600                 ice_tx_queue_stop(dev, i);
 601
 602         /* Clear all queues and release mbufs */
 603         ice_clear_queues(dev);
 604
 605         pf->adapter_stopped = true;
 606 }
 607
 608 static void
 609 ice_dev_close(struct rte_eth_dev *dev)
 610 {
 611         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 612         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 613
 614         ice_dev_stop(dev);
 615
 616         /* release all queue resource */
 617         ice_free_queues(dev);
 618
 619         ice_res_pool_destroy(&pf->msix_pool);
 620         ice_release_vsi(pf->main_vsi);
 621
 622         ice_shutdown_all_ctrlq(hw);
 623 }
 624
 625 static int
 626 ice_dev_uninit(struct rte_eth_dev *dev)
 627 {
 628         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 629         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 630
 631         ice_dev_close(dev);
 632
 633         dev->dev_ops = NULL;
 634         dev->rx_pkt_burst = NULL;
 635         dev->tx_pkt_burst = NULL;
 636
 637         rte_free(dev->data->mac_addrs);
 638         dev->data->mac_addrs = NULL;
 639
 640         ice_release_vsi(pf->main_vsi);
 641         ice_sched_cleanup_all(hw);
 642         rte_free(hw->port_info);
 643         ice_shutdown_all_ctrlq(hw);
 644
 645         return 0;
 646 }
 647
 648 static int
 649 ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
 650 {
 651         struct ice_adapter *ad =
 652                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 653
 654         /* Initialize to TRUE. If any of Rx queues doesn't meet the
 655          * bulk allocation or vector Rx preconditions we will reset it.
 656          */
 657         ad->rx_bulk_alloc_allowed = true;
 658         ad->tx_simple_allowed = true;
 659
 660         return 0;
 661 }
 662
 663 static int ice_init_rss(struct ice_pf *pf)
 664 {
 665         struct ice_hw *hw = ICE_PF_TO_HW(pf);
 666         struct ice_vsi *vsi = pf->main_vsi;
 667         struct rte_eth_dev *dev = pf->adapter->eth_dev;
 668         struct rte_eth_rss_conf *rss_conf;
 669         struct ice_aqc_get_set_rss_keys key;
 670         uint16_t i, nb_q;
 671         int ret = 0;
 672
 673         rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
 674         nb_q = dev->data->nb_rx_queues;
 675         vsi->rss_key_size = ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE;
 676         vsi->rss_lut_size = hw->func_caps.common_cap.rss_table_size;
 677
 678         if (!vsi->rss_key)
 679                 vsi->rss_key = rte_zmalloc(NULL,
 680                                            vsi->rss_key_size, 0);
 681         if (!vsi->rss_lut)
 682                 vsi->rss_lut = rte_zmalloc(NULL,
 683                                            vsi->rss_lut_size, 0);
 684
 685         /* configure RSS key */
 686         if (!rss_conf->rss_key) {
 687                 /* Calculate the default hash key */
 688                 for (i = 0; i <= vsi->rss_key_size; i++)
 689                         vsi->rss_key[i] = (uint8_t)rte_rand();
 690         } else {
 691                 rte_memcpy(vsi->rss_key, rss_conf->rss_key,
 692                            RTE_MIN(rss_conf->rss_key_len,
 693                                    vsi->rss_key_size));
 694         }
 695         rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
 696         ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
 697         if (ret)
 698                 return -EINVAL;
 699
 700         /* init RSS LUT table */
 701         for (i = 0; i < vsi->rss_lut_size; i++)
 702                 vsi->rss_lut[i] = i % nb_q;
 703
 704         ret = ice_aq_set_rss_lut(hw, vsi->idx,
 705                                  ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
 706                                  vsi->rss_lut, vsi->rss_lut_size);
 707         if (ret)
 708                 return -EINVAL;
 709
 710         return 0;
 711 }
 712
 713 static int
 714 ice_dev_start(struct rte_eth_dev *dev)
 715 {
 716         struct rte_eth_dev_data *data = dev->data;
 717         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 718         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 719         uint16_t nb_rxq = 0;
 720         uint16_t nb_txq, i;
 721         int ret;
 722
 723         /* program Tx queues' context in hardware */
 724         for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
 725                 ret = ice_tx_queue_start(dev, nb_txq);
 726                 if (ret) {
 727                         PMD_DRV_LOG(ERR, "fail to start Tx queue %u", nb_txq);
 728                         goto tx_err;
 729                 }
 730         }
 731
 732         /* program Rx queues' context in hardware*/
 733         for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
 734                 ret = ice_rx_queue_start(dev, nb_rxq);
 735                 if (ret) {
 736                         PMD_DRV_LOG(ERR, "fail to start Rx queue %u", nb_rxq);
 737                         goto rx_err;
 738                 }
 739         }
 740
 741         ret = ice_init_rss(pf);
 742         if (ret) {
 743                 PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
 744                 goto rx_err;
 745         }
 746
 747         ret = ice_aq_set_event_mask(hw, hw->port_info->lport,
 748                                     ((u16)(ICE_AQ_LINK_EVENT_LINK_FAULT |
 749                                      ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM |
 750                                      ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS |
 751                                      ICE_AQ_LINK_EVENT_SIGNAL_DETECT |
 752                                      ICE_AQ_LINK_EVENT_AN_COMPLETED |
 753                                      ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED)),
 754                                      NULL);
 755         if (ret != ICE_SUCCESS)
 756                 PMD_DRV_LOG(WARNING, "Fail to set phy mask");
 757
 758         pf->adapter_stopped = false;
 759
 760         return 0;
 761
 762         /* stop the started queues if failed to start all queues */
 763 rx_err:
 764         for (i = 0; i < nb_rxq; i++)
 765                 ice_rx_queue_stop(dev, i);
 766 tx_err:
 767         for (i = 0; i < nb_txq; i++)
 768                 ice_tx_queue_stop(dev, i);
 769
 770         return -EIO;
 771 }
 772
 773 static int
 774 ice_dev_reset(struct rte_eth_dev *dev)
 775 {
 776         int ret;
 777
 778         if (dev->data->sriov.active)
 779                 return -ENOTSUP;
 780
 781         ret = ice_dev_uninit(dev);
 782         if (ret) {
 783                 PMD_INIT_LOG(ERR, "failed to uninit device, status = %d", ret);
 784                 return -ENXIO;
 785         }
 786
 787         ret = ice_dev_init(dev);
 788         if (ret) {
 789                 PMD_INIT_LOG(ERR, "failed to init device, status = %d", ret);
 790                 return -ENXIO;
 791         }
 792
 793         return 0;
 794 }
 795
 796 static void
 797 ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 798 {
 799         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 800         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 801         struct ice_vsi *vsi = pf->main_vsi;
 802         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 803
 804         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
 805         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
 806         dev_info->max_rx_queues = vsi->nb_qps;
 807         dev_info->max_tx_queues = vsi->nb_qps;
 808         dev_info->max_mac_addrs = vsi->max_macaddrs;
 809         dev_info->max_vfs = pci_dev->max_vfs;
 810
 811         dev_info->rx_offload_capa =
 812                 DEV_RX_OFFLOAD_VLAN_STRIP |
 813                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 814                 DEV_RX_OFFLOAD_UDP_CKSUM |
 815                 DEV_RX_OFFLOAD_TCP_CKSUM |
 816                 DEV_RX_OFFLOAD_QINQ_STRIP |
 817                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
 818                 DEV_RX_OFFLOAD_VLAN_EXTEND |
 819                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 820                 DEV_RX_OFFLOAD_KEEP_CRC |
 821                 DEV_RX_OFFLOAD_SCATTER |
 822                 DEV_RX_OFFLOAD_VLAN_FILTER;
 823         dev_info->tx_offload_capa =
 824                 DEV_TX_OFFLOAD_VLAN_INSERT |
 825                 DEV_TX_OFFLOAD_QINQ_INSERT |
 826                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 827                 DEV_TX_OFFLOAD_UDP_CKSUM |
 828                 DEV_TX_OFFLOAD_TCP_CKSUM |
 829                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 830                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 831                 DEV_TX_OFFLOAD_TCP_TSO |
 832                 DEV_TX_OFFLOAD_MULTI_SEGS |
 833                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 834         dev_info->rx_queue_offload_capa = 0;
 835         dev_info->tx_queue_offload_capa = 0;
 836
 837         dev_info->reta_size = hw->func_caps.common_cap.rss_table_size;
 838         dev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
 839         dev_info->flow_type_rss_offloads = ICE_RSS_OFFLOAD_ALL;
 840
 841         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 842                 .rx_thresh = {
 843                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
 844                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
 845                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
 846                 },
 847                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
 848                 .rx_drop_en = 0,
 849                 .offloads = 0,
 850         };
 851
 852         dev_info->default_txconf = (struct rte_eth_txconf) {
 853                 .tx_thresh = {
 854                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
 855                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
 856                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
 857                 },
 858                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
 859                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
 860                 .offloads = 0,
 861         };
 862
 863         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 864                 .nb_max = ICE_MAX_RING_DESC,
 865                 .nb_min = ICE_MIN_RING_DESC,
 866                 .nb_align = ICE_ALIGN_RING_DESC,
 867         };
 868
 869         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 870                 .nb_max = ICE_MAX_RING_DESC,
 871                 .nb_min = ICE_MIN_RING_DESC,
 872                 .nb_align = ICE_ALIGN_RING_DESC,
 873         };
 874
 875         dev_info->speed_capa = ETH_LINK_SPEED_10M |
 876                                ETH_LINK_SPEED_100M |
 877                                ETH_LINK_SPEED_1G |
 878                                ETH_LINK_SPEED_2_5G |
 879                                ETH_LINK_SPEED_5G |
 880                                ETH_LINK_SPEED_10G |
 881                                ETH_LINK_SPEED_20G |
 882                                ETH_LINK_SPEED_25G |
 883                                ETH_LINK_SPEED_40G;
 884
 885         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
 886         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
 887
 888         dev_info->default_rxportconf.burst_size = ICE_RX_MAX_BURST;
 889         dev_info->default_txportconf.burst_size = ICE_TX_MAX_BURST;
 890         dev_info->default_rxportconf.nb_queues = 1;
 891         dev_info->default_txportconf.nb_queues = 1;
 892         dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
 893         dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
 894 }
 895
 896 static int
 897 ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 898               struct rte_pci_device *pci_dev)
 899 {
 900         return rte_eth_dev_pci_generic_probe(pci_dev,
 901                                              sizeof(struct ice_adapter),
 902                                              ice_dev_init);
 903 }
 904
 905 static int
 906 ice_pci_remove(struct rte_pci_device *pci_dev)
 907 {
 908         return rte_eth_dev_pci_generic_remove(pci_dev, ice_dev_uninit);
 909 }
 910
 911 static struct rte_pci_driver rte_ice_pmd = {
 912         .id_table = pci_id_ice_map,
 913         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
 914                      RTE_PCI_DRV_IOVA_AS_VA,
 915         .probe = ice_pci_probe,
 916         .remove = ice_pci_remove,
 917 };
 918
 919 /**
 920  * Driver initialization routine.
 921  * Invoked once at EAL init time.
 922  * Register itself as the [Poll Mode] Driver of PCI devices.
 923  */
 924 RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
 925 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
 926 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
 927 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
 928                               ICE_MAX_QP_NUM "=<int>");
 929
 930 RTE_INIT(ice_init_log)
 931 {
 932         ice_logtype_init = rte_log_register("pmd.net.ice.init");
 933         if (ice_logtype_init >= 0)
 934                 rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
 935         ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
 936         if (ice_logtype_driver >= 0)
 937                 rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
 938 }