drivers/net/ice/ice_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #include <rte_ethdev_pci.h>
   6
   7 #include "base/ice_sched.h"
   8 #include "ice_ethdev.h"
   9 #include "ice_rxtx.h"
  10
  11 #define ICE_MAX_QP_NUM "max_queue_pair_num"
  12 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
  13
  14 int ice_logtype_init;
  15 int ice_logtype_driver;
  16
  17 static int ice_dev_configure(struct rte_eth_dev *dev);
  18 static int ice_dev_start(struct rte_eth_dev *dev);
  19 static void ice_dev_stop(struct rte_eth_dev *dev);
  20 static void ice_dev_close(struct rte_eth_dev *dev);
  21 static int ice_dev_reset(struct rte_eth_dev *dev);
  22 static void ice_dev_info_get(struct rte_eth_dev *dev,
  23                              struct rte_eth_dev_info *dev_info);
  24 static int ice_link_update(struct rte_eth_dev *dev,
  25                            int wait_to_complete);
  26 static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  27 static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  28 static int ice_vlan_tpid_set(struct rte_eth_dev *dev,
  29                              enum rte_vlan_type vlan_type,
  30                              uint16_t tpid);
  31 static int ice_rss_reta_update(struct rte_eth_dev *dev,
  32                                struct rte_eth_rss_reta_entry64 *reta_conf,
  33                                uint16_t reta_size);
  34 static int ice_rss_reta_query(struct rte_eth_dev *dev,
  35                               struct rte_eth_rss_reta_entry64 *reta_conf,
  36                               uint16_t reta_size);
  37 static int ice_rss_hash_update(struct rte_eth_dev *dev,
  38                                struct rte_eth_rss_conf *rss_conf);
  39 static int ice_rss_hash_conf_get(struct rte_eth_dev *dev,
  40                                  struct rte_eth_rss_conf *rss_conf);
  41 static int ice_vlan_filter_set(struct rte_eth_dev *dev,
  42                                uint16_t vlan_id,
  43                                int on);
  44 static int ice_macaddr_set(struct rte_eth_dev *dev,
  45                            struct ether_addr *mac_addr);
  46 static int ice_macaddr_add(struct rte_eth_dev *dev,
  47                            struct ether_addr *mac_addr,
  48                            __rte_unused uint32_t index,
  49                            uint32_t pool);
  50 static void ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index);
  51 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
  52                                     uint16_t queue_id);
  53 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
  54                                      uint16_t queue_id);
  55 static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  56                               size_t fw_size);
  57 static int ice_vlan_pvid_set(struct rte_eth_dev *dev,
  58                              uint16_t pvid, int on);
  59 static int ice_get_eeprom_length(struct rte_eth_dev *dev);
  60 static int ice_get_eeprom(struct rte_eth_dev *dev,
  61                           struct rte_dev_eeprom_info *eeprom);
  62
  63 static const struct rte_pci_id pci_id_ice_map[] = {
  64         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
  65         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
  66         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
  67         { .vendor_id = 0, /* sentinel */ },
  68 };
  69
  70 static const struct eth_dev_ops ice_eth_dev_ops = {
  71         .dev_configure                = ice_dev_configure,
  72         .dev_start                    = ice_dev_start,
  73         .dev_stop                     = ice_dev_stop,
  74         .dev_close                    = ice_dev_close,
  75         .dev_reset                    = ice_dev_reset,
  76         .rx_queue_start               = ice_rx_queue_start,
  77         .rx_queue_stop                = ice_rx_queue_stop,
  78         .tx_queue_start               = ice_tx_queue_start,
  79         .tx_queue_stop                = ice_tx_queue_stop,
  80         .rx_queue_setup               = ice_rx_queue_setup,
  81         .rx_queue_release             = ice_rx_queue_release,
  82         .tx_queue_setup               = ice_tx_queue_setup,
  83         .tx_queue_release             = ice_tx_queue_release,
  84         .dev_infos_get                = ice_dev_info_get,
  85         .dev_supported_ptypes_get     = ice_dev_supported_ptypes_get,
  86         .link_update                  = ice_link_update,
  87         .mtu_set                      = ice_mtu_set,
  88         .mac_addr_set                 = ice_macaddr_set,
  89         .mac_addr_add                 = ice_macaddr_add,
  90         .mac_addr_remove              = ice_macaddr_remove,
  91         .vlan_filter_set              = ice_vlan_filter_set,
  92         .vlan_offload_set             = ice_vlan_offload_set,
  93         .vlan_tpid_set                = ice_vlan_tpid_set,
  94         .reta_update                  = ice_rss_reta_update,
  95         .reta_query                   = ice_rss_reta_query,
  96         .rss_hash_update              = ice_rss_hash_update,
  97         .rss_hash_conf_get            = ice_rss_hash_conf_get,
  98         .rx_queue_intr_enable         = ice_rx_queue_intr_enable,
  99         .rx_queue_intr_disable        = ice_rx_queue_intr_disable,
 100         .fw_version_get               = ice_fw_version_get,
 101         .vlan_pvid_set                = ice_vlan_pvid_set,
 102         .rxq_info_get                 = ice_rxq_info_get,
 103         .txq_info_get                 = ice_txq_info_get,
 104         .get_eeprom_length            = ice_get_eeprom_length,
 105         .get_eeprom                   = ice_get_eeprom,
 106         .rx_queue_count               = ice_rx_queue_count,
 107 };
 108
 109 static void
 110 ice_init_controlq_parameter(struct ice_hw *hw)
 111 {
 112         /* fields for adminq */
 113         hw->adminq.num_rq_entries = ICE_ADMINQ_LEN;
 114         hw->adminq.num_sq_entries = ICE_ADMINQ_LEN;
 115         hw->adminq.rq_buf_size = ICE_ADMINQ_BUF_SZ;
 116         hw->adminq.sq_buf_size = ICE_ADMINQ_BUF_SZ;
 117
 118         /* fields for mailboxq, DPDK used as PF host */
 119         hw->mailboxq.num_rq_entries = ICE_MAILBOXQ_LEN;
 120         hw->mailboxq.num_sq_entries = ICE_MAILBOXQ_LEN;
 121         hw->mailboxq.rq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 122         hw->mailboxq.sq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 123 }
 124
 125 static int
 126 ice_check_qp_num(const char *key, const char *qp_value,
 127                  __rte_unused void *opaque)
 128 {
 129         char *end = NULL;
 130         int num = 0;
 131
 132         while (isblank(*qp_value))
 133                 qp_value++;
 134
 135         num = strtoul(qp_value, &end, 10);
 136
 137         if (!num || (*end == '-') || errno) {
 138                 PMD_DRV_LOG(WARNING, "invalid value:\"%s\" for key:\"%s\", "
 139                             "value must be > 0",
 140                             qp_value, key);
 141                 return -1;
 142         }
 143
 144         return num;
 145 }
 146
 147 static int
 148 ice_config_max_queue_pair_num(struct rte_devargs *devargs)
 149 {
 150         struct rte_kvargs *kvlist;
 151         const char *queue_num_key = ICE_MAX_QP_NUM;
 152         int ret;
 153
 154         if (!devargs)
 155                 return 0;
 156
 157         kvlist = rte_kvargs_parse(devargs->args, NULL);
 158         if (!kvlist)
 159                 return 0;
 160
 161         if (!rte_kvargs_count(kvlist, queue_num_key)) {
 162                 rte_kvargs_free(kvlist);
 163                 return 0;
 164         }
 165
 166         if (rte_kvargs_process(kvlist, queue_num_key,
 167                                ice_check_qp_num, NULL) < 0) {
 168                 rte_kvargs_free(kvlist);
 169                 return 0;
 170         }
 171         ret = rte_kvargs_process(kvlist, queue_num_key,
 172                                  ice_check_qp_num, NULL);
 173         rte_kvargs_free(kvlist);
 174
 175         return ret;
 176 }
 177
 178 static int
 179 ice_res_pool_init(struct ice_res_pool_info *pool, uint32_t base,
 180                   uint32_t num)
 181 {
 182         struct pool_entry *entry;
 183
 184         if (!pool || !num)
 185                 return -EINVAL;
 186
 187         entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 188         if (!entry) {
 189                 PMD_INIT_LOG(ERR,
 190                              "Failed to allocate memory for resource pool");
 191                 return -ENOMEM;
 192         }
 193
 194         /* queue heap initialize */
 195         pool->num_free = num;
 196         pool->num_alloc = 0;
 197         pool->base = base;
 198         LIST_INIT(&pool->alloc_list);
 199         LIST_INIT(&pool->free_list);
 200
 201         /* Initialize element  */
 202         entry->base = 0;
 203         entry->len = num;
 204
 205         LIST_INSERT_HEAD(&pool->free_list, entry, next);
 206         return 0;
 207 }
 208
 209 static int
 210 ice_res_pool_alloc(struct ice_res_pool_info *pool,
 211                    uint16_t num)
 212 {
 213         struct pool_entry *entry, *valid_entry;
 214
 215         if (!pool || !num) {
 216                 PMD_INIT_LOG(ERR, "Invalid parameter");
 217                 return -EINVAL;
 218         }
 219
 220         if (pool->num_free < num) {
 221                 PMD_INIT_LOG(ERR, "No resource. ask:%u, available:%u",
 222                              num, pool->num_free);
 223                 return -ENOMEM;
 224         }
 225
 226         valid_entry = NULL;
 227         /* Lookup  in free list and find most fit one */
 228         LIST_FOREACH(entry, &pool->free_list, next) {
 229                 if (entry->len >= num) {
 230                         /* Find best one */
 231                         if (entry->len == num) {
 232                                 valid_entry = entry;
 233                                 break;
 234                         }
 235                         if (!valid_entry ||
 236                             valid_entry->len > entry->len)
 237                                 valid_entry = entry;
 238                 }
 239         }
 240
 241         /* Not find one to satisfy the request, return */
 242         if (!valid_entry) {
 243                 PMD_INIT_LOG(ERR, "No valid entry found");
 244                 return -ENOMEM;
 245         }
 246         /**
 247          * The entry have equal queue number as requested,
 248          * remove it from alloc_list.
 249          */
 250         if (valid_entry->len == num) {
 251                 LIST_REMOVE(valid_entry, next);
 252         } else {
 253                 /**
 254                  * The entry have more numbers than requested,
 255                  * create a new entry for alloc_list and minus its
 256                  * queue base and number in free_list.
 257                  */
 258                 entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 259                 if (!entry) {
 260                         PMD_INIT_LOG(ERR,
 261                                      "Failed to allocate memory for "
 262                                      "resource pool");
 263                         return -ENOMEM;
 264                 }
 265                 entry->base = valid_entry->base;
 266                 entry->len = num;
 267                 valid_entry->base += num;
 268                 valid_entry->len -= num;
 269                 valid_entry = entry;
 270         }
 271
 272         /* Insert it into alloc list, not sorted */
 273         LIST_INSERT_HEAD(&pool->alloc_list, valid_entry, next);
 274
 275         pool->num_free -= valid_entry->len;
 276         pool->num_alloc += valid_entry->len;
 277
 278         return valid_entry->base + pool->base;
 279 }
 280
 281 static void
 282 ice_res_pool_destroy(struct ice_res_pool_info *pool)
 283 {
 284         struct pool_entry *entry, *next_entry;
 285
 286         if (!pool)
 287                 return;
 288
 289         for (entry = LIST_FIRST(&pool->alloc_list);
 290              entry && (next_entry = LIST_NEXT(entry, next), 1);
 291              entry = next_entry) {
 292                 LIST_REMOVE(entry, next);
 293                 rte_free(entry);
 294         }
 295
 296         for (entry = LIST_FIRST(&pool->free_list);
 297              entry && (next_entry = LIST_NEXT(entry, next), 1);
 298              entry = next_entry) {
 299                 LIST_REMOVE(entry, next);
 300                 rte_free(entry);
 301         }
 302
 303         pool->num_free = 0;
 304         pool->num_alloc = 0;
 305         pool->base = 0;
 306         LIST_INIT(&pool->alloc_list);
 307         LIST_INIT(&pool->free_list);
 308 }
 309
 310 static void
 311 ice_vsi_config_default_rss(struct ice_aqc_vsi_props *info)
 312 {
 313         /* Set VSI LUT selection */
 314         info->q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI &
 315                           ICE_AQ_VSI_Q_OPT_RSS_LUT_M;
 316         /* Set Hash scheme */
 317         info->q_opt_rss |= ICE_AQ_VSI_Q_OPT_RSS_TPLZ &
 318                            ICE_AQ_VSI_Q_OPT_RSS_HASH_M;
 319         /* enable TC */
 320         info->q_opt_tc = ICE_AQ_VSI_Q_OPT_TC_OVR_M;
 321 }
 322
 323 static enum ice_status
 324 ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi,
 325                                 struct ice_aqc_vsi_props *info,
 326                                 uint8_t enabled_tcmap)
 327 {
 328         uint16_t bsf, qp_idx;
 329
 330         /* default tc 0 now. Multi-TC supporting need to be done later.
 331          * Configure TC and queue mapping parameters, for enabled TC,
 332          * allocate qpnum_per_tc queues to this traffic.
 333          */
 334         if (enabled_tcmap != 0x01) {
 335                 PMD_INIT_LOG(ERR, "only TC0 is supported");
 336                 return -ENOTSUP;
 337         }
 338
 339         vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC);
 340         bsf = rte_bsf32(vsi->nb_qps);
 341         /* Adjust the queue number to actual queues that can be applied */
 342         vsi->nb_qps = 0x1 << bsf;
 343
 344         qp_idx = 0;
 345         /* Set tc and queue mapping with VSI */
 346         info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx <<
 347                                                 ICE_AQ_VSI_TC_Q_OFFSET_S) |
 348                                                (bsf << ICE_AQ_VSI_TC_Q_NUM_S));
 349
 350         /* Associate queue number with VSI */
 351         info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG);
 352         info->q_mapping[0] = rte_cpu_to_le_16(vsi->base_queue);
 353         info->q_mapping[1] = rte_cpu_to_le_16(vsi->nb_qps);
 354         info->valid_sections |=
 355                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
 356         /* Set the info.ingress_table and info.egress_table
 357          * for UP translate table. Now just set it to 1:1 map by default
 358          * -- 0b 111 110 101 100 011 010 001 000 == 0xFAC688
 359          */
 360 #define ICE_TC_QUEUE_TABLE_DFLT 0x00FAC688
 361         info->ingress_table  = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 362         info->egress_table   = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 363         info->outer_up_table = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 364         return 0;
 365 }
 366
 367 static int
 368 ice_init_mac_address(struct rte_eth_dev *dev)
 369 {
 370         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 371
 372         if (!is_unicast_ether_addr
 373                 ((struct ether_addr *)hw->port_info[0].mac.lan_addr)) {
 374                 PMD_INIT_LOG(ERR, "Invalid MAC address");
 375                 return -EINVAL;
 376         }
 377
 378         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.lan_addr,
 379                         (struct ether_addr *)hw->port_info[0].mac.perm_addr);
 380
 381         dev->data->mac_addrs = rte_zmalloc(NULL, sizeof(struct ether_addr), 0);
 382         if (!dev->data->mac_addrs) {
 383                 PMD_INIT_LOG(ERR,
 384                              "Failed to allocate memory to store mac address");
 385                 return -ENOMEM;
 386         }
 387         /* store it to dev data */
 388         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.perm_addr,
 389                         &dev->data->mac_addrs[0]);
 390         return 0;
 391 }
 392
 393 /* Find out specific MAC filter */
 394 static struct ice_mac_filter *
 395 ice_find_mac_filter(struct ice_vsi *vsi, struct ether_addr *macaddr)
 396 {
 397         struct ice_mac_filter *f;
 398
 399         TAILQ_FOREACH(f, &vsi->mac_list, next) {
 400                 if (is_same_ether_addr(macaddr, &f->mac_info.mac_addr))
 401                         return f;
 402         }
 403
 404         return NULL;
 405 }
 406
 407 static int
 408 ice_add_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 409 {
 410         struct ice_fltr_list_entry *m_list_itr = NULL;
 411         struct ice_mac_filter *f;
 412         struct LIST_HEAD_TYPE list_head;
 413         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 414         int ret = 0;
 415
 416         /* If it's added and configured, return */
 417         f = ice_find_mac_filter(vsi, mac_addr);
 418         if (f) {
 419                 PMD_DRV_LOG(INFO, "This MAC filter already exists.");
 420                 return 0;
 421         }
 422
 423         INIT_LIST_HEAD(&list_head);
 424
 425         m_list_itr = (struct ice_fltr_list_entry *)
 426                 ice_malloc(hw, sizeof(*m_list_itr));
 427         if (!m_list_itr) {
 428                 ret = -ENOMEM;
 429                 goto DONE;
 430         }
 431         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 432                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 433         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 434         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 435         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 436         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 437         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 438
 439         LIST_ADD(&m_list_itr->list_entry, &list_head);
 440
 441         /* Add the mac */
 442         ret = ice_add_mac(hw, &list_head);
 443         if (ret != ICE_SUCCESS) {
 444                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
 445                 ret = -EINVAL;
 446                 goto DONE;
 447         }
 448         /* Add the mac addr into mac list */
 449         f = rte_zmalloc(NULL, sizeof(*f), 0);
 450         if (!f) {
 451                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 452                 ret = -ENOMEM;
 453                 goto DONE;
 454         }
 455         rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN);
 456         TAILQ_INSERT_TAIL(&vsi->mac_list, f, next);
 457         vsi->mac_num++;
 458
 459         ret = 0;
 460
 461 DONE:
 462         rte_free(m_list_itr);
 463         return ret;
 464 }
 465
 466 static int
 467 ice_remove_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 468 {
 469         struct ice_fltr_list_entry *m_list_itr = NULL;
 470         struct ice_mac_filter *f;
 471         struct LIST_HEAD_TYPE list_head;
 472         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 473         int ret = 0;
 474
 475         /* Can't find it, return an error */
 476         f = ice_find_mac_filter(vsi, mac_addr);
 477         if (!f)
 478                 return -EINVAL;
 479
 480         INIT_LIST_HEAD(&list_head);
 481
 482         m_list_itr = (struct ice_fltr_list_entry *)
 483                 ice_malloc(hw, sizeof(*m_list_itr));
 484         if (!m_list_itr) {
 485                 ret = -ENOMEM;
 486                 goto DONE;
 487         }
 488         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 489                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 490         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 491         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 492         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 493         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 494         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 495
 496         LIST_ADD(&m_list_itr->list_entry, &list_head);
 497
 498         /* remove the mac filter */
 499         ret = ice_remove_mac(hw, &list_head);
 500         if (ret != ICE_SUCCESS) {
 501                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
 502                 ret = -EINVAL;
 503                 goto DONE;
 504         }
 505
 506         /* Remove the mac addr from mac list */
 507         TAILQ_REMOVE(&vsi->mac_list, f, next);
 508         rte_free(f);
 509         vsi->mac_num--;
 510
 511         ret = 0;
 512 DONE:
 513         rte_free(m_list_itr);
 514         return ret;
 515 }
 516
 517 /* Find out specific VLAN filter */
 518 static struct ice_vlan_filter *
 519 ice_find_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 520 {
 521         struct ice_vlan_filter *f;
 522
 523         TAILQ_FOREACH(f, &vsi->vlan_list, next) {
 524                 if (vlan_id == f->vlan_info.vlan_id)
 525                         return f;
 526         }
 527
 528         return NULL;
 529 }
 530
 531 static int
 532 ice_add_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 533 {
 534         struct ice_fltr_list_entry *v_list_itr = NULL;
 535         struct ice_vlan_filter *f;
 536         struct LIST_HEAD_TYPE list_head;
 537         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 538         int ret = 0;
 539
 540         if (!vsi || vlan_id > ETHER_MAX_VLAN_ID)
 541                 return -EINVAL;
 542
 543         /* If it's added and configured, return. */
 544         f = ice_find_vlan_filter(vsi, vlan_id);
 545         if (f) {
 546                 PMD_DRV_LOG(INFO, "This VLAN filter already exists.");
 547                 return 0;
 548         }
 549
 550         if (!vsi->vlan_anti_spoof_on && !vsi->vlan_filter_on)
 551                 return 0;
 552
 553         INIT_LIST_HEAD(&list_head);
 554
 555         v_list_itr = (struct ice_fltr_list_entry *)
 556                       ice_malloc(hw, sizeof(*v_list_itr));
 557         if (!v_list_itr) {
 558                 ret = -ENOMEM;
 559                 goto DONE;
 560         }
 561         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 562         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 563         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 564         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 565         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 566         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 567
 568         LIST_ADD(&v_list_itr->list_entry, &list_head);
 569
 570         /* Add the vlan */
 571         ret = ice_add_vlan(hw, &list_head);
 572         if (ret != ICE_SUCCESS) {
 573                 PMD_DRV_LOG(ERR, "Failed to add VLAN filter");
 574                 ret = -EINVAL;
 575                 goto DONE;
 576         }
 577
 578         /* Add vlan into vlan list */
 579         f = rte_zmalloc(NULL, sizeof(*f), 0);
 580         if (!f) {
 581                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 582                 ret = -ENOMEM;
 583                 goto DONE;
 584         }
 585         f->vlan_info.vlan_id = vlan_id;
 586         TAILQ_INSERT_TAIL(&vsi->vlan_list, f, next);
 587         vsi->vlan_num++;
 588
 589         ret = 0;
 590
 591 DONE:
 592         rte_free(v_list_itr);
 593         return ret;
 594 }
 595
 596 static int
 597 ice_remove_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 598 {
 599         struct ice_fltr_list_entry *v_list_itr = NULL;
 600         struct ice_vlan_filter *f;
 601         struct LIST_HEAD_TYPE list_head;
 602         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 603         int ret = 0;
 604
 605         /**
 606          * Vlan 0 is the generic filter for untagged packets
 607          * and can't be removed.
 608          */
 609         if (!vsi || vlan_id == 0 || vlan_id > ETHER_MAX_VLAN_ID)
 610                 return -EINVAL;
 611
 612         /* Can't find it, return an error */
 613         f = ice_find_vlan_filter(vsi, vlan_id);
 614         if (!f)
 615                 return -EINVAL;
 616
 617         INIT_LIST_HEAD(&list_head);
 618
 619         v_list_itr = (struct ice_fltr_list_entry *)
 620                       ice_malloc(hw, sizeof(*v_list_itr));
 621         if (!v_list_itr) {
 622                 ret = -ENOMEM;
 623                 goto DONE;
 624         }
 625
 626         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 627         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 628         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 629         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 630         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 631         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 632
 633         LIST_ADD(&v_list_itr->list_entry, &list_head);
 634
 635         /* remove the vlan filter */
 636         ret = ice_remove_vlan(hw, &list_head);
 637         if (ret != ICE_SUCCESS) {
 638                 PMD_DRV_LOG(ERR, "Failed to remove VLAN filter");
 639                 ret = -EINVAL;
 640                 goto DONE;
 641         }
 642
 643         /* Remove the vlan id from vlan list */
 644         TAILQ_REMOVE(&vsi->vlan_list, f, next);
 645         rte_free(f);
 646         vsi->vlan_num--;
 647
 648         ret = 0;
 649 DONE:
 650         rte_free(v_list_itr);
 651         return ret;
 652 }
 653
 654 static int
 655 ice_remove_all_mac_vlan_filters(struct ice_vsi *vsi)
 656 {
 657         struct ice_mac_filter *m_f;
 658         struct ice_vlan_filter *v_f;
 659         int ret = 0;
 660
 661         if (!vsi || !vsi->mac_num)
 662                 return -EINVAL;
 663
 664         TAILQ_FOREACH(m_f, &vsi->mac_list, next) {
 665                 ret = ice_remove_mac_filter(vsi, &m_f->mac_info.mac_addr);
 666                 if (ret != ICE_SUCCESS) {
 667                         ret = -EINVAL;
 668                         goto DONE;
 669                 }
 670         }
 671
 672         if (vsi->vlan_num == 0)
 673                 return 0;
 674
 675         TAILQ_FOREACH(v_f, &vsi->vlan_list, next) {
 676                 ret = ice_remove_vlan_filter(vsi, v_f->vlan_info.vlan_id);
 677                 if (ret != ICE_SUCCESS) {
 678                         ret = -EINVAL;
 679                         goto DONE;
 680                 }
 681         }
 682
 683 DONE:
 684         return ret;
 685 }
 686
 687 static int
 688 ice_vsi_config_qinq_insertion(struct ice_vsi *vsi, bool on)
 689 {
 690         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 691         struct ice_vsi_ctx ctxt;
 692         uint8_t qinq_flags;
 693         int ret = 0;
 694
 695         /* Check if it has been already on or off */
 696         if (vsi->info.valid_sections &
 697                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 698                 if (on) {
 699                         if ((vsi->info.outer_tag_flags &
 700                              ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST) ==
 701                             ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST)
 702                                 return 0; /* already on */
 703                 } else {
 704                         if (!(vsi->info.outer_tag_flags &
 705                               ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST))
 706                                 return 0; /* already off */
 707                 }
 708         }
 709
 710         if (on)
 711                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST;
 712         else
 713                 qinq_flags = 0;
 714         /* clear global insertion and use per packet insertion */
 715         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_INSERT);
 716         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST);
 717         vsi->info.outer_tag_flags |= qinq_flags;
 718         /* use default vlan type 0x8100 */
 719         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 720         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 721                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 722         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 723         ctxt.info.valid_sections =
 724                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 725         ctxt.vsi_num = vsi->vsi_id;
 726         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 727         if (ret) {
 728                 PMD_DRV_LOG(INFO,
 729                             "Update VSI failed to %s qinq stripping",
 730                             on ? "enable" : "disable");
 731                 return -EINVAL;
 732         }
 733
 734         vsi->info.valid_sections |=
 735                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 736
 737         return ret;
 738 }
 739
 740 static int
 741 ice_vsi_config_qinq_stripping(struct ice_vsi *vsi, bool on)
 742 {
 743         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 744         struct ice_vsi_ctx ctxt;
 745         uint8_t qinq_flags;
 746         int ret = 0;
 747
 748         /* Check if it has been already on or off */
 749         if (vsi->info.valid_sections &
 750                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 751                 if (on) {
 752                         if ((vsi->info.outer_tag_flags &
 753                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 754                             ICE_AQ_VSI_OUTER_TAG_COPY)
 755                                 return 0; /* already on */
 756                 } else {
 757                         if ((vsi->info.outer_tag_flags &
 758                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 759                             ICE_AQ_VSI_OUTER_TAG_NOTHING)
 760                                 return 0; /* already off */
 761                 }
 762         }
 763
 764         if (on)
 765                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_COPY;
 766         else
 767                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_NOTHING;
 768         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_MODE_M);
 769         vsi->info.outer_tag_flags |= qinq_flags;
 770         /* use default vlan type 0x8100 */
 771         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 772         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 773                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 774         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 775         ctxt.info.valid_sections =
 776                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 777         ctxt.vsi_num = vsi->vsi_id;
 778         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 779         if (ret) {
 780                 PMD_DRV_LOG(INFO,
 781                             "Update VSI failed to %s qinq stripping",
 782                             on ? "enable" : "disable");
 783                 return -EINVAL;
 784         }
 785
 786         vsi->info.valid_sections |=
 787                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 788
 789         return ret;
 790 }
 791
 792 static int
 793 ice_vsi_config_double_vlan(struct ice_vsi *vsi, int on)
 794 {
 795         int ret;
 796
 797         ret = ice_vsi_config_qinq_stripping(vsi, on);
 798         if (ret)
 799                 PMD_DRV_LOG(ERR, "Fail to set qinq stripping - %d", ret);
 800
 801         ret = ice_vsi_config_qinq_insertion(vsi, on);
 802         if (ret)
 803                 PMD_DRV_LOG(ERR, "Fail to set qinq insertion - %d", ret);
 804
 805         return ret;
 806 }
 807
 808 /* Enable IRQ0 */
 809 static void
 810 ice_pf_enable_irq0(struct ice_hw *hw)
 811 {
 812         /* reset the registers */
 813         ICE_WRITE_REG(hw, PFINT_OICR_ENA, 0);
 814         ICE_READ_REG(hw, PFINT_OICR);
 815
 816 #ifdef ICE_LSE_SPT
 817         ICE_WRITE_REG(hw, PFINT_OICR_ENA,
 818                       (uint32_t)(PFINT_OICR_ENA_INT_ENA_M &
 819                                  (~PFINT_OICR_LINK_STAT_CHANGE_M)));
 820
 821         ICE_WRITE_REG(hw, PFINT_OICR_CTL,
 822                       (0 & PFINT_OICR_CTL_MSIX_INDX_M) |
 823                       ((0 << PFINT_OICR_CTL_ITR_INDX_S) &
 824                        PFINT_OICR_CTL_ITR_INDX_M) |
 825                       PFINT_OICR_CTL_CAUSE_ENA_M);
 826
 827         ICE_WRITE_REG(hw, PFINT_FW_CTL,
 828                       (0 & PFINT_FW_CTL_MSIX_INDX_M) |
 829                       ((0 << PFINT_FW_CTL_ITR_INDX_S) &
 830                        PFINT_FW_CTL_ITR_INDX_M) |
 831                       PFINT_FW_CTL_CAUSE_ENA_M);
 832 #else
 833         ICE_WRITE_REG(hw, PFINT_OICR_ENA, PFINT_OICR_ENA_INT_ENA_M);
 834 #endif
 835
 836         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
 837                       GLINT_DYN_CTL_INTENA_M |
 838                       GLINT_DYN_CTL_CLEARPBA_M |
 839                       GLINT_DYN_CTL_ITR_INDX_M);
 840
 841         ice_flush(hw);
 842 }
 843
 844 /* Disable IRQ0 */
 845 static void
 846 ice_pf_disable_irq0(struct ice_hw *hw)
 847 {
 848         /* Disable all interrupt types */
 849         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
 850         ice_flush(hw);
 851 }
 852
 853 #ifdef ICE_LSE_SPT
 854 static void
 855 ice_handle_aq_msg(struct rte_eth_dev *dev)
 856 {
 857         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 858         struct ice_ctl_q_info *cq = &hw->adminq;
 859         struct ice_rq_event_info event;
 860         uint16_t pending, opcode;
 861         int ret;
 862
 863         event.buf_len = ICE_AQ_MAX_BUF_LEN;
 864         event.msg_buf = rte_zmalloc(NULL, event.buf_len, 0);
 865         if (!event.msg_buf) {
 866                 PMD_DRV_LOG(ERR, "Failed to allocate mem");
 867                 return;
 868         }
 869
 870         pending = 1;
 871         while (pending) {
 872                 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
 873
 874                 if (ret != ICE_SUCCESS) {
 875                         PMD_DRV_LOG(INFO,
 876                                     "Failed to read msg from AdminQ, "
 877                                     "adminq_err: %u",
 878                                     hw->adminq.sq_last_status);
 879                         break;
 880                 }
 881                 opcode = rte_le_to_cpu_16(event.desc.opcode);
 882
 883                 switch (opcode) {
 884                 case ice_aqc_opc_get_link_status:
 885                         ret = ice_link_update(dev, 0);
 886                         if (!ret)
 887                                 _rte_eth_dev_callback_process
 888                                         (dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 889                         break;
 890                 default:
 891                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
 892                                     opcode);
 893                         break;
 894                 }
 895         }
 896         rte_free(event.msg_buf);
 897 }
 898 #endif
 899
 900 /**
 901  * Interrupt handler triggered by NIC for handling
 902  * specific interrupt.
 903  *
 904  * @param handle
 905  *  Pointer to interrupt handle.
 906  * @param param
 907  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 908  *
 909  * @return
 910  *  void
 911  */
 912 static void
 913 ice_interrupt_handler(void *param)
 914 {
 915         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
 916         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 917         uint32_t oicr;
 918         uint32_t reg;
 919         uint8_t pf_num;
 920         uint8_t event;
 921         uint16_t queue;
 922 #ifdef ICE_LSE_SPT
 923         uint32_t int_fw_ctl;
 924 #endif
 925
 926         /* Disable interrupt */
 927         ice_pf_disable_irq0(hw);
 928
 929         /* read out interrupt causes */
 930         oicr = ICE_READ_REG(hw, PFINT_OICR);
 931 #ifdef ICE_LSE_SPT
 932         int_fw_ctl = ICE_READ_REG(hw, PFINT_FW_CTL);
 933 #endif
 934
 935         /* No interrupt event indicated */
 936         if (!(oicr & PFINT_OICR_INTEVENT_M)) {
 937                 PMD_DRV_LOG(INFO, "No interrupt event");
 938                 goto done;
 939         }
 940
 941 #ifdef ICE_LSE_SPT
 942         if (int_fw_ctl & PFINT_FW_CTL_INTEVENT_M) {
 943                 PMD_DRV_LOG(INFO, "FW_CTL: link state change event");
 944                 ice_handle_aq_msg(dev);
 945         }
 946 #else
 947         if (oicr & PFINT_OICR_LINK_STAT_CHANGE_M) {
 948                 PMD_DRV_LOG(INFO, "OICR: link state change event");
 949                 ice_link_update(dev, 0);
 950         }
 951 #endif
 952
 953         if (oicr & PFINT_OICR_MAL_DETECT_M) {
 954                 PMD_DRV_LOG(WARNING, "OICR: MDD event");
 955                 reg = ICE_READ_REG(hw, GL_MDET_TX_PQM);
 956                 if (reg & GL_MDET_TX_PQM_VALID_M) {
 957                         pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
 958                                  GL_MDET_TX_PQM_PF_NUM_S;
 959                         event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
 960                                 GL_MDET_TX_PQM_MAL_TYPE_S;
 961                         queue = (reg & GL_MDET_TX_PQM_QNUM_M) >>
 962                                 GL_MDET_TX_PQM_QNUM_S;
 963
 964                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
 965                                     "%d by PQM on TX queue %d PF# %d",
 966                                     event, queue, pf_num);
 967                 }
 968
 969                 reg = ICE_READ_REG(hw, GL_MDET_TX_TCLAN);
 970                 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
 971                         pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
 972                                  GL_MDET_TX_TCLAN_PF_NUM_S;
 973                         event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
 974                                 GL_MDET_TX_TCLAN_MAL_TYPE_S;
 975                         queue = (reg & GL_MDET_TX_TCLAN_QNUM_M) >>
 976                                 GL_MDET_TX_TCLAN_QNUM_S;
 977
 978                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
 979                                     "%d by TCLAN on TX queue %d PF# %d",
 980                                     event, queue, pf_num);
 981                 }
 982         }
 983 done:
 984         /* Enable interrupt */
 985         ice_pf_enable_irq0(hw);
 986         rte_intr_enable(dev->intr_handle);
 987 }
 988
 989 /*  Initialize SW parameters of PF */
 990 static int
 991 ice_pf_sw_init(struct rte_eth_dev *dev)
 992 {
 993         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 994         struct ice_hw *hw = ICE_PF_TO_HW(pf);
 995
 996         if (ice_config_max_queue_pair_num(dev->device->devargs) > 0)
 997                 pf->lan_nb_qp_max =
 998                         ice_config_max_queue_pair_num(dev->device->devargs);
 999         else
1000                 pf->lan_nb_qp_max =
1001                         (uint16_t)RTE_MIN(hw->func_caps.common_cap.num_txq,
1002                                           hw->func_caps.common_cap.num_rxq);
1003
1004         pf->lan_nb_qps = pf->lan_nb_qp_max;
1005
1006         return 0;
1007 }
1008
1009 static struct ice_vsi *
1010 ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type)
1011 {
1012         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1013         struct ice_vsi *vsi = NULL;
1014         struct ice_vsi_ctx vsi_ctx;
1015         int ret;
1016         struct ether_addr broadcast = {
1017                 .addr_bytes = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff} };
1018         struct ether_addr mac_addr;
1019         uint16_t max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
1020         uint8_t tc_bitmap = 0x1;
1021
1022         /* hw->num_lports = 1 in NIC mode */
1023         vsi = rte_zmalloc(NULL, sizeof(struct ice_vsi), 0);
1024         if (!vsi)
1025                 return NULL;
1026
1027         vsi->idx = pf->next_vsi_idx;
1028         pf->next_vsi_idx++;
1029         vsi->type = type;
1030         vsi->adapter = ICE_PF_TO_ADAPTER(pf);
1031         vsi->max_macaddrs = ICE_NUM_MACADDR_MAX;
1032         vsi->vlan_anti_spoof_on = 0;
1033         vsi->vlan_filter_on = 1;
1034         TAILQ_INIT(&vsi->mac_list);
1035         TAILQ_INIT(&vsi->vlan_list);
1036
1037         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1038         /* base_queue in used in queue mapping of VSI add/update command.
1039          * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ
1040          * cases in the first stage. Only Main VSI.
1041          */
1042         vsi->base_queue = 0;
1043         switch (type) {
1044         case ICE_VSI_PF:
1045                 vsi->nb_qps = pf->lan_nb_qps;
1046                 ice_vsi_config_default_rss(&vsi_ctx.info);
1047                 vsi_ctx.alloc_from_pool = true;
1048                 vsi_ctx.flags = ICE_AQ_VSI_TYPE_PF;
1049                 /* switch_id is queried by get_switch_config aq, which is done
1050                  * by ice_init_hw
1051                  */
1052                 vsi_ctx.info.sw_id = hw->port_info->sw_id;
1053                 vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
1054                 /* Allow all untagged or tagged packets */
1055                 vsi_ctx.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1056                 vsi_ctx.info.vlan_flags |= ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1057                 vsi_ctx.info.q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF |
1058                                          ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1059                 /* Enable VLAN/UP trip */
1060                 ret = ice_vsi_config_tc_queue_mapping(vsi,
1061                                                       &vsi_ctx.info,
1062                                                       ICE_DEFAULT_TCMAP);
1063                 if (ret) {
1064                         PMD_INIT_LOG(ERR,
1065                                      "tc queue mapping with vsi failed, "
1066                                      "err = %d",
1067                                      ret);
1068                         goto fail_mem;
1069                 }
1070
1071                 break;
1072         default:
1073                 /* for other types of VSI */
1074                 PMD_INIT_LOG(ERR, "other types of VSI not supported");
1075                 goto fail_mem;
1076         }
1077
1078         /* VF has MSIX interrupt in VF range, don't allocate here */
1079         if (type == ICE_VSI_PF) {
1080                 ret = ice_res_pool_alloc(&pf->msix_pool,
1081                                          RTE_MIN(vsi->nb_qps,
1082                                                  RTE_MAX_RXTX_INTR_VEC_ID));
1083                 if (ret < 0) {
1084                         PMD_INIT_LOG(ERR, "VSI MAIN %d get heap failed %d",
1085                                      vsi->vsi_id, ret);
1086                 }
1087                 vsi->msix_intr = ret;
1088                 vsi->nb_msix = RTE_MIN(vsi->nb_qps, RTE_MAX_RXTX_INTR_VEC_ID);
1089         } else {
1090                 vsi->msix_intr = 0;
1091                 vsi->nb_msix = 0;
1092         }
1093         ret = ice_add_vsi(hw, vsi->idx, &vsi_ctx, NULL);
1094         if (ret != ICE_SUCCESS) {
1095                 PMD_INIT_LOG(ERR, "add vsi failed, err = %d", ret);
1096                 goto fail_mem;
1097         }
1098         /* store vsi information is SW structure */
1099         vsi->vsi_id = vsi_ctx.vsi_num;
1100         vsi->info = vsi_ctx.info;
1101         pf->vsis_allocated = vsi_ctx.vsis_allocd;
1102         pf->vsis_unallocated = vsi_ctx.vsis_unallocated;
1103
1104         /* MAC configuration */
1105         rte_memcpy(pf->dev_addr.addr_bytes,
1106                    hw->port_info->mac.perm_addr,
1107                    ETH_ADDR_LEN);
1108
1109         rte_memcpy(&mac_addr, &pf->dev_addr, ETHER_ADDR_LEN);
1110         ret = ice_add_mac_filter(vsi, &mac_addr);
1111         if (ret != ICE_SUCCESS)
1112                 PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter");
1113
1114         rte_memcpy(&mac_addr, &broadcast, ETHER_ADDR_LEN);
1115         ret = ice_add_mac_filter(vsi, &mac_addr);
1116         if (ret != ICE_SUCCESS)
1117                 PMD_INIT_LOG(ERR, "Failed to add MAC filter");
1118
1119         /* At the beginning, only TC0. */
1120         /* What we need here is the maximam number of the TX queues.
1121          * Currently vsi->nb_qps means it.
1122          * Correct it if any change.
1123          */
1124         max_txqs[0] = vsi->nb_qps;
1125         ret = ice_cfg_vsi_lan(hw->port_info, vsi->idx,
1126                               tc_bitmap, max_txqs);
1127         if (ret != ICE_SUCCESS)
1128                 PMD_INIT_LOG(ERR, "Failed to config vsi sched");
1129
1130         return vsi;
1131 fail_mem:
1132         rte_free(vsi);
1133         pf->next_vsi_idx--;
1134         return NULL;
1135 }
1136
1137 static int
1138 ice_pf_setup(struct ice_pf *pf)
1139 {
1140         struct ice_vsi *vsi;
1141
1142         /* Clear all stats counters */
1143         pf->offset_loaded = FALSE;
1144         memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats));
1145         memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats));
1146         memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats));
1147         memset(&pf->internal_stats_offset, 0, sizeof(struct ice_eth_stats));
1148
1149         vsi = ice_setup_vsi(pf, ICE_VSI_PF);
1150         if (!vsi) {
1151                 PMD_INIT_LOG(ERR, "Failed to add vsi for PF");
1152                 return -EINVAL;
1153         }
1154
1155         pf->main_vsi = vsi;
1156
1157         return 0;
1158 }
1159
1160 static int
1161 ice_dev_init(struct rte_eth_dev *dev)
1162 {
1163         struct rte_pci_device *pci_dev;
1164         struct rte_intr_handle *intr_handle;
1165         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1166         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1167         struct ice_vsi *vsi;
1168         int ret;
1169
1170         dev->dev_ops = &ice_eth_dev_ops;
1171         dev->rx_pkt_burst = ice_recv_pkts;
1172         dev->tx_pkt_burst = ice_xmit_pkts;
1173         dev->tx_pkt_prepare = ice_prep_pkts;
1174
1175         ice_set_default_ptype_table(dev);
1176         pci_dev = RTE_DEV_TO_PCI(dev->device);
1177         intr_handle = &pci_dev->intr_handle;
1178
1179         pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1180         pf->adapter->eth_dev = dev;
1181         pf->dev_data = dev->data;
1182         hw->back = pf->adapter;
1183         hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr;
1184         hw->vendor_id = pci_dev->id.vendor_id;
1185         hw->device_id = pci_dev->id.device_id;
1186         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1187         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1188         hw->bus.device = pci_dev->addr.devid;
1189         hw->bus.func = pci_dev->addr.function;
1190
1191         ice_init_controlq_parameter(hw);
1192
1193         ret = ice_init_hw(hw);
1194         if (ret) {
1195                 PMD_INIT_LOG(ERR, "Failed to initialize HW");
1196                 return -EINVAL;
1197         }
1198
1199         PMD_INIT_LOG(INFO, "FW %d.%d.%05d API %d.%d",
1200                      hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
1201                      hw->api_maj_ver, hw->api_min_ver);
1202
1203         ice_pf_sw_init(dev);
1204         ret = ice_init_mac_address(dev);
1205         if (ret) {
1206                 PMD_INIT_LOG(ERR, "Failed to initialize mac address");
1207                 goto err_init_mac;
1208         }
1209
1210         ret = ice_res_pool_init(&pf->msix_pool, 1,
1211                                 hw->func_caps.common_cap.num_msix_vectors - 1);
1212         if (ret) {
1213                 PMD_INIT_LOG(ERR, "Failed to init MSIX pool");
1214                 goto err_msix_pool_init;
1215         }
1216
1217         ret = ice_pf_setup(pf);
1218         if (ret) {
1219                 PMD_INIT_LOG(ERR, "Failed to setup PF");
1220                 goto err_pf_setup;
1221         }
1222
1223         vsi = pf->main_vsi;
1224
1225         /* Disable double vlan by default */
1226         ice_vsi_config_double_vlan(vsi, FALSE);
1227
1228         /* register callback func to eal lib */
1229         rte_intr_callback_register(intr_handle,
1230                                    ice_interrupt_handler, dev);
1231
1232         ice_pf_enable_irq0(hw);
1233
1234         /* enable uio intr after callback register */
1235         rte_intr_enable(intr_handle);
1236
1237         return 0;
1238
1239 err_pf_setup:
1240         ice_res_pool_destroy(&pf->msix_pool);
1241 err_msix_pool_init:
1242         rte_free(dev->data->mac_addrs);
1243 err_init_mac:
1244         ice_sched_cleanup_all(hw);
1245         rte_free(hw->port_info);
1246         ice_shutdown_all_ctrlq(hw);
1247
1248         return ret;
1249 }
1250
1251 static int
1252 ice_release_vsi(struct ice_vsi *vsi)
1253 {
1254         struct ice_hw *hw;
1255         struct ice_vsi_ctx vsi_ctx;
1256         enum ice_status ret;
1257
1258         if (!vsi)
1259                 return 0;
1260
1261         hw = ICE_VSI_TO_HW(vsi);
1262
1263         ice_remove_all_mac_vlan_filters(vsi);
1264
1265         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1266
1267         vsi_ctx.vsi_num = vsi->vsi_id;
1268         vsi_ctx.info = vsi->info;
1269         ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
1270         if (ret != ICE_SUCCESS) {
1271                 PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
1272                 rte_free(vsi);
1273                 return -1;
1274         }
1275
1276         rte_free(vsi);
1277         return 0;
1278 }
1279
1280 static void
1281 ice_vsi_disable_queues_intr(struct ice_vsi *vsi)
1282 {
1283         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1284         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1285         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1286         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1287         uint16_t msix_intr, i;
1288
1289         /* disable interrupt and also clear all the exist config */
1290         for (i = 0; i < vsi->nb_qps; i++) {
1291                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1292                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1293                 rte_wmb();
1294         }
1295
1296         if (rte_intr_allow_others(intr_handle))
1297                 /* vfio-pci */
1298                 for (i = 0; i < vsi->nb_msix; i++) {
1299                         msix_intr = vsi->msix_intr + i;
1300                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1301                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1302                 }
1303         else
1304                 /* igb_uio */
1305                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
1306 }
1307
1308 static void
1309 ice_dev_stop(struct rte_eth_dev *dev)
1310 {
1311         struct rte_eth_dev_data *data = dev->data;
1312         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1313         struct ice_vsi *main_vsi = pf->main_vsi;
1314         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1315         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1316         uint16_t i;
1317
1318         /* avoid stopping again */
1319         if (pf->adapter_stopped)
1320                 return;
1321
1322         /* stop and clear all Rx queues */
1323         for (i = 0; i < data->nb_rx_queues; i++)
1324                 ice_rx_queue_stop(dev, i);
1325
1326         /* stop and clear all Tx queues */
1327         for (i = 0; i < data->nb_tx_queues; i++)
1328                 ice_tx_queue_stop(dev, i);
1329
1330         /* disable all queue interrupts */
1331         ice_vsi_disable_queues_intr(main_vsi);
1332
1333         /* Clear all queues and release mbufs */
1334         ice_clear_queues(dev);
1335
1336         /* Clean datapath event and queue/vec mapping */
1337         rte_intr_efd_disable(intr_handle);
1338         if (intr_handle->intr_vec) {
1339                 rte_free(intr_handle->intr_vec);
1340                 intr_handle->intr_vec = NULL;
1341         }
1342
1343         pf->adapter_stopped = true;
1344 }
1345
1346 static void
1347 ice_dev_close(struct rte_eth_dev *dev)
1348 {
1349         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1350         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1351
1352         ice_dev_stop(dev);
1353
1354         /* release all queue resource */
1355         ice_free_queues(dev);
1356
1357         ice_res_pool_destroy(&pf->msix_pool);
1358         ice_release_vsi(pf->main_vsi);
1359
1360         ice_shutdown_all_ctrlq(hw);
1361 }
1362
1363 static int
1364 ice_dev_uninit(struct rte_eth_dev *dev)
1365 {
1366         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1367         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1368         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1369         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1370
1371         ice_dev_close(dev);
1372
1373         dev->dev_ops = NULL;
1374         dev->rx_pkt_burst = NULL;
1375         dev->tx_pkt_burst = NULL;
1376
1377         rte_free(dev->data->mac_addrs);
1378         dev->data->mac_addrs = NULL;
1379
1380         /* disable uio intr before callback unregister */
1381         rte_intr_disable(intr_handle);
1382
1383         /* register callback func to eal lib */
1384         rte_intr_callback_unregister(intr_handle,
1385                                      ice_interrupt_handler, dev);
1386
1387         ice_release_vsi(pf->main_vsi);
1388         ice_sched_cleanup_all(hw);
1389         rte_free(hw->port_info);
1390         ice_shutdown_all_ctrlq(hw);
1391
1392         return 0;
1393 }
1394
1395 static int
1396 ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
1397 {
1398         struct ice_adapter *ad =
1399                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1400
1401         /* Initialize to TRUE. If any of Rx queues doesn't meet the
1402          * bulk allocation or vector Rx preconditions we will reset it.
1403          */
1404         ad->rx_bulk_alloc_allowed = true;
1405         ad->tx_simple_allowed = true;
1406
1407         return 0;
1408 }
1409
1410 static int ice_init_rss(struct ice_pf *pf)
1411 {
1412         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1413         struct ice_vsi *vsi = pf->main_vsi;
1414         struct rte_eth_dev *dev = pf->adapter->eth_dev;
1415         struct rte_eth_rss_conf *rss_conf;
1416         struct ice_aqc_get_set_rss_keys key;
1417         uint16_t i, nb_q;
1418         int ret = 0;
1419
1420         rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
1421         nb_q = dev->data->nb_rx_queues;
1422         vsi->rss_key_size = ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE;
1423         vsi->rss_lut_size = hw->func_caps.common_cap.rss_table_size;
1424
1425         if (!vsi->rss_key)
1426                 vsi->rss_key = rte_zmalloc(NULL,
1427                                            vsi->rss_key_size, 0);
1428         if (!vsi->rss_lut)
1429                 vsi->rss_lut = rte_zmalloc(NULL,
1430                                            vsi->rss_lut_size, 0);
1431
1432         /* configure RSS key */
1433         if (!rss_conf->rss_key) {
1434                 /* Calculate the default hash key */
1435                 for (i = 0; i <= vsi->rss_key_size; i++)
1436                         vsi->rss_key[i] = (uint8_t)rte_rand();
1437         } else {
1438                 rte_memcpy(vsi->rss_key, rss_conf->rss_key,
1439                            RTE_MIN(rss_conf->rss_key_len,
1440                                    vsi->rss_key_size));
1441         }
1442         rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
1443         ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
1444         if (ret)
1445                 return -EINVAL;
1446
1447         /* init RSS LUT table */
1448         for (i = 0; i < vsi->rss_lut_size; i++)
1449                 vsi->rss_lut[i] = i % nb_q;
1450
1451         ret = ice_aq_set_rss_lut(hw, vsi->idx,
1452                                  ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
1453                                  vsi->rss_lut, vsi->rss_lut_size);
1454         if (ret)
1455                 return -EINVAL;
1456
1457         return 0;
1458 }
1459
1460 static void
1461 __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
1462                        int base_queue, int nb_queue)
1463 {
1464         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1465         uint32_t val, val_tx;
1466         int i;
1467
1468         for (i = 0; i < nb_queue; i++) {
1469                 /*do actual bind*/
1470                 val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
1471                       (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
1472                 val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
1473                          (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
1474
1475                 PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
1476                             base_queue + i, msix_vect);
1477                 /* set ITR0 value */
1478                 ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x10);
1479                 ICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val);
1480                 ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx);
1481         }
1482 }
1483
1484 static void
1485 ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
1486 {
1487         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1488         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1489         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1490         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1491         uint16_t msix_vect = vsi->msix_intr;
1492         uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
1493         uint16_t queue_idx = 0;
1494         int record = 0;
1495         int i;
1496
1497         /* clear Rx/Tx queue interrupt */
1498         for (i = 0; i < vsi->nb_used_qps; i++) {
1499                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1500                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1501         }
1502
1503         /* PF bind interrupt */
1504         if (rte_intr_dp_is_en(intr_handle)) {
1505                 queue_idx = 0;
1506                 record = 1;
1507         }
1508
1509         for (i = 0; i < vsi->nb_used_qps; i++) {
1510                 if (nb_msix <= 1) {
1511                         if (!rte_intr_allow_others(intr_handle))
1512                                 msix_vect = ICE_MISC_VEC_ID;
1513
1514                         /* uio mapping all queue to one msix_vect */
1515                         __vsi_queues_bind_intr(vsi, msix_vect,
1516                                                vsi->base_queue + i,
1517                                                vsi->nb_used_qps - i);
1518
1519                         for (; !!record && i < vsi->nb_used_qps; i++)
1520                                 intr_handle->intr_vec[queue_idx + i] =
1521                                         msix_vect;
1522                         break;
1523                 }
1524
1525                 /* vfio 1:1 queue/msix_vect mapping */
1526                 __vsi_queues_bind_intr(vsi, msix_vect,
1527                                        vsi->base_queue + i, 1);
1528
1529                 if (!!record)
1530                         intr_handle->intr_vec[queue_idx + i] = msix_vect;
1531
1532                 msix_vect++;
1533                 nb_msix--;
1534         }
1535 }
1536
1537 static void
1538 ice_vsi_enable_queues_intr(struct ice_vsi *vsi)
1539 {
1540         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1541         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1542         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1543         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1544         uint16_t msix_intr, i;
1545
1546         if (rte_intr_allow_others(intr_handle))
1547                 for (i = 0; i < vsi->nb_used_qps; i++) {
1548                         msix_intr = vsi->msix_intr + i;
1549                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1550                                       GLINT_DYN_CTL_INTENA_M |
1551                                       GLINT_DYN_CTL_CLEARPBA_M |
1552                                       GLINT_DYN_CTL_ITR_INDX_M |
1553                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1554                 }
1555         else
1556                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
1557                               GLINT_DYN_CTL_INTENA_M |
1558                               GLINT_DYN_CTL_CLEARPBA_M |
1559                               GLINT_DYN_CTL_ITR_INDX_M |
1560                               GLINT_DYN_CTL_WB_ON_ITR_M);
1561 }
1562
1563 static int
1564 ice_rxq_intr_setup(struct rte_eth_dev *dev)
1565 {
1566         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1567         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1568         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1569         struct ice_vsi *vsi = pf->main_vsi;
1570         uint32_t intr_vector = 0;
1571
1572         rte_intr_disable(intr_handle);
1573
1574         /* check and configure queue intr-vector mapping */
1575         if ((rte_intr_cap_multiple(intr_handle) ||
1576              !RTE_ETH_DEV_SRIOV(dev).active) &&
1577             dev->data->dev_conf.intr_conf.rxq != 0) {
1578                 intr_vector = dev->data->nb_rx_queues;
1579                 if (intr_vector > ICE_MAX_INTR_QUEUE_NUM) {
1580                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
1581                                     ICE_MAX_INTR_QUEUE_NUM);
1582                         return -ENOTSUP;
1583                 }
1584                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1585                         return -1;
1586         }
1587
1588         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1589                 intr_handle->intr_vec =
1590                 rte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),
1591                             0);
1592                 if (!intr_handle->intr_vec) {
1593                         PMD_DRV_LOG(ERR,
1594                                     "Failed to allocate %d rx_queues intr_vec",
1595                                     dev->data->nb_rx_queues);
1596                         return -ENOMEM;
1597                 }
1598         }
1599
1600         /* Map queues with MSIX interrupt */
1601         vsi->nb_used_qps = dev->data->nb_rx_queues;
1602         ice_vsi_queues_bind_intr(vsi);
1603
1604         /* Enable interrupts for all the queues */
1605         ice_vsi_enable_queues_intr(vsi);
1606
1607         rte_intr_enable(intr_handle);
1608
1609         return 0;
1610 }
1611
1612 static int
1613 ice_dev_start(struct rte_eth_dev *dev)
1614 {
1615         struct rte_eth_dev_data *data = dev->data;
1616         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1617         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1618         uint16_t nb_rxq = 0;
1619         uint16_t nb_txq, i;
1620         int ret;
1621
1622         /* program Tx queues' context in hardware */
1623         for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
1624                 ret = ice_tx_queue_start(dev, nb_txq);
1625                 if (ret) {
1626                         PMD_DRV_LOG(ERR, "fail to start Tx queue %u", nb_txq);
1627                         goto tx_err;
1628                 }
1629         }
1630
1631         /* program Rx queues' context in hardware*/
1632         for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
1633                 ret = ice_rx_queue_start(dev, nb_rxq);
1634                 if (ret) {
1635                         PMD_DRV_LOG(ERR, "fail to start Rx queue %u", nb_rxq);
1636                         goto rx_err;
1637                 }
1638         }
1639
1640         ret = ice_init_rss(pf);
1641         if (ret) {
1642                 PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
1643                 goto rx_err;
1644         }
1645
1646         ice_set_rx_function(dev);
1647
1648         /* enable Rx interrput and mapping Rx queue to interrupt vector */
1649         if (ice_rxq_intr_setup(dev))
1650                 return -EIO;
1651
1652         ret = ice_aq_set_event_mask(hw, hw->port_info->lport,
1653                                     ((u16)(ICE_AQ_LINK_EVENT_LINK_FAULT |
1654                                      ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM |
1655                                      ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS |
1656                                      ICE_AQ_LINK_EVENT_SIGNAL_DETECT |
1657                                      ICE_AQ_LINK_EVENT_AN_COMPLETED |
1658                                      ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED)),
1659                                      NULL);
1660         if (ret != ICE_SUCCESS)
1661                 PMD_DRV_LOG(WARNING, "Fail to set phy mask");
1662
1663         /* Call get_link_info aq commond to enable/disable LSE */
1664         ice_link_update(dev, 0);
1665
1666         pf->adapter_stopped = false;
1667
1668         return 0;
1669
1670         /* stop the started queues if failed to start all queues */
1671 rx_err:
1672         for (i = 0; i < nb_rxq; i++)
1673                 ice_rx_queue_stop(dev, i);
1674 tx_err:
1675         for (i = 0; i < nb_txq; i++)
1676                 ice_tx_queue_stop(dev, i);
1677
1678         return -EIO;
1679 }
1680
1681 static int
1682 ice_dev_reset(struct rte_eth_dev *dev)
1683 {
1684         int ret;
1685
1686         if (dev->data->sriov.active)
1687                 return -ENOTSUP;
1688
1689         ret = ice_dev_uninit(dev);
1690         if (ret) {
1691                 PMD_INIT_LOG(ERR, "failed to uninit device, status = %d", ret);
1692                 return -ENXIO;
1693         }
1694
1695         ret = ice_dev_init(dev);
1696         if (ret) {
1697                 PMD_INIT_LOG(ERR, "failed to init device, status = %d", ret);
1698                 return -ENXIO;
1699         }
1700
1701         return 0;
1702 }
1703
1704 static void
1705 ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1706 {
1707         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1708         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1709         struct ice_vsi *vsi = pf->main_vsi;
1710         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1711
1712         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
1713         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
1714         dev_info->max_rx_queues = vsi->nb_qps;
1715         dev_info->max_tx_queues = vsi->nb_qps;
1716         dev_info->max_mac_addrs = vsi->max_macaddrs;
1717         dev_info->max_vfs = pci_dev->max_vfs;
1718
1719         dev_info->rx_offload_capa =
1720                 DEV_RX_OFFLOAD_VLAN_STRIP |
1721                 DEV_RX_OFFLOAD_IPV4_CKSUM |
1722                 DEV_RX_OFFLOAD_UDP_CKSUM |
1723                 DEV_RX_OFFLOAD_TCP_CKSUM |
1724                 DEV_RX_OFFLOAD_QINQ_STRIP |
1725                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
1726                 DEV_RX_OFFLOAD_VLAN_EXTEND |
1727                 DEV_RX_OFFLOAD_JUMBO_FRAME |
1728                 DEV_RX_OFFLOAD_KEEP_CRC |
1729                 DEV_RX_OFFLOAD_SCATTER |
1730                 DEV_RX_OFFLOAD_VLAN_FILTER;
1731         dev_info->tx_offload_capa =
1732                 DEV_TX_OFFLOAD_VLAN_INSERT |
1733                 DEV_TX_OFFLOAD_QINQ_INSERT |
1734                 DEV_TX_OFFLOAD_IPV4_CKSUM |
1735                 DEV_TX_OFFLOAD_UDP_CKSUM |
1736                 DEV_TX_OFFLOAD_TCP_CKSUM |
1737                 DEV_TX_OFFLOAD_SCTP_CKSUM |
1738                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
1739                 DEV_TX_OFFLOAD_TCP_TSO |
1740                 DEV_TX_OFFLOAD_MULTI_SEGS |
1741                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1742         dev_info->rx_queue_offload_capa = 0;
1743         dev_info->tx_queue_offload_capa = 0;
1744
1745         dev_info->reta_size = hw->func_caps.common_cap.rss_table_size;
1746         dev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1747         dev_info->flow_type_rss_offloads = ICE_RSS_OFFLOAD_ALL;
1748
1749         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1750                 .rx_thresh = {
1751                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
1752                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
1753                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
1754                 },
1755                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
1756                 .rx_drop_en = 0,
1757                 .offloads = 0,
1758         };
1759
1760         dev_info->default_txconf = (struct rte_eth_txconf) {
1761                 .tx_thresh = {
1762                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
1763                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
1764                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
1765                 },
1766                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
1767                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
1768                 .offloads = 0,
1769         };
1770
1771         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1772                 .nb_max = ICE_MAX_RING_DESC,
1773                 .nb_min = ICE_MIN_RING_DESC,
1774                 .nb_align = ICE_ALIGN_RING_DESC,
1775         };
1776
1777         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1778                 .nb_max = ICE_MAX_RING_DESC,
1779                 .nb_min = ICE_MIN_RING_DESC,
1780                 .nb_align = ICE_ALIGN_RING_DESC,
1781         };
1782
1783         dev_info->speed_capa = ETH_LINK_SPEED_10M |
1784                                ETH_LINK_SPEED_100M |
1785                                ETH_LINK_SPEED_1G |
1786                                ETH_LINK_SPEED_2_5G |
1787                                ETH_LINK_SPEED_5G |
1788                                ETH_LINK_SPEED_10G |
1789                                ETH_LINK_SPEED_20G |
1790                                ETH_LINK_SPEED_25G |
1791                                ETH_LINK_SPEED_40G;
1792
1793         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1794         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1795
1796         dev_info->default_rxportconf.burst_size = ICE_RX_MAX_BURST;
1797         dev_info->default_txportconf.burst_size = ICE_TX_MAX_BURST;
1798         dev_info->default_rxportconf.nb_queues = 1;
1799         dev_info->default_txportconf.nb_queues = 1;
1800         dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
1801         dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
1802 }
1803
1804 static inline int
1805 ice_atomic_read_link_status(struct rte_eth_dev *dev,
1806                             struct rte_eth_link *link)
1807 {
1808         struct rte_eth_link *dst = link;
1809         struct rte_eth_link *src = &dev->data->dev_link;
1810
1811         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1812                                 *(uint64_t *)src) == 0)
1813                 return -1;
1814
1815         return 0;
1816 }
1817
1818 static inline int
1819 ice_atomic_write_link_status(struct rte_eth_dev *dev,
1820                              struct rte_eth_link *link)
1821 {
1822         struct rte_eth_link *dst = &dev->data->dev_link;
1823         struct rte_eth_link *src = link;
1824
1825         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1826                                 *(uint64_t *)src) == 0)
1827                 return -1;
1828
1829         return 0;
1830 }
1831
1832 static int
1833 ice_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
1834 {
1835 #define CHECK_INTERVAL 100  /* 100ms */
1836 #define MAX_REPEAT_TIME 10  /* 1s (10 * 100ms) in total */
1837         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1838         struct ice_link_status link_status;
1839         struct rte_eth_link link, old;
1840         int status;
1841         unsigned int rep_cnt = MAX_REPEAT_TIME;
1842         bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
1843
1844         memset(&link, 0, sizeof(link));
1845         memset(&old, 0, sizeof(old));
1846         memset(&link_status, 0, sizeof(link_status));
1847         ice_atomic_read_link_status(dev, &old);
1848
1849         do {
1850                 /* Get link status information from hardware */
1851                 status = ice_aq_get_link_info(hw->port_info, enable_lse,
1852                                               &link_status, NULL);
1853                 if (status != ICE_SUCCESS) {
1854                         link.link_speed = ETH_SPEED_NUM_100M;
1855                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1856                         PMD_DRV_LOG(ERR, "Failed to get link info");
1857                         goto out;
1858                 }
1859
1860                 link.link_status = link_status.link_info & ICE_AQ_LINK_UP;
1861                 if (!wait_to_complete || link.link_status)
1862                         break;
1863
1864                 rte_delay_ms(CHECK_INTERVAL);
1865         } while (--rep_cnt);
1866
1867         if (!link.link_status)
1868                 goto out;
1869
1870         /* Full-duplex operation at all supported speeds */
1871         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1872
1873         /* Parse the link status */
1874         switch (link_status.link_speed) {
1875         case ICE_AQ_LINK_SPEED_10MB:
1876                 link.link_speed = ETH_SPEED_NUM_10M;
1877                 break;
1878         case ICE_AQ_LINK_SPEED_100MB:
1879                 link.link_speed = ETH_SPEED_NUM_100M;
1880                 break;
1881         case ICE_AQ_LINK_SPEED_1000MB:
1882                 link.link_speed = ETH_SPEED_NUM_1G;
1883                 break;
1884         case ICE_AQ_LINK_SPEED_2500MB:
1885                 link.link_speed = ETH_SPEED_NUM_2_5G;
1886                 break;
1887         case ICE_AQ_LINK_SPEED_5GB:
1888                 link.link_speed = ETH_SPEED_NUM_5G;
1889                 break;
1890         case ICE_AQ_LINK_SPEED_10GB:
1891                 link.link_speed = ETH_SPEED_NUM_10G;
1892                 break;
1893         case ICE_AQ_LINK_SPEED_20GB:
1894                 link.link_speed = ETH_SPEED_NUM_20G;
1895                 break;
1896         case ICE_AQ_LINK_SPEED_25GB:
1897                 link.link_speed = ETH_SPEED_NUM_25G;
1898                 break;
1899         case ICE_AQ_LINK_SPEED_40GB:
1900                 link.link_speed = ETH_SPEED_NUM_40G;
1901                 break;
1902         case ICE_AQ_LINK_SPEED_UNKNOWN:
1903         default:
1904                 PMD_DRV_LOG(ERR, "Unknown link speed");
1905                 link.link_speed = ETH_SPEED_NUM_NONE;
1906                 break;
1907         }
1908
1909         link.link_autoneg = !(dev->data->dev_conf.link_speeds &
1910                               ETH_LINK_SPEED_FIXED);
1911
1912 out:
1913         ice_atomic_write_link_status(dev, &link);
1914         if (link.link_status == old.link_status)
1915                 return -1;
1916
1917         return 0;
1918 }
1919
1920 static int
1921 ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1922 {
1923         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1924         struct rte_eth_dev_data *dev_data = pf->dev_data;
1925         uint32_t frame_size = mtu + ETHER_HDR_LEN
1926                               + ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE;
1927
1928         /* check if mtu is within the allowed range */
1929         if (mtu < ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
1930                 return -EINVAL;
1931
1932         /* mtu setting is forbidden if port is start */
1933         if (dev_data->dev_started) {
1934                 PMD_DRV_LOG(ERR,
1935                             "port %d must be stopped before configuration",
1936                             dev_data->port_id);
1937                 return -EBUSY;
1938         }
1939
1940         if (frame_size > ETHER_MAX_LEN)
1941                 dev_data->dev_conf.rxmode.offloads |=
1942                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1943         else
1944                 dev_data->dev_conf.rxmode.offloads &=
1945                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1946
1947         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1948
1949         return 0;
1950 }
1951
1952 static int ice_macaddr_set(struct rte_eth_dev *dev,
1953                            struct ether_addr *mac_addr)
1954 {
1955         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1956         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1957         struct ice_vsi *vsi = pf->main_vsi;
1958         struct ice_mac_filter *f;
1959         uint8_t flags = 0;
1960         int ret;
1961
1962         if (!is_valid_assigned_ether_addr(mac_addr)) {
1963                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
1964                 return -EINVAL;
1965         }
1966
1967         TAILQ_FOREACH(f, &vsi->mac_list, next) {
1968                 if (is_same_ether_addr(&pf->dev_addr, &f->mac_info.mac_addr))
1969                         break;
1970         }
1971
1972         if (!f) {
1973                 PMD_DRV_LOG(ERR, "Failed to find filter for default mac");
1974                 return -EIO;
1975         }
1976
1977         ret = ice_remove_mac_filter(vsi, &f->mac_info.mac_addr);
1978         if (ret != ICE_SUCCESS) {
1979                 PMD_DRV_LOG(ERR, "Failed to delete mac filter");
1980                 return -EIO;
1981         }
1982         ret = ice_add_mac_filter(vsi, mac_addr);
1983         if (ret != ICE_SUCCESS) {
1984                 PMD_DRV_LOG(ERR, "Failed to add mac filter");
1985                 return -EIO;
1986         }
1987         memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN);
1988
1989         flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
1990         ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL);
1991         if (ret != ICE_SUCCESS)
1992                 PMD_DRV_LOG(ERR, "Failed to set manage mac");
1993
1994         return 0;
1995 }
1996
1997 /* Add a MAC address, and update filters */
1998 static int
1999 ice_macaddr_add(struct rte_eth_dev *dev,
2000                 struct ether_addr *mac_addr,
2001                 __rte_unused uint32_t index,
2002                 __rte_unused uint32_t pool)
2003 {
2004         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2005         struct ice_vsi *vsi = pf->main_vsi;
2006         int ret;
2007
2008         ret = ice_add_mac_filter(vsi, mac_addr);
2009         if (ret != ICE_SUCCESS) {
2010                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
2011                 return -EINVAL;
2012         }
2013
2014         return ICE_SUCCESS;
2015 }
2016
2017 /* Remove a MAC address, and update filters */
2018 static void
2019 ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index)
2020 {
2021         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2022         struct ice_vsi *vsi = pf->main_vsi;
2023         struct rte_eth_dev_data *data = dev->data;
2024         struct ether_addr *macaddr;
2025         int ret;
2026
2027         macaddr = &data->mac_addrs[index];
2028         ret = ice_remove_mac_filter(vsi, macaddr);
2029         if (ret) {
2030                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
2031                 return;
2032         }
2033 }
2034
2035 static int
2036 ice_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
2037 {
2038         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2039         struct ice_vsi *vsi = pf->main_vsi;
2040         int ret;
2041
2042         PMD_INIT_FUNC_TRACE();
2043
2044         if (on) {
2045                 ret = ice_add_vlan_filter(vsi, vlan_id);
2046                 if (ret < 0) {
2047                         PMD_DRV_LOG(ERR, "Failed to add vlan filter");
2048                         return -EINVAL;
2049                 }
2050         } else {
2051                 ret = ice_remove_vlan_filter(vsi, vlan_id);
2052                 if (ret < 0) {
2053                         PMD_DRV_LOG(ERR, "Failed to remove vlan filter");
2054                         return -EINVAL;
2055                 }
2056         }
2057
2058         return 0;
2059 }
2060
2061 /* Configure vlan filter on or off */
2062 static int
2063 ice_vsi_config_vlan_filter(struct ice_vsi *vsi, bool on)
2064 {
2065         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2066         struct ice_vsi_ctx ctxt;
2067         uint8_t sec_flags, sw_flags2;
2068         int ret = 0;
2069
2070         sec_flags = ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2071                     ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2072         sw_flags2 = ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2073
2074         if (on) {
2075                 vsi->info.sec_flags |= sec_flags;
2076                 vsi->info.sw_flags2 |= sw_flags2;
2077         } else {
2078                 vsi->info.sec_flags &= ~sec_flags;
2079                 vsi->info.sw_flags2 &= ~sw_flags2;
2080         }
2081         vsi->info.sw_id = hw->port_info->sw_id;
2082         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2083         ctxt.info.valid_sections =
2084                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2085                                  ICE_AQ_VSI_PROP_SECURITY_VALID);
2086         ctxt.vsi_num = vsi->vsi_id;
2087
2088         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2089         if (ret) {
2090                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan rx pruning",
2091                             on ? "enable" : "disable");
2092                 ret = -EINVAL;
2093         } else {
2094                 vsi->info.valid_sections |=
2095                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2096                                          ICE_AQ_VSI_PROP_SECURITY_VALID);
2097         }
2098
2099         return ret;
2100 }
2101
2102 static int
2103 ice_vsi_config_vlan_stripping(struct ice_vsi *vsi, bool on)
2104 {
2105         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2106         struct ice_vsi_ctx ctxt;
2107         uint8_t vlan_flags;
2108         int ret = 0;
2109
2110         /* Check if it has been already on or off */
2111         if (vsi->info.valid_sections &
2112                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID)) {
2113                 if (on) {
2114                         if ((vsi->info.vlan_flags &
2115                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2116                             ICE_AQ_VSI_VLAN_EMOD_STR_BOTH)
2117                                 return 0; /* already on */
2118                 } else {
2119                         if ((vsi->info.vlan_flags &
2120                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2121                             ICE_AQ_VSI_VLAN_EMOD_NOTHING)
2122                                 return 0; /* already off */
2123                 }
2124         }
2125
2126         if (on)
2127                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
2128         else
2129                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
2130         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_VLAN_EMOD_M);
2131         vsi->info.vlan_flags |= vlan_flags;
2132         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2133         ctxt.info.valid_sections =
2134                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2135         ctxt.vsi_num = vsi->vsi_id;
2136         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2137         if (ret) {
2138                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan stripping",
2139                             on ? "enable" : "disable");
2140                 return -EINVAL;
2141         }
2142
2143         vsi->info.valid_sections |=
2144                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2145
2146         return ret;
2147 }
2148
2149 static int
2150 ice_vlan_offload_set(struct rte_eth_dev *dev, int mask)
2151 {
2152         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2153         struct ice_vsi *vsi = pf->main_vsi;
2154         struct rte_eth_rxmode *rxmode;
2155
2156         rxmode = &dev->data->dev_conf.rxmode;
2157         if (mask & ETH_VLAN_FILTER_MASK) {
2158                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2159                         ice_vsi_config_vlan_filter(vsi, TRUE);
2160                 else
2161                         ice_vsi_config_vlan_filter(vsi, FALSE);
2162         }
2163
2164         if (mask & ETH_VLAN_STRIP_MASK) {
2165                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2166                         ice_vsi_config_vlan_stripping(vsi, TRUE);
2167                 else
2168                         ice_vsi_config_vlan_stripping(vsi, FALSE);
2169         }
2170
2171         if (mask & ETH_VLAN_EXTEND_MASK) {
2172                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2173                         ice_vsi_config_double_vlan(vsi, TRUE);
2174                 else
2175                         ice_vsi_config_double_vlan(vsi, FALSE);
2176         }
2177
2178         return 0;
2179 }
2180
2181 static int
2182 ice_vlan_tpid_set(struct rte_eth_dev *dev,
2183                   enum rte_vlan_type vlan_type,
2184                   uint16_t tpid)
2185 {
2186         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2187         uint64_t reg_r = 0, reg_w = 0;
2188         uint16_t reg_id = 0;
2189         int ret = 0;
2190         int qinq = dev->data->dev_conf.rxmode.offloads &
2191                    DEV_RX_OFFLOAD_VLAN_EXTEND;
2192
2193         switch (vlan_type) {
2194         case ETH_VLAN_TYPE_OUTER:
2195                 if (qinq)
2196                         reg_id = 3;
2197                 else
2198                         reg_id = 5;
2199         break;
2200         case ETH_VLAN_TYPE_INNER:
2201                 if (qinq) {
2202                         reg_id = 5;
2203                 } else {
2204                         PMD_DRV_LOG(ERR,
2205                                     "Unsupported vlan type in single vlan.");
2206                         return -EINVAL;
2207                 }
2208                 break;
2209         default:
2210                 PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type);
2211                 return -EINVAL;
2212         }
2213         reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id));
2214         PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: "
2215                     "0x%08"PRIx64"", reg_id, reg_r);
2216
2217         reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M));
2218         reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S);
2219         if (reg_r == reg_w) {
2220                 PMD_DRV_LOG(DEBUG, "No need to write");
2221                 return 0;
2222         }
2223
2224         ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w);
2225         PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to "
2226                     "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id);
2227
2228         return ret;
2229 }
2230
2231 static int
2232 ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2233 {
2234         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2235         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2236         int ret;
2237
2238         if (!lut)
2239                 return -EINVAL;
2240
2241         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2242                 ret = ice_aq_get_rss_lut(hw, vsi->idx, TRUE,
2243                                          lut, lut_size);
2244                 if (ret) {
2245                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2246                         return -EINVAL;
2247                 }
2248         } else {
2249                 uint64_t *lut_dw = (uint64_t *)lut;
2250                 uint16_t i, lut_size_dw = lut_size / 4;
2251
2252                 for (i = 0; i < lut_size_dw; i++)
2253                         lut_dw[i] = ICE_READ_REG(hw, PFQF_HLUT(i));
2254         }
2255
2256         return 0;
2257 }
2258
2259 static int
2260 ice_set_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2261 {
2262         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2263         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2264         int ret;
2265
2266         if (!vsi || !lut)
2267                 return -EINVAL;
2268
2269         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2270                 ret = ice_aq_set_rss_lut(hw, vsi->idx, TRUE,
2271                                          lut, lut_size);
2272                 if (ret) {
2273                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2274                         return -EINVAL;
2275                 }
2276         } else {
2277                 uint64_t *lut_dw = (uint64_t *)lut;
2278                 uint16_t i, lut_size_dw = lut_size / 4;
2279
2280                 for (i = 0; i < lut_size_dw; i++)
2281                         ICE_WRITE_REG(hw, PFQF_HLUT(i), lut_dw[i]);
2282
2283                 ice_flush(hw);
2284         }
2285
2286         return 0;
2287 }
2288
2289 static int
2290 ice_rss_reta_update(struct rte_eth_dev *dev,
2291                     struct rte_eth_rss_reta_entry64 *reta_conf,
2292                     uint16_t reta_size)
2293 {
2294         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2295         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2296         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2297         uint16_t idx, shift;
2298         uint8_t *lut;
2299         int ret;
2300
2301         if (reta_size != lut_size ||
2302             reta_size > ETH_RSS_RETA_SIZE_512) {
2303                 PMD_DRV_LOG(ERR,
2304                             "The size of hash lookup table configured (%d)"
2305                             "doesn't match the number hardware can "
2306                             "supported (%d)",
2307                             reta_size, lut_size);
2308                 return -EINVAL;
2309         }
2310
2311         lut = rte_zmalloc(NULL, reta_size, 0);
2312         if (!lut) {
2313                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2314                 return -ENOMEM;
2315         }
2316         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2317         if (ret)
2318                 goto out;
2319
2320         for (i = 0; i < reta_size; i++) {
2321                 idx = i / RTE_RETA_GROUP_SIZE;
2322                 shift = i % RTE_RETA_GROUP_SIZE;
2323                 if (reta_conf[idx].mask & (1ULL << shift))
2324                         lut[i] = reta_conf[idx].reta[shift];
2325         }
2326         ret = ice_set_rss_lut(pf->main_vsi, lut, reta_size);
2327
2328 out:
2329         rte_free(lut);
2330
2331         return ret;
2332 }
2333
2334 static int
2335 ice_rss_reta_query(struct rte_eth_dev *dev,
2336                    struct rte_eth_rss_reta_entry64 *reta_conf,
2337                    uint16_t reta_size)
2338 {
2339         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2340         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2341         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2342         uint16_t idx, shift;
2343         uint8_t *lut;
2344         int ret;
2345
2346         if (reta_size != lut_size ||
2347             reta_size > ETH_RSS_RETA_SIZE_512) {
2348                 PMD_DRV_LOG(ERR,
2349                             "The size of hash lookup table configured (%d)"
2350                             "doesn't match the number hardware can "
2351                             "supported (%d)",
2352                             reta_size, lut_size);
2353                 return -EINVAL;
2354         }
2355
2356         lut = rte_zmalloc(NULL, reta_size, 0);
2357         if (!lut) {
2358                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2359                 return -ENOMEM;
2360         }
2361
2362         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2363         if (ret)
2364                 goto out;
2365
2366         for (i = 0; i < reta_size; i++) {
2367                 idx = i / RTE_RETA_GROUP_SIZE;
2368                 shift = i % RTE_RETA_GROUP_SIZE;
2369                 if (reta_conf[idx].mask & (1ULL << shift))
2370                         reta_conf[idx].reta[shift] = lut[i];
2371         }
2372
2373 out:
2374         rte_free(lut);
2375
2376         return ret;
2377 }
2378
2379 static int
2380 ice_set_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t key_len)
2381 {
2382         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2383         int ret = 0;
2384
2385         if (!key || key_len == 0) {
2386                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2387                 return 0;
2388         } else if (key_len != (VSIQF_HKEY_MAX_INDEX + 1) *
2389                    sizeof(uint32_t)) {
2390                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2391                 return -EINVAL;
2392         }
2393
2394         struct ice_aqc_get_set_rss_keys *key_dw =
2395                 (struct ice_aqc_get_set_rss_keys *)key;
2396
2397         ret = ice_aq_set_rss_key(hw, vsi->idx, key_dw);
2398         if (ret) {
2399                 PMD_DRV_LOG(ERR, "Failed to configure RSS key via AQ");
2400                 ret = -EINVAL;
2401         }
2402
2403         return ret;
2404 }
2405
2406 static int
2407 ice_get_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t *key_len)
2408 {
2409         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2410         int ret;
2411
2412         if (!key || !key_len)
2413                 return -EINVAL;
2414
2415         ret = ice_aq_get_rss_key
2416                 (hw, vsi->idx,
2417                  (struct ice_aqc_get_set_rss_keys *)key);
2418         if (ret) {
2419                 PMD_DRV_LOG(ERR, "Failed to get RSS key via AQ");
2420                 return -EINVAL;
2421         }
2422         *key_len = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2423
2424         return 0;
2425 }
2426
2427 static int
2428 ice_rss_hash_update(struct rte_eth_dev *dev,
2429                     struct rte_eth_rss_conf *rss_conf)
2430 {
2431         enum ice_status status = ICE_SUCCESS;
2432         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2433         struct ice_vsi *vsi = pf->main_vsi;
2434
2435         /* set hash key */
2436         status = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);
2437         if (status)
2438                 return status;
2439
2440         /* TODO: hash enable config, ice_add_rss_cfg */
2441         return 0;
2442 }
2443
2444 static int
2445 ice_rss_hash_conf_get(struct rte_eth_dev *dev,
2446                       struct rte_eth_rss_conf *rss_conf)
2447 {
2448         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2449         struct ice_vsi *vsi = pf->main_vsi;
2450
2451         ice_get_rss_key(vsi, rss_conf->rss_key,
2452                         &rss_conf->rss_key_len);
2453
2454         /* TODO: default set to 0 as hf config is not supported now */
2455         rss_conf->rss_hf = 0;
2456         return 0;
2457 }
2458
2459 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
2460                                     uint16_t queue_id)
2461 {
2462         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2463         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2464         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2465         uint32_t val;
2466         uint16_t msix_intr;
2467
2468         msix_intr = intr_handle->intr_vec[queue_id];
2469
2470         val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
2471               GLINT_DYN_CTL_ITR_INDX_M;
2472         val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
2473
2474         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
2475         rte_intr_enable(&pci_dev->intr_handle);
2476
2477         return 0;
2478 }
2479
2480 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
2481                                      uint16_t queue_id)
2482 {
2483         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2484         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2485         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2486         uint16_t msix_intr;
2487
2488         msix_intr = intr_handle->intr_vec[queue_id];
2489
2490         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);
2491
2492         return 0;
2493 }
2494
2495 static int
2496 ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
2497 {
2498         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2499         int ret;
2500
2501         ret = snprintf(fw_version, fw_size, "%d.%d.%05d %d.%d",
2502                        hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
2503                        hw->api_maj_ver, hw->api_min_ver);
2504
2505         /* add the size of '\0' */
2506         ret += 1;
2507         if (fw_size < (u32)ret)
2508                 return ret;
2509         else
2510                 return 0;
2511 }
2512
2513 static int
2514 ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)
2515 {
2516         struct ice_hw *hw;
2517         struct ice_vsi_ctx ctxt;
2518         uint8_t vlan_flags = 0;
2519         int ret;
2520
2521         if (!vsi || !info) {
2522                 PMD_DRV_LOG(ERR, "invalid parameters");
2523                 return -EINVAL;
2524         }
2525
2526         if (info->on) {
2527                 vsi->info.pvid = info->config.pvid;
2528                 /**
2529                  * If insert pvid is enabled, only tagged pkts are
2530                  * allowed to be sent out.
2531                  */
2532                 vlan_flags = ICE_AQ_VSI_PVLAN_INSERT_PVID |
2533                              ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2534         } else {
2535                 vsi->info.pvid = 0;
2536                 if (info->config.reject.tagged == 0)
2537                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_TAGGED;
2538
2539                 if (info->config.reject.untagged == 0)
2540                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2541         }
2542         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_PVLAN_INSERT_PVID |
2543                                   ICE_AQ_VSI_VLAN_MODE_M);
2544         vsi->info.vlan_flags |= vlan_flags;
2545         memset(&ctxt, 0, sizeof(ctxt));
2546         rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2547         ctxt.info.valid_sections =
2548                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2549         ctxt.vsi_num = vsi->vsi_id;
2550
2551         hw = ICE_VSI_TO_HW(vsi);
2552         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2553         if (ret != ICE_SUCCESS) {
2554                 PMD_DRV_LOG(ERR,
2555                             "update VSI for VLAN insert failed, err %d",
2556                             ret);
2557                 return -EINVAL;
2558         }
2559
2560         vsi->info.valid_sections |=
2561                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2562
2563         return ret;
2564 }
2565
2566 static int
2567 ice_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
2568 {
2569         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2570         struct ice_vsi *vsi = pf->main_vsi;
2571         struct rte_eth_dev_data *data = pf->dev_data;
2572         struct ice_vsi_vlan_pvid_info info;
2573         int ret;
2574
2575         memset(&info, 0, sizeof(info));
2576         info.on = on;
2577         if (info.on) {
2578                 info.config.pvid = pvid;
2579         } else {
2580                 info.config.reject.tagged =
2581                         data->dev_conf.txmode.hw_vlan_reject_tagged;
2582                 info.config.reject.untagged =
2583                         data->dev_conf.txmode.hw_vlan_reject_untagged;
2584         }
2585
2586         ret = ice_vsi_vlan_pvid_set(vsi, &info);
2587         if (ret < 0) {
2588                 PMD_DRV_LOG(ERR, "Failed to set pvid.");
2589                 return -EINVAL;
2590         }
2591
2592         return 0;
2593 }
2594
2595 static int
2596 ice_get_eeprom_length(struct rte_eth_dev *dev)
2597 {
2598         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2599
2600         /* Convert word count to byte count */
2601         return hw->nvm.sr_words << 1;
2602 }
2603
2604 static int
2605 ice_get_eeprom(struct rte_eth_dev *dev,
2606                struct rte_dev_eeprom_info *eeprom)
2607 {
2608         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2609         uint16_t *data = eeprom->data;
2610         uint16_t offset, length, i;
2611         enum ice_status ret_code = ICE_SUCCESS;
2612
2613         offset = eeprom->offset >> 1;
2614         length = eeprom->length >> 1;
2615
2616         if (offset > hw->nvm.sr_words ||
2617             offset + length > hw->nvm.sr_words) {
2618                 PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range.");
2619                 return -EINVAL;
2620         }
2621
2622         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
2623
2624         for (i = 0; i < length; i++) {
2625                 ret_code = ice_read_sr_word(hw, offset + i, &data[i]);
2626                 if (ret_code != ICE_SUCCESS) {
2627                         PMD_DRV_LOG(ERR, "EEPROM read failed.");
2628                         return -EIO;
2629                 }
2630         }
2631
2632         return 0;
2633 }
2634
2635 static int
2636 ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2637               struct rte_pci_device *pci_dev)
2638 {
2639         return rte_eth_dev_pci_generic_probe(pci_dev,
2640                                              sizeof(struct ice_adapter),
2641                                              ice_dev_init);
2642 }
2643
2644 static int
2645 ice_pci_remove(struct rte_pci_device *pci_dev)
2646 {
2647         return rte_eth_dev_pci_generic_remove(pci_dev, ice_dev_uninit);
2648 }
2649
2650 static struct rte_pci_driver rte_ice_pmd = {
2651         .id_table = pci_id_ice_map,
2652         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
2653                      RTE_PCI_DRV_IOVA_AS_VA,
2654         .probe = ice_pci_probe,
2655         .remove = ice_pci_remove,
2656 };
2657
2658 /**
2659  * Driver initialization routine.
2660  * Invoked once at EAL init time.
2661  * Register itself as the [Poll Mode] Driver of PCI devices.
2662  */
2663 RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
2664 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
2665 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
2666 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
2667                               ICE_MAX_QP_NUM "=<int>");
2668
2669 RTE_INIT(ice_init_log)
2670 {
2671         ice_logtype_init = rte_log_register("pmd.net.ice.init");
2672         if (ice_logtype_init >= 0)
2673                 rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
2674         ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
2675         if (ice_logtype_driver >= 0)
2676                 rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
2677 }