drivers/net/ice/ice_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4
   5 #include <rte_string_fns.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include <stdio.h>
   9 #include <sys/types.h>
  10 #include <sys/stat.h>
  11 #include <unistd.h>
  12
  13 #include "base/ice_sched.h"
  14 #include "base/ice_flow.h"
  15 #include "ice_ethdev.h"
  16 #include "ice_rxtx.h"
  17
  18 #define ICE_MAX_QP_NUM "max_queue_pair_num"
  19 #define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100
  20 #define ICE_DFLT_PKG_FILE "/lib/firmware/intel/ice/ddp/ice.pkg"
  21
  22 int ice_logtype_init;
  23 int ice_logtype_driver;
  24
  25 static int ice_dev_configure(struct rte_eth_dev *dev);
  26 static int ice_dev_start(struct rte_eth_dev *dev);
  27 static void ice_dev_stop(struct rte_eth_dev *dev);
  28 static void ice_dev_close(struct rte_eth_dev *dev);
  29 static int ice_dev_reset(struct rte_eth_dev *dev);
  30 static void ice_dev_info_get(struct rte_eth_dev *dev,
  31                              struct rte_eth_dev_info *dev_info);
  32 static int ice_link_update(struct rte_eth_dev *dev,
  33                            int wait_to_complete);
  34 static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  35 static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  36 static int ice_vlan_tpid_set(struct rte_eth_dev *dev,
  37                              enum rte_vlan_type vlan_type,
  38                              uint16_t tpid);
  39 static int ice_rss_reta_update(struct rte_eth_dev *dev,
  40                                struct rte_eth_rss_reta_entry64 *reta_conf,
  41                                uint16_t reta_size);
  42 static int ice_rss_reta_query(struct rte_eth_dev *dev,
  43                               struct rte_eth_rss_reta_entry64 *reta_conf,
  44                               uint16_t reta_size);
  45 static int ice_rss_hash_update(struct rte_eth_dev *dev,
  46                                struct rte_eth_rss_conf *rss_conf);
  47 static int ice_rss_hash_conf_get(struct rte_eth_dev *dev,
  48                                  struct rte_eth_rss_conf *rss_conf);
  49 static void ice_promisc_enable(struct rte_eth_dev *dev);
  50 static void ice_promisc_disable(struct rte_eth_dev *dev);
  51 static void ice_allmulti_enable(struct rte_eth_dev *dev);
  52 static void ice_allmulti_disable(struct rte_eth_dev *dev);
  53 static int ice_vlan_filter_set(struct rte_eth_dev *dev,
  54                                uint16_t vlan_id,
  55                                int on);
  56 static int ice_macaddr_set(struct rte_eth_dev *dev,
  57                            struct ether_addr *mac_addr);
  58 static int ice_macaddr_add(struct rte_eth_dev *dev,
  59                            struct ether_addr *mac_addr,
  60                            __rte_unused uint32_t index,
  61                            uint32_t pool);
  62 static void ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index);
  63 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
  64                                     uint16_t queue_id);
  65 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
  66                                      uint16_t queue_id);
  67 static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
  68                               size_t fw_size);
  69 static int ice_vlan_pvid_set(struct rte_eth_dev *dev,
  70                              uint16_t pvid, int on);
  71 static int ice_get_eeprom_length(struct rte_eth_dev *dev);
  72 static int ice_get_eeprom(struct rte_eth_dev *dev,
  73                           struct rte_dev_eeprom_info *eeprom);
  74 static int ice_stats_get(struct rte_eth_dev *dev,
  75                          struct rte_eth_stats *stats);
  76 static void ice_stats_reset(struct rte_eth_dev *dev);
  77 static int ice_xstats_get(struct rte_eth_dev *dev,
  78                           struct rte_eth_xstat *xstats, unsigned int n);
  79 static int ice_xstats_get_names(struct rte_eth_dev *dev,
  80                                 struct rte_eth_xstat_name *xstats_names,
  81                                 unsigned int limit);
  82
  83 static const struct rte_pci_id pci_id_ice_map[] = {
  84         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },
  85         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) },
  86         { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) },
  87         { .vendor_id = 0, /* sentinel */ },
  88 };
  89
  90 static const struct eth_dev_ops ice_eth_dev_ops = {
  91         .dev_configure                = ice_dev_configure,
  92         .dev_start                    = ice_dev_start,
  93         .dev_stop                     = ice_dev_stop,
  94         .dev_close                    = ice_dev_close,
  95         .dev_reset                    = ice_dev_reset,
  96         .rx_queue_start               = ice_rx_queue_start,
  97         .rx_queue_stop                = ice_rx_queue_stop,
  98         .tx_queue_start               = ice_tx_queue_start,
  99         .tx_queue_stop                = ice_tx_queue_stop,
 100         .rx_queue_setup               = ice_rx_queue_setup,
 101         .rx_queue_release             = ice_rx_queue_release,
 102         .tx_queue_setup               = ice_tx_queue_setup,
 103         .tx_queue_release             = ice_tx_queue_release,
 104         .dev_infos_get                = ice_dev_info_get,
 105         .dev_supported_ptypes_get     = ice_dev_supported_ptypes_get,
 106         .link_update                  = ice_link_update,
 107         .mtu_set                      = ice_mtu_set,
 108         .mac_addr_set                 = ice_macaddr_set,
 109         .mac_addr_add                 = ice_macaddr_add,
 110         .mac_addr_remove              = ice_macaddr_remove,
 111         .vlan_filter_set              = ice_vlan_filter_set,
 112         .vlan_offload_set             = ice_vlan_offload_set,
 113         .vlan_tpid_set                = ice_vlan_tpid_set,
 114         .reta_update                  = ice_rss_reta_update,
 115         .reta_query                   = ice_rss_reta_query,
 116         .rss_hash_update              = ice_rss_hash_update,
 117         .rss_hash_conf_get            = ice_rss_hash_conf_get,
 118         .promiscuous_enable           = ice_promisc_enable,
 119         .promiscuous_disable          = ice_promisc_disable,
 120         .allmulticast_enable          = ice_allmulti_enable,
 121         .allmulticast_disable         = ice_allmulti_disable,
 122         .rx_queue_intr_enable         = ice_rx_queue_intr_enable,
 123         .rx_queue_intr_disable        = ice_rx_queue_intr_disable,
 124         .fw_version_get               = ice_fw_version_get,
 125         .vlan_pvid_set                = ice_vlan_pvid_set,
 126         .rxq_info_get                 = ice_rxq_info_get,
 127         .txq_info_get                 = ice_txq_info_get,
 128         .get_eeprom_length            = ice_get_eeprom_length,
 129         .get_eeprom                   = ice_get_eeprom,
 130         .rx_queue_count               = ice_rx_queue_count,
 131         .rx_descriptor_status         = ice_rx_descriptor_status,
 132         .tx_descriptor_status         = ice_tx_descriptor_status,
 133         .stats_get                    = ice_stats_get,
 134         .stats_reset                  = ice_stats_reset,
 135         .xstats_get                   = ice_xstats_get,
 136         .xstats_get_names             = ice_xstats_get_names,
 137         .xstats_reset                 = ice_stats_reset,
 138 };
 139
 140 /* store statistics names and its offset in stats structure */
 141 struct ice_xstats_name_off {
 142         char name[RTE_ETH_XSTATS_NAME_SIZE];
 143         unsigned int offset;
 144 };
 145
 146 static const struct ice_xstats_name_off ice_stats_strings[] = {
 147         {"rx_unicast_packets", offsetof(struct ice_eth_stats, rx_unicast)},
 148         {"rx_multicast_packets", offsetof(struct ice_eth_stats, rx_multicast)},
 149         {"rx_broadcast_packets", offsetof(struct ice_eth_stats, rx_broadcast)},
 150         {"rx_dropped", offsetof(struct ice_eth_stats, rx_discards)},
 151         {"rx_unknown_protocol_packets", offsetof(struct ice_eth_stats,
 152                 rx_unknown_protocol)},
 153         {"tx_unicast_packets", offsetof(struct ice_eth_stats, tx_unicast)},
 154         {"tx_multicast_packets", offsetof(struct ice_eth_stats, tx_multicast)},
 155         {"tx_broadcast_packets", offsetof(struct ice_eth_stats, tx_broadcast)},
 156         {"tx_dropped", offsetof(struct ice_eth_stats, tx_discards)},
 157 };
 158
 159 #define ICE_NB_ETH_XSTATS (sizeof(ice_stats_strings) / \
 160                 sizeof(ice_stats_strings[0]))
 161
 162 static const struct ice_xstats_name_off ice_hw_port_strings[] = {
 163         {"tx_link_down_dropped", offsetof(struct ice_hw_port_stats,
 164                 tx_dropped_link_down)},
 165         {"rx_crc_errors", offsetof(struct ice_hw_port_stats, crc_errors)},
 166         {"rx_illegal_byte_errors", offsetof(struct ice_hw_port_stats,
 167                 illegal_bytes)},
 168         {"rx_error_bytes", offsetof(struct ice_hw_port_stats, error_bytes)},
 169         {"mac_local_errors", offsetof(struct ice_hw_port_stats,
 170                 mac_local_faults)},
 171         {"mac_remote_errors", offsetof(struct ice_hw_port_stats,
 172                 mac_remote_faults)},
 173         {"rx_len_errors", offsetof(struct ice_hw_port_stats,
 174                 rx_len_errors)},
 175         {"tx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_tx)},
 176         {"rx_xon_packets", offsetof(struct ice_hw_port_stats, link_xon_rx)},
 177         {"tx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_tx)},
 178         {"rx_xoff_packets", offsetof(struct ice_hw_port_stats, link_xoff_rx)},
 179         {"rx_size_64_packets", offsetof(struct ice_hw_port_stats, rx_size_64)},
 180         {"rx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 181                 rx_size_127)},
 182         {"rx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 183                 rx_size_255)},
 184         {"rx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 185                 rx_size_511)},
 186         {"rx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 187                 rx_size_1023)},
 188         {"rx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 189                 rx_size_1522)},
 190         {"rx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 191                 rx_size_big)},
 192         {"rx_undersized_errors", offsetof(struct ice_hw_port_stats,
 193                 rx_undersize)},
 194         {"rx_oversize_errors", offsetof(struct ice_hw_port_stats,
 195                 rx_oversize)},
 196         {"rx_mac_short_pkt_dropped", offsetof(struct ice_hw_port_stats,
 197                 mac_short_pkt_dropped)},
 198         {"rx_fragmented_errors", offsetof(struct ice_hw_port_stats,
 199                 rx_fragments)},
 200         {"rx_jabber_errors", offsetof(struct ice_hw_port_stats, rx_jabber)},
 201         {"tx_size_64_packets", offsetof(struct ice_hw_port_stats, tx_size_64)},
 202         {"tx_size_65_to_127_packets", offsetof(struct ice_hw_port_stats,
 203                 tx_size_127)},
 204         {"tx_size_128_to_255_packets", offsetof(struct ice_hw_port_stats,
 205                 tx_size_255)},
 206         {"tx_size_256_to_511_packets", offsetof(struct ice_hw_port_stats,
 207                 tx_size_511)},
 208         {"tx_size_512_to_1023_packets", offsetof(struct ice_hw_port_stats,
 209                 tx_size_1023)},
 210         {"tx_size_1024_to_1522_packets", offsetof(struct ice_hw_port_stats,
 211                 tx_size_1522)},
 212         {"tx_size_1523_to_max_packets", offsetof(struct ice_hw_port_stats,
 213                 tx_size_big)},
 214 };
 215
 216 #define ICE_NB_HW_PORT_XSTATS (sizeof(ice_hw_port_strings) / \
 217                 sizeof(ice_hw_port_strings[0]))
 218
 219 static void
 220 ice_init_controlq_parameter(struct ice_hw *hw)
 221 {
 222         /* fields for adminq */
 223         hw->adminq.num_rq_entries = ICE_ADMINQ_LEN;
 224         hw->adminq.num_sq_entries = ICE_ADMINQ_LEN;
 225         hw->adminq.rq_buf_size = ICE_ADMINQ_BUF_SZ;
 226         hw->adminq.sq_buf_size = ICE_ADMINQ_BUF_SZ;
 227
 228         /* fields for mailboxq, DPDK used as PF host */
 229         hw->mailboxq.num_rq_entries = ICE_MAILBOXQ_LEN;
 230         hw->mailboxq.num_sq_entries = ICE_MAILBOXQ_LEN;
 231         hw->mailboxq.rq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 232         hw->mailboxq.sq_buf_size = ICE_MAILBOXQ_BUF_SZ;
 233 }
 234
 235 static int
 236 ice_check_qp_num(const char *key, const char *qp_value,
 237                  __rte_unused void *opaque)
 238 {
 239         char *end = NULL;
 240         int num = 0;
 241
 242         while (isblank(*qp_value))
 243                 qp_value++;
 244
 245         num = strtoul(qp_value, &end, 10);
 246
 247         if (!num || (*end == '-') || errno) {
 248                 PMD_DRV_LOG(WARNING, "invalid value:\"%s\" for key:\"%s\", "
 249                             "value must be > 0",
 250                             qp_value, key);
 251                 return -1;
 252         }
 253
 254         return num;
 255 }
 256
 257 static int
 258 ice_config_max_queue_pair_num(struct rte_devargs *devargs)
 259 {
 260         struct rte_kvargs *kvlist;
 261         const char *queue_num_key = ICE_MAX_QP_NUM;
 262         int ret;
 263
 264         if (!devargs)
 265                 return 0;
 266
 267         kvlist = rte_kvargs_parse(devargs->args, NULL);
 268         if (!kvlist)
 269                 return 0;
 270
 271         if (!rte_kvargs_count(kvlist, queue_num_key)) {
 272                 rte_kvargs_free(kvlist);
 273                 return 0;
 274         }
 275
 276         if (rte_kvargs_process(kvlist, queue_num_key,
 277                                ice_check_qp_num, NULL) < 0) {
 278                 rte_kvargs_free(kvlist);
 279                 return 0;
 280         }
 281         ret = rte_kvargs_process(kvlist, queue_num_key,
 282                                  ice_check_qp_num, NULL);
 283         rte_kvargs_free(kvlist);
 284
 285         return ret;
 286 }
 287
 288 static int
 289 ice_res_pool_init(struct ice_res_pool_info *pool, uint32_t base,
 290                   uint32_t num)
 291 {
 292         struct pool_entry *entry;
 293
 294         if (!pool || !num)
 295                 return -EINVAL;
 296
 297         entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 298         if (!entry) {
 299                 PMD_INIT_LOG(ERR,
 300                              "Failed to allocate memory for resource pool");
 301                 return -ENOMEM;
 302         }
 303
 304         /* queue heap initialize */
 305         pool->num_free = num;
 306         pool->num_alloc = 0;
 307         pool->base = base;
 308         LIST_INIT(&pool->alloc_list);
 309         LIST_INIT(&pool->free_list);
 310
 311         /* Initialize element  */
 312         entry->base = 0;
 313         entry->len = num;
 314
 315         LIST_INSERT_HEAD(&pool->free_list, entry, next);
 316         return 0;
 317 }
 318
 319 static int
 320 ice_res_pool_alloc(struct ice_res_pool_info *pool,
 321                    uint16_t num)
 322 {
 323         struct pool_entry *entry, *valid_entry;
 324
 325         if (!pool || !num) {
 326                 PMD_INIT_LOG(ERR, "Invalid parameter");
 327                 return -EINVAL;
 328         }
 329
 330         if (pool->num_free < num) {
 331                 PMD_INIT_LOG(ERR, "No resource. ask:%u, available:%u",
 332                              num, pool->num_free);
 333                 return -ENOMEM;
 334         }
 335
 336         valid_entry = NULL;
 337         /* Lookup  in free list and find most fit one */
 338         LIST_FOREACH(entry, &pool->free_list, next) {
 339                 if (entry->len >= num) {
 340                         /* Find best one */
 341                         if (entry->len == num) {
 342                                 valid_entry = entry;
 343                                 break;
 344                         }
 345                         if (!valid_entry ||
 346                             valid_entry->len > entry->len)
 347                                 valid_entry = entry;
 348                 }
 349         }
 350
 351         /* Not find one to satisfy the request, return */
 352         if (!valid_entry) {
 353                 PMD_INIT_LOG(ERR, "No valid entry found");
 354                 return -ENOMEM;
 355         }
 356         /**
 357          * The entry have equal queue number as requested,
 358          * remove it from alloc_list.
 359          */
 360         if (valid_entry->len == num) {
 361                 LIST_REMOVE(valid_entry, next);
 362         } else {
 363                 /**
 364                  * The entry have more numbers than requested,
 365                  * create a new entry for alloc_list and minus its
 366                  * queue base and number in free_list.
 367                  */
 368                 entry = rte_zmalloc(NULL, sizeof(*entry), 0);
 369                 if (!entry) {
 370                         PMD_INIT_LOG(ERR,
 371                                      "Failed to allocate memory for "
 372                                      "resource pool");
 373                         return -ENOMEM;
 374                 }
 375                 entry->base = valid_entry->base;
 376                 entry->len = num;
 377                 valid_entry->base += num;
 378                 valid_entry->len -= num;
 379                 valid_entry = entry;
 380         }
 381
 382         /* Insert it into alloc list, not sorted */
 383         LIST_INSERT_HEAD(&pool->alloc_list, valid_entry, next);
 384
 385         pool->num_free -= valid_entry->len;
 386         pool->num_alloc += valid_entry->len;
 387
 388         return valid_entry->base + pool->base;
 389 }
 390
 391 static void
 392 ice_res_pool_destroy(struct ice_res_pool_info *pool)
 393 {
 394         struct pool_entry *entry, *next_entry;
 395
 396         if (!pool)
 397                 return;
 398
 399         for (entry = LIST_FIRST(&pool->alloc_list);
 400              entry && (next_entry = LIST_NEXT(entry, next), 1);
 401              entry = next_entry) {
 402                 LIST_REMOVE(entry, next);
 403                 rte_free(entry);
 404         }
 405
 406         for (entry = LIST_FIRST(&pool->free_list);
 407              entry && (next_entry = LIST_NEXT(entry, next), 1);
 408              entry = next_entry) {
 409                 LIST_REMOVE(entry, next);
 410                 rte_free(entry);
 411         }
 412
 413         pool->num_free = 0;
 414         pool->num_alloc = 0;
 415         pool->base = 0;
 416         LIST_INIT(&pool->alloc_list);
 417         LIST_INIT(&pool->free_list);
 418 }
 419
 420 static void
 421 ice_vsi_config_default_rss(struct ice_aqc_vsi_props *info)
 422 {
 423         /* Set VSI LUT selection */
 424         info->q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI &
 425                           ICE_AQ_VSI_Q_OPT_RSS_LUT_M;
 426         /* Set Hash scheme */
 427         info->q_opt_rss |= ICE_AQ_VSI_Q_OPT_RSS_TPLZ &
 428                            ICE_AQ_VSI_Q_OPT_RSS_HASH_M;
 429         /* enable TC */
 430         info->q_opt_tc = ICE_AQ_VSI_Q_OPT_TC_OVR_M;
 431 }
 432
 433 static enum ice_status
 434 ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi,
 435                                 struct ice_aqc_vsi_props *info,
 436                                 uint8_t enabled_tcmap)
 437 {
 438         uint16_t bsf, qp_idx;
 439
 440         /* default tc 0 now. Multi-TC supporting need to be done later.
 441          * Configure TC and queue mapping parameters, for enabled TC,
 442          * allocate qpnum_per_tc queues to this traffic.
 443          */
 444         if (enabled_tcmap != 0x01) {
 445                 PMD_INIT_LOG(ERR, "only TC0 is supported");
 446                 return -ENOTSUP;
 447         }
 448
 449         vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC);
 450         bsf = rte_bsf32(vsi->nb_qps);
 451         /* Adjust the queue number to actual queues that can be applied */
 452         vsi->nb_qps = 0x1 << bsf;
 453
 454         qp_idx = 0;
 455         /* Set tc and queue mapping with VSI */
 456         info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx <<
 457                                                 ICE_AQ_VSI_TC_Q_OFFSET_S) |
 458                                                (bsf << ICE_AQ_VSI_TC_Q_NUM_S));
 459
 460         /* Associate queue number with VSI */
 461         info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG);
 462         info->q_mapping[0] = rte_cpu_to_le_16(vsi->base_queue);
 463         info->q_mapping[1] = rte_cpu_to_le_16(vsi->nb_qps);
 464         info->valid_sections |=
 465                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
 466         /* Set the info.ingress_table and info.egress_table
 467          * for UP translate table. Now just set it to 1:1 map by default
 468          * -- 0b 111 110 101 100 011 010 001 000 == 0xFAC688
 469          */
 470 #define ICE_TC_QUEUE_TABLE_DFLT 0x00FAC688
 471         info->ingress_table  = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 472         info->egress_table   = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 473         info->outer_up_table = rte_cpu_to_le_32(ICE_TC_QUEUE_TABLE_DFLT);
 474         return 0;
 475 }
 476
 477 static int
 478 ice_init_mac_address(struct rte_eth_dev *dev)
 479 {
 480         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 481
 482         if (!is_unicast_ether_addr
 483                 ((struct ether_addr *)hw->port_info[0].mac.lan_addr)) {
 484                 PMD_INIT_LOG(ERR, "Invalid MAC address");
 485                 return -EINVAL;
 486         }
 487
 488         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.lan_addr,
 489                         (struct ether_addr *)hw->port_info[0].mac.perm_addr);
 490
 491         dev->data->mac_addrs = rte_zmalloc(NULL, sizeof(struct ether_addr), 0);
 492         if (!dev->data->mac_addrs) {
 493                 PMD_INIT_LOG(ERR,
 494                              "Failed to allocate memory to store mac address");
 495                 return -ENOMEM;
 496         }
 497         /* store it to dev data */
 498         ether_addr_copy((struct ether_addr *)hw->port_info[0].mac.perm_addr,
 499                         &dev->data->mac_addrs[0]);
 500         return 0;
 501 }
 502
 503 /* Find out specific MAC filter */
 504 static struct ice_mac_filter *
 505 ice_find_mac_filter(struct ice_vsi *vsi, struct ether_addr *macaddr)
 506 {
 507         struct ice_mac_filter *f;
 508
 509         TAILQ_FOREACH(f, &vsi->mac_list, next) {
 510                 if (is_same_ether_addr(macaddr, &f->mac_info.mac_addr))
 511                         return f;
 512         }
 513
 514         return NULL;
 515 }
 516
 517 static int
 518 ice_add_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 519 {
 520         struct ice_fltr_list_entry *m_list_itr = NULL;
 521         struct ice_mac_filter *f;
 522         struct LIST_HEAD_TYPE list_head;
 523         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 524         int ret = 0;
 525
 526         /* If it's added and configured, return */
 527         f = ice_find_mac_filter(vsi, mac_addr);
 528         if (f) {
 529                 PMD_DRV_LOG(INFO, "This MAC filter already exists.");
 530                 return 0;
 531         }
 532
 533         INIT_LIST_HEAD(&list_head);
 534
 535         m_list_itr = (struct ice_fltr_list_entry *)
 536                 ice_malloc(hw, sizeof(*m_list_itr));
 537         if (!m_list_itr) {
 538                 ret = -ENOMEM;
 539                 goto DONE;
 540         }
 541         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 542                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 543         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 544         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 545         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 546         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 547         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 548
 549         LIST_ADD(&m_list_itr->list_entry, &list_head);
 550
 551         /* Add the mac */
 552         ret = ice_add_mac(hw, &list_head);
 553         if (ret != ICE_SUCCESS) {
 554                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
 555                 ret = -EINVAL;
 556                 goto DONE;
 557         }
 558         /* Add the mac addr into mac list */
 559         f = rte_zmalloc(NULL, sizeof(*f), 0);
 560         if (!f) {
 561                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 562                 ret = -ENOMEM;
 563                 goto DONE;
 564         }
 565         rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN);
 566         TAILQ_INSERT_TAIL(&vsi->mac_list, f, next);
 567         vsi->mac_num++;
 568
 569         ret = 0;
 570
 571 DONE:
 572         rte_free(m_list_itr);
 573         return ret;
 574 }
 575
 576 static int
 577 ice_remove_mac_filter(struct ice_vsi *vsi, struct ether_addr *mac_addr)
 578 {
 579         struct ice_fltr_list_entry *m_list_itr = NULL;
 580         struct ice_mac_filter *f;
 581         struct LIST_HEAD_TYPE list_head;
 582         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 583         int ret = 0;
 584
 585         /* Can't find it, return an error */
 586         f = ice_find_mac_filter(vsi, mac_addr);
 587         if (!f)
 588                 return -EINVAL;
 589
 590         INIT_LIST_HEAD(&list_head);
 591
 592         m_list_itr = (struct ice_fltr_list_entry *)
 593                 ice_malloc(hw, sizeof(*m_list_itr));
 594         if (!m_list_itr) {
 595                 ret = -ENOMEM;
 596                 goto DONE;
 597         }
 598         ice_memcpy(m_list_itr->fltr_info.l_data.mac.mac_addr,
 599                    mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
 600         m_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 601         m_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 602         m_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_MAC;
 603         m_list_itr->fltr_info.flag = ICE_FLTR_TX;
 604         m_list_itr->fltr_info.vsi_handle = vsi->idx;
 605
 606         LIST_ADD(&m_list_itr->list_entry, &list_head);
 607
 608         /* remove the mac filter */
 609         ret = ice_remove_mac(hw, &list_head);
 610         if (ret != ICE_SUCCESS) {
 611                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
 612                 ret = -EINVAL;
 613                 goto DONE;
 614         }
 615
 616         /* Remove the mac addr from mac list */
 617         TAILQ_REMOVE(&vsi->mac_list, f, next);
 618         rte_free(f);
 619         vsi->mac_num--;
 620
 621         ret = 0;
 622 DONE:
 623         rte_free(m_list_itr);
 624         return ret;
 625 }
 626
 627 /* Find out specific VLAN filter */
 628 static struct ice_vlan_filter *
 629 ice_find_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 630 {
 631         struct ice_vlan_filter *f;
 632
 633         TAILQ_FOREACH(f, &vsi->vlan_list, next) {
 634                 if (vlan_id == f->vlan_info.vlan_id)
 635                         return f;
 636         }
 637
 638         return NULL;
 639 }
 640
 641 static int
 642 ice_add_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 643 {
 644         struct ice_fltr_list_entry *v_list_itr = NULL;
 645         struct ice_vlan_filter *f;
 646         struct LIST_HEAD_TYPE list_head;
 647         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 648         int ret = 0;
 649
 650         if (!vsi || vlan_id > ETHER_MAX_VLAN_ID)
 651                 return -EINVAL;
 652
 653         /* If it's added and configured, return. */
 654         f = ice_find_vlan_filter(vsi, vlan_id);
 655         if (f) {
 656                 PMD_DRV_LOG(INFO, "This VLAN filter already exists.");
 657                 return 0;
 658         }
 659
 660         if (!vsi->vlan_anti_spoof_on && !vsi->vlan_filter_on)
 661                 return 0;
 662
 663         INIT_LIST_HEAD(&list_head);
 664
 665         v_list_itr = (struct ice_fltr_list_entry *)
 666                       ice_malloc(hw, sizeof(*v_list_itr));
 667         if (!v_list_itr) {
 668                 ret = -ENOMEM;
 669                 goto DONE;
 670         }
 671         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 672         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 673         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 674         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 675         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 676         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 677
 678         LIST_ADD(&v_list_itr->list_entry, &list_head);
 679
 680         /* Add the vlan */
 681         ret = ice_add_vlan(hw, &list_head);
 682         if (ret != ICE_SUCCESS) {
 683                 PMD_DRV_LOG(ERR, "Failed to add VLAN filter");
 684                 ret = -EINVAL;
 685                 goto DONE;
 686         }
 687
 688         /* Add vlan into vlan list */
 689         f = rte_zmalloc(NULL, sizeof(*f), 0);
 690         if (!f) {
 691                 PMD_DRV_LOG(ERR, "failed to allocate memory");
 692                 ret = -ENOMEM;
 693                 goto DONE;
 694         }
 695         f->vlan_info.vlan_id = vlan_id;
 696         TAILQ_INSERT_TAIL(&vsi->vlan_list, f, next);
 697         vsi->vlan_num++;
 698
 699         ret = 0;
 700
 701 DONE:
 702         rte_free(v_list_itr);
 703         return ret;
 704 }
 705
 706 static int
 707 ice_remove_vlan_filter(struct ice_vsi *vsi, uint16_t vlan_id)
 708 {
 709         struct ice_fltr_list_entry *v_list_itr = NULL;
 710         struct ice_vlan_filter *f;
 711         struct LIST_HEAD_TYPE list_head;
 712         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 713         int ret = 0;
 714
 715         /**
 716          * Vlan 0 is the generic filter for untagged packets
 717          * and can't be removed.
 718          */
 719         if (!vsi || vlan_id == 0 || vlan_id > ETHER_MAX_VLAN_ID)
 720                 return -EINVAL;
 721
 722         /* Can't find it, return an error */
 723         f = ice_find_vlan_filter(vsi, vlan_id);
 724         if (!f)
 725                 return -EINVAL;
 726
 727         INIT_LIST_HEAD(&list_head);
 728
 729         v_list_itr = (struct ice_fltr_list_entry *)
 730                       ice_malloc(hw, sizeof(*v_list_itr));
 731         if (!v_list_itr) {
 732                 ret = -ENOMEM;
 733                 goto DONE;
 734         }
 735
 736         v_list_itr->fltr_info.l_data.vlan.vlan_id = vlan_id;
 737         v_list_itr->fltr_info.src_id = ICE_SRC_ID_VSI;
 738         v_list_itr->fltr_info.fltr_act = ICE_FWD_TO_VSI;
 739         v_list_itr->fltr_info.lkup_type = ICE_SW_LKUP_VLAN;
 740         v_list_itr->fltr_info.flag = ICE_FLTR_TX;
 741         v_list_itr->fltr_info.vsi_handle = vsi->idx;
 742
 743         LIST_ADD(&v_list_itr->list_entry, &list_head);
 744
 745         /* remove the vlan filter */
 746         ret = ice_remove_vlan(hw, &list_head);
 747         if (ret != ICE_SUCCESS) {
 748                 PMD_DRV_LOG(ERR, "Failed to remove VLAN filter");
 749                 ret = -EINVAL;
 750                 goto DONE;
 751         }
 752
 753         /* Remove the vlan id from vlan list */
 754         TAILQ_REMOVE(&vsi->vlan_list, f, next);
 755         rte_free(f);
 756         vsi->vlan_num--;
 757
 758         ret = 0;
 759 DONE:
 760         rte_free(v_list_itr);
 761         return ret;
 762 }
 763
 764 static int
 765 ice_remove_all_mac_vlan_filters(struct ice_vsi *vsi)
 766 {
 767         struct ice_mac_filter *m_f;
 768         struct ice_vlan_filter *v_f;
 769         int ret = 0;
 770
 771         if (!vsi || !vsi->mac_num)
 772                 return -EINVAL;
 773
 774         TAILQ_FOREACH(m_f, &vsi->mac_list, next) {
 775                 ret = ice_remove_mac_filter(vsi, &m_f->mac_info.mac_addr);
 776                 if (ret != ICE_SUCCESS) {
 777                         ret = -EINVAL;
 778                         goto DONE;
 779                 }
 780         }
 781
 782         if (vsi->vlan_num == 0)
 783                 return 0;
 784
 785         TAILQ_FOREACH(v_f, &vsi->vlan_list, next) {
 786                 ret = ice_remove_vlan_filter(vsi, v_f->vlan_info.vlan_id);
 787                 if (ret != ICE_SUCCESS) {
 788                         ret = -EINVAL;
 789                         goto DONE;
 790                 }
 791         }
 792
 793 DONE:
 794         return ret;
 795 }
 796
 797 static int
 798 ice_vsi_config_qinq_insertion(struct ice_vsi *vsi, bool on)
 799 {
 800         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 801         struct ice_vsi_ctx ctxt;
 802         uint8_t qinq_flags;
 803         int ret = 0;
 804
 805         /* Check if it has been already on or off */
 806         if (vsi->info.valid_sections &
 807                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 808                 if (on) {
 809                         if ((vsi->info.outer_tag_flags &
 810                              ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST) ==
 811                             ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST)
 812                                 return 0; /* already on */
 813                 } else {
 814                         if (!(vsi->info.outer_tag_flags &
 815                               ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST))
 816                                 return 0; /* already off */
 817                 }
 818         }
 819
 820         if (on)
 821                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST;
 822         else
 823                 qinq_flags = 0;
 824         /* clear global insertion and use per packet insertion */
 825         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_INSERT);
 826         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST);
 827         vsi->info.outer_tag_flags |= qinq_flags;
 828         /* use default vlan type 0x8100 */
 829         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 830         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 831                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 832         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 833         ctxt.info.valid_sections =
 834                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 835         ctxt.vsi_num = vsi->vsi_id;
 836         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 837         if (ret) {
 838                 PMD_DRV_LOG(INFO,
 839                             "Update VSI failed to %s qinq stripping",
 840                             on ? "enable" : "disable");
 841                 return -EINVAL;
 842         }
 843
 844         vsi->info.valid_sections |=
 845                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 846
 847         return ret;
 848 }
 849
 850 static int
 851 ice_vsi_config_qinq_stripping(struct ice_vsi *vsi, bool on)
 852 {
 853         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
 854         struct ice_vsi_ctx ctxt;
 855         uint8_t qinq_flags;
 856         int ret = 0;
 857
 858         /* Check if it has been already on or off */
 859         if (vsi->info.valid_sections &
 860                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID)) {
 861                 if (on) {
 862                         if ((vsi->info.outer_tag_flags &
 863                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 864                             ICE_AQ_VSI_OUTER_TAG_COPY)
 865                                 return 0; /* already on */
 866                 } else {
 867                         if ((vsi->info.outer_tag_flags &
 868                              ICE_AQ_VSI_OUTER_TAG_MODE_M) ==
 869                             ICE_AQ_VSI_OUTER_TAG_NOTHING)
 870                                 return 0; /* already off */
 871                 }
 872         }
 873
 874         if (on)
 875                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_COPY;
 876         else
 877                 qinq_flags = ICE_AQ_VSI_OUTER_TAG_NOTHING;
 878         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_MODE_M);
 879         vsi->info.outer_tag_flags |= qinq_flags;
 880         /* use default vlan type 0x8100 */
 881         vsi->info.outer_tag_flags &= ~(ICE_AQ_VSI_OUTER_TAG_TYPE_M);
 882         vsi->info.outer_tag_flags |= ICE_DFLT_OUTER_TAG_TYPE <<
 883                                      ICE_AQ_VSI_OUTER_TAG_TYPE_S;
 884         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
 885         ctxt.info.valid_sections =
 886                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 887         ctxt.vsi_num = vsi->vsi_id;
 888         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
 889         if (ret) {
 890                 PMD_DRV_LOG(INFO,
 891                             "Update VSI failed to %s qinq stripping",
 892                             on ? "enable" : "disable");
 893                 return -EINVAL;
 894         }
 895
 896         vsi->info.valid_sections |=
 897                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_OUTER_TAG_VALID);
 898
 899         return ret;
 900 }
 901
 902 static int
 903 ice_vsi_config_double_vlan(struct ice_vsi *vsi, int on)
 904 {
 905         int ret;
 906
 907         ret = ice_vsi_config_qinq_stripping(vsi, on);
 908         if (ret)
 909                 PMD_DRV_LOG(ERR, "Fail to set qinq stripping - %d", ret);
 910
 911         ret = ice_vsi_config_qinq_insertion(vsi, on);
 912         if (ret)
 913                 PMD_DRV_LOG(ERR, "Fail to set qinq insertion - %d", ret);
 914
 915         return ret;
 916 }
 917
 918 /* Enable IRQ0 */
 919 static void
 920 ice_pf_enable_irq0(struct ice_hw *hw)
 921 {
 922         /* reset the registers */
 923         ICE_WRITE_REG(hw, PFINT_OICR_ENA, 0);
 924         ICE_READ_REG(hw, PFINT_OICR);
 925
 926 #ifdef ICE_LSE_SPT
 927         ICE_WRITE_REG(hw, PFINT_OICR_ENA,
 928                       (uint32_t)(PFINT_OICR_ENA_INT_ENA_M &
 929                                  (~PFINT_OICR_LINK_STAT_CHANGE_M)));
 930
 931         ICE_WRITE_REG(hw, PFINT_OICR_CTL,
 932                       (0 & PFINT_OICR_CTL_MSIX_INDX_M) |
 933                       ((0 << PFINT_OICR_CTL_ITR_INDX_S) &
 934                        PFINT_OICR_CTL_ITR_INDX_M) |
 935                       PFINT_OICR_CTL_CAUSE_ENA_M);
 936
 937         ICE_WRITE_REG(hw, PFINT_FW_CTL,
 938                       (0 & PFINT_FW_CTL_MSIX_INDX_M) |
 939                       ((0 << PFINT_FW_CTL_ITR_INDX_S) &
 940                        PFINT_FW_CTL_ITR_INDX_M) |
 941                       PFINT_FW_CTL_CAUSE_ENA_M);
 942 #else
 943         ICE_WRITE_REG(hw, PFINT_OICR_ENA, PFINT_OICR_ENA_INT_ENA_M);
 944 #endif
 945
 946         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
 947                       GLINT_DYN_CTL_INTENA_M |
 948                       GLINT_DYN_CTL_CLEARPBA_M |
 949                       GLINT_DYN_CTL_ITR_INDX_M);
 950
 951         ice_flush(hw);
 952 }
 953
 954 /* Disable IRQ0 */
 955 static void
 956 ice_pf_disable_irq0(struct ice_hw *hw)
 957 {
 958         /* Disable all interrupt types */
 959         ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
 960         ice_flush(hw);
 961 }
 962
 963 #ifdef ICE_LSE_SPT
 964 static void
 965 ice_handle_aq_msg(struct rte_eth_dev *dev)
 966 {
 967         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 968         struct ice_ctl_q_info *cq = &hw->adminq;
 969         struct ice_rq_event_info event;
 970         uint16_t pending, opcode;
 971         int ret;
 972
 973         event.buf_len = ICE_AQ_MAX_BUF_LEN;
 974         event.msg_buf = rte_zmalloc(NULL, event.buf_len, 0);
 975         if (!event.msg_buf) {
 976                 PMD_DRV_LOG(ERR, "Failed to allocate mem");
 977                 return;
 978         }
 979
 980         pending = 1;
 981         while (pending) {
 982                 ret = ice_clean_rq_elem(hw, cq, &event, &pending);
 983
 984                 if (ret != ICE_SUCCESS) {
 985                         PMD_DRV_LOG(INFO,
 986                                     "Failed to read msg from AdminQ, "
 987                                     "adminq_err: %u",
 988                                     hw->adminq.sq_last_status);
 989                         break;
 990                 }
 991                 opcode = rte_le_to_cpu_16(event.desc.opcode);
 992
 993                 switch (opcode) {
 994                 case ice_aqc_opc_get_link_status:
 995                         ret = ice_link_update(dev, 0);
 996                         if (!ret)
 997                                 _rte_eth_dev_callback_process
 998                                         (dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 999                         break;
1000                 default:
1001                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1002                                     opcode);
1003                         break;
1004                 }
1005         }
1006         rte_free(event.msg_buf);
1007 }
1008 #endif
1009
1010 /**
1011  * Interrupt handler triggered by NIC for handling
1012  * specific interrupt.
1013  *
1014  * @param handle
1015  *  Pointer to interrupt handle.
1016  * @param param
1017  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1018  *
1019  * @return
1020  *  void
1021  */
1022 static void
1023 ice_interrupt_handler(void *param)
1024 {
1025         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1026         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1027         uint32_t oicr;
1028         uint32_t reg;
1029         uint8_t pf_num;
1030         uint8_t event;
1031         uint16_t queue;
1032 #ifdef ICE_LSE_SPT
1033         uint32_t int_fw_ctl;
1034 #endif
1035
1036         /* Disable interrupt */
1037         ice_pf_disable_irq0(hw);
1038
1039         /* read out interrupt causes */
1040         oicr = ICE_READ_REG(hw, PFINT_OICR);
1041 #ifdef ICE_LSE_SPT
1042         int_fw_ctl = ICE_READ_REG(hw, PFINT_FW_CTL);
1043 #endif
1044
1045         /* No interrupt event indicated */
1046         if (!(oicr & PFINT_OICR_INTEVENT_M)) {
1047                 PMD_DRV_LOG(INFO, "No interrupt event");
1048                 goto done;
1049         }
1050
1051 #ifdef ICE_LSE_SPT
1052         if (int_fw_ctl & PFINT_FW_CTL_INTEVENT_M) {
1053                 PMD_DRV_LOG(INFO, "FW_CTL: link state change event");
1054                 ice_handle_aq_msg(dev);
1055         }
1056 #else
1057         if (oicr & PFINT_OICR_LINK_STAT_CHANGE_M) {
1058                 PMD_DRV_LOG(INFO, "OICR: link state change event");
1059                 ice_link_update(dev, 0);
1060         }
1061 #endif
1062
1063         if (oicr & PFINT_OICR_MAL_DETECT_M) {
1064                 PMD_DRV_LOG(WARNING, "OICR: MDD event");
1065                 reg = ICE_READ_REG(hw, GL_MDET_TX_PQM);
1066                 if (reg & GL_MDET_TX_PQM_VALID_M) {
1067                         pf_num = (reg & GL_MDET_TX_PQM_PF_NUM_M) >>
1068                                  GL_MDET_TX_PQM_PF_NUM_S;
1069                         event = (reg & GL_MDET_TX_PQM_MAL_TYPE_M) >>
1070                                 GL_MDET_TX_PQM_MAL_TYPE_S;
1071                         queue = (reg & GL_MDET_TX_PQM_QNUM_M) >>
1072                                 GL_MDET_TX_PQM_QNUM_S;
1073
1074                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1075                                     "%d by PQM on TX queue %d PF# %d",
1076                                     event, queue, pf_num);
1077                 }
1078
1079                 reg = ICE_READ_REG(hw, GL_MDET_TX_TCLAN);
1080                 if (reg & GL_MDET_TX_TCLAN_VALID_M) {
1081                         pf_num = (reg & GL_MDET_TX_TCLAN_PF_NUM_M) >>
1082                                  GL_MDET_TX_TCLAN_PF_NUM_S;
1083                         event = (reg & GL_MDET_TX_TCLAN_MAL_TYPE_M) >>
1084                                 GL_MDET_TX_TCLAN_MAL_TYPE_S;
1085                         queue = (reg & GL_MDET_TX_TCLAN_QNUM_M) >>
1086                                 GL_MDET_TX_TCLAN_QNUM_S;
1087
1088                         PMD_DRV_LOG(WARNING, "Malicious Driver Detection event "
1089                                     "%d by TCLAN on TX queue %d PF# %d",
1090                                     event, queue, pf_num);
1091                 }
1092         }
1093 done:
1094         /* Enable interrupt */
1095         ice_pf_enable_irq0(hw);
1096         rte_intr_enable(dev->intr_handle);
1097 }
1098
1099 /*  Initialize SW parameters of PF */
1100 static int
1101 ice_pf_sw_init(struct rte_eth_dev *dev)
1102 {
1103         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1104         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1105
1106         if (ice_config_max_queue_pair_num(dev->device->devargs) > 0)
1107                 pf->lan_nb_qp_max =
1108                         ice_config_max_queue_pair_num(dev->device->devargs);
1109         else
1110                 pf->lan_nb_qp_max =
1111                         (uint16_t)RTE_MIN(hw->func_caps.common_cap.num_txq,
1112                                           hw->func_caps.common_cap.num_rxq);
1113
1114         pf->lan_nb_qps = pf->lan_nb_qp_max;
1115
1116         return 0;
1117 }
1118
1119 static struct ice_vsi *
1120 ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type)
1121 {
1122         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1123         struct ice_vsi *vsi = NULL;
1124         struct ice_vsi_ctx vsi_ctx;
1125         int ret;
1126         struct ether_addr broadcast = {
1127                 .addr_bytes = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff} };
1128         struct ether_addr mac_addr;
1129         uint16_t max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
1130         uint8_t tc_bitmap = 0x1;
1131
1132         /* hw->num_lports = 1 in NIC mode */
1133         vsi = rte_zmalloc(NULL, sizeof(struct ice_vsi), 0);
1134         if (!vsi)
1135                 return NULL;
1136
1137         vsi->idx = pf->next_vsi_idx;
1138         pf->next_vsi_idx++;
1139         vsi->type = type;
1140         vsi->adapter = ICE_PF_TO_ADAPTER(pf);
1141         vsi->max_macaddrs = ICE_NUM_MACADDR_MAX;
1142         vsi->vlan_anti_spoof_on = 0;
1143         vsi->vlan_filter_on = 1;
1144         TAILQ_INIT(&vsi->mac_list);
1145         TAILQ_INIT(&vsi->vlan_list);
1146
1147         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1148         /* base_queue in used in queue mapping of VSI add/update command.
1149          * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ
1150          * cases in the first stage. Only Main VSI.
1151          */
1152         vsi->base_queue = 0;
1153         switch (type) {
1154         case ICE_VSI_PF:
1155                 vsi->nb_qps = pf->lan_nb_qps;
1156                 ice_vsi_config_default_rss(&vsi_ctx.info);
1157                 vsi_ctx.alloc_from_pool = true;
1158                 vsi_ctx.flags = ICE_AQ_VSI_TYPE_PF;
1159                 /* switch_id is queried by get_switch_config aq, which is done
1160                  * by ice_init_hw
1161                  */
1162                 vsi_ctx.info.sw_id = hw->port_info->sw_id;
1163                 vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
1164                 /* Allow all untagged or tagged packets */
1165                 vsi_ctx.info.vlan_flags = ICE_AQ_VSI_VLAN_MODE_ALL;
1166                 vsi_ctx.info.vlan_flags |= ICE_AQ_VSI_VLAN_EMOD_NOTHING;
1167                 vsi_ctx.info.q_opt_rss = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF |
1168                                          ICE_AQ_VSI_Q_OPT_RSS_TPLZ;
1169                 /* Enable VLAN/UP trip */
1170                 ret = ice_vsi_config_tc_queue_mapping(vsi,
1171                                                       &vsi_ctx.info,
1172                                                       ICE_DEFAULT_TCMAP);
1173                 if (ret) {
1174                         PMD_INIT_LOG(ERR,
1175                                      "tc queue mapping with vsi failed, "
1176                                      "err = %d",
1177                                      ret);
1178                         goto fail_mem;
1179                 }
1180
1181                 break;
1182         default:
1183                 /* for other types of VSI */
1184                 PMD_INIT_LOG(ERR, "other types of VSI not supported");
1185                 goto fail_mem;
1186         }
1187
1188         /* VF has MSIX interrupt in VF range, don't allocate here */
1189         if (type == ICE_VSI_PF) {
1190                 ret = ice_res_pool_alloc(&pf->msix_pool,
1191                                          RTE_MIN(vsi->nb_qps,
1192                                                  RTE_MAX_RXTX_INTR_VEC_ID));
1193                 if (ret < 0) {
1194                         PMD_INIT_LOG(ERR, "VSI MAIN %d get heap failed %d",
1195                                      vsi->vsi_id, ret);
1196                 }
1197                 vsi->msix_intr = ret;
1198                 vsi->nb_msix = RTE_MIN(vsi->nb_qps, RTE_MAX_RXTX_INTR_VEC_ID);
1199         } else {
1200                 vsi->msix_intr = 0;
1201                 vsi->nb_msix = 0;
1202         }
1203         ret = ice_add_vsi(hw, vsi->idx, &vsi_ctx, NULL);
1204         if (ret != ICE_SUCCESS) {
1205                 PMD_INIT_LOG(ERR, "add vsi failed, err = %d", ret);
1206                 goto fail_mem;
1207         }
1208         /* store vsi information is SW structure */
1209         vsi->vsi_id = vsi_ctx.vsi_num;
1210         vsi->info = vsi_ctx.info;
1211         pf->vsis_allocated = vsi_ctx.vsis_allocd;
1212         pf->vsis_unallocated = vsi_ctx.vsis_unallocated;
1213
1214         /* MAC configuration */
1215         rte_memcpy(pf->dev_addr.addr_bytes,
1216                    hw->port_info->mac.perm_addr,
1217                    ETH_ADDR_LEN);
1218
1219         rte_memcpy(&mac_addr, &pf->dev_addr, ETHER_ADDR_LEN);
1220         ret = ice_add_mac_filter(vsi, &mac_addr);
1221         if (ret != ICE_SUCCESS)
1222                 PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter");
1223
1224         rte_memcpy(&mac_addr, &broadcast, ETHER_ADDR_LEN);
1225         ret = ice_add_mac_filter(vsi, &mac_addr);
1226         if (ret != ICE_SUCCESS)
1227                 PMD_INIT_LOG(ERR, "Failed to add MAC filter");
1228
1229         /* At the beginning, only TC0. */
1230         /* What we need here is the maximam number of the TX queues.
1231          * Currently vsi->nb_qps means it.
1232          * Correct it if any change.
1233          */
1234         max_txqs[0] = vsi->nb_qps;
1235         ret = ice_cfg_vsi_lan(hw->port_info, vsi->idx,
1236                               tc_bitmap, max_txqs);
1237         if (ret != ICE_SUCCESS)
1238                 PMD_INIT_LOG(ERR, "Failed to config vsi sched");
1239
1240         return vsi;
1241 fail_mem:
1242         rte_free(vsi);
1243         pf->next_vsi_idx--;
1244         return NULL;
1245 }
1246
1247 static int
1248 ice_send_driver_ver(struct ice_hw *hw)
1249 {
1250         struct ice_driver_ver dv;
1251
1252         /* we don't have driver version use 0 for dummy */
1253         dv.major_ver = 0;
1254         dv.minor_ver = 0;
1255         dv.build_ver = 0;
1256         dv.subbuild_ver = 0;
1257         strncpy((char *)dv.driver_string, "dpdk", sizeof(dv.driver_string));
1258
1259         return ice_aq_send_driver_ver(hw, &dv, NULL);
1260 }
1261
1262 static int
1263 ice_pf_setup(struct ice_pf *pf)
1264 {
1265         struct ice_vsi *vsi;
1266
1267         /* Clear all stats counters */
1268         pf->offset_loaded = FALSE;
1269         memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats));
1270         memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats));
1271         memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats));
1272         memset(&pf->internal_stats_offset, 0, sizeof(struct ice_eth_stats));
1273
1274         vsi = ice_setup_vsi(pf, ICE_VSI_PF);
1275         if (!vsi) {
1276                 PMD_INIT_LOG(ERR, "Failed to add vsi for PF");
1277                 return -EINVAL;
1278         }
1279
1280         pf->main_vsi = vsi;
1281
1282         return 0;
1283 }
1284
1285 static int ice_load_pkg(struct rte_eth_dev *dev)
1286 {
1287         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1288         const char *pkg_file = ICE_DFLT_PKG_FILE;
1289         int err;
1290         uint8_t *buf;
1291         int buf_len;
1292         FILE *file;
1293         struct stat fstat;
1294
1295         file = fopen(pkg_file, "rb");
1296         if (!file)  {
1297                 PMD_INIT_LOG(ERR, "failed to open file: %s\n", pkg_file);
1298                 return -1;
1299         }
1300
1301         err = stat(pkg_file, &fstat);
1302         if (err) {
1303                 PMD_INIT_LOG(ERR, "failed to get file stats\n");
1304                 fclose(file);
1305                 return err;
1306         }
1307
1308         buf_len = fstat.st_size;
1309         buf = rte_malloc(NULL, buf_len, 0);
1310
1311         if (!buf) {
1312                 PMD_INIT_LOG(ERR, "failed to allocate buf of size %d for package\n",
1313                                 buf_len);
1314                 fclose(file);
1315                 return -1;
1316         }
1317
1318         err = fread(buf, buf_len, 1, file);
1319         if (err != 1) {
1320                 PMD_INIT_LOG(ERR, "failed to read package data\n");
1321                 fclose(file);
1322                 err = -1;
1323                 goto fail_exit;
1324         }
1325
1326         fclose(file);
1327
1328         err = ice_copy_and_init_pkg(hw, buf, buf_len);
1329         if (err) {
1330                 PMD_INIT_LOG(ERR, "ice_copy_and_init_hw failed: %d\n", err);
1331                 goto fail_exit;
1332         }
1333         err = ice_init_hw_tbls(hw);
1334         if (err) {
1335                 PMD_INIT_LOG(ERR, "ice_init_hw_tbls failed: %d\n", err);
1336                 goto fail_init_tbls;
1337         }
1338
1339         return 0;
1340
1341 fail_init_tbls:
1342         rte_free(hw->pkg_copy);
1343 fail_exit:
1344         rte_free(buf);
1345         return err;
1346 }
1347
1348 static int
1349 ice_dev_init(struct rte_eth_dev *dev)
1350 {
1351         struct rte_pci_device *pci_dev;
1352         struct rte_intr_handle *intr_handle;
1353         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1354         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1355         struct ice_adapter *ad =
1356                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1357         struct ice_vsi *vsi;
1358         int ret;
1359
1360         dev->dev_ops = &ice_eth_dev_ops;
1361         dev->rx_pkt_burst = ice_recv_pkts;
1362         dev->tx_pkt_burst = ice_xmit_pkts;
1363         dev->tx_pkt_prepare = ice_prep_pkts;
1364
1365         ice_set_default_ptype_table(dev);
1366         pci_dev = RTE_DEV_TO_PCI(dev->device);
1367         intr_handle = &pci_dev->intr_handle;
1368
1369         pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1370         pf->adapter->eth_dev = dev;
1371         pf->dev_data = dev->data;
1372         hw->back = pf->adapter;
1373         hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr;
1374         hw->vendor_id = pci_dev->id.vendor_id;
1375         hw->device_id = pci_dev->id.device_id;
1376         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1377         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1378         hw->bus.device = pci_dev->addr.devid;
1379         hw->bus.func = pci_dev->addr.function;
1380
1381         ice_init_controlq_parameter(hw);
1382
1383         ret = ice_init_hw(hw);
1384         if (ret) {
1385                 PMD_INIT_LOG(ERR, "Failed to initialize HW");
1386                 return -EINVAL;
1387         }
1388
1389         ret = ice_load_pkg(dev);
1390         if (ret) {
1391                 PMD_INIT_LOG(WARNING, "Failed to load the DDP package,"
1392                                 "Entering Safe Mode");
1393                 ad->is_safe_mode = 1;
1394         }
1395
1396         PMD_INIT_LOG(INFO, "FW %d.%d.%05d API %d.%d",
1397                      hw->fw_maj_ver, hw->fw_min_ver, hw->fw_build,
1398                      hw->api_maj_ver, hw->api_min_ver);
1399
1400         ice_pf_sw_init(dev);
1401         ret = ice_init_mac_address(dev);
1402         if (ret) {
1403                 PMD_INIT_LOG(ERR, "Failed to initialize mac address");
1404                 goto err_init_mac;
1405         }
1406
1407         ret = ice_res_pool_init(&pf->msix_pool, 1,
1408                                 hw->func_caps.common_cap.num_msix_vectors - 1);
1409         if (ret) {
1410                 PMD_INIT_LOG(ERR, "Failed to init MSIX pool");
1411                 goto err_msix_pool_init;
1412         }
1413
1414         ret = ice_pf_setup(pf);
1415         if (ret) {
1416                 PMD_INIT_LOG(ERR, "Failed to setup PF");
1417                 goto err_pf_setup;
1418         }
1419
1420         ret = ice_send_driver_ver(hw);
1421         if (ret) {
1422                 PMD_INIT_LOG(ERR, "Failed to send driver version");
1423                 goto err_pf_setup;
1424         }
1425
1426         vsi = pf->main_vsi;
1427
1428         /* Disable double vlan by default */
1429         ice_vsi_config_double_vlan(vsi, FALSE);
1430
1431         /* register callback func to eal lib */
1432         rte_intr_callback_register(intr_handle,
1433                                    ice_interrupt_handler, dev);
1434
1435         ice_pf_enable_irq0(hw);
1436
1437         /* enable uio intr after callback register */
1438         rte_intr_enable(intr_handle);
1439
1440         return 0;
1441
1442 err_pf_setup:
1443         ice_res_pool_destroy(&pf->msix_pool);
1444 err_msix_pool_init:
1445         rte_free(dev->data->mac_addrs);
1446 err_init_mac:
1447         ice_sched_cleanup_all(hw);
1448         rte_free(hw->port_info);
1449         ice_shutdown_all_ctrlq(hw);
1450
1451         return ret;
1452 }
1453
1454 static int
1455 ice_release_vsi(struct ice_vsi *vsi)
1456 {
1457         struct ice_hw *hw;
1458         struct ice_vsi_ctx vsi_ctx;
1459         enum ice_status ret;
1460
1461         if (!vsi)
1462                 return 0;
1463
1464         hw = ICE_VSI_TO_HW(vsi);
1465
1466         ice_remove_all_mac_vlan_filters(vsi);
1467
1468         memset(&vsi_ctx, 0, sizeof(vsi_ctx));
1469
1470         vsi_ctx.vsi_num = vsi->vsi_id;
1471         vsi_ctx.info = vsi->info;
1472         ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL);
1473         if (ret != ICE_SUCCESS) {
1474                 PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id);
1475                 rte_free(vsi);
1476                 return -1;
1477         }
1478
1479         rte_free(vsi);
1480         return 0;
1481 }
1482
1483 static void
1484 ice_vsi_disable_queues_intr(struct ice_vsi *vsi)
1485 {
1486         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1487         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1488         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1489         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1490         uint16_t msix_intr, i;
1491
1492         /* disable interrupt and also clear all the exist config */
1493         for (i = 0; i < vsi->nb_qps; i++) {
1494                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1495                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1496                 rte_wmb();
1497         }
1498
1499         if (rte_intr_allow_others(intr_handle))
1500                 /* vfio-pci */
1501                 for (i = 0; i < vsi->nb_msix; i++) {
1502                         msix_intr = vsi->msix_intr + i;
1503                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1504                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1505                 }
1506         else
1507                 /* igb_uio */
1508                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M);
1509 }
1510
1511 static void
1512 ice_dev_stop(struct rte_eth_dev *dev)
1513 {
1514         struct rte_eth_dev_data *data = dev->data;
1515         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1516         struct ice_vsi *main_vsi = pf->main_vsi;
1517         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1518         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1519         uint16_t i;
1520
1521         /* avoid stopping again */
1522         if (pf->adapter_stopped)
1523                 return;
1524
1525         /* stop and clear all Rx queues */
1526         for (i = 0; i < data->nb_rx_queues; i++)
1527                 ice_rx_queue_stop(dev, i);
1528
1529         /* stop and clear all Tx queues */
1530         for (i = 0; i < data->nb_tx_queues; i++)
1531                 ice_tx_queue_stop(dev, i);
1532
1533         /* disable all queue interrupts */
1534         ice_vsi_disable_queues_intr(main_vsi);
1535
1536         /* Clear all queues and release mbufs */
1537         ice_clear_queues(dev);
1538
1539         /* Clean datapath event and queue/vec mapping */
1540         rte_intr_efd_disable(intr_handle);
1541         if (intr_handle->intr_vec) {
1542                 rte_free(intr_handle->intr_vec);
1543                 intr_handle->intr_vec = NULL;
1544         }
1545
1546         pf->adapter_stopped = true;
1547 }
1548
1549 static void
1550 ice_dev_close(struct rte_eth_dev *dev)
1551 {
1552         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1553         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1554
1555         ice_dev_stop(dev);
1556
1557         /* release all queue resource */
1558         ice_free_queues(dev);
1559
1560         ice_res_pool_destroy(&pf->msix_pool);
1561         ice_release_vsi(pf->main_vsi);
1562         ice_sched_cleanup_all(hw);
1563         rte_free(hw->port_info);
1564         ice_shutdown_all_ctrlq(hw);
1565 }
1566
1567 static int
1568 ice_dev_uninit(struct rte_eth_dev *dev)
1569 {
1570         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1571         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1572
1573         ice_dev_close(dev);
1574
1575         dev->dev_ops = NULL;
1576         dev->rx_pkt_burst = NULL;
1577         dev->tx_pkt_burst = NULL;
1578
1579         rte_free(dev->data->mac_addrs);
1580         dev->data->mac_addrs = NULL;
1581
1582         /* disable uio intr before callback unregister */
1583         rte_intr_disable(intr_handle);
1584
1585         /* register callback func to eal lib */
1586         rte_intr_callback_unregister(intr_handle,
1587                                      ice_interrupt_handler, dev);
1588
1589         return 0;
1590 }
1591
1592 static int
1593 ice_dev_configure(__rte_unused struct rte_eth_dev *dev)
1594 {
1595         struct ice_adapter *ad =
1596                 ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1597
1598         /* Initialize to TRUE. If any of Rx queues doesn't meet the
1599          * bulk allocation or vector Rx preconditions we will reset it.
1600          */
1601         ad->rx_bulk_alloc_allowed = true;
1602         ad->tx_simple_allowed = true;
1603
1604         return 0;
1605 }
1606
1607 static int ice_init_rss(struct ice_pf *pf)
1608 {
1609         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1610         struct ice_vsi *vsi = pf->main_vsi;
1611         struct rte_eth_dev *dev = pf->adapter->eth_dev;
1612         struct rte_eth_rss_conf *rss_conf;
1613         struct ice_aqc_get_set_rss_keys key;
1614         uint16_t i, nb_q;
1615         int ret = 0;
1616         bool is_safe_mode = pf->adapter->is_safe_mode;
1617
1618         rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
1619         nb_q = dev->data->nb_rx_queues;
1620         vsi->rss_key_size = ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE;
1621         vsi->rss_lut_size = hw->func_caps.common_cap.rss_table_size;
1622
1623         if (is_safe_mode) {
1624                 PMD_DRV_LOG(WARNING, "RSS is not supported in safe mode\n");
1625                 return 0;
1626         }
1627
1628         if (!vsi->rss_key)
1629                 vsi->rss_key = rte_zmalloc(NULL,
1630                                            vsi->rss_key_size, 0);
1631         if (!vsi->rss_lut)
1632                 vsi->rss_lut = rte_zmalloc(NULL,
1633                                            vsi->rss_lut_size, 0);
1634
1635         /* configure RSS key */
1636         if (!rss_conf->rss_key) {
1637                 /* Calculate the default hash key */
1638                 for (i = 0; i <= vsi->rss_key_size; i++)
1639                         vsi->rss_key[i] = (uint8_t)rte_rand();
1640         } else {
1641                 rte_memcpy(vsi->rss_key, rss_conf->rss_key,
1642                            RTE_MIN(rss_conf->rss_key_len,
1643                                    vsi->rss_key_size));
1644         }
1645         rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size);
1646         ret = ice_aq_set_rss_key(hw, vsi->idx, &key);
1647         if (ret)
1648                 return -EINVAL;
1649
1650         /* init RSS LUT table */
1651         for (i = 0; i < vsi->rss_lut_size; i++)
1652                 vsi->rss_lut[i] = i % nb_q;
1653
1654         ret = ice_aq_set_rss_lut(hw, vsi->idx,
1655                                  ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF,
1656                                  vsi->rss_lut, vsi->rss_lut_size);
1657         if (ret)
1658                 return -EINVAL;
1659
1660         /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1661         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6,
1662                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6);
1663         if (ret)
1664                 PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret);
1665
1666         /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1667         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6,
1668                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6);
1669         if (ret)
1670                 PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret);
1671
1672         /* configure RSS for sctp6 with input set IPv6 src/dst */
1673         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6,
1674                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6);
1675         if (ret)
1676                 PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d",
1677                                 __func__, ret);
1678
1679         /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1680         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4,
1681                               ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4);
1682         if (ret)
1683                 PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret);
1684
1685         /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1686         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4,
1687                               ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4);
1688         if (ret)
1689                 PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret);
1690
1691         /* configure RSS for sctp4 with input set IP src/dst */
1692         ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4,
1693                               ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4);
1694         if (ret)
1695                 PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d",
1696                                 __func__, ret);
1697
1698         return 0;
1699 }
1700
1701 static void
1702 __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
1703                        int base_queue, int nb_queue)
1704 {
1705         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1706         uint32_t val, val_tx;
1707         int i;
1708
1709         for (i = 0; i < nb_queue; i++) {
1710                 /*do actual bind*/
1711                 val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
1712                       (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
1713                 val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
1714                          (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
1715
1716                 PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
1717                             base_queue + i, msix_vect);
1718                 /* set ITR0 value */
1719                 ICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x10);
1720                 ICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val);
1721                 ICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx);
1722         }
1723 }
1724
1725 static void
1726 ice_vsi_queues_bind_intr(struct ice_vsi *vsi)
1727 {
1728         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1729         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1730         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1731         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1732         uint16_t msix_vect = vsi->msix_intr;
1733         uint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);
1734         uint16_t queue_idx = 0;
1735         int record = 0;
1736         int i;
1737
1738         /* clear Rx/Tx queue interrupt */
1739         for (i = 0; i < vsi->nb_used_qps; i++) {
1740                 ICE_WRITE_REG(hw, QINT_TQCTL(vsi->base_queue + i), 0);
1741                 ICE_WRITE_REG(hw, QINT_RQCTL(vsi->base_queue + i), 0);
1742         }
1743
1744         /* PF bind interrupt */
1745         if (rte_intr_dp_is_en(intr_handle)) {
1746                 queue_idx = 0;
1747                 record = 1;
1748         }
1749
1750         for (i = 0; i < vsi->nb_used_qps; i++) {
1751                 if (nb_msix <= 1) {
1752                         if (!rte_intr_allow_others(intr_handle))
1753                                 msix_vect = ICE_MISC_VEC_ID;
1754
1755                         /* uio mapping all queue to one msix_vect */
1756                         __vsi_queues_bind_intr(vsi, msix_vect,
1757                                                vsi->base_queue + i,
1758                                                vsi->nb_used_qps - i);
1759
1760                         for (; !!record && i < vsi->nb_used_qps; i++)
1761                                 intr_handle->intr_vec[queue_idx + i] =
1762                                         msix_vect;
1763                         break;
1764                 }
1765
1766                 /* vfio 1:1 queue/msix_vect mapping */
1767                 __vsi_queues_bind_intr(vsi, msix_vect,
1768                                        vsi->base_queue + i, 1);
1769
1770                 if (!!record)
1771                         intr_handle->intr_vec[queue_idx + i] = msix_vect;
1772
1773                 msix_vect++;
1774                 nb_msix--;
1775         }
1776 }
1777
1778 static void
1779 ice_vsi_enable_queues_intr(struct ice_vsi *vsi)
1780 {
1781         struct rte_eth_dev *dev = vsi->adapter->eth_dev;
1782         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1783         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1784         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
1785         uint16_t msix_intr, i;
1786
1787         if (rte_intr_allow_others(intr_handle))
1788                 for (i = 0; i < vsi->nb_used_qps; i++) {
1789                         msix_intr = vsi->msix_intr + i;
1790                         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr),
1791                                       GLINT_DYN_CTL_INTENA_M |
1792                                       GLINT_DYN_CTL_CLEARPBA_M |
1793                                       GLINT_DYN_CTL_ITR_INDX_M |
1794                                       GLINT_DYN_CTL_WB_ON_ITR_M);
1795                 }
1796         else
1797                 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0),
1798                               GLINT_DYN_CTL_INTENA_M |
1799                               GLINT_DYN_CTL_CLEARPBA_M |
1800                               GLINT_DYN_CTL_ITR_INDX_M |
1801                               GLINT_DYN_CTL_WB_ON_ITR_M);
1802 }
1803
1804 static int
1805 ice_rxq_intr_setup(struct rte_eth_dev *dev)
1806 {
1807         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1808         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
1809         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1810         struct ice_vsi *vsi = pf->main_vsi;
1811         uint32_t intr_vector = 0;
1812
1813         rte_intr_disable(intr_handle);
1814
1815         /* check and configure queue intr-vector mapping */
1816         if ((rte_intr_cap_multiple(intr_handle) ||
1817              !RTE_ETH_DEV_SRIOV(dev).active) &&
1818             dev->data->dev_conf.intr_conf.rxq != 0) {
1819                 intr_vector = dev->data->nb_rx_queues;
1820                 if (intr_vector > ICE_MAX_INTR_QUEUE_NUM) {
1821                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
1822                                     ICE_MAX_INTR_QUEUE_NUM);
1823                         return -ENOTSUP;
1824                 }
1825                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1826                         return -1;
1827         }
1828
1829         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1830                 intr_handle->intr_vec =
1831                 rte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),
1832                             0);
1833                 if (!intr_handle->intr_vec) {
1834                         PMD_DRV_LOG(ERR,
1835                                     "Failed to allocate %d rx_queues intr_vec",
1836                                     dev->data->nb_rx_queues);
1837                         return -ENOMEM;
1838                 }
1839         }
1840
1841         /* Map queues with MSIX interrupt */
1842         vsi->nb_used_qps = dev->data->nb_rx_queues;
1843         ice_vsi_queues_bind_intr(vsi);
1844
1845         /* Enable interrupts for all the queues */
1846         ice_vsi_enable_queues_intr(vsi);
1847
1848         rte_intr_enable(intr_handle);
1849
1850         return 0;
1851 }
1852
1853 static int
1854 ice_dev_start(struct rte_eth_dev *dev)
1855 {
1856         struct rte_eth_dev_data *data = dev->data;
1857         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1858         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1859         struct ice_vsi *vsi = pf->main_vsi;
1860         uint16_t nb_rxq = 0;
1861         uint16_t nb_txq, i;
1862         int mask, ret;
1863
1864         /* program Tx queues' context in hardware */
1865         for (nb_txq = 0; nb_txq < data->nb_tx_queues; nb_txq++) {
1866                 ret = ice_tx_queue_start(dev, nb_txq);
1867                 if (ret) {
1868                         PMD_DRV_LOG(ERR, "fail to start Tx queue %u", nb_txq);
1869                         goto tx_err;
1870                 }
1871         }
1872
1873         /* program Rx queues' context in hardware*/
1874         for (nb_rxq = 0; nb_rxq < data->nb_rx_queues; nb_rxq++) {
1875                 ret = ice_rx_queue_start(dev, nb_rxq);
1876                 if (ret) {
1877                         PMD_DRV_LOG(ERR, "fail to start Rx queue %u", nb_rxq);
1878                         goto rx_err;
1879                 }
1880         }
1881
1882         ret = ice_init_rss(pf);
1883         if (ret) {
1884                 PMD_DRV_LOG(ERR, "Failed to enable rss for PF");
1885                 goto rx_err;
1886         }
1887
1888         ice_set_rx_function(dev);
1889         ice_set_tx_function(dev);
1890
1891         mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK |
1892                         ETH_VLAN_EXTEND_MASK;
1893         ret = ice_vlan_offload_set(dev, mask);
1894         if (ret) {
1895                 PMD_INIT_LOG(ERR, "Unable to set VLAN offload");
1896                 goto rx_err;
1897         }
1898
1899         /* enable Rx interrput and mapping Rx queue to interrupt vector */
1900         if (ice_rxq_intr_setup(dev))
1901                 return -EIO;
1902
1903         /* Enable receiving broadcast packets and transmitting packets */
1904         ret = ice_set_vsi_promisc(hw, vsi->idx,
1905                                   ICE_PROMISC_BCAST_RX | ICE_PROMISC_BCAST_TX |
1906                                   ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX,
1907                                   0);
1908         if (ret != ICE_SUCCESS)
1909                 PMD_DRV_LOG(INFO, "fail to set vsi broadcast");
1910
1911         ret = ice_aq_set_event_mask(hw, hw->port_info->lport,
1912                                     ((u16)(ICE_AQ_LINK_EVENT_LINK_FAULT |
1913                                      ICE_AQ_LINK_EVENT_PHY_TEMP_ALARM |
1914                                      ICE_AQ_LINK_EVENT_EXCESSIVE_ERRORS |
1915                                      ICE_AQ_LINK_EVENT_SIGNAL_DETECT |
1916                                      ICE_AQ_LINK_EVENT_AN_COMPLETED |
1917                                      ICE_AQ_LINK_EVENT_PORT_TX_SUSPENDED)),
1918                                      NULL);
1919         if (ret != ICE_SUCCESS)
1920                 PMD_DRV_LOG(WARNING, "Fail to set phy mask");
1921
1922         /* Call get_link_info aq commond to enable/disable LSE */
1923         ice_link_update(dev, 0);
1924
1925         pf->adapter_stopped = false;
1926
1927         return 0;
1928
1929         /* stop the started queues if failed to start all queues */
1930 rx_err:
1931         for (i = 0; i < nb_rxq; i++)
1932                 ice_rx_queue_stop(dev, i);
1933 tx_err:
1934         for (i = 0; i < nb_txq; i++)
1935                 ice_tx_queue_stop(dev, i);
1936
1937         return -EIO;
1938 }
1939
1940 static int
1941 ice_dev_reset(struct rte_eth_dev *dev)
1942 {
1943         int ret;
1944
1945         if (dev->data->sriov.active)
1946                 return -ENOTSUP;
1947
1948         ret = ice_dev_uninit(dev);
1949         if (ret) {
1950                 PMD_INIT_LOG(ERR, "failed to uninit device, status = %d", ret);
1951                 return -ENXIO;
1952         }
1953
1954         ret = ice_dev_init(dev);
1955         if (ret) {
1956                 PMD_INIT_LOG(ERR, "failed to init device, status = %d", ret);
1957                 return -ENXIO;
1958         }
1959
1960         return 0;
1961 }
1962
1963 static void
1964 ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1965 {
1966         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1967         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1968         struct ice_vsi *vsi = pf->main_vsi;
1969         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1970         bool is_safe_mode = pf->adapter->is_safe_mode;
1971         u64 phy_type_low;
1972         u64 phy_type_high;
1973
1974         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
1975         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
1976         dev_info->max_rx_queues = vsi->nb_qps;
1977         dev_info->max_tx_queues = vsi->nb_qps;
1978         dev_info->max_mac_addrs = vsi->max_macaddrs;
1979         dev_info->max_vfs = pci_dev->max_vfs;
1980
1981         dev_info->rx_offload_capa =
1982                 DEV_RX_OFFLOAD_VLAN_STRIP |
1983                 DEV_RX_OFFLOAD_JUMBO_FRAME |
1984                 DEV_RX_OFFLOAD_KEEP_CRC |
1985                 DEV_RX_OFFLOAD_SCATTER |
1986                 DEV_RX_OFFLOAD_VLAN_FILTER;
1987         dev_info->tx_offload_capa =
1988                 DEV_TX_OFFLOAD_VLAN_INSERT |
1989                 DEV_TX_OFFLOAD_TCP_TSO |
1990                 DEV_TX_OFFLOAD_MULTI_SEGS |
1991                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1992         dev_info->flow_type_rss_offloads = 0;
1993
1994         if (!is_safe_mode) {
1995                 dev_info->rx_offload_capa |=
1996                         DEV_RX_OFFLOAD_IPV4_CKSUM |
1997                         DEV_RX_OFFLOAD_UDP_CKSUM |
1998                         DEV_RX_OFFLOAD_TCP_CKSUM |
1999                         DEV_RX_OFFLOAD_QINQ_STRIP |
2000                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2001                         DEV_RX_OFFLOAD_VLAN_EXTEND;
2002                 dev_info->tx_offload_capa |=
2003                         DEV_TX_OFFLOAD_QINQ_INSERT |
2004                         DEV_TX_OFFLOAD_IPV4_CKSUM |
2005                         DEV_TX_OFFLOAD_UDP_CKSUM |
2006                         DEV_TX_OFFLOAD_TCP_CKSUM |
2007                         DEV_TX_OFFLOAD_SCTP_CKSUM |
2008                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
2009                 dev_info->flow_type_rss_offloads |= ICE_RSS_OFFLOAD_ALL;
2010         }
2011
2012         dev_info->rx_queue_offload_capa = 0;
2013         dev_info->tx_queue_offload_capa = 0;
2014
2015         dev_info->reta_size = hw->func_caps.common_cap.rss_table_size;
2016         dev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2017
2018         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2019                 .rx_thresh = {
2020                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
2021                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
2022                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
2023                 },
2024                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
2025                 .rx_drop_en = 0,
2026                 .offloads = 0,
2027         };
2028
2029         dev_info->default_txconf = (struct rte_eth_txconf) {
2030                 .tx_thresh = {
2031                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
2032                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
2033                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
2034                 },
2035                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
2036                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
2037                 .offloads = 0,
2038         };
2039
2040         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2041                 .nb_max = ICE_MAX_RING_DESC,
2042                 .nb_min = ICE_MIN_RING_DESC,
2043                 .nb_align = ICE_ALIGN_RING_DESC,
2044         };
2045
2046         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2047                 .nb_max = ICE_MAX_RING_DESC,
2048                 .nb_min = ICE_MIN_RING_DESC,
2049                 .nb_align = ICE_ALIGN_RING_DESC,
2050         };
2051
2052         dev_info->speed_capa = ETH_LINK_SPEED_10M |
2053                                ETH_LINK_SPEED_100M |
2054                                ETH_LINK_SPEED_1G |
2055                                ETH_LINK_SPEED_2_5G |
2056                                ETH_LINK_SPEED_5G |
2057                                ETH_LINK_SPEED_10G |
2058                                ETH_LINK_SPEED_20G |
2059                                ETH_LINK_SPEED_25G;
2060
2061         phy_type_low = hw->port_info->phy.phy_type_low;
2062         phy_type_high = hw->port_info->phy.phy_type_high;
2063
2064         if (ICE_PHY_TYPE_SUPPORT_50G(phy_type_low))
2065                 dev_info->speed_capa |= ETH_LINK_SPEED_50G;
2066
2067         if (ICE_PHY_TYPE_SUPPORT_100G_LOW(phy_type_low) ||
2068                         ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type_high))
2069                 dev_info->speed_capa |= ETH_LINK_SPEED_100G;
2070
2071         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2072         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2073
2074         dev_info->default_rxportconf.burst_size = ICE_RX_MAX_BURST;
2075         dev_info->default_txportconf.burst_size = ICE_TX_MAX_BURST;
2076         dev_info->default_rxportconf.nb_queues = 1;
2077         dev_info->default_txportconf.nb_queues = 1;
2078         dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
2079         dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
2080 }
2081
2082 static inline int
2083 ice_atomic_read_link_status(struct rte_eth_dev *dev,
2084                             struct rte_eth_link *link)
2085 {
2086         struct rte_eth_link *dst = link;
2087         struct rte_eth_link *src = &dev->data->dev_link;
2088
2089         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2090                                 *(uint64_t *)src) == 0)
2091                 return -1;
2092
2093         return 0;
2094 }
2095
2096 static inline int
2097 ice_atomic_write_link_status(struct rte_eth_dev *dev,
2098                              struct rte_eth_link *link)
2099 {
2100         struct rte_eth_link *dst = &dev->data->dev_link;
2101         struct rte_eth_link *src = link;
2102
2103         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
2104                                 *(uint64_t *)src) == 0)
2105                 return -1;
2106
2107         return 0;
2108 }
2109
2110 static int
2111 ice_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete)
2112 {
2113 #define CHECK_INTERVAL 100  /* 100ms */
2114 #define MAX_REPEAT_TIME 10  /* 1s (10 * 100ms) in total */
2115         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2116         struct ice_link_status link_status;
2117         struct rte_eth_link link, old;
2118         int status;
2119         unsigned int rep_cnt = MAX_REPEAT_TIME;
2120         bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;
2121
2122         memset(&link, 0, sizeof(link));
2123         memset(&old, 0, sizeof(old));
2124         memset(&link_status, 0, sizeof(link_status));
2125         ice_atomic_read_link_status(dev, &old);
2126
2127         do {
2128                 /* Get link status information from hardware */
2129                 status = ice_aq_get_link_info(hw->port_info, enable_lse,
2130                                               &link_status, NULL);
2131                 if (status != ICE_SUCCESS) {
2132                         link.link_speed = ETH_SPEED_NUM_100M;
2133                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2134                         PMD_DRV_LOG(ERR, "Failed to get link info");
2135                         goto out;
2136                 }
2137
2138                 link.link_status = link_status.link_info & ICE_AQ_LINK_UP;
2139                 if (!wait_to_complete || link.link_status)
2140                         break;
2141
2142                 rte_delay_ms(CHECK_INTERVAL);
2143         } while (--rep_cnt);
2144
2145         if (!link.link_status)
2146                 goto out;
2147
2148         /* Full-duplex operation at all supported speeds */
2149         link.link_duplex = ETH_LINK_FULL_DUPLEX;
2150
2151         /* Parse the link status */
2152         switch (link_status.link_speed) {
2153         case ICE_AQ_LINK_SPEED_10MB:
2154                 link.link_speed = ETH_SPEED_NUM_10M;
2155                 break;
2156         case ICE_AQ_LINK_SPEED_100MB:
2157                 link.link_speed = ETH_SPEED_NUM_100M;
2158                 break;
2159         case ICE_AQ_LINK_SPEED_1000MB:
2160                 link.link_speed = ETH_SPEED_NUM_1G;
2161                 break;
2162         case ICE_AQ_LINK_SPEED_2500MB:
2163                 link.link_speed = ETH_SPEED_NUM_2_5G;
2164                 break;
2165         case ICE_AQ_LINK_SPEED_5GB:
2166                 link.link_speed = ETH_SPEED_NUM_5G;
2167                 break;
2168         case ICE_AQ_LINK_SPEED_10GB:
2169                 link.link_speed = ETH_SPEED_NUM_10G;
2170                 break;
2171         case ICE_AQ_LINK_SPEED_20GB:
2172                 link.link_speed = ETH_SPEED_NUM_20G;
2173                 break;
2174         case ICE_AQ_LINK_SPEED_25GB:
2175                 link.link_speed = ETH_SPEED_NUM_25G;
2176                 break;
2177         case ICE_AQ_LINK_SPEED_40GB:
2178                 link.link_speed = ETH_SPEED_NUM_40G;
2179                 break;
2180         case ICE_AQ_LINK_SPEED_50GB:
2181                 link.link_speed = ETH_SPEED_NUM_50G;
2182                 break;
2183         case ICE_AQ_LINK_SPEED_100GB:
2184                 link.link_speed = ETH_SPEED_NUM_100G;
2185                 break;
2186         case ICE_AQ_LINK_SPEED_UNKNOWN:
2187         default:
2188                 PMD_DRV_LOG(ERR, "Unknown link speed");
2189                 link.link_speed = ETH_SPEED_NUM_NONE;
2190                 break;
2191         }
2192
2193         link.link_autoneg = !(dev->data->dev_conf.link_speeds &
2194                               ETH_LINK_SPEED_FIXED);
2195
2196 out:
2197         ice_atomic_write_link_status(dev, &link);
2198         if (link.link_status == old.link_status)
2199                 return -1;
2200
2201         return 0;
2202 }
2203
2204 static int
2205 ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2206 {
2207         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2208         struct rte_eth_dev_data *dev_data = pf->dev_data;
2209         uint32_t frame_size = mtu + ETHER_HDR_LEN
2210                               + ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE;
2211
2212         /* check if mtu is within the allowed range */
2213         if (mtu < ETHER_MIN_MTU || frame_size > ICE_FRAME_SIZE_MAX)
2214                 return -EINVAL;
2215
2216         /* mtu setting is forbidden if port is start */
2217         if (dev_data->dev_started) {
2218                 PMD_DRV_LOG(ERR,
2219                             "port %d must be stopped before configuration",
2220                             dev_data->port_id);
2221                 return -EBUSY;
2222         }
2223
2224         if (frame_size > ETHER_MAX_LEN)
2225                 dev_data->dev_conf.rxmode.offloads |=
2226                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2227         else
2228                 dev_data->dev_conf.rxmode.offloads &=
2229                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2230
2231         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2232
2233         return 0;
2234 }
2235
2236 static int ice_macaddr_set(struct rte_eth_dev *dev,
2237                            struct ether_addr *mac_addr)
2238 {
2239         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2240         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2241         struct ice_vsi *vsi = pf->main_vsi;
2242         struct ice_mac_filter *f;
2243         uint8_t flags = 0;
2244         int ret;
2245
2246         if (!is_valid_assigned_ether_addr(mac_addr)) {
2247                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2248                 return -EINVAL;
2249         }
2250
2251         TAILQ_FOREACH(f, &vsi->mac_list, next) {
2252                 if (is_same_ether_addr(&pf->dev_addr, &f->mac_info.mac_addr))
2253                         break;
2254         }
2255
2256         if (!f) {
2257                 PMD_DRV_LOG(ERR, "Failed to find filter for default mac");
2258                 return -EIO;
2259         }
2260
2261         ret = ice_remove_mac_filter(vsi, &f->mac_info.mac_addr);
2262         if (ret != ICE_SUCCESS) {
2263                 PMD_DRV_LOG(ERR, "Failed to delete mac filter");
2264                 return -EIO;
2265         }
2266         ret = ice_add_mac_filter(vsi, mac_addr);
2267         if (ret != ICE_SUCCESS) {
2268                 PMD_DRV_LOG(ERR, "Failed to add mac filter");
2269                 return -EIO;
2270         }
2271         memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN);
2272
2273         flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL;
2274         ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL);
2275         if (ret != ICE_SUCCESS)
2276                 PMD_DRV_LOG(ERR, "Failed to set manage mac");
2277
2278         return 0;
2279 }
2280
2281 /* Add a MAC address, and update filters */
2282 static int
2283 ice_macaddr_add(struct rte_eth_dev *dev,
2284                 struct ether_addr *mac_addr,
2285                 __rte_unused uint32_t index,
2286                 __rte_unused uint32_t pool)
2287 {
2288         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2289         struct ice_vsi *vsi = pf->main_vsi;
2290         int ret;
2291
2292         ret = ice_add_mac_filter(vsi, mac_addr);
2293         if (ret != ICE_SUCCESS) {
2294                 PMD_DRV_LOG(ERR, "Failed to add MAC filter");
2295                 return -EINVAL;
2296         }
2297
2298         return ICE_SUCCESS;
2299 }
2300
2301 /* Remove a MAC address, and update filters */
2302 static void
2303 ice_macaddr_remove(struct rte_eth_dev *dev, uint32_t index)
2304 {
2305         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2306         struct ice_vsi *vsi = pf->main_vsi;
2307         struct rte_eth_dev_data *data = dev->data;
2308         struct ether_addr *macaddr;
2309         int ret;
2310
2311         macaddr = &data->mac_addrs[index];
2312         ret = ice_remove_mac_filter(vsi, macaddr);
2313         if (ret) {
2314                 PMD_DRV_LOG(ERR, "Failed to remove MAC filter");
2315                 return;
2316         }
2317 }
2318
2319 static int
2320 ice_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
2321 {
2322         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2323         struct ice_vsi *vsi = pf->main_vsi;
2324         int ret;
2325
2326         PMD_INIT_FUNC_TRACE();
2327
2328         if (on) {
2329                 ret = ice_add_vlan_filter(vsi, vlan_id);
2330                 if (ret < 0) {
2331                         PMD_DRV_LOG(ERR, "Failed to add vlan filter");
2332                         return -EINVAL;
2333                 }
2334         } else {
2335                 ret = ice_remove_vlan_filter(vsi, vlan_id);
2336                 if (ret < 0) {
2337                         PMD_DRV_LOG(ERR, "Failed to remove vlan filter");
2338                         return -EINVAL;
2339                 }
2340         }
2341
2342         return 0;
2343 }
2344
2345 /* Configure vlan filter on or off */
2346 static int
2347 ice_vsi_config_vlan_filter(struct ice_vsi *vsi, bool on)
2348 {
2349         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2350         struct ice_vsi_ctx ctxt;
2351         uint8_t sec_flags, sw_flags2;
2352         int ret = 0;
2353
2354         sec_flags = ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
2355                     ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S;
2356         sw_flags2 = ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
2357
2358         if (on) {
2359                 vsi->info.sec_flags |= sec_flags;
2360                 vsi->info.sw_flags2 |= sw_flags2;
2361         } else {
2362                 vsi->info.sec_flags &= ~sec_flags;
2363                 vsi->info.sw_flags2 &= ~sw_flags2;
2364         }
2365         vsi->info.sw_id = hw->port_info->sw_id;
2366         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2367         ctxt.info.valid_sections =
2368                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2369                                  ICE_AQ_VSI_PROP_SECURITY_VALID);
2370         ctxt.vsi_num = vsi->vsi_id;
2371
2372         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2373         if (ret) {
2374                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan rx pruning",
2375                             on ? "enable" : "disable");
2376                 return -EINVAL;
2377         } else {
2378                 vsi->info.valid_sections |=
2379                         rte_cpu_to_le_16(ICE_AQ_VSI_PROP_SW_VALID |
2380                                          ICE_AQ_VSI_PROP_SECURITY_VALID);
2381         }
2382
2383         /* consist with other drivers, allow untagged packet when vlan filter on */
2384         if (on)
2385                 ret = ice_add_vlan_filter(vsi, 0);
2386         else
2387                 ret = ice_remove_vlan_filter(vsi, 0);
2388
2389         return 0;
2390 }
2391
2392 static int
2393 ice_vsi_config_vlan_stripping(struct ice_vsi *vsi, bool on)
2394 {
2395         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2396         struct ice_vsi_ctx ctxt;
2397         uint8_t vlan_flags;
2398         int ret = 0;
2399
2400         /* Check if it has been already on or off */
2401         if (vsi->info.valid_sections &
2402                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID)) {
2403                 if (on) {
2404                         if ((vsi->info.vlan_flags &
2405                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2406                             ICE_AQ_VSI_VLAN_EMOD_STR_BOTH)
2407                                 return 0; /* already on */
2408                 } else {
2409                         if ((vsi->info.vlan_flags &
2410                              ICE_AQ_VSI_VLAN_EMOD_M) ==
2411                             ICE_AQ_VSI_VLAN_EMOD_NOTHING)
2412                                 return 0; /* already off */
2413                 }
2414         }
2415
2416         if (on)
2417                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_STR_BOTH;
2418         else
2419                 vlan_flags = ICE_AQ_VSI_VLAN_EMOD_NOTHING;
2420         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_VLAN_EMOD_M);
2421         vsi->info.vlan_flags |= vlan_flags;
2422         (void)rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2423         ctxt.info.valid_sections =
2424                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2425         ctxt.vsi_num = vsi->vsi_id;
2426         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2427         if (ret) {
2428                 PMD_DRV_LOG(INFO, "Update VSI failed to %s vlan stripping",
2429                             on ? "enable" : "disable");
2430                 return -EINVAL;
2431         }
2432
2433         vsi->info.valid_sections |=
2434                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2435
2436         return ret;
2437 }
2438
2439 static int
2440 ice_vlan_offload_set(struct rte_eth_dev *dev, int mask)
2441 {
2442         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2443         struct ice_vsi *vsi = pf->main_vsi;
2444         struct rte_eth_rxmode *rxmode;
2445
2446         rxmode = &dev->data->dev_conf.rxmode;
2447         if (mask & ETH_VLAN_FILTER_MASK) {
2448                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2449                         ice_vsi_config_vlan_filter(vsi, TRUE);
2450                 else
2451                         ice_vsi_config_vlan_filter(vsi, FALSE);
2452         }
2453
2454         if (mask & ETH_VLAN_STRIP_MASK) {
2455                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2456                         ice_vsi_config_vlan_stripping(vsi, TRUE);
2457                 else
2458                         ice_vsi_config_vlan_stripping(vsi, FALSE);
2459         }
2460
2461         if (mask & ETH_VLAN_EXTEND_MASK) {
2462                 if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2463                         ice_vsi_config_double_vlan(vsi, TRUE);
2464                 else
2465                         ice_vsi_config_double_vlan(vsi, FALSE);
2466         }
2467
2468         return 0;
2469 }
2470
2471 static int
2472 ice_vlan_tpid_set(struct rte_eth_dev *dev,
2473                   enum rte_vlan_type vlan_type,
2474                   uint16_t tpid)
2475 {
2476         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2477         uint64_t reg_r = 0, reg_w = 0;
2478         uint16_t reg_id = 0;
2479         int ret = 0;
2480         int qinq = dev->data->dev_conf.rxmode.offloads &
2481                    DEV_RX_OFFLOAD_VLAN_EXTEND;
2482
2483         switch (vlan_type) {
2484         case ETH_VLAN_TYPE_OUTER:
2485                 if (qinq)
2486                         reg_id = 3;
2487                 else
2488                         reg_id = 5;
2489         break;
2490         case ETH_VLAN_TYPE_INNER:
2491                 if (qinq) {
2492                         reg_id = 5;
2493                 } else {
2494                         PMD_DRV_LOG(ERR,
2495                                     "Unsupported vlan type in single vlan.");
2496                         return -EINVAL;
2497                 }
2498                 break;
2499         default:
2500                 PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type);
2501                 return -EINVAL;
2502         }
2503         reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id));
2504         PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: "
2505                     "0x%08"PRIx64"", reg_id, reg_r);
2506
2507         reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M));
2508         reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S);
2509         if (reg_r == reg_w) {
2510                 PMD_DRV_LOG(DEBUG, "No need to write");
2511                 return 0;
2512         }
2513
2514         ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w);
2515         PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to "
2516                     "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id);
2517
2518         return ret;
2519 }
2520
2521 static int
2522 ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2523 {
2524         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2525         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2526         int ret;
2527
2528         if (!lut)
2529                 return -EINVAL;
2530
2531         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2532                 ret = ice_aq_get_rss_lut(hw, vsi->idx, TRUE,
2533                                          lut, lut_size);
2534                 if (ret) {
2535                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2536                         return -EINVAL;
2537                 }
2538         } else {
2539                 uint64_t *lut_dw = (uint64_t *)lut;
2540                 uint16_t i, lut_size_dw = lut_size / 4;
2541
2542                 for (i = 0; i < lut_size_dw; i++)
2543                         lut_dw[i] = ICE_READ_REG(hw, PFQF_HLUT(i));
2544         }
2545
2546         return 0;
2547 }
2548
2549 static int
2550 ice_set_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2551 {
2552         struct ice_pf *pf = ICE_VSI_TO_PF(vsi);
2553         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2554         int ret;
2555
2556         if (!vsi || !lut)
2557                 return -EINVAL;
2558
2559         if (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {
2560                 ret = ice_aq_set_rss_lut(hw, vsi->idx, TRUE,
2561                                          lut, lut_size);
2562                 if (ret) {
2563                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2564                         return -EINVAL;
2565                 }
2566         } else {
2567                 uint64_t *lut_dw = (uint64_t *)lut;
2568                 uint16_t i, lut_size_dw = lut_size / 4;
2569
2570                 for (i = 0; i < lut_size_dw; i++)
2571                         ICE_WRITE_REG(hw, PFQF_HLUT(i), lut_dw[i]);
2572
2573                 ice_flush(hw);
2574         }
2575
2576         return 0;
2577 }
2578
2579 static int
2580 ice_rss_reta_update(struct rte_eth_dev *dev,
2581                     struct rte_eth_rss_reta_entry64 *reta_conf,
2582                     uint16_t reta_size)
2583 {
2584         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2585         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2586         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2587         uint16_t idx, shift;
2588         uint8_t *lut;
2589         int ret;
2590
2591         if (reta_size != lut_size ||
2592             reta_size > ETH_RSS_RETA_SIZE_512) {
2593                 PMD_DRV_LOG(ERR,
2594                             "The size of hash lookup table configured (%d)"
2595                             "doesn't match the number hardware can "
2596                             "supported (%d)",
2597                             reta_size, lut_size);
2598                 return -EINVAL;
2599         }
2600
2601         lut = rte_zmalloc(NULL, reta_size, 0);
2602         if (!lut) {
2603                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2604                 return -ENOMEM;
2605         }
2606         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2607         if (ret)
2608                 goto out;
2609
2610         for (i = 0; i < reta_size; i++) {
2611                 idx = i / RTE_RETA_GROUP_SIZE;
2612                 shift = i % RTE_RETA_GROUP_SIZE;
2613                 if (reta_conf[idx].mask & (1ULL << shift))
2614                         lut[i] = reta_conf[idx].reta[shift];
2615         }
2616         ret = ice_set_rss_lut(pf->main_vsi, lut, reta_size);
2617
2618 out:
2619         rte_free(lut);
2620
2621         return ret;
2622 }
2623
2624 static int
2625 ice_rss_reta_query(struct rte_eth_dev *dev,
2626                    struct rte_eth_rss_reta_entry64 *reta_conf,
2627                    uint16_t reta_size)
2628 {
2629         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2630         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2631         uint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;
2632         uint16_t idx, shift;
2633         uint8_t *lut;
2634         int ret;
2635
2636         if (reta_size != lut_size ||
2637             reta_size > ETH_RSS_RETA_SIZE_512) {
2638                 PMD_DRV_LOG(ERR,
2639                             "The size of hash lookup table configured (%d)"
2640                             "doesn't match the number hardware can "
2641                             "supported (%d)",
2642                             reta_size, lut_size);
2643                 return -EINVAL;
2644         }
2645
2646         lut = rte_zmalloc(NULL, reta_size, 0);
2647         if (!lut) {
2648                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2649                 return -ENOMEM;
2650         }
2651
2652         ret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);
2653         if (ret)
2654                 goto out;
2655
2656         for (i = 0; i < reta_size; i++) {
2657                 idx = i / RTE_RETA_GROUP_SIZE;
2658                 shift = i % RTE_RETA_GROUP_SIZE;
2659                 if (reta_conf[idx].mask & (1ULL << shift))
2660                         reta_conf[idx].reta[shift] = lut[i];
2661         }
2662
2663 out:
2664         rte_free(lut);
2665
2666         return ret;
2667 }
2668
2669 static int
2670 ice_set_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t key_len)
2671 {
2672         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2673         int ret = 0;
2674
2675         if (!key || key_len == 0) {
2676                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2677                 return 0;
2678         } else if (key_len != (VSIQF_HKEY_MAX_INDEX + 1) *
2679                    sizeof(uint32_t)) {
2680                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2681                 return -EINVAL;
2682         }
2683
2684         struct ice_aqc_get_set_rss_keys *key_dw =
2685                 (struct ice_aqc_get_set_rss_keys *)key;
2686
2687         ret = ice_aq_set_rss_key(hw, vsi->idx, key_dw);
2688         if (ret) {
2689                 PMD_DRV_LOG(ERR, "Failed to configure RSS key via AQ");
2690                 ret = -EINVAL;
2691         }
2692
2693         return ret;
2694 }
2695
2696 static int
2697 ice_get_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t *key_len)
2698 {
2699         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
2700         int ret;
2701
2702         if (!key || !key_len)
2703                 return -EINVAL;
2704
2705         ret = ice_aq_get_rss_key
2706                 (hw, vsi->idx,
2707                  (struct ice_aqc_get_set_rss_keys *)key);
2708         if (ret) {
2709                 PMD_DRV_LOG(ERR, "Failed to get RSS key via AQ");
2710                 return -EINVAL;
2711         }
2712         *key_len = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2713
2714         return 0;
2715 }
2716
2717 static int
2718 ice_rss_hash_update(struct rte_eth_dev *dev,
2719                     struct rte_eth_rss_conf *rss_conf)
2720 {
2721         enum ice_status status = ICE_SUCCESS;
2722         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2723         struct ice_vsi *vsi = pf->main_vsi;
2724
2725         /* set hash key */
2726         status = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);
2727         if (status)
2728                 return status;
2729
2730         /* TODO: hash enable config, ice_add_rss_cfg */
2731         return 0;
2732 }
2733
2734 static int
2735 ice_rss_hash_conf_get(struct rte_eth_dev *dev,
2736                       struct rte_eth_rss_conf *rss_conf)
2737 {
2738         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2739         struct ice_vsi *vsi = pf->main_vsi;
2740
2741         ice_get_rss_key(vsi, rss_conf->rss_key,
2742                         &rss_conf->rss_key_len);
2743
2744         /* TODO: default set to 0 as hf config is not supported now */
2745         rss_conf->rss_hf = 0;
2746         return 0;
2747 }
2748
2749 static void
2750 ice_promisc_enable(struct rte_eth_dev *dev)
2751 {
2752         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2753         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2754         struct ice_vsi *vsi = pf->main_vsi;
2755         uint8_t pmask;
2756         uint16_t status;
2757
2758         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
2759                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2760
2761         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
2762         if (status != ICE_SUCCESS)
2763                 PMD_DRV_LOG(ERR, "Failed to enable promisc, err=%d", status);
2764 }
2765
2766 static void
2767 ice_promisc_disable(struct rte_eth_dev *dev)
2768 {
2769         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2770         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2771         struct ice_vsi *vsi = pf->main_vsi;
2772         uint16_t status;
2773         uint8_t pmask;
2774
2775         pmask = ICE_PROMISC_UCAST_RX | ICE_PROMISC_UCAST_TX |
2776                 ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2777
2778         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
2779         if (status != ICE_SUCCESS)
2780                 PMD_DRV_LOG(ERR, "Failed to clear promisc, err=%d", status);
2781 }
2782
2783 static void
2784 ice_allmulti_enable(struct rte_eth_dev *dev)
2785 {
2786         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2787         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2788         struct ice_vsi *vsi = pf->main_vsi;
2789         uint8_t pmask;
2790         uint16_t status;
2791
2792         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2793
2794         status = ice_set_vsi_promisc(hw, vsi->idx, pmask, 0);
2795         if (status != ICE_SUCCESS)
2796                 PMD_DRV_LOG(ERR, "Failed to enable allmulti, err=%d", status);
2797 }
2798
2799 static void
2800 ice_allmulti_disable(struct rte_eth_dev *dev)
2801 {
2802         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2803         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2804         struct ice_vsi *vsi = pf->main_vsi;
2805         uint16_t status;
2806         uint8_t pmask;
2807
2808         if (dev->data->promiscuous == 1)
2809                 return; /* must remain in all_multicast mode */
2810
2811         pmask = ICE_PROMISC_MCAST_RX | ICE_PROMISC_MCAST_TX;
2812
2813         status = ice_clear_vsi_promisc(hw, vsi->idx, pmask, 0);
2814         if (status != ICE_SUCCESS)
2815                 PMD_DRV_LOG(ERR, "Failed to clear allmulti, err=%d", status);
2816 }
2817
2818 static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
2819                                     uint16_t queue_id)
2820 {
2821         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2822         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2823         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2824         uint32_t val;
2825         uint16_t msix_intr;
2826
2827         msix_intr = intr_handle->intr_vec[queue_id];
2828
2829         val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
2830               GLINT_DYN_CTL_ITR_INDX_M;
2831         val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
2832
2833         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
2834         rte_intr_enable(&pci_dev->intr_handle);
2835
2836         return 0;
2837 }
2838
2839 static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,
2840                                      uint16_t queue_id)
2841 {
2842         struct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);
2843         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2844         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2845         uint16_t msix_intr;
2846
2847         msix_intr = intr_handle->intr_vec[queue_id];
2848
2849         ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);
2850
2851         return 0;
2852 }
2853
2854 static int
2855 ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
2856 {
2857         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2858         u32 full_ver;
2859         u8 ver, patch;
2860         u16 build;
2861         int ret;
2862
2863         full_ver = hw->nvm.oem_ver;
2864         ver = (u8)(full_ver >> 24);
2865         build = (u16)((full_ver >> 8) & 0xffff);
2866         patch = (u8)(full_ver & 0xff);
2867
2868         ret = snprintf(fw_version, fw_size,
2869                         "%d.%d%d 0x%08x %d.%d.%d",
2870                         ((hw->nvm.ver >> 12) & 0xf),
2871                         ((hw->nvm.ver >> 4) & 0xff),
2872                         (hw->nvm.ver & 0xf), hw->nvm.eetrack,
2873                         ver, build, patch);
2874
2875         /* add the size of '\0' */
2876         ret += 1;
2877         if (fw_size < (u32)ret)
2878                 return ret;
2879         else
2880                 return 0;
2881 }
2882
2883 static int
2884 ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)
2885 {
2886         struct ice_hw *hw;
2887         struct ice_vsi_ctx ctxt;
2888         uint8_t vlan_flags = 0;
2889         int ret;
2890
2891         if (!vsi || !info) {
2892                 PMD_DRV_LOG(ERR, "invalid parameters");
2893                 return -EINVAL;
2894         }
2895
2896         if (info->on) {
2897                 vsi->info.pvid = info->config.pvid;
2898                 /**
2899                  * If insert pvid is enabled, only tagged pkts are
2900                  * allowed to be sent out.
2901                  */
2902                 vlan_flags = ICE_AQ_VSI_PVLAN_INSERT_PVID |
2903                              ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2904         } else {
2905                 vsi->info.pvid = 0;
2906                 if (info->config.reject.tagged == 0)
2907                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_TAGGED;
2908
2909                 if (info->config.reject.untagged == 0)
2910                         vlan_flags |= ICE_AQ_VSI_VLAN_MODE_UNTAGGED;
2911         }
2912         vsi->info.vlan_flags &= ~(ICE_AQ_VSI_PVLAN_INSERT_PVID |
2913                                   ICE_AQ_VSI_VLAN_MODE_M);
2914         vsi->info.vlan_flags |= vlan_flags;
2915         memset(&ctxt, 0, sizeof(ctxt));
2916         rte_memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2917         ctxt.info.valid_sections =
2918                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2919         ctxt.vsi_num = vsi->vsi_id;
2920
2921         hw = ICE_VSI_TO_HW(vsi);
2922         ret = ice_update_vsi(hw, vsi->idx, &ctxt, NULL);
2923         if (ret != ICE_SUCCESS) {
2924                 PMD_DRV_LOG(ERR,
2925                             "update VSI for VLAN insert failed, err %d",
2926                             ret);
2927                 return -EINVAL;
2928         }
2929
2930         vsi->info.valid_sections |=
2931                 rte_cpu_to_le_16(ICE_AQ_VSI_PROP_VLAN_VALID);
2932
2933         return ret;
2934 }
2935
2936 static int
2937 ice_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
2938 {
2939         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
2940         struct ice_vsi *vsi = pf->main_vsi;
2941         struct rte_eth_dev_data *data = pf->dev_data;
2942         struct ice_vsi_vlan_pvid_info info;
2943         int ret;
2944
2945         memset(&info, 0, sizeof(info));
2946         info.on = on;
2947         if (info.on) {
2948                 info.config.pvid = pvid;
2949         } else {
2950                 info.config.reject.tagged =
2951                         data->dev_conf.txmode.hw_vlan_reject_tagged;
2952                 info.config.reject.untagged =
2953                         data->dev_conf.txmode.hw_vlan_reject_untagged;
2954         }
2955
2956         ret = ice_vsi_vlan_pvid_set(vsi, &info);
2957         if (ret < 0) {
2958                 PMD_DRV_LOG(ERR, "Failed to set pvid.");
2959                 return -EINVAL;
2960         }
2961
2962         return 0;
2963 }
2964
2965 static int
2966 ice_get_eeprom_length(struct rte_eth_dev *dev)
2967 {
2968         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2969
2970         /* Convert word count to byte count */
2971         return hw->nvm.sr_words << 1;
2972 }
2973
2974 static int
2975 ice_get_eeprom(struct rte_eth_dev *dev,
2976                struct rte_dev_eeprom_info *eeprom)
2977 {
2978         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2979         uint16_t *data = eeprom->data;
2980         uint16_t first_word, last_word, nwords;
2981         enum ice_status status = ICE_SUCCESS;
2982
2983         first_word = eeprom->offset >> 1;
2984         last_word = (eeprom->offset + eeprom->length - 1) >> 1;
2985         nwords = last_word - first_word + 1;
2986
2987         if (first_word > hw->nvm.sr_words ||
2988             last_word > hw->nvm.sr_words) {
2989                 PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range.");
2990                 return -EINVAL;
2991         }
2992
2993         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
2994
2995         status = ice_read_sr_buf(hw, first_word, &nwords, data);
2996         if (status) {
2997                 PMD_DRV_LOG(ERR, "EEPROM read failed.");
2998                 eeprom->length = sizeof(uint16_t) * nwords;
2999                 return -EIO;
3000         }
3001
3002         return 0;
3003 }
3004
3005 static void
3006 ice_stat_update_32(struct ice_hw *hw,
3007                    uint32_t reg,
3008                    bool offset_loaded,
3009                    uint64_t *offset,
3010                    uint64_t *stat)
3011 {
3012         uint64_t new_data;
3013
3014         new_data = (uint64_t)ICE_READ_REG(hw, reg);
3015         if (!offset_loaded)
3016                 *offset = new_data;
3017
3018         if (new_data >= *offset)
3019                 *stat = (uint64_t)(new_data - *offset);
3020         else
3021                 *stat = (uint64_t)((new_data +
3022                                     ((uint64_t)1 << ICE_32_BIT_WIDTH))
3023                                    - *offset);
3024 }
3025
3026 static void
3027 ice_stat_update_40(struct ice_hw *hw,
3028                    uint32_t hireg,
3029                    uint32_t loreg,
3030                    bool offset_loaded,
3031                    uint64_t *offset,
3032                    uint64_t *stat)
3033 {
3034         uint64_t new_data;
3035
3036         new_data = (uint64_t)ICE_READ_REG(hw, loreg);
3037         new_data |= (uint64_t)(ICE_READ_REG(hw, hireg) & ICE_8_BIT_MASK) <<
3038                     ICE_32_BIT_WIDTH;
3039
3040         if (!offset_loaded)
3041                 *offset = new_data;
3042
3043         if (new_data >= *offset)
3044                 *stat = new_data - *offset;
3045         else
3046                 *stat = (uint64_t)((new_data +
3047                                     ((uint64_t)1 << ICE_40_BIT_WIDTH)) -
3048                                    *offset);
3049
3050         *stat &= ICE_40_BIT_MASK;
3051 }
3052
3053 /* Get all the statistics of a VSI */
3054 static void
3055 ice_update_vsi_stats(struct ice_vsi *vsi)
3056 {
3057         struct ice_eth_stats *oes = &vsi->eth_stats_offset;
3058         struct ice_eth_stats *nes = &vsi->eth_stats;
3059         struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
3060         int idx = rte_le_to_cpu_16(vsi->vsi_id);
3061
3062         ice_stat_update_40(hw, GLV_GORCH(idx), GLV_GORCL(idx),
3063                            vsi->offset_loaded, &oes->rx_bytes,
3064                            &nes->rx_bytes);
3065         ice_stat_update_40(hw, GLV_UPRCH(idx), GLV_UPRCL(idx),
3066                            vsi->offset_loaded, &oes->rx_unicast,
3067                            &nes->rx_unicast);
3068         ice_stat_update_40(hw, GLV_MPRCH(idx), GLV_MPRCL(idx),
3069                            vsi->offset_loaded, &oes->rx_multicast,
3070                            &nes->rx_multicast);
3071         ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),
3072                            vsi->offset_loaded, &oes->rx_broadcast,
3073                            &nes->rx_broadcast);
3074         /* exclude CRC bytes */
3075         nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
3076                           nes->rx_broadcast) * ETHER_CRC_LEN;
3077
3078         ice_stat_update_32(hw, GLV_RDPC(idx), vsi->offset_loaded,
3079                            &oes->rx_discards, &nes->rx_discards);
3080         /* GLV_REPC not supported */
3081         /* GLV_RMPC not supported */
3082         ice_stat_update_32(hw, GLSWID_RUPP(idx), vsi->offset_loaded,
3083                            &oes->rx_unknown_protocol,
3084                            &nes->rx_unknown_protocol);
3085         ice_stat_update_40(hw, GLV_GOTCH(idx), GLV_GOTCL(idx),
3086                            vsi->offset_loaded, &oes->tx_bytes,
3087                            &nes->tx_bytes);
3088         ice_stat_update_40(hw, GLV_UPTCH(idx), GLV_UPTCL(idx),
3089                            vsi->offset_loaded, &oes->tx_unicast,
3090                            &nes->tx_unicast);
3091         ice_stat_update_40(hw, GLV_MPTCH(idx), GLV_MPTCL(idx),
3092                            vsi->offset_loaded, &oes->tx_multicast,
3093                            &nes->tx_multicast);
3094         ice_stat_update_40(hw, GLV_BPTCH(idx), GLV_BPTCL(idx),
3095                            vsi->offset_loaded,  &oes->tx_broadcast,
3096                            &nes->tx_broadcast);
3097         /* GLV_TDPC not supported */
3098         ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,
3099                            &oes->tx_errors, &nes->tx_errors);
3100         vsi->offset_loaded = true;
3101
3102         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************",
3103                     vsi->vsi_id);
3104         PMD_DRV_LOG(DEBUG, "rx_bytes:            %"PRIu64"", nes->rx_bytes);
3105         PMD_DRV_LOG(DEBUG, "rx_unicast:          %"PRIu64"", nes->rx_unicast);
3106         PMD_DRV_LOG(DEBUG, "rx_multicast:        %"PRIu64"", nes->rx_multicast);
3107         PMD_DRV_LOG(DEBUG, "rx_broadcast:        %"PRIu64"", nes->rx_broadcast);
3108         PMD_DRV_LOG(DEBUG, "rx_discards:         %"PRIu64"", nes->rx_discards);
3109         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol: %"PRIu64"",
3110                     nes->rx_unknown_protocol);
3111         PMD_DRV_LOG(DEBUG, "tx_bytes:            %"PRIu64"", nes->tx_bytes);
3112         PMD_DRV_LOG(DEBUG, "tx_unicast:          %"PRIu64"", nes->tx_unicast);
3113         PMD_DRV_LOG(DEBUG, "tx_multicast:        %"PRIu64"", nes->tx_multicast);
3114         PMD_DRV_LOG(DEBUG, "tx_broadcast:        %"PRIu64"", nes->tx_broadcast);
3115         PMD_DRV_LOG(DEBUG, "tx_discards:         %"PRIu64"", nes->tx_discards);
3116         PMD_DRV_LOG(DEBUG, "tx_errors:           %"PRIu64"", nes->tx_errors);
3117         PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats end ****************",
3118                     vsi->vsi_id);
3119 }
3120
3121 static void
3122 ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)
3123 {
3124         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3125         struct ice_hw_port_stats *os = &pf->stats_offset; /* old stats */
3126
3127         /* Get statistics of struct ice_eth_stats */
3128         ice_stat_update_40(hw, GLPRT_GORCH(hw->port_info->lport),
3129                            GLPRT_GORCL(hw->port_info->lport),
3130                            pf->offset_loaded, &os->eth.rx_bytes,
3131                            &ns->eth.rx_bytes);
3132         ice_stat_update_40(hw, GLPRT_UPRCH(hw->port_info->lport),
3133                            GLPRT_UPRCL(hw->port_info->lport),
3134                            pf->offset_loaded, &os->eth.rx_unicast,
3135                            &ns->eth.rx_unicast);
3136         ice_stat_update_40(hw, GLPRT_MPRCH(hw->port_info->lport),
3137                            GLPRT_MPRCL(hw->port_info->lport),
3138                            pf->offset_loaded, &os->eth.rx_multicast,
3139                            &ns->eth.rx_multicast);
3140         ice_stat_update_40(hw, GLPRT_BPRCH(hw->port_info->lport),
3141                            GLPRT_BPRCL(hw->port_info->lport),
3142                            pf->offset_loaded, &os->eth.rx_broadcast,
3143                            &ns->eth.rx_broadcast);
3144         ice_stat_update_32(hw, PRTRPB_RDPC,
3145                            pf->offset_loaded, &os->eth.rx_discards,
3146                            &ns->eth.rx_discards);
3147
3148         /* Workaround: CRC size should not be included in byte statistics,
3149          * so subtract ETHER_CRC_LEN from the byte counter for each rx packet.
3150          */
3151         ns->eth.rx_bytes -= (ns->eth.rx_unicast + ns->eth.rx_multicast +
3152                              ns->eth.rx_broadcast) * ETHER_CRC_LEN;
3153
3154         /* GLPRT_REPC not supported */
3155         /* GLPRT_RMPC not supported */
3156         ice_stat_update_32(hw, GLSWID_RUPP(hw->port_info->lport),
3157                            pf->offset_loaded,
3158                            &os->eth.rx_unknown_protocol,
3159                            &ns->eth.rx_unknown_protocol);
3160         ice_stat_update_40(hw, GLPRT_GOTCH(hw->port_info->lport),
3161                            GLPRT_GOTCL(hw->port_info->lport),
3162                            pf->offset_loaded, &os->eth.tx_bytes,
3163                            &ns->eth.tx_bytes);
3164         ice_stat_update_40(hw, GLPRT_UPTCH(hw->port_info->lport),
3165                            GLPRT_UPTCL(hw->port_info->lport),
3166                            pf->offset_loaded, &os->eth.tx_unicast,
3167                            &ns->eth.tx_unicast);
3168         ice_stat_update_40(hw, GLPRT_MPTCH(hw->port_info->lport),
3169                            GLPRT_MPTCL(hw->port_info->lport),
3170                            pf->offset_loaded, &os->eth.tx_multicast,
3171                            &ns->eth.tx_multicast);
3172         ice_stat_update_40(hw, GLPRT_BPTCH(hw->port_info->lport),
3173                            GLPRT_BPTCL(hw->port_info->lport),
3174                            pf->offset_loaded, &os->eth.tx_broadcast,
3175                            &ns->eth.tx_broadcast);
3176         ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +
3177                              ns->eth.tx_broadcast) * ETHER_CRC_LEN;
3178
3179         /* GLPRT_TEPC not supported */
3180
3181         /* additional port specific stats */
3182         ice_stat_update_32(hw, GLPRT_TDOLD(hw->port_info->lport),
3183                            pf->offset_loaded, &os->tx_dropped_link_down,
3184                            &ns->tx_dropped_link_down);
3185         ice_stat_update_32(hw, GLPRT_CRCERRS(hw->port_info->lport),
3186                            pf->offset_loaded, &os->crc_errors,
3187                            &ns->crc_errors);
3188         ice_stat_update_32(hw, GLPRT_ILLERRC(hw->port_info->lport),
3189                            pf->offset_loaded, &os->illegal_bytes,
3190                            &ns->illegal_bytes);
3191         /* GLPRT_ERRBC not supported */
3192         ice_stat_update_32(hw, GLPRT_MLFC(hw->port_info->lport),
3193                            pf->offset_loaded, &os->mac_local_faults,
3194                            &ns->mac_local_faults);
3195         ice_stat_update_32(hw, GLPRT_MRFC(hw->port_info->lport),
3196                            pf->offset_loaded, &os->mac_remote_faults,
3197                            &ns->mac_remote_faults);
3198
3199         ice_stat_update_32(hw, GLPRT_RLEC(hw->port_info->lport),
3200                            pf->offset_loaded, &os->rx_len_errors,
3201                            &ns->rx_len_errors);
3202
3203         ice_stat_update_32(hw, GLPRT_LXONRXC(hw->port_info->lport),
3204                            pf->offset_loaded, &os->link_xon_rx,
3205                            &ns->link_xon_rx);
3206         ice_stat_update_32(hw, GLPRT_LXOFFRXC(hw->port_info->lport),
3207                            pf->offset_loaded, &os->link_xoff_rx,
3208                            &ns->link_xoff_rx);
3209         ice_stat_update_32(hw, GLPRT_LXONTXC(hw->port_info->lport),
3210                            pf->offset_loaded, &os->link_xon_tx,
3211                            &ns->link_xon_tx);
3212         ice_stat_update_32(hw, GLPRT_LXOFFTXC(hw->port_info->lport),
3213                            pf->offset_loaded, &os->link_xoff_tx,
3214                            &ns->link_xoff_tx);
3215         ice_stat_update_40(hw, GLPRT_PRC64H(hw->port_info->lport),
3216                            GLPRT_PRC64L(hw->port_info->lport),
3217                            pf->offset_loaded, &os->rx_size_64,
3218                            &ns->rx_size_64);
3219         ice_stat_update_40(hw, GLPRT_PRC127H(hw->port_info->lport),
3220                            GLPRT_PRC127L(hw->port_info->lport),
3221                            pf->offset_loaded, &os->rx_size_127,
3222                            &ns->rx_size_127);
3223         ice_stat_update_40(hw, GLPRT_PRC255H(hw->port_info->lport),
3224                            GLPRT_PRC255L(hw->port_info->lport),
3225                            pf->offset_loaded, &os->rx_size_255,
3226                            &ns->rx_size_255);
3227         ice_stat_update_40(hw, GLPRT_PRC511H(hw->port_info->lport),
3228                            GLPRT_PRC511L(hw->port_info->lport),
3229                            pf->offset_loaded, &os->rx_size_511,
3230                            &ns->rx_size_511);
3231         ice_stat_update_40(hw, GLPRT_PRC1023H(hw->port_info->lport),
3232                            GLPRT_PRC1023L(hw->port_info->lport),
3233                            pf->offset_loaded, &os->rx_size_1023,
3234                            &ns->rx_size_1023);
3235         ice_stat_update_40(hw, GLPRT_PRC1522H(hw->port_info->lport),
3236                            GLPRT_PRC1522L(hw->port_info->lport),
3237                            pf->offset_loaded, &os->rx_size_1522,
3238                            &ns->rx_size_1522);
3239         ice_stat_update_40(hw, GLPRT_PRC9522H(hw->port_info->lport),
3240                            GLPRT_PRC9522L(hw->port_info->lport),
3241                            pf->offset_loaded, &os->rx_size_big,
3242                            &ns->rx_size_big);
3243         ice_stat_update_32(hw, GLPRT_RUC(hw->port_info->lport),
3244                            pf->offset_loaded, &os->rx_undersize,
3245                            &ns->rx_undersize);
3246         ice_stat_update_32(hw, GLPRT_RFC(hw->port_info->lport),
3247                            pf->offset_loaded, &os->rx_fragments,
3248                            &ns->rx_fragments);
3249         ice_stat_update_32(hw, GLPRT_ROC(hw->port_info->lport),
3250                            pf->offset_loaded, &os->rx_oversize,
3251                            &ns->rx_oversize);
3252         ice_stat_update_32(hw, GLPRT_RJC(hw->port_info->lport),
3253                            pf->offset_loaded, &os->rx_jabber,
3254                            &ns->rx_jabber);
3255         ice_stat_update_40(hw, GLPRT_PTC64H(hw->port_info->lport),
3256                            GLPRT_PTC64L(hw->port_info->lport),
3257                            pf->offset_loaded, &os->tx_size_64,
3258                            &ns->tx_size_64);
3259         ice_stat_update_40(hw, GLPRT_PTC127H(hw->port_info->lport),
3260                            GLPRT_PTC127L(hw->port_info->lport),
3261                            pf->offset_loaded, &os->tx_size_127,
3262                            &ns->tx_size_127);
3263         ice_stat_update_40(hw, GLPRT_PTC255H(hw->port_info->lport),
3264                            GLPRT_PTC255L(hw->port_info->lport),
3265                            pf->offset_loaded, &os->tx_size_255,
3266                            &ns->tx_size_255);
3267         ice_stat_update_40(hw, GLPRT_PTC511H(hw->port_info->lport),
3268                            GLPRT_PTC511L(hw->port_info->lport),
3269                            pf->offset_loaded, &os->tx_size_511,
3270                            &ns->tx_size_511);
3271         ice_stat_update_40(hw, GLPRT_PTC1023H(hw->port_info->lport),
3272                            GLPRT_PTC1023L(hw->port_info->lport),
3273                            pf->offset_loaded, &os->tx_size_1023,
3274                            &ns->tx_size_1023);
3275         ice_stat_update_40(hw, GLPRT_PTC1522H(hw->port_info->lport),
3276                            GLPRT_PTC1522L(hw->port_info->lport),
3277                            pf->offset_loaded, &os->tx_size_1522,
3278                            &ns->tx_size_1522);
3279         ice_stat_update_40(hw, GLPRT_PTC9522H(hw->port_info->lport),
3280                            GLPRT_PTC9522L(hw->port_info->lport),
3281                            pf->offset_loaded, &os->tx_size_big,
3282                            &ns->tx_size_big);
3283
3284         /* GLPRT_MSPDC not supported */
3285         /* GLPRT_XEC not supported */
3286
3287         pf->offset_loaded = true;
3288
3289         if (pf->main_vsi)
3290                 ice_update_vsi_stats(pf->main_vsi);
3291 }
3292
3293 /* Get all statistics of a port */
3294 static int
3295 ice_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
3296 {
3297         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3298         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3299         struct ice_hw_port_stats *ns = &pf->stats; /* new stats */
3300
3301         /* call read registers - updates values, now write them to struct */
3302         ice_read_stats_registers(pf, hw);
3303
3304         stats->ipackets = ns->eth.rx_unicast +
3305                           ns->eth.rx_multicast +
3306                           ns->eth.rx_broadcast -
3307                           ns->eth.rx_discards -
3308                           pf->main_vsi->eth_stats.rx_discards;
3309         stats->opackets = ns->eth.tx_unicast +
3310                           ns->eth.tx_multicast +
3311                           ns->eth.tx_broadcast;
3312         stats->ibytes   = ns->eth.rx_bytes;
3313         stats->obytes   = ns->eth.tx_bytes;
3314         stats->oerrors  = ns->eth.tx_errors +
3315                           pf->main_vsi->eth_stats.tx_errors;
3316
3317         /* Rx Errors */
3318         stats->imissed  = ns->eth.rx_discards +
3319                           pf->main_vsi->eth_stats.rx_discards;
3320         stats->ierrors  = ns->crc_errors +
3321                           ns->rx_undersize +
3322                           ns->rx_oversize + ns->rx_fragments + ns->rx_jabber;
3323
3324         PMD_DRV_LOG(DEBUG, "*************** PF stats start *****************");
3325         PMD_DRV_LOG(DEBUG, "rx_bytes:   %"PRIu64"", ns->eth.rx_bytes);
3326         PMD_DRV_LOG(DEBUG, "rx_unicast: %"PRIu64"", ns->eth.rx_unicast);
3327         PMD_DRV_LOG(DEBUG, "rx_multicast:%"PRIu64"", ns->eth.rx_multicast);
3328         PMD_DRV_LOG(DEBUG, "rx_broadcast:%"PRIu64"", ns->eth.rx_broadcast);
3329         PMD_DRV_LOG(DEBUG, "rx_discards:%"PRIu64"", ns->eth.rx_discards);
3330         PMD_DRV_LOG(DEBUG, "vsi rx_discards:%"PRIu64"",
3331                     pf->main_vsi->eth_stats.rx_discards);
3332         PMD_DRV_LOG(DEBUG, "rx_unknown_protocol:  %"PRIu64"",
3333                     ns->eth.rx_unknown_protocol);
3334         PMD_DRV_LOG(DEBUG, "tx_bytes:   %"PRIu64"", ns->eth.tx_bytes);
3335         PMD_DRV_LOG(DEBUG, "tx_unicast: %"PRIu64"", ns->eth.tx_unicast);
3336         PMD_DRV_LOG(DEBUG, "tx_multicast:%"PRIu64"", ns->eth.tx_multicast);
3337         PMD_DRV_LOG(DEBUG, "tx_broadcast:%"PRIu64"", ns->eth.tx_broadcast);
3338         PMD_DRV_LOG(DEBUG, "tx_discards:%"PRIu64"", ns->eth.tx_discards);
3339         PMD_DRV_LOG(DEBUG, "vsi tx_discards:%"PRIu64"",
3340                     pf->main_vsi->eth_stats.tx_discards);
3341         PMD_DRV_LOG(DEBUG, "tx_errors:          %"PRIu64"", ns->eth.tx_errors);
3342
3343         PMD_DRV_LOG(DEBUG, "tx_dropped_link_down:       %"PRIu64"",
3344                     ns->tx_dropped_link_down);
3345         PMD_DRV_LOG(DEBUG, "crc_errors: %"PRIu64"", ns->crc_errors);
3346         PMD_DRV_LOG(DEBUG, "illegal_bytes:      %"PRIu64"",
3347                     ns->illegal_bytes);
3348         PMD_DRV_LOG(DEBUG, "error_bytes:        %"PRIu64"", ns->error_bytes);
3349         PMD_DRV_LOG(DEBUG, "mac_local_faults:   %"PRIu64"",
3350                     ns->mac_local_faults);
3351         PMD_DRV_LOG(DEBUG, "mac_remote_faults:  %"PRIu64"",
3352                     ns->mac_remote_faults);
3353         PMD_DRV_LOG(DEBUG, "link_xon_rx:        %"PRIu64"", ns->link_xon_rx);
3354         PMD_DRV_LOG(DEBUG, "link_xoff_rx:       %"PRIu64"", ns->link_xoff_rx);
3355         PMD_DRV_LOG(DEBUG, "link_xon_tx:        %"PRIu64"", ns->link_xon_tx);
3356         PMD_DRV_LOG(DEBUG, "link_xoff_tx:       %"PRIu64"", ns->link_xoff_tx);
3357         PMD_DRV_LOG(DEBUG, "rx_size_64:         %"PRIu64"", ns->rx_size_64);
3358         PMD_DRV_LOG(DEBUG, "rx_size_127:        %"PRIu64"", ns->rx_size_127);
3359         PMD_DRV_LOG(DEBUG, "rx_size_255:        %"PRIu64"", ns->rx_size_255);
3360         PMD_DRV_LOG(DEBUG, "rx_size_511:        %"PRIu64"", ns->rx_size_511);
3361         PMD_DRV_LOG(DEBUG, "rx_size_1023:       %"PRIu64"", ns->rx_size_1023);
3362         PMD_DRV_LOG(DEBUG, "rx_size_1522:       %"PRIu64"", ns->rx_size_1522);
3363         PMD_DRV_LOG(DEBUG, "rx_size_big:        %"PRIu64"", ns->rx_size_big);
3364         PMD_DRV_LOG(DEBUG, "rx_undersize:       %"PRIu64"", ns->rx_undersize);
3365         PMD_DRV_LOG(DEBUG, "rx_fragments:       %"PRIu64"", ns->rx_fragments);
3366         PMD_DRV_LOG(DEBUG, "rx_oversize:        %"PRIu64"", ns->rx_oversize);
3367         PMD_DRV_LOG(DEBUG, "rx_jabber:          %"PRIu64"", ns->rx_jabber);
3368         PMD_DRV_LOG(DEBUG, "tx_size_64:         %"PRIu64"", ns->tx_size_64);
3369         PMD_DRV_LOG(DEBUG, "tx_size_127:        %"PRIu64"", ns->tx_size_127);
3370         PMD_DRV_LOG(DEBUG, "tx_size_255:        %"PRIu64"", ns->tx_size_255);
3371         PMD_DRV_LOG(DEBUG, "tx_size_511:        %"PRIu64"", ns->tx_size_511);
3372         PMD_DRV_LOG(DEBUG, "tx_size_1023:       %"PRIu64"", ns->tx_size_1023);
3373         PMD_DRV_LOG(DEBUG, "tx_size_1522:       %"PRIu64"", ns->tx_size_1522);
3374         PMD_DRV_LOG(DEBUG, "tx_size_big:        %"PRIu64"", ns->tx_size_big);
3375         PMD_DRV_LOG(DEBUG, "rx_len_errors:      %"PRIu64"", ns->rx_len_errors);
3376         PMD_DRV_LOG(DEBUG, "************* PF stats end ****************");
3377         return 0;
3378 }
3379
3380 /* Reset the statistics */
3381 static void
3382 ice_stats_reset(struct rte_eth_dev *dev)
3383 {
3384         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3385         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3386
3387         /* Mark PF and VSI stats to update the offset, aka "reset" */
3388         pf->offset_loaded = false;
3389         if (pf->main_vsi)
3390                 pf->main_vsi->offset_loaded = false;
3391
3392         /* read the stats, reading current register values into offset */
3393         ice_read_stats_registers(pf, hw);
3394 }
3395
3396 static uint32_t
3397 ice_xstats_calc_num(void)
3398 {
3399         uint32_t num;
3400
3401         num = ICE_NB_ETH_XSTATS + ICE_NB_HW_PORT_XSTATS;
3402
3403         return num;
3404 }
3405
3406 static int
3407 ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
3408                unsigned int n)
3409 {
3410         struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);
3411         struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
3412         unsigned int i;
3413         unsigned int count;
3414         struct ice_hw_port_stats *hw_stats = &pf->stats;
3415
3416         count = ice_xstats_calc_num();
3417         if (n < count)
3418                 return count;
3419
3420         ice_read_stats_registers(pf, hw);
3421
3422         if (!xstats)
3423                 return 0;
3424
3425         count = 0;
3426
3427         /* Get stats from ice_eth_stats struct */
3428         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3429                 xstats[count].value =
3430                         *(uint64_t *)((char *)&hw_stats->eth +
3431                                       ice_stats_strings[i].offset);
3432                 xstats[count].id = count;
3433                 count++;
3434         }
3435
3436         /* Get individiual stats from ice_hw_port struct */
3437         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3438                 xstats[count].value =
3439                         *(uint64_t *)((char *)hw_stats +
3440                                       ice_hw_port_strings[i].offset);
3441                 xstats[count].id = count;
3442                 count++;
3443         }
3444
3445         return count;
3446 }
3447
3448 static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
3449                                 struct rte_eth_xstat_name *xstats_names,
3450                                 __rte_unused unsigned int limit)
3451 {
3452         unsigned int count = 0;
3453         unsigned int i;
3454
3455         if (!xstats_names)
3456                 return ice_xstats_calc_num();
3457
3458         /* Note: limit checked in rte_eth_xstats_names() */
3459
3460         /* Get stats from ice_eth_stats struct */
3461         for (i = 0; i < ICE_NB_ETH_XSTATS; i++) {
3462                 strlcpy(xstats_names[count].name, ice_stats_strings[i].name,
3463                         sizeof(xstats_names[count].name));
3464                 count++;
3465         }
3466
3467         /* Get individiual stats from ice_hw_port struct */
3468         for (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {
3469                 strlcpy(xstats_names[count].name, ice_hw_port_strings[i].name,
3470                         sizeof(xstats_names[count].name));
3471                 count++;
3472         }
3473
3474         return count;
3475 }
3476
3477 static int
3478 ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3479               struct rte_pci_device *pci_dev)
3480 {
3481         return rte_eth_dev_pci_generic_probe(pci_dev,
3482                                              sizeof(struct ice_adapter),
3483                                              ice_dev_init);
3484 }
3485
3486 static int
3487 ice_pci_remove(struct rte_pci_device *pci_dev)
3488 {
3489         return rte_eth_dev_pci_generic_remove(pci_dev, ice_dev_uninit);
3490 }
3491
3492 static struct rte_pci_driver rte_ice_pmd = {
3493         .id_table = pci_id_ice_map,
3494         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
3495                      RTE_PCI_DRV_IOVA_AS_VA,
3496         .probe = ice_pci_probe,
3497         .remove = ice_pci_remove,
3498 };
3499
3500 /**
3501  * Driver initialization routine.
3502  * Invoked once at EAL init time.
3503  * Register itself as the [Poll Mode] Driver of PCI devices.
3504  */
3505 RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
3506 RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
3507 RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
3508 RTE_PMD_REGISTER_PARAM_STRING(net_ice,
3509                               ICE_MAX_QP_NUM "=<int>");
3510
3511 RTE_INIT(ice_init_log)
3512 {
3513         ice_logtype_init = rte_log_register("pmd.net.ice.init");
3514         if (ice_logtype_init >= 0)
3515                 rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE);
3516         ice_logtype_driver = rte_log_register("pmd.net.ice.driver");
3517         if (ice_logtype_driver >= 0)
3518                 rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE);
3519 }