drivers/net/ionic/ionic_ethdev.c

   1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
   2  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev.h>
   8 #include <ethdev_driver.h>
   9 #include <rte_malloc.h>
  10 #include <ethdev_pci.h>
  11
  12 #include "ionic_logs.h"
  13 #include "ionic.h"
  14 #include "ionic_dev.h"
  15 #include "ionic_mac_api.h"
  16 #include "ionic_lif.h"
  17 #include "ionic_ethdev.h"
  18 #include "ionic_rxtx.h"
  19
  20 static int  eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params);
  21 static int  eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev);
  22 static int  ionic_dev_info_get(struct rte_eth_dev *eth_dev,
  23         struct rte_eth_dev_info *dev_info);
  24 static int  ionic_dev_configure(struct rte_eth_dev *dev);
  25 static int  ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  26 static int  ionic_dev_start(struct rte_eth_dev *dev);
  27 static int  ionic_dev_stop(struct rte_eth_dev *dev);
  28 static int  ionic_dev_close(struct rte_eth_dev *dev);
  29 static int  ionic_dev_set_link_up(struct rte_eth_dev *dev);
  30 static int  ionic_dev_set_link_down(struct rte_eth_dev *dev);
  31 static int  ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
  32         struct rte_eth_fc_conf *fc_conf);
  33 static int  ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
  34         struct rte_eth_fc_conf *fc_conf);
  35 static int  ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);
  36 static int  ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
  37         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
  38 static int  ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
  39         struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size);
  40 static int  ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
  41         struct rte_eth_rss_conf *rss_conf);
  42 static int  ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
  43         struct rte_eth_rss_conf *rss_conf);
  44 static int  ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
  45         struct rte_eth_stats *stats);
  46 static int  ionic_dev_stats_reset(struct rte_eth_dev *eth_dev);
  47 static int  ionic_dev_xstats_get(struct rte_eth_dev *dev,
  48         struct rte_eth_xstat *xstats, unsigned int n);
  49 static int  ionic_dev_xstats_get_by_id(struct rte_eth_dev *dev,
  50         const uint64_t *ids, uint64_t *values, unsigned int n);
  51 static int  ionic_dev_xstats_reset(struct rte_eth_dev *dev);
  52 static int  ionic_dev_xstats_get_names(struct rte_eth_dev *dev,
  53         struct rte_eth_xstat_name *xstats_names, unsigned int size);
  54 static int  ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
  55         const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
  56         unsigned int limit);
  57 static int  ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev,
  58         char *fw_version, size_t fw_size);
  59
  60 static const struct rte_pci_id pci_id_ionic_map[] = {
  61         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_PF) },
  62         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_VF) },
  63         { RTE_PCI_DEVICE(IONIC_PENSANDO_VENDOR_ID, IONIC_DEV_ID_ETH_MGMT) },
  64         { .vendor_id = 0, /* sentinel */ },
  65 };
  66
  67 static const struct rte_eth_desc_lim rx_desc_lim = {
  68         .nb_max = IONIC_MAX_RING_DESC,
  69         .nb_min = IONIC_MIN_RING_DESC,
  70         .nb_align = 1,
  71 };
  72
  73 static const struct rte_eth_desc_lim tx_desc_lim_v1 = {
  74         .nb_max = IONIC_MAX_RING_DESC,
  75         .nb_min = IONIC_MIN_RING_DESC,
  76         .nb_align = 1,
  77         .nb_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1,
  78         .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1,
  79 };
  80
  81 static const struct eth_dev_ops ionic_eth_dev_ops = {
  82         .dev_infos_get          = ionic_dev_info_get,
  83         .dev_configure          = ionic_dev_configure,
  84         .mtu_set                = ionic_dev_mtu_set,
  85         .dev_start              = ionic_dev_start,
  86         .dev_stop               = ionic_dev_stop,
  87         .dev_close              = ionic_dev_close,
  88         .link_update            = ionic_dev_link_update,
  89         .dev_set_link_up        = ionic_dev_set_link_up,
  90         .dev_set_link_down      = ionic_dev_set_link_down,
  91         .mac_addr_add           = ionic_dev_add_mac,
  92         .mac_addr_remove        = ionic_dev_remove_mac,
  93         .mac_addr_set           = ionic_dev_set_mac,
  94         .vlan_filter_set        = ionic_dev_vlan_filter_set,
  95         .promiscuous_enable     = ionic_dev_promiscuous_enable,
  96         .promiscuous_disable    = ionic_dev_promiscuous_disable,
  97         .allmulticast_enable    = ionic_dev_allmulticast_enable,
  98         .allmulticast_disable   = ionic_dev_allmulticast_disable,
  99         .flow_ctrl_get          = ionic_flow_ctrl_get,
 100         .flow_ctrl_set          = ionic_flow_ctrl_set,
 101         .rxq_info_get           = ionic_rxq_info_get,
 102         .txq_info_get           = ionic_txq_info_get,
 103         .rx_queue_setup         = ionic_dev_rx_queue_setup,
 104         .rx_queue_release       = ionic_dev_rx_queue_release,
 105         .rx_queue_start         = ionic_dev_rx_queue_start,
 106         .rx_queue_stop          = ionic_dev_rx_queue_stop,
 107         .tx_queue_setup         = ionic_dev_tx_queue_setup,
 108         .tx_queue_release       = ionic_dev_tx_queue_release,
 109         .tx_queue_start         = ionic_dev_tx_queue_start,
 110         .tx_queue_stop          = ionic_dev_tx_queue_stop,
 111         .vlan_offload_set       = ionic_vlan_offload_set,
 112         .reta_update            = ionic_dev_rss_reta_update,
 113         .reta_query             = ionic_dev_rss_reta_query,
 114         .rss_hash_conf_get      = ionic_dev_rss_hash_conf_get,
 115         .rss_hash_update        = ionic_dev_rss_hash_update,
 116         .stats_get              = ionic_dev_stats_get,
 117         .stats_reset            = ionic_dev_stats_reset,
 118         .xstats_get             = ionic_dev_xstats_get,
 119         .xstats_get_by_id       = ionic_dev_xstats_get_by_id,
 120         .xstats_reset           = ionic_dev_xstats_reset,
 121         .xstats_get_names       = ionic_dev_xstats_get_names,
 122         .xstats_get_names_by_id = ionic_dev_xstats_get_names_by_id,
 123         .fw_version_get         = ionic_dev_fw_version_get,
 124 };
 125
 126 struct rte_ionic_xstats_name_off {
 127         char name[RTE_ETH_XSTATS_NAME_SIZE];
 128         unsigned int offset;
 129 };
 130
 131 static const struct rte_ionic_xstats_name_off rte_ionic_xstats_strings[] = {
 132         /* RX */
 133         {"rx_ucast_bytes", offsetof(struct ionic_lif_stats,
 134                         rx_ucast_bytes)},
 135         {"rx_ucast_packets", offsetof(struct ionic_lif_stats,
 136                         rx_ucast_packets)},
 137         {"rx_mcast_bytes", offsetof(struct ionic_lif_stats,
 138                         rx_mcast_bytes)},
 139         {"rx_mcast_packets", offsetof(struct ionic_lif_stats,
 140                         rx_mcast_packets)},
 141         {"rx_bcast_bytes", offsetof(struct ionic_lif_stats,
 142                         rx_bcast_bytes)},
 143         {"rx_bcast_packets", offsetof(struct ionic_lif_stats,
 144                         rx_bcast_packets)},
 145         /* RX drops */
 146         {"rx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
 147                         rx_ucast_drop_bytes)},
 148         {"rx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
 149                         rx_ucast_drop_packets)},
 150         {"rx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
 151                         rx_mcast_drop_bytes)},
 152         {"rx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
 153                         rx_mcast_drop_packets)},
 154         {"rx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
 155                         rx_bcast_drop_bytes)},
 156         {"rx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
 157                         rx_bcast_drop_packets)},
 158         {"rx_dma_error", offsetof(struct ionic_lif_stats,
 159                         rx_dma_error)},
 160         /* TX */
 161         {"tx_ucast_bytes", offsetof(struct ionic_lif_stats,
 162                         tx_ucast_bytes)},
 163         {"tx_ucast_packets", offsetof(struct ionic_lif_stats,
 164                         tx_ucast_packets)},
 165         {"tx_mcast_bytes", offsetof(struct ionic_lif_stats,
 166                         tx_mcast_bytes)},
 167         {"tx_mcast_packets", offsetof(struct ionic_lif_stats,
 168                         tx_mcast_packets)},
 169         {"tx_bcast_bytes", offsetof(struct ionic_lif_stats,
 170                         tx_bcast_bytes)},
 171         {"tx_bcast_packets", offsetof(struct ionic_lif_stats,
 172                         tx_bcast_packets)},
 173         /* TX drops */
 174         {"tx_ucast_drop_bytes", offsetof(struct ionic_lif_stats,
 175                         tx_ucast_drop_bytes)},
 176         {"tx_ucast_drop_packets", offsetof(struct ionic_lif_stats,
 177                         tx_ucast_drop_packets)},
 178         {"tx_mcast_drop_bytes", offsetof(struct ionic_lif_stats,
 179                         tx_mcast_drop_bytes)},
 180         {"tx_mcast_drop_packets", offsetof(struct ionic_lif_stats,
 181                         tx_mcast_drop_packets)},
 182         {"tx_bcast_drop_bytes", offsetof(struct ionic_lif_stats,
 183                         tx_bcast_drop_bytes)},
 184         {"tx_bcast_drop_packets", offsetof(struct ionic_lif_stats,
 185                         tx_bcast_drop_packets)},
 186         {"tx_dma_error", offsetof(struct ionic_lif_stats,
 187                         tx_dma_error)},
 188         /* Rx Queue/Ring drops */
 189         {"rx_queue_disabled", offsetof(struct ionic_lif_stats,
 190                         rx_queue_disabled)},
 191         {"rx_queue_empty", offsetof(struct ionic_lif_stats,
 192                         rx_queue_empty)},
 193         {"rx_queue_error", offsetof(struct ionic_lif_stats,
 194                         rx_queue_error)},
 195         {"rx_desc_fetch_error", offsetof(struct ionic_lif_stats,
 196                         rx_desc_fetch_error)},
 197         {"rx_desc_data_error", offsetof(struct ionic_lif_stats,
 198                         rx_desc_data_error)},
 199         /* Tx Queue/Ring drops */
 200         {"tx_queue_disabled", offsetof(struct ionic_lif_stats,
 201                         tx_queue_disabled)},
 202         {"tx_queue_error", offsetof(struct ionic_lif_stats,
 203                         tx_queue_error)},
 204         {"tx_desc_fetch_error", offsetof(struct ionic_lif_stats,
 205                         tx_desc_fetch_error)},
 206         {"tx_desc_data_error", offsetof(struct ionic_lif_stats,
 207                         tx_desc_data_error)},
 208 };
 209
 210 #define IONIC_NB_HW_STATS RTE_DIM(rte_ionic_xstats_strings)
 211
 212 static int
 213 ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev,
 214                 char *fw_version, size_t fw_size)
 215 {
 216         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 217         struct ionic_adapter *adapter = lif->adapter;
 218         int ret;
 219
 220         ret = snprintf(fw_version, fw_size, "%s",
 221                  adapter->fw_version);
 222         if (ret < 0)
 223                 return -EINVAL;
 224
 225         ret += 1; /* add the size of '\0' */
 226         if (fw_size < (size_t)ret)
 227                 return ret;
 228         else
 229                 return 0;
 230 }
 231
 232 /*
 233  * Set device link up, enable tx.
 234  */
 235 static int
 236 ionic_dev_set_link_up(struct rte_eth_dev *eth_dev)
 237 {
 238         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 239         int err;
 240
 241         IONIC_PRINT_CALL();
 242
 243         err = ionic_lif_start(lif);
 244         if (err)
 245                 IONIC_PRINT(ERR, "Could not start lif to set link up");
 246
 247         ionic_dev_link_update(lif->eth_dev, 0);
 248
 249         return err;
 250 }
 251
 252 /*
 253  * Set device link down, disable tx.
 254  */
 255 static int
 256 ionic_dev_set_link_down(struct rte_eth_dev *eth_dev)
 257 {
 258         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 259
 260         IONIC_PRINT_CALL();
 261
 262         ionic_lif_stop(lif);
 263
 264         ionic_dev_link_update(lif->eth_dev, 0);
 265
 266         return 0;
 267 }
 268
 269 int
 270 ionic_dev_link_update(struct rte_eth_dev *eth_dev,
 271                 int wait_to_complete __rte_unused)
 272 {
 273         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 274         struct ionic_adapter *adapter = lif->adapter;
 275         struct rte_eth_link link;
 276
 277         IONIC_PRINT_CALL();
 278
 279         /* Initialize */
 280         memset(&link, 0, sizeof(link));
 281
 282         if (adapter->idev.port_info->config.an_enable) {
 283                 link.link_autoneg = RTE_ETH_LINK_AUTONEG;
 284         }
 285
 286         if (!adapter->link_up ||
 287             !(lif->state & IONIC_LIF_F_UP)) {
 288                 /* Interface is down */
 289                 link.link_status = RTE_ETH_LINK_DOWN;
 290                 link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
 291                 link.link_speed = RTE_ETH_SPEED_NUM_NONE;
 292         } else {
 293                 /* Interface is up */
 294                 link.link_status = RTE_ETH_LINK_UP;
 295                 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
 296                 switch (adapter->link_speed) {
 297                 case  10000:
 298                         link.link_speed = RTE_ETH_SPEED_NUM_10G;
 299                         break;
 300                 case  25000:
 301                         link.link_speed = RTE_ETH_SPEED_NUM_25G;
 302                         break;
 303                 case  40000:
 304                         link.link_speed = RTE_ETH_SPEED_NUM_40G;
 305                         break;
 306                 case  50000:
 307                         link.link_speed = RTE_ETH_SPEED_NUM_50G;
 308                         break;
 309                 case 100000:
 310                         link.link_speed = RTE_ETH_SPEED_NUM_100G;
 311                         break;
 312                 default:
 313                         link.link_speed = RTE_ETH_SPEED_NUM_NONE;
 314                         break;
 315                 }
 316         }
 317
 318         return rte_eth_linkstatus_set(eth_dev, &link);
 319 }
 320
 321 /**
 322  * Interrupt handler triggered by NIC for handling
 323  * specific interrupt.
 324  *
 325  * @param param
 326  *  The address of parameter registered before.
 327  *
 328  * @return
 329  *  void
 330  */
 331 static void
 332 ionic_dev_interrupt_handler(void *param)
 333 {
 334         struct ionic_adapter *adapter = (struct ionic_adapter *)param;
 335
 336         IONIC_PRINT(DEBUG, "->");
 337
 338         if (adapter->lif)
 339                 ionic_notifyq_handler(adapter->lif, -1);
 340 }
 341
 342 static int
 343 ionic_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 344 {
 345         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 346         int err;
 347
 348         IONIC_PRINT_CALL();
 349
 350         /*
 351          * Note: mtu check against IONIC_MIN_MTU, IONIC_MAX_MTU
 352          * is done by the API.
 353          */
 354
 355         err = ionic_lif_change_mtu(lif, mtu);
 356         if (err)
 357                 return err;
 358
 359         return 0;
 360 }
 361
 362 static int
 363 ionic_dev_info_get(struct rte_eth_dev *eth_dev,
 364                 struct rte_eth_dev_info *dev_info)
 365 {
 366         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 367         struct ionic_adapter *adapter = lif->adapter;
 368         struct ionic_identity *ident = &adapter->ident;
 369         union ionic_lif_config *cfg = &ident->lif.eth.config;
 370
 371         IONIC_PRINT_CALL();
 372
 373         dev_info->max_rx_queues = (uint16_t)
 374                 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_RXQ]);
 375         dev_info->max_tx_queues = (uint16_t)
 376                 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_TXQ]);
 377
 378         /* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */
 379         dev_info->min_rx_bufsize = IONIC_MIN_MTU + RTE_ETHER_HDR_LEN;
 380         dev_info->max_rx_pktlen = IONIC_MAX_MTU + RTE_ETHER_HDR_LEN;
 381         dev_info->max_mac_addrs = adapter->max_mac_addrs;
 382         dev_info->min_mtu = IONIC_MIN_MTU;
 383         dev_info->max_mtu = IONIC_MAX_MTU;
 384
 385         dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE;
 386         dev_info->reta_size = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
 387         dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL;
 388
 389         dev_info->speed_capa =
 390                 RTE_ETH_LINK_SPEED_10G |
 391                 RTE_ETH_LINK_SPEED_25G |
 392                 RTE_ETH_LINK_SPEED_40G |
 393                 RTE_ETH_LINK_SPEED_50G |
 394                 RTE_ETH_LINK_SPEED_100G;
 395
 396         /*
 397          * Per-queue capabilities
 398          * RTE does not support disabling a feature on a queue if it is
 399          * enabled globally on the device. Thus the driver does not advertise
 400          * capabilities like RTE_ETH_TX_OFFLOAD_IPV4_CKSUM as per-queue even
 401          * though the driver would be otherwise capable of disabling it on
 402          * a per-queue basis.
 403          */
 404
 405         dev_info->rx_queue_offload_capa = 0;
 406         dev_info->tx_queue_offload_capa = 0;
 407
 408         /*
 409          * Per-port capabilities
 410          * See ionic_set_features to request and check supported features
 411          */
 412
 413         dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa |
 414                 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
 415                 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
 416                 RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
 417                 RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
 418                 RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
 419                 RTE_ETH_RX_OFFLOAD_SCATTER |
 420                 RTE_ETH_RX_OFFLOAD_RSS_HASH |
 421                 0;
 422
 423         dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa |
 424                 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
 425                 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
 426                 RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
 427                 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 428                 RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM |
 429                 RTE_ETH_TX_OFFLOAD_MULTI_SEGS |
 430                 RTE_ETH_TX_OFFLOAD_TCP_TSO |
 431                 RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
 432                 0;
 433
 434         dev_info->rx_desc_lim = rx_desc_lim;
 435         dev_info->tx_desc_lim = tx_desc_lim_v1;
 436
 437         /* Driver-preferred Rx/Tx parameters */
 438         dev_info->default_rxportconf.burst_size = 32;
 439         dev_info->default_txportconf.burst_size = 32;
 440         dev_info->default_rxportconf.nb_queues = 1;
 441         dev_info->default_txportconf.nb_queues = 1;
 442         dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC;
 443         dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC;
 444
 445         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 446                 /* Packets are always dropped if no desc are available */
 447                 .rx_drop_en = 1,
 448         };
 449
 450         return 0;
 451 }
 452
 453 static int
 454 ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev,
 455                 struct rte_eth_fc_conf *fc_conf)
 456 {
 457         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 458         struct ionic_adapter *adapter = lif->adapter;
 459         struct ionic_dev *idev = &adapter->idev;
 460
 461         if (idev->port_info) {
 462                 /* Flow control autoneg not supported */
 463                 fc_conf->autoneg = 0;
 464
 465                 if (idev->port_info->config.pause_type)
 466                         fc_conf->mode = RTE_ETH_FC_FULL;
 467                 else
 468                         fc_conf->mode = RTE_ETH_FC_NONE;
 469         }
 470
 471         return 0;
 472 }
 473
 474 static int
 475 ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev,
 476                 struct rte_eth_fc_conf *fc_conf)
 477 {
 478         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 479         struct ionic_adapter *adapter = lif->adapter;
 480         struct ionic_dev *idev = &adapter->idev;
 481         uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
 482         int err;
 483
 484         if (fc_conf->autoneg) {
 485                 IONIC_PRINT(WARNING, "Flow control autoneg not supported");
 486                 return -ENOTSUP;
 487         }
 488
 489         switch (fc_conf->mode) {
 490         case RTE_ETH_FC_NONE:
 491                 pause_type = IONIC_PORT_PAUSE_TYPE_NONE;
 492                 break;
 493         case RTE_ETH_FC_FULL:
 494                 pause_type = IONIC_PORT_PAUSE_TYPE_LINK;
 495                 break;
 496         case RTE_ETH_FC_RX_PAUSE:
 497         case RTE_ETH_FC_TX_PAUSE:
 498                 return -ENOTSUP;
 499         }
 500
 501         ionic_dev_cmd_port_pause(idev, pause_type);
 502         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 503         if (err)
 504                 IONIC_PRINT(WARNING, "Failed to configure flow control");
 505
 506         return err;
 507 }
 508
 509 static int
 510 ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 511 {
 512         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 513
 514         ionic_lif_configure_vlan_offload(lif, mask);
 515
 516         ionic_lif_set_features(lif);
 517
 518         return 0;
 519 }
 520
 521 static int
 522 ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 523                 struct rte_eth_rss_reta_entry64 *reta_conf,
 524                 uint16_t reta_size)
 525 {
 526         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 527         struct ionic_adapter *adapter = lif->adapter;
 528         struct ionic_identity *ident = &adapter->ident;
 529         uint32_t i, j, index, num;
 530         uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
 531
 532         IONIC_PRINT_CALL();
 533
 534         if (!lif->rss_ind_tbl) {
 535                 IONIC_PRINT(ERR, "RSS RETA not initialized, "
 536                         "can't update the table");
 537                 return -EINVAL;
 538         }
 539
 540         if (reta_size != tbl_sz) {
 541                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
 542                         "(%d) does not match the number hardware can support "
 543                         "(%d)",
 544                         reta_size, tbl_sz);
 545                 return -EINVAL;
 546         }
 547
 548         num = tbl_sz / RTE_ETH_RETA_GROUP_SIZE;
 549
 550         for (i = 0; i < num; i++) {
 551                 for (j = 0; j < RTE_ETH_RETA_GROUP_SIZE; j++) {
 552                         if (reta_conf[i].mask & ((uint64_t)1 << j)) {
 553                                 index = (i * RTE_ETH_RETA_GROUP_SIZE) + j;
 554                                 lif->rss_ind_tbl[index] = reta_conf[i].reta[j];
 555                         }
 556                 }
 557         }
 558
 559         return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL);
 560 }
 561
 562 static int
 563 ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 564                 struct rte_eth_rss_reta_entry64 *reta_conf,
 565                 uint16_t reta_size)
 566 {
 567         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 568         struct ionic_adapter *adapter = lif->adapter;
 569         struct ionic_identity *ident = &adapter->ident;
 570         int i, num;
 571         uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz);
 572
 573         IONIC_PRINT_CALL();
 574
 575         if (reta_size != tbl_sz) {
 576                 IONIC_PRINT(ERR, "The size of hash lookup table configured "
 577                         "(%d) does not match the number hardware can support "
 578                         "(%d)",
 579                         reta_size, tbl_sz);
 580                 return -EINVAL;
 581         }
 582
 583         if (!lif->rss_ind_tbl) {
 584                 IONIC_PRINT(ERR, "RSS RETA has not been built yet");
 585                 return -EINVAL;
 586         }
 587
 588         num = reta_size / RTE_ETH_RETA_GROUP_SIZE;
 589
 590         for (i = 0; i < num; i++) {
 591                 memcpy(reta_conf->reta,
 592                         &lif->rss_ind_tbl[i * RTE_ETH_RETA_GROUP_SIZE],
 593                         RTE_ETH_RETA_GROUP_SIZE);
 594                 reta_conf++;
 595         }
 596
 597         return 0;
 598 }
 599
 600 static int
 601 ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
 602                 struct rte_eth_rss_conf *rss_conf)
 603 {
 604         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 605         uint64_t rss_hf = 0;
 606
 607         IONIC_PRINT_CALL();
 608
 609         if (!lif->rss_ind_tbl) {
 610                 IONIC_PRINT(NOTICE, "RSS not enabled");
 611                 return 0;
 612         }
 613
 614         /* Get key value (if not null, rss_key is 40-byte) */
 615         if (rss_conf->rss_key != NULL &&
 616                         rss_conf->rss_key_len >= IONIC_RSS_HASH_KEY_SIZE)
 617                 memcpy(rss_conf->rss_key, lif->rss_hash_key,
 618                         IONIC_RSS_HASH_KEY_SIZE);
 619
 620         if (lif->rss_types & IONIC_RSS_TYPE_IPV4)
 621                 rss_hf |= RTE_ETH_RSS_IPV4;
 622         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_TCP)
 623                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP;
 624         if (lif->rss_types & IONIC_RSS_TYPE_IPV4_UDP)
 625                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP;
 626         if (lif->rss_types & IONIC_RSS_TYPE_IPV6)
 627                 rss_hf |= RTE_ETH_RSS_IPV6;
 628         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_TCP)
 629                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_TCP;
 630         if (lif->rss_types & IONIC_RSS_TYPE_IPV6_UDP)
 631                 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_UDP;
 632
 633         rss_conf->rss_hf = rss_hf;
 634
 635         return 0;
 636 }
 637
 638 static int
 639 ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev,
 640                 struct rte_eth_rss_conf *rss_conf)
 641 {
 642         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 643         uint32_t rss_types = 0;
 644         uint8_t *key = NULL;
 645
 646         IONIC_PRINT_CALL();
 647
 648         if (rss_conf->rss_key)
 649                 key = rss_conf->rss_key;
 650
 651         if ((rss_conf->rss_hf & IONIC_ETH_RSS_OFFLOAD_ALL) == 0) {
 652                 /*
 653                  * Can't disable rss through hash flags,
 654                  * if it is enabled by default during init
 655                  */
 656                 if (lif->rss_ind_tbl)
 657                         return -EINVAL;
 658         } else {
 659                 /* Can't enable rss if disabled by default during init */
 660                 if (!lif->rss_ind_tbl)
 661                         return -EINVAL;
 662
 663                 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV4)
 664                         rss_types |= IONIC_RSS_TYPE_IPV4;
 665                 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP)
 666                         rss_types |= IONIC_RSS_TYPE_IPV4_TCP;
 667                 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP)
 668                         rss_types |= IONIC_RSS_TYPE_IPV4_UDP;
 669                 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV6)
 670                         rss_types |= IONIC_RSS_TYPE_IPV6;
 671                 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP)
 672                         rss_types |= IONIC_RSS_TYPE_IPV6_TCP;
 673                 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP)
 674                         rss_types |= IONIC_RSS_TYPE_IPV6_UDP;
 675
 676                 ionic_lif_rss_config(lif, rss_types, key, NULL);
 677         }
 678
 679         return 0;
 680 }
 681
 682 static int
 683 ionic_dev_stats_get(struct rte_eth_dev *eth_dev,
 684                 struct rte_eth_stats *stats)
 685 {
 686         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 687
 688         ionic_lif_get_stats(lif, stats);
 689
 690         return 0;
 691 }
 692
 693 static int
 694 ionic_dev_stats_reset(struct rte_eth_dev *eth_dev)
 695 {
 696         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 697
 698         IONIC_PRINT_CALL();
 699
 700         ionic_lif_reset_stats(lif);
 701
 702         return 0;
 703 }
 704
 705 static int
 706 ionic_dev_xstats_get_names(__rte_unused struct rte_eth_dev *eth_dev,
 707                 struct rte_eth_xstat_name *xstats_names,
 708                 __rte_unused unsigned int size)
 709 {
 710         unsigned int i;
 711
 712         if (xstats_names != NULL) {
 713                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 714                         snprintf(xstats_names[i].name,
 715                                         sizeof(xstats_names[i].name),
 716                                         "%s", rte_ionic_xstats_strings[i].name);
 717                 }
 718         }
 719
 720         return IONIC_NB_HW_STATS;
 721 }
 722
 723 static int
 724 ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *eth_dev,
 725                 const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
 726                 unsigned int limit)
 727 {
 728         struct rte_eth_xstat_name xstats_names_copy[IONIC_NB_HW_STATS];
 729         uint16_t i;
 730
 731         if (!ids) {
 732                 if (xstats_names != NULL) {
 733                         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 734                                 snprintf(xstats_names[i].name,
 735                                         sizeof(xstats_names[i].name),
 736                                         "%s", rte_ionic_xstats_strings[i].name);
 737                         }
 738                 }
 739
 740                 return IONIC_NB_HW_STATS;
 741         }
 742
 743         ionic_dev_xstats_get_names_by_id(eth_dev, NULL, xstats_names_copy,
 744                 IONIC_NB_HW_STATS);
 745
 746         for (i = 0; i < limit; i++) {
 747                 if (ids[i] >= IONIC_NB_HW_STATS) {
 748                         IONIC_PRINT(ERR, "id value isn't valid");
 749                         return -1;
 750                 }
 751
 752                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 753         }
 754
 755         return limit;
 756 }
 757
 758 static int
 759 ionic_dev_xstats_get(struct rte_eth_dev *eth_dev, struct rte_eth_xstat *xstats,
 760                 unsigned int n)
 761 {
 762         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 763         struct ionic_lif_stats hw_stats;
 764         uint16_t i;
 765
 766         if (n < IONIC_NB_HW_STATS)
 767                 return IONIC_NB_HW_STATS;
 768
 769         ionic_lif_get_hw_stats(lif, &hw_stats);
 770
 771         for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 772                 xstats[i].value = *(uint64_t *)(((char *)&hw_stats) +
 773                                 rte_ionic_xstats_strings[i].offset);
 774                 xstats[i].id = i;
 775         }
 776
 777         return IONIC_NB_HW_STATS;
 778 }
 779
 780 static int
 781 ionic_dev_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids,
 782                 uint64_t *values, unsigned int n)
 783 {
 784         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 785         struct ionic_lif_stats hw_stats;
 786         uint64_t values_copy[IONIC_NB_HW_STATS];
 787         uint16_t i;
 788
 789         if (!ids) {
 790                 if (!ids && n < IONIC_NB_HW_STATS)
 791                         return IONIC_NB_HW_STATS;
 792
 793                 ionic_lif_get_hw_stats(lif, &hw_stats);
 794
 795                 for (i = 0; i < IONIC_NB_HW_STATS; i++) {
 796                         values[i] = *(uint64_t *)(((char *)&hw_stats) +
 797                                         rte_ionic_xstats_strings[i].offset);
 798                 }
 799
 800                 return IONIC_NB_HW_STATS;
 801         }
 802
 803         ionic_dev_xstats_get_by_id(eth_dev, NULL, values_copy,
 804                         IONIC_NB_HW_STATS);
 805
 806         for (i = 0; i < n; i++) {
 807                 if (ids[i] >= IONIC_NB_HW_STATS) {
 808                         IONIC_PRINT(ERR, "id value isn't valid");
 809                         return -1;
 810                 }
 811
 812                 values[i] = values_copy[ids[i]];
 813         }
 814
 815         return n;
 816 }
 817
 818 static int
 819 ionic_dev_xstats_reset(struct rte_eth_dev *eth_dev)
 820 {
 821         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 822
 823         ionic_lif_reset_hw_stats(lif);
 824
 825         return 0;
 826 }
 827
 828 static int
 829 ionic_dev_configure(struct rte_eth_dev *eth_dev)
 830 {
 831         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 832
 833         IONIC_PRINT_CALL();
 834
 835         ionic_lif_configure(lif);
 836
 837         ionic_lif_set_features(lif);
 838
 839         return 0;
 840 }
 841
 842 static inline uint32_t
 843 ionic_parse_link_speeds(uint16_t link_speeds)
 844 {
 845         if (link_speeds & RTE_ETH_LINK_SPEED_100G)
 846                 return 100000;
 847         else if (link_speeds & RTE_ETH_LINK_SPEED_50G)
 848                 return 50000;
 849         else if (link_speeds & RTE_ETH_LINK_SPEED_40G)
 850                 return 40000;
 851         else if (link_speeds & RTE_ETH_LINK_SPEED_25G)
 852                 return 25000;
 853         else if (link_speeds & RTE_ETH_LINK_SPEED_10G)
 854                 return 10000;
 855         else
 856                 return 0;
 857 }
 858
 859 /*
 860  * Configure device link speed and setup link.
 861  * It returns 0 on success.
 862  */
 863 static int
 864 ionic_dev_start(struct rte_eth_dev *eth_dev)
 865 {
 866         struct rte_eth_conf *dev_conf = &eth_dev->data->dev_conf;
 867         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 868         struct ionic_adapter *adapter = lif->adapter;
 869         struct ionic_dev *idev = &adapter->idev;
 870         uint32_t speed = 0, allowed_speeds;
 871         uint8_t an_enable;
 872         int err;
 873
 874         IONIC_PRINT_CALL();
 875
 876         allowed_speeds =
 877                 RTE_ETH_LINK_SPEED_FIXED |
 878                 RTE_ETH_LINK_SPEED_10G |
 879                 RTE_ETH_LINK_SPEED_25G |
 880                 RTE_ETH_LINK_SPEED_40G |
 881                 RTE_ETH_LINK_SPEED_50G |
 882                 RTE_ETH_LINK_SPEED_100G;
 883
 884         if (dev_conf->link_speeds & ~allowed_speeds) {
 885                 IONIC_PRINT(ERR, "Invalid link setting");
 886                 return -EINVAL;
 887         }
 888
 889         if (dev_conf->lpbk_mode)
 890                 IONIC_PRINT(WARNING, "Loopback mode not supported");
 891
 892         err = ionic_lif_start(lif);
 893         if (err) {
 894                 IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
 895                 return err;
 896         }
 897
 898         /* Configure link */
 899         an_enable = (dev_conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) == 0;
 900
 901         ionic_dev_cmd_port_autoneg(idev, an_enable);
 902         err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 903         if (err)
 904                 IONIC_PRINT(WARNING, "Failed to %s autonegotiation",
 905                         an_enable ? "enable" : "disable");
 906
 907         if (!an_enable)
 908                 speed = ionic_parse_link_speeds(dev_conf->link_speeds);
 909         if (speed) {
 910                 ionic_dev_cmd_port_speed(idev, speed);
 911                 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 912                 if (err)
 913                         IONIC_PRINT(WARNING, "Failed to set link speed %u",
 914                                 speed);
 915         }
 916
 917         ionic_dev_link_update(eth_dev, 0);
 918
 919         return 0;
 920 }
 921
 922 /*
 923  * Stop device: disable rx and tx functions to allow for reconfiguring.
 924  */
 925 static int
 926 ionic_dev_stop(struct rte_eth_dev *eth_dev)
 927 {
 928         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 929
 930         IONIC_PRINT_CALL();
 931
 932         ionic_lif_stop(lif);
 933
 934         return 0;
 935 }
 936
 937 static void ionic_unconfigure_intr(struct ionic_adapter *adapter);
 938
 939 /*
 940  * Reset and stop device.
 941  */
 942 static int
 943 ionic_dev_close(struct rte_eth_dev *eth_dev)
 944 {
 945         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 946         struct ionic_adapter *adapter = lif->adapter;
 947
 948         IONIC_PRINT_CALL();
 949         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 950                 return 0;
 951
 952         ionic_lif_stop(lif);
 953
 954         ionic_lif_free_queues(lif);
 955
 956         IONIC_PRINT(NOTICE, "Removing device %s", eth_dev->device->name);
 957         ionic_unconfigure_intr(adapter);
 958
 959         rte_eth_dev_destroy(eth_dev, eth_ionic_dev_uninit);
 960
 961         ionic_port_reset(adapter);
 962         ionic_reset(adapter);
 963
 964         rte_free(adapter);
 965
 966         return 0;
 967 }
 968
 969 static int
 970 eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params)
 971 {
 972         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 973         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 974         struct ionic_adapter *adapter = (struct ionic_adapter *)init_params;
 975         int err;
 976
 977         IONIC_PRINT_CALL();
 978
 979         eth_dev->dev_ops = &ionic_eth_dev_ops;
 980         eth_dev->rx_pkt_burst = &ionic_recv_pkts;
 981         eth_dev->tx_pkt_burst = &ionic_xmit_pkts;
 982         eth_dev->tx_pkt_prepare = &ionic_prep_pkts;
 983
 984         /* Multi-process not supported, primary does initialization anyway */
 985         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 986                 return 0;
 987
 988         rte_eth_copy_pci_info(eth_dev, pci_dev);
 989         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 990
 991         lif->eth_dev = eth_dev;
 992         lif->adapter = adapter;
 993         adapter->lif = lif;
 994
 995         IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported",
 996                 adapter->max_mac_addrs);
 997
 998         /* Allocate memory for storing MAC addresses */
 999         eth_dev->data->mac_addrs = rte_zmalloc("ionic",
1000                 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs, 0);
1001
1002         if (eth_dev->data->mac_addrs == NULL) {
1003                 IONIC_PRINT(ERR, "Failed to allocate %u bytes needed to "
1004                         "store MAC addresses",
1005                         RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs);
1006                 err = -ENOMEM;
1007                 goto err;
1008         }
1009
1010         err = ionic_lif_alloc(lif);
1011         if (err) {
1012                 IONIC_PRINT(ERR, "Cannot allocate LIFs: %d, aborting",
1013                         err);
1014                 goto err;
1015         }
1016
1017         err = ionic_lif_init(lif);
1018         if (err) {
1019                 IONIC_PRINT(ERR, "Cannot init LIFs: %d, aborting", err);
1020                 goto err_free_lif;
1021         }
1022
1023         /* Copy the MAC address */
1024         rte_ether_addr_copy((struct rte_ether_addr *)lif->mac_addr,
1025                 &eth_dev->data->mac_addrs[0]);
1026
1027         IONIC_PRINT(DEBUG, "Port %u initialized", eth_dev->data->port_id);
1028
1029         return 0;
1030
1031 err_free_lif:
1032         ionic_lif_free(lif);
1033 err:
1034         return err;
1035 }
1036
1037 static int
1038 eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev)
1039 {
1040         struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
1041         struct ionic_adapter *adapter = lif->adapter;
1042
1043         IONIC_PRINT_CALL();
1044
1045         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1046                 return 0;
1047
1048         adapter->lif = NULL;
1049
1050         ionic_lif_deinit(lif);
1051         ionic_lif_free(lif);
1052
1053         if (!(lif->state & IONIC_LIF_F_FW_RESET))
1054                 ionic_lif_reset(lif);
1055
1056         return 0;
1057 }
1058
1059 static int
1060 ionic_configure_intr(struct ionic_adapter *adapter)
1061 {
1062         struct rte_pci_device *pci_dev = adapter->pci_dev;
1063         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1064         int err;
1065
1066         IONIC_PRINT(DEBUG, "Configuring %u intrs", adapter->nintrs);
1067
1068         if (rte_intr_efd_enable(intr_handle, adapter->nintrs)) {
1069                 IONIC_PRINT(ERR, "Fail to create eventfd");
1070                 return -1;
1071         }
1072
1073         if (rte_intr_dp_is_en(intr_handle))
1074                 IONIC_PRINT(DEBUG,
1075                         "Packet I/O interrupt on datapath is enabled");
1076
1077         if (!intr_handle->intr_vec) {
1078                 intr_handle->intr_vec = rte_zmalloc("intr_vec",
1079                         adapter->nintrs * sizeof(int), 0);
1080
1081                 if (!intr_handle->intr_vec) {
1082                         IONIC_PRINT(ERR, "Failed to allocate %u vectors",
1083                                 adapter->nintrs);
1084                         return -ENOMEM;
1085                 }
1086         }
1087
1088         err = rte_intr_callback_register(intr_handle,
1089                 ionic_dev_interrupt_handler,
1090                 adapter);
1091
1092         if (err) {
1093                 IONIC_PRINT(ERR,
1094                         "Failure registering interrupts handler (%d)",
1095                         err);
1096                 return err;
1097         }
1098
1099         /* enable intr mapping */
1100         err = rte_intr_enable(intr_handle);
1101
1102         if (err) {
1103                 IONIC_PRINT(ERR, "Failure enabling interrupts (%d)", err);
1104                 return err;
1105         }
1106
1107         return 0;
1108 }
1109
1110 static void
1111 ionic_unconfigure_intr(struct ionic_adapter *adapter)
1112 {
1113         struct rte_pci_device *pci_dev = adapter->pci_dev;
1114         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1115
1116         rte_intr_disable(intr_handle);
1117
1118         rte_intr_callback_unregister(intr_handle,
1119                 ionic_dev_interrupt_handler,
1120                 adapter);
1121 }
1122
1123 static int
1124 eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1125                 struct rte_pci_device *pci_dev)
1126 {
1127         char name[RTE_ETH_NAME_MAX_LEN];
1128         struct rte_mem_resource *resource;
1129         struct ionic_adapter *adapter;
1130         struct ionic_hw *hw;
1131         unsigned long i;
1132         int err;
1133
1134         /* Check structs (trigger error at compilation time) */
1135         ionic_struct_size_checks();
1136
1137         /* Multi-process not supported */
1138         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1139                 err = -EPERM;
1140                 goto err;
1141         }
1142
1143         IONIC_PRINT(DEBUG, "Initializing device %s",
1144                 pci_dev->device.name);
1145
1146         adapter = rte_zmalloc("ionic", sizeof(*adapter), 0);
1147         if (!adapter) {
1148                 IONIC_PRINT(ERR, "OOM");
1149                 err = -ENOMEM;
1150                 goto err;
1151         }
1152
1153         adapter->pci_dev = pci_dev;
1154         hw = &adapter->hw;
1155
1156         hw->device_id = pci_dev->id.device_id;
1157         hw->vendor_id = pci_dev->id.vendor_id;
1158
1159         err = ionic_init_mac(hw);
1160         if (err != 0) {
1161                 IONIC_PRINT(ERR, "Mac init failed: %d", err);
1162                 err = -EIO;
1163                 goto err_free_adapter;
1164         }
1165
1166         adapter->num_bars = 0;
1167         for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
1168                 resource = &pci_dev->mem_resource[i];
1169                 if (resource->phys_addr == 0 || resource->len == 0)
1170                         continue;
1171                 adapter->bars[adapter->num_bars].vaddr = resource->addr;
1172                 adapter->bars[adapter->num_bars].bus_addr = resource->phys_addr;
1173                 adapter->bars[adapter->num_bars].len = resource->len;
1174                 adapter->num_bars++;
1175         }
1176
1177         /* Discover ionic dev resources */
1178
1179         err = ionic_setup(adapter);
1180         if (err) {
1181                 IONIC_PRINT(ERR, "Cannot setup device: %d, aborting", err);
1182                 goto err_free_adapter;
1183         }
1184
1185         err = ionic_identify(adapter);
1186         if (err) {
1187                 IONIC_PRINT(ERR, "Cannot identify device: %d, aborting",
1188                         err);
1189                 goto err_free_adapter;
1190         }
1191
1192         err = ionic_init(adapter);
1193         if (err) {
1194                 IONIC_PRINT(ERR, "Cannot init device: %d, aborting", err);
1195                 goto err_free_adapter;
1196         }
1197
1198         /* Configure the ports */
1199         err = ionic_port_identify(adapter);
1200         if (err) {
1201                 IONIC_PRINT(ERR, "Cannot identify port: %d, aborting",
1202                         err);
1203                 goto err_free_adapter;
1204         }
1205
1206         err = ionic_port_init(adapter);
1207         if (err) {
1208                 IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err);
1209                 goto err_free_adapter;
1210         }
1211
1212         /* Configure LIFs */
1213         err = ionic_lif_identify(adapter);
1214         if (err) {
1215                 IONIC_PRINT(ERR, "Cannot identify lif: %d, aborting", err);
1216                 goto err_free_adapter;
1217         }
1218
1219         /* Allocate and init LIFs */
1220         err = ionic_lifs_size(adapter);
1221         if (err) {
1222                 IONIC_PRINT(ERR, "Cannot size LIFs: %d, aborting", err);
1223                 goto err_free_adapter;
1224         }
1225
1226         adapter->max_mac_addrs =
1227                 rte_le_to_cpu_32(adapter->ident.lif.eth.max_ucast_filters);
1228
1229         if (rte_le_to_cpu_32(adapter->ident.dev.nlifs) != 1) {
1230                 IONIC_PRINT(ERR, "Unexpected request for %d LIFs",
1231                         rte_le_to_cpu_32(adapter->ident.dev.nlifs));
1232                 goto err_free_adapter;
1233         }
1234
1235         snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
1236         err = rte_eth_dev_create(&pci_dev->device,
1237                         name, sizeof(struct ionic_lif),
1238                         NULL, NULL, eth_ionic_dev_init, adapter);
1239         if (err) {
1240                 IONIC_PRINT(ERR, "Cannot create eth device for %s", name);
1241                 goto err_free_adapter;
1242         }
1243
1244         err = ionic_configure_intr(adapter);
1245
1246         if (err) {
1247                 IONIC_PRINT(ERR, "Failed to configure interrupts");
1248                 goto err_free_adapter;
1249         }
1250
1251         return 0;
1252
1253 err_free_adapter:
1254         rte_free(adapter);
1255 err:
1256         return err;
1257 }
1258
1259 static int
1260 eth_ionic_pci_remove(struct rte_pci_device *pci_dev)
1261 {
1262         char name[RTE_ETH_NAME_MAX_LEN];
1263         struct rte_eth_dev *eth_dev;
1264
1265         /* Adapter lookup is using the eth_dev name */
1266         snprintf(name, sizeof(name), "%s_lif", pci_dev->device.name);
1267
1268         eth_dev = rte_eth_dev_allocated(name);
1269         if (eth_dev)
1270                 ionic_dev_close(eth_dev);
1271         else
1272                 IONIC_PRINT(DEBUG, "Cannot find device %s",
1273                         pci_dev->device.name);
1274
1275         return 0;
1276 }
1277
1278 static struct rte_pci_driver rte_ionic_pmd = {
1279         .id_table = pci_id_ionic_map,
1280         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1281         .probe = eth_ionic_pci_probe,
1282         .remove = eth_ionic_pci_remove,
1283 };
1284
1285 RTE_PMD_REGISTER_PCI(net_ionic, rte_ionic_pmd);
1286 RTE_PMD_REGISTER_PCI_TABLE(net_ionic, pci_id_ionic_map);
1287 RTE_PMD_REGISTER_KMOD_DEP(net_ionic, "* igb_uio | uio_pci_generic | vfio-pci");
1288 RTE_LOG_REGISTER_DEFAULT(ionic_logtype, NOTICE);