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35 #include <rte_ethdev.h>
36 #include <rte_malloc.h>
38 #include "ixgbe_ethdev.h"
39 #include "ixgbe_rxtx.h"
40 #include "ixgbe_rxtx_vec_common.h"
44 #pragma GCC diagnostic ignored "-Wcast-qual"
47 ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
51 volatile union ixgbe_adv_rx_desc *rxdp;
52 struct ixgbe_rx_entry *rxep = &rxq->sw_ring[rxq->rxrearm_start];
53 struct rte_mbuf *mb0, *mb1;
54 uint64x2_t dma_addr0, dma_addr1;
55 uint64x2_t zero = vdupq_n_u64(0);
59 rxdp = rxq->rx_ring + rxq->rxrearm_start;
61 /* Pull 'n' more MBUFs into the software ring */
62 if (unlikely(rte_mempool_get_bulk(rxq->mb_pool,
64 RTE_IXGBE_RXQ_REARM_THRESH) < 0)) {
65 if (rxq->rxrearm_nb + RTE_IXGBE_RXQ_REARM_THRESH >=
67 for (i = 0; i < RTE_IXGBE_DESCS_PER_LOOP; i++) {
68 rxep[i].mbuf = &rxq->fake_mbuf;
69 vst1q_u64((uint64_t *)&rxdp[i].read,
73 rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
74 RTE_IXGBE_RXQ_REARM_THRESH;
78 p = vld1_u8((uint8_t *)&rxq->mbuf_initializer);
80 /* Initialize the mbufs in vector, process 2 mbufs in one loop */
81 for (i = 0; i < RTE_IXGBE_RXQ_REARM_THRESH; i += 2, rxep += 2) {
86 * Flush mbuf with pkt template.
87 * Data to be rearmed is 6 bytes long.
89 vst1_u8((uint8_t *)&mb0->rearm_data, p);
90 paddr = mb0->buf_physaddr + RTE_PKTMBUF_HEADROOM;
91 dma_addr0 = vsetq_lane_u64(paddr, zero, 0);
92 /* flush desc with pa dma_addr */
93 vst1q_u64((uint64_t *)&rxdp++->read, dma_addr0);
95 vst1_u8((uint8_t *)&mb1->rearm_data, p);
96 paddr = mb1->buf_physaddr + RTE_PKTMBUF_HEADROOM;
97 dma_addr1 = vsetq_lane_u64(paddr, zero, 0);
98 vst1q_u64((uint64_t *)&rxdp++->read, dma_addr1);
101 rxq->rxrearm_start += RTE_IXGBE_RXQ_REARM_THRESH;
102 if (rxq->rxrearm_start >= rxq->nb_rx_desc)
103 rxq->rxrearm_start = 0;
105 rxq->rxrearm_nb -= RTE_IXGBE_RXQ_REARM_THRESH;
107 rx_id = (uint16_t)((rxq->rxrearm_start == 0) ?
108 (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));
110 /* Update the tail pointer on the NIC */
111 IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rx_id);
114 /* Handling the offload flags (olflags) field takes computation
115 * time when receiving packets. Therefore we provide a flag to disable
116 * the processing of the olflags field when they are not needed. This
117 * gives improved performance, at the cost of losing the offload info
118 * in the received packet
120 #ifdef RTE_IXGBE_RX_OLFLAGS_ENABLE
122 #define VTAG_SHIFT (3)
125 desc_to_olflags_v(uint8x16x2_t sterr_tmp1, uint8x16x2_t sterr_tmp2,
126 uint8x16_t staterr, struct rte_mbuf **rx_pkts)
136 const uint8x16_t pkttype_msk = {
137 PKT_RX_VLAN_PKT, PKT_RX_VLAN_PKT,
138 PKT_RX_VLAN_PKT, PKT_RX_VLAN_PKT,
139 0x00, 0x00, 0x00, 0x00,
140 0x00, 0x00, 0x00, 0x00,
141 0x00, 0x00, 0x00, 0x00};
143 const uint8x16_t rsstype_msk = {
144 0x0F, 0x0F, 0x0F, 0x0F,
145 0x00, 0x00, 0x00, 0x00,
146 0x00, 0x00, 0x00, 0x00,
147 0x00, 0x00, 0x00, 0x00};
149 const uint8x16_t rss_flags = {
150 0, PKT_RX_RSS_HASH, PKT_RX_RSS_HASH, PKT_RX_RSS_HASH,
151 0, PKT_RX_RSS_HASH, 0, PKT_RX_RSS_HASH,
152 PKT_RX_RSS_HASH, 0, 0, 0,
153 0, 0, 0, PKT_RX_FDIR};
155 ptype = vzipq_u8(sterr_tmp1.val[0], sterr_tmp2.val[0]).val[0];
156 ptype = vandq_u8(ptype, rsstype_msk);
157 ptype = vqtbl1q_u8(rss_flags, ptype);
159 vtag = vshrq_n_u8(staterr, VTAG_SHIFT);
160 vtag = vandq_u8(vtag, pkttype_msk);
161 vtag = vorrq_u8(ptype, vtag);
163 vol.word = vgetq_lane_u32(vreinterpretq_u32_u8(vtag), 0);
165 rx_pkts[0]->ol_flags = vol.e[0];
166 rx_pkts[1]->ol_flags = vol.e[1];
167 rx_pkts[2]->ol_flags = vol.e[2];
168 rx_pkts[3]->ol_flags = vol.e[3];
171 #define desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr, rx_pkts)
175 * vPMD raw receive routine, only accept(nb_pkts >= RTE_IXGBE_DESCS_PER_LOOP)
178 * - nb_pkts < RTE_IXGBE_DESCS_PER_LOOP, just return no packet
179 * - nb_pkts > RTE_IXGBE_MAX_RX_BURST, only scan RTE_IXGBE_MAX_RX_BURST
181 * - floor align nb_pkts to a RTE_IXGBE_DESC_PER_LOOP power-of-two
182 * - don't support ol_flags for rss and csum err
185 #define IXGBE_VPMD_DESC_DD_MASK 0x01010101
186 #define IXGBE_VPMD_DESC_EOP_MASK 0x02020202
188 static inline uint16_t
189 _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
190 uint16_t nb_pkts, uint8_t *split_packet)
192 volatile union ixgbe_adv_rx_desc *rxdp;
193 struct ixgbe_rx_entry *sw_ring;
194 uint16_t nb_pkts_recd;
196 uint8x16_t shuf_msk = {
198 0xFF, 0xFF, /* skip 32 bits pkt_type */
199 12, 13, /* octet 12~13, low 16 bits pkt_len */
200 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
201 12, 13, /* octet 12~13, 16 bits data_len */
202 14, 15, /* octet 14~15, low 16 bits vlan_macip */
203 4, 5, 6, 7 /* octet 4~7, 32bits rss */
205 uint16x8_t crc_adjust = {0, 0, rxq->crc_len, 0,
206 rxq->crc_len, 0, 0, 0};
208 /* nb_pkts shall be less equal than RTE_IXGBE_MAX_RX_BURST */
209 nb_pkts = RTE_MIN(nb_pkts, RTE_IXGBE_MAX_RX_BURST);
211 /* nb_pkts has to be floor-aligned to RTE_IXGBE_DESCS_PER_LOOP */
212 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_IXGBE_DESCS_PER_LOOP);
214 /* Just the act of getting into the function from the application is
215 * going to cost about 7 cycles
217 rxdp = rxq->rx_ring + rxq->rx_tail;
219 rte_prefetch_non_temporal(rxdp);
221 /* See if we need to rearm the RX queue - gives the prefetch a bit
224 if (rxq->rxrearm_nb > RTE_IXGBE_RXQ_REARM_THRESH)
225 ixgbe_rxq_rearm(rxq);
227 /* Before we start moving massive data around, check to see if
228 * there is actually a packet available
230 if (!(rxdp->wb.upper.status_error &
231 rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD)))
234 /* Cache is empty -> need to scan the buffer rings, but first move
235 * the next 'n' mbufs into the cache
237 sw_ring = &rxq->sw_ring[rxq->rx_tail];
239 /* A. load 4 packet in one loop
240 * B. copy 4 mbuf point from swring to rx_pkts
241 * C. calc the number of DD bits among the 4 packets
242 * [C*. extract the end-of-packet bit, if requested]
243 * D. fill info. from desc to mbuf
245 for (pos = 0, nb_pkts_recd = 0; pos < nb_pkts;
246 pos += RTE_IXGBE_DESCS_PER_LOOP,
247 rxdp += RTE_IXGBE_DESCS_PER_LOOP) {
248 uint64x2_t descs[RTE_IXGBE_DESCS_PER_LOOP];
249 uint8x16_t pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
250 uint8x16x2_t sterr_tmp1, sterr_tmp2;
251 uint64x2_t mbp1, mbp2;
257 /* B.1 load 1 mbuf point */
258 mbp1 = vld1q_u64((uint64_t *)&sw_ring[pos]);
260 /* B.2 copy 2 mbuf point into rx_pkts */
261 vst1q_u64((uint64_t *)&rx_pkts[pos], mbp1);
263 /* B.1 load 1 mbuf point */
264 mbp2 = vld1q_u64((uint64_t *)&sw_ring[pos + 2]);
266 /* A. load 4 pkts descs */
267 descs[0] = vld1q_u64((uint64_t *)(rxdp));
268 descs[1] = vld1q_u64((uint64_t *)(rxdp + 1));
269 descs[2] = vld1q_u64((uint64_t *)(rxdp + 2));
270 descs[3] = vld1q_u64((uint64_t *)(rxdp + 3));
273 /* B.2 copy 2 mbuf point into rx_pkts */
274 vst1q_u64((uint64_t *)&rx_pkts[pos + 2], mbp2);
277 rte_mbuf_prefetch_part2(rx_pkts[pos]);
278 rte_mbuf_prefetch_part2(rx_pkts[pos + 1]);
279 rte_mbuf_prefetch_part2(rx_pkts[pos + 2]);
280 rte_mbuf_prefetch_part2(rx_pkts[pos + 3]);
283 /* D.1 pkt 3,4 convert format from desc to pktmbuf */
284 pkt_mb4 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[3]), shuf_msk);
285 pkt_mb3 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[2]), shuf_msk);
287 /* D.1 pkt 1,2 convert format from desc to pktmbuf */
288 pkt_mb2 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[1]), shuf_msk);
289 pkt_mb1 = vqtbl1q_u8(vreinterpretq_u8_u64(descs[0]), shuf_msk);
291 /* C.1 4=>2 filter staterr info only */
292 sterr_tmp2 = vzipq_u8(vreinterpretq_u8_u64(descs[1]),
293 vreinterpretq_u8_u64(descs[3]));
294 /* C.1 4=>2 filter staterr info only */
295 sterr_tmp1 = vzipq_u8(vreinterpretq_u8_u64(descs[0]),
296 vreinterpretq_u8_u64(descs[2]));
298 /* C.2 get 4 pkts staterr value */
299 staterr = vzipq_u8(sterr_tmp1.val[1], sterr_tmp2.val[1]).val[0];
300 stat = vgetq_lane_u32(vreinterpretq_u32_u8(staterr), 0);
302 /* set ol_flags with vlan packet type */
303 desc_to_olflags_v(sterr_tmp1, sterr_tmp2, staterr,
306 /* D.2 pkt 3,4 set in_port/nb_seg and remove crc */
307 tmp = vsubq_u16(vreinterpretq_u16_u8(pkt_mb4), crc_adjust);
308 pkt_mb4 = vreinterpretq_u8_u16(tmp);
309 tmp = vsubq_u16(vreinterpretq_u16_u8(pkt_mb3), crc_adjust);
310 pkt_mb3 = vreinterpretq_u8_u16(tmp);
312 /* D.3 copy final 3,4 data to rx_pkts */
313 vst1q_u8((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,
315 vst1q_u8((void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,
318 /* D.2 pkt 1,2 set in_port/nb_seg and remove crc */
319 tmp = vsubq_u16(vreinterpretq_u16_u8(pkt_mb2), crc_adjust);
320 pkt_mb2 = vreinterpretq_u8_u16(tmp);
321 tmp = vsubq_u16(vreinterpretq_u16_u8(pkt_mb1), crc_adjust);
322 pkt_mb1 = vreinterpretq_u8_u16(tmp);
324 /* C* extract and record EOP bit */
326 /* and with mask to extract bits, flipping 1-0 */
327 *(int *)split_packet = ~stat & IXGBE_VPMD_DESC_EOP_MASK;
329 split_packet += RTE_IXGBE_DESCS_PER_LOOP;
332 rte_prefetch_non_temporal(rxdp + RTE_IXGBE_DESCS_PER_LOOP);
334 /* D.3 copy final 1,2 data to rx_pkts */
335 vst1q_u8((uint8_t *)&rx_pkts[pos + 1]->rx_descriptor_fields1,
337 vst1q_u8((uint8_t *)&rx_pkts[pos]->rx_descriptor_fields1,
340 stat &= IXGBE_VPMD_DESC_DD_MASK;
342 /* C.4 calc avaialbe number of desc */
343 if (likely(stat != IXGBE_VPMD_DESC_DD_MASK)) {
344 while (stat & 0x01) {
351 nb_pkts_recd += RTE_IXGBE_DESCS_PER_LOOP;
355 /* Update our internal tail pointer */
356 rxq->rx_tail = (uint16_t)(rxq->rx_tail + nb_pkts_recd);
357 rxq->rx_tail = (uint16_t)(rxq->rx_tail & (rxq->nb_rx_desc - 1));
358 rxq->rxrearm_nb = (uint16_t)(rxq->rxrearm_nb + nb_pkts_recd);
364 * vPMD receive routine, only accept(nb_pkts >= RTE_IXGBE_DESCS_PER_LOOP)
367 * - nb_pkts < RTE_IXGBE_DESCS_PER_LOOP, just return no packet
368 * - nb_pkts > RTE_IXGBE_MAX_RX_BURST, only scan RTE_IXGBE_MAX_RX_BURST
370 * - floor align nb_pkts to a RTE_IXGBE_DESC_PER_LOOP power-of-two
371 * - don't support ol_flags for rss and csum err
374 ixgbe_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
377 return _recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL);
381 * vPMD receive routine that reassembles scattered packets
384 * - don't support ol_flags for rss and csum err
385 * - nb_pkts < RTE_IXGBE_DESCS_PER_LOOP, just return no packet
386 * - nb_pkts > RTE_IXGBE_MAX_RX_BURST, only scan RTE_IXGBE_MAX_RX_BURST
388 * - floor align nb_pkts to a RTE_IXGBE_DESC_PER_LOOP power-of-two
391 ixgbe_recv_scattered_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
394 struct ixgbe_rx_queue *rxq = rx_queue;
395 uint8_t split_flags[RTE_IXGBE_MAX_RX_BURST] = {0};
397 /* get some new buffers */
398 uint16_t nb_bufs = _recv_raw_pkts_vec(rxq, rx_pkts, nb_pkts,
403 /* happy day case, full burst + no packets to be joined */
404 const uint64_t *split_fl64 = (uint64_t *)split_flags;
405 if (rxq->pkt_first_seg == NULL &&
406 split_fl64[0] == 0 && split_fl64[1] == 0 &&
407 split_fl64[2] == 0 && split_fl64[3] == 0)
410 /* reassemble any packets that need reassembly*/
412 if (rxq->pkt_first_seg == NULL) {
413 /* find the first split flag, and only reassemble then*/
414 while (i < nb_bufs && !split_flags[i])
419 return i + reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i,
424 vtx1(volatile union ixgbe_adv_tx_desc *txdp,
425 struct rte_mbuf *pkt, uint64_t flags)
427 uint64x2_t descriptor = {
428 pkt->buf_physaddr + pkt->data_off,
429 (uint64_t)pkt->pkt_len << 46 | flags | pkt->data_len};
431 vst1q_u64((uint64_t *)&txdp->read, descriptor);
435 vtx(volatile union ixgbe_adv_tx_desc *txdp,
436 struct rte_mbuf **pkt, uint16_t nb_pkts, uint64_t flags)
440 for (i = 0; i < nb_pkts; ++i, ++txdp, ++pkt)
441 vtx1(txdp, *pkt, flags);
445 ixgbe_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
448 struct ixgbe_tx_queue *txq = (struct ixgbe_tx_queue *)tx_queue;
449 volatile union ixgbe_adv_tx_desc *txdp;
450 struct ixgbe_tx_entry_v *txep;
451 uint16_t n, nb_commit, tx_id;
452 uint64_t flags = DCMD_DTYP_FLAGS;
453 uint64_t rs = IXGBE_ADVTXD_DCMD_RS | DCMD_DTYP_FLAGS;
456 /* cross rx_thresh boundary is not allowed */
457 nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
459 if (txq->nb_tx_free < txq->tx_free_thresh)
460 ixgbe_tx_free_bufs(txq);
462 nb_commit = nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
463 if (unlikely(nb_pkts == 0))
466 tx_id = txq->tx_tail;
467 txdp = &txq->tx_ring[tx_id];
468 txep = &txq->sw_ring_v[tx_id];
470 txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
472 n = (uint16_t)(txq->nb_tx_desc - tx_id);
473 if (nb_commit >= n) {
474 tx_backlog_entry(txep, tx_pkts, n);
476 for (i = 0; i < n - 1; ++i, ++tx_pkts, ++txdp)
477 vtx1(txdp, *tx_pkts, flags);
479 vtx1(txdp, *tx_pkts++, rs);
481 nb_commit = (uint16_t)(nb_commit - n);
484 txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
486 /* avoid reach the end of ring */
487 txdp = &txq->tx_ring[tx_id];
488 txep = &txq->sw_ring_v[tx_id];
491 tx_backlog_entry(txep, tx_pkts, nb_commit);
493 vtx(txdp, tx_pkts, nb_commit, flags);
495 tx_id = (uint16_t)(tx_id + nb_commit);
496 if (tx_id > txq->tx_next_rs) {
497 txq->tx_ring[txq->tx_next_rs].read.cmd_type_len |=
498 rte_cpu_to_le_32(IXGBE_ADVTXD_DCMD_RS);
499 txq->tx_next_rs = (uint16_t)(txq->tx_next_rs +
503 txq->tx_tail = tx_id;
505 IXGBE_PCI_REG_WRITE(txq->tdt_reg_addr, txq->tx_tail);
510 static void __attribute__((cold))
511 ixgbe_tx_queue_release_mbufs_vec(struct ixgbe_tx_queue *txq)
513 _ixgbe_tx_queue_release_mbufs_vec(txq);
516 void __attribute__((cold))
517 ixgbe_rx_queue_release_mbufs_vec(struct ixgbe_rx_queue *rxq)
519 _ixgbe_rx_queue_release_mbufs_vec(rxq);
522 static void __attribute__((cold))
523 ixgbe_tx_free_swring(struct ixgbe_tx_queue *txq)
525 _ixgbe_tx_free_swring_vec(txq);
528 static void __attribute__((cold))
529 ixgbe_reset_tx_queue(struct ixgbe_tx_queue *txq)
531 _ixgbe_reset_tx_queue_vec(txq);
534 static const struct ixgbe_txq_ops vec_txq_ops = {
535 .release_mbufs = ixgbe_tx_queue_release_mbufs_vec,
536 .free_swring = ixgbe_tx_free_swring,
537 .reset = ixgbe_reset_tx_queue,
540 int __attribute__((cold))
541 ixgbe_rxq_vec_setup(struct ixgbe_rx_queue *rxq)
543 return ixgbe_rxq_vec_setup_default(rxq);
546 int __attribute__((cold))
547 ixgbe_txq_vec_setup(struct ixgbe_tx_queue *txq)
549 return ixgbe_txq_vec_setup_default(txq, &vec_txq_ops);
552 int __attribute__((cold))
553 ixgbe_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
555 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
557 /* no csum error report support */
558 if (rxmode->hw_ip_checksum == 1)
561 return ixgbe_rx_vec_dev_conf_condition_check_default(dev);