drivers/net/liquidio/base/lio_hw_defs.h

   1 /*
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2017 Cavium, Inc.. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Cavium, Inc. nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _LIO_HW_DEFS_H_
  35 #define _LIO_HW_DEFS_H_
  36
  37 #include <rte_io.h>
  38
  39 #ifndef PCI_VENDOR_ID_CAVIUM
  40 #define PCI_VENDOR_ID_CAVIUM    0x177D
  41 #endif
  42
  43 #define LIO_CN23XX_VF_VID       0x9712
  44
  45 /* --------------------------CONFIG VALUES------------------------ */
  46
  47 /* CN23xx IQ configuration macros */
  48 #define CN23XX_MAX_RINGS_PER_PF                 64
  49 #define CN23XX_MAX_RINGS_PER_VF                 8
  50
  51 #define CN23XX_MAX_INPUT_QUEUES                 CN23XX_MAX_RINGS_PER_PF
  52 #define CN23XX_MAX_IQ_DESCRIPTORS               512
  53 #define CN23XX_MIN_IQ_DESCRIPTORS               128
  54
  55 #define CN23XX_MAX_OUTPUT_QUEUES                CN23XX_MAX_RINGS_PER_PF
  56 #define CN23XX_MAX_OQ_DESCRIPTORS               512
  57 #define CN23XX_MIN_OQ_DESCRIPTORS               128
  58 #define CN23XX_OQ_BUF_SIZE                      1536
  59
  60 #define CN23XX_OQ_REFIL_THRESHOLD               16
  61
  62 #define CN23XX_DEFAULT_NUM_PORTS                1
  63
  64 #define CN23XX_CFG_IO_QUEUES                    CN23XX_MAX_RINGS_PER_PF
  65
  66 /* common OCTEON configuration macros */
  67 #define OCTEON_64BYTE_INSTR                     64
  68 #define OCTEON_OQ_INFOPTR_MODE                  1
  69
  70 /* Max IOQs per LIO Link */
  71 #define LIO_MAX_IOQS_PER_IF                     64
  72
  73 enum lio_card_type {
  74         LIO_23XX /* 23xx */
  75 };
  76
  77 #define LIO_23XX_NAME "23xx"
  78
  79 #define LIO_DEV_RUNNING         0xc
  80
  81 #define LIO_OQ_REFILL_THRESHOLD_CFG(cfg)                                \
  82                 ((cfg)->default_config->oq.refill_threshold)
  83 #define LIO_NUM_DEF_TX_DESCS_CFG(cfg)                                   \
  84                 ((cfg)->default_config->num_def_tx_descs)
  85
  86 #define LIO_IQ_INSTR_TYPE(cfg)          ((cfg)->default_config->iq.instr_type)
  87
  88 /* The following config values are fixed and should not be modified. */
  89
  90 /* Maximum number of Instruction queues */
  91 #define LIO_MAX_INSTR_QUEUES(lio_dev)           CN23XX_MAX_RINGS_PER_VF
  92
  93 #define LIO_MAX_POSSIBLE_INSTR_QUEUES           CN23XX_MAX_INPUT_QUEUES
  94 #define LIO_MAX_POSSIBLE_OUTPUT_QUEUES          CN23XX_MAX_OUTPUT_QUEUES
  95
  96 #define LIO_DEVICE_NAME_LEN             32
  97 #define LIO_BASE_MAJOR_VERSION          1
  98 #define LIO_BASE_MINOR_VERSION          5
  99 #define LIO_BASE_MICRO_VERSION          1
 100
 101 #define LIO_FW_VERSION_LENGTH           32
 102
 103 /** Tag types used by Octeon cores in its work. */
 104 enum octeon_tag_type {
 105         OCTEON_ORDERED_TAG      = 0,
 106         OCTEON_ATOMIC_TAG       = 1,
 107 };
 108
 109 /* pre-defined host->NIC tag values */
 110 #define LIO_CONTROL     (0x11111110)
 111 #define LIO_DATA(i)     (0x11111111 + (i))
 112
 113 /* used for NIC operations */
 114 #define LIO_OPCODE      1
 115
 116 /* Subcodes are used by host driver/apps to identify the sub-operation
 117  * for the core. They only need to by unique for a given subsystem.
 118  */
 119 #define LIO_OPCODE_SUBCODE(op, sub)             \
 120                 ((((op) & 0x0f) << 8) | ((sub) & 0x7f))
 121
 122 /** LIO_OPCODE subcodes */
 123 /* This subcode is sent by core PCI driver to indicate cores are ready. */
 124 #define LIO_OPCODE_NW_DATA              0x02 /* network packet data */
 125 #define LIO_OPCODE_IF_CFG               0x09
 126
 127 #define LIO_MAX_RX_PKTLEN               (64 * 1024)
 128
 129 /* RX(packets coming from wire) Checksum verification flags */
 130 /* TCP/UDP csum */
 131 #define LIO_L4_CSUM_VERIFIED            0x1
 132 #define LIO_IP_CSUM_VERIFIED            0x2
 133
 134 /* Interface flags communicated between host driver and core app. */
 135 enum lio_ifflags {
 136         LIO_IFFLAG_UNICAST      = 0x10
 137 };
 138
 139 /* Routines for reading and writing CSRs */
 140 #ifdef RTE_LIBRTE_LIO_DEBUG_REGS
 141 #define lio_write_csr(lio_dev, reg_off, value)                          \
 142         do {                                                            \
 143                 typeof(lio_dev) _dev = lio_dev;                         \
 144                 typeof(reg_off) _reg_off = reg_off;                     \
 145                 typeof(value) _value = value;                           \
 146                 PMD_REGS_LOG(_dev,                                      \
 147                              "Write32: Reg: 0x%08lx Val: 0x%08lx\n",    \
 148                              (unsigned long)_reg_off,                   \
 149                              (unsigned long)_value);                    \
 150                 rte_write32(_value, _dev->hw_addr + _reg_off);          \
 151         } while (0)
 152
 153 #define lio_write_csr64(lio_dev, reg_off, val64)                        \
 154         do {                                                            \
 155                 typeof(lio_dev) _dev = lio_dev;                         \
 156                 typeof(reg_off) _reg_off = reg_off;                     \
 157                 typeof(val64) _val64 = val64;                           \
 158                 PMD_REGS_LOG(                                           \
 159                     _dev,                                               \
 160                     "Write64: Reg: 0x%08lx Val: 0x%016llx\n",           \
 161                     (unsigned long)_reg_off,                            \
 162                     (unsigned long long)_val64);                        \
 163                 rte_write64(_val64, _dev->hw_addr + _reg_off);          \
 164         } while (0)
 165
 166 #define lio_read_csr(lio_dev, reg_off)                                  \
 167         ({                                                              \
 168                 typeof(lio_dev) _dev = lio_dev;                         \
 169                 typeof(reg_off) _reg_off = reg_off;                     \
 170                 uint32_t val = rte_read32(_dev->hw_addr + _reg_off);    \
 171                 PMD_REGS_LOG(_dev,                                      \
 172                              "Read32: Reg: 0x%08lx Val: 0x%08lx\n",     \
 173                              (unsigned long)_reg_off,                   \
 174                              (unsigned long)val);                       \
 175                 val;                                                    \
 176         })
 177
 178 #define lio_read_csr64(lio_dev, reg_off)                                \
 179         ({                                                              \
 180                 typeof(lio_dev) _dev = lio_dev;                         \
 181                 typeof(reg_off) _reg_off = reg_off;                     \
 182                 uint64_t val64 = rte_read64(_dev->hw_addr + _reg_off);  \
 183                 PMD_REGS_LOG(                                           \
 184                     _dev,                                               \
 185                     "Read64: Reg: 0x%08lx Val: 0x%016llx\n",            \
 186                     (unsigned long)_reg_off,                            \
 187                     (unsigned long long)val64);                         \
 188                 val64;                                                  \
 189         })
 190 #else
 191 #define lio_write_csr(lio_dev, reg_off, value)                          \
 192         rte_write32(value, (lio_dev)->hw_addr + (reg_off))
 193
 194 #define lio_write_csr64(lio_dev, reg_off, val64)                        \
 195         rte_write64(val64, (lio_dev)->hw_addr + (reg_off))
 196
 197 #define lio_read_csr(lio_dev, reg_off)                                  \
 198         rte_read32((lio_dev)->hw_addr + (reg_off))
 199
 200 #define lio_read_csr64(lio_dev, reg_off)                                \
 201         rte_read64((lio_dev)->hw_addr + (reg_off))
 202 #endif
 203 #endif /* _LIO_HW_DEFS_H_ */