4 * Copyright(c) 2017 Cavium, Inc.. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Cavium, Inc. nor the names of its
18 * contributors may be used to endorse or promote products derived
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21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <rte_ethdev.h>
35 #include <rte_cycles.h>
36 #include <rte_malloc.h>
39 #include "lio_struct.h"
40 #include "lio_ethdev.h"
44 lio_dma_zone_free(struct lio_device *lio_dev, const struct rte_memzone *mz)
46 const struct rte_memzone *mz_tmp;
50 lio_dev_err(lio_dev, "Memzone NULL\n");
54 mz_tmp = rte_memzone_lookup(mz->name);
56 lio_dev_err(lio_dev, "Memzone %s Not Found\n", mz->name);
60 ret = rte_memzone_free(mz);
62 lio_dev_err(lio_dev, "Memzone free Failed ret %d\n", ret);
66 * Frees the space for descriptor ring for the droq.
68 * @param lio_dev - pointer to the lio device structure
69 * @param q_no - droq no.
72 lio_delete_droq(struct lio_device *lio_dev, uint32_t q_no)
74 struct lio_droq *droq = lio_dev->droq[q_no];
76 lio_dev_dbg(lio_dev, "OQ[%d]\n", q_no);
78 rte_free(droq->recv_buf_list);
79 droq->recv_buf_list = NULL;
80 lio_dma_zone_free(lio_dev, droq->info_mz);
81 lio_dma_zone_free(lio_dev, droq->desc_ring_mz);
83 memset(droq, 0, LIO_DROQ_SIZE);
87 lio_alloc_info_buffer(struct lio_device *lio_dev,
88 struct lio_droq *droq, unsigned int socket_id)
90 droq->info_mz = rte_eth_dma_zone_reserve(lio_dev->eth_dev,
91 "info_list", droq->q_no,
97 if (droq->info_mz == NULL)
100 droq->info_list_dma = droq->info_mz->phys_addr;
101 droq->info_alloc_size = droq->info_mz->len;
102 droq->info_base_addr = (size_t)droq->info_mz->addr;
104 return droq->info_mz->addr;
108 * Allocates space for the descriptor ring for the droq and
109 * sets the base addr, num desc etc in Octeon registers.
111 * @param lio_dev - pointer to the lio device structure
112 * @param q_no - droq no.
113 * @param app_ctx - pointer to application context
114 * @return Success: 0 Failure: -1
117 lio_init_droq(struct lio_device *lio_dev, uint32_t q_no,
118 uint32_t num_descs, uint32_t desc_size,
119 struct rte_mempool *mpool, unsigned int socket_id)
121 uint32_t c_refill_threshold;
122 uint32_t desc_ring_size;
123 struct lio_droq *droq;
125 lio_dev_dbg(lio_dev, "OQ[%d]\n", q_no);
127 droq = lio_dev->droq[q_no];
128 droq->lio_dev = lio_dev;
132 c_refill_threshold = LIO_OQ_REFILL_THRESHOLD_CFG(lio_dev);
134 droq->max_count = num_descs;
135 droq->buffer_size = desc_size;
137 desc_ring_size = droq->max_count * LIO_DROQ_DESC_SIZE;
138 droq->desc_ring_mz = rte_eth_dma_zone_reserve(lio_dev->eth_dev,
144 if (droq->desc_ring_mz == NULL) {
146 "Output queue %d ring alloc failed\n", q_no);
150 droq->desc_ring_dma = droq->desc_ring_mz->phys_addr;
151 droq->desc_ring = (struct lio_droq_desc *)droq->desc_ring_mz->addr;
153 lio_dev_dbg(lio_dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n",
154 q_no, droq->desc_ring, (unsigned long)droq->desc_ring_dma);
155 lio_dev_dbg(lio_dev, "droq[%d]: num_desc: %d\n", q_no,
158 droq->info_list = lio_alloc_info_buffer(lio_dev, droq, socket_id);
159 if (droq->info_list == NULL) {
160 lio_dev_err(lio_dev, "Cannot allocate memory for info list.\n");
164 droq->recv_buf_list = rte_zmalloc_socket("recv_buf_list",
166 LIO_DROQ_RECVBUF_SIZE),
169 if (droq->recv_buf_list == NULL) {
171 "Output queue recv buf list alloc failed\n");
175 droq->refill_threshold = c_refill_threshold;
177 rte_spinlock_init(&droq->lock);
179 lio_dev->io_qmask.oq |= (1ULL << q_no);
184 lio_delete_droq(lio_dev, q_no);
190 lio_setup_droq(struct lio_device *lio_dev, int oq_no, int num_descs,
191 int desc_size, struct rte_mempool *mpool, unsigned int socket_id)
193 struct lio_droq *droq;
195 PMD_INIT_FUNC_TRACE();
197 if (lio_dev->droq[oq_no]) {
198 lio_dev_dbg(lio_dev, "Droq %d in use\n", oq_no);
202 /* Allocate the DS for the new droq. */
203 droq = rte_zmalloc_socket("ethdev RX queue", sizeof(*droq),
204 RTE_CACHE_LINE_SIZE, socket_id);
208 lio_dev->droq[oq_no] = droq;
210 /* Initialize the Droq */
211 if (lio_init_droq(lio_dev, oq_no, num_descs, desc_size, mpool,
213 lio_dev_err(lio_dev, "Droq[%u] Initialization Failed\n", oq_no);
214 rte_free(lio_dev->droq[oq_no]);
215 lio_dev->droq[oq_no] = NULL;
221 lio_dev_dbg(lio_dev, "Total number of OQ: %d\n", lio_dev->num_oqs);
223 /* Send credit for octeon output queues. credits are always
224 * sent after the output queue is enabled.
226 rte_write32(lio_dev->droq[oq_no]->max_count,
227 lio_dev->droq[oq_no]->pkts_credit_reg);
234 * lio_init_instr_queue()
235 * @param lio_dev - pointer to the lio device structure.
236 * @param txpciq - queue to be initialized.
238 * Called at driver init time for each input queue. iq_conf has the
239 * configuration parameters for the queue.
241 * @return Success: 0 Failure: -1
244 lio_init_instr_queue(struct lio_device *lio_dev,
245 union octeon_txpciq txpciq,
246 uint32_t num_descs, unsigned int socket_id)
248 uint32_t iq_no = (uint32_t)txpciq.s.q_no;
249 struct lio_instr_queue *iq;
253 instr_type = LIO_IQ_INSTR_TYPE(lio_dev);
255 q_size = instr_type * num_descs;
256 iq = lio_dev->instr_queue[iq_no];
257 iq->iq_mz = rte_eth_dma_zone_reserve(lio_dev->eth_dev,
258 "instr_queue", iq_no, q_size,
261 if (iq->iq_mz == NULL) {
262 lio_dev_err(lio_dev, "Cannot allocate memory for instr queue %d\n",
267 iq->base_addr_dma = iq->iq_mz->phys_addr;
268 iq->base_addr = (uint8_t *)iq->iq_mz->addr;
270 iq->max_count = num_descs;
272 /* Initialize a list to holds requests that have been posted to Octeon
273 * but has yet to be fetched by octeon
275 iq->request_list = rte_zmalloc_socket("request_list",
276 sizeof(*iq->request_list) *
280 if (iq->request_list == NULL) {
281 lio_dev_err(lio_dev, "Alloc failed for IQ[%d] nr free list\n",
283 lio_dma_zone_free(lio_dev, iq->iq_mz);
287 lio_dev_dbg(lio_dev, "IQ[%d]: base: %p basedma: %lx count: %d\n",
288 iq_no, iq->base_addr, (unsigned long)iq->base_addr_dma,
291 iq->lio_dev = lio_dev;
292 iq->txpciq.txpciq64 = txpciq.txpciq64;
294 iq->host_write_index = 0;
295 iq->lio_read_index = 0;
298 rte_atomic64_set(&iq->instr_pending, 0);
300 /* Initialize the spinlock for this instruction queue */
301 rte_spinlock_init(&iq->lock);
302 rte_spinlock_init(&iq->post_lock);
304 rte_atomic64_clear(&iq->iq_flush_running);
306 lio_dev->io_qmask.iq |= (1ULL << iq_no);
308 /* Set the 32B/64B mode for each input queue */
309 lio_dev->io_qmask.iq64B |= ((instr_type == 64) << iq_no);
310 iq->iqcmd_64B = (instr_type == 64);
312 lio_dev->fn_list.setup_iq_regs(lio_dev, iq_no);
318 lio_setup_instr_queue0(struct lio_device *lio_dev)
320 union octeon_txpciq txpciq;
321 uint32_t num_descs = 0;
324 num_descs = LIO_NUM_DEF_TX_DESCS_CFG(lio_dev);
326 lio_dev->num_iqs = 0;
328 lio_dev->instr_queue[0] = rte_zmalloc(NULL,
329 sizeof(struct lio_instr_queue), 0);
330 if (lio_dev->instr_queue[0] == NULL)
333 lio_dev->instr_queue[0]->q_index = 0;
334 lio_dev->instr_queue[0]->app_ctx = (void *)(size_t)0;
336 txpciq.s.q_no = iq_no;
337 txpciq.s.pkind = lio_dev->pfvf_hsword.pkind;
338 txpciq.s.use_qpg = 0;
340 if (lio_init_instr_queue(lio_dev, txpciq, num_descs, SOCKET_ID_ANY)) {
341 rte_free(lio_dev->instr_queue[0]);
342 lio_dev->instr_queue[0] = NULL;
352 * lio_delete_instr_queue()
353 * @param lio_dev - pointer to the lio device structure.
354 * @param iq_no - queue to be deleted.
356 * Called at driver unload time for each input queue. Deletes all
357 * allocated resources for the input queue.
360 lio_delete_instr_queue(struct lio_device *lio_dev, uint32_t iq_no)
362 struct lio_instr_queue *iq = lio_dev->instr_queue[iq_no];
364 rte_free(iq->request_list);
365 iq->request_list = NULL;
366 lio_dma_zone_free(lio_dev, iq->iq_mz);
370 lio_free_instr_queue0(struct lio_device *lio_dev)
372 lio_delete_instr_queue(lio_dev, 0);
373 rte_free(lio_dev->instr_queue[0]);
374 lio_dev->instr_queue[0] = NULL;
379 lio_ring_doorbell(struct lio_device *lio_dev,
380 struct lio_instr_queue *iq)
382 if (rte_atomic64_read(&lio_dev->status) == LIO_DEV_RUNNING) {
383 rte_write32(iq->fill_cnt, iq->doorbell_reg);
384 /* make sure doorbell write goes through */
391 copy_cmd_into_iq(struct lio_instr_queue *iq, uint8_t *cmd)
393 uint8_t *iqptr, cmdsize;
395 cmdsize = ((iq->iqcmd_64B) ? 64 : 32);
396 iqptr = iq->base_addr + (cmdsize * iq->host_write_index);
398 rte_memcpy(iqptr, cmd, cmdsize);
401 static inline struct lio_iq_post_status
402 post_command2(struct lio_instr_queue *iq, uint8_t *cmd)
404 struct lio_iq_post_status st;
406 st.status = LIO_IQ_SEND_OK;
408 /* This ensures that the read index does not wrap around to the same
409 * position if queue gets full before Octeon could fetch any instr.
411 if (rte_atomic64_read(&iq->instr_pending) >=
412 (int32_t)(iq->max_count - 1)) {
413 st.status = LIO_IQ_SEND_FAILED;
418 if (rte_atomic64_read(&iq->instr_pending) >=
419 (int32_t)(iq->max_count - 2))
420 st.status = LIO_IQ_SEND_STOP;
422 copy_cmd_into_iq(iq, cmd);
424 /* "index" is returned, host_write_index is modified. */
425 st.index = iq->host_write_index;
426 iq->host_write_index = lio_incr_index(iq->host_write_index, 1,
430 /* Flush the command into memory. We need to be sure the data is in
431 * memory before indicating that the instruction is pending.
435 rte_atomic64_inc(&iq->instr_pending);
441 lio_add_to_request_list(struct lio_instr_queue *iq,
442 int idx, void *buf, int reqtype)
444 iq->request_list[idx].buf = buf;
445 iq->request_list[idx].reqtype = reqtype;
449 lio_send_command(struct lio_device *lio_dev, uint32_t iq_no, void *cmd,
450 void *buf, uint32_t datasize __rte_unused, uint32_t reqtype)
452 struct lio_instr_queue *iq = lio_dev->instr_queue[iq_no];
453 struct lio_iq_post_status st;
455 rte_spinlock_lock(&iq->post_lock);
457 st = post_command2(iq, cmd);
459 if (st.status != LIO_IQ_SEND_FAILED) {
460 lio_add_to_request_list(iq, st.index, buf, reqtype);
461 lio_ring_doorbell(lio_dev, iq);
464 rte_spinlock_unlock(&iq->post_lock);
470 lio_prepare_soft_command(struct lio_device *lio_dev,
471 struct lio_soft_command *sc, uint8_t opcode,
472 uint8_t subcode, uint32_t irh_ossp, uint64_t ossp0,
475 struct octeon_instr_pki_ih3 *pki_ih3;
476 struct octeon_instr_ih3 *ih3;
477 struct octeon_instr_irh *irh;
478 struct octeon_instr_rdp *rdp;
480 RTE_ASSERT(opcode <= 15);
481 RTE_ASSERT(subcode <= 127);
483 ih3 = (struct octeon_instr_ih3 *)&sc->cmd.cmd3.ih3;
485 ih3->pkind = lio_dev->instr_queue[sc->iq_no]->txpciq.s.pkind;
487 pki_ih3 = (struct octeon_instr_pki_ih3 *)&sc->cmd.cmd3.pki_ih3;
492 pki_ih3->uqpg = lio_dev->instr_queue[sc->iq_no]->txpciq.s.use_qpg;
495 pki_ih3->tag = LIO_CONTROL;
496 pki_ih3->tagtype = OCTEON_ATOMIC_TAG;
497 pki_ih3->qpg = lio_dev->instr_queue[sc->iq_no]->txpciq.s.qpg;
502 ih3->dlengsz = sc->datasize;
504 irh = (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
505 irh->opcode = opcode;
506 irh->subcode = subcode;
508 /* opcode/subcode specific parameters (ossp) */
509 irh->ossp = irh_ossp;
510 sc->cmd.cmd3.ossp[0] = ossp0;
511 sc->cmd.cmd3.ossp[1] = ossp1;
514 rdp = (struct octeon_instr_rdp *)&sc->cmd.cmd3.rdp;
515 rdp->pcie_port = lio_dev->pcie_port;
516 rdp->rlen = sc->rdatasize;
519 ih3->fsz = OCTEON_SOFT_CMD_RESP_IH3;
523 ih3->fsz = OCTEON_PCI_CMD_O3;
528 lio_send_soft_command(struct lio_device *lio_dev,
529 struct lio_soft_command *sc)
531 struct octeon_instr_ih3 *ih3;
532 struct octeon_instr_irh *irh;
535 ih3 = (struct octeon_instr_ih3 *)&sc->cmd.cmd3.ih3;
537 RTE_ASSERT(sc->dmadptr);
538 sc->cmd.cmd3.dptr = sc->dmadptr;
541 irh = (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
543 RTE_ASSERT(sc->dmarptr);
544 RTE_ASSERT(sc->status_word != NULL);
545 *sc->status_word = LIO_COMPLETION_WORD_INIT;
546 sc->cmd.cmd3.rptr = sc->dmarptr;
549 len = (uint32_t)ih3->dlengsz;
552 sc->timeout = lio_uptime + sc->wait_time;
554 return lio_send_command(lio_dev, sc->iq_no, &sc->cmd, sc, len,
555 LIO_REQTYPE_SOFT_COMMAND);
559 lio_setup_sc_buffer_pool(struct lio_device *lio_dev)
561 char sc_pool_name[RTE_MEMPOOL_NAMESIZE];
564 buf_size = LIO_SOFT_COMMAND_BUFFER_SIZE + RTE_PKTMBUF_HEADROOM;
565 snprintf(sc_pool_name, sizeof(sc_pool_name),
566 "lio_sc_pool_%u", lio_dev->port_id);
567 lio_dev->sc_buf_pool = rte_pktmbuf_pool_create(sc_pool_name,
568 LIO_MAX_SOFT_COMMAND_BUFFERS,
569 0, 0, buf_size, SOCKET_ID_ANY);
574 lio_free_sc_buffer_pool(struct lio_device *lio_dev)
576 rte_mempool_free(lio_dev->sc_buf_pool);
579 struct lio_soft_command *
580 lio_alloc_soft_command(struct lio_device *lio_dev, uint32_t datasize,
581 uint32_t rdatasize, uint32_t ctxsize)
583 uint32_t offset = sizeof(struct lio_soft_command);
584 struct lio_soft_command *sc;
588 RTE_ASSERT((offset + datasize + rdatasize + ctxsize) <=
589 LIO_SOFT_COMMAND_BUFFER_SIZE);
591 m = rte_pktmbuf_alloc(lio_dev->sc_buf_pool);
593 lio_dev_err(lio_dev, "Cannot allocate mbuf for sc\n");
597 /* set rte_mbuf data size and there is only 1 segment */
598 m->pkt_len = LIO_SOFT_COMMAND_BUFFER_SIZE;
599 m->data_len = LIO_SOFT_COMMAND_BUFFER_SIZE;
601 /* use rte_mbuf buffer for soft command */
602 sc = rte_pktmbuf_mtod(m, struct lio_soft_command *);
603 memset(sc, 0, LIO_SOFT_COMMAND_BUFFER_SIZE);
604 sc->size = LIO_SOFT_COMMAND_BUFFER_SIZE;
605 sc->dma_addr = rte_mbuf_data_dma_addr(m);
608 dma_addr = sc->dma_addr;
611 sc->ctxptr = (uint8_t *)sc + offset;
612 sc->ctxsize = ctxsize;
615 /* Start data at 128 byte boundary */
616 offset = (offset + ctxsize + 127) & 0xffffff80;
619 sc->virtdptr = (uint8_t *)sc + offset;
620 sc->dmadptr = dma_addr + offset;
621 sc->datasize = datasize;
624 /* Start rdata at 128 byte boundary */
625 offset = (offset + datasize + 127) & 0xffffff80;
628 RTE_ASSERT(rdatasize >= 16);
629 sc->virtrptr = (uint8_t *)sc + offset;
630 sc->dmarptr = dma_addr + offset;
631 sc->rdatasize = rdatasize;
632 sc->status_word = (uint64_t *)((uint8_t *)(sc->virtrptr) +
640 lio_free_soft_command(struct lio_soft_command *sc)
642 rte_pktmbuf_free(sc->mbuf);
646 lio_setup_response_list(struct lio_device *lio_dev)
648 STAILQ_INIT(&lio_dev->response_list.head);
649 rte_spinlock_init(&lio_dev->response_list.lock);
650 rte_atomic64_set(&lio_dev->response_list.pending_req_count, 0);
654 lio_process_ordered_list(struct lio_device *lio_dev)
656 int resp_to_process = LIO_MAX_ORD_REQS_TO_PROCESS;
657 struct lio_response_list *ordered_sc_list;
658 struct lio_soft_command *sc;
659 int request_complete = 0;
663 ordered_sc_list = &lio_dev->response_list;
666 rte_spinlock_lock(&ordered_sc_list->lock);
668 if (STAILQ_EMPTY(&ordered_sc_list->head)) {
669 /* ordered_sc_list is empty; there is
672 rte_spinlock_unlock(&ordered_sc_list->lock);
676 sc = LIO_STQUEUE_FIRST_ENTRY(&ordered_sc_list->head,
677 struct lio_soft_command, node);
679 status = LIO_REQUEST_PENDING;
681 /* check if octeon has finished DMA'ing a response
682 * to where rptr is pointing to
684 status64 = *sc->status_word;
686 if (status64 != LIO_COMPLETION_WORD_INIT) {
687 /* This logic ensures that all 64b have been written.
688 * 1. check byte 0 for non-FF
689 * 2. if non-FF, then swap result from BE to host order
690 * 3. check byte 7 (swapped to 0) for non-FF
691 * 4. if non-FF, use the low 32-bit status code
692 * 5. if either byte 0 or byte 7 is FF, don't use status
694 if ((status64 & 0xff) != 0xff) {
695 lio_swap_8B_data(&status64, 1);
696 if (((status64 & 0xff) != 0xff)) {
697 /* retrieve 16-bit firmware status */
698 status = (uint32_t)(status64 &
702 LIO_FIRMWARE_STATUS_CODE(
706 status = LIO_REQUEST_DONE;
710 } else if ((sc->timeout && lio_check_timeout(lio_uptime,
713 "cmd failed, timeout (%ld, %ld)\n",
714 (long)lio_uptime, (long)sc->timeout);
715 status = LIO_REQUEST_TIMEOUT;
718 if (status != LIO_REQUEST_PENDING) {
719 /* we have received a response or we have timed out.
720 * remove node from linked list
722 STAILQ_REMOVE(&ordered_sc_list->head,
723 &sc->node, lio_stailq_node, entries);
725 &lio_dev->response_list.pending_req_count);
726 rte_spinlock_unlock(&ordered_sc_list->lock);
729 sc->callback(status, sc->callback_arg);
733 /* no response yet */
734 request_complete = 0;
735 rte_spinlock_unlock(&ordered_sc_list->lock);
738 /* If we hit the Max Ordered requests to process every loop,
739 * we quit and let this function be invoked the next time
740 * the poll thread runs to process the remaining requests.
741 * This function can take up the entire CPU if there is
742 * no upper limit to the requests processed.
744 if (request_complete >= resp_to_process)
746 } while (request_complete);