4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
51 #include <sys/ioctl.h>
52 #include <sys/socket.h>
53 #include <netinet/in.h>
54 #include <linux/ethtool.h>
55 #include <linux/sockios.h>
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_ethdev_pci.h>
63 #include <rte_errno.h>
64 #include <rte_mempool.h>
65 #include <rte_prefetch.h>
66 #include <rte_malloc.h>
67 #include <rte_spinlock.h>
68 #include <rte_atomic.h>
70 #include <rte_alarm.h>
71 #include <rte_memory.h>
73 #include <rte_kvargs.h>
74 #include <rte_interrupts.h>
75 #include <rte_branch_prediction.h>
77 /* Generated configuration header. */
78 #include "mlx4_autoconf.h"
82 #include "mlx4_flow.h"
84 /* Convenience macros for accessing mbuf fields. */
85 #define NEXT(m) ((m)->next)
86 #define DATA_LEN(m) ((m)->data_len)
87 #define PKT_LEN(m) ((m)->pkt_len)
88 #define DATA_OFF(m) ((m)->data_off)
89 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
90 #define NB_SEGS(m) ((m)->nb_segs)
91 #define PORT(m) ((m)->port)
93 /* Work Request ID data type (64 bit). */
102 #define WR_ID(o) (((wr_id_t *)&(o))->data)
104 /* Transpose flags. Useful to convert IBV to DPDK flags. */
105 #define TRANSPOSE(val, from, to) \
106 (((from) >= (to)) ? \
107 (((val) & (from)) / ((from) / (to))) : \
108 (((val) & (from)) * ((to) / (from))))
110 /** Configuration structure for device arguments. */
113 uint32_t present; /**< Bit-field for existing ports. */
114 uint32_t enabled; /**< Bit-field for user-enabled ports. */
118 /* Available parameters list. */
119 const char *pmd_mlx4_init_params[] = {
125 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
128 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
131 priv_rx_intr_vec_enable(struct priv *priv);
134 priv_rx_intr_vec_disable(struct priv *priv);
137 * Lock private structure to protect it from concurrent access in the
141 * Pointer to private structure.
143 void priv_lock(struct priv *priv)
145 rte_spinlock_lock(&priv->lock);
149 * Unlock private structure.
152 * Pointer to private structure.
154 void priv_unlock(struct priv *priv)
156 rte_spinlock_unlock(&priv->lock);
159 /* Allocate a buffer on the stack and fill it with a printf format string. */
160 #define MKSTR(name, ...) \
161 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
163 snprintf(name, sizeof(name), __VA_ARGS__)
166 * Get interface name from private structure.
169 * Pointer to private structure.
171 * Interface name output buffer.
174 * 0 on success, -1 on failure and errno is set.
177 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
181 unsigned int dev_type = 0;
182 unsigned int dev_port_prev = ~0u;
183 char match[IF_NAMESIZE] = "";
186 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
192 while ((dent = readdir(dir)) != NULL) {
193 char *name = dent->d_name;
195 unsigned int dev_port;
198 if ((name[0] == '.') &&
199 ((name[1] == '\0') ||
200 ((name[1] == '.') && (name[2] == '\0'))))
203 MKSTR(path, "%s/device/net/%s/%s",
204 priv->ctx->device->ibdev_path, name,
205 (dev_type ? "dev_id" : "dev_port"));
207 file = fopen(path, "rb");
212 * Switch to dev_id when dev_port does not exist as
213 * is the case with Linux kernel versions < 3.15.
224 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
229 * Switch to dev_id when dev_port returns the same value for
230 * all ports. May happen when using a MOFED release older than
231 * 3.0 with a Linux kernel >= 3.15.
233 if (dev_port == dev_port_prev)
235 dev_port_prev = dev_port;
236 if (dev_port == (priv->port - 1u))
237 snprintf(match, sizeof(match), "%s", name);
240 if (match[0] == '\0')
242 strncpy(*ifname, match, sizeof(*ifname));
247 * Read from sysfs entry.
250 * Pointer to private structure.
252 * Entry name relative to sysfs path.
254 * Data output buffer.
259 * 0 on success, -1 on failure and errno is set.
262 priv_sysfs_read(const struct priv *priv, const char *entry,
263 char *buf, size_t size)
265 char ifname[IF_NAMESIZE];
270 if (priv_get_ifname(priv, &ifname))
273 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
276 file = fopen(path, "rb");
279 ret = fread(buf, 1, size, file);
281 if (((size_t)ret < size) && (ferror(file)))
291 * Write to sysfs entry.
294 * Pointer to private structure.
296 * Entry name relative to sysfs path.
303 * 0 on success, -1 on failure and errno is set.
306 priv_sysfs_write(const struct priv *priv, const char *entry,
307 char *buf, size_t size)
309 char ifname[IF_NAMESIZE];
314 if (priv_get_ifname(priv, &ifname))
317 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
320 file = fopen(path, "wb");
323 ret = fwrite(buf, 1, size, file);
325 if (((size_t)ret < size) || (ferror(file)))
335 * Get unsigned long sysfs property.
338 * Pointer to private structure.
340 * Entry name relative to sysfs path.
342 * Value output buffer.
345 * 0 on success, -1 on failure and errno is set.
348 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
351 unsigned long value_ret;
354 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
356 DEBUG("cannot read %s value from sysfs: %s",
357 name, strerror(errno));
360 value_str[ret] = '\0';
362 value_ret = strtoul(value_str, NULL, 0);
364 DEBUG("invalid %s value `%s': %s", name, value_str,
373 * Set unsigned long sysfs property.
376 * Pointer to private structure.
378 * Entry name relative to sysfs path.
383 * 0 on success, -1 on failure and errno is set.
386 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
389 MKSTR(value_str, "%lu", value);
391 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
393 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
394 name, value_str, value, strerror(errno));
401 * Perform ifreq ioctl() on associated Ethernet device.
404 * Pointer to private structure.
406 * Request number to pass to ioctl().
408 * Interface request structure output buffer.
411 * 0 on success, -1 on failure and errno is set.
414 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
416 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
421 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
422 ret = ioctl(sock, req, ifr);
431 * Pointer to private structure.
433 * MTU value output buffer.
436 * 0 on success, -1 on failure and errno is set.
439 priv_get_mtu(struct priv *priv, uint16_t *mtu)
441 unsigned long ulong_mtu;
443 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
453 * Pointer to private structure.
458 * 0 on success, -1 on failure and errno is set.
461 priv_set_mtu(struct priv *priv, uint16_t mtu)
465 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
466 priv_get_mtu(priv, &new_mtu))
478 * Pointer to private structure.
480 * Bitmask for flags that must remain untouched.
482 * Bitmask for flags to modify.
485 * 0 on success, -1 on failure and errno is set.
488 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
492 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
495 tmp |= (flags & (~keep));
496 return priv_set_sysfs_ulong(priv, "flags", tmp);
499 /* Device configuration. */
502 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
503 unsigned int socket, const struct rte_eth_txconf *conf);
506 txq_cleanup(struct txq *txq);
509 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
510 unsigned int socket, int inactive,
511 const struct rte_eth_rxconf *conf,
512 struct rte_mempool *mp, int children_n,
513 struct rxq *rxq_parent);
516 rxq_cleanup(struct rxq *rxq);
519 * Create RSS parent queue.
521 * The new parent is inserted in front of the list in the private structure.
524 * Pointer to private structure.
526 * Queues indices array, if NULL use all Rx queues.
528 * The number of entries in queues[].
531 * Pointer to a parent rxq structure, NULL on failure.
534 priv_parent_create(struct priv *priv,
542 parent = rte_zmalloc("parent queue",
544 RTE_CACHE_LINE_SIZE);
546 ERROR("cannot allocate memory for RSS parent queue");
549 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
550 NULL, NULL, children_n, NULL);
555 parent->rss.queues_n = children_n;
557 for (i = 0; i < children_n; ++i)
558 parent->rss.queues[i] = queues[i];
560 /* the default RSS ring case */
561 assert(priv->rxqs_n == children_n);
562 for (i = 0; i < priv->rxqs_n; ++i)
563 parent->rss.queues[i] = i;
565 LIST_INSERT_HEAD(&priv->parents, parent, next);
570 * Clean up RX queue parent structure.
573 * RX queue parent structure.
576 rxq_parent_cleanup(struct rxq *parent)
578 LIST_REMOVE(parent, next);
584 * Clean up parent structures from the parent list.
587 * Pointer to private structure.
590 priv_parent_list_cleanup(struct priv *priv)
592 while (!LIST_EMPTY(&priv->parents))
593 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
597 * Ethernet device configuration.
599 * Prepare the driver for a given number of TX and RX queues.
600 * Allocate parent RSS queue when several RX queues are requested.
603 * Pointer to Ethernet device structure.
606 * 0 on success, errno value on failure.
609 dev_configure(struct rte_eth_dev *dev)
611 struct priv *priv = dev->data->dev_private;
612 unsigned int rxqs_n = dev->data->nb_rx_queues;
613 unsigned int txqs_n = dev->data->nb_tx_queues;
616 priv->rxqs = (void *)dev->data->rx_queues;
617 priv->txqs = (void *)dev->data->tx_queues;
618 if (txqs_n != priv->txqs_n) {
619 INFO("%p: TX queues number update: %u -> %u",
620 (void *)dev, priv->txqs_n, txqs_n);
621 priv->txqs_n = txqs_n;
623 if (rxqs_n == priv->rxqs_n)
625 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
628 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
629 WARN("%p: number of RX queues must be a power"
630 " of 2: %u queues among %u will be active",
631 (void *)dev, n_active, rxqs_n);
634 INFO("%p: RX queues number update: %u -> %u",
635 (void *)dev, priv->rxqs_n, rxqs_n);
636 /* If RSS is enabled, disable it first. */
640 /* Only if there are no remaining child RX queues. */
641 for (i = 0; (i != priv->rxqs_n); ++i)
642 if ((*priv->rxqs)[i] != NULL)
644 priv_parent_list_cleanup(priv);
649 /* Nothing else to do. */
650 priv->rxqs_n = rxqs_n;
653 /* Allocate a new RSS parent queue if supported by hardware. */
655 ERROR("%p: only a single RX queue can be configured when"
656 " hardware doesn't support RSS",
660 /* Fail if hardware doesn't support that many RSS queues. */
661 if (rxqs_n >= priv->max_rss_tbl_sz) {
662 ERROR("%p: only %u RX queues can be configured for RSS",
663 (void *)dev, priv->max_rss_tbl_sz);
668 priv->rxqs_n = rxqs_n;
671 if (priv_parent_create(priv, NULL, priv->rxqs_n))
673 /* Failure, rollback. */
680 * DPDK callback for Ethernet device configuration.
683 * Pointer to Ethernet device structure.
686 * 0 on success, negative errno value on failure.
689 mlx4_dev_configure(struct rte_eth_dev *dev)
691 struct priv *priv = dev->data->dev_private;
695 ret = dev_configure(dev);
701 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
702 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
704 /* TX queues handling. */
707 * Allocate TX queue elements.
710 * Pointer to TX queue structure.
712 * Number of elements to allocate.
715 * 0 on success, errno value on failure.
718 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
721 struct txq_elt (*elts)[elts_n] =
722 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
723 linear_t (*elts_linear)[elts_n] =
724 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
726 struct ibv_mr *mr_linear = NULL;
729 if ((elts == NULL) || (elts_linear == NULL)) {
730 ERROR("%p: can't allocate packets array", (void *)txq);
735 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
736 IBV_ACCESS_LOCAL_WRITE);
737 if (mr_linear == NULL) {
738 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
743 for (i = 0; (i != elts_n); ++i) {
744 struct txq_elt *elt = &(*elts)[i];
748 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
749 txq->elts_n = elts_n;
754 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
755 * at least 4 times per ring. */
756 txq->elts_comp_cd_init =
757 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
758 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
759 txq->elts_comp_cd = txq->elts_comp_cd_init;
760 txq->elts_linear = elts_linear;
761 txq->mr_linear = mr_linear;
765 if (mr_linear != NULL)
766 claim_zero(ibv_dereg_mr(mr_linear));
768 rte_free(elts_linear);
771 DEBUG("%p: failed, freed everything", (void *)txq);
777 * Free TX queue elements.
780 * Pointer to TX queue structure.
783 txq_free_elts(struct txq *txq)
785 unsigned int elts_n = txq->elts_n;
786 unsigned int elts_head = txq->elts_head;
787 unsigned int elts_tail = txq->elts_tail;
788 struct txq_elt (*elts)[elts_n] = txq->elts;
789 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
790 struct ibv_mr *mr_linear = txq->mr_linear;
792 DEBUG("%p: freeing WRs", (void *)txq);
797 txq->elts_comp_cd = 0;
798 txq->elts_comp_cd_init = 0;
800 txq->elts_linear = NULL;
801 txq->mr_linear = NULL;
802 if (mr_linear != NULL)
803 claim_zero(ibv_dereg_mr(mr_linear));
805 rte_free(elts_linear);
808 while (elts_tail != elts_head) {
809 struct txq_elt *elt = &(*elts)[elts_tail];
811 assert(elt->buf != NULL);
812 rte_pktmbuf_free(elt->buf);
815 memset(elt, 0x77, sizeof(*elt));
817 if (++elts_tail == elts_n)
825 * Clean up a TX queue.
827 * Destroy objects, free allocated memory and reset the structure for reuse.
830 * Pointer to TX queue structure.
833 txq_cleanup(struct txq *txq)
835 struct ibv_exp_release_intf_params params;
838 DEBUG("cleaning up %p", (void *)txq);
840 if (txq->if_qp != NULL) {
841 assert(txq->priv != NULL);
842 assert(txq->priv->ctx != NULL);
843 assert(txq->qp != NULL);
844 params = (struct ibv_exp_release_intf_params){
847 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
851 if (txq->if_cq != NULL) {
852 assert(txq->priv != NULL);
853 assert(txq->priv->ctx != NULL);
854 assert(txq->cq != NULL);
855 params = (struct ibv_exp_release_intf_params){
858 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
863 claim_zero(ibv_destroy_qp(txq->qp));
865 claim_zero(ibv_destroy_cq(txq->cq));
866 if (txq->rd != NULL) {
867 struct ibv_exp_destroy_res_domain_attr attr = {
871 assert(txq->priv != NULL);
872 assert(txq->priv->ctx != NULL);
873 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
877 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
878 if (txq->mp2mr[i].mp == NULL)
880 assert(txq->mp2mr[i].mr != NULL);
881 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
883 memset(txq, 0, sizeof(*txq));
887 * Manage TX completions.
889 * When sending a burst, mlx4_tx_burst() posts several WRs.
890 * To improve performance, a completion event is only required once every
891 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
892 * for other WRs, but this information would not be used anyway.
895 * Pointer to TX queue structure.
898 * 0 on success, -1 on failure.
901 txq_complete(struct txq *txq)
903 unsigned int elts_comp = txq->elts_comp;
904 unsigned int elts_tail = txq->elts_tail;
905 const unsigned int elts_n = txq->elts_n;
908 if (unlikely(elts_comp == 0))
910 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
911 if (unlikely(wcs_n == 0))
913 if (unlikely(wcs_n < 0)) {
914 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
919 assert(elts_comp <= txq->elts_comp);
921 * Assume WC status is successful as nothing can be done about it
924 elts_tail += wcs_n * txq->elts_comp_cd_init;
925 if (elts_tail >= elts_n)
927 txq->elts_tail = elts_tail;
928 txq->elts_comp = elts_comp;
932 struct mlx4_check_mempool_data {
938 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
939 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
940 void *opaque, struct rte_mempool_memhdr *memhdr,
943 struct mlx4_check_mempool_data *data = opaque;
948 /* It already failed, skip the next chunks. */
951 /* It is the first chunk. */
952 if (data->start == NULL && data->end == NULL) {
953 data->start = memhdr->addr;
954 data->end = data->start + memhdr->len;
957 if (data->end == memhdr->addr) {
958 data->end += memhdr->len;
961 if (data->start == (char *)memhdr->addr + memhdr->len) {
962 data->start -= memhdr->len;
965 /* Error, mempool is not virtually contigous. */
970 * Check if a mempool can be used: it must be virtually contiguous.
973 * Pointer to memory pool.
975 * Pointer to the start address of the mempool virtual memory area
977 * Pointer to the end address of the mempool virtual memory area
980 * 0 on success (mempool is virtually contiguous), -1 on error.
982 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
985 struct mlx4_check_mempool_data data;
987 memset(&data, 0, sizeof(data));
988 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
989 *start = (uintptr_t)data.start;
990 *end = (uintptr_t)data.end;
995 /* For best performance, this function should not be inlined. */
996 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1000 * Register mempool as a memory region.
1003 * Pointer to protection domain.
1005 * Pointer to memory pool.
1008 * Memory region pointer, NULL in case of error.
1010 static struct ibv_mr *
1011 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1013 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1018 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1019 ERROR("mempool %p: not virtually contiguous",
1024 DEBUG("mempool %p area start=%p end=%p size=%zu",
1025 (void *)mp, (void *)start, (void *)end,
1026 (size_t)(end - start));
1027 /* Round start and end to page boundary if found in memory segments. */
1028 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1029 uintptr_t addr = (uintptr_t)ms[i].addr;
1030 size_t len = ms[i].len;
1031 unsigned int align = ms[i].hugepage_sz;
1033 if ((start > addr) && (start < addr + len))
1034 start = RTE_ALIGN_FLOOR(start, align);
1035 if ((end > addr) && (end < addr + len))
1036 end = RTE_ALIGN_CEIL(end, align);
1038 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1039 (void *)mp, (void *)start, (void *)end,
1040 (size_t)(end - start));
1041 return ibv_reg_mr(pd,
1044 IBV_ACCESS_LOCAL_WRITE);
1048 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1049 * the cloned mbuf is allocated is returned instead.
1055 * Memory pool where data is located for given mbuf.
1057 static struct rte_mempool *
1058 txq_mb2mp(struct rte_mbuf *buf)
1060 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1061 return rte_mbuf_from_indirect(buf)->pool;
1066 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1067 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1068 * remove an entry first.
1071 * Pointer to TX queue structure.
1073 * Memory Pool for which a Memory Region lkey must be returned.
1076 * mr->lkey on success, (uint32_t)-1 on failure.
1079 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1084 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1085 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1086 /* Unknown MP, add a new MR for it. */
1089 if (txq->mp2mr[i].mp == mp) {
1090 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1091 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1092 return txq->mp2mr[i].lkey;
1095 /* Add a new entry, register MR first. */
1096 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1097 (void *)txq, mp->name, (void *)mp);
1098 mr = mlx4_mp2mr(txq->priv->pd, mp);
1099 if (unlikely(mr == NULL)) {
1100 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1102 return (uint32_t)-1;
1104 if (unlikely(i == elemof(txq->mp2mr))) {
1105 /* Table is full, remove oldest entry. */
1106 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1109 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1110 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1111 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1113 /* Store the new entry. */
1114 txq->mp2mr[i].mp = mp;
1115 txq->mp2mr[i].mr = mr;
1116 txq->mp2mr[i].lkey = mr->lkey;
1117 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1118 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1119 return txq->mp2mr[i].lkey;
1122 struct txq_mp2mr_mbuf_check_data {
1127 * Callback function for rte_mempool_obj_iter() to check whether a given
1128 * mempool object looks like a mbuf.
1131 * The mempool pointer
1133 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1138 * Object index, unused.
1141 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1142 uint32_t index __rte_unused)
1144 struct txq_mp2mr_mbuf_check_data *data = arg;
1145 struct rte_mbuf *buf = obj;
1147 /* Check whether mbuf structure fits element size and whether mempool
1148 * pointer is valid. */
1149 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1154 * Iterator function for rte_mempool_walk() to register existing mempools and
1155 * fill the MP to MR cache of a TX queue.
1158 * Memory Pool to register.
1160 * Pointer to TX queue structure.
1163 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1165 struct txq *txq = arg;
1166 struct txq_mp2mr_mbuf_check_data data = {
1170 /* Register mempool only if the first element looks like a mbuf. */
1171 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1178 * Copy scattered mbuf contents to a single linear buffer.
1180 * @param[out] linear
1181 * Linear output buffer.
1183 * Scattered input buffer.
1186 * Number of bytes copied to the output buffer or 0 if not large enough.
1189 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1191 unsigned int size = 0;
1192 unsigned int offset;
1195 unsigned int len = DATA_LEN(buf);
1199 if (unlikely(size > sizeof(*linear)))
1201 memcpy(&(*linear)[offset],
1202 rte_pktmbuf_mtod(buf, uint8_t *),
1205 } while (buf != NULL);
1210 * Handle scattered buffers for mlx4_tx_burst().
1213 * TX queue structure.
1215 * Number of segments in buf.
1217 * TX queue element to fill.
1219 * Buffer to process.
1221 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1223 * Array filled with SGEs on success.
1226 * A structure containing the processed packet size in bytes and the
1227 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1230 static struct tx_burst_sg_ret {
1231 unsigned int length;
1234 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1235 struct rte_mbuf *buf, unsigned int elts_head,
1236 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1238 unsigned int sent_size = 0;
1242 /* When there are too many segments, extra segments are
1243 * linearized in the last SGE. */
1244 if (unlikely(segs > elemof(*sges))) {
1245 segs = (elemof(*sges) - 1);
1248 /* Update element. */
1250 /* Register segments as SGEs. */
1251 for (j = 0; (j != segs); ++j) {
1252 struct ibv_sge *sge = &(*sges)[j];
1255 /* Retrieve Memory Region key for this memory pool. */
1256 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1257 if (unlikely(lkey == (uint32_t)-1)) {
1258 /* MR does not exist. */
1259 DEBUG("%p: unable to get MP <-> MR association",
1261 /* Clean up TX element. */
1266 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1268 rte_prefetch0((volatile void *)
1269 (uintptr_t)sge->addr);
1270 sge->length = DATA_LEN(buf);
1272 sent_size += sge->length;
1275 /* If buf is not NULL here and is not going to be linearized,
1276 * nb_segs is not valid. */
1278 assert((buf == NULL) || (linearize));
1279 /* Linearize extra segments. */
1281 struct ibv_sge *sge = &(*sges)[segs];
1282 linear_t *linear = &(*txq->elts_linear)[elts_head];
1283 unsigned int size = linearize_mbuf(linear, buf);
1285 assert(segs == (elemof(*sges) - 1));
1287 /* Invalid packet. */
1288 DEBUG("%p: packet too large to be linearized.",
1290 /* Clean up TX element. */
1294 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1295 if (elemof(*sges) == 1) {
1297 struct rte_mbuf *next = NEXT(buf);
1299 rte_pktmbuf_free_seg(buf);
1301 } while (buf != NULL);
1305 sge->addr = (uintptr_t)&(*linear)[0];
1307 sge->lkey = txq->mr_linear->lkey;
1309 /* Include last segment. */
1312 return (struct tx_burst_sg_ret){
1313 .length = sent_size,
1317 return (struct tx_burst_sg_ret){
1324 * DPDK callback for TX.
1327 * Generic pointer to TX queue structure.
1329 * Packets to transmit.
1331 * Number of packets in array.
1334 * Number of packets successfully transmitted (<= pkts_n).
1337 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1339 struct txq *txq = (struct txq *)dpdk_txq;
1340 unsigned int elts_head = txq->elts_head;
1341 const unsigned int elts_n = txq->elts_n;
1342 unsigned int elts_comp_cd = txq->elts_comp_cd;
1343 unsigned int elts_comp = 0;
1348 assert(elts_comp_cd != 0);
1350 max = (elts_n - (elts_head - txq->elts_tail));
1354 assert(max <= elts_n);
1355 /* Always leave one free entry in the ring. */
1361 for (i = 0; (i != max); ++i) {
1362 struct rte_mbuf *buf = pkts[i];
1363 unsigned int elts_head_next =
1364 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1365 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1366 struct txq_elt *elt = &(*txq->elts)[elts_head];
1367 unsigned int segs = NB_SEGS(buf);
1368 unsigned int sent_size = 0;
1369 uint32_t send_flags = 0;
1371 /* Clean up old buffer. */
1372 if (likely(elt->buf != NULL)) {
1373 struct rte_mbuf *tmp = elt->buf;
1377 memset(elt, 0x66, sizeof(*elt));
1379 /* Faster than rte_pktmbuf_free(). */
1381 struct rte_mbuf *next = NEXT(tmp);
1383 rte_pktmbuf_free_seg(tmp);
1385 } while (tmp != NULL);
1387 /* Request TX completion. */
1388 if (unlikely(--elts_comp_cd == 0)) {
1389 elts_comp_cd = txq->elts_comp_cd_init;
1391 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1393 /* Should we enable HW CKSUM offload */
1395 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1396 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1397 /* HW does not support checksum offloads at arbitrary
1398 * offsets but automatically recognizes the packet
1399 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1400 * tunnels are currently supported. */
1401 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1402 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1404 if (likely(segs == 1)) {
1409 /* Retrieve buffer information. */
1410 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1411 length = DATA_LEN(buf);
1412 /* Retrieve Memory Region key for this memory pool. */
1413 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1414 if (unlikely(lkey == (uint32_t)-1)) {
1415 /* MR does not exist. */
1416 DEBUG("%p: unable to get MP <-> MR"
1417 " association", (void *)txq);
1418 /* Clean up TX element. */
1422 /* Update element. */
1425 rte_prefetch0((volatile void *)
1427 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1428 /* Put packet into send queue. */
1429 if (length <= txq->max_inline)
1430 err = txq->if_qp->send_pending_inline
1436 err = txq->if_qp->send_pending
1444 sent_size += length;
1446 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1447 struct tx_burst_sg_ret ret;
1449 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1451 if (ret.length == (unsigned int)-1)
1453 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1454 /* Put SG list into send queue. */
1455 err = txq->if_qp->send_pending_sg_list
1462 sent_size += ret.length;
1464 elts_head = elts_head_next;
1465 /* Increment sent bytes counter. */
1466 txq->stats.obytes += sent_size;
1469 /* Take a shortcut if nothing must be sent. */
1470 if (unlikely(i == 0))
1472 /* Increment sent packets counter. */
1473 txq->stats.opackets += i;
1474 /* Ring QP doorbell. */
1475 err = txq->if_qp->send_flush(txq->qp);
1476 if (unlikely(err)) {
1477 /* A nonzero value is not supposed to be returned.
1478 * Nothing can be done about it. */
1479 DEBUG("%p: send_flush() failed with error %d",
1482 txq->elts_head = elts_head;
1483 txq->elts_comp += elts_comp;
1484 txq->elts_comp_cd = elts_comp_cd;
1489 * Configure a TX queue.
1492 * Pointer to Ethernet device structure.
1494 * Pointer to TX queue structure.
1496 * Number of descriptors to configure in queue.
1498 * NUMA socket on which memory must be allocated.
1500 * Thresholds parameters.
1503 * 0 on success, errno value on failure.
1506 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1507 unsigned int socket, const struct rte_eth_txconf *conf)
1509 struct priv *priv = dev->data->dev_private;
1515 struct ibv_exp_query_intf_params params;
1516 struct ibv_exp_qp_init_attr init;
1517 struct ibv_exp_res_domain_init_attr rd;
1518 struct ibv_exp_cq_init_attr cq;
1519 struct ibv_exp_qp_attr mod;
1521 enum ibv_exp_query_intf_status status;
1524 (void)conf; /* Thresholds configuration (ignored). */
1527 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1528 ERROR("%p: invalid number of TX descriptors (must be a"
1529 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1532 desc /= MLX4_PMD_SGE_WR_N;
1533 /* MRs will be registered in mp2mr[] later. */
1534 attr.rd = (struct ibv_exp_res_domain_init_attr){
1535 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1536 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1537 .thread_model = IBV_EXP_THREAD_SINGLE,
1538 .msg_model = IBV_EXP_MSG_HIGH_BW,
1540 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1541 if (tmpl.rd == NULL) {
1543 ERROR("%p: RD creation failure: %s",
1544 (void *)dev, strerror(ret));
1547 attr.cq = (struct ibv_exp_cq_init_attr){
1548 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1549 .res_domain = tmpl.rd,
1551 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1552 if (tmpl.cq == NULL) {
1554 ERROR("%p: CQ creation failure: %s",
1555 (void *)dev, strerror(ret));
1558 DEBUG("priv->device_attr.max_qp_wr is %d",
1559 priv->device_attr.max_qp_wr);
1560 DEBUG("priv->device_attr.max_sge is %d",
1561 priv->device_attr.max_sge);
1562 attr.init = (struct ibv_exp_qp_init_attr){
1563 /* CQ to be associated with the send queue. */
1565 /* CQ to be associated with the receive queue. */
1568 /* Max number of outstanding WRs. */
1569 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1570 priv->device_attr.max_qp_wr :
1572 /* Max number of scatter/gather elements in a WR. */
1573 .max_send_sge = ((priv->device_attr.max_sge <
1574 MLX4_PMD_SGE_WR_N) ?
1575 priv->device_attr.max_sge :
1577 .max_inline_data = MLX4_PMD_MAX_INLINE,
1579 .qp_type = IBV_QPT_RAW_PACKET,
1580 /* Do *NOT* enable this, completions events are managed per
1584 .res_domain = tmpl.rd,
1585 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1586 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1588 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1589 if (tmpl.qp == NULL) {
1590 ret = (errno ? errno : EINVAL);
1591 ERROR("%p: QP creation failure: %s",
1592 (void *)dev, strerror(ret));
1595 /* ibv_create_qp() updates this value. */
1596 tmpl.max_inline = attr.init.cap.max_inline_data;
1597 attr.mod = (struct ibv_exp_qp_attr){
1598 /* Move the QP to this state. */
1599 .qp_state = IBV_QPS_INIT,
1600 /* Primary port number. */
1601 .port_num = priv->port
1603 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1604 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1606 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1607 (void *)dev, strerror(ret));
1610 ret = txq_alloc_elts(&tmpl, desc);
1612 ERROR("%p: TXQ allocation failed: %s",
1613 (void *)dev, strerror(ret));
1616 attr.mod = (struct ibv_exp_qp_attr){
1617 .qp_state = IBV_QPS_RTR
1619 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1621 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1622 (void *)dev, strerror(ret));
1625 attr.mod.qp_state = IBV_QPS_RTS;
1626 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1628 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1629 (void *)dev, strerror(ret));
1632 attr.params = (struct ibv_exp_query_intf_params){
1633 .intf_scope = IBV_EXP_INTF_GLOBAL,
1634 .intf = IBV_EXP_INTF_CQ,
1637 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1638 if (tmpl.if_cq == NULL) {
1639 ERROR("%p: CQ interface family query failed with status %d",
1640 (void *)dev, status);
1643 attr.params = (struct ibv_exp_query_intf_params){
1644 .intf_scope = IBV_EXP_INTF_GLOBAL,
1645 .intf = IBV_EXP_INTF_QP_BURST,
1647 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1648 /* MC loopback must be disabled when not using a VF. */
1651 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1655 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1656 if (tmpl.if_qp == NULL) {
1657 ERROR("%p: QP interface family query failed with status %d",
1658 (void *)dev, status);
1661 /* Clean up txq in case we're reinitializing it. */
1662 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1665 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1666 /* Pre-register known mempools. */
1667 rte_mempool_walk(txq_mp2mr_iter, txq);
1677 * DPDK callback to configure a TX queue.
1680 * Pointer to Ethernet device structure.
1684 * Number of descriptors to configure in queue.
1686 * NUMA socket on which memory must be allocated.
1688 * Thresholds parameters.
1691 * 0 on success, negative errno value on failure.
1694 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1695 unsigned int socket, const struct rte_eth_txconf *conf)
1697 struct priv *priv = dev->data->dev_private;
1698 struct txq *txq = (*priv->txqs)[idx];
1702 DEBUG("%p: configuring queue %u for %u descriptors",
1703 (void *)dev, idx, desc);
1704 if (idx >= priv->txqs_n) {
1705 ERROR("%p: queue index out of range (%u >= %u)",
1706 (void *)dev, idx, priv->txqs_n);
1711 DEBUG("%p: reusing already allocated queue index %u (%p)",
1712 (void *)dev, idx, (void *)txq);
1713 if (priv->started) {
1717 (*priv->txqs)[idx] = NULL;
1720 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1722 ERROR("%p: unable to allocate queue index %u",
1728 ret = txq_setup(dev, txq, desc, socket, conf);
1732 txq->stats.idx = idx;
1733 DEBUG("%p: adding TX queue %p to list",
1734 (void *)dev, (void *)txq);
1735 (*priv->txqs)[idx] = txq;
1736 /* Update send callback. */
1737 dev->tx_pkt_burst = mlx4_tx_burst;
1744 * DPDK callback to release a TX queue.
1747 * Generic TX queue pointer.
1750 mlx4_tx_queue_release(void *dpdk_txq)
1752 struct txq *txq = (struct txq *)dpdk_txq;
1760 for (i = 0; (i != priv->txqs_n); ++i)
1761 if ((*priv->txqs)[i] == txq) {
1762 DEBUG("%p: removing TX queue %p from list",
1763 (void *)priv->dev, (void *)txq);
1764 (*priv->txqs)[i] = NULL;
1772 /* RX queues handling. */
1775 * Allocate RX queue elements with scattered packets support.
1778 * Pointer to RX queue structure.
1780 * Number of elements to allocate.
1782 * If not NULL, fetch buffers from this array instead of allocating them
1783 * with rte_pktmbuf_alloc().
1786 * 0 on success, errno value on failure.
1789 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1790 struct rte_mbuf **pool)
1793 struct rxq_elt_sp (*elts)[elts_n] =
1794 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1799 ERROR("%p: can't allocate packets array", (void *)rxq);
1803 /* For each WR (packet). */
1804 for (i = 0; (i != elts_n); ++i) {
1806 struct rxq_elt_sp *elt = &(*elts)[i];
1807 struct ibv_recv_wr *wr = &elt->wr;
1808 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1810 /* These two arrays must have the same size. */
1811 assert(elemof(elt->sges) == elemof(elt->bufs));
1814 wr->next = &(*elts)[(i + 1)].wr;
1815 wr->sg_list = &(*sges)[0];
1816 wr->num_sge = elemof(*sges);
1817 /* For each SGE (segment). */
1818 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1819 struct ibv_sge *sge = &(*sges)[j];
1820 struct rte_mbuf *buf;
1824 assert(buf != NULL);
1825 rte_pktmbuf_reset(buf);
1827 buf = rte_pktmbuf_alloc(rxq->mp);
1829 assert(pool == NULL);
1830 ERROR("%p: empty mbuf pool", (void *)rxq);
1835 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1836 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1837 /* Buffer is supposed to be empty. */
1838 assert(rte_pktmbuf_data_len(buf) == 0);
1839 assert(rte_pktmbuf_pkt_len(buf) == 0);
1840 /* sge->addr must be able to store a pointer. */
1841 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1843 /* The first SGE keeps its headroom. */
1844 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1845 sge->length = (buf->buf_len -
1846 RTE_PKTMBUF_HEADROOM);
1848 /* Subsequent SGEs lose theirs. */
1849 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1850 SET_DATA_OFF(buf, 0);
1851 sge->addr = (uintptr_t)buf->buf_addr;
1852 sge->length = buf->buf_len;
1854 sge->lkey = rxq->mr->lkey;
1855 /* Redundant check for tailroom. */
1856 assert(sge->length == rte_pktmbuf_tailroom(buf));
1859 /* The last WR pointer must be NULL. */
1860 (*elts)[(i - 1)].wr.next = NULL;
1861 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
1862 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
1863 rxq->elts_n = elts_n;
1865 rxq->elts.sp = elts;
1870 assert(pool == NULL);
1871 for (i = 0; (i != elemof(*elts)); ++i) {
1873 struct rxq_elt_sp *elt = &(*elts)[i];
1875 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1876 struct rte_mbuf *buf = elt->bufs[j];
1879 rte_pktmbuf_free_seg(buf);
1884 DEBUG("%p: failed, freed everything", (void *)rxq);
1890 * Free RX queue elements with scattered packets support.
1893 * Pointer to RX queue structure.
1896 rxq_free_elts_sp(struct rxq *rxq)
1899 unsigned int elts_n = rxq->elts_n;
1900 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
1902 DEBUG("%p: freeing WRs", (void *)rxq);
1904 rxq->elts.sp = NULL;
1907 for (i = 0; (i != elemof(*elts)); ++i) {
1909 struct rxq_elt_sp *elt = &(*elts)[i];
1911 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1912 struct rte_mbuf *buf = elt->bufs[j];
1915 rte_pktmbuf_free_seg(buf);
1922 * Allocate RX queue elements.
1925 * Pointer to RX queue structure.
1927 * Number of elements to allocate.
1929 * If not NULL, fetch buffers from this array instead of allocating them
1930 * with rte_pktmbuf_alloc().
1933 * 0 on success, errno value on failure.
1936 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
1939 struct rxq_elt (*elts)[elts_n] =
1940 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1945 ERROR("%p: can't allocate packets array", (void *)rxq);
1949 /* For each WR (packet). */
1950 for (i = 0; (i != elts_n); ++i) {
1951 struct rxq_elt *elt = &(*elts)[i];
1952 struct ibv_recv_wr *wr = &elt->wr;
1953 struct ibv_sge *sge = &(*elts)[i].sge;
1954 struct rte_mbuf *buf;
1958 assert(buf != NULL);
1959 rte_pktmbuf_reset(buf);
1961 buf = rte_pktmbuf_alloc(rxq->mp);
1963 assert(pool == NULL);
1964 ERROR("%p: empty mbuf pool", (void *)rxq);
1968 /* Configure WR. Work request ID contains its own index in
1969 * the elts array and the offset between SGE buffer header and
1971 WR_ID(wr->wr_id).id = i;
1972 WR_ID(wr->wr_id).offset =
1973 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
1975 wr->next = &(*elts)[(i + 1)].wr;
1978 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1979 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1980 /* Buffer is supposed to be empty. */
1981 assert(rte_pktmbuf_data_len(buf) == 0);
1982 assert(rte_pktmbuf_pkt_len(buf) == 0);
1983 /* sge->addr must be able to store a pointer. */
1984 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1985 /* SGE keeps its headroom. */
1986 sge->addr = (uintptr_t)
1987 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
1988 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
1989 sge->lkey = rxq->mr->lkey;
1990 /* Redundant check for tailroom. */
1991 assert(sge->length == rte_pktmbuf_tailroom(buf));
1992 /* Make sure elts index and SGE mbuf pointer can be deduced
1994 if ((WR_ID(wr->wr_id).id != i) ||
1995 ((void *)((uintptr_t)sge->addr -
1996 WR_ID(wr->wr_id).offset) != buf)) {
1997 ERROR("%p: cannot store index and offset in WR ID",
2000 rte_pktmbuf_free(buf);
2005 /* The last WR pointer must be NULL. */
2006 (*elts)[(i - 1)].wr.next = NULL;
2007 DEBUG("%p: allocated and configured %u single-segment WRs",
2008 (void *)rxq, elts_n);
2009 rxq->elts_n = elts_n;
2011 rxq->elts.no_sp = elts;
2016 assert(pool == NULL);
2017 for (i = 0; (i != elemof(*elts)); ++i) {
2018 struct rxq_elt *elt = &(*elts)[i];
2019 struct rte_mbuf *buf;
2021 if (elt->sge.addr == 0)
2023 assert(WR_ID(elt->wr.wr_id).id == i);
2024 buf = (void *)((uintptr_t)elt->sge.addr -
2025 WR_ID(elt->wr.wr_id).offset);
2026 rte_pktmbuf_free_seg(buf);
2030 DEBUG("%p: failed, freed everything", (void *)rxq);
2036 * Free RX queue elements.
2039 * Pointer to RX queue structure.
2042 rxq_free_elts(struct rxq *rxq)
2045 unsigned int elts_n = rxq->elts_n;
2046 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2048 DEBUG("%p: freeing WRs", (void *)rxq);
2050 rxq->elts.no_sp = NULL;
2053 for (i = 0; (i != elemof(*elts)); ++i) {
2054 struct rxq_elt *elt = &(*elts)[i];
2055 struct rte_mbuf *buf;
2057 if (elt->sge.addr == 0)
2059 assert(WR_ID(elt->wr.wr_id).id == i);
2060 buf = (void *)((uintptr_t)elt->sge.addr -
2061 WR_ID(elt->wr.wr_id).offset);
2062 rte_pktmbuf_free_seg(buf);
2068 * Unregister a MAC address from a Rx queue.
2071 * Pointer to RX queue structure.
2074 rxq_mac_addr_del(struct rxq *rxq)
2077 struct priv *priv = rxq->priv;
2078 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2079 (const uint8_t (*)[ETHER_ADDR_LEN])
2080 priv->mac.addr_bytes;
2084 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x",
2086 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
2087 claim_zero(ibv_destroy_flow(rxq->mac_flow));
2088 rxq->mac_flow = NULL;
2092 * Register a MAC address in a Rx queue.
2095 * Pointer to RX queue structure.
2098 * 0 on success, errno value on failure.
2101 rxq_mac_addr_add(struct rxq *rxq)
2103 struct ibv_flow *flow;
2104 struct priv *priv = rxq->priv;
2105 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2106 (const uint8_t (*)[ETHER_ADDR_LEN])
2107 priv->mac.addr_bytes;
2109 /* Allocate flow specification on the stack. */
2110 struct __attribute__((packed)) {
2111 struct ibv_flow_attr attr;
2112 struct ibv_flow_spec_eth spec;
2114 struct ibv_flow_attr *attr = &data.attr;
2115 struct ibv_flow_spec_eth *spec = &data.spec;
2118 rxq_mac_addr_del(rxq);
2120 * No padding must be inserted by the compiler between attr and spec.
2121 * This layout is expected by libibverbs.
2123 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2124 *attr = (struct ibv_flow_attr){
2125 .type = IBV_FLOW_ATTR_NORMAL,
2131 *spec = (struct ibv_flow_spec_eth){
2132 .type = IBV_FLOW_SPEC_ETH,
2133 .size = sizeof(*spec),
2136 (*mac)[0], (*mac)[1], (*mac)[2],
2137 (*mac)[3], (*mac)[4], (*mac)[5]
2141 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2144 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x",
2146 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
2147 /* Create related flow. */
2149 flow = ibv_create_flow(rxq->qp, attr);
2151 /* It's not clear whether errno is always set in this case. */
2152 ERROR("%p: flow configuration failed, errno=%d: %s",
2154 (errno ? strerror(errno) : "Unknown error"));
2159 assert(rxq->mac_flow == NULL);
2160 rxq->mac_flow = flow;
2165 * Register a MAC address.
2167 * In RSS mode, the MAC address is registered in the parent queue,
2168 * otherwise it is registered in each queue directly.
2171 * Pointer to private structure.
2173 * MAC address to register.
2176 * 0 on success, errno value on failure.
2179 priv_mac_addr_add(struct priv *priv, const uint8_t (*mac)[ETHER_ADDR_LEN])
2184 priv->mac = (struct ether_addr){
2186 (*mac)[0], (*mac)[1], (*mac)[2],
2187 (*mac)[3], (*mac)[4], (*mac)[5]
2190 /* If device isn't started, this is all we need to do. */
2191 if (!priv->started) {
2195 ret = rxq_mac_addr_add(LIST_FIRST(&priv->parents));
2200 for (i = 0; (i != priv->rxqs_n); ++i) {
2201 if ((*priv->rxqs)[i] == NULL)
2203 ret = rxq_mac_addr_add((*priv->rxqs)[i]);
2206 /* Failure, rollback. */
2208 if ((*priv->rxqs)[(--i)] != NULL)
2209 rxq_mac_addr_del((*priv->rxqs)[i]);
2217 * Clean up a RX queue.
2219 * Destroy objects, free allocated memory and reset the structure for reuse.
2222 * Pointer to RX queue structure.
2225 rxq_cleanup(struct rxq *rxq)
2227 struct ibv_exp_release_intf_params params;
2229 DEBUG("cleaning up %p", (void *)rxq);
2231 rxq_free_elts_sp(rxq);
2234 if (rxq->if_qp != NULL) {
2235 assert(rxq->priv != NULL);
2236 assert(rxq->priv->ctx != NULL);
2237 assert(rxq->qp != NULL);
2238 params = (struct ibv_exp_release_intf_params){
2241 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2245 if (rxq->if_cq != NULL) {
2246 assert(rxq->priv != NULL);
2247 assert(rxq->priv->ctx != NULL);
2248 assert(rxq->cq != NULL);
2249 params = (struct ibv_exp_release_intf_params){
2252 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2256 if (rxq->qp != NULL && !rxq->priv->isolated) {
2257 rxq_mac_addr_del(rxq);
2259 if (rxq->qp != NULL)
2260 claim_zero(ibv_destroy_qp(rxq->qp));
2261 if (rxq->cq != NULL)
2262 claim_zero(ibv_destroy_cq(rxq->cq));
2263 if (rxq->channel != NULL)
2264 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2265 if (rxq->rd != NULL) {
2266 struct ibv_exp_destroy_res_domain_attr attr = {
2270 assert(rxq->priv != NULL);
2271 assert(rxq->priv->ctx != NULL);
2272 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2276 if (rxq->mr != NULL)
2277 claim_zero(ibv_dereg_mr(rxq->mr));
2278 memset(rxq, 0, sizeof(*rxq));
2282 * Translate RX completion flags to packet type.
2285 * RX completion flags returned by poll_length_flags().
2287 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2290 * Packet type for struct rte_mbuf.
2292 static inline uint32_t
2293 rxq_cq_to_pkt_type(uint32_t flags)
2297 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2300 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2301 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2303 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2304 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2306 IBV_EXP_CQ_RX_IPV4_PACKET,
2307 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2309 IBV_EXP_CQ_RX_IPV6_PACKET,
2310 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2314 IBV_EXP_CQ_RX_IPV4_PACKET,
2315 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2317 IBV_EXP_CQ_RX_IPV6_PACKET,
2318 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2323 * Translate RX completion flags to offload flags.
2326 * Pointer to RX queue structure.
2328 * RX completion flags returned by poll_length_flags().
2331 * Offload flags (ol_flags) for struct rte_mbuf.
2333 static inline uint32_t
2334 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2336 uint32_t ol_flags = 0;
2341 IBV_EXP_CQ_RX_IP_CSUM_OK,
2342 PKT_RX_IP_CKSUM_GOOD) |
2344 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2345 PKT_RX_L4_CKSUM_GOOD);
2346 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2349 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2350 PKT_RX_IP_CKSUM_GOOD) |
2352 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2353 PKT_RX_L4_CKSUM_GOOD);
2358 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2361 * DPDK callback for RX with scattered packets support.
2364 * Generic pointer to RX queue structure.
2366 * Array to store received packets.
2368 * Maximum number of packets in array.
2371 * Number of packets successfully received (<= pkts_n).
2374 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2376 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2377 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2378 const unsigned int elts_n = rxq->elts_n;
2379 unsigned int elts_head = rxq->elts_head;
2380 struct ibv_recv_wr head;
2381 struct ibv_recv_wr **next = &head.next;
2382 struct ibv_recv_wr *bad_wr;
2384 unsigned int pkts_ret = 0;
2387 if (unlikely(!rxq->sp))
2388 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2389 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2391 for (i = 0; (i != pkts_n); ++i) {
2392 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2393 struct ibv_recv_wr *wr = &elt->wr;
2394 uint64_t wr_id = wr->wr_id;
2396 unsigned int pkt_buf_len;
2397 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2398 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2399 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2403 /* Sanity checks. */
2407 assert(wr_id < rxq->elts_n);
2408 assert(wr->sg_list == elt->sges);
2409 assert(wr->num_sge == elemof(elt->sges));
2410 assert(elts_head < rxq->elts_n);
2411 assert(rxq->elts_head < rxq->elts_n);
2412 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2414 if (unlikely(ret < 0)) {
2418 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2420 /* ibv_poll_cq() must be used in case of failure. */
2421 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2422 if (unlikely(wcs_n == 0))
2424 if (unlikely(wcs_n < 0)) {
2425 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2426 (void *)rxq, wcs_n);
2430 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2431 /* Whatever, just repost the offending WR. */
2432 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2433 " completion status (%d): %s",
2434 (void *)rxq, wc.wr_id, wc.status,
2435 ibv_wc_status_str(wc.status));
2436 /* Increment dropped packets counter. */
2437 ++rxq->stats.idropped;
2438 /* Link completed WRs together for repost. */
2449 /* Link completed WRs together for repost. */
2453 * Replace spent segments with new ones, concatenate and
2454 * return them as pkt_buf.
2457 struct ibv_sge *sge = &elt->sges[j];
2458 struct rte_mbuf *seg = elt->bufs[j];
2459 struct rte_mbuf *rep;
2460 unsigned int seg_tailroom;
2463 * Fetch initial bytes of packet descriptor into a
2464 * cacheline while allocating rep.
2467 rep = rte_mbuf_raw_alloc(rxq->mp);
2468 if (unlikely(rep == NULL)) {
2470 * Unable to allocate a replacement mbuf,
2473 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2474 " can't allocate a new mbuf",
2475 (void *)rxq, wr_id);
2476 if (pkt_buf != NULL) {
2477 *pkt_buf_next = NULL;
2478 rte_pktmbuf_free(pkt_buf);
2480 /* Increase out of memory counters. */
2481 ++rxq->stats.rx_nombuf;
2482 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2486 /* Poison user-modifiable fields in rep. */
2487 NEXT(rep) = (void *)((uintptr_t)-1);
2488 SET_DATA_OFF(rep, 0xdead);
2489 DATA_LEN(rep) = 0xd00d;
2490 PKT_LEN(rep) = 0xdeadd00d;
2491 NB_SEGS(rep) = 0x2a;
2495 * Clear special flags in mbuf to avoid
2496 * crashing while freeing.
2499 ~(uint64_t)(IND_ATTACHED_MBUF |
2502 assert(rep->buf_len == seg->buf_len);
2503 /* Reconfigure sge to use rep instead of seg. */
2504 assert(sge->lkey == rxq->mr->lkey);
2505 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2508 /* Update pkt_buf if it's the first segment, or link
2509 * seg to the previous one and update pkt_buf_next. */
2510 *pkt_buf_next = seg;
2511 pkt_buf_next = &NEXT(seg);
2512 /* Update seg information. */
2513 seg_tailroom = (seg->buf_len - seg_headroom);
2514 assert(sge->length == seg_tailroom);
2515 SET_DATA_OFF(seg, seg_headroom);
2516 if (likely(len <= seg_tailroom)) {
2518 DATA_LEN(seg) = len;
2521 assert(rte_pktmbuf_headroom(seg) ==
2523 assert(rte_pktmbuf_tailroom(seg) ==
2524 (seg_tailroom - len));
2527 DATA_LEN(seg) = seg_tailroom;
2528 PKT_LEN(seg) = seg_tailroom;
2530 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
2531 assert(rte_pktmbuf_tailroom(seg) == 0);
2532 /* Fix len and clear headroom for next segments. */
2533 len -= seg_tailroom;
2536 /* Update head and tail segments. */
2537 *pkt_buf_next = NULL;
2538 assert(pkt_buf != NULL);
2540 NB_SEGS(pkt_buf) = j;
2541 PORT(pkt_buf) = rxq->port_id;
2542 PKT_LEN(pkt_buf) = pkt_buf_len;
2543 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
2544 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2546 /* Return packet. */
2547 *(pkts++) = pkt_buf;
2549 /* Increase bytes counter. */
2550 rxq->stats.ibytes += pkt_buf_len;
2552 if (++elts_head >= elts_n)
2556 if (unlikely(i == 0))
2560 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
2561 if (unlikely(ret)) {
2562 /* Inability to repost WRs is fatal. */
2563 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
2569 rxq->elts_head = elts_head;
2570 /* Increase packets counter. */
2571 rxq->stats.ipackets += pkts_ret;
2576 * DPDK callback for RX.
2578 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
2579 * manage scattered packets. Improves performance when MRU is lower than the
2580 * size of the first segment.
2583 * Generic pointer to RX queue structure.
2585 * Array to store received packets.
2587 * Maximum number of packets in array.
2590 * Number of packets successfully received (<= pkts_n).
2593 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2595 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2596 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2597 const unsigned int elts_n = rxq->elts_n;
2598 unsigned int elts_head = rxq->elts_head;
2599 struct ibv_sge sges[pkts_n];
2601 unsigned int pkts_ret = 0;
2604 if (unlikely(rxq->sp))
2605 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
2606 for (i = 0; (i != pkts_n); ++i) {
2607 struct rxq_elt *elt = &(*elts)[elts_head];
2608 struct ibv_recv_wr *wr = &elt->wr;
2609 uint64_t wr_id = wr->wr_id;
2611 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
2612 WR_ID(wr_id).offset);
2613 struct rte_mbuf *rep;
2616 /* Sanity checks. */
2617 assert(WR_ID(wr_id).id < rxq->elts_n);
2618 assert(wr->sg_list == &elt->sge);
2619 assert(wr->num_sge == 1);
2620 assert(elts_head < rxq->elts_n);
2621 assert(rxq->elts_head < rxq->elts_n);
2623 * Fetch initial bytes of packet descriptor into a
2624 * cacheline while allocating rep.
2626 rte_mbuf_prefetch_part1(seg);
2627 rte_mbuf_prefetch_part2(seg);
2628 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2630 if (unlikely(ret < 0)) {
2634 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2636 /* ibv_poll_cq() must be used in case of failure. */
2637 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2638 if (unlikely(wcs_n == 0))
2640 if (unlikely(wcs_n < 0)) {
2641 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2642 (void *)rxq, wcs_n);
2646 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2647 /* Whatever, just repost the offending WR. */
2648 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2649 " completion status (%d): %s",
2650 (void *)rxq, wc.wr_id, wc.status,
2651 ibv_wc_status_str(wc.status));
2652 /* Increment dropped packets counter. */
2653 ++rxq->stats.idropped;
2654 /* Add SGE to array for repost. */
2663 rep = rte_mbuf_raw_alloc(rxq->mp);
2664 if (unlikely(rep == NULL)) {
2666 * Unable to allocate a replacement mbuf,
2669 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
2670 " can't allocate a new mbuf",
2671 (void *)rxq, WR_ID(wr_id).id);
2672 /* Increase out of memory counters. */
2673 ++rxq->stats.rx_nombuf;
2674 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2675 /* Add SGE to array for repost. */
2680 /* Reconfigure sge to use rep instead of seg. */
2681 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
2682 assert(elt->sge.lkey == rxq->mr->lkey);
2683 WR_ID(wr->wr_id).offset =
2684 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
2686 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
2688 /* Add SGE to array for repost. */
2691 /* Update seg information. */
2692 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
2694 PORT(seg) = rxq->port_id;
2697 DATA_LEN(seg) = len;
2698 seg->packet_type = rxq_cq_to_pkt_type(flags);
2699 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2701 /* Return packet. */
2704 /* Increase bytes counter. */
2705 rxq->stats.ibytes += len;
2707 if (++elts_head >= elts_n)
2711 if (unlikely(i == 0))
2714 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
2715 if (unlikely(ret)) {
2716 /* Inability to repost WRs is fatal. */
2717 DEBUG("%p: recv_burst(): failed (ret=%d)",
2722 rxq->elts_head = elts_head;
2723 /* Increase packets counter. */
2724 rxq->stats.ipackets += pkts_ret;
2729 * Allocate a Queue Pair.
2730 * Optionally setup inline receive if supported.
2733 * Pointer to private structure.
2735 * Completion queue to associate with QP.
2737 * Number of descriptors in QP (hint only).
2740 * QP pointer or NULL in case of error.
2742 static struct ibv_qp *
2743 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2744 struct ibv_exp_res_domain *rd)
2746 struct ibv_exp_qp_init_attr attr = {
2747 /* CQ to be associated with the send queue. */
2749 /* CQ to be associated with the receive queue. */
2752 /* Max number of outstanding WRs. */
2753 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
2754 priv->device_attr.max_qp_wr :
2756 /* Max number of scatter/gather elements in a WR. */
2757 .max_recv_sge = ((priv->device_attr.max_sge <
2758 MLX4_PMD_SGE_WR_N) ?
2759 priv->device_attr.max_sge :
2762 .qp_type = IBV_QPT_RAW_PACKET,
2763 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
2764 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
2769 attr.max_inl_recv = priv->inl_recv_size;
2770 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
2771 return ibv_exp_create_qp(priv->ctx, &attr);
2775 * Allocate a RSS Queue Pair.
2776 * Optionally setup inline receive if supported.
2779 * Pointer to private structure.
2781 * Completion queue to associate with QP.
2783 * Number of descriptors in QP (hint only).
2785 * If nonzero, a number of children for parent QP and zero for a child.
2787 * Pointer for a parent in a child case, NULL otherwise.
2790 * QP pointer or NULL in case of error.
2792 static struct ibv_qp *
2793 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2794 int children_n, struct ibv_exp_res_domain *rd,
2795 struct rxq *rxq_parent)
2797 struct ibv_exp_qp_init_attr attr = {
2798 /* CQ to be associated with the send queue. */
2800 /* CQ to be associated with the receive queue. */
2803 /* Max number of outstanding WRs. */
2804 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
2805 priv->device_attr.max_qp_wr :
2807 /* Max number of scatter/gather elements in a WR. */
2808 .max_recv_sge = ((priv->device_attr.max_sge <
2809 MLX4_PMD_SGE_WR_N) ?
2810 priv->device_attr.max_sge :
2813 .qp_type = IBV_QPT_RAW_PACKET,
2814 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
2815 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
2816 IBV_EXP_QP_INIT_ATTR_QPG),
2821 attr.max_inl_recv = priv->inl_recv_size,
2822 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
2823 if (children_n > 0) {
2824 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
2825 /* TSS isn't necessary. */
2826 attr.qpg.parent_attrib.tss_child_count = 0;
2827 attr.qpg.parent_attrib.rss_child_count =
2828 rte_align32pow2(children_n + 1) >> 1;
2829 DEBUG("initializing parent RSS queue");
2831 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
2832 attr.qpg.qpg_parent = rxq_parent->qp;
2833 DEBUG("initializing child RSS queue");
2835 return ibv_exp_create_qp(priv->ctx, &attr);
2839 * Reconfigure a RX queue with new parameters.
2841 * rxq_rehash() does not allocate mbufs, which, if not done from the right
2842 * thread (such as a control thread), may corrupt the pool.
2843 * In case of failure, the queue is left untouched.
2846 * Pointer to Ethernet device structure.
2851 * 0 on success, errno value on failure.
2854 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
2856 struct priv *priv = rxq->priv;
2857 struct rxq tmpl = *rxq;
2858 unsigned int mbuf_n;
2859 unsigned int desc_n;
2860 struct rte_mbuf **pool;
2862 struct ibv_exp_qp_attr mod;
2863 struct ibv_recv_wr *bad_wr;
2864 unsigned int mb_len;
2867 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
2868 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
2869 /* Number of descriptors and mbufs currently allocated. */
2870 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
2872 /* Toggle RX checksum offload if hardware supports it. */
2873 if (priv->hw_csum) {
2874 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
2875 rxq->csum = tmpl.csum;
2877 if (priv->hw_csum_l2tun) {
2878 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
2879 rxq->csum_l2tun = tmpl.csum_l2tun;
2881 /* Enable scattered packets support for this queue if necessary. */
2882 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
2883 if (dev->data->dev_conf.rxmode.enable_scatter &&
2884 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
2885 (mb_len - RTE_PKTMBUF_HEADROOM))) {
2887 desc_n /= MLX4_PMD_SGE_WR_N;
2890 DEBUG("%p: %s scattered packets support (%u WRs)",
2891 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
2892 /* If scatter mode is the same as before, nothing to do. */
2893 if (tmpl.sp == rxq->sp) {
2894 DEBUG("%p: nothing to do", (void *)dev);
2897 /* Remove attached flows if RSS is disabled (no parent queue). */
2898 if (!priv->rss && !priv->isolated) {
2899 rxq_mac_addr_del(&tmpl);
2900 /* Update original queue in case of failure. */
2901 rxq->mac_flow = NULL;
2903 /* From now on, any failure will render the queue unusable.
2904 * Reinitialize QP. */
2907 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
2908 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
2910 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
2914 mod = (struct ibv_exp_qp_attr){
2915 /* Move the QP to this state. */
2916 .qp_state = IBV_QPS_INIT,
2917 /* Primary port number. */
2918 .port_num = priv->port
2920 err = ibv_exp_modify_qp(tmpl.qp, &mod,
2924 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
2925 (void *)dev, strerror(err));
2930 err = ibv_resize_cq(tmpl.cq, desc_n);
2932 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
2936 /* Reconfigure flows. Do not care for errors. */
2937 if (!priv->rss && !priv->isolated) {
2938 rxq_mac_addr_add(&tmpl);
2939 /* Update original queue in case of failure. */
2940 rxq->mac_flow = NULL;
2942 /* Allocate pool. */
2943 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
2945 ERROR("%p: cannot allocate memory", (void *)dev);
2948 /* Snatch mbufs from original queue. */
2951 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2953 for (i = 0; (i != elemof(*elts)); ++i) {
2954 struct rxq_elt_sp *elt = &(*elts)[i];
2957 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2958 assert(elt->bufs[j] != NULL);
2959 pool[k++] = elt->bufs[j];
2963 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2965 for (i = 0; (i != elemof(*elts)); ++i) {
2966 struct rxq_elt *elt = &(*elts)[i];
2967 struct rte_mbuf *buf = (void *)
2968 ((uintptr_t)elt->sge.addr -
2969 WR_ID(elt->wr.wr_id).offset);
2971 assert(WR_ID(elt->wr.wr_id).id == i);
2975 assert(k == mbuf_n);
2977 tmpl.elts.sp = NULL;
2978 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
2980 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
2981 rxq_alloc_elts(&tmpl, desc_n, pool));
2983 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
2988 assert(tmpl.elts_n == desc_n);
2989 assert(tmpl.elts.sp != NULL);
2991 /* Clean up original data. */
2993 rte_free(rxq->elts.sp);
2994 rxq->elts.sp = NULL;
2998 err = ibv_post_recv(tmpl.qp,
3000 &(*tmpl.elts.sp)[0].wr :
3001 &(*tmpl.elts.no_sp)[0].wr),
3004 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3010 mod = (struct ibv_exp_qp_attr){
3011 .qp_state = IBV_QPS_RTR
3013 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3015 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3016 (void *)dev, strerror(err));
3024 * Create verbs QP resources associated with a rxq.
3027 * Pointer to RX queue structure.
3029 * Number of descriptors to configure in queue.
3031 * If true, the queue is disabled because its index is higher or
3032 * equal to the real number of queues, which must be a power of 2.
3034 * The number of children in a parent case, zero for a child.
3036 * The pointer to a parent RX structure for a child in RSS case,
3040 * 0 on success, errno value on failure.
3043 rxq_create_qp(struct rxq *rxq,
3047 struct rxq *rxq_parent)
3050 struct ibv_exp_qp_attr mod;
3051 struct ibv_exp_query_intf_params params;
3052 enum ibv_exp_query_intf_status status;
3053 struct ibv_recv_wr *bad_wr;
3054 int parent = (children_n > 0);
3055 struct priv *priv = rxq->priv;
3057 if (priv->rss && !inactive && (rxq_parent || parent))
3058 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3059 children_n, rxq->rd,
3062 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3063 if (rxq->qp == NULL) {
3064 ret = (errno ? errno : EINVAL);
3065 ERROR("QP creation failure: %s",
3069 mod = (struct ibv_exp_qp_attr){
3070 /* Move the QP to this state. */
3071 .qp_state = IBV_QPS_INIT,
3072 /* Primary port number. */
3073 .port_num = priv->port
3075 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3077 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3080 ERROR("QP state to IBV_QPS_INIT failed: %s",
3084 if (!priv->isolated && (parent || !priv->rss)) {
3085 /* Configure MAC and broadcast addresses. */
3086 ret = rxq_mac_addr_add(rxq);
3088 ERROR("QP flow attachment failed: %s",
3094 ret = ibv_post_recv(rxq->qp,
3096 &(*rxq->elts.sp)[0].wr :
3097 &(*rxq->elts.no_sp)[0].wr),
3100 ERROR("ibv_post_recv() failed for WR %p: %s",
3106 mod = (struct ibv_exp_qp_attr){
3107 .qp_state = IBV_QPS_RTR
3109 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3111 ERROR("QP state to IBV_QPS_RTR failed: %s",
3115 params = (struct ibv_exp_query_intf_params){
3116 .intf_scope = IBV_EXP_INTF_GLOBAL,
3117 .intf = IBV_EXP_INTF_QP_BURST,
3120 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3121 if (rxq->if_qp == NULL) {
3122 ERROR("QP interface family query failed with status %d",
3130 * Configure a RX queue.
3133 * Pointer to Ethernet device structure.
3135 * Pointer to RX queue structure.
3137 * Number of descriptors to configure in queue.
3139 * NUMA socket on which memory must be allocated.
3141 * If true, the queue is disabled because its index is higher or
3142 * equal to the real number of queues, which must be a power of 2.
3144 * Thresholds parameters.
3146 * Memory pool for buffer allocations.
3148 * The number of children in a parent case, zero for a child.
3150 * The pointer to a parent RX structure (or NULL) in a child case,
3154 * 0 on success, errno value on failure.
3157 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3158 unsigned int socket, int inactive,
3159 const struct rte_eth_rxconf *conf,
3160 struct rte_mempool *mp, int children_n,
3161 struct rxq *rxq_parent)
3163 struct priv *priv = dev->data->dev_private;
3170 struct ibv_exp_query_intf_params params;
3171 struct ibv_exp_cq_init_attr cq;
3172 struct ibv_exp_res_domain_init_attr rd;
3174 enum ibv_exp_query_intf_status status;
3175 unsigned int mb_len;
3177 int parent = (children_n > 0);
3179 (void)conf; /* Thresholds configuration (ignored). */
3181 * If this is a parent queue, hardware must support RSS and
3182 * RSS must be enabled.
3184 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3186 /* Even if unused, ibv_create_cq() requires at least one
3191 mb_len = rte_pktmbuf_data_room_size(mp);
3192 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3193 ERROR("%p: invalid number of RX descriptors (must be a"
3194 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3197 /* Toggle RX checksum offload if hardware supports it. */
3199 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3200 if (priv->hw_csum_l2tun)
3201 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3202 /* Enable scattered packets support for this queue if necessary. */
3203 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3204 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3205 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3207 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3209 desc /= MLX4_PMD_SGE_WR_N;
3211 WARN("%p: the requested maximum Rx packet size (%u) is"
3212 " larger than a single mbuf (%u) and scattered"
3213 " mode has not been requested",
3215 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3216 mb_len - RTE_PKTMBUF_HEADROOM);
3218 DEBUG("%p: %s scattered packets support (%u WRs)",
3219 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3220 /* Use the entire RX mempool as the memory region. */
3221 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3222 if (tmpl.mr == NULL) {
3224 ERROR("%p: MR creation failure: %s",
3225 (void *)dev, strerror(ret));
3229 attr.rd = (struct ibv_exp_res_domain_init_attr){
3230 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3231 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3232 .thread_model = IBV_EXP_THREAD_SINGLE,
3233 .msg_model = IBV_EXP_MSG_HIGH_BW,
3235 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3236 if (tmpl.rd == NULL) {
3238 ERROR("%p: RD creation failure: %s",
3239 (void *)dev, strerror(ret));
3242 if (dev->data->dev_conf.intr_conf.rxq) {
3243 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3244 if (tmpl.channel == NULL) {
3246 ERROR("%p: Rx interrupt completion channel creation"
3248 (void *)dev, strerror(ret));
3252 attr.cq = (struct ibv_exp_cq_init_attr){
3253 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3254 .res_domain = tmpl.rd,
3256 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3258 if (tmpl.cq == NULL) {
3260 ERROR("%p: CQ creation failure: %s",
3261 (void *)dev, strerror(ret));
3264 DEBUG("priv->device_attr.max_qp_wr is %d",
3265 priv->device_attr.max_qp_wr);
3266 DEBUG("priv->device_attr.max_sge is %d",
3267 priv->device_attr.max_sge);
3268 /* Allocate descriptors for RX queues, except for the RSS parent. */
3272 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3274 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3276 ERROR("%p: RXQ allocation failed: %s",
3277 (void *)dev, strerror(ret));
3281 if (parent || rxq_parent || !priv->rss) {
3282 ret = rxq_create_qp(&tmpl, desc, inactive,
3283 children_n, rxq_parent);
3288 tmpl.port_id = dev->data->port_id;
3289 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3290 attr.params = (struct ibv_exp_query_intf_params){
3291 .intf_scope = IBV_EXP_INTF_GLOBAL,
3292 .intf = IBV_EXP_INTF_CQ,
3295 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3296 if (tmpl.if_cq == NULL) {
3298 ERROR("%p: CQ interface family query failed with status %d",
3299 (void *)dev, status);
3302 /* Clean up rxq in case we're reinitializing it. */
3303 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3306 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3316 * DPDK callback to configure a RX queue.
3319 * Pointer to Ethernet device structure.
3323 * Number of descriptors to configure in queue.
3325 * NUMA socket on which memory must be allocated.
3327 * Thresholds parameters.
3329 * Memory pool for buffer allocations.
3332 * 0 on success, negative errno value on failure.
3335 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3336 unsigned int socket, const struct rte_eth_rxconf *conf,
3337 struct rte_mempool *mp)
3340 struct priv *priv = dev->data->dev_private;
3341 struct rxq *rxq = (*priv->rxqs)[idx];
3346 DEBUG("%p: configuring queue %u for %u descriptors",
3347 (void *)dev, idx, desc);
3348 if (idx >= priv->rxqs_n) {
3349 ERROR("%p: queue index out of range (%u >= %u)",
3350 (void *)dev, idx, priv->rxqs_n);
3355 DEBUG("%p: reusing already allocated queue index %u (%p)",
3356 (void *)dev, idx, (void *)rxq);
3357 if (priv->started) {
3361 (*priv->rxqs)[idx] = NULL;
3364 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3366 ERROR("%p: unable to allocate queue index %u",
3372 if (priv->rss && !priv->isolated) {
3373 /* The list consists of the single default one. */
3374 parent = LIST_FIRST(&priv->parents);
3375 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3380 ret = rxq_setup(dev, rxq, desc, socket,
3381 inactive, conf, mp, 0, parent);
3385 rxq->stats.idx = idx;
3386 DEBUG("%p: adding RX queue %p to list",
3387 (void *)dev, (void *)rxq);
3388 (*priv->rxqs)[idx] = rxq;
3389 /* Update receive callback. */
3391 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3393 dev->rx_pkt_burst = mlx4_rx_burst;
3400 * DPDK callback to release a RX queue.
3403 * Generic RX queue pointer.
3406 mlx4_rx_queue_release(void *dpdk_rxq)
3408 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3416 for (i = 0; (i != priv->rxqs_n); ++i)
3417 if ((*priv->rxqs)[i] == rxq) {
3418 DEBUG("%p: removing RX queue %p from list",
3419 (void *)priv->dev, (void *)rxq);
3420 (*priv->rxqs)[i] = NULL;
3429 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3432 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3435 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3438 * DPDK callback to start the device.
3440 * Simulate device start by attaching all configured flows.
3443 * Pointer to Ethernet device structure.
3446 * 0 on success, negative errno value on failure.
3449 mlx4_dev_start(struct rte_eth_dev *dev)
3451 struct priv *priv = dev->data->dev_private;
3458 if (priv->started) {
3462 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3464 if (priv->isolated) {
3467 } else if (priv->rss) {
3468 rxq = LIST_FIRST(&priv->parents);
3471 rxq = (*priv->rxqs)[0];
3474 /* Iterate only once when RSS is enabled. */
3476 /* Ignore nonexistent RX queues. */
3479 ret = rxq_mac_addr_add(rxq);
3482 WARN("%p: QP flow attachment failed: %s",
3483 (void *)dev, strerror(ret));
3485 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3486 ret = priv_dev_link_interrupt_handler_install(priv, dev);
3488 ERROR("%p: LSC handler install failed",
3492 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
3494 ERROR("%p: RMV handler install failed",
3498 ret = priv_rx_intr_vec_enable(priv);
3500 ERROR("%p: Rx interrupt vector creation failed",
3504 ret = mlx4_priv_flow_start(priv);
3506 ERROR("%p: flow start failed: %s",
3507 (void *)dev, strerror(ret));
3515 rxq = (*priv->rxqs)[i--];
3517 rxq_mac_addr_del(rxq);
3526 * DPDK callback to stop the device.
3528 * Simulate device stop by detaching all configured flows.
3531 * Pointer to Ethernet device structure.
3534 mlx4_dev_stop(struct rte_eth_dev *dev)
3536 struct priv *priv = dev->data->dev_private;
3542 if (!priv->started) {
3546 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
3548 if (priv->isolated) {
3551 } else if (priv->rss) {
3552 rxq = LIST_FIRST(&priv->parents);
3555 rxq = (*priv->rxqs)[0];
3558 mlx4_priv_flow_stop(priv);
3559 /* Iterate only once when RSS is enabled. */
3561 /* Ignore nonexistent RX queues. */
3564 rxq_mac_addr_del(rxq);
3565 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3570 * Dummy DPDK callback for TX.
3572 * This function is used to temporarily replace the real callback during
3573 * unsafe control operations on the queue, or in case of error.
3576 * Generic pointer to TX queue structure.
3578 * Packets to transmit.
3580 * Number of packets in array.
3583 * Number of packets successfully transmitted (<= pkts_n).
3586 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
3595 * Dummy DPDK callback for RX.
3597 * This function is used to temporarily replace the real callback during
3598 * unsafe control operations on the queue, or in case of error.
3601 * Generic pointer to RX queue structure.
3603 * Array to store received packets.
3605 * Maximum number of packets in array.
3608 * Number of packets successfully received (<= pkts_n).
3611 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3620 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3623 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
3624 struct rte_eth_dev *);
3627 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3630 * DPDK callback to close the device.
3632 * Destroy all queues and objects, free memory.
3635 * Pointer to Ethernet device structure.
3638 mlx4_dev_close(struct rte_eth_dev *dev)
3640 struct priv *priv = dev->data->dev_private;
3647 DEBUG("%p: closing device \"%s\"",
3649 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
3650 /* Prevent crashes when queues are still in use. This is unfortunately
3651 * still required for DPDK 1.3 because some programs (such as testpmd)
3652 * never release them before closing the device. */
3653 dev->rx_pkt_burst = removed_rx_burst;
3654 dev->tx_pkt_burst = removed_tx_burst;
3655 if (priv->rxqs != NULL) {
3656 /* XXX race condition if mlx4_rx_burst() is still running. */
3658 for (i = 0; (i != priv->rxqs_n); ++i) {
3659 tmp = (*priv->rxqs)[i];
3662 (*priv->rxqs)[i] = NULL;
3669 if (priv->txqs != NULL) {
3670 /* XXX race condition if mlx4_tx_burst() is still running. */
3672 for (i = 0; (i != priv->txqs_n); ++i) {
3673 tmp = (*priv->txqs)[i];
3676 (*priv->txqs)[i] = NULL;
3684 priv_parent_list_cleanup(priv);
3685 if (priv->pd != NULL) {
3686 assert(priv->ctx != NULL);
3687 claim_zero(ibv_dealloc_pd(priv->pd));
3688 claim_zero(ibv_close_device(priv->ctx));
3690 assert(priv->ctx == NULL);
3691 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
3692 priv_dev_link_interrupt_handler_uninstall(priv, dev);
3693 priv_rx_intr_vec_disable(priv);
3695 memset(priv, 0, sizeof(*priv));
3699 * Change the link state (UP / DOWN).
3702 * Pointer to Ethernet device private data.
3704 * Nonzero for link up, otherwise link down.
3707 * 0 on success, errno value on failure.
3710 priv_set_link(struct priv *priv, int up)
3712 struct rte_eth_dev *dev = priv->dev;
3717 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
3720 for (i = 0; i < priv->rxqs_n; i++)
3721 if ((*priv->rxqs)[i]->sp)
3723 /* Check if an sp queue exists.
3724 * Note: Some old frames might be received.
3726 if (i == priv->rxqs_n)
3727 dev->rx_pkt_burst = mlx4_rx_burst;
3729 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3730 dev->tx_pkt_burst = mlx4_tx_burst;
3732 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
3735 dev->rx_pkt_burst = removed_rx_burst;
3736 dev->tx_pkt_burst = removed_tx_burst;
3742 * DPDK callback to bring the link DOWN.
3745 * Pointer to Ethernet device structure.
3748 * 0 on success, errno value on failure.
3751 mlx4_set_link_down(struct rte_eth_dev *dev)
3753 struct priv *priv = dev->data->dev_private;
3757 err = priv_set_link(priv, 0);
3763 * DPDK callback to bring the link UP.
3766 * Pointer to Ethernet device structure.
3769 * 0 on success, errno value on failure.
3772 mlx4_set_link_up(struct rte_eth_dev *dev)
3774 struct priv *priv = dev->data->dev_private;
3778 err = priv_set_link(priv, 1);
3783 * DPDK callback to get information about the device.
3786 * Pointer to Ethernet device structure.
3788 * Info structure output buffer.
3791 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
3793 struct priv *priv = dev->data->dev_private;
3795 char ifname[IF_NAMESIZE];
3797 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
3802 /* FIXME: we should ask the device for these values. */
3803 info->min_rx_bufsize = 32;
3804 info->max_rx_pktlen = 65536;
3806 * Since we need one CQ per QP, the limit is the minimum number
3807 * between the two values.
3809 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
3810 priv->device_attr.max_qp : priv->device_attr.max_cq);
3811 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
3814 info->max_rx_queues = max;
3815 info->max_tx_queues = max;
3816 /* Last array entry is reserved for broadcast. */
3817 info->max_mac_addrs = 1;
3818 info->rx_offload_capa =
3820 (DEV_RX_OFFLOAD_IPV4_CKSUM |
3821 DEV_RX_OFFLOAD_UDP_CKSUM |
3822 DEV_RX_OFFLOAD_TCP_CKSUM) :
3824 info->tx_offload_capa =
3826 (DEV_TX_OFFLOAD_IPV4_CKSUM |
3827 DEV_TX_OFFLOAD_UDP_CKSUM |
3828 DEV_TX_OFFLOAD_TCP_CKSUM) :
3830 if (priv_get_ifname(priv, &ifname) == 0)
3831 info->if_index = if_nametoindex(ifname);
3834 ETH_LINK_SPEED_10G |
3835 ETH_LINK_SPEED_20G |
3836 ETH_LINK_SPEED_40G |
3841 static const uint32_t *
3842 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
3844 static const uint32_t ptypes[] = {
3845 /* refers to rxq_cq_to_pkt_type() */
3848 RTE_PTYPE_INNER_L3_IPV4,
3849 RTE_PTYPE_INNER_L3_IPV6,
3853 if (dev->rx_pkt_burst == mlx4_rx_burst ||
3854 dev->rx_pkt_burst == mlx4_rx_burst_sp)
3860 * DPDK callback to get device statistics.
3863 * Pointer to Ethernet device structure.
3865 * Stats structure output buffer.
3868 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
3870 struct priv *priv = dev->data->dev_private;
3871 struct rte_eth_stats tmp = {0};
3878 /* Add software counters. */
3879 for (i = 0; (i != priv->rxqs_n); ++i) {
3880 struct rxq *rxq = (*priv->rxqs)[i];
3884 idx = rxq->stats.idx;
3885 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
3886 tmp.q_ipackets[idx] += rxq->stats.ipackets;
3887 tmp.q_ibytes[idx] += rxq->stats.ibytes;
3888 tmp.q_errors[idx] += (rxq->stats.idropped +
3889 rxq->stats.rx_nombuf);
3891 tmp.ipackets += rxq->stats.ipackets;
3892 tmp.ibytes += rxq->stats.ibytes;
3893 tmp.ierrors += rxq->stats.idropped;
3894 tmp.rx_nombuf += rxq->stats.rx_nombuf;
3896 for (i = 0; (i != priv->txqs_n); ++i) {
3897 struct txq *txq = (*priv->txqs)[i];
3901 idx = txq->stats.idx;
3902 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
3903 tmp.q_opackets[idx] += txq->stats.opackets;
3904 tmp.q_obytes[idx] += txq->stats.obytes;
3905 tmp.q_errors[idx] += txq->stats.odropped;
3907 tmp.opackets += txq->stats.opackets;
3908 tmp.obytes += txq->stats.obytes;
3909 tmp.oerrors += txq->stats.odropped;
3916 * DPDK callback to clear device statistics.
3919 * Pointer to Ethernet device structure.
3922 mlx4_stats_reset(struct rte_eth_dev *dev)
3924 struct priv *priv = dev->data->dev_private;
3931 for (i = 0; (i != priv->rxqs_n); ++i) {
3932 if ((*priv->rxqs)[i] == NULL)
3934 idx = (*priv->rxqs)[i]->stats.idx;
3935 (*priv->rxqs)[i]->stats =
3936 (struct mlx4_rxq_stats){ .idx = idx };
3938 for (i = 0; (i != priv->txqs_n); ++i) {
3939 if ((*priv->txqs)[i] == NULL)
3941 idx = (*priv->txqs)[i]->stats.idx;
3942 (*priv->txqs)[i]->stats =
3943 (struct mlx4_txq_stats){ .idx = idx };
3949 * DPDK callback to retrieve physical link information.
3952 * Pointer to Ethernet device structure.
3953 * @param wait_to_complete
3954 * Wait for request completion (ignored).
3957 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
3959 const struct priv *priv = dev->data->dev_private;
3960 struct ethtool_cmd edata = {
3964 struct rte_eth_link dev_link;
3967 /* priv_lock() is not taken to allow concurrent calls. */
3971 (void)wait_to_complete;
3972 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
3973 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
3976 memset(&dev_link, 0, sizeof(dev_link));
3977 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
3978 (ifr.ifr_flags & IFF_RUNNING));
3979 ifr.ifr_data = (void *)&edata;
3980 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
3981 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
3985 link_speed = ethtool_cmd_speed(&edata);
3986 if (link_speed == -1)
3987 dev_link.link_speed = 0;
3989 dev_link.link_speed = link_speed;
3990 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
3991 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
3992 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
3993 ETH_LINK_SPEED_FIXED);
3994 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
3995 /* Link status changed. */
3996 dev->data->dev_link = dev_link;
3999 /* Link status is still the same. */
4004 * DPDK callback to change the MTU.
4006 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4007 * received). Use this as a hint to enable/disable scattered packets support
4008 * and improve performance when not needed.
4009 * Since failure is not an option, reconfiguring queues on the fly is not
4013 * Pointer to Ethernet device structure.
4018 * 0 on success, negative errno value on failure.
4021 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4023 struct priv *priv = dev->data->dev_private;
4026 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4030 /* Set kernel interface MTU first. */
4031 if (priv_set_mtu(priv, mtu)) {
4033 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4037 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4039 /* Temporarily replace RX handler with a fake one, assuming it has not
4040 * been copied elsewhere. */
4041 dev->rx_pkt_burst = removed_rx_burst;
4042 /* Make sure everyone has left mlx4_rx_burst() and uses
4043 * removed_rx_burst() instead. */
4046 /* Reconfigure each RX queue. */
4047 for (i = 0; (i != priv->rxqs_n); ++i) {
4048 struct rxq *rxq = (*priv->rxqs)[i];
4049 unsigned int max_frame_len;
4053 /* Calculate new maximum frame length according to MTU. */
4054 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4055 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4056 /* Provide new values to rxq_setup(). */
4057 dev->data->dev_conf.rxmode.jumbo_frame =
4058 (max_frame_len > ETHER_MAX_LEN);
4059 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4060 ret = rxq_rehash(dev, rxq);
4062 /* Force SP RX if that queue requires it and abort. */
4064 rx_func = mlx4_rx_burst_sp;
4067 /* Reenable non-RSS queue attributes. No need to check
4068 * for errors at this stage. */
4069 if (!priv->rss && !priv->isolated) {
4070 rxq_mac_addr_add(rxq);
4072 /* Scattered burst function takes priority. */
4074 rx_func = mlx4_rx_burst_sp;
4076 /* Burst functions can now be called again. */
4078 dev->rx_pkt_burst = rx_func;
4086 * DPDK callback to get flow control status.
4089 * Pointer to Ethernet device structure.
4090 * @param[out] fc_conf
4091 * Flow control output buffer.
4094 * 0 on success, negative errno value on failure.
4097 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4099 struct priv *priv = dev->data->dev_private;
4101 struct ethtool_pauseparam ethpause = {
4102 .cmd = ETHTOOL_GPAUSEPARAM
4106 ifr.ifr_data = (void *)ðpause;
4108 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4110 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4116 fc_conf->autoneg = ethpause.autoneg;
4117 if (ethpause.rx_pause && ethpause.tx_pause)
4118 fc_conf->mode = RTE_FC_FULL;
4119 else if (ethpause.rx_pause)
4120 fc_conf->mode = RTE_FC_RX_PAUSE;
4121 else if (ethpause.tx_pause)
4122 fc_conf->mode = RTE_FC_TX_PAUSE;
4124 fc_conf->mode = RTE_FC_NONE;
4134 * DPDK callback to modify flow control parameters.
4137 * Pointer to Ethernet device structure.
4138 * @param[in] fc_conf
4139 * Flow control parameters.
4142 * 0 on success, negative errno value on failure.
4145 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4147 struct priv *priv = dev->data->dev_private;
4149 struct ethtool_pauseparam ethpause = {
4150 .cmd = ETHTOOL_SPAUSEPARAM
4154 ifr.ifr_data = (void *)ðpause;
4155 ethpause.autoneg = fc_conf->autoneg;
4156 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4157 (fc_conf->mode & RTE_FC_RX_PAUSE))
4158 ethpause.rx_pause = 1;
4160 ethpause.rx_pause = 0;
4162 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4163 (fc_conf->mode & RTE_FC_TX_PAUSE))
4164 ethpause.tx_pause = 1;
4166 ethpause.tx_pause = 0;
4169 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4171 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4184 const struct rte_flow_ops mlx4_flow_ops = {
4185 .validate = mlx4_flow_validate,
4186 .create = mlx4_flow_create,
4187 .destroy = mlx4_flow_destroy,
4188 .flush = mlx4_flow_flush,
4190 .isolate = mlx4_flow_isolate,
4194 * Manage filter operations.
4197 * Pointer to Ethernet device structure.
4198 * @param filter_type
4201 * Operation to perform.
4203 * Pointer to operation-specific structure.
4206 * 0 on success, negative errno value on failure.
4209 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
4210 enum rte_filter_type filter_type,
4211 enum rte_filter_op filter_op,
4216 switch (filter_type) {
4217 case RTE_ETH_FILTER_GENERIC:
4218 if (filter_op != RTE_ETH_FILTER_GET)
4220 *(const void **)arg = &mlx4_flow_ops;
4223 ERROR("%p: filter type (%d) not supported",
4224 (void *)dev, filter_type);
4230 static const struct eth_dev_ops mlx4_dev_ops = {
4231 .dev_configure = mlx4_dev_configure,
4232 .dev_start = mlx4_dev_start,
4233 .dev_stop = mlx4_dev_stop,
4234 .dev_set_link_down = mlx4_set_link_down,
4235 .dev_set_link_up = mlx4_set_link_up,
4236 .dev_close = mlx4_dev_close,
4237 .link_update = mlx4_link_update,
4238 .stats_get = mlx4_stats_get,
4239 .stats_reset = mlx4_stats_reset,
4240 .dev_infos_get = mlx4_dev_infos_get,
4241 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
4242 .rx_queue_setup = mlx4_rx_queue_setup,
4243 .tx_queue_setup = mlx4_tx_queue_setup,
4244 .rx_queue_release = mlx4_rx_queue_release,
4245 .tx_queue_release = mlx4_tx_queue_release,
4246 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
4247 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
4248 .mtu_set = mlx4_dev_set_mtu,
4249 .filter_ctrl = mlx4_dev_filter_ctrl,
4250 .rx_queue_intr_enable = mlx4_rx_intr_enable,
4251 .rx_queue_intr_disable = mlx4_rx_intr_disable,
4255 * Get PCI information from struct ibv_device.
4258 * Pointer to Ethernet device structure.
4259 * @param[out] pci_addr
4260 * PCI bus address output buffer.
4263 * 0 on success, -1 on failure and errno is set.
4266 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
4267 struct rte_pci_addr *pci_addr)
4271 MKSTR(path, "%s/device/uevent", device->ibdev_path);
4273 file = fopen(path, "rb");
4276 while (fgets(line, sizeof(line), file) == line) {
4277 size_t len = strlen(line);
4280 /* Truncate long lines. */
4281 if (len == (sizeof(line) - 1))
4282 while (line[(len - 1)] != '\n') {
4286 line[(len - 1)] = ret;
4288 /* Extract information. */
4291 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
4295 &pci_addr->function) == 4) {
4305 * Get MAC address by querying netdevice.
4308 * struct priv for the requested device.
4310 * MAC address output buffer.
4313 * 0 on success, -1 on failure and errno is set.
4316 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
4318 struct ifreq request;
4320 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
4322 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
4327 * Retrieve integer value from environment variable.
4330 * Environment variable name.
4333 * Integer value, 0 if the variable is not set.
4336 mlx4_getenv_int(const char *name)
4338 const char *val = getenv(name);
4346 mlx4_dev_link_status_handler(void *);
4348 mlx4_dev_interrupt_handler(void *);
4351 * Link/device status handler.
4354 * Pointer to private structure.
4356 * Pointer to the rte_eth_dev structure.
4358 * Pointer to event flags holder.
4364 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
4367 struct ibv_async_event event;
4368 int port_change = 0;
4369 struct rte_eth_link *link = &dev->data->dev_link;
4373 /* Read all message and acknowledge them. */
4375 if (ibv_get_async_event(priv->ctx, &event))
4377 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
4378 event.event_type == IBV_EVENT_PORT_ERR) &&
4379 (priv->intr_conf.lsc == 1)) {
4382 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
4383 priv->intr_conf.rmv == 1) {
4384 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
4387 DEBUG("event type %d on port %d not handled",
4388 event.event_type, event.element.port_num);
4389 ibv_ack_async_event(&event);
4393 mlx4_link_update(dev, 0);
4394 if (((link->link_speed == 0) && link->link_status) ||
4395 ((link->link_speed != 0) && !link->link_status)) {
4396 if (!priv->pending_alarm) {
4397 /* Inconsistent status, check again later. */
4398 priv->pending_alarm = 1;
4399 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
4400 mlx4_dev_link_status_handler,
4404 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
4410 * Handle delayed link status event.
4413 * Registered argument.
4416 mlx4_dev_link_status_handler(void *arg)
4418 struct rte_eth_dev *dev = arg;
4419 struct priv *priv = dev->data->dev_private;
4424 assert(priv->pending_alarm == 1);
4425 priv->pending_alarm = 0;
4426 ret = priv_dev_status_handler(priv, dev, &events);
4428 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
4429 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
4434 * Handle interrupts from the NIC.
4436 * @param[in] intr_handle
4437 * Interrupt handler.
4439 * Callback argument.
4442 mlx4_dev_interrupt_handler(void *cb_arg)
4444 struct rte_eth_dev *dev = cb_arg;
4445 struct priv *priv = dev->data->dev_private;
4451 ret = priv_dev_status_handler(priv, dev, &ev);
4454 for (i = RTE_ETH_EVENT_UNKNOWN;
4455 i < RTE_ETH_EVENT_MAX;
4457 if (ev & (1 << i)) {
4459 _rte_eth_dev_callback_process(dev, i, NULL,
4465 WARN("%d event%s not processed", ret,
4466 (ret > 1 ? "s were" : " was"));
4471 * Uninstall interrupt handler.
4474 * Pointer to private structure.
4476 * Pointer to the rte_eth_dev structure.
4478 * 0 on success, negative errno value on failure.
4481 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
4485 if (priv->intr_conf.lsc ||
4486 priv->intr_conf.rmv)
4488 ret = rte_intr_callback_unregister(&priv->intr_handle,
4489 mlx4_dev_interrupt_handler,
4492 ERROR("rte_intr_callback_unregister failed with %d"
4494 (errno ? " (errno: " : ""),
4495 (errno ? strerror(errno) : ""),
4496 (errno ? ")" : ""));
4498 priv->intr_handle.fd = 0;
4499 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
4504 * Install interrupt handler.
4507 * Pointer to private structure.
4509 * Pointer to the rte_eth_dev structure.
4511 * 0 on success, negative errno value on failure.
4514 priv_dev_interrupt_handler_install(struct priv *priv,
4515 struct rte_eth_dev *dev)
4520 /* Check whether the interrupt handler has already been installed
4521 * for either type of interrupt
4523 if (priv->intr_conf.lsc &&
4524 priv->intr_conf.rmv &&
4525 priv->intr_handle.fd)
4527 assert(priv->ctx->async_fd > 0);
4528 flags = fcntl(priv->ctx->async_fd, F_GETFL);
4529 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
4531 INFO("failed to change file descriptor async event queue");
4532 dev->data->dev_conf.intr_conf.lsc = 0;
4533 dev->data->dev_conf.intr_conf.rmv = 0;
4536 priv->intr_handle.fd = priv->ctx->async_fd;
4537 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
4538 rc = rte_intr_callback_register(&priv->intr_handle,
4539 mlx4_dev_interrupt_handler,
4542 ERROR("rte_intr_callback_register failed "
4543 " (errno: %s)", strerror(errno));
4551 * Uninstall interrupt handler.
4554 * Pointer to private structure.
4556 * Pointer to the rte_eth_dev structure.
4558 * 0 on success, negative value on error.
4561 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
4562 struct rte_eth_dev *dev)
4564 if (dev->data->dev_conf.intr_conf.rmv) {
4565 priv->intr_conf.rmv = 0;
4566 return priv_dev_interrupt_handler_uninstall(priv, dev);
4572 * Uninstall interrupt handler.
4575 * Pointer to private structure.
4577 * Pointer to the rte_eth_dev structure.
4579 * 0 on success, negative value on error,
4582 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
4583 struct rte_eth_dev *dev)
4587 if (dev->data->dev_conf.intr_conf.lsc) {
4588 priv->intr_conf.lsc = 0;
4589 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
4593 if (priv->pending_alarm)
4594 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
4596 ERROR("rte_eal_alarm_cancel failed "
4597 " (errno: %s)", strerror(rte_errno));
4600 priv->pending_alarm = 0;
4605 * Install link interrupt handler.
4608 * Pointer to private structure.
4610 * Pointer to the rte_eth_dev structure.
4612 * 0 on success, negative value on error.
4615 priv_dev_link_interrupt_handler_install(struct priv *priv,
4616 struct rte_eth_dev *dev)
4620 if (dev->data->dev_conf.intr_conf.lsc) {
4621 ret = priv_dev_interrupt_handler_install(priv, dev);
4624 priv->intr_conf.lsc = 1;
4630 * Install removal interrupt handler.
4633 * Pointer to private structure.
4635 * Pointer to the rte_eth_dev structure.
4637 * 0 on success, negative value on error.
4640 priv_dev_removal_interrupt_handler_install(struct priv *priv,
4641 struct rte_eth_dev *dev)
4645 if (dev->data->dev_conf.intr_conf.rmv) {
4646 ret = priv_dev_interrupt_handler_install(priv, dev);
4649 priv->intr_conf.rmv = 1;
4655 * Allocate queue vector and fill epoll fd list for Rx interrupts.
4658 * Pointer to private structure.
4661 * 0 on success, negative on failure.
4664 priv_rx_intr_vec_enable(struct priv *priv)
4667 unsigned int rxqs_n = priv->rxqs_n;
4668 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
4669 unsigned int count = 0;
4670 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
4672 if (!priv->dev->data->dev_conf.intr_conf.rxq)
4674 priv_rx_intr_vec_disable(priv);
4675 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
4676 if (intr_handle->intr_vec == NULL) {
4677 ERROR("failed to allocate memory for interrupt vector,"
4678 " Rx interrupts will not be supported");
4681 intr_handle->type = RTE_INTR_HANDLE_EXT;
4682 for (i = 0; i != n; ++i) {
4683 struct rxq *rxq = (*priv->rxqs)[i];
4688 /* Skip queues that cannot request interrupts. */
4689 if (!rxq || !rxq->channel) {
4690 /* Use invalid intr_vec[] index to disable entry. */
4691 intr_handle->intr_vec[i] =
4692 RTE_INTR_VEC_RXTX_OFFSET +
4693 RTE_MAX_RXTX_INTR_VEC_ID;
4696 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
4697 ERROR("too many Rx queues for interrupt vector size"
4698 " (%d), Rx interrupts cannot be enabled",
4699 RTE_MAX_RXTX_INTR_VEC_ID);
4700 priv_rx_intr_vec_disable(priv);
4703 fd = rxq->channel->fd;
4704 flags = fcntl(fd, F_GETFL);
4705 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
4707 ERROR("failed to make Rx interrupt file descriptor"
4708 " %d non-blocking for queue index %d", fd, i);
4709 priv_rx_intr_vec_disable(priv);
4712 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
4713 intr_handle->efds[count] = fd;
4717 priv_rx_intr_vec_disable(priv);
4719 intr_handle->nb_efd = count;
4724 * Clean up Rx interrupts handler.
4727 * Pointer to private structure.
4730 priv_rx_intr_vec_disable(struct priv *priv)
4732 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
4734 rte_intr_free_epoll_fd(intr_handle);
4735 free(intr_handle->intr_vec);
4736 intr_handle->nb_efd = 0;
4737 intr_handle->intr_vec = NULL;
4741 * DPDK callback for Rx queue interrupt enable.
4744 * Pointer to Ethernet device structure.
4749 * 0 on success, negative on failure.
4752 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
4754 struct priv *priv = dev->data->dev_private;
4755 struct rxq *rxq = (*priv->rxqs)[idx];
4758 if (!rxq || !rxq->channel)
4761 ret = ibv_req_notify_cq(rxq->cq, 0);
4763 WARN("unable to arm interrupt on rx queue %d", idx);
4768 * DPDK callback for Rx queue interrupt disable.
4771 * Pointer to Ethernet device structure.
4776 * 0 on success, negative on failure.
4779 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
4781 struct priv *priv = dev->data->dev_private;
4782 struct rxq *rxq = (*priv->rxqs)[idx];
4783 struct ibv_cq *ev_cq;
4787 if (!rxq || !rxq->channel) {
4790 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
4791 if (ret || ev_cq != rxq->cq)
4795 WARN("unable to disable interrupt on rx queue %d",
4798 ibv_ack_cq_events(rxq->cq, 1);
4803 * Verify and store value for device argument.
4806 * Key argument to verify.
4808 * Value associated with key.
4809 * @param[in, out] conf
4810 * Shared configuration data.
4813 * 0 on success, negative errno value on failure.
4816 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
4821 tmp = strtoul(val, NULL, 0);
4823 WARN("%s: \"%s\" is not a valid integer", key, val);
4826 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
4827 uint32_t ports = rte_log2_u32(conf->ports.present);
4830 ERROR("port index %lu outside range [0,%" PRIu32 ")",
4834 if (!(conf->ports.present & (1 << tmp))) {
4835 ERROR("invalid port index %lu", tmp);
4838 conf->ports.enabled |= 1 << tmp;
4840 WARN("%s: unknown parameter", key);
4847 * Parse device parameters.
4850 * Device arguments structure.
4853 * 0 on success, negative errno value on failure.
4856 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
4858 struct rte_kvargs *kvlist;
4859 unsigned int arg_count;
4863 if (devargs == NULL)
4865 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
4866 if (kvlist == NULL) {
4867 ERROR("failed to parse kvargs");
4870 /* Process parameters. */
4871 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
4872 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
4873 while (arg_count-- > 0) {
4874 ret = rte_kvargs_process(kvlist,
4875 MLX4_PMD_PORT_KVARG,
4876 (int (*)(const char *,
4886 rte_kvargs_free(kvlist);
4890 static struct rte_pci_driver mlx4_driver;
4893 * DPDK callback to register a PCI device.
4895 * This function creates an Ethernet device for each port of a given
4898 * @param[in] pci_drv
4899 * PCI driver structure (mlx4_driver).
4900 * @param[in] pci_dev
4901 * PCI device information.
4904 * 0 on success, negative errno value on failure.
4907 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
4909 struct ibv_device **list;
4910 struct ibv_device *ibv_dev;
4912 struct ibv_context *attr_ctx = NULL;
4913 struct ibv_device_attr device_attr;
4914 struct mlx4_conf conf = {
4921 assert(pci_drv == &mlx4_driver);
4923 list = ibv_get_device_list(&i);
4926 if (errno == ENOSYS)
4927 ERROR("cannot list devices, is ib_uverbs loaded?");
4932 * For each listed device, check related sysfs entry against
4933 * the provided PCI ID.
4936 struct rte_pci_addr pci_addr;
4939 DEBUG("checking device \"%s\"", list[i]->name);
4940 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
4942 if ((pci_dev->addr.domain != pci_addr.domain) ||
4943 (pci_dev->addr.bus != pci_addr.bus) ||
4944 (pci_dev->addr.devid != pci_addr.devid) ||
4945 (pci_dev->addr.function != pci_addr.function))
4947 vf = (pci_dev->id.device_id ==
4948 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
4949 INFO("PCI information matches, using device \"%s\" (VF: %s)",
4950 list[i]->name, (vf ? "true" : "false"));
4951 attr_ctx = ibv_open_device(list[i]);
4955 if (attr_ctx == NULL) {
4956 ibv_free_device_list(list);
4959 ERROR("cannot access device, is mlx4_ib loaded?");
4962 ERROR("cannot use device, are drivers up to date?");
4970 DEBUG("device opened");
4971 if (ibv_query_device(attr_ctx, &device_attr)) {
4975 INFO("%u port(s) detected", device_attr.phys_port_cnt);
4977 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
4978 if (mlx4_args(pci_dev->device.devargs, &conf)) {
4979 ERROR("failed to process device arguments");
4983 /* Use all ports when none are defined */
4984 if (!conf.ports.enabled)
4985 conf.ports.enabled = conf.ports.present;
4986 for (i = 0; i < device_attr.phys_port_cnt; i++) {
4987 uint32_t port = i + 1; /* ports are indexed from one */
4988 struct ibv_context *ctx = NULL;
4989 struct ibv_port_attr port_attr;
4990 struct ibv_pd *pd = NULL;
4991 struct priv *priv = NULL;
4992 struct rte_eth_dev *eth_dev = NULL;
4993 struct ibv_exp_device_attr exp_device_attr;
4994 struct ether_addr mac;
4996 /* If port is not enabled, skip. */
4997 if (!(conf.ports.enabled & (1 << i)))
4999 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5000 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5002 DEBUG("using port %u", port);
5004 ctx = ibv_open_device(ibv_dev);
5010 /* Check port status. */
5011 err = ibv_query_port(ctx, port, &port_attr);
5013 ERROR("port query failed: %s", strerror(err));
5018 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5019 ERROR("port %d is not configured in Ethernet mode",
5025 if (port_attr.state != IBV_PORT_ACTIVE)
5026 DEBUG("port %d is not active: \"%s\" (%d)",
5027 port, ibv_port_state_str(port_attr.state),
5030 /* Allocate protection domain. */
5031 pd = ibv_alloc_pd(ctx);
5033 ERROR("PD allocation failure");
5038 /* from rte_ethdev.c */
5039 priv = rte_zmalloc("ethdev private structure",
5041 RTE_CACHE_LINE_SIZE);
5043 ERROR("priv allocation failure");
5049 priv->device_attr = device_attr;
5052 priv->mtu = ETHER_MTU;
5053 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5054 ERROR("ibv_exp_query_device() failed");
5058 if ((exp_device_attr.exp_device_cap_flags &
5059 IBV_EXP_DEVICE_QPG) &&
5060 (exp_device_attr.exp_device_cap_flags &
5061 IBV_EXP_DEVICE_UD_RSS) &&
5062 (exp_device_attr.comp_mask &
5063 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5064 (exp_device_attr.max_rss_tbl_sz > 0)) {
5067 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5071 priv->max_rss_tbl_sz = 0;
5073 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5074 IBV_EXP_DEVICE_UD_TSS);
5075 DEBUG("device flags: %s%s%s",
5076 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5077 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5078 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5080 DEBUG("maximum RSS indirection table size: %u",
5081 exp_device_attr.max_rss_tbl_sz);
5084 ((exp_device_attr.exp_device_cap_flags &
5085 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5086 (exp_device_attr.exp_device_cap_flags &
5087 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5088 DEBUG("checksum offloading is %ssupported",
5089 (priv->hw_csum ? "" : "not "));
5091 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5092 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5093 DEBUG("L2 tunnel checksum offloads are %ssupported",
5094 (priv->hw_csum_l2tun ? "" : "not "));
5096 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5098 if (priv->inl_recv_size) {
5099 exp_device_attr.comp_mask =
5100 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5101 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5102 INFO("Couldn't query device for inline-receive"
5104 priv->inl_recv_size = 0;
5106 if ((unsigned)exp_device_attr.inline_recv_sz <
5107 priv->inl_recv_size) {
5108 INFO("Max inline-receive (%d) <"
5109 " requested inline-receive (%u)",
5110 exp_device_attr.inline_recv_sz,
5111 priv->inl_recv_size);
5112 priv->inl_recv_size =
5113 exp_device_attr.inline_recv_sz;
5116 INFO("Set inline receive size to %u",
5117 priv->inl_recv_size);
5121 /* Configure the first MAC address by default. */
5122 if (priv_get_mac(priv, &mac.addr_bytes)) {
5123 ERROR("cannot get MAC address, is mlx4_en loaded?"
5124 " (errno: %s)", strerror(errno));
5128 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5130 mac.addr_bytes[0], mac.addr_bytes[1],
5131 mac.addr_bytes[2], mac.addr_bytes[3],
5132 mac.addr_bytes[4], mac.addr_bytes[5]);
5133 /* Register MAC address. */
5134 claim_zero(priv_mac_addr_add(priv,
5135 (const uint8_t (*)[ETHER_ADDR_LEN])
5139 char ifname[IF_NAMESIZE];
5141 if (priv_get_ifname(priv, &ifname) == 0)
5142 DEBUG("port %u ifname is \"%s\"",
5143 priv->port, ifname);
5145 DEBUG("port %u ifname is unknown", priv->port);
5148 /* Get actual MTU if possible. */
5149 priv_get_mtu(priv, &priv->mtu);
5150 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5152 /* from rte_ethdev.c */
5154 char name[RTE_ETH_NAME_MAX_LEN];
5156 snprintf(name, sizeof(name), "%s port %u",
5157 ibv_get_device_name(ibv_dev), port);
5158 eth_dev = rte_eth_dev_allocate(name);
5160 if (eth_dev == NULL) {
5161 ERROR("can not allocate rte ethdev");
5166 eth_dev->data->dev_private = priv;
5167 eth_dev->data->mac_addrs = &priv->mac;
5168 eth_dev->device = &pci_dev->device;
5170 rte_eth_copy_pci_info(eth_dev, pci_dev);
5172 eth_dev->device->driver = &mlx4_driver.driver;
5175 * Copy and override interrupt handle to prevent it from
5176 * being shared between all ethdev instances of a given PCI
5177 * device. This is required to properly handle Rx interrupts
5180 priv->intr_handle_dev = *eth_dev->intr_handle;
5181 eth_dev->intr_handle = &priv->intr_handle_dev;
5183 priv->dev = eth_dev;
5184 eth_dev->dev_ops = &mlx4_dev_ops;
5185 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
5187 /* Bring Ethernet device up. */
5188 DEBUG("forcing Ethernet interface up");
5189 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5190 /* Update link status once if waiting for LSC. */
5191 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5192 mlx4_link_update(eth_dev, 0);
5198 claim_zero(ibv_dealloc_pd(pd));
5200 claim_zero(ibv_close_device(ctx));
5202 rte_eth_dev_release_port(eth_dev);
5205 if (i == device_attr.phys_port_cnt)
5209 * XXX if something went wrong in the loop above, there is a resource
5210 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5211 * long as the dpdk does not provide a way to deallocate a ethdev and a
5212 * way to enumerate the registered ethdevs to free the previous ones.
5217 claim_zero(ibv_close_device(attr_ctx));
5219 ibv_free_device_list(list);
5224 static const struct rte_pci_id mlx4_pci_id_map[] = {
5226 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5227 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5230 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5231 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5234 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5235 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5242 static struct rte_pci_driver mlx4_driver = {
5244 .name = MLX4_DRIVER_NAME
5246 .id_table = mlx4_pci_id_map,
5247 .probe = mlx4_pci_probe,
5248 .drv_flags = RTE_PCI_DRV_INTR_LSC |
5249 RTE_PCI_DRV_INTR_RMV,
5253 * Driver initialization routine.
5255 RTE_INIT(rte_mlx4_pmd_init);
5257 rte_mlx4_pmd_init(void)
5259 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5261 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5262 * huge pages. Calling ibv_fork_init() during init allows
5263 * applications to use fork() safely for purposes other than
5264 * using this PMD, which is not supported in forked processes.
5266 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5268 rte_pci_register(&mlx4_driver);
5271 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
5272 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
5273 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
5274 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");