4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
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21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 #include <sys/ioctl.h>
47 #include <sys/socket.h>
48 #include <netinet/in.h>
49 #include <linux/ethtool.h>
50 #include <linux/sockios.h>
53 #include <rte_ether.h>
54 #include <rte_ethdev.h>
55 #include <rte_ethdev_pci.h>
58 #include <rte_errno.h>
59 #include <rte_mempool.h>
60 #include <rte_prefetch.h>
61 #include <rte_malloc.h>
63 #include <rte_alarm.h>
64 #include <rte_memory.h>
66 #include <rte_kvargs.h>
67 #include <rte_interrupts.h>
68 #include <rte_branch_prediction.h>
70 /* Generated configuration header. */
71 #include "mlx4_autoconf.h"
75 #include "mlx4_flow.h"
77 /** Configuration structure for device arguments. */
80 uint32_t present; /**< Bit-field for existing ports. */
81 uint32_t enabled; /**< Bit-field for user-enabled ports. */
85 /* Available parameters list. */
86 const char *pmd_mlx4_init_params[] = {
92 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
95 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
98 priv_rx_intr_vec_enable(struct priv *priv);
101 priv_rx_intr_vec_disable(struct priv *priv);
103 /* Allocate a buffer on the stack and fill it with a printf format string. */
104 #define MKSTR(name, ...) \
105 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
107 snprintf(name, sizeof(name), __VA_ARGS__)
110 * Get interface name from private structure.
113 * Pointer to private structure.
115 * Interface name output buffer.
118 * 0 on success, negative errno value otherwise and rte_errno is set.
121 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
125 unsigned int dev_type = 0;
126 unsigned int dev_port_prev = ~0u;
127 char match[IF_NAMESIZE] = "";
130 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
138 while ((dent = readdir(dir)) != NULL) {
139 char *name = dent->d_name;
141 unsigned int dev_port;
144 if ((name[0] == '.') &&
145 ((name[1] == '\0') ||
146 ((name[1] == '.') && (name[2] == '\0'))))
149 MKSTR(path, "%s/device/net/%s/%s",
150 priv->ctx->device->ibdev_path, name,
151 (dev_type ? "dev_id" : "dev_port"));
153 file = fopen(path, "rb");
158 * Switch to dev_id when dev_port does not exist as
159 * is the case with Linux kernel versions < 3.15.
170 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
175 * Switch to dev_id when dev_port returns the same value for
176 * all ports. May happen when using a MOFED release older than
177 * 3.0 with a Linux kernel >= 3.15.
179 if (dev_port == dev_port_prev)
181 dev_port_prev = dev_port;
182 if (dev_port == (priv->port - 1u))
183 snprintf(match, sizeof(match), "%s", name);
186 if (match[0] == '\0') {
190 strncpy(*ifname, match, sizeof(*ifname));
195 * Read from sysfs entry.
198 * Pointer to private structure.
200 * Entry name relative to sysfs path.
202 * Data output buffer.
207 * Number of bytes read on success, negative errno value otherwise and
211 priv_sysfs_read(const struct priv *priv, const char *entry,
212 char *buf, size_t size)
214 char ifname[IF_NAMESIZE];
218 ret = priv_get_ifname(priv, &ifname);
222 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
225 file = fopen(path, "rb");
230 ret = fread(buf, 1, size, file);
231 if ((size_t)ret < size && ferror(file)) {
242 * Write to sysfs entry.
245 * Pointer to private structure.
247 * Entry name relative to sysfs path.
254 * Number of bytes written on success, negative errno value otherwise and
258 priv_sysfs_write(const struct priv *priv, const char *entry,
259 char *buf, size_t size)
261 char ifname[IF_NAMESIZE];
265 ret = priv_get_ifname(priv, &ifname);
269 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
272 file = fopen(path, "wb");
277 ret = fwrite(buf, 1, size, file);
278 if ((size_t)ret < size || ferror(file)) {
289 * Get unsigned long sysfs property.
292 * Pointer to private structure.
294 * Entry name relative to sysfs path.
296 * Value output buffer.
299 * 0 on success, negative errno value otherwise and rte_errno is set.
302 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
305 unsigned long value_ret;
308 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
310 DEBUG("cannot read %s value from sysfs: %s",
311 name, strerror(rte_errno));
314 value_str[ret] = '\0';
316 value_ret = strtoul(value_str, NULL, 0);
319 DEBUG("invalid %s value `%s': %s", name, value_str,
320 strerror(rte_errno));
328 * Set unsigned long sysfs property.
331 * Pointer to private structure.
333 * Entry name relative to sysfs path.
338 * 0 on success, negative errno value otherwise and rte_errno is set.
341 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
344 MKSTR(value_str, "%lu", value);
346 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
348 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
349 name, value_str, value, strerror(rte_errno));
356 * Perform ifreq ioctl() on associated Ethernet device.
359 * Pointer to private structure.
361 * Request number to pass to ioctl().
363 * Interface request structure output buffer.
366 * 0 on success, negative errno value otherwise and rte_errno is set.
369 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
371 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
378 ret = priv_get_ifname(priv, &ifr->ifr_name);
379 if (!ret && ioctl(sock, req, ifr) == -1) {
391 * Pointer to private structure.
393 * MTU value output buffer.
396 * 0 on success, negative errno value otherwise and rte_errno is set.
399 priv_get_mtu(struct priv *priv, uint16_t *mtu)
401 unsigned long ulong_mtu = 0;
402 int ret = priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu);
411 * DPDK callback to change the MTU.
414 * Pointer to Ethernet device structure.
419 * 0 on success, negative errno value otherwise and rte_errno is set.
422 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
424 struct priv *priv = dev->data->dev_private;
426 int ret = priv_set_sysfs_ulong(priv, "mtu", mtu);
430 ret = priv_get_mtu(priv, &new_mtu);
433 if (new_mtu == mtu) {
445 * Pointer to private structure.
447 * Bitmask for flags that must remain untouched.
449 * Bitmask for flags to modify.
452 * 0 on success, negative errno value otherwise and rte_errno is set.
455 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
457 unsigned long tmp = 0;
458 int ret = priv_get_sysfs_ulong(priv, "flags", &tmp);
463 tmp |= (flags & (~keep));
464 return priv_set_sysfs_ulong(priv, "flags", tmp);
467 /* Device configuration. */
470 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
471 unsigned int socket, const struct rte_eth_txconf *conf);
474 txq_cleanup(struct txq *txq);
477 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
478 unsigned int socket, const struct rte_eth_rxconf *conf,
479 struct rte_mempool *mp);
482 rxq_cleanup(struct rxq *rxq);
485 priv_mac_addr_del(struct priv *priv);
488 * DPDK callback for Ethernet device configuration.
490 * Prepare the driver for a given number of TX and RX queues.
493 * Pointer to Ethernet device structure.
496 * 0 on success, negative errno value otherwise and rte_errno is set.
499 mlx4_dev_configure(struct rte_eth_dev *dev)
501 struct priv *priv = dev->data->dev_private;
502 unsigned int rxqs_n = dev->data->nb_rx_queues;
503 unsigned int txqs_n = dev->data->nb_tx_queues;
505 priv->rxqs = (void *)dev->data->rx_queues;
506 priv->txqs = (void *)dev->data->tx_queues;
507 if (txqs_n != priv->txqs_n) {
508 INFO("%p: TX queues number update: %u -> %u",
509 (void *)dev, priv->txqs_n, txqs_n);
510 priv->txqs_n = txqs_n;
512 if (rxqs_n != priv->rxqs_n) {
513 INFO("%p: Rx queues number update: %u -> %u",
514 (void *)dev, priv->rxqs_n, rxqs_n);
515 priv->rxqs_n = rxqs_n;
520 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
521 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
523 /* TX queues handling. */
526 * Allocate TX queue elements.
529 * Pointer to TX queue structure.
531 * Number of elements to allocate.
534 * 0 on success, negative errno value otherwise and rte_errno is set.
537 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
540 struct txq_elt (*elts)[elts_n] =
541 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
545 ERROR("%p: can't allocate packets array", (void *)txq);
549 for (i = 0; (i != elts_n); ++i) {
550 struct txq_elt *elt = &(*elts)[i];
554 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
555 txq->elts_n = elts_n;
561 * Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
562 * at least 4 times per ring.
564 txq->elts_comp_cd_init =
565 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
566 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
567 txq->elts_comp_cd = txq->elts_comp_cd_init;
572 DEBUG("%p: failed, freed everything", (void *)txq);
579 * Free TX queue elements.
582 * Pointer to TX queue structure.
585 txq_free_elts(struct txq *txq)
587 unsigned int elts_n = txq->elts_n;
588 unsigned int elts_head = txq->elts_head;
589 unsigned int elts_tail = txq->elts_tail;
590 struct txq_elt (*elts)[elts_n] = txq->elts;
592 DEBUG("%p: freeing WRs", (void *)txq);
597 txq->elts_comp_cd = 0;
598 txq->elts_comp_cd_init = 0;
602 while (elts_tail != elts_head) {
603 struct txq_elt *elt = &(*elts)[elts_tail];
605 assert(elt->buf != NULL);
606 rte_pktmbuf_free(elt->buf);
609 memset(elt, 0x77, sizeof(*elt));
611 if (++elts_tail == elts_n)
618 * Clean up a TX queue.
620 * Destroy objects, free allocated memory and reset the structure for reuse.
623 * Pointer to TX queue structure.
626 txq_cleanup(struct txq *txq)
630 DEBUG("cleaning up %p", (void *)txq);
633 claim_zero(ibv_destroy_qp(txq->qp));
635 claim_zero(ibv_destroy_cq(txq->cq));
636 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
637 if (txq->mp2mr[i].mp == NULL)
639 assert(txq->mp2mr[i].mr != NULL);
640 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
642 memset(txq, 0, sizeof(*txq));
646 * Manage TX completions.
648 * When sending a burst, mlx4_tx_burst() posts several WRs.
649 * To improve performance, a completion event is only required once every
650 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
651 * for other WRs, but this information would not be used anyway.
654 * Pointer to TX queue structure.
657 * 0 on success, -1 on failure.
660 txq_complete(struct txq *txq)
662 unsigned int elts_comp = txq->elts_comp;
663 unsigned int elts_tail = txq->elts_tail;
664 const unsigned int elts_n = txq->elts_n;
665 struct ibv_wc wcs[elts_comp];
668 if (unlikely(elts_comp == 0))
670 wcs_n = ibv_poll_cq(txq->cq, elts_comp, wcs);
671 if (unlikely(wcs_n == 0))
673 if (unlikely(wcs_n < 0)) {
674 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
679 assert(elts_comp <= txq->elts_comp);
681 * Assume WC status is successful as nothing can be done about it
684 elts_tail += wcs_n * txq->elts_comp_cd_init;
685 if (elts_tail >= elts_n)
687 txq->elts_tail = elts_tail;
688 txq->elts_comp = elts_comp;
692 struct mlx4_check_mempool_data {
698 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
699 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
700 void *opaque, struct rte_mempool_memhdr *memhdr,
703 struct mlx4_check_mempool_data *data = opaque;
707 /* It already failed, skip the next chunks. */
710 /* It is the first chunk. */
711 if (data->start == NULL && data->end == NULL) {
712 data->start = memhdr->addr;
713 data->end = data->start + memhdr->len;
716 if (data->end == memhdr->addr) {
717 data->end += memhdr->len;
720 if (data->start == (char *)memhdr->addr + memhdr->len) {
721 data->start -= memhdr->len;
724 /* Error, mempool is not virtually contigous. */
729 * Check if a mempool can be used: it must be virtually contiguous.
732 * Pointer to memory pool.
734 * Pointer to the start address of the mempool virtual memory area
736 * Pointer to the end address of the mempool virtual memory area
739 * 0 on success (mempool is virtually contiguous), -1 on error.
741 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
744 struct mlx4_check_mempool_data data;
746 memset(&data, 0, sizeof(data));
747 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
748 *start = (uintptr_t)data.start;
749 *end = (uintptr_t)data.end;
753 /* For best performance, this function should not be inlined. */
754 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
758 * Register mempool as a memory region.
761 * Pointer to protection domain.
763 * Pointer to memory pool.
766 * Memory region pointer, NULL in case of error and rte_errno is set.
768 static struct ibv_mr *
769 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
771 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
777 if (mlx4_check_mempool(mp, &start, &end) != 0) {
779 ERROR("mempool %p: not virtually contiguous",
783 DEBUG("mempool %p area start=%p end=%p size=%zu",
784 (void *)mp, (void *)start, (void *)end,
785 (size_t)(end - start));
786 /* Round start and end to page boundary if found in memory segments. */
787 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
788 uintptr_t addr = (uintptr_t)ms[i].addr;
789 size_t len = ms[i].len;
790 unsigned int align = ms[i].hugepage_sz;
792 if ((start > addr) && (start < addr + len))
793 start = RTE_ALIGN_FLOOR(start, align);
794 if ((end > addr) && (end < addr + len))
795 end = RTE_ALIGN_CEIL(end, align);
797 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
798 (void *)mp, (void *)start, (void *)end,
799 (size_t)(end - start));
803 IBV_ACCESS_LOCAL_WRITE);
805 rte_errno = errno ? errno : EINVAL;
810 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
811 * the cloned mbuf is allocated is returned instead.
817 * Memory pool where data is located for given mbuf.
819 static struct rte_mempool *
820 txq_mb2mp(struct rte_mbuf *buf)
822 if (unlikely(RTE_MBUF_INDIRECT(buf)))
823 return rte_mbuf_from_indirect(buf)->pool;
828 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
829 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
830 * remove an entry first.
833 * Pointer to TX queue structure.
835 * Memory Pool for which a Memory Region lkey must be returned.
838 * mr->lkey on success, (uint32_t)-1 on failure.
841 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
846 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
847 if (unlikely(txq->mp2mr[i].mp == NULL)) {
848 /* Unknown MP, add a new MR for it. */
851 if (txq->mp2mr[i].mp == mp) {
852 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
853 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
854 return txq->mp2mr[i].lkey;
857 /* Add a new entry, register MR first. */
858 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
859 (void *)txq, mp->name, (void *)mp);
860 mr = mlx4_mp2mr(txq->priv->pd, mp);
861 if (unlikely(mr == NULL)) {
862 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
866 if (unlikely(i == elemof(txq->mp2mr))) {
867 /* Table is full, remove oldest entry. */
868 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
871 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
872 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
873 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
875 /* Store the new entry. */
876 txq->mp2mr[i].mp = mp;
877 txq->mp2mr[i].mr = mr;
878 txq->mp2mr[i].lkey = mr->lkey;
879 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
880 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
881 return txq->mp2mr[i].lkey;
884 struct txq_mp2mr_mbuf_check_data {
889 * Callback function for rte_mempool_obj_iter() to check whether a given
890 * mempool object looks like a mbuf.
893 * The mempool pointer
895 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
900 * Object index, unused.
903 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
904 uint32_t index __rte_unused)
906 struct txq_mp2mr_mbuf_check_data *data = arg;
907 struct rte_mbuf *buf = obj;
910 * Check whether mbuf structure fits element size and whether mempool
913 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
918 * Iterator function for rte_mempool_walk() to register existing mempools and
919 * fill the MP to MR cache of a TX queue.
922 * Memory Pool to register.
924 * Pointer to TX queue structure.
927 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
929 struct txq *txq = arg;
930 struct txq_mp2mr_mbuf_check_data data = {
934 /* Register mempool only if the first element looks like a mbuf. */
935 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
942 * DPDK callback for TX.
945 * Generic pointer to TX queue structure.
947 * Packets to transmit.
949 * Number of packets in array.
952 * Number of packets successfully transmitted (<= pkts_n).
955 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
957 struct txq *txq = (struct txq *)dpdk_txq;
958 struct ibv_send_wr *wr_head = NULL;
959 struct ibv_send_wr **wr_next = &wr_head;
960 struct ibv_send_wr *wr_bad = NULL;
961 unsigned int elts_head = txq->elts_head;
962 const unsigned int elts_n = txq->elts_n;
963 unsigned int elts_comp_cd = txq->elts_comp_cd;
964 unsigned int elts_comp = 0;
969 assert(elts_comp_cd != 0);
971 max = (elts_n - (elts_head - txq->elts_tail));
975 assert(max <= elts_n);
976 /* Always leave one free entry in the ring. */
982 for (i = 0; (i != max); ++i) {
983 struct rte_mbuf *buf = pkts[i];
984 unsigned int elts_head_next =
985 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
986 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
987 struct txq_elt *elt = &(*txq->elts)[elts_head];
988 struct ibv_send_wr *wr = &elt->wr;
989 unsigned int segs = buf->nb_segs;
990 unsigned int sent_size = 0;
991 uint32_t send_flags = 0;
993 /* Clean up old buffer. */
994 if (likely(elt->buf != NULL)) {
995 struct rte_mbuf *tmp = elt->buf;
999 memset(elt, 0x66, sizeof(*elt));
1001 /* Faster than rte_pktmbuf_free(). */
1003 struct rte_mbuf *next = tmp->next;
1005 rte_pktmbuf_free_seg(tmp);
1007 } while (tmp != NULL);
1009 /* Request TX completion. */
1010 if (unlikely(--elts_comp_cd == 0)) {
1011 elts_comp_cd = txq->elts_comp_cd_init;
1013 send_flags |= IBV_SEND_SIGNALED;
1015 if (likely(segs == 1)) {
1016 struct ibv_sge *sge = &elt->sge;
1021 /* Retrieve buffer information. */
1022 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1023 length = buf->data_len;
1024 /* Retrieve Memory Region key for this memory pool. */
1025 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1026 if (unlikely(lkey == (uint32_t)-1)) {
1027 /* MR does not exist. */
1028 DEBUG("%p: unable to get MP <-> MR"
1029 " association", (void *)txq);
1030 /* Clean up TX element. */
1034 /* Update element. */
1037 rte_prefetch0((volatile void *)
1039 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1041 sge->length = length;
1043 sent_size += length;
1048 if (sent_size <= txq->max_inline)
1049 send_flags |= IBV_SEND_INLINE;
1050 elts_head = elts_head_next;
1051 /* Increment sent bytes counter. */
1052 txq->stats.obytes += sent_size;
1054 wr->sg_list = &elt->sge;
1056 wr->opcode = IBV_WR_SEND;
1057 wr->send_flags = send_flags;
1059 wr_next = &wr->next;
1062 /* Take a shortcut if nothing must be sent. */
1063 if (unlikely(i == 0))
1065 /* Increment sent packets counter. */
1066 txq->stats.opackets += i;
1067 /* Ring QP doorbell. */
1070 err = ibv_post_send(txq->qp, wr_head, &wr_bad);
1071 if (unlikely(err)) {
1072 uint64_t obytes = 0;
1073 uint64_t opackets = 0;
1075 /* Rewind bad WRs. */
1076 while (wr_bad != NULL) {
1079 /* Force completion request if one was lost. */
1080 if (wr_bad->send_flags & IBV_SEND_SIGNALED) {
1085 for (j = 0; j < wr_bad->num_sge; ++j)
1086 obytes += wr_bad->sg_list[j].length;
1087 elts_head = (elts_head ? elts_head : elts_n) - 1;
1088 wr_bad = wr_bad->next;
1090 txq->stats.opackets -= opackets;
1091 txq->stats.obytes -= obytes;
1093 DEBUG("%p: ibv_post_send() failed, %" PRIu64 " packets"
1094 " (%" PRIu64 " bytes) rejected: %s",
1098 (err <= -1) ? "Internal error" : strerror(err));
1100 txq->elts_head = elts_head;
1101 txq->elts_comp += elts_comp;
1102 txq->elts_comp_cd = elts_comp_cd;
1107 * Configure a TX queue.
1110 * Pointer to Ethernet device structure.
1112 * Pointer to TX queue structure.
1114 * Number of descriptors to configure in queue.
1116 * NUMA socket on which memory must be allocated.
1118 * Thresholds parameters.
1121 * 0 on success, negative errno value otherwise and rte_errno is set.
1124 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1125 unsigned int socket, const struct rte_eth_txconf *conf)
1127 struct priv *priv = dev->data->dev_private;
1133 struct ibv_qp_init_attr init;
1134 struct ibv_qp_attr mod;
1138 (void)conf; /* Thresholds configuration (ignored). */
1145 ERROR("%p: invalid number of Tx descriptors", (void *)dev);
1148 /* MRs will be registered in mp2mr[] later. */
1149 tmpl.cq = ibv_create_cq(priv->ctx, desc, NULL, NULL, 0);
1150 if (tmpl.cq == NULL) {
1152 ERROR("%p: CQ creation failure: %s",
1153 (void *)dev, strerror(rte_errno));
1156 DEBUG("priv->device_attr.max_qp_wr is %d",
1157 priv->device_attr.max_qp_wr);
1158 DEBUG("priv->device_attr.max_sge is %d",
1159 priv->device_attr.max_sge);
1160 attr.init = (struct ibv_qp_init_attr){
1161 /* CQ to be associated with the send queue. */
1163 /* CQ to be associated with the receive queue. */
1166 /* Max number of outstanding WRs. */
1167 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1168 priv->device_attr.max_qp_wr :
1170 /* Max number of scatter/gather elements in a WR. */
1172 .max_inline_data = MLX4_PMD_MAX_INLINE,
1174 .qp_type = IBV_QPT_RAW_PACKET,
1176 * Do *NOT* enable this, completions events are managed per
1181 tmpl.qp = ibv_create_qp(priv->pd, &attr.init);
1182 if (tmpl.qp == NULL) {
1183 rte_errno = errno ? errno : EINVAL;
1184 ERROR("%p: QP creation failure: %s",
1185 (void *)dev, strerror(rte_errno));
1188 /* ibv_create_qp() updates this value. */
1189 tmpl.max_inline = attr.init.cap.max_inline_data;
1190 attr.mod = (struct ibv_qp_attr){
1191 /* Move the QP to this state. */
1192 .qp_state = IBV_QPS_INIT,
1193 /* Primary port number. */
1194 .port_num = priv->port
1196 ret = ibv_modify_qp(tmpl.qp, &attr.mod, IBV_QP_STATE | IBV_QP_PORT);
1199 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1200 (void *)dev, strerror(rte_errno));
1203 ret = txq_alloc_elts(&tmpl, desc);
1206 ERROR("%p: TXQ allocation failed: %s",
1207 (void *)dev, strerror(rte_errno));
1210 attr.mod = (struct ibv_qp_attr){
1211 .qp_state = IBV_QPS_RTR
1213 ret = ibv_modify_qp(tmpl.qp, &attr.mod, IBV_QP_STATE);
1216 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1217 (void *)dev, strerror(rte_errno));
1220 attr.mod.qp_state = IBV_QPS_RTS;
1221 ret = ibv_modify_qp(tmpl.qp, &attr.mod, IBV_QP_STATE);
1224 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1225 (void *)dev, strerror(rte_errno));
1228 /* Clean up txq in case we're reinitializing it. */
1229 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1232 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1233 /* Pre-register known mempools. */
1234 rte_mempool_walk(txq_mp2mr_iter, txq);
1240 assert(rte_errno > 0);
1245 * DPDK callback to configure a TX queue.
1248 * Pointer to Ethernet device structure.
1252 * Number of descriptors to configure in queue.
1254 * NUMA socket on which memory must be allocated.
1256 * Thresholds parameters.
1259 * 0 on success, negative errno value otherwise and rte_errno is set.
1262 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1263 unsigned int socket, const struct rte_eth_txconf *conf)
1265 struct priv *priv = dev->data->dev_private;
1266 struct txq *txq = (*priv->txqs)[idx];
1269 DEBUG("%p: configuring queue %u for %u descriptors",
1270 (void *)dev, idx, desc);
1271 if (idx >= priv->txqs_n) {
1272 rte_errno = EOVERFLOW;
1273 ERROR("%p: queue index out of range (%u >= %u)",
1274 (void *)dev, idx, priv->txqs_n);
1278 DEBUG("%p: reusing already allocated queue index %u (%p)",
1279 (void *)dev, idx, (void *)txq);
1280 if (priv->started) {
1284 (*priv->txqs)[idx] = NULL;
1287 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1290 ERROR("%p: unable to allocate queue index %u",
1295 ret = txq_setup(dev, txq, desc, socket, conf);
1299 txq->stats.idx = idx;
1300 DEBUG("%p: adding TX queue %p to list",
1301 (void *)dev, (void *)txq);
1302 (*priv->txqs)[idx] = txq;
1303 /* Update send callback. */
1304 dev->tx_pkt_burst = mlx4_tx_burst;
1310 * DPDK callback to release a TX queue.
1313 * Generic TX queue pointer.
1316 mlx4_tx_queue_release(void *dpdk_txq)
1318 struct txq *txq = (struct txq *)dpdk_txq;
1325 for (i = 0; (i != priv->txqs_n); ++i)
1326 if ((*priv->txqs)[i] == txq) {
1327 DEBUG("%p: removing TX queue %p from list",
1328 (void *)priv->dev, (void *)txq);
1329 (*priv->txqs)[i] = NULL;
1336 /* RX queues handling. */
1339 * Allocate RX queue elements.
1342 * Pointer to RX queue structure.
1344 * Number of elements to allocate.
1347 * 0 on success, negative errno value otherwise and rte_errno is set.
1350 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n)
1353 struct rxq_elt (*elts)[elts_n] =
1354 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1359 ERROR("%p: can't allocate packets array", (void *)rxq);
1362 /* For each WR (packet). */
1363 for (i = 0; (i != elts_n); ++i) {
1364 struct rxq_elt *elt = &(*elts)[i];
1365 struct ibv_recv_wr *wr = &elt->wr;
1366 struct ibv_sge *sge = &(*elts)[i].sge;
1367 struct rte_mbuf *buf = rte_pktmbuf_alloc(rxq->mp);
1371 ERROR("%p: empty mbuf pool", (void *)rxq);
1375 wr->next = &(*elts)[(i + 1)].wr;
1378 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1379 assert(buf->data_off == RTE_PKTMBUF_HEADROOM);
1380 /* Buffer is supposed to be empty. */
1381 assert(rte_pktmbuf_data_len(buf) == 0);
1382 assert(rte_pktmbuf_pkt_len(buf) == 0);
1383 /* sge->addr must be able to store a pointer. */
1384 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1385 /* SGE keeps its headroom. */
1386 sge->addr = (uintptr_t)
1387 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
1388 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
1389 sge->lkey = rxq->mr->lkey;
1390 /* Redundant check for tailroom. */
1391 assert(sge->length == rte_pktmbuf_tailroom(buf));
1393 /* The last WR pointer must be NULL. */
1394 (*elts)[(i - 1)].wr.next = NULL;
1395 DEBUG("%p: allocated and configured %u single-segment WRs",
1396 (void *)rxq, elts_n);
1397 rxq->elts_n = elts_n;
1403 for (i = 0; (i != elemof(*elts)); ++i)
1404 rte_pktmbuf_free_seg((*elts)[i].buf);
1407 DEBUG("%p: failed, freed everything", (void *)rxq);
1408 assert(rte_errno > 0);
1413 * Free RX queue elements.
1416 * Pointer to RX queue structure.
1419 rxq_free_elts(struct rxq *rxq)
1422 unsigned int elts_n = rxq->elts_n;
1423 struct rxq_elt (*elts)[elts_n] = rxq->elts;
1425 DEBUG("%p: freeing WRs", (void *)rxq);
1430 for (i = 0; (i != elemof(*elts)); ++i)
1431 rte_pktmbuf_free_seg((*elts)[i].buf);
1436 * Unregister a MAC address.
1439 * Pointer to private structure.
1442 priv_mac_addr_del(struct priv *priv)
1445 uint8_t (*mac)[ETHER_ADDR_LEN] = &priv->mac.addr_bytes;
1448 if (!priv->mac_flow)
1450 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x",
1452 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
1453 claim_zero(ibv_destroy_flow(priv->mac_flow));
1454 priv->mac_flow = NULL;
1458 * Register a MAC address.
1460 * The MAC address is registered in queue 0.
1463 * Pointer to private structure.
1466 * 0 on success, negative errno value otherwise and rte_errno is set.
1469 priv_mac_addr_add(struct priv *priv)
1471 uint8_t (*mac)[ETHER_ADDR_LEN] = &priv->mac.addr_bytes;
1473 struct ibv_flow *flow;
1475 /* If device isn't started, this is all we need to do. */
1480 if (*priv->rxqs && (*priv->rxqs)[0])
1481 rxq = (*priv->rxqs)[0];
1485 /* Allocate flow specification on the stack. */
1486 struct __attribute__((packed)) {
1487 struct ibv_flow_attr attr;
1488 struct ibv_flow_spec_eth spec;
1490 struct ibv_flow_attr *attr = &data.attr;
1491 struct ibv_flow_spec_eth *spec = &data.spec;
1494 priv_mac_addr_del(priv);
1496 * No padding must be inserted by the compiler between attr and spec.
1497 * This layout is expected by libibverbs.
1499 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
1500 *attr = (struct ibv_flow_attr){
1501 .type = IBV_FLOW_ATTR_NORMAL,
1507 *spec = (struct ibv_flow_spec_eth){
1508 .type = IBV_FLOW_SPEC_ETH,
1509 .size = sizeof(*spec),
1512 (*mac)[0], (*mac)[1], (*mac)[2],
1513 (*mac)[3], (*mac)[4], (*mac)[5]
1517 .dst_mac = "\xff\xff\xff\xff\xff\xff",
1520 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x",
1522 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5]);
1523 /* Create related flow. */
1524 flow = ibv_create_flow(rxq->qp, attr);
1526 rte_errno = errno ? errno : EINVAL;
1527 ERROR("%p: flow configuration failed, errno=%d: %s",
1528 (void *)rxq, rte_errno, strerror(errno));
1531 assert(priv->mac_flow == NULL);
1532 priv->mac_flow = flow;
1537 * Clean up a RX queue.
1539 * Destroy objects, free allocated memory and reset the structure for reuse.
1542 * Pointer to RX queue structure.
1545 rxq_cleanup(struct rxq *rxq)
1547 DEBUG("cleaning up %p", (void *)rxq);
1549 if (rxq->qp != NULL)
1550 claim_zero(ibv_destroy_qp(rxq->qp));
1551 if (rxq->cq != NULL)
1552 claim_zero(ibv_destroy_cq(rxq->cq));
1553 if (rxq->channel != NULL)
1554 claim_zero(ibv_destroy_comp_channel(rxq->channel));
1555 if (rxq->mr != NULL)
1556 claim_zero(ibv_dereg_mr(rxq->mr));
1557 memset(rxq, 0, sizeof(*rxq));
1561 * DPDK callback for RX.
1563 * The following function doesn't manage scattered packets.
1566 * Generic pointer to RX queue structure.
1568 * Array to store received packets.
1570 * Maximum number of packets in array.
1573 * Number of packets successfully received (<= pkts_n).
1576 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
1578 struct rxq *rxq = (struct rxq *)dpdk_rxq;
1579 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts;
1580 const unsigned int elts_n = rxq->elts_n;
1581 unsigned int elts_head = rxq->elts_head;
1582 struct ibv_wc wcs[pkts_n];
1583 struct ibv_recv_wr *wr_head = NULL;
1584 struct ibv_recv_wr **wr_next = &wr_head;
1585 struct ibv_recv_wr *wr_bad = NULL;
1587 unsigned int pkts_ret = 0;
1590 ret = ibv_poll_cq(rxq->cq, pkts_n, wcs);
1591 if (unlikely(ret == 0))
1593 if (unlikely(ret < 0)) {
1594 DEBUG("rxq=%p, ibv_poll_cq() failed (wc_n=%d)",
1598 assert(ret <= (int)pkts_n);
1599 /* For each work completion. */
1600 for (i = 0; i != (unsigned int)ret; ++i) {
1601 struct ibv_wc *wc = &wcs[i];
1602 struct rxq_elt *elt = &(*elts)[elts_head];
1603 struct ibv_recv_wr *wr = &elt->wr;
1604 uint32_t len = wc->byte_len;
1605 struct rte_mbuf *seg = elt->buf;
1606 struct rte_mbuf *rep;
1608 /* Sanity checks. */
1609 assert(wr->sg_list == &elt->sge);
1610 assert(wr->num_sge == 1);
1611 assert(elts_head < rxq->elts_n);
1612 assert(rxq->elts_head < rxq->elts_n);
1614 * Fetch initial bytes of packet descriptor into a
1615 * cacheline while allocating rep.
1617 rte_mbuf_prefetch_part1(seg);
1618 rte_mbuf_prefetch_part2(seg);
1619 /* Link completed WRs together for repost. */
1621 wr_next = &wr->next;
1622 if (unlikely(wc->status != IBV_WC_SUCCESS)) {
1623 /* Whatever, just repost the offending WR. */
1624 DEBUG("rxq=%p: bad work completion status (%d): %s",
1625 (void *)rxq, wc->status,
1626 ibv_wc_status_str(wc->status));
1627 /* Increment dropped packets counter. */
1628 ++rxq->stats.idropped;
1631 rep = rte_mbuf_raw_alloc(rxq->mp);
1632 if (unlikely(rep == NULL)) {
1634 * Unable to allocate a replacement mbuf,
1637 DEBUG("rxq=%p: can't allocate a new mbuf",
1639 /* Increase out of memory counters. */
1640 ++rxq->stats.rx_nombuf;
1641 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
1644 /* Reconfigure sge to use rep instead of seg. */
1645 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
1646 assert(elt->sge.lkey == rxq->mr->lkey);
1648 /* Update seg information. */
1649 seg->data_off = RTE_PKTMBUF_HEADROOM;
1651 seg->port = rxq->port_id;
1654 seg->data_len = len;
1655 seg->packet_type = 0;
1657 /* Return packet. */
1660 /* Increase bytes counter. */
1661 rxq->stats.ibytes += len;
1663 if (++elts_head >= elts_n)
1667 if (unlikely(i == 0))
1672 ret = ibv_post_recv(rxq->qp, wr_head, &wr_bad);
1673 if (unlikely(ret)) {
1674 /* Inability to repost WRs is fatal. */
1675 DEBUG("%p: recv_burst(): failed (ret=%d)",
1680 rxq->elts_head = elts_head;
1681 /* Increase packets counter. */
1682 rxq->stats.ipackets += pkts_ret;
1687 * Allocate a Queue Pair.
1688 * Optionally setup inline receive if supported.
1691 * Pointer to private structure.
1693 * Completion queue to associate with QP.
1695 * Number of descriptors in QP (hint only).
1698 * QP pointer or NULL in case of error and rte_errno is set.
1700 static struct ibv_qp *
1701 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc)
1704 struct ibv_qp_init_attr attr = {
1705 /* CQ to be associated with the send queue. */
1707 /* CQ to be associated with the receive queue. */
1710 /* Max number of outstanding WRs. */
1711 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
1712 priv->device_attr.max_qp_wr :
1714 /* Max number of scatter/gather elements in a WR. */
1717 .qp_type = IBV_QPT_RAW_PACKET,
1720 qp = ibv_create_qp(priv->pd, &attr);
1722 rte_errno = errno ? errno : EINVAL;
1727 * Configure a RX queue.
1730 * Pointer to Ethernet device structure.
1732 * Pointer to RX queue structure.
1734 * Number of descriptors to configure in queue.
1736 * NUMA socket on which memory must be allocated.
1738 * Thresholds parameters.
1740 * Memory pool for buffer allocations.
1743 * 0 on success, negative errno value otherwise and rte_errno is set.
1746 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
1747 unsigned int socket, const struct rte_eth_rxconf *conf,
1748 struct rte_mempool *mp)
1750 struct priv *priv = dev->data->dev_private;
1756 struct ibv_qp_attr mod;
1757 struct ibv_recv_wr *bad_wr;
1758 unsigned int mb_len;
1761 (void)conf; /* Thresholds configuration (ignored). */
1762 mb_len = rte_pktmbuf_data_room_size(mp);
1765 ERROR("%p: invalid number of Rx descriptors", (void *)dev);
1768 /* Enable scattered packets support for this queue if necessary. */
1769 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1770 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1771 (mb_len - RTE_PKTMBUF_HEADROOM)) {
1773 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
1774 WARN("%p: scattered mode has been requested but is"
1775 " not supported, this may lead to packet loss",
1778 WARN("%p: the requested maximum Rx packet size (%u) is"
1779 " larger than a single mbuf (%u) and scattered"
1780 " mode has not been requested",
1782 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1783 mb_len - RTE_PKTMBUF_HEADROOM);
1785 /* Use the entire RX mempool as the memory region. */
1786 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
1787 if (tmpl.mr == NULL) {
1789 ERROR("%p: MR creation failure: %s",
1790 (void *)dev, strerror(rte_errno));
1793 if (dev->data->dev_conf.intr_conf.rxq) {
1794 tmpl.channel = ibv_create_comp_channel(priv->ctx);
1795 if (tmpl.channel == NULL) {
1797 ERROR("%p: Rx interrupt completion channel creation"
1799 (void *)dev, strerror(rte_errno));
1803 tmpl.cq = ibv_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0);
1804 if (tmpl.cq == NULL) {
1806 ERROR("%p: CQ creation failure: %s",
1807 (void *)dev, strerror(rte_errno));
1810 DEBUG("priv->device_attr.max_qp_wr is %d",
1811 priv->device_attr.max_qp_wr);
1812 DEBUG("priv->device_attr.max_sge is %d",
1813 priv->device_attr.max_sge);
1814 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc);
1815 if (tmpl.qp == NULL) {
1816 ERROR("%p: QP creation failure: %s",
1817 (void *)dev, strerror(rte_errno));
1820 mod = (struct ibv_qp_attr){
1821 /* Move the QP to this state. */
1822 .qp_state = IBV_QPS_INIT,
1823 /* Primary port number. */
1824 .port_num = priv->port
1826 ret = ibv_modify_qp(tmpl.qp, &mod, IBV_QP_STATE | IBV_QP_PORT);
1829 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1830 (void *)dev, strerror(rte_errno));
1833 ret = rxq_alloc_elts(&tmpl, desc);
1835 ERROR("%p: RXQ allocation failed: %s",
1836 (void *)dev, strerror(rte_errno));
1839 ret = ibv_post_recv(tmpl.qp, &(*tmpl.elts)[0].wr, &bad_wr);
1842 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
1845 strerror(rte_errno));
1848 mod = (struct ibv_qp_attr){
1849 .qp_state = IBV_QPS_RTR
1851 ret = ibv_modify_qp(tmpl.qp, &mod, IBV_QP_STATE);
1854 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1855 (void *)dev, strerror(rte_errno));
1859 tmpl.port_id = dev->data->port_id;
1860 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
1861 /* Clean up rxq in case we're reinitializing it. */
1862 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
1865 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
1871 assert(rte_errno > 0);
1876 * DPDK callback to configure a RX queue.
1879 * Pointer to Ethernet device structure.
1883 * Number of descriptors to configure in queue.
1885 * NUMA socket on which memory must be allocated.
1887 * Thresholds parameters.
1889 * Memory pool for buffer allocations.
1892 * 0 on success, negative errno value otherwise and rte_errno is set.
1895 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1896 unsigned int socket, const struct rte_eth_rxconf *conf,
1897 struct rte_mempool *mp)
1899 struct priv *priv = dev->data->dev_private;
1900 struct rxq *rxq = (*priv->rxqs)[idx];
1903 DEBUG("%p: configuring queue %u for %u descriptors",
1904 (void *)dev, idx, desc);
1905 if (idx >= priv->rxqs_n) {
1906 rte_errno = EOVERFLOW;
1907 ERROR("%p: queue index out of range (%u >= %u)",
1908 (void *)dev, idx, priv->rxqs_n);
1912 DEBUG("%p: reusing already allocated queue index %u (%p)",
1913 (void *)dev, idx, (void *)rxq);
1914 if (priv->started) {
1918 (*priv->rxqs)[idx] = NULL;
1920 priv_mac_addr_del(priv);
1923 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
1926 ERROR("%p: unable to allocate queue index %u",
1931 ret = rxq_setup(dev, rxq, desc, socket, conf, mp);
1935 rxq->stats.idx = idx;
1936 DEBUG("%p: adding RX queue %p to list",
1937 (void *)dev, (void *)rxq);
1938 (*priv->rxqs)[idx] = rxq;
1939 /* Update receive callback. */
1940 dev->rx_pkt_burst = mlx4_rx_burst;
1946 * DPDK callback to release a RX queue.
1949 * Generic RX queue pointer.
1952 mlx4_rx_queue_release(void *dpdk_rxq)
1954 struct rxq *rxq = (struct rxq *)dpdk_rxq;
1961 for (i = 0; (i != priv->rxqs_n); ++i)
1962 if ((*priv->rxqs)[i] == rxq) {
1963 DEBUG("%p: removing RX queue %p from list",
1964 (void *)priv->dev, (void *)rxq);
1965 (*priv->rxqs)[i] = NULL;
1967 priv_mac_addr_del(priv);
1975 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
1978 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
1981 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
1984 * DPDK callback to start the device.
1986 * Simulate device start by attaching all configured flows.
1989 * Pointer to Ethernet device structure.
1992 * 0 on success, negative errno value otherwise and rte_errno is set.
1995 mlx4_dev_start(struct rte_eth_dev *dev)
1997 struct priv *priv = dev->data->dev_private;
2002 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
2004 ret = priv_mac_addr_add(priv);
2007 ret = priv_dev_link_interrupt_handler_install(priv, dev);
2009 ERROR("%p: LSC handler install failed",
2013 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
2015 ERROR("%p: RMV handler install failed",
2019 ret = priv_rx_intr_vec_enable(priv);
2021 ERROR("%p: Rx interrupt vector creation failed",
2025 ret = mlx4_priv_flow_start(priv);
2027 ERROR("%p: flow start failed: %s",
2028 (void *)dev, strerror(ret));
2034 priv_mac_addr_del(priv);
2040 * DPDK callback to stop the device.
2042 * Simulate device stop by detaching all configured flows.
2045 * Pointer to Ethernet device structure.
2048 mlx4_dev_stop(struct rte_eth_dev *dev)
2050 struct priv *priv = dev->data->dev_private;
2054 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
2056 mlx4_priv_flow_stop(priv);
2057 priv_mac_addr_del(priv);
2061 * Dummy DPDK callback for TX.
2063 * This function is used to temporarily replace the real callback during
2064 * unsafe control operations on the queue, or in case of error.
2067 * Generic pointer to TX queue structure.
2069 * Packets to transmit.
2071 * Number of packets in array.
2074 * Number of packets successfully transmitted (<= pkts_n).
2077 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
2086 * Dummy DPDK callback for RX.
2088 * This function is used to temporarily replace the real callback during
2089 * unsafe control operations on the queue, or in case of error.
2092 * Generic pointer to RX queue structure.
2094 * Array to store received packets.
2096 * Maximum number of packets in array.
2099 * Number of packets successfully received (<= pkts_n).
2102 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2111 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
2114 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
2115 struct rte_eth_dev *);
2118 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
2121 * DPDK callback to close the device.
2123 * Destroy all queues and objects, free memory.
2126 * Pointer to Ethernet device structure.
2129 mlx4_dev_close(struct rte_eth_dev *dev)
2131 struct priv *priv = dev->data->dev_private;
2137 DEBUG("%p: closing device \"%s\"",
2139 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
2140 priv_mac_addr_del(priv);
2142 * Prevent crashes when queues are still in use. This is unfortunately
2143 * still required for DPDK 1.3 because some programs (such as testpmd)
2144 * never release them before closing the device.
2146 dev->rx_pkt_burst = removed_rx_burst;
2147 dev->tx_pkt_burst = removed_tx_burst;
2148 if (priv->rxqs != NULL) {
2149 /* XXX race condition if mlx4_rx_burst() is still running. */
2151 for (i = 0; (i != priv->rxqs_n); ++i) {
2152 tmp = (*priv->rxqs)[i];
2155 (*priv->rxqs)[i] = NULL;
2162 if (priv->txqs != NULL) {
2163 /* XXX race condition if mlx4_tx_burst() is still running. */
2165 for (i = 0; (i != priv->txqs_n); ++i) {
2166 tmp = (*priv->txqs)[i];
2169 (*priv->txqs)[i] = NULL;
2176 if (priv->pd != NULL) {
2177 assert(priv->ctx != NULL);
2178 claim_zero(ibv_dealloc_pd(priv->pd));
2179 claim_zero(ibv_close_device(priv->ctx));
2181 assert(priv->ctx == NULL);
2182 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
2183 priv_dev_link_interrupt_handler_uninstall(priv, dev);
2184 priv_rx_intr_vec_disable(priv);
2185 memset(priv, 0, sizeof(*priv));
2189 * Change the link state (UP / DOWN).
2192 * Pointer to Ethernet device private data.
2194 * Nonzero for link up, otherwise link down.
2197 * 0 on success, negative errno value otherwise and rte_errno is set.
2200 priv_set_link(struct priv *priv, int up)
2202 struct rte_eth_dev *dev = priv->dev;
2206 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
2209 dev->rx_pkt_burst = mlx4_rx_burst;
2211 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
2214 dev->rx_pkt_burst = removed_rx_burst;
2215 dev->tx_pkt_burst = removed_tx_burst;
2221 * DPDK callback to bring the link DOWN.
2224 * Pointer to Ethernet device structure.
2227 * 0 on success, negative errno value otherwise and rte_errno is set.
2230 mlx4_set_link_down(struct rte_eth_dev *dev)
2232 struct priv *priv = dev->data->dev_private;
2234 return priv_set_link(priv, 0);
2238 * DPDK callback to bring the link UP.
2241 * Pointer to Ethernet device structure.
2244 * 0 on success, negative errno value otherwise and rte_errno is set.
2247 mlx4_set_link_up(struct rte_eth_dev *dev)
2249 struct priv *priv = dev->data->dev_private;
2251 return priv_set_link(priv, 1);
2255 * DPDK callback to get information about the device.
2258 * Pointer to Ethernet device structure.
2260 * Info structure output buffer.
2263 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
2265 struct priv *priv = dev->data->dev_private;
2267 char ifname[IF_NAMESIZE];
2269 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2272 /* FIXME: we should ask the device for these values. */
2273 info->min_rx_bufsize = 32;
2274 info->max_rx_pktlen = 65536;
2276 * Since we need one CQ per QP, the limit is the minimum number
2277 * between the two values.
2279 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
2280 priv->device_attr.max_qp : priv->device_attr.max_cq);
2281 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
2284 info->max_rx_queues = max;
2285 info->max_tx_queues = max;
2286 /* Last array entry is reserved for broadcast. */
2287 info->max_mac_addrs = 1;
2288 info->rx_offload_capa = 0;
2289 info->tx_offload_capa = 0;
2290 if (priv_get_ifname(priv, &ifname) == 0)
2291 info->if_index = if_nametoindex(ifname);
2294 ETH_LINK_SPEED_10G |
2295 ETH_LINK_SPEED_20G |
2296 ETH_LINK_SPEED_40G |
2301 * DPDK callback to get device statistics.
2304 * Pointer to Ethernet device structure.
2306 * Stats structure output buffer.
2309 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2311 struct priv *priv = dev->data->dev_private;
2312 struct rte_eth_stats tmp = {0};
2318 /* Add software counters. */
2319 for (i = 0; (i != priv->rxqs_n); ++i) {
2320 struct rxq *rxq = (*priv->rxqs)[i];
2324 idx = rxq->stats.idx;
2325 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
2326 tmp.q_ipackets[idx] += rxq->stats.ipackets;
2327 tmp.q_ibytes[idx] += rxq->stats.ibytes;
2328 tmp.q_errors[idx] += (rxq->stats.idropped +
2329 rxq->stats.rx_nombuf);
2331 tmp.ipackets += rxq->stats.ipackets;
2332 tmp.ibytes += rxq->stats.ibytes;
2333 tmp.ierrors += rxq->stats.idropped;
2334 tmp.rx_nombuf += rxq->stats.rx_nombuf;
2336 for (i = 0; (i != priv->txqs_n); ++i) {
2337 struct txq *txq = (*priv->txqs)[i];
2341 idx = txq->stats.idx;
2342 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
2343 tmp.q_opackets[idx] += txq->stats.opackets;
2344 tmp.q_obytes[idx] += txq->stats.obytes;
2345 tmp.q_errors[idx] += txq->stats.odropped;
2347 tmp.opackets += txq->stats.opackets;
2348 tmp.obytes += txq->stats.obytes;
2349 tmp.oerrors += txq->stats.odropped;
2355 * DPDK callback to clear device statistics.
2358 * Pointer to Ethernet device structure.
2361 mlx4_stats_reset(struct rte_eth_dev *dev)
2363 struct priv *priv = dev->data->dev_private;
2369 for (i = 0; (i != priv->rxqs_n); ++i) {
2370 if ((*priv->rxqs)[i] == NULL)
2372 idx = (*priv->rxqs)[i]->stats.idx;
2373 (*priv->rxqs)[i]->stats =
2374 (struct mlx4_rxq_stats){ .idx = idx };
2376 for (i = 0; (i != priv->txqs_n); ++i) {
2377 if ((*priv->txqs)[i] == NULL)
2379 idx = (*priv->txqs)[i]->stats.idx;
2380 (*priv->txqs)[i]->stats =
2381 (struct mlx4_txq_stats){ .idx = idx };
2386 * DPDK callback to retrieve physical link information.
2389 * Pointer to Ethernet device structure.
2390 * @param wait_to_complete
2391 * Wait for request completion (ignored).
2394 * 0 on success, negative errno value otherwise and rte_errno is set.
2397 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
2399 const struct priv *priv = dev->data->dev_private;
2400 struct ethtool_cmd edata = {
2404 struct rte_eth_link dev_link;
2411 (void)wait_to_complete;
2412 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
2413 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(rte_errno));
2416 memset(&dev_link, 0, sizeof(dev_link));
2417 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
2418 (ifr.ifr_flags & IFF_RUNNING));
2419 ifr.ifr_data = (void *)&edata;
2420 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
2421 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
2422 strerror(rte_errno));
2425 link_speed = ethtool_cmd_speed(&edata);
2426 if (link_speed == -1)
2427 dev_link.link_speed = 0;
2429 dev_link.link_speed = link_speed;
2430 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
2431 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
2432 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
2433 ETH_LINK_SPEED_FIXED);
2434 dev->data->dev_link = dev_link;
2439 * DPDK callback to get flow control status.
2442 * Pointer to Ethernet device structure.
2443 * @param[out] fc_conf
2444 * Flow control output buffer.
2447 * 0 on success, negative errno value otherwise and rte_errno is set.
2450 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2452 struct priv *priv = dev->data->dev_private;
2454 struct ethtool_pauseparam ethpause = {
2455 .cmd = ETHTOOL_GPAUSEPARAM
2459 ifr.ifr_data = (void *)ðpause;
2460 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
2462 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
2464 strerror(rte_errno));
2467 fc_conf->autoneg = ethpause.autoneg;
2468 if (ethpause.rx_pause && ethpause.tx_pause)
2469 fc_conf->mode = RTE_FC_FULL;
2470 else if (ethpause.rx_pause)
2471 fc_conf->mode = RTE_FC_RX_PAUSE;
2472 else if (ethpause.tx_pause)
2473 fc_conf->mode = RTE_FC_TX_PAUSE;
2475 fc_conf->mode = RTE_FC_NONE;
2483 * DPDK callback to modify flow control parameters.
2486 * Pointer to Ethernet device structure.
2487 * @param[in] fc_conf
2488 * Flow control parameters.
2491 * 0 on success, negative errno value otherwise and rte_errno is set.
2494 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2496 struct priv *priv = dev->data->dev_private;
2498 struct ethtool_pauseparam ethpause = {
2499 .cmd = ETHTOOL_SPAUSEPARAM
2503 ifr.ifr_data = (void *)ðpause;
2504 ethpause.autoneg = fc_conf->autoneg;
2505 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
2506 (fc_conf->mode & RTE_FC_RX_PAUSE))
2507 ethpause.rx_pause = 1;
2509 ethpause.rx_pause = 0;
2510 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
2511 (fc_conf->mode & RTE_FC_TX_PAUSE))
2512 ethpause.tx_pause = 1;
2514 ethpause.tx_pause = 0;
2515 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
2517 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
2519 strerror(rte_errno));
2528 const struct rte_flow_ops mlx4_flow_ops = {
2529 .validate = mlx4_flow_validate,
2530 .create = mlx4_flow_create,
2531 .destroy = mlx4_flow_destroy,
2532 .flush = mlx4_flow_flush,
2534 .isolate = mlx4_flow_isolate,
2538 * Manage filter operations.
2541 * Pointer to Ethernet device structure.
2542 * @param filter_type
2545 * Operation to perform.
2547 * Pointer to operation-specific structure.
2550 * 0 on success, negative errno value otherwise and rte_errno is set.
2553 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
2554 enum rte_filter_type filter_type,
2555 enum rte_filter_op filter_op,
2558 switch (filter_type) {
2559 case RTE_ETH_FILTER_GENERIC:
2560 if (filter_op != RTE_ETH_FILTER_GET)
2562 *(const void **)arg = &mlx4_flow_ops;
2565 ERROR("%p: filter type (%d) not supported",
2566 (void *)dev, filter_type);
2569 rte_errno = ENOTSUP;
2573 static const struct eth_dev_ops mlx4_dev_ops = {
2574 .dev_configure = mlx4_dev_configure,
2575 .dev_start = mlx4_dev_start,
2576 .dev_stop = mlx4_dev_stop,
2577 .dev_set_link_down = mlx4_set_link_down,
2578 .dev_set_link_up = mlx4_set_link_up,
2579 .dev_close = mlx4_dev_close,
2580 .link_update = mlx4_link_update,
2581 .stats_get = mlx4_stats_get,
2582 .stats_reset = mlx4_stats_reset,
2583 .dev_infos_get = mlx4_dev_infos_get,
2584 .rx_queue_setup = mlx4_rx_queue_setup,
2585 .tx_queue_setup = mlx4_tx_queue_setup,
2586 .rx_queue_release = mlx4_rx_queue_release,
2587 .tx_queue_release = mlx4_tx_queue_release,
2588 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
2589 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
2590 .mtu_set = mlx4_dev_set_mtu,
2591 .filter_ctrl = mlx4_dev_filter_ctrl,
2592 .rx_queue_intr_enable = mlx4_rx_intr_enable,
2593 .rx_queue_intr_disable = mlx4_rx_intr_disable,
2597 * Get PCI information from struct ibv_device.
2600 * Pointer to Ethernet device structure.
2601 * @param[out] pci_addr
2602 * PCI bus address output buffer.
2605 * 0 on success, negative errno value otherwise and rte_errno is set.
2608 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
2609 struct rte_pci_addr *pci_addr)
2613 MKSTR(path, "%s/device/uevent", device->ibdev_path);
2615 file = fopen(path, "rb");
2620 while (fgets(line, sizeof(line), file) == line) {
2621 size_t len = strlen(line);
2624 /* Truncate long lines. */
2625 if (len == (sizeof(line) - 1))
2626 while (line[(len - 1)] != '\n') {
2630 line[(len - 1)] = ret;
2632 /* Extract information. */
2635 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
2639 &pci_addr->function) == 4) {
2649 * Get MAC address by querying netdevice.
2652 * struct priv for the requested device.
2654 * MAC address output buffer.
2657 * 0 on success, negative errno value otherwise and rte_errno is set.
2660 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
2662 struct ifreq request;
2663 int ret = priv_ifreq(priv, SIOCGIFHWADDR, &request);
2667 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
2672 mlx4_dev_link_status_handler(void *);
2674 mlx4_dev_interrupt_handler(void *);
2677 * Link/device status handler.
2680 * Pointer to private structure.
2682 * Pointer to the rte_eth_dev structure.
2684 * Pointer to event flags holder.
2690 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
2693 struct ibv_async_event event;
2694 int port_change = 0;
2695 struct rte_eth_link *link = &dev->data->dev_link;
2699 /* Read all message and acknowledge them. */
2701 if (ibv_get_async_event(priv->ctx, &event))
2703 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
2704 event.event_type == IBV_EVENT_PORT_ERR) &&
2705 (priv->intr_conf.lsc == 1)) {
2708 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
2709 priv->intr_conf.rmv == 1) {
2710 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
2713 DEBUG("event type %d on port %d not handled",
2714 event.event_type, event.element.port_num);
2715 ibv_ack_async_event(&event);
2719 mlx4_link_update(dev, 0);
2720 if (((link->link_speed == 0) && link->link_status) ||
2721 ((link->link_speed != 0) && !link->link_status)) {
2722 if (!priv->pending_alarm) {
2723 /* Inconsistent status, check again later. */
2724 priv->pending_alarm = 1;
2725 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
2726 mlx4_dev_link_status_handler,
2730 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
2736 * Handle delayed link status event.
2739 * Registered argument.
2742 mlx4_dev_link_status_handler(void *arg)
2744 struct rte_eth_dev *dev = arg;
2745 struct priv *priv = dev->data->dev_private;
2749 assert(priv->pending_alarm == 1);
2750 priv->pending_alarm = 0;
2751 ret = priv_dev_status_handler(priv, dev, &events);
2752 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
2753 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
2758 * Handle interrupts from the NIC.
2760 * @param[in] intr_handle
2761 * Interrupt handler.
2763 * Callback argument.
2766 mlx4_dev_interrupt_handler(void *cb_arg)
2768 struct rte_eth_dev *dev = cb_arg;
2769 struct priv *priv = dev->data->dev_private;
2774 ret = priv_dev_status_handler(priv, dev, &ev);
2776 for (i = RTE_ETH_EVENT_UNKNOWN;
2777 i < RTE_ETH_EVENT_MAX;
2779 if (ev & (1 << i)) {
2781 _rte_eth_dev_callback_process(dev, i, NULL,
2787 WARN("%d event%s not processed", ret,
2788 (ret > 1 ? "s were" : " was"));
2793 * Uninstall interrupt handler.
2796 * Pointer to private structure.
2798 * Pointer to the rte_eth_dev structure.
2801 * 0 on success, negative errno value otherwise and rte_errno is set.
2804 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
2808 if (priv->intr_conf.lsc ||
2809 priv->intr_conf.rmv)
2811 ret = rte_intr_callback_unregister(&priv->intr_handle,
2812 mlx4_dev_interrupt_handler,
2816 ERROR("rte_intr_callback_unregister failed with %d %s",
2817 ret, strerror(rte_errno));
2819 priv->intr_handle.fd = 0;
2820 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
2825 * Install interrupt handler.
2828 * Pointer to private structure.
2830 * Pointer to the rte_eth_dev structure.
2833 * 0 on success, negative errno value otherwise and rte_errno is set.
2836 priv_dev_interrupt_handler_install(struct priv *priv,
2837 struct rte_eth_dev *dev)
2843 * Check whether the interrupt handler has already been installed
2844 * for either type of interrupt.
2846 if (priv->intr_conf.lsc &&
2847 priv->intr_conf.rmv &&
2848 priv->intr_handle.fd)
2850 assert(priv->ctx->async_fd > 0);
2851 flags = fcntl(priv->ctx->async_fd, F_GETFL);
2852 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2854 rte_errno = errno ? errno : EINVAL;
2855 INFO("failed to change file descriptor async event queue");
2856 dev->data->dev_conf.intr_conf.lsc = 0;
2857 dev->data->dev_conf.intr_conf.rmv = 0;
2860 priv->intr_handle.fd = priv->ctx->async_fd;
2861 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
2862 rc = rte_intr_callback_register(&priv->intr_handle,
2863 mlx4_dev_interrupt_handler,
2867 ERROR("rte_intr_callback_register failed "
2868 " (rte_errno: %s)", strerror(rte_errno));
2876 * Uninstall interrupt handler.
2879 * Pointer to private structure.
2881 * Pointer to the rte_eth_dev structure.
2884 * 0 on success, negative errno value otherwise and rte_errno is set.
2887 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
2888 struct rte_eth_dev *dev)
2890 if (dev->data->dev_conf.intr_conf.rmv) {
2891 priv->intr_conf.rmv = 0;
2892 return priv_dev_interrupt_handler_uninstall(priv, dev);
2898 * Uninstall interrupt handler.
2901 * Pointer to private structure.
2903 * Pointer to the rte_eth_dev structure.
2906 * 0 on success, negative errno value otherwise and rte_errno is set.
2909 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
2910 struct rte_eth_dev *dev)
2914 if (dev->data->dev_conf.intr_conf.lsc) {
2915 priv->intr_conf.lsc = 0;
2916 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
2920 if (priv->pending_alarm)
2921 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
2923 ERROR("rte_eal_alarm_cancel failed "
2924 " (rte_errno: %s)", strerror(rte_errno));
2927 priv->pending_alarm = 0;
2932 * Install link interrupt handler.
2935 * Pointer to private structure.
2937 * Pointer to the rte_eth_dev structure.
2940 * 0 on success, negative errno value otherwise and rte_errno is set.
2943 priv_dev_link_interrupt_handler_install(struct priv *priv,
2944 struct rte_eth_dev *dev)
2948 if (dev->data->dev_conf.intr_conf.lsc) {
2949 ret = priv_dev_interrupt_handler_install(priv, dev);
2952 priv->intr_conf.lsc = 1;
2958 * Install removal interrupt handler.
2961 * Pointer to private structure.
2963 * Pointer to the rte_eth_dev structure.
2966 * 0 on success, negative errno value otherwise and rte_errno is set.
2969 priv_dev_removal_interrupt_handler_install(struct priv *priv,
2970 struct rte_eth_dev *dev)
2974 if (dev->data->dev_conf.intr_conf.rmv) {
2975 ret = priv_dev_interrupt_handler_install(priv, dev);
2978 priv->intr_conf.rmv = 1;
2984 * Allocate queue vector and fill epoll fd list for Rx interrupts.
2987 * Pointer to private structure.
2990 * 0 on success, negative errno value otherwise and rte_errno is set.
2993 priv_rx_intr_vec_enable(struct priv *priv)
2996 unsigned int rxqs_n = priv->rxqs_n;
2997 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
2998 unsigned int count = 0;
2999 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
3001 if (!priv->dev->data->dev_conf.intr_conf.rxq)
3003 priv_rx_intr_vec_disable(priv);
3004 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
3005 if (intr_handle->intr_vec == NULL) {
3007 ERROR("failed to allocate memory for interrupt vector,"
3008 " Rx interrupts will not be supported");
3011 intr_handle->type = RTE_INTR_HANDLE_EXT;
3012 for (i = 0; i != n; ++i) {
3013 struct rxq *rxq = (*priv->rxqs)[i];
3018 /* Skip queues that cannot request interrupts. */
3019 if (!rxq || !rxq->channel) {
3020 /* Use invalid intr_vec[] index to disable entry. */
3021 intr_handle->intr_vec[i] =
3022 RTE_INTR_VEC_RXTX_OFFSET +
3023 RTE_MAX_RXTX_INTR_VEC_ID;
3026 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
3028 ERROR("too many Rx queues for interrupt vector size"
3029 " (%d), Rx interrupts cannot be enabled",
3030 RTE_MAX_RXTX_INTR_VEC_ID);
3031 priv_rx_intr_vec_disable(priv);
3034 fd = rxq->channel->fd;
3035 flags = fcntl(fd, F_GETFL);
3036 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
3039 ERROR("failed to make Rx interrupt file descriptor"
3040 " %d non-blocking for queue index %d", fd, i);
3041 priv_rx_intr_vec_disable(priv);
3044 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
3045 intr_handle->efds[count] = fd;
3049 priv_rx_intr_vec_disable(priv);
3051 intr_handle->nb_efd = count;
3056 * Clean up Rx interrupts handler.
3059 * Pointer to private structure.
3062 priv_rx_intr_vec_disable(struct priv *priv)
3064 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
3066 rte_intr_free_epoll_fd(intr_handle);
3067 free(intr_handle->intr_vec);
3068 intr_handle->nb_efd = 0;
3069 intr_handle->intr_vec = NULL;
3073 * DPDK callback for Rx queue interrupt enable.
3076 * Pointer to Ethernet device structure.
3081 * 0 on success, negative errno value otherwise and rte_errno is set.
3084 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
3086 struct priv *priv = dev->data->dev_private;
3087 struct rxq *rxq = (*priv->rxqs)[idx];
3090 if (!rxq || !rxq->channel)
3093 ret = ibv_req_notify_cq(rxq->cq, 0);
3096 WARN("unable to arm interrupt on rx queue %d", idx);
3102 * DPDK callback for Rx queue interrupt disable.
3105 * Pointer to Ethernet device structure.
3110 * 0 on success, negative errno value otherwise and rte_errno is set.
3113 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
3115 struct priv *priv = dev->data->dev_private;
3116 struct rxq *rxq = (*priv->rxqs)[idx];
3117 struct ibv_cq *ev_cq;
3121 if (!rxq || !rxq->channel) {
3124 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
3125 if (ret || ev_cq != rxq->cq)
3130 WARN("unable to disable interrupt on rx queue %d",
3133 ibv_ack_cq_events(rxq->cq, 1);
3139 * Verify and store value for device argument.
3142 * Key argument to verify.
3144 * Value associated with key.
3145 * @param[in, out] conf
3146 * Shared configuration data.
3149 * 0 on success, negative errno value otherwise and rte_errno is set.
3152 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
3157 tmp = strtoul(val, NULL, 0);
3160 WARN("%s: \"%s\" is not a valid integer", key, val);
3163 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
3164 uint32_t ports = rte_log2_u32(conf->ports.present);
3167 ERROR("port index %lu outside range [0,%" PRIu32 ")",
3171 if (!(conf->ports.present & (1 << tmp))) {
3173 ERROR("invalid port index %lu", tmp);
3176 conf->ports.enabled |= 1 << tmp;
3179 WARN("%s: unknown parameter", key);
3186 * Parse device parameters.
3189 * Device arguments structure.
3192 * 0 on success, negative errno value otherwise and rte_errno is set.
3195 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
3197 struct rte_kvargs *kvlist;
3198 unsigned int arg_count;
3202 if (devargs == NULL)
3204 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
3205 if (kvlist == NULL) {
3207 ERROR("failed to parse kvargs");
3210 /* Process parameters. */
3211 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
3212 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
3213 while (arg_count-- > 0) {
3214 ret = rte_kvargs_process(kvlist,
3215 MLX4_PMD_PORT_KVARG,
3216 (int (*)(const char *,
3226 rte_kvargs_free(kvlist);
3230 static struct rte_pci_driver mlx4_driver;
3233 * DPDK callback to register a PCI device.
3235 * This function creates an Ethernet device for each port of a given
3238 * @param[in] pci_drv
3239 * PCI driver structure (mlx4_driver).
3240 * @param[in] pci_dev
3241 * PCI device information.
3244 * 0 on success, negative errno value otherwise and rte_errno is set.
3247 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
3249 struct ibv_device **list;
3250 struct ibv_device *ibv_dev;
3252 struct ibv_context *attr_ctx = NULL;
3253 struct ibv_device_attr device_attr;
3254 struct mlx4_conf conf = {
3261 assert(pci_drv == &mlx4_driver);
3262 list = ibv_get_device_list(&i);
3266 if (rte_errno == ENOSYS)
3267 ERROR("cannot list devices, is ib_uverbs loaded?");
3272 * For each listed device, check related sysfs entry against
3273 * the provided PCI ID.
3276 struct rte_pci_addr pci_addr;
3279 DEBUG("checking device \"%s\"", list[i]->name);
3280 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
3282 if ((pci_dev->addr.domain != pci_addr.domain) ||
3283 (pci_dev->addr.bus != pci_addr.bus) ||
3284 (pci_dev->addr.devid != pci_addr.devid) ||
3285 (pci_dev->addr.function != pci_addr.function))
3287 vf = (pci_dev->id.device_id ==
3288 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
3289 INFO("PCI information matches, using device \"%s\" (VF: %s)",
3290 list[i]->name, (vf ? "true" : "false"));
3291 attr_ctx = ibv_open_device(list[i]);
3295 if (attr_ctx == NULL) {
3296 ibv_free_device_list(list);
3300 ERROR("cannot access device, is mlx4_ib loaded?");
3304 ERROR("cannot use device, are drivers up to date?");
3312 DEBUG("device opened");
3313 if (ibv_query_device(attr_ctx, &device_attr)) {
3317 INFO("%u port(s) detected", device_attr.phys_port_cnt);
3318 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
3319 if (mlx4_args(pci_dev->device.devargs, &conf)) {
3320 ERROR("failed to process device arguments");
3324 /* Use all ports when none are defined */
3325 if (!conf.ports.enabled)
3326 conf.ports.enabled = conf.ports.present;
3327 for (i = 0; i < device_attr.phys_port_cnt; i++) {
3328 uint32_t port = i + 1; /* ports are indexed from one */
3329 struct ibv_context *ctx = NULL;
3330 struct ibv_port_attr port_attr;
3331 struct ibv_pd *pd = NULL;
3332 struct priv *priv = NULL;
3333 struct rte_eth_dev *eth_dev = NULL;
3334 struct ether_addr mac;
3336 /* If port is not enabled, skip. */
3337 if (!(conf.ports.enabled & (1 << i)))
3339 DEBUG("using port %u", port);
3340 ctx = ibv_open_device(ibv_dev);
3345 /* Check port status. */
3346 err = ibv_query_port(ctx, port, &port_attr);
3349 ERROR("port query failed: %s", strerror(rte_errno));
3352 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
3353 rte_errno = ENOTSUP;
3354 ERROR("port %d is not configured in Ethernet mode",
3358 if (port_attr.state != IBV_PORT_ACTIVE)
3359 DEBUG("port %d is not active: \"%s\" (%d)",
3360 port, ibv_port_state_str(port_attr.state),
3362 /* Allocate protection domain. */
3363 pd = ibv_alloc_pd(ctx);
3366 ERROR("PD allocation failure");
3369 /* from rte_ethdev.c */
3370 priv = rte_zmalloc("ethdev private structure",
3372 RTE_CACHE_LINE_SIZE);
3375 ERROR("priv allocation failure");
3379 priv->device_attr = device_attr;
3382 priv->mtu = ETHER_MTU;
3384 /* Configure the first MAC address by default. */
3385 if (priv_get_mac(priv, &mac.addr_bytes)) {
3386 ERROR("cannot get MAC address, is mlx4_en loaded?"
3387 " (rte_errno: %s)", strerror(rte_errno));
3390 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
3392 mac.addr_bytes[0], mac.addr_bytes[1],
3393 mac.addr_bytes[2], mac.addr_bytes[3],
3394 mac.addr_bytes[4], mac.addr_bytes[5]);
3395 /* Register MAC address. */
3397 if (priv_mac_addr_add(priv))
3401 char ifname[IF_NAMESIZE];
3403 if (priv_get_ifname(priv, &ifname) == 0)
3404 DEBUG("port %u ifname is \"%s\"",
3405 priv->port, ifname);
3407 DEBUG("port %u ifname is unknown", priv->port);
3410 /* Get actual MTU if possible. */
3411 priv_get_mtu(priv, &priv->mtu);
3412 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
3413 /* from rte_ethdev.c */
3415 char name[RTE_ETH_NAME_MAX_LEN];
3417 snprintf(name, sizeof(name), "%s port %u",
3418 ibv_get_device_name(ibv_dev), port);
3419 eth_dev = rte_eth_dev_allocate(name);
3421 if (eth_dev == NULL) {
3422 ERROR("can not allocate rte ethdev");
3426 eth_dev->data->dev_private = priv;
3427 eth_dev->data->mac_addrs = &priv->mac;
3428 eth_dev->device = &pci_dev->device;
3429 rte_eth_copy_pci_info(eth_dev, pci_dev);
3430 eth_dev->device->driver = &mlx4_driver.driver;
3432 * Copy and override interrupt handle to prevent it from
3433 * being shared between all ethdev instances of a given PCI
3434 * device. This is required to properly handle Rx interrupts
3437 priv->intr_handle_dev = *eth_dev->intr_handle;
3438 eth_dev->intr_handle = &priv->intr_handle_dev;
3439 priv->dev = eth_dev;
3440 eth_dev->dev_ops = &mlx4_dev_ops;
3441 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3442 /* Bring Ethernet device up. */
3443 DEBUG("forcing Ethernet interface up");
3444 priv_set_flags(priv, ~IFF_UP, IFF_UP);
3445 /* Update link status once if waiting for LSC. */
3446 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
3447 mlx4_link_update(eth_dev, 0);
3452 claim_zero(ibv_dealloc_pd(pd));
3454 claim_zero(ibv_close_device(ctx));
3456 rte_eth_dev_release_port(eth_dev);
3459 if (i == device_attr.phys_port_cnt)
3462 * XXX if something went wrong in the loop above, there is a resource
3463 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
3464 * long as the dpdk does not provide a way to deallocate a ethdev and a
3465 * way to enumerate the registered ethdevs to free the previous ones.
3469 claim_zero(ibv_close_device(attr_ctx));
3471 ibv_free_device_list(list);
3472 assert(rte_errno >= 0);
3476 static const struct rte_pci_id mlx4_pci_id_map[] = {
3478 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3479 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
3482 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3483 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
3486 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3487 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
3494 static struct rte_pci_driver mlx4_driver = {
3496 .name = MLX4_DRIVER_NAME
3498 .id_table = mlx4_pci_id_map,
3499 .probe = mlx4_pci_probe,
3500 .drv_flags = RTE_PCI_DRV_INTR_LSC |
3501 RTE_PCI_DRV_INTR_RMV,
3505 * Driver initialization routine.
3507 RTE_INIT(rte_mlx4_pmd_init);
3509 rte_mlx4_pmd_init(void)
3512 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3513 * huge pages. Calling ibv_fork_init() during init allows
3514 * applications to use fork() safely for purposes other than
3515 * using this PMD, which is not supported in forked processes.
3517 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3519 rte_pci_register(&mlx4_driver);
3522 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
3523 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
3524 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
3525 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");