drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 120         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 121         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 122         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 123         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 124         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 125         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 126         device_attr->max_rwq_indirection_table_size =
 127                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 128         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 129         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 130
 131         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 132         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 133         if (err)
 134                 return err;
 135
 136         device_attr->flags = dv_attr.flags;
 137         device_attr->comp_mask = dv_attr.comp_mask;
 138 #ifdef HAVE_IBV_MLX5_MOD_SWP
 139         device_attr->sw_parsing_offloads =
 140                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 141 #endif
 142         device_attr->min_single_stride_log_num_of_bytes =
 143                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 144         device_attr->max_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 146         device_attr->min_single_wqe_log_num_of_strides =
 147                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 148         device_attr->max_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 150         device_attr->stride_supported_qpts =
 151                 dv_attr.striding_rq_caps.supported_qpts;
 152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 153         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 154 #endif
 155
 156         return err;
 157 }
 158
 159 /**
 160  * Verbs callback to allocate a memory. This function should allocate the space
 161  * according to the size provided residing inside a huge page.
 162  * Please note that all allocation must respect the alignment from libmlx5
 163  * (i.e. currently rte_mem_page_size()).
 164  *
 165  * @param[in] size
 166  *   The size in bytes of the memory to allocate.
 167  * @param[in] data
 168  *   A pointer to the callback data.
 169  *
 170  * @return
 171  *   Allocated buffer, NULL otherwise and rte_errno is set.
 172  */
 173 static void *
 174 mlx5_alloc_verbs_buf(size_t size, void *data)
 175 {
 176         struct mlx5_dev_ctx_shared *sh = data;
 177         void *ret;
 178         size_t alignment = rte_mem_page_size();
 179         if (alignment == (size_t)-1) {
 180                 DRV_LOG(ERR, "Failed to get mem page size");
 181                 rte_errno = ENOMEM;
 182                 return NULL;
 183         }
 184
 185         MLX5_ASSERT(data != NULL);
 186         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 187         if (!ret && size)
 188                 rte_errno = ENOMEM;
 189         return ret;
 190 }
 191
 192 /**
 193  * Verbs callback to free a memory.
 194  *
 195  * @param[in] ptr
 196  *   A pointer to the memory to free.
 197  * @param[in] data
 198  *   A pointer to the callback data.
 199  */
 200 static void
 201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 202 {
 203         MLX5_ASSERT(data != NULL);
 204         mlx5_free(ptr);
 205 }
 206
 207 /**
 208  * Initialize DR related data within private structure.
 209  * Routine checks the reference counter and does actual
 210  * resources creation/initialization only if counter is zero.
 211  *
 212  * @param[in] priv
 213  *   Pointer to the private device data structure.
 214  *
 215  * @return
 216  *   Zero on success, positive error code otherwise.
 217  */
 218 static int
 219 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 220 {
 221         struct mlx5_dev_ctx_shared *sh = priv->sh;
 222         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 223         int err;
 224
 225         MLX5_ASSERT(sh && sh->refcnt);
 226         if (sh->refcnt > 1)
 227                 return 0;
 228         err = mlx5_alloc_table_hash_list(priv);
 229         if (err)
 230                 goto error;
 231         /* The resources below are only valid with DV support. */
 232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 233         /* Init port id action cache list. */
 234         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 235         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 236                              flow_dv_port_id_create_cb,
 237                              flow_dv_port_id_match_cb,
 238                              flow_dv_port_id_remove_cb);
 239         /* Init push vlan action cache list. */
 240         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 242                              flow_dv_push_vlan_create_cb,
 243                              flow_dv_push_vlan_match_cb,
 244                              flow_dv_push_vlan_remove_cb);
 245         /* Init sample action cache list. */
 246         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 248                              flow_dv_sample_create_cb,
 249                              flow_dv_sample_match_cb,
 250                              flow_dv_sample_remove_cb);
 251         /* Init dest array action cache list. */
 252         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 254                              flow_dv_dest_array_create_cb,
 255                              flow_dv_dest_array_match_cb,
 256                              flow_dv_dest_array_remove_cb);
 257         /* Create tags hash list table. */
 258         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 259         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 260                                           MLX5_HLIST_WRITE_MOST,
 261                                           flow_dv_tag_create_cb,
 262                                           flow_dv_tag_match_cb,
 263                                           flow_dv_tag_remove_cb);
 264         if (!sh->tag_table) {
 265                 DRV_LOG(ERR, "tags with hash creation failed.");
 266                 err = ENOMEM;
 267                 goto error;
 268         }
 269         sh->tag_table->ctx = sh;
 270         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 271         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 272                                             0, MLX5_HLIST_WRITE_MOST |
 273                                             MLX5_HLIST_DIRECT_KEY,
 274                                             flow_dv_modify_create_cb,
 275                                             flow_dv_modify_match_cb,
 276                                             flow_dv_modify_remove_cb);
 277         if (!sh->modify_cmds) {
 278                 DRV_LOG(ERR, "hdr modify hash creation failed");
 279                 err = ENOMEM;
 280                 goto error;
 281         }
 282         sh->modify_cmds->ctx = sh;
 283         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 284         sh->encaps_decaps = mlx5_hlist_create(s,
 285                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 286                                               0, MLX5_HLIST_DIRECT_KEY |
 287                                               MLX5_HLIST_WRITE_MOST,
 288                                               flow_dv_encap_decap_create_cb,
 289                                               flow_dv_encap_decap_match_cb,
 290                                               flow_dv_encap_decap_remove_cb);
 291         if (!sh->encaps_decaps) {
 292                 DRV_LOG(ERR, "encap decap hash creation failed");
 293                 err = ENOMEM;
 294                 goto error;
 295         }
 296         sh->encaps_decaps->ctx = sh;
 297 #endif
 298 #ifdef HAVE_MLX5DV_DR
 299         void *domain;
 300
 301         /* Reference counter is zero, we should initialize structures. */
 302         domain = mlx5_glue->dr_create_domain(sh->ctx,
 303                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 304         if (!domain) {
 305                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 306                 err = errno;
 307                 goto error;
 308         }
 309         sh->rx_domain = domain;
 310         domain = mlx5_glue->dr_create_domain(sh->ctx,
 311                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 312         if (!domain) {
 313                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 314                 err = errno;
 315                 goto error;
 316         }
 317         sh->tx_domain = domain;
 318 #ifdef HAVE_MLX5DV_DR_ESWITCH
 319         if (priv->config.dv_esw_en) {
 320                 domain  = mlx5_glue->dr_create_domain
 321                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 322                 if (!domain) {
 323                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 324                         err = errno;
 325                         goto error;
 326                 }
 327                 sh->fdb_domain = domain;
 328                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 329         }
 330 #endif
 331         if (!sh->tunnel_hub)
 332                 err = mlx5_alloc_tunnel_hub(sh);
 333         if (err) {
 334                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 335                 goto error;
 336         }
 337         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 338                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 339                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 340                 if (sh->fdb_domain)
 341                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 342         }
 343         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 344 #endif /* HAVE_MLX5DV_DR */
 345         sh->default_miss_action =
 346                         mlx5_glue->dr_create_flow_action_default_miss();
 347         if (!sh->default_miss_action)
 348                 DRV_LOG(WARNING, "Default miss action is not supported.");
 349         return 0;
 350 error:
 351         /* Rollback the created objects. */
 352         if (sh->rx_domain) {
 353                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 354                 sh->rx_domain = NULL;
 355         }
 356         if (sh->tx_domain) {
 357                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 358                 sh->tx_domain = NULL;
 359         }
 360         if (sh->fdb_domain) {
 361                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 362                 sh->fdb_domain = NULL;
 363         }
 364         if (sh->esw_drop_action) {
 365                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 366                 sh->esw_drop_action = NULL;
 367         }
 368         if (sh->pop_vlan_action) {
 369                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 370                 sh->pop_vlan_action = NULL;
 371         }
 372         if (sh->encaps_decaps) {
 373                 mlx5_hlist_destroy(sh->encaps_decaps);
 374                 sh->encaps_decaps = NULL;
 375         }
 376         if (sh->modify_cmds) {
 377                 mlx5_hlist_destroy(sh->modify_cmds);
 378                 sh->modify_cmds = NULL;
 379         }
 380         if (sh->tag_table) {
 381                 /* tags should be destroyed with flow before. */
 382                 mlx5_hlist_destroy(sh->tag_table);
 383                 sh->tag_table = NULL;
 384         }
 385         if (sh->tunnel_hub) {
 386                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 387                 sh->tunnel_hub = NULL;
 388         }
 389         mlx5_free_table_hash_list(priv);
 390         return err;
 391 }
 392
 393 /**
 394  * Destroy DR related data within private structure.
 395  *
 396  * @param[in] priv
 397  *   Pointer to the private device data structure.
 398  */
 399 void
 400 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 401 {
 402         struct mlx5_dev_ctx_shared *sh = priv->sh;
 403
 404         MLX5_ASSERT(sh && sh->refcnt);
 405         if (sh->refcnt > 1)
 406                 return;
 407 #ifdef HAVE_MLX5DV_DR
 408         if (sh->rx_domain) {
 409                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 410                 sh->rx_domain = NULL;
 411         }
 412         if (sh->tx_domain) {
 413                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 414                 sh->tx_domain = NULL;
 415         }
 416 #ifdef HAVE_MLX5DV_DR_ESWITCH
 417         if (sh->fdb_domain) {
 418                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 419                 sh->fdb_domain = NULL;
 420         }
 421         if (sh->esw_drop_action) {
 422                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 423                 sh->esw_drop_action = NULL;
 424         }
 425 #endif
 426         if (sh->pop_vlan_action) {
 427                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 428                 sh->pop_vlan_action = NULL;
 429         }
 430 #endif /* HAVE_MLX5DV_DR */
 431         if (sh->default_miss_action)
 432                 mlx5_glue->destroy_flow_action
 433                                 (sh->default_miss_action);
 434         if (sh->encaps_decaps) {
 435                 mlx5_hlist_destroy(sh->encaps_decaps);
 436                 sh->encaps_decaps = NULL;
 437         }
 438         if (sh->modify_cmds) {
 439                 mlx5_hlist_destroy(sh->modify_cmds);
 440                 sh->modify_cmds = NULL;
 441         }
 442         if (sh->tag_table) {
 443                 /* tags should be destroyed with flow before. */
 444                 mlx5_hlist_destroy(sh->tag_table);
 445                 sh->tag_table = NULL;
 446         }
 447         if (sh->tunnel_hub) {
 448                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 449                 sh->tunnel_hub = NULL;
 450         }
 451         mlx5_cache_list_destroy(&sh->port_id_action_list);
 452         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 453         mlx5_free_table_hash_list(priv);
 454 }
 455
 456 /**
 457  * Initialize shared data between primary and secondary process.
 458  *
 459  * A memzone is reserved by primary process and secondary processes attach to
 460  * the memzone.
 461  *
 462  * @return
 463  *   0 on success, a negative errno value otherwise and rte_errno is set.
 464  */
 465 static int
 466 mlx5_init_shared_data(void)
 467 {
 468         const struct rte_memzone *mz;
 469         int ret = 0;
 470
 471         rte_spinlock_lock(&mlx5_shared_data_lock);
 472         if (mlx5_shared_data == NULL) {
 473                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 474                         /* Allocate shared memory. */
 475                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 476                                                  sizeof(*mlx5_shared_data),
 477                                                  SOCKET_ID_ANY, 0);
 478                         if (mz == NULL) {
 479                                 DRV_LOG(ERR,
 480                                         "Cannot allocate mlx5 shared data");
 481                                 ret = -rte_errno;
 482                                 goto error;
 483                         }
 484                         mlx5_shared_data = mz->addr;
 485                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 486                         rte_spinlock_init(&mlx5_shared_data->lock);
 487                 } else {
 488                         /* Lookup allocated shared memory. */
 489                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 490                         if (mz == NULL) {
 491                                 DRV_LOG(ERR,
 492                                         "Cannot attach mlx5 shared data");
 493                                 ret = -rte_errno;
 494                                 goto error;
 495                         }
 496                         mlx5_shared_data = mz->addr;
 497                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 498                 }
 499         }
 500 error:
 501         rte_spinlock_unlock(&mlx5_shared_data_lock);
 502         return ret;
 503 }
 504
 505 /**
 506  * PMD global initialization.
 507  *
 508  * Independent from individual device, this function initializes global
 509  * per-PMD data structures distinguishing primary and secondary processes.
 510  * Hence, each initialization is called once per a process.
 511  *
 512  * @return
 513  *   0 on success, a negative errno value otherwise and rte_errno is set.
 514  */
 515 static int
 516 mlx5_init_once(void)
 517 {
 518         struct mlx5_shared_data *sd;
 519         struct mlx5_local_data *ld = &mlx5_local_data;
 520         int ret = 0;
 521
 522         if (mlx5_init_shared_data())
 523                 return -rte_errno;
 524         sd = mlx5_shared_data;
 525         MLX5_ASSERT(sd);
 526         rte_spinlock_lock(&sd->lock);
 527         switch (rte_eal_process_type()) {
 528         case RTE_PROC_PRIMARY:
 529                 if (sd->init_done)
 530                         break;
 531                 LIST_INIT(&sd->mem_event_cb_list);
 532                 rte_rwlock_init(&sd->mem_event_rwlock);
 533                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 534                                                 mlx5_mr_mem_event_cb, NULL);
 535                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 536                                            mlx5_mp_os_primary_handle);
 537                 if (ret)
 538                         goto out;
 539                 sd->init_done = true;
 540                 break;
 541         case RTE_PROC_SECONDARY:
 542                 if (ld->init_done)
 543                         break;
 544                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 545                                              mlx5_mp_os_secondary_handle);
 546                 if (ret)
 547                         goto out;
 548                 ++sd->secondary_cnt;
 549                 ld->init_done = true;
 550                 break;
 551         default:
 552                 break;
 553         }
 554 out:
 555         rte_spinlock_unlock(&sd->lock);
 556         return ret;
 557 }
 558
 559 /**
 560  * Create the Tx queue DevX/Verbs object.
 561  *
 562  * @param dev
 563  *   Pointer to Ethernet device.
 564  * @param idx
 565  *   Queue index in DPDK Tx queue array.
 566  *
 567  * @return
 568  *   0 on success, a negative errno value otherwise and rte_errno is set.
 569  */
 570 static int
 571 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 572 {
 573         struct mlx5_priv *priv = dev->data->dev_private;
 574         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 575         struct mlx5_txq_ctrl *txq_ctrl =
 576                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 577
 578         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 579                 return mlx5_txq_devx_obj_new(dev, idx);
 580 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 581         if (!priv->config.dv_esw_en)
 582                 return mlx5_txq_devx_obj_new(dev, idx);
 583 #endif
 584         return mlx5_txq_ibv_obj_new(dev, idx);
 585 }
 586
 587 /**
 588  * Release an Tx DevX/verbs queue object.
 589  *
 590  * @param txq_obj
 591  *   DevX/Verbs Tx queue object.
 592  */
 593 static void
 594 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 595 {
 596         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 597                 mlx5_txq_devx_obj_release(txq_obj);
 598                 return;
 599         }
 600 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 601         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 602                 mlx5_txq_devx_obj_release(txq_obj);
 603                 return;
 604         }
 605 #endif
 606         mlx5_txq_ibv_obj_release(txq_obj);
 607 }
 608
 609 /**
 610  * DV flow counter mode detect and config.
 611  *
 612  * @param dev
 613  *   Pointer to rte_eth_dev structure.
 614  *
 615  */
 616 static void
 617 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 618 {
 619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 620         struct mlx5_priv *priv = dev->data->dev_private;
 621         struct mlx5_dev_ctx_shared *sh = priv->sh;
 622         bool fallback;
 623
 624 #ifndef HAVE_IBV_DEVX_ASYNC
 625         fallback = true;
 626 #else
 627         fallback = false;
 628         if (!priv->config.devx || !priv->config.dv_flow_en ||
 629             !priv->config.hca_attr.flow_counters_dump ||
 630             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 631             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 632                 fallback = true;
 633 #endif
 634         if (fallback)
 635                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 636                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 637                         priv->config.hca_attr.flow_counters_dump,
 638                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 639         /* Initialize fallback mode only on the port initializes sh. */
 640         if (sh->refcnt == 1)
 641                 sh->cmng.counter_fallback = fallback;
 642         else if (fallback != sh->cmng.counter_fallback)
 643                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 644                         "with others:%d.", PORT_ID(priv), fallback);
 645 #endif
 646 }
 647
 648 static void
 649 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 650 {
 651         struct mlx5_priv *priv = dev->data->dev_private;
 652         void *ctx = priv->sh->ctx;
 653
 654         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 655         if (!priv->q_counters) {
 656                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 657                 struct ibv_wq *wq;
 658
 659                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 660                         "by DevX - fall-back to use the kernel driver global "
 661                         "queue counter.", dev->data->port_id);
 662                 /* Create WQ by kernel and query its queue counter ID. */
 663                 if (cq) {
 664                         wq = mlx5_glue->create_wq(ctx,
 665                                                   &(struct ibv_wq_init_attr){
 666                                                     .wq_type = IBV_WQT_RQ,
 667                                                     .max_wr = 1,
 668                                                     .max_sge = 1,
 669                                                     .pd = priv->sh->pd,
 670                                                     .cq = cq,
 671                                                 });
 672                         if (wq) {
 673                                 /* Counter is assigned only on RDY state. */
 674                                 int ret = mlx5_glue->modify_wq(wq,
 675                                                  &(struct ibv_wq_attr){
 676                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 677                                                  .wq_state = IBV_WQS_RDY,
 678                                                 });
 679
 680                                 if (ret == 0)
 681                                         mlx5_devx_cmd_wq_query(wq,
 682                                                          &priv->counter_set_id);
 683                                 claim_zero(mlx5_glue->destroy_wq(wq));
 684                         }
 685                         claim_zero(mlx5_glue->destroy_cq(cq));
 686                 }
 687         } else {
 688                 priv->counter_set_id = priv->q_counters->id;
 689         }
 690         if (priv->counter_set_id == 0)
 691                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 692                         "available.", dev->data->port_id);
 693 }
 694
 695 /**
 696  * Spawn an Ethernet device from Verbs information.
 697  *
 698  * @param dpdk_dev
 699  *   Backing DPDK device.
 700  * @param spawn
 701  *   Verbs device parameters (name, port, switch_info) to spawn.
 702  * @param config
 703  *   Device configuration parameters.
 704  * @param config
 705  *   Device arguments.
 706  *
 707  * @return
 708  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 709  *   is set. The following errors are defined:
 710  *
 711  *   EBUSY: device is not supposed to be spawned.
 712  *   EEXIST: device is already spawned
 713  */
 714 static struct rte_eth_dev *
 715 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 716                struct mlx5_dev_spawn_data *spawn,
 717                struct mlx5_dev_config *config,
 718                struct rte_eth_devargs *eth_da)
 719 {
 720         const struct mlx5_switch_info *switch_info = &spawn->info;
 721         struct mlx5_dev_ctx_shared *sh = NULL;
 722         struct ibv_port_attr port_attr;
 723         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 724         struct rte_eth_dev *eth_dev = NULL;
 725         struct mlx5_priv *priv = NULL;
 726         int err = 0;
 727         unsigned int hw_padding = 0;
 728         unsigned int mps;
 729         unsigned int tunnel_en = 0;
 730         unsigned int mpls_en = 0;
 731         unsigned int swp = 0;
 732         unsigned int mprq = 0;
 733         unsigned int mprq_min_stride_size_n = 0;
 734         unsigned int mprq_max_stride_size_n = 0;
 735         unsigned int mprq_min_stride_num_n = 0;
 736         unsigned int mprq_max_stride_num_n = 0;
 737         struct rte_ether_addr mac;
 738         char name[RTE_ETH_NAME_MAX_LEN];
 739         int own_domain_id = 0;
 740         uint16_t port_id;
 741         unsigned int i;
 742 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 743         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 744 #endif
 745
 746         /* Determine if this port representor is supposed to be spawned. */
 747         if (switch_info->representor && dpdk_dev->devargs) {
 748                 switch (eth_da->type) {
 749                 case RTE_ETH_REPRESENTOR_SF:
 750                         if (switch_info->name_type !=
 751                                         MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 752                                 rte_errno = EBUSY;
 753                                 return NULL;
 754                         }
 755                         break;
 756                 case RTE_ETH_REPRESENTOR_VF:
 757                         /* Allows HPF representor index -1 as exception. */
 758                         if (!(spawn->info.port_name == -1 &&
 759                               switch_info->name_type ==
 760                                         MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 761                             switch_info->name_type !=
 762                                         MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 763                                 rte_errno = EBUSY;
 764                                 return NULL;
 765                         }
 766                         break;
 767                 case RTE_ETH_REPRESENTOR_NONE:
 768                         rte_errno = EBUSY;
 769                         return NULL;
 770                         break;
 771                 default:
 772                         rte_errno = ENOTSUP;
 773                         DRV_LOG(ERR, "unsupported representor type: %s",
 774                                 dpdk_dev->devargs->args);
 775                         return NULL;
 776                 }
 777                 /* Check controller ID: */
 778                 for (i = 0; i < eth_da->nb_mh_controllers; ++i)
 779                         if (eth_da->mh_controllers[i] ==
 780                             (uint16_t)switch_info->ctrl_num)
 781                                 break;
 782                 if (eth_da->nb_mh_controllers &&
 783                     i == eth_da->nb_mh_controllers) {
 784                         rte_errno = EBUSY;
 785                         return NULL;
 786                 }
 787                 /* Check SF/VF ID: */
 788                 for (i = 0; i < eth_da->nb_representor_ports; ++i)
 789                         if (eth_da->representor_ports[i] ==
 790                             (uint16_t)switch_info->port_name)
 791                                 break;
 792                 if (eth_da->type != RTE_ETH_REPRESENTOR_PF &&
 793                     i == eth_da->nb_representor_ports) {
 794                         rte_errno = EBUSY;
 795                         return NULL;
 796                 }
 797                 /* Check PF ID. Check after repr port to avoid warning flood. */
 798                 if (spawn->pf_bond >= 0) {
 799                         for (i = 0; i < eth_da->nb_ports; ++i)
 800                                 if (eth_da->ports[i] ==
 801                                     (uint16_t)switch_info->pf_num)
 802                                         break;
 803                         if (eth_da->nb_ports && i == eth_da->nb_ports) {
 804                                 /* For backward compatibility, bonding
 805                                  * representor syntax supported with limitation,
 806                                  * device iterator won't find it:
 807                                  *    <PF1_BDF>,representor=#
 808                                  */
 809                                 if (switch_info->pf_num > 0 &&
 810                                     eth_da->ports[0] == 0) {
 811                                         DRV_LOG(WARNING, "Representor on Bonding PF should use pf#vf# format: %s",
 812                                                 dpdk_dev->devargs->args);
 813                                 } else {
 814                                         rte_errno = EBUSY;
 815                                         return NULL;
 816                                 }
 817                         }
 818                 } else if (eth_da->nb_ports > 1 || eth_da->ports[0]) {
 819                         rte_errno = EINVAL;
 820                         DRV_LOG(ERR, "PF id not supported by non-bond device: %s",
 821                                 dpdk_dev->devargs->args);
 822                         return NULL;
 823                 }
 824         }
 825         /* Build device name. */
 826         if (spawn->pf_bond <  0) {
 827                 /* Single device. */
 828                 if (!switch_info->representor)
 829                         strlcpy(name, dpdk_dev->name, sizeof(name));
 830                 else
 831                         snprintf(name, sizeof(name), "%s_representor_%s%u",
 832                                  dpdk_dev->name,
 833                                  switch_info->name_type ==
 834                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 835                                  switch_info->port_name);
 836         } else {
 837                 /* Bonding device. */
 838                 if (!switch_info->representor)
 839                         snprintf(name, sizeof(name), "%s_%s",
 840                                  dpdk_dev->name,
 841                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 842                 else
 843                         snprintf(name, sizeof(name), "%s_%s_representor_%s%u",
 844                                  dpdk_dev->name,
 845                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 846                                  switch_info->name_type ==
 847                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 848                                  switch_info->port_name);
 849         }
 850         /* check if the device is already spawned */
 851         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 852                 rte_errno = EEXIST;
 853                 return NULL;
 854         }
 855         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 856         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 857                 struct mlx5_mp_id mp_id;
 858
 859                 eth_dev = rte_eth_dev_attach_secondary(name);
 860                 if (eth_dev == NULL) {
 861                         DRV_LOG(ERR, "can not attach rte ethdev");
 862                         rte_errno = ENOMEM;
 863                         return NULL;
 864                 }
 865                 priv = eth_dev->data->dev_private;
 866                 if (priv->sh->bond_dev != UINT16_MAX)
 867                         /* For bonding port, use primary PCI device. */
 868                         eth_dev->device =
 869                                 rte_eth_devices[priv->sh->bond_dev].device;
 870                 else
 871                         eth_dev->device = dpdk_dev;
 872                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 873                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 874                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 875                 err = mlx5_proc_priv_init(eth_dev);
 876                 if (err)
 877                         return NULL;
 878                 mp_id.port_id = eth_dev->data->port_id;
 879                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 880                 /* Receive command fd from primary process */
 881                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 882                 if (err < 0)
 883                         goto err_secondary;
 884                 /* Remap UAR for Tx queues. */
 885                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 886                 if (err)
 887                         goto err_secondary;
 888                 /*
 889                  * Ethdev pointer is still required as input since
 890                  * the primary device is not accessible from the
 891                  * secondary process.
 892                  */
 893                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 894                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 895                 return eth_dev;
 896 err_secondary:
 897                 mlx5_dev_close(eth_dev);
 898                 return NULL;
 899         }
 900         /*
 901          * Some parameters ("tx_db_nc" in particularly) are needed in
 902          * advance to create dv/verbs device context. We proceed the
 903          * devargs here to get ones, and later proceed devargs again
 904          * to override some hardware settings.
 905          */
 906         err = mlx5_args(config, dpdk_dev->devargs);
 907         if (err) {
 908                 err = rte_errno;
 909                 DRV_LOG(ERR, "failed to process device arguments: %s",
 910                         strerror(rte_errno));
 911                 goto error;
 912         }
 913         if (config->dv_miss_info) {
 914                 if (switch_info->master || switch_info->representor)
 915                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 916         }
 917         mlx5_malloc_mem_select(config->sys_mem_en);
 918         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 919         if (!sh)
 920                 return NULL;
 921         config->devx = sh->devx;
 922 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 923         config->dest_tir = 1;
 924 #endif
 925 #ifdef HAVE_IBV_MLX5_MOD_SWP
 926         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 927 #endif
 928         /*
 929          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 930          * as all ConnectX-5 devices.
 931          */
 932 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 933         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 934 #endif
 935 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 936         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 937 #endif
 938         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 939         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 940                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 941                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 942                         mps = MLX5_MPW_ENHANCED;
 943                 } else {
 944                         DRV_LOG(DEBUG, "MPW is supported");
 945                         mps = MLX5_MPW;
 946                 }
 947         } else {
 948                 DRV_LOG(DEBUG, "MPW isn't supported");
 949                 mps = MLX5_MPW_DISABLED;
 950         }
 951 #ifdef HAVE_IBV_MLX5_MOD_SWP
 952         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 953                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 954         DRV_LOG(DEBUG, "SWP support: %u", swp);
 955 #endif
 956         config->swp = !!swp;
 957 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 958         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 959                 struct mlx5dv_striding_rq_caps mprq_caps =
 960                         dv_attr.striding_rq_caps;
 961
 962                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 963                         mprq_caps.min_single_stride_log_num_of_bytes);
 964                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 965                         mprq_caps.max_single_stride_log_num_of_bytes);
 966                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 967                         mprq_caps.min_single_wqe_log_num_of_strides);
 968                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 969                         mprq_caps.max_single_wqe_log_num_of_strides);
 970                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 971                         mprq_caps.supported_qpts);
 972                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 973                 mprq = 1;
 974                 mprq_min_stride_size_n =
 975                         mprq_caps.min_single_stride_log_num_of_bytes;
 976                 mprq_max_stride_size_n =
 977                         mprq_caps.max_single_stride_log_num_of_bytes;
 978                 mprq_min_stride_num_n =
 979                         mprq_caps.min_single_wqe_log_num_of_strides;
 980                 mprq_max_stride_num_n =
 981                         mprq_caps.max_single_wqe_log_num_of_strides;
 982         }
 983 #endif
 984         /* Rx CQE compression is enabled by default. */
 985         config->cqe_comp = 1;
 986 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 987         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 988                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 989                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 990                              (dv_attr.tunnel_offloads_caps &
 991                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 992                              (dv_attr.tunnel_offloads_caps &
 993                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 994         }
 995         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 996                 tunnel_en ? "" : "not ");
 997 #else
 998         DRV_LOG(WARNING,
 999                 "tunnel offloading disabled due to old OFED/rdma-core version");
1000 #endif
1001         config->tunnel_en = tunnel_en;
1002 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1003         mpls_en = ((dv_attr.tunnel_offloads_caps &
1004                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1005                    (dv_attr.tunnel_offloads_caps &
1006                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1007         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1008                 mpls_en ? "" : "not ");
1009 #else
1010         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1011                 " old OFED/rdma-core version or firmware configuration");
1012 #endif
1013         config->mpls_en = mpls_en;
1014         /* Check port status. */
1015         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1016         if (err) {
1017                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1018                 goto error;
1019         }
1020         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1021                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1022                 err = EINVAL;
1023                 goto error;
1024         }
1025         if (port_attr.state != IBV_PORT_ACTIVE)
1026                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1027                         mlx5_glue->port_state_str(port_attr.state),
1028                         port_attr.state);
1029         /* Allocate private eth device data. */
1030         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1031                            sizeof(*priv),
1032                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1033         if (priv == NULL) {
1034                 DRV_LOG(ERR, "priv allocation failure");
1035                 err = ENOMEM;
1036                 goto error;
1037         }
1038         priv->sh = sh;
1039         priv->dev_port = spawn->phys_port;
1040         priv->pci_dev = spawn->pci_dev;
1041         priv->mtu = RTE_ETHER_MTU;
1042         /* Some internal functions rely on Netlink sockets, open them now. */
1043         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1044         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1045         priv->representor = !!switch_info->representor;
1046         priv->master = !!switch_info->master;
1047         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1048         priv->vport_meta_tag = 0;
1049         priv->vport_meta_mask = 0;
1050         priv->pf_bond = spawn->pf_bond;
1051 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1052         /*
1053          * The DevX port query API is implemented. E-Switch may use
1054          * either vport or reg_c[0] metadata register to match on
1055          * vport index. The engaged part of metadata register is
1056          * defined by mask.
1057          */
1058         if (switch_info->representor || switch_info->master) {
1059                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1060                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1061                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1062                                                  &devx_port);
1063                 if (err) {
1064                         DRV_LOG(WARNING,
1065                                 "can't query devx port %d on device %s",
1066                                 spawn->phys_port,
1067                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1068                         devx_port.comp_mask = 0;
1069                 }
1070         }
1071         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1072                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1073                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1074                 if (!priv->vport_meta_mask) {
1075                         DRV_LOG(ERR, "vport zero mask for port %d"
1076                                      " on bonding device %s",
1077                                      spawn->phys_port,
1078                                      mlx5_os_get_dev_device_name
1079                                                         (spawn->phys_dev));
1080                         err = ENOTSUP;
1081                         goto error;
1082                 }
1083                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1084                         DRV_LOG(ERR, "invalid vport tag for port %d"
1085                                      " on bonding device %s",
1086                                      spawn->phys_port,
1087                                      mlx5_os_get_dev_device_name
1088                                                         (spawn->phys_dev));
1089                         err = ENOTSUP;
1090                         goto error;
1091                 }
1092         }
1093         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1094                 priv->vport_id = devx_port.vport_num;
1095         } else if (spawn->pf_bond >= 0) {
1096                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1097                              " on bonding device %s",
1098                              spawn->phys_port,
1099                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1100                 err = ENOTSUP;
1101                 goto error;
1102         } else {
1103                 /* Suppose vport index in compatible way. */
1104                 priv->vport_id = switch_info->representor ?
1105                                  switch_info->port_name + 1 : -1;
1106         }
1107 #else
1108         /*
1109          * Kernel/rdma_core support single E-Switch per PF configurations
1110          * only and vport_id field contains the vport index for
1111          * associated VF, which is deduced from representor port name.
1112          * For example, let's have the IB device port 10, it has
1113          * attached network device eth0, which has port name attribute
1114          * pf0vf2, we can deduce the VF number as 2, and set vport index
1115          * as 3 (2+1). This assigning schema should be changed if the
1116          * multiple E-Switch instances per PF configurations or/and PCI
1117          * subfunctions are added.
1118          */
1119         priv->vport_id = switch_info->representor ?
1120                          switch_info->port_name + 1 : -1;
1121 #endif
1122         priv->representor_id = mlx5_representor_id_encode(switch_info);
1123         /*
1124          * Look for sibling devices in order to reuse their switch domain
1125          * if any, otherwise allocate one.
1126          */
1127         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1128                 const struct mlx5_priv *opriv =
1129                         rte_eth_devices[port_id].data->dev_private;
1130
1131                 if (!opriv ||
1132                     opriv->sh != priv->sh ||
1133                         opriv->domain_id ==
1134                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1135                         continue;
1136                 priv->domain_id = opriv->domain_id;
1137                 break;
1138         }
1139         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1140                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1141                 if (err) {
1142                         err = rte_errno;
1143                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1144                                 strerror(rte_errno));
1145                         goto error;
1146                 }
1147                 own_domain_id = 1;
1148         }
1149         /* Override some values set by hardware configuration. */
1150         mlx5_args(config, dpdk_dev->devargs);
1151         err = mlx5_dev_check_sibling_config(priv, config);
1152         if (err)
1153                 goto error;
1154         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1155                             IBV_DEVICE_RAW_IP_CSUM);
1156         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1157                 (config->hw_csum ? "" : "not "));
1158 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1159         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1160         DRV_LOG(DEBUG, "counters are not supported");
1161 #endif
1162 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1163         if (config->dv_flow_en) {
1164                 DRV_LOG(WARNING, "DV flow is not supported");
1165                 config->dv_flow_en = 0;
1166         }
1167 #endif
1168         config->ind_table_max_size =
1169                 sh->device_attr.max_rwq_indirection_table_size;
1170         /*
1171          * Remove this check once DPDK supports larger/variable
1172          * indirection tables.
1173          */
1174         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1175                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1176         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1177                 config->ind_table_max_size);
1178         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1179                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1180         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1181                 (config->hw_vlan_strip ? "" : "not "));
1182         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1183                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1184 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1185         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1186 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1187         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1188                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1189 #endif
1190         if (config->hw_padding && !hw_padding) {
1191                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1192                 config->hw_padding = 0;
1193         } else if (config->hw_padding) {
1194                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1195         }
1196         config->tso = (sh->device_attr.max_tso > 0 &&
1197                       (sh->device_attr.tso_supported_qpts &
1198                        (1 << IBV_QPT_RAW_PACKET)));
1199         if (config->tso)
1200                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1201         /*
1202          * MPW is disabled by default, while the Enhanced MPW is enabled
1203          * by default.
1204          */
1205         if (config->mps == MLX5_ARG_UNSET)
1206                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1207                                                           MLX5_MPW_DISABLED;
1208         else
1209                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1210         DRV_LOG(INFO, "%sMPS is %s",
1211                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1212                 config->mps == MLX5_MPW ? "legacy " : "",
1213                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1214         if (config->devx) {
1215                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1216                 if (err) {
1217                         err = -err;
1218                         goto error;
1219                 }
1220                 /* Check relax ordering support. */
1221                 if (!haswell_broadwell_cpu) {
1222                         sh->cmng.relaxed_ordering_write =
1223                                 config->hca_attr.relaxed_ordering_write;
1224                         sh->cmng.relaxed_ordering_read =
1225                                 config->hca_attr.relaxed_ordering_read;
1226                 } else {
1227                         sh->cmng.relaxed_ordering_read = 0;
1228                         sh->cmng.relaxed_ordering_write = 0;
1229                 }
1230                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1231                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1232                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1233                 /* Check for LRO support. */
1234                 if (config->dest_tir && config->hca_attr.lro_cap &&
1235                     config->dv_flow_en) {
1236                         /* TBD check tunnel lro caps. */
1237                         config->lro.supported = config->hca_attr.lro_cap;
1238                         DRV_LOG(DEBUG, "Device supports LRO");
1239                         /*
1240                          * If LRO timeout is not configured by application,
1241                          * use the minimal supported value.
1242                          */
1243                         if (!config->lro.timeout)
1244                                 config->lro.timeout =
1245                                 config->hca_attr.lro_timer_supported_periods[0];
1246                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1247                                 config->lro.timeout);
1248                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1249                                 "required for coalescing is %d bytes",
1250                                 config->hca_attr.lro_min_mss_size);
1251                 }
1252 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1253                 if (config->hca_attr.qos.sup &&
1254                     config->hca_attr.qos.flow_meter_old &&
1255                     config->dv_flow_en) {
1256                         uint8_t reg_c_mask =
1257                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1258                         /*
1259                          * Meter needs two REG_C's for color match and pre-sfx
1260                          * flow match. Here get the REG_C for color match.
1261                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1262                          */
1263                         reg_c_mask &= 0xfc;
1264                         if (__builtin_popcount(reg_c_mask) < 1) {
1265                                 priv->mtr_en = 0;
1266                                 DRV_LOG(WARNING, "No available register for"
1267                                         " meter.");
1268                         } else {
1269                                 /*
1270                                  * The meter color register is used by the
1271                                  * flow-hit feature as well.
1272                                  * The flow-hit feature must use REG_C_3
1273                                  * Prefer REG_C_3 if it is available.
1274                                  */
1275                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1276                                         priv->mtr_color_reg = REG_C_3;
1277                                 else
1278                                         priv->mtr_color_reg = ffs(reg_c_mask)
1279                                                               - 1 + REG_C_0;
1280                                 priv->mtr_en = 1;
1281                                 priv->mtr_reg_share =
1282                                       config->hca_attr.qos.flow_meter;
1283                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1284                                         priv->mtr_color_reg);
1285                         }
1286                 }
1287 #endif
1288 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1289                 if (config->hca_attr.flow_hit_aso &&
1290                     priv->mtr_color_reg == REG_C_3) {
1291                         sh->flow_hit_aso_en = 1;
1292                         err = mlx5_flow_aso_age_mng_init(sh);
1293                         if (err) {
1294                                 err = -err;
1295                                 goto error;
1296                         }
1297                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1298                 }
1299 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1300 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1301                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1302                     config->dv_flow_en) {
1303                         priv->sampler_en = 1;
1304                         DRV_LOG(DEBUG, "Sampler enabled!");
1305                 } else {
1306                         priv->sampler_en = 0;
1307                         if (!config->hca_attr.log_max_ft_sampler_num)
1308                                 DRV_LOG(WARNING,
1309                                         "No available register for sampler.");
1310                         else
1311                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1312                 }
1313 #endif
1314         }
1315         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1316             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1317                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1318                 config->cqe_comp = 0;
1319         }
1320         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1321             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1322                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1323                                  " format isn't supported.");
1324                 config->cqe_comp = 0;
1325         }
1326         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1327             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1328                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1329                                  " format isn't supported.");
1330                 config->cqe_comp = 0;
1331         }
1332         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1333                         config->cqe_comp ? "" : "not ");
1334         if (config->tx_pp) {
1335                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1336                         config->hca_attr.dev_freq_khz);
1337                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1338                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1339                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1340                         config->hca_attr.cross_channel ? "" : "not ");
1341                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1342                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1343                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1344                         config->hca_attr.non_wire_sq ? "" : "not ");
1345                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1346                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1347                         config->hca_attr.log_max_static_sq_wq);
1348                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1349                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1350                 if (!config->devx) {
1351                         DRV_LOG(ERR, "DevX is required for packet pacing");
1352                         err = ENODEV;
1353                         goto error;
1354                 }
1355                 if (!config->hca_attr.qos.packet_pacing) {
1356                         DRV_LOG(ERR, "Packet pacing is not supported");
1357                         err = ENODEV;
1358                         goto error;
1359                 }
1360                 if (!config->hca_attr.cross_channel) {
1361                         DRV_LOG(ERR, "Cross channel operations are"
1362                                      " required for packet pacing");
1363                         err = ENODEV;
1364                         goto error;
1365                 }
1366                 if (!config->hca_attr.wqe_index_ignore) {
1367                         DRV_LOG(ERR, "WQE index ignore feature is"
1368                                      " required for packet pacing");
1369                         err = ENODEV;
1370                         goto error;
1371                 }
1372                 if (!config->hca_attr.non_wire_sq) {
1373                         DRV_LOG(ERR, "Non-wire SQ feature is"
1374                                      " required for packet pacing");
1375                         err = ENODEV;
1376                         goto error;
1377                 }
1378                 if (!config->hca_attr.log_max_static_sq_wq) {
1379                         DRV_LOG(ERR, "Static WQE SQ feature is"
1380                                      " required for packet pacing");
1381                         err = ENODEV;
1382                         goto error;
1383                 }
1384                 if (!config->hca_attr.qos.wqe_rate_pp) {
1385                         DRV_LOG(ERR, "WQE rate mode is required"
1386                                      " for packet pacing");
1387                         err = ENODEV;
1388                         goto error;
1389                 }
1390 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1391                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1392                              " can't create queues for packet pacing");
1393                 err = ENODEV;
1394                 goto error;
1395 #endif
1396         }
1397         if (config->devx) {
1398                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1399
1400                 err = config->hca_attr.access_register_user ?
1401                         mlx5_devx_cmd_register_read
1402                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1403                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1404                 if (!err) {
1405                         uint32_t ts_mode;
1406
1407                         /* MTUTC register is read successfully. */
1408                         ts_mode = MLX5_GET(register_mtutc, reg,
1409                                            time_stamp_mode);
1410                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1411                                 config->rt_timestamp = 1;
1412                 } else {
1413                         /* Kernel does not support register reading. */
1414                         if (config->hca_attr.dev_freq_khz ==
1415                                                  (NS_PER_S / MS_PER_S))
1416                                 config->rt_timestamp = 1;
1417                 }
1418         }
1419         /*
1420          * If HW has bug working with tunnel packet decapsulation and
1421          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1422          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1423          */
1424         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1425                 config->hw_fcs_strip = 0;
1426         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1427                 (config->hw_fcs_strip ? "" : "not "));
1428         if (config->mprq.enabled && mprq) {
1429                 if (config->mprq.stride_num_n &&
1430                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1431                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1432                         config->mprq.stride_num_n =
1433                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1434                                                 mprq_min_stride_num_n),
1435                                         mprq_max_stride_num_n);
1436                         DRV_LOG(WARNING,
1437                                 "the number of strides"
1438                                 " for Multi-Packet RQ is out of range,"
1439                                 " setting default value (%u)",
1440                                 1 << config->mprq.stride_num_n);
1441                 }
1442                 if (config->mprq.stride_size_n &&
1443                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1444                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1445                         config->mprq.stride_size_n =
1446                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1447                                                 mprq_min_stride_size_n),
1448                                         mprq_max_stride_size_n);
1449                         DRV_LOG(WARNING,
1450                                 "the size of a stride"
1451                                 " for Multi-Packet RQ is out of range,"
1452                                 " setting default value (%u)",
1453                                 1 << config->mprq.stride_size_n);
1454                 }
1455                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1456                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1457         } else if (config->mprq.enabled && !mprq) {
1458                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1459                 config->mprq.enabled = 0;
1460         }
1461         if (config->max_dump_files_num == 0)
1462                 config->max_dump_files_num = 128;
1463         eth_dev = rte_eth_dev_allocate(name);
1464         if (eth_dev == NULL) {
1465                 DRV_LOG(ERR, "can not allocate rte ethdev");
1466                 err = ENOMEM;
1467                 goto error;
1468         }
1469         if (priv->representor) {
1470                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1471                 eth_dev->data->representor_id = priv->representor_id;
1472         }
1473         priv->mp_id.port_id = eth_dev->data->port_id;
1474         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1475         /*
1476          * Store associated network device interface index. This index
1477          * is permanent throughout the lifetime of device. So, we may store
1478          * the ifindex here and use the cached value further.
1479          */
1480         MLX5_ASSERT(spawn->ifindex);
1481         priv->if_index = spawn->ifindex;
1482         if (priv->pf_bond >= 0 && priv->master) {
1483                 /* Get bond interface info */
1484                 err = mlx5_sysfs_bond_info(priv->if_index,
1485                                      &priv->bond_ifindex,
1486                                      priv->bond_name);
1487                 if (err)
1488                         DRV_LOG(ERR, "unable to get bond info: %s",
1489                                 strerror(rte_errno));
1490                 else
1491                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1492                                 priv->if_index, priv->bond_ifindex,
1493                                 priv->bond_name);
1494         }
1495         eth_dev->data->dev_private = priv;
1496         priv->dev_data = eth_dev->data;
1497         eth_dev->data->mac_addrs = priv->mac;
1498         if (spawn->pf_bond < 0) {
1499                 eth_dev->device = dpdk_dev;
1500         } else {
1501                 /* Use primary bond PCI as device. */
1502                 if (sh->bond_dev == UINT16_MAX) {
1503                         sh->bond_dev = eth_dev->data->port_id;
1504                         eth_dev->device = dpdk_dev;
1505                 } else {
1506                         eth_dev->device = rte_eth_devices[sh->bond_dev].device;
1507                 }
1508         }
1509         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1510         /* Configure the first MAC address by default. */
1511         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1512                 DRV_LOG(ERR,
1513                         "port %u cannot get MAC address, is mlx5_en"
1514                         " loaded? (errno: %s)",
1515                         eth_dev->data->port_id, strerror(rte_errno));
1516                 err = ENODEV;
1517                 goto error;
1518         }
1519         DRV_LOG(INFO,
1520                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1521                 eth_dev->data->port_id,
1522                 mac.addr_bytes[0], mac.addr_bytes[1],
1523                 mac.addr_bytes[2], mac.addr_bytes[3],
1524                 mac.addr_bytes[4], mac.addr_bytes[5]);
1525 #ifdef RTE_LIBRTE_MLX5_DEBUG
1526         {
1527                 char ifname[MLX5_NAMESIZE];
1528
1529                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1530                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1531                                 eth_dev->data->port_id, ifname);
1532                 else
1533                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1534                                 eth_dev->data->port_id);
1535         }
1536 #endif
1537         /* Get actual MTU if possible. */
1538         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1539         if (err) {
1540                 err = rte_errno;
1541                 goto error;
1542         }
1543         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1544                 priv->mtu);
1545         /* Initialize burst functions to prevent crashes before link-up. */
1546         eth_dev->rx_pkt_burst = removed_rx_burst;
1547         eth_dev->tx_pkt_burst = removed_tx_burst;
1548         eth_dev->dev_ops = &mlx5_dev_ops;
1549         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1550         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1551         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1552         /* Register MAC address. */
1553         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1554         if (config->vf && config->vf_nl_en)
1555                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1556                                       mlx5_ifindex(eth_dev),
1557                                       eth_dev->data->mac_addrs,
1558                                       MLX5_MAX_MAC_ADDRESSES);
1559         priv->flows = 0;
1560         priv->ctrl_flows = 0;
1561         rte_spinlock_init(&priv->flow_list_lock);
1562         TAILQ_INIT(&priv->flow_meters);
1563         TAILQ_INIT(&priv->flow_meter_profiles);
1564         /* Hint libmlx5 to use PMD allocator for data plane resources */
1565         mlx5_glue->dv_set_context_attr(sh->ctx,
1566                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1567                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1568                                 .alloc = &mlx5_alloc_verbs_buf,
1569                                 .free = &mlx5_free_verbs_buf,
1570                                 .data = sh,
1571                         }));
1572         /* Bring Ethernet device up. */
1573         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1574                 eth_dev->data->port_id);
1575         mlx5_set_link_up(eth_dev);
1576         /*
1577          * Even though the interrupt handler is not installed yet,
1578          * interrupts will still trigger on the async_fd from
1579          * Verbs context returned by ibv_open_device().
1580          */
1581         mlx5_link_update(eth_dev, 0);
1582 #ifdef HAVE_MLX5DV_DR_ESWITCH
1583         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1584               (switch_info->representor || switch_info->master)))
1585                 config->dv_esw_en = 0;
1586 #else
1587         config->dv_esw_en = 0;
1588 #endif
1589         /* Detect minimal data bytes to inline. */
1590         mlx5_set_min_inline(spawn, config);
1591         /* Store device configuration on private structure. */
1592         priv->config = *config;
1593         /* Create context for virtual machine VLAN workaround. */
1594         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1595         if (config->dv_flow_en) {
1596                 err = mlx5_alloc_shared_dr(priv);
1597                 if (err)
1598                         goto error;
1599         }
1600         if (config->devx && config->dv_flow_en && config->dest_tir) {
1601                 priv->obj_ops = devx_obj_ops;
1602                 priv->obj_ops.drop_action_create =
1603                                                 ibv_obj_ops.drop_action_create;
1604                 priv->obj_ops.drop_action_destroy =
1605                                                 ibv_obj_ops.drop_action_destroy;
1606 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1607                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1608 #else
1609                 if (config->dv_esw_en)
1610                         priv->obj_ops.txq_obj_modify =
1611                                                 ibv_obj_ops.txq_obj_modify;
1612 #endif
1613                 /* Use specific wrappers for Tx object. */
1614                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1615                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1616                 mlx5_queue_counter_id_prepare(eth_dev);
1617
1618         } else {
1619                 priv->obj_ops = ibv_obj_ops;
1620         }
1621         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1622         if (!priv->drop_queue.hrxq)
1623                 goto error;
1624         /* Supported Verbs flow priority number detection. */
1625         err = mlx5_flow_discover_priorities(eth_dev);
1626         if (err < 0) {
1627                 err = -err;
1628                 goto error;
1629         }
1630         priv->config.flow_prio = err;
1631         if (!priv->config.dv_esw_en &&
1632             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1633                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1634                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1635                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1636         }
1637         mlx5_set_metadata_mask(eth_dev);
1638         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1639             !priv->sh->dv_regc0_mask) {
1640                 DRV_LOG(ERR, "metadata mode %u is not supported "
1641                              "(no metadata reg_c[0] is available)",
1642                              priv->config.dv_xmeta_en);
1643                         err = ENOTSUP;
1644                         goto error;
1645         }
1646         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1647                              mlx5_hrxq_create_cb,
1648                              mlx5_hrxq_match_cb,
1649                              mlx5_hrxq_remove_cb);
1650         /* Query availability of metadata reg_c's. */
1651         err = mlx5_flow_discover_mreg_c(eth_dev);
1652         if (err < 0) {
1653                 err = -err;
1654                 goto error;
1655         }
1656         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1657                 DRV_LOG(DEBUG,
1658                         "port %u extensive metadata register is not supported",
1659                         eth_dev->data->port_id);
1660                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1661                         DRV_LOG(ERR, "metadata mode %u is not supported "
1662                                      "(no metadata registers available)",
1663                                      priv->config.dv_xmeta_en);
1664                         err = ENOTSUP;
1665                         goto error;
1666                 }
1667         }
1668         if (priv->config.dv_flow_en &&
1669             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1670             mlx5_flow_ext_mreg_supported(eth_dev) &&
1671             priv->sh->dv_regc0_mask) {
1672                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1673                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1674                                                       0, 0,
1675                                                       flow_dv_mreg_create_cb,
1676                                                       flow_dv_mreg_match_cb,
1677                                                       flow_dv_mreg_remove_cb);
1678                 if (!priv->mreg_cp_tbl) {
1679                         err = ENOMEM;
1680                         goto error;
1681                 }
1682                 priv->mreg_cp_tbl->ctx = eth_dev;
1683         }
1684         rte_spinlock_init(&priv->shared_act_sl);
1685         mlx5_flow_counter_mode_config(eth_dev);
1686         if (priv->config.dv_flow_en)
1687                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1688         return eth_dev;
1689 error:
1690         if (priv) {
1691                 if (priv->mreg_cp_tbl)
1692                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1693                 if (priv->sh)
1694                         mlx5_os_free_shared_dr(priv);
1695                 if (priv->nl_socket_route >= 0)
1696                         close(priv->nl_socket_route);
1697                 if (priv->nl_socket_rdma >= 0)
1698                         close(priv->nl_socket_rdma);
1699                 if (priv->vmwa_context)
1700                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1701                 if (eth_dev && priv->drop_queue.hrxq)
1702                         mlx5_drop_action_destroy(eth_dev);
1703                 if (own_domain_id)
1704                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1705                 mlx5_cache_list_destroy(&priv->hrxqs);
1706                 mlx5_free(priv);
1707                 if (eth_dev != NULL)
1708                         eth_dev->data->dev_private = NULL;
1709         }
1710         if (eth_dev != NULL) {
1711                 /* mac_addrs must not be freed alone because part of
1712                  * dev_private
1713                  **/
1714                 eth_dev->data->mac_addrs = NULL;
1715                 rte_eth_dev_release_port(eth_dev);
1716         }
1717         if (sh)
1718                 mlx5_free_shared_dev_ctx(sh);
1719         MLX5_ASSERT(err > 0);
1720         rte_errno = err;
1721         return NULL;
1722 }
1723
1724 /**
1725  * Comparison callback to sort device data.
1726  *
1727  * This is meant to be used with qsort().
1728  *
1729  * @param a[in]
1730  *   Pointer to pointer to first data object.
1731  * @param b[in]
1732  *   Pointer to pointer to second data object.
1733  *
1734  * @return
1735  *   0 if both objects are equal, less than 0 if the first argument is less
1736  *   than the second, greater than 0 otherwise.
1737  */
1738 static int
1739 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1740 {
1741         const struct mlx5_switch_info *si_a =
1742                 &((const struct mlx5_dev_spawn_data *)a)->info;
1743         const struct mlx5_switch_info *si_b =
1744                 &((const struct mlx5_dev_spawn_data *)b)->info;
1745         int ret;
1746
1747         /* Master device first. */
1748         ret = si_b->master - si_a->master;
1749         if (ret)
1750                 return ret;
1751         /* Then representor devices. */
1752         ret = si_b->representor - si_a->representor;
1753         if (ret)
1754                 return ret;
1755         /* Unidentified devices come last in no specific order. */
1756         if (!si_a->representor)
1757                 return 0;
1758         /* Order representors by name. */
1759         return si_a->port_name - si_b->port_name;
1760 }
1761
1762 /**
1763  * Match PCI information for possible slaves of bonding device.
1764  *
1765  * @param[in] ibv_dev
1766  *   Pointer to Infiniband device structure.
1767  * @param[in] pci_dev
1768  *   Pointer to PCI device structure to match PCI address.
1769  * @param[in] nl_rdma
1770  *   Netlink RDMA group socket handle.
1771  *
1772  * @return
1773  *   negative value if no bonding device found, otherwise
1774  *   positive index of slave PF in bonding.
1775  */
1776 static int
1777 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1778                            const struct rte_pci_device *pci_dev,
1779                            int nl_rdma)
1780 {
1781         char ifname[IF_NAMESIZE + 1];
1782         unsigned int ifindex;
1783         unsigned int np, i;
1784         FILE *file = NULL;
1785         int pf = -1;
1786
1787         /*
1788          * Try to get master device name. If something goes
1789          * wrong suppose the lack of kernel support and no
1790          * bonding devices.
1791          */
1792         if (nl_rdma < 0)
1793                 return -1;
1794         if (!strstr(ibv_dev->name, "bond"))
1795                 return -1;
1796         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1797         if (!np)
1798                 return -1;
1799         /*
1800          * The Master device might not be on the predefined
1801          * port (not on port index 1, it is not garanted),
1802          * we have to scan all Infiniband device port and
1803          * find master.
1804          */
1805         for (i = 1; i <= np; ++i) {
1806                 /* Check whether Infiniband port is populated. */
1807                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1808                 if (!ifindex)
1809                         continue;
1810                 if (!if_indextoname(ifindex, ifname))
1811                         continue;
1812                 /* Try to read bonding slave names from sysfs. */
1813                 MKSTR(slaves,
1814                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1815                 file = fopen(slaves, "r");
1816                 if (file)
1817                         break;
1818         }
1819         if (!file)
1820                 return -1;
1821         /* Use safe format to check maximal buffer length. */
1822         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1823         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1824                 char tmp_str[IF_NAMESIZE + 32];
1825                 struct rte_pci_addr pci_addr;
1826                 struct mlx5_switch_info info;
1827
1828                 /* Process slave interface names in the loop. */
1829                 snprintf(tmp_str, sizeof(tmp_str),
1830                          "/sys/class/net/%s", ifname);
1831                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1832                         DRV_LOG(WARNING, "can not get PCI address"
1833                                          " for netdev \"%s\"", ifname);
1834                         continue;
1835                 }
1836                 if (pci_dev->addr.domain != pci_addr.domain ||
1837                     pci_dev->addr.bus != pci_addr.bus ||
1838                     pci_dev->addr.devid != pci_addr.devid ||
1839                     pci_dev->addr.function != pci_addr.function)
1840                         continue;
1841                 /* Slave interface PCI address match found. */
1842                 fclose(file);
1843                 snprintf(tmp_str, sizeof(tmp_str),
1844                          "/sys/class/net/%s/phys_port_name", ifname);
1845                 file = fopen(tmp_str, "rb");
1846                 if (!file)
1847                         break;
1848                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1849                 if (fscanf(file, "%32s", tmp_str) == 1)
1850                         mlx5_translate_port_name(tmp_str, &info);
1851                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1852                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1853                         pf = info.port_name;
1854                 break;
1855         }
1856         if (file)
1857                 fclose(file);
1858         return pf;
1859 }
1860
1861 /**
1862  * DPDK callback to register a PCI device.
1863  *
1864  * This function spawns Ethernet devices out of a given PCI device.
1865  *
1866  * @param[in] pci_drv
1867  *   PCI driver structure (mlx5_driver).
1868  * @param[in] pci_dev
1869  *   PCI device information.
1870  *
1871  * @return
1872  *   0 on success, a negative errno value otherwise and rte_errno is set.
1873  */
1874 int
1875 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1876                   struct rte_pci_device *pci_dev)
1877 {
1878         struct ibv_device **ibv_list;
1879         /*
1880          * Number of found IB Devices matching with requested PCI BDF.
1881          * nd != 1 means there are multiple IB devices over the same
1882          * PCI device and we have representors and master.
1883          */
1884         unsigned int nd = 0;
1885         /*
1886          * Number of found IB device Ports. nd = 1 and np = 1..n means
1887          * we have the single multiport IB device, and there may be
1888          * representors attached to some of found ports.
1889          */
1890         unsigned int np = 0;
1891         /*
1892          * Number of DPDK ethernet devices to Spawn - either over
1893          * multiple IB devices or multiple ports of single IB device.
1894          * Actually this is the number of iterations to spawn.
1895          */
1896         unsigned int ns = 0;
1897         /*
1898          * Bonding device
1899          *   < 0 - no bonding device (single one)
1900          *  >= 0 - bonding device (value is slave PF index)
1901          */
1902         int bd = -1;
1903         struct mlx5_dev_spawn_data *list = NULL;
1904         struct mlx5_dev_config dev_config;
1905         unsigned int dev_config_vf;
1906         struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
1907         int ret;
1908
1909         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1910                 mlx5_pmd_socket_init();
1911         ret = mlx5_init_once();
1912         if (ret) {
1913                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1914                         strerror(rte_errno));
1915                 return -rte_errno;
1916         }
1917         if (pci_dev->device.devargs) {
1918                 /* Parse representor information from device argument. */
1919                 if (pci_dev->device.devargs->cls_str)
1920                         ret = rte_eth_devargs_parse
1921                                 (pci_dev->device.devargs->cls_str, &eth_da);
1922                 if (ret) {
1923                         DRV_LOG(ERR, "failed to parse device arguments: %s",
1924                                 pci_dev->device.devargs->cls_str);
1925                         return -rte_errno;
1926                 }
1927                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
1928                         /* Support legacy device argument */
1929                         ret = rte_eth_devargs_parse
1930                                 (pci_dev->device.devargs->args, &eth_da);
1931                         if (ret) {
1932                                 DRV_LOG(ERR, "failed to parse device arguments: %s",
1933                                         pci_dev->device.devargs->args);
1934                                 return -rte_errno;
1935                         }
1936                 }
1937         }
1938         errno = 0;
1939         ibv_list = mlx5_glue->get_device_list(&ret);
1940         if (!ibv_list) {
1941                 rte_errno = errno ? errno : ENOSYS;
1942                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1943                 return -rte_errno;
1944         }
1945         /*
1946          * First scan the list of all Infiniband devices to find
1947          * matching ones, gathering into the list.
1948          */
1949         struct ibv_device *ibv_match[ret + 1];
1950         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1951         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1952         unsigned int i;
1953
1954         while (ret-- > 0) {
1955                 struct rte_pci_addr pci_addr;
1956
1957                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1958                 bd = mlx5_device_bond_pci_match
1959                                 (ibv_list[ret], pci_dev, nl_rdma);
1960                 if (bd >= 0) {
1961                         /*
1962                          * Bonding device detected. Only one match is allowed,
1963                          * the bonding is supported over multi-port IB device,
1964                          * there should be no matches on representor PCI
1965                          * functions or non VF LAG bonding devices with
1966                          * specified address.
1967                          */
1968                         if (nd) {
1969                                 DRV_LOG(ERR,
1970                                         "multiple PCI match on bonding device"
1971                                         "\"%s\" found", ibv_list[ret]->name);
1972                                 rte_errno = ENOENT;
1973                                 ret = -rte_errno;
1974                                 goto exit;
1975                         }
1976                         DRV_LOG(INFO, "PCI information matches for"
1977                                       " slave %d bonding device \"%s\"",
1978                                       bd, ibv_list[ret]->name);
1979                         ibv_match[nd++] = ibv_list[ret];
1980                         break;
1981                 }
1982                 if (mlx5_dev_to_pci_addr
1983                         (ibv_list[ret]->ibdev_path, &pci_addr))
1984                         continue;
1985                 if (pci_dev->addr.domain != pci_addr.domain ||
1986                     pci_dev->addr.bus != pci_addr.bus ||
1987                     pci_dev->addr.devid != pci_addr.devid ||
1988                     pci_dev->addr.function != pci_addr.function)
1989                         continue;
1990                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1991                         ibv_list[ret]->name);
1992                 ibv_match[nd++] = ibv_list[ret];
1993         }
1994         ibv_match[nd] = NULL;
1995         if (!nd) {
1996                 /* No device matches, just complain and bail out. */
1997                 DRV_LOG(WARNING,
1998                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1999                         " are kernel drivers loaded?",
2000                         pci_dev->addr.domain, pci_dev->addr.bus,
2001                         pci_dev->addr.devid, pci_dev->addr.function);
2002                 rte_errno = ENOENT;
2003                 ret = -rte_errno;
2004                 goto exit;
2005         }
2006         if (nd == 1) {
2007                 /*
2008                  * Found single matching device may have multiple ports.
2009                  * Each port may be representor, we have to check the port
2010                  * number and check the representors existence.
2011                  */
2012                 if (nl_rdma >= 0)
2013                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2014                 if (!np)
2015                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2016                                          " ports number", ibv_match[0]->name);
2017                 if (bd >= 0 && !np) {
2018                         DRV_LOG(ERR, "can not get ports"
2019                                      " for bonding device");
2020                         rte_errno = ENOENT;
2021                         ret = -rte_errno;
2022                         goto exit;
2023                 }
2024         }
2025 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2026         if (bd >= 0) {
2027                 /*
2028                  * This may happen if there is VF LAG kernel support and
2029                  * application is compiled with older rdma_core library.
2030                  */
2031                 DRV_LOG(ERR,
2032                         "No kernel/verbs support for VF LAG bonding found.");
2033                 rte_errno = ENOTSUP;
2034                 ret = -rte_errno;
2035                 goto exit;
2036         }
2037 #endif
2038         /*
2039          * Now we can determine the maximal
2040          * amount of devices to be spawned.
2041          */
2042         list = mlx5_malloc(MLX5_MEM_ZERO,
2043                            sizeof(struct mlx5_dev_spawn_data) *
2044                            (np ? np : nd),
2045                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2046         if (!list) {
2047                 DRV_LOG(ERR, "spawn data array allocation failure");
2048                 rte_errno = ENOMEM;
2049                 ret = -rte_errno;
2050                 goto exit;
2051         }
2052         if (bd >= 0 || np > 1) {
2053                 /*
2054                  * Single IB device with multiple ports found,
2055                  * it may be E-Switch master device and representors.
2056                  * We have to perform identification through the ports.
2057                  */
2058                 MLX5_ASSERT(nl_rdma >= 0);
2059                 MLX5_ASSERT(ns == 0);
2060                 MLX5_ASSERT(nd == 1);
2061                 MLX5_ASSERT(np);
2062                 for (i = 1; i <= np; ++i) {
2063                         list[ns].max_port = np;
2064                         list[ns].phys_port = i;
2065                         list[ns].phys_dev = ibv_match[0];
2066                         list[ns].eth_dev = NULL;
2067                         list[ns].pci_dev = pci_dev;
2068                         list[ns].pf_bond = bd;
2069                         list[ns].ifindex = mlx5_nl_ifindex
2070                                 (nl_rdma,
2071                                 mlx5_os_get_dev_device_name
2072                                                 (list[ns].phys_dev), i);
2073                         if (!list[ns].ifindex) {
2074                                 /*
2075                                  * No network interface index found for the
2076                                  * specified port, it means there is no
2077                                  * representor on this port. It's OK,
2078                                  * there can be disabled ports, for example
2079                                  * if sriov_numvfs < sriov_totalvfs.
2080                                  */
2081                                 continue;
2082                         }
2083                         ret = -1;
2084                         if (nl_route >= 0)
2085                                 ret = mlx5_nl_switch_info
2086                                                (nl_route,
2087                                                 list[ns].ifindex,
2088                                                 &list[ns].info);
2089                         if (ret || (!list[ns].info.representor &&
2090                                     !list[ns].info.master)) {
2091                                 /*
2092                                  * We failed to recognize representors with
2093                                  * Netlink, let's try to perform the task
2094                                  * with sysfs.
2095                                  */
2096                                 ret =  mlx5_sysfs_switch_info
2097                                                 (list[ns].ifindex,
2098                                                  &list[ns].info);
2099                         }
2100 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2101                         if (!ret && bd >= 0) {
2102                                 switch (list[ns].info.name_type) {
2103                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2104                                         if (list[ns].info.port_name == bd)
2105                                                 ns++;
2106                                         break;
2107                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2108                                         /* Fallthrough */
2109                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2110                                         /* Fallthrough */
2111                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2112                                         if (list[ns].info.pf_num == bd)
2113                                                 ns++;
2114                                         break;
2115                                 default:
2116                                         break;
2117                                 }
2118                                 continue;
2119                         }
2120 #endif
2121                         if (!ret && (list[ns].info.representor ^
2122                                      list[ns].info.master))
2123                                 ns++;
2124                 }
2125                 if (!ns) {
2126                         DRV_LOG(ERR,
2127                                 "unable to recognize master/representors"
2128                                 " on the IB device with multiple ports");
2129                         rte_errno = ENOENT;
2130                         ret = -rte_errno;
2131                         goto exit;
2132                 }
2133         } else {
2134                 /*
2135                  * The existence of several matching entries (nd > 1) means
2136                  * port representors have been instantiated. No existing Verbs
2137                  * call nor sysfs entries can tell them apart, this can only
2138                  * be done through Netlink calls assuming kernel drivers are
2139                  * recent enough to support them.
2140                  *
2141                  * In the event of identification failure through Netlink,
2142                  * try again through sysfs, then:
2143                  *
2144                  * 1. A single IB device matches (nd == 1) with single
2145                  *    port (np=0/1) and is not a representor, assume
2146                  *    no switch support.
2147                  *
2148                  * 2. Otherwise no safe assumptions can be made;
2149                  *    complain louder and bail out.
2150                  */
2151                 for (i = 0; i != nd; ++i) {
2152                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2153                         list[ns].max_port = 1;
2154                         list[ns].phys_port = 1;
2155                         list[ns].phys_dev = ibv_match[i];
2156                         list[ns].eth_dev = NULL;
2157                         list[ns].pci_dev = pci_dev;
2158                         list[ns].pf_bond = -1;
2159                         list[ns].ifindex = 0;
2160                         if (nl_rdma >= 0)
2161                                 list[ns].ifindex = mlx5_nl_ifindex
2162                                 (nl_rdma,
2163                                 mlx5_os_get_dev_device_name
2164                                                 (list[ns].phys_dev), 1);
2165                         if (!list[ns].ifindex) {
2166                                 char ifname[IF_NAMESIZE];
2167
2168                                 /*
2169                                  * Netlink failed, it may happen with old
2170                                  * ib_core kernel driver (before 4.16).
2171                                  * We can assume there is old driver because
2172                                  * here we are processing single ports IB
2173                                  * devices. Let's try sysfs to retrieve
2174                                  * the ifindex. The method works for
2175                                  * master device only.
2176                                  */
2177                                 if (nd > 1) {
2178                                         /*
2179                                          * Multiple devices found, assume
2180                                          * representors, can not distinguish
2181                                          * master/representor and retrieve
2182                                          * ifindex via sysfs.
2183                                          */
2184                                         continue;
2185                                 }
2186                                 ret = mlx5_get_ifname_sysfs
2187                                         (ibv_match[i]->ibdev_path, ifname);
2188                                 if (!ret)
2189                                         list[ns].ifindex =
2190                                                 if_nametoindex(ifname);
2191                                 if (!list[ns].ifindex) {
2192                                         /*
2193                                          * No network interface index found
2194                                          * for the specified device, it means
2195                                          * there it is neither representor
2196                                          * nor master.
2197                                          */
2198                                         continue;
2199                                 }
2200                         }
2201                         ret = -1;
2202                         if (nl_route >= 0)
2203                                 ret = mlx5_nl_switch_info
2204                                                (nl_route,
2205                                                 list[ns].ifindex,
2206                                                 &list[ns].info);
2207                         if (ret || (!list[ns].info.representor &&
2208                                     !list[ns].info.master)) {
2209                                 /*
2210                                  * We failed to recognize representors with
2211                                  * Netlink, let's try to perform the task
2212                                  * with sysfs.
2213                                  */
2214                                 ret =  mlx5_sysfs_switch_info
2215                                                 (list[ns].ifindex,
2216                                                  &list[ns].info);
2217                         }
2218                         if (!ret && (list[ns].info.representor ^
2219                                      list[ns].info.master)) {
2220                                 ns++;
2221                         } else if ((nd == 1) &&
2222                                    !list[ns].info.representor &&
2223                                    !list[ns].info.master) {
2224                                 /*
2225                                  * Single IB device with
2226                                  * one physical port and
2227                                  * attached network device.
2228                                  * May be SRIOV is not enabled
2229                                  * or there is no representors.
2230                                  */
2231                                 DRV_LOG(INFO, "no E-Switch support detected");
2232                                 ns++;
2233                                 break;
2234                         }
2235                 }
2236                 if (!ns) {
2237                         DRV_LOG(ERR,
2238                                 "unable to recognize master/representors"
2239                                 " on the multiple IB devices");
2240                         rte_errno = ENOENT;
2241                         ret = -rte_errno;
2242                         goto exit;
2243                 }
2244         }
2245         MLX5_ASSERT(ns);
2246         /*
2247          * Sort list to probe devices in natural order for users convenience
2248          * (i.e. master first, then representors from lowest to highest ID).
2249          */
2250         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2251         /* Device specific configuration. */
2252         switch (pci_dev->id.device_id) {
2253         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2254         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2255         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2256         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2257         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2258         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2259         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2260                 dev_config_vf = 1;
2261                 break;
2262         default:
2263                 dev_config_vf = 0;
2264                 break;
2265         }
2266         for (i = 0; i != ns; ++i) {
2267                 uint32_t restore;
2268
2269                 /* Default configuration. */
2270                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2271                 dev_config.vf = dev_config_vf;
2272                 dev_config.mps = MLX5_ARG_UNSET;
2273                 dev_config.dbnc = MLX5_ARG_UNSET;
2274                 dev_config.rx_vec_en = 1;
2275                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2276                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2277                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2278                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2279                 dev_config.vf_nl_en = 1;
2280                 dev_config.mr_ext_memseg_en = 1;
2281                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2282                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2283                 dev_config.dv_esw_en = 1;
2284                 dev_config.dv_flow_en = 1;
2285                 dev_config.decap_en = 1;
2286                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2287                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2288                                                  &list[i],
2289                                                  &dev_config,
2290                                                  &eth_da);
2291                 if (!list[i].eth_dev) {
2292                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2293                                 break;
2294                         /* Device is disabled or already spawned. Ignore it. */
2295                         continue;
2296                 }
2297                 restore = list[i].eth_dev->data->dev_flags;
2298                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2299                 /* Restore non-PCI flags cleared by the above call. */
2300                 list[i].eth_dev->data->dev_flags |= restore;
2301                 rte_eth_dev_probing_finish(list[i].eth_dev);
2302         }
2303         if (i != ns) {
2304                 DRV_LOG(ERR,
2305                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2306                         " encountering an error: %s",
2307                         pci_dev->addr.domain, pci_dev->addr.bus,
2308                         pci_dev->addr.devid, pci_dev->addr.function,
2309                         strerror(rte_errno));
2310                 ret = -rte_errno;
2311                 /* Roll back. */
2312                 while (i--) {
2313                         if (!list[i].eth_dev)
2314                                 continue;
2315                         mlx5_dev_close(list[i].eth_dev);
2316                         /* mac_addrs must not be freed because in dev_private */
2317                         list[i].eth_dev->data->mac_addrs = NULL;
2318                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2319                 }
2320                 /* Restore original error. */
2321                 rte_errno = -ret;
2322         } else {
2323                 ret = 0;
2324         }
2325 exit:
2326         /*
2327          * Do the routine cleanup:
2328          * - close opened Netlink sockets
2329          * - free allocated spawn data array
2330          * - free the Infiniband device list
2331          */
2332         if (nl_rdma >= 0)
2333                 close(nl_rdma);
2334         if (nl_route >= 0)
2335                 close(nl_route);
2336         if (list)
2337                 mlx5_free(list);
2338         MLX5_ASSERT(ibv_list);
2339         mlx5_glue->free_device_list(ibv_list);
2340         return ret;
2341 }
2342
2343 static int
2344 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2345 {
2346         char *env;
2347         int value;
2348
2349         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2350         /* Get environment variable to store. */
2351         env = getenv(MLX5_SHUT_UP_BF);
2352         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2353         if (config->dbnc == MLX5_ARG_UNSET)
2354                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2355         else
2356                 setenv(MLX5_SHUT_UP_BF,
2357                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2358         return value;
2359 }
2360
2361 static void
2362 mlx5_restore_doorbell_mapping_env(int value)
2363 {
2364         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2365         /* Restore the original environment variable state. */
2366         if (value == MLX5_ARG_UNSET)
2367                 unsetenv(MLX5_SHUT_UP_BF);
2368         else
2369                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2370 }
2371
2372 /**
2373  * Extract pdn of PD object using DV API.
2374  *
2375  * @param[in] pd
2376  *   Pointer to the verbs PD object.
2377  * @param[out] pdn
2378  *   Pointer to the PD object number variable.
2379  *
2380  * @return
2381  *   0 on success, error value otherwise.
2382  */
2383 int
2384 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2385 {
2386 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2387         struct mlx5dv_obj obj;
2388         struct mlx5dv_pd pd_info;
2389         int ret = 0;
2390
2391         obj.pd.in = pd;
2392         obj.pd.out = &pd_info;
2393         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2394         if (ret) {
2395                 DRV_LOG(DEBUG, "Fail to get PD object info");
2396                 return ret;
2397         }
2398         *pdn = pd_info.pdn;
2399         return 0;
2400 #else
2401         (void)pd;
2402         (void)pdn;
2403         return -ENOTSUP;
2404 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2405 }
2406
2407 /**
2408  * Function API to open IB device.
2409  *
2410  * This function calls the Linux glue APIs to open a device.
2411  *
2412  * @param[in] spawn
2413  *   Pointer to the IB device attributes (name, port, etc).
2414  * @param[out] config
2415  *   Pointer to device configuration structure.
2416  * @param[out] sh
2417  *   Pointer to shared context structure.
2418  *
2419  * @return
2420  *   0 on success, a positive error value otherwise.
2421  */
2422 int
2423 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2424                      const struct mlx5_dev_config *config,
2425                      struct mlx5_dev_ctx_shared *sh)
2426 {
2427         int dbmap_env;
2428         int err = 0;
2429
2430         sh->numa_node = spawn->pci_dev->device.numa_node;
2431         pthread_mutex_init(&sh->txpp.mutex, NULL);
2432         /*
2433          * Configure environment variable "MLX5_BF_SHUT_UP"
2434          * before the device creation. The rdma_core library
2435          * checks the variable at device creation and
2436          * stores the result internally.
2437          */
2438         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2439         /* Try to open IB device with DV first, then usual Verbs. */
2440         errno = 0;
2441         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2442         if (sh->ctx) {
2443                 sh->devx = 1;
2444                 DRV_LOG(DEBUG, "DevX is supported");
2445                 /* The device is created, no need for environment. */
2446                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2447         } else {
2448                 /* The environment variable is still configured. */
2449                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2450                 err = errno ? errno : ENODEV;
2451                 /*
2452                  * The environment variable is not needed anymore,
2453                  * all device creation attempts are completed.
2454                  */
2455                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2456                 if (!sh->ctx)
2457                         return err;
2458                 DRV_LOG(DEBUG, "DevX is NOT supported");
2459                 err = 0;
2460         }
2461         if (!err && sh->ctx) {
2462                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2463                 mlx5_glue->dv_set_context_attr(sh->ctx,
2464                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2465                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2466                                 .alloc = &mlx5_alloc_verbs_buf,
2467                                 .free = &mlx5_free_verbs_buf,
2468                                 .data = sh,
2469                         }));
2470         }
2471         return err;
2472 }
2473
2474 /**
2475  * Install shared asynchronous device events handler.
2476  * This function is implemented to support event sharing
2477  * between multiple ports of single IB device.
2478  *
2479  * @param sh
2480  *   Pointer to mlx5_dev_ctx_shared object.
2481  */
2482 void
2483 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2484 {
2485         int ret;
2486         int flags;
2487
2488         sh->intr_handle.fd = -1;
2489         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2490         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2491                     F_SETFL, flags | O_NONBLOCK);
2492         if (ret) {
2493                 DRV_LOG(INFO, "failed to change file descriptor async event"
2494                         " queue");
2495         } else {
2496                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2497                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2498                 if (rte_intr_callback_register(&sh->intr_handle,
2499                                         mlx5_dev_interrupt_handler, sh)) {
2500                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2501                         sh->intr_handle.fd = -1;
2502                 }
2503         }
2504         if (sh->devx) {
2505 #ifdef HAVE_IBV_DEVX_ASYNC
2506                 sh->intr_handle_devx.fd = -1;
2507                 sh->devx_comp =
2508                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2509                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2510                 if (!devx_comp) {
2511                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2512                         return;
2513                 }
2514                 flags = fcntl(devx_comp->fd, F_GETFL);
2515                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2516                 if (ret) {
2517                         DRV_LOG(INFO, "failed to change file descriptor"
2518                                 " devx comp");
2519                         return;
2520                 }
2521                 sh->intr_handle_devx.fd = devx_comp->fd;
2522                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2523                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2524                                         mlx5_dev_interrupt_handler_devx, sh)) {
2525                         DRV_LOG(INFO, "Fail to install the devx shared"
2526                                 " interrupt.");
2527                         sh->intr_handle_devx.fd = -1;
2528                 }
2529 #endif /* HAVE_IBV_DEVX_ASYNC */
2530         }
2531 }
2532
2533 /**
2534  * Uninstall shared asynchronous device events handler.
2535  * This function is implemented to support event sharing
2536  * between multiple ports of single IB device.
2537  *
2538  * @param dev
2539  *   Pointer to mlx5_dev_ctx_shared object.
2540  */
2541 void
2542 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2543 {
2544         if (sh->intr_handle.fd >= 0)
2545                 mlx5_intr_callback_unregister(&sh->intr_handle,
2546                                               mlx5_dev_interrupt_handler, sh);
2547 #ifdef HAVE_IBV_DEVX_ASYNC
2548         if (sh->intr_handle_devx.fd >= 0)
2549                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2550                                   mlx5_dev_interrupt_handler_devx, sh);
2551         if (sh->devx_comp)
2552                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2553 #endif
2554 }
2555
2556 /**
2557  * Read statistics by a named counter.
2558  *
2559  * @param[in] priv
2560  *   Pointer to the private device data structure.
2561  * @param[in] ctr_name
2562  *   Pointer to the name of the statistic counter to read
2563  * @param[out] stat
2564  *   Pointer to read statistic value.
2565  * @return
2566  *   0 on success and stat is valud, 1 if failed to read the value
2567  *   rte_errno is set.
2568  *
2569  */
2570 int
2571 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2572                       uint64_t *stat)
2573 {
2574         int fd;
2575
2576         if (priv->sh) {
2577                 if (priv->q_counters != NULL &&
2578                     strcmp(ctr_name, "out_of_buffer") == 0)
2579                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2580                                                            0, (uint32_t *)stat);
2581                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2582                       priv->sh->ibdev_path,
2583                       priv->dev_port,
2584                       ctr_name);
2585                 fd = open(path, O_RDONLY);
2586                 /*
2587                  * in switchdev the file location is not per port
2588                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2589                  */
2590                 if (fd == -1) {
2591                         MKSTR(path1, "%s/hw_counters/%s",
2592                               priv->sh->ibdev_path,
2593                               ctr_name);
2594                         fd = open(path1, O_RDONLY);
2595                 }
2596                 if (fd != -1) {
2597                         char buf[21] = {'\0'};
2598                         ssize_t n = read(fd, buf, sizeof(buf));
2599
2600                         close(fd);
2601                         if (n != -1) {
2602                                 *stat = strtoull(buf, NULL, 10);
2603                                 return 0;
2604                         }
2605                 }
2606         }
2607         *stat = 0;
2608         return 1;
2609 }
2610
2611 /**
2612  * Set the reg_mr and dereg_mr call backs
2613  *
2614  * @param reg_mr_cb[out]
2615  *   Pointer to reg_mr func
2616  * @param dereg_mr_cb[out]
2617  *   Pointer to dereg_mr func
2618  *
2619  */
2620 void
2621 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2622                       mlx5_dereg_mr_t *dereg_mr_cb)
2623 {
2624         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2625         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2626 }
2627
2628 /**
2629  * Remove a MAC address from device
2630  *
2631  * @param dev
2632  *   Pointer to Ethernet device structure.
2633  * @param index
2634  *   MAC address index.
2635  */
2636 void
2637 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2638 {
2639         struct mlx5_priv *priv = dev->data->dev_private;
2640         const int vf = priv->config.vf;
2641
2642         if (vf)
2643                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2644                                         mlx5_ifindex(dev), priv->mac_own,
2645                                         &dev->data->mac_addrs[index], index);
2646 }
2647
2648 /**
2649  * Adds a MAC address to the device
2650  *
2651  * @param dev
2652  *   Pointer to Ethernet device structure.
2653  * @param mac_addr
2654  *   MAC address to register.
2655  * @param index
2656  *   MAC address index.
2657  *
2658  * @return
2659  *   0 on success, a negative errno value otherwise
2660  */
2661 int
2662 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2663                      uint32_t index)
2664 {
2665         struct mlx5_priv *priv = dev->data->dev_private;
2666         const int vf = priv->config.vf;
2667         int ret = 0;
2668
2669         if (vf)
2670                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2671                                            mlx5_ifindex(dev), priv->mac_own,
2672                                            mac, index);
2673         return ret;
2674 }
2675
2676 /**
2677  * Modify a VF MAC address
2678  *
2679  * @param priv
2680  *   Pointer to device private data.
2681  * @param mac_addr
2682  *   MAC address to modify into.
2683  * @param iface_idx
2684  *   Net device interface index
2685  * @param vf_index
2686  *   VF index
2687  *
2688  * @return
2689  *   0 on success, a negative errno value otherwise
2690  */
2691 int
2692 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2693                            unsigned int iface_idx,
2694                            struct rte_ether_addr *mac_addr,
2695                            int vf_index)
2696 {
2697         return mlx5_nl_vf_mac_addr_modify
2698                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2699 }
2700
2701 /**
2702  * Set device promiscuous mode
2703  *
2704  * @param dev
2705  *   Pointer to Ethernet device structure.
2706  * @param enable
2707  *   0 - promiscuous is disabled, otherwise - enabled
2708  *
2709  * @return
2710  *   0 on success, a negative error value otherwise
2711  */
2712 int
2713 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2714 {
2715         struct mlx5_priv *priv = dev->data->dev_private;
2716
2717         return mlx5_nl_promisc(priv->nl_socket_route,
2718                                mlx5_ifindex(dev), !!enable);
2719 }
2720
2721 /**
2722  * Set device promiscuous mode
2723  *
2724  * @param dev
2725  *   Pointer to Ethernet device structure.
2726  * @param enable
2727  *   0 - all multicase is disabled, otherwise - enabled
2728  *
2729  * @return
2730  *   0 on success, a negative error value otherwise
2731  */
2732 int
2733 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2734 {
2735         struct mlx5_priv *priv = dev->data->dev_private;
2736
2737         return mlx5_nl_allmulti(priv->nl_socket_route,
2738                                 mlx5_ifindex(dev), !!enable);
2739 }
2740
2741 /**
2742  * Flush device MAC addresses
2743  *
2744  * @param dev
2745  *   Pointer to Ethernet device structure.
2746  *
2747  */
2748 void
2749 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2750 {
2751         struct mlx5_priv *priv = dev->data->dev_private;
2752
2753         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2754                                dev->data->mac_addrs,
2755                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2756 }