drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48
  49 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  50
  51 #ifndef HAVE_IBV_MLX5_MOD_MPW
  52 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  53 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  54 #endif
  55
  56 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  57 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  58 #endif
  59
  60 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  61
  62 /* Spinlock for mlx5_shared_data allocation. */
  63 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  64
  65 /* Process local data for secondary processes. */
  66 static struct mlx5_local_data mlx5_local_data;
  67
  68 /**
  69  * Set the completion channel file descriptor interrupt as non-blocking.
  70  *
  71  * @param[in] rxq_obj
  72  *   Pointer to RQ channel object, which includes the channel fd
  73  *
  74  * @param[out] fd
  75  *   The file descriptor (representing the intetrrupt) used in this channel.
  76  *
  77  * @return
  78  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  79  */
  80 int
  81 mlx5_os_set_nonblock_channel_fd(int fd)
  82 {
  83         int flags;
  84
  85         flags = fcntl(fd, F_GETFL);
  86         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  87 }
  88
  89 /**
  90  * Get mlx5 device attributes. The glue function query_device_ex() is called
  91  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  92  * device attributes from the glue out parameter.
  93  *
  94  * @param dev
  95  *   Pointer to ibv context.
  96  *
  97  * @param device_attr
  98  *   Pointer to mlx5 device attributes.
  99  *
 100  * @return
 101  *   0 on success, non zero error number otherwise
 102  */
 103 int
 104 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 105 {
 106         int err;
 107         struct ibv_device_attr_ex attr_ex;
 108         memset(device_attr, 0, sizeof(*device_attr));
 109         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 110         if (err)
 111                 return err;
 112
 113         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 114         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 115         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 116         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 117         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 118         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 119         device_attr->max_rwq_indirection_table_size =
 120                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 121         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 122         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 123
 124         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 125         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 126         if (err)
 127                 return err;
 128
 129         device_attr->flags = dv_attr.flags;
 130         device_attr->comp_mask = dv_attr.comp_mask;
 131 #ifdef HAVE_IBV_MLX5_MOD_SWP
 132         device_attr->sw_parsing_offloads =
 133                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 134 #endif
 135         device_attr->min_single_stride_log_num_of_bytes =
 136                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 137         device_attr->max_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 139         device_attr->min_single_wqe_log_num_of_strides =
 140                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 141         device_attr->max_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 143         device_attr->stride_supported_qpts =
 144                 dv_attr.striding_rq_caps.supported_qpts;
 145 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 146         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 147 #endif
 148
 149         return err;
 150 }
 151
 152 /**
 153  * Verbs callback to allocate a memory. This function should allocate the space
 154  * according to the size provided residing inside a huge page.
 155  * Please note that all allocation must respect the alignment from libmlx5
 156  * (i.e. currently rte_mem_page_size()).
 157  *
 158  * @param[in] size
 159  *   The size in bytes of the memory to allocate.
 160  * @param[in] data
 161  *   A pointer to the callback data.
 162  *
 163  * @return
 164  *   Allocated buffer, NULL otherwise and rte_errno is set.
 165  */
 166 static void *
 167 mlx5_alloc_verbs_buf(size_t size, void *data)
 168 {
 169         struct mlx5_priv *priv = data;
 170         void *ret;
 171         unsigned int socket = SOCKET_ID_ANY;
 172         size_t alignment = rte_mem_page_size();
 173         if (alignment == (size_t)-1) {
 174                 DRV_LOG(ERR, "Failed to get mem page size");
 175                 rte_errno = ENOMEM;
 176                 return NULL;
 177         }
 178
 179         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 180                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 181
 182                 socket = ctrl->socket;
 183         } else if (priv->verbs_alloc_ctx.type ==
 184                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 185                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 186
 187                 socket = ctrl->socket;
 188         }
 189         MLX5_ASSERT(data != NULL);
 190         ret = mlx5_malloc(0, size, alignment, socket);
 191         if (!ret && size)
 192                 rte_errno = ENOMEM;
 193         return ret;
 194 }
 195
 196 /**
 197  * Verbs callback to free a memory.
 198  *
 199  * @param[in] ptr
 200  *   A pointer to the memory to free.
 201  * @param[in] data
 202  *   A pointer to the callback data.
 203  */
 204 static void
 205 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 206 {
 207         MLX5_ASSERT(data != NULL);
 208         mlx5_free(ptr);
 209 }
 210
 211 /**
 212  * Initialize DR related data within private structure.
 213  * Routine checks the reference counter and does actual
 214  * resources creation/initialization only if counter is zero.
 215  *
 216  * @param[in] priv
 217  *   Pointer to the private device data structure.
 218  *
 219  * @return
 220  *   Zero on success, positive error code otherwise.
 221  */
 222 static int
 223 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 224 {
 225         struct mlx5_dev_ctx_shared *sh = priv->sh;
 226         char s[MLX5_HLIST_NAMESIZE];
 227         int err = 0;
 228
 229         if (!sh->flow_tbls)
 230                 err = mlx5_alloc_table_hash_list(priv);
 231         else
 232                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 233                         (void *)sh->flow_tbls);
 234         if (err)
 235                 return err;
 236         /* Create tags hash list table. */
 237         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 238         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 239         if (!sh->tag_table) {
 240                 DRV_LOG(ERR, "tags with hash creation failed.");
 241                 err = ENOMEM;
 242                 goto error;
 243         }
 244 #ifdef HAVE_MLX5DV_DR
 245         void *domain;
 246
 247         if (sh->dv_refcnt) {
 248                 /* Shared DV/DR structures is already initialized. */
 249                 sh->dv_refcnt++;
 250                 priv->dr_shared = 1;
 251                 return 0;
 252         }
 253         /* Reference counter is zero, we should initialize structures. */
 254         domain = mlx5_glue->dr_create_domain(sh->ctx,
 255                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 256         if (!domain) {
 257                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 258                 err = errno;
 259                 goto error;
 260         }
 261         sh->rx_domain = domain;
 262         domain = mlx5_glue->dr_create_domain(sh->ctx,
 263                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 264         if (!domain) {
 265                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 266                 err = errno;
 267                 goto error;
 268         }
 269         pthread_mutex_init(&sh->dv_mutex, NULL);
 270         sh->tx_domain = domain;
 271 #ifdef HAVE_MLX5DV_DR_ESWITCH
 272         if (priv->config.dv_esw_en) {
 273                 domain  = mlx5_glue->dr_create_domain
 274                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 275                 if (!domain) {
 276                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 277                         err = errno;
 278                         goto error;
 279                 }
 280                 sh->fdb_domain = domain;
 281                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 282         }
 283 #endif
 284         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 285                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 286                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 287                 if (sh->fdb_domain)
 288                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 289         }
 290         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 291 #endif /* HAVE_MLX5DV_DR */
 292         sh->dv_refcnt++;
 293         priv->dr_shared = 1;
 294         return 0;
 295 error:
 296         /* Rollback the created objects. */
 297         if (sh->rx_domain) {
 298                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 299                 sh->rx_domain = NULL;
 300         }
 301         if (sh->tx_domain) {
 302                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 303                 sh->tx_domain = NULL;
 304         }
 305         if (sh->fdb_domain) {
 306                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 307                 sh->fdb_domain = NULL;
 308         }
 309         if (sh->esw_drop_action) {
 310                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 311                 sh->esw_drop_action = NULL;
 312         }
 313         if (sh->pop_vlan_action) {
 314                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 315                 sh->pop_vlan_action = NULL;
 316         }
 317         if (sh->tag_table) {
 318                 /* tags should be destroyed with flow before. */
 319                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 320                 sh->tag_table = NULL;
 321         }
 322         mlx5_free_table_hash_list(priv);
 323         return err;
 324 }
 325
 326 /**
 327  * Destroy DR related data within private structure.
 328  *
 329  * @param[in] priv
 330  *   Pointer to the private device data structure.
 331  */
 332 void
 333 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 334 {
 335         struct mlx5_dev_ctx_shared *sh;
 336
 337         if (!priv->dr_shared)
 338                 return;
 339         priv->dr_shared = 0;
 340         sh = priv->sh;
 341         MLX5_ASSERT(sh);
 342 #ifdef HAVE_MLX5DV_DR
 343         MLX5_ASSERT(sh->dv_refcnt);
 344         if (sh->dv_refcnt && --sh->dv_refcnt)
 345                 return;
 346         if (sh->rx_domain) {
 347                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 348                 sh->rx_domain = NULL;
 349         }
 350         if (sh->tx_domain) {
 351                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 352                 sh->tx_domain = NULL;
 353         }
 354 #ifdef HAVE_MLX5DV_DR_ESWITCH
 355         if (sh->fdb_domain) {
 356                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 357                 sh->fdb_domain = NULL;
 358         }
 359         if (sh->esw_drop_action) {
 360                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 361                 sh->esw_drop_action = NULL;
 362         }
 363 #endif
 364         if (sh->pop_vlan_action) {
 365                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 366                 sh->pop_vlan_action = NULL;
 367         }
 368         pthread_mutex_destroy(&sh->dv_mutex);
 369 #endif /* HAVE_MLX5DV_DR */
 370         if (sh->tag_table) {
 371                 /* tags should be destroyed with flow before. */
 372                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 373                 sh->tag_table = NULL;
 374         }
 375         mlx5_free_table_hash_list(priv);
 376 }
 377
 378 /**
 379  * Initialize shared data between primary and secondary process.
 380  *
 381  * A memzone is reserved by primary process and secondary processes attach to
 382  * the memzone.
 383  *
 384  * @return
 385  *   0 on success, a negative errno value otherwise and rte_errno is set.
 386  */
 387 static int
 388 mlx5_init_shared_data(void)
 389 {
 390         const struct rte_memzone *mz;
 391         int ret = 0;
 392
 393         rte_spinlock_lock(&mlx5_shared_data_lock);
 394         if (mlx5_shared_data == NULL) {
 395                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 396                         /* Allocate shared memory. */
 397                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 398                                                  sizeof(*mlx5_shared_data),
 399                                                  SOCKET_ID_ANY, 0);
 400                         if (mz == NULL) {
 401                                 DRV_LOG(ERR,
 402                                         "Cannot allocate mlx5 shared data");
 403                                 ret = -rte_errno;
 404                                 goto error;
 405                         }
 406                         mlx5_shared_data = mz->addr;
 407                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 408                         rte_spinlock_init(&mlx5_shared_data->lock);
 409                 } else {
 410                         /* Lookup allocated shared memory. */
 411                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 412                         if (mz == NULL) {
 413                                 DRV_LOG(ERR,
 414                                         "Cannot attach mlx5 shared data");
 415                                 ret = -rte_errno;
 416                                 goto error;
 417                         }
 418                         mlx5_shared_data = mz->addr;
 419                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 420                 }
 421         }
 422 error:
 423         rte_spinlock_unlock(&mlx5_shared_data_lock);
 424         return ret;
 425 }
 426
 427 /**
 428  * PMD global initialization.
 429  *
 430  * Independent from individual device, this function initializes global
 431  * per-PMD data structures distinguishing primary and secondary processes.
 432  * Hence, each initialization is called once per a process.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 static int
 438 mlx5_init_once(void)
 439 {
 440         struct mlx5_shared_data *sd;
 441         struct mlx5_local_data *ld = &mlx5_local_data;
 442         int ret = 0;
 443
 444         if (mlx5_init_shared_data())
 445                 return -rte_errno;
 446         sd = mlx5_shared_data;
 447         MLX5_ASSERT(sd);
 448         rte_spinlock_lock(&sd->lock);
 449         switch (rte_eal_process_type()) {
 450         case RTE_PROC_PRIMARY:
 451                 if (sd->init_done)
 452                         break;
 453                 LIST_INIT(&sd->mem_event_cb_list);
 454                 rte_rwlock_init(&sd->mem_event_rwlock);
 455                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 456                                                 mlx5_mr_mem_event_cb, NULL);
 457                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 458                                            mlx5_mp_os_primary_handle);
 459                 if (ret)
 460                         goto out;
 461                 sd->init_done = true;
 462                 break;
 463         case RTE_PROC_SECONDARY:
 464                 if (ld->init_done)
 465                         break;
 466                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 467                                              mlx5_mp_os_secondary_handle);
 468                 if (ret)
 469                         goto out;
 470                 ++sd->secondary_cnt;
 471                 ld->init_done = true;
 472                 break;
 473         default:
 474                 break;
 475         }
 476 out:
 477         rte_spinlock_unlock(&sd->lock);
 478         return ret;
 479 }
 480
 481 /**
 482  * Spawn an Ethernet device from Verbs information.
 483  *
 484  * @param dpdk_dev
 485  *   Backing DPDK device.
 486  * @param spawn
 487  *   Verbs device parameters (name, port, switch_info) to spawn.
 488  * @param config
 489  *   Device configuration parameters.
 490  *
 491  * @return
 492  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 493  *   is set. The following errors are defined:
 494  *
 495  *   EBUSY: device is not supposed to be spawned.
 496  *   EEXIST: device is already spawned
 497  */
 498 static struct rte_eth_dev *
 499 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 500                struct mlx5_dev_spawn_data *spawn,
 501                struct mlx5_dev_config config)
 502 {
 503         const struct mlx5_switch_info *switch_info = &spawn->info;
 504         struct mlx5_dev_ctx_shared *sh = NULL;
 505         struct ibv_port_attr port_attr;
 506         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 507         struct rte_eth_dev *eth_dev = NULL;
 508         struct mlx5_priv *priv = NULL;
 509         int err = 0;
 510         unsigned int hw_padding = 0;
 511         unsigned int mps;
 512         unsigned int cqe_comp;
 513         unsigned int cqe_pad = 0;
 514         unsigned int tunnel_en = 0;
 515         unsigned int mpls_en = 0;
 516         unsigned int swp = 0;
 517         unsigned int mprq = 0;
 518         unsigned int mprq_min_stride_size_n = 0;
 519         unsigned int mprq_max_stride_size_n = 0;
 520         unsigned int mprq_min_stride_num_n = 0;
 521         unsigned int mprq_max_stride_num_n = 0;
 522         struct rte_ether_addr mac;
 523         char name[RTE_ETH_NAME_MAX_LEN];
 524         int own_domain_id = 0;
 525         uint16_t port_id;
 526         unsigned int i;
 527 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 528         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 529 #endif
 530
 531         /* Determine if this port representor is supposed to be spawned. */
 532         if (switch_info->representor && dpdk_dev->devargs) {
 533                 struct rte_eth_devargs eth_da;
 534
 535                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 536                 if (err) {
 537                         rte_errno = -err;
 538                         DRV_LOG(ERR, "failed to process device arguments: %s",
 539                                 strerror(rte_errno));
 540                         return NULL;
 541                 }
 542                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 543                         if (eth_da.representor_ports[i] ==
 544                             (uint16_t)switch_info->port_name)
 545                                 break;
 546                 if (i == eth_da.nb_representor_ports) {
 547                         rte_errno = EBUSY;
 548                         return NULL;
 549                 }
 550         }
 551         /* Build device name. */
 552         if (spawn->pf_bond <  0) {
 553                 /* Single device. */
 554                 if (!switch_info->representor)
 555                         strlcpy(name, dpdk_dev->name, sizeof(name));
 556                 else
 557                         snprintf(name, sizeof(name), "%s_representor_%u",
 558                                  dpdk_dev->name, switch_info->port_name);
 559         } else {
 560                 /* Bonding device. */
 561                 if (!switch_info->representor)
 562                         snprintf(name, sizeof(name), "%s_%s",
 563                                  dpdk_dev->name,
 564                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 565                 else
 566                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 567                                  dpdk_dev->name,
 568                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 569                                  switch_info->port_name);
 570         }
 571         /* check if the device is already spawned */
 572         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 573                 rte_errno = EEXIST;
 574                 return NULL;
 575         }
 576         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 577         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 578                 struct mlx5_mp_id mp_id;
 579
 580                 eth_dev = rte_eth_dev_attach_secondary(name);
 581                 if (eth_dev == NULL) {
 582                         DRV_LOG(ERR, "can not attach rte ethdev");
 583                         rte_errno = ENOMEM;
 584                         return NULL;
 585                 }
 586                 eth_dev->device = dpdk_dev;
 587                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 588                 err = mlx5_proc_priv_init(eth_dev);
 589                 if (err)
 590                         return NULL;
 591                 mp_id.port_id = eth_dev->data->port_id;
 592                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 593                 /* Receive command fd from primary process */
 594                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 595                 if (err < 0)
 596                         goto err_secondary;
 597                 /* Remap UAR for Tx queues. */
 598                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 599                 if (err)
 600                         goto err_secondary;
 601                 /*
 602                  * Ethdev pointer is still required as input since
 603                  * the primary device is not accessible from the
 604                  * secondary process.
 605                  */
 606                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 607                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 608                 return eth_dev;
 609 err_secondary:
 610                 mlx5_dev_close(eth_dev);
 611                 return NULL;
 612         }
 613         /*
 614          * Some parameters ("tx_db_nc" in particularly) are needed in
 615          * advance to create dv/verbs device context. We proceed the
 616          * devargs here to get ones, and later proceed devargs again
 617          * to override some hardware settings.
 618          */
 619         err = mlx5_args(&config, dpdk_dev->devargs);
 620         if (err) {
 621                 err = rte_errno;
 622                 DRV_LOG(ERR, "failed to process device arguments: %s",
 623                         strerror(rte_errno));
 624                 goto error;
 625         }
 626         mlx5_malloc_mem_select(config.sys_mem_en);
 627         sh = mlx5_alloc_shared_dev_ctx(spawn, &config);
 628         if (!sh)
 629                 return NULL;
 630         config.devx = sh->devx;
 631 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 632         config.dest_tir = 1;
 633 #endif
 634 #ifdef HAVE_IBV_MLX5_MOD_SWP
 635         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 636 #endif
 637         /*
 638          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 639          * as all ConnectX-5 devices.
 640          */
 641 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 642         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 643 #endif
 644 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 645         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 646 #endif
 647         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 648         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 649                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 650                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 651                         mps = MLX5_MPW_ENHANCED;
 652                 } else {
 653                         DRV_LOG(DEBUG, "MPW is supported");
 654                         mps = MLX5_MPW;
 655                 }
 656         } else {
 657                 DRV_LOG(DEBUG, "MPW isn't supported");
 658                 mps = MLX5_MPW_DISABLED;
 659         }
 660 #ifdef HAVE_IBV_MLX5_MOD_SWP
 661         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 662                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 663         DRV_LOG(DEBUG, "SWP support: %u", swp);
 664 #endif
 665         config.swp = !!swp;
 666 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 667         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 668                 struct mlx5dv_striding_rq_caps mprq_caps =
 669                         dv_attr.striding_rq_caps;
 670
 671                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 672                         mprq_caps.min_single_stride_log_num_of_bytes);
 673                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 674                         mprq_caps.max_single_stride_log_num_of_bytes);
 675                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 676                         mprq_caps.min_single_wqe_log_num_of_strides);
 677                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 678                         mprq_caps.max_single_wqe_log_num_of_strides);
 679                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 680                         mprq_caps.supported_qpts);
 681                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 682                 mprq = 1;
 683                 mprq_min_stride_size_n =
 684                         mprq_caps.min_single_stride_log_num_of_bytes;
 685                 mprq_max_stride_size_n =
 686                         mprq_caps.max_single_stride_log_num_of_bytes;
 687                 mprq_min_stride_num_n =
 688                         mprq_caps.min_single_wqe_log_num_of_strides;
 689                 mprq_max_stride_num_n =
 690                         mprq_caps.max_single_wqe_log_num_of_strides;
 691         }
 692 #endif
 693         if (RTE_CACHE_LINE_SIZE == 128 &&
 694             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 695                 cqe_comp = 0;
 696         else
 697                 cqe_comp = 1;
 698         config.cqe_comp = cqe_comp;
 699 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 700         /* Whether device supports 128B Rx CQE padding. */
 701         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 702                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 703 #endif
 704 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 705         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 706                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 707                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 708                              (dv_attr.tunnel_offloads_caps &
 709                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 710                              (dv_attr.tunnel_offloads_caps &
 711                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 712         }
 713         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 714                 tunnel_en ? "" : "not ");
 715 #else
 716         DRV_LOG(WARNING,
 717                 "tunnel offloading disabled due to old OFED/rdma-core version");
 718 #endif
 719         config.tunnel_en = tunnel_en;
 720 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 721         mpls_en = ((dv_attr.tunnel_offloads_caps &
 722                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 723                    (dv_attr.tunnel_offloads_caps &
 724                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 725         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 726                 mpls_en ? "" : "not ");
 727 #else
 728         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 729                 " old OFED/rdma-core version or firmware configuration");
 730 #endif
 731         config.mpls_en = mpls_en;
 732         /* Check port status. */
 733         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 734         if (err) {
 735                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 736                 goto error;
 737         }
 738         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 739                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 740                 err = EINVAL;
 741                 goto error;
 742         }
 743         if (port_attr.state != IBV_PORT_ACTIVE)
 744                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 745                         mlx5_glue->port_state_str(port_attr.state),
 746                         port_attr.state);
 747         /* Allocate private eth device data. */
 748         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 749                            sizeof(*priv),
 750                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 751         if (priv == NULL) {
 752                 DRV_LOG(ERR, "priv allocation failure");
 753                 err = ENOMEM;
 754                 goto error;
 755         }
 756         priv->sh = sh;
 757         priv->dev_port = spawn->phys_port;
 758         priv->pci_dev = spawn->pci_dev;
 759         priv->mtu = RTE_ETHER_MTU;
 760         priv->mp_id.port_id = port_id;
 761         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 762         /* Some internal functions rely on Netlink sockets, open them now. */
 763         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 764         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 765         priv->representor = !!switch_info->representor;
 766         priv->master = !!switch_info->master;
 767         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 768         priv->vport_meta_tag = 0;
 769         priv->vport_meta_mask = 0;
 770         priv->pf_bond = spawn->pf_bond;
 771 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 772         /*
 773          * The DevX port query API is implemented. E-Switch may use
 774          * either vport or reg_c[0] metadata register to match on
 775          * vport index. The engaged part of metadata register is
 776          * defined by mask.
 777          */
 778         if (switch_info->representor || switch_info->master) {
 779                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 780                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 781                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 782                                                  &devx_port);
 783                 if (err) {
 784                         DRV_LOG(WARNING,
 785                                 "can't query devx port %d on device %s",
 786                                 spawn->phys_port,
 787                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 788                         devx_port.comp_mask = 0;
 789                 }
 790         }
 791         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 792                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 793                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 794                 if (!priv->vport_meta_mask) {
 795                         DRV_LOG(ERR, "vport zero mask for port %d"
 796                                      " on bonding device %s",
 797                                      spawn->phys_port,
 798                                      mlx5_os_get_dev_device_name
 799                                                         (spawn->phys_dev));
 800                         err = ENOTSUP;
 801                         goto error;
 802                 }
 803                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 804                         DRV_LOG(ERR, "invalid vport tag for port %d"
 805                                      " on bonding device %s",
 806                                      spawn->phys_port,
 807                                      mlx5_os_get_dev_device_name
 808                                                         (spawn->phys_dev));
 809                         err = ENOTSUP;
 810                         goto error;
 811                 }
 812         }
 813         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 814                 priv->vport_id = devx_port.vport_num;
 815         } else if (spawn->pf_bond >= 0) {
 816                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 817                              " on bonding device %s",
 818                              spawn->phys_port,
 819                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 820                 err = ENOTSUP;
 821                 goto error;
 822         } else {
 823                 /* Suppose vport index in compatible way. */
 824                 priv->vport_id = switch_info->representor ?
 825                                  switch_info->port_name + 1 : -1;
 826         }
 827 #else
 828         /*
 829          * Kernel/rdma_core support single E-Switch per PF configurations
 830          * only and vport_id field contains the vport index for
 831          * associated VF, which is deduced from representor port name.
 832          * For example, let's have the IB device port 10, it has
 833          * attached network device eth0, which has port name attribute
 834          * pf0vf2, we can deduce the VF number as 2, and set vport index
 835          * as 3 (2+1). This assigning schema should be changed if the
 836          * multiple E-Switch instances per PF configurations or/and PCI
 837          * subfunctions are added.
 838          */
 839         priv->vport_id = switch_info->representor ?
 840                          switch_info->port_name + 1 : -1;
 841 #endif
 842         /* representor_id field keeps the unmodified VF index. */
 843         priv->representor_id = switch_info->representor ?
 844                                switch_info->port_name : -1;
 845         /*
 846          * Look for sibling devices in order to reuse their switch domain
 847          * if any, otherwise allocate one.
 848          */
 849         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 850                 const struct mlx5_priv *opriv =
 851                         rte_eth_devices[port_id].data->dev_private;
 852
 853                 if (!opriv ||
 854                     opriv->sh != priv->sh ||
 855                         opriv->domain_id ==
 856                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 857                         continue;
 858                 priv->domain_id = opriv->domain_id;
 859                 break;
 860         }
 861         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 862                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 863                 if (err) {
 864                         err = rte_errno;
 865                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 866                                 strerror(rte_errno));
 867                         goto error;
 868                 }
 869                 own_domain_id = 1;
 870         }
 871         /* Override some values set by hardware configuration. */
 872         mlx5_args(&config, dpdk_dev->devargs);
 873         err = mlx5_dev_check_sibling_config(priv, &config);
 874         if (err)
 875                 goto error;
 876         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 877                             IBV_DEVICE_RAW_IP_CSUM);
 878         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 879                 (config.hw_csum ? "" : "not "));
 880 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 881         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 882         DRV_LOG(DEBUG, "counters are not supported");
 883 #endif
 884 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 885         if (config.dv_flow_en) {
 886                 DRV_LOG(WARNING, "DV flow is not supported");
 887                 config.dv_flow_en = 0;
 888         }
 889 #endif
 890         config.ind_table_max_size =
 891                 sh->device_attr.max_rwq_indirection_table_size;
 892         /*
 893          * Remove this check once DPDK supports larger/variable
 894          * indirection tables.
 895          */
 896         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
 897                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
 898         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 899                 config.ind_table_max_size);
 900         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
 901                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 902         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
 903                 (config.hw_vlan_strip ? "" : "not "));
 904         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
 905                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
 906 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 907         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
 908 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 909         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
 910                         IBV_DEVICE_PCI_WRITE_END_PADDING);
 911 #endif
 912         if (config.hw_padding && !hw_padding) {
 913                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 914                 config.hw_padding = 0;
 915         } else if (config.hw_padding) {
 916                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
 917         }
 918         config.tso = (sh->device_attr.max_tso > 0 &&
 919                       (sh->device_attr.tso_supported_qpts &
 920                        (1 << IBV_QPT_RAW_PACKET)));
 921         if (config.tso)
 922                 config.tso_max_payload_sz = sh->device_attr.max_tso;
 923         /*
 924          * MPW is disabled by default, while the Enhanced MPW is enabled
 925          * by default.
 926          */
 927         if (config.mps == MLX5_ARG_UNSET)
 928                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
 929                                                           MLX5_MPW_DISABLED;
 930         else
 931                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
 932         DRV_LOG(INFO, "%sMPS is %s",
 933                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
 934                 config.mps == MLX5_MPW ? "legacy " : "",
 935                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
 936         if (config.cqe_comp && !cqe_comp) {
 937                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
 938                 config.cqe_comp = 0;
 939         }
 940         if (config.cqe_pad && !cqe_pad) {
 941                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
 942                 config.cqe_pad = 0;
 943         } else if (config.cqe_pad) {
 944                 DRV_LOG(INFO, "Rx CQE padding is enabled");
 945         }
 946         if (config.devx) {
 947                 priv->counter_fallback = 0;
 948                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
 949                 if (err) {
 950                         err = -err;
 951                         goto error;
 952                 }
 953                 if (!config.hca_attr.flow_counters_dump)
 954                         priv->counter_fallback = 1;
 955 #ifndef HAVE_IBV_DEVX_ASYNC
 956                 priv->counter_fallback = 1;
 957 #endif
 958                 if (priv->counter_fallback)
 959                         DRV_LOG(INFO, "Use fall-back DV counter management");
 960                 /* Check for LRO support. */
 961                 if (config.dest_tir && config.hca_attr.lro_cap &&
 962                     config.dv_flow_en) {
 963                         /* TBD check tunnel lro caps. */
 964                         config.lro.supported = config.hca_attr.lro_cap;
 965                         DRV_LOG(DEBUG, "Device supports LRO");
 966                         /*
 967                          * If LRO timeout is not configured by application,
 968                          * use the minimal supported value.
 969                          */
 970                         if (!config.lro.timeout)
 971                                 config.lro.timeout =
 972                                 config.hca_attr.lro_timer_supported_periods[0];
 973                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
 974                                 config.lro.timeout);
 975                 }
 976 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
 977                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
 978                     config.dv_flow_en) {
 979                         uint8_t reg_c_mask =
 980                                 config.hca_attr.qos.flow_meter_reg_c_ids;
 981                         /*
 982                          * Meter needs two REG_C's for color match and pre-sfx
 983                          * flow match. Here get the REG_C for color match.
 984                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
 985                          */
 986                         reg_c_mask &= 0xfc;
 987                         if (__builtin_popcount(reg_c_mask) < 1) {
 988                                 priv->mtr_en = 0;
 989                                 DRV_LOG(WARNING, "No available register for"
 990                                         " meter.");
 991                         } else {
 992                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
 993                                                       REG_C_0;
 994                                 priv->mtr_en = 1;
 995                                 priv->mtr_reg_share =
 996                                       config.hca_attr.qos.flow_meter_reg_share;
 997                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
 998                                         priv->mtr_color_reg);
 999                         }
1000                 }
1001 #endif
1002         }
1003         if (config.tx_pp) {
1004                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1005                         config.hca_attr.dev_freq_khz);
1006                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1007                         config.hca_attr.qos.packet_pacing ? "" : "not ");
1008                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1009                         config.hca_attr.cross_channel ? "" : "not ");
1010                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1011                         config.hca_attr.wqe_index_ignore ? "" : "not ");
1012                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1013                         config.hca_attr.non_wire_sq ? "" : "not ");
1014                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1015                         config.hca_attr.log_max_static_sq_wq ? "" : "not ",
1016                         config.hca_attr.log_max_static_sq_wq);
1017                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1018                         config.hca_attr.qos.wqe_rate_pp ? "" : "not ");
1019                 if (!config.devx) {
1020                         DRV_LOG(ERR, "DevX is required for packet pacing");
1021                         err = ENODEV;
1022                         goto error;
1023                 }
1024                 if (!config.hca_attr.qos.packet_pacing) {
1025                         DRV_LOG(ERR, "Packet pacing is not supported");
1026                         err = ENODEV;
1027                         goto error;
1028                 }
1029                 if (!config.hca_attr.cross_channel) {
1030                         DRV_LOG(ERR, "Cross channel operations are"
1031                                      " required for packet pacing");
1032                         err = ENODEV;
1033                         goto error;
1034                 }
1035                 if (!config.hca_attr.wqe_index_ignore) {
1036                         DRV_LOG(ERR, "WQE index ignore feature is"
1037                                      " required for packet pacing");
1038                         err = ENODEV;
1039                         goto error;
1040                 }
1041                 if (!config.hca_attr.non_wire_sq) {
1042                         DRV_LOG(ERR, "Non-wire SQ feature is"
1043                                      " required for packet pacing");
1044                         err = ENODEV;
1045                         goto error;
1046                 }
1047                 if (!config.hca_attr.log_max_static_sq_wq) {
1048                         DRV_LOG(ERR, "Static WQE SQ feature is"
1049                                      " required for packet pacing");
1050                         err = ENODEV;
1051                         goto error;
1052                 }
1053                 if (!config.hca_attr.qos.wqe_rate_pp) {
1054                         DRV_LOG(ERR, "WQE rate mode is required"
1055                                      " for packet pacing");
1056                         err = ENODEV;
1057                         goto error;
1058                 }
1059 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1060                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1061                              " can't create queues for packet pacing");
1062                 err = ENODEV;
1063                 goto error;
1064 #endif
1065         }
1066         if (config.devx) {
1067                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1068
1069                 err = mlx5_devx_cmd_register_read
1070                         (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1071                         reg, MLX5_ST_SZ_DW(register_mtutc));
1072                 if (!err) {
1073                         uint32_t ts_mode;
1074
1075                         /* MTUTC register is read successfully. */
1076                         ts_mode = MLX5_GET(register_mtutc, reg,
1077                                            time_stamp_mode);
1078                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1079                                 config.rt_timestamp = 1;
1080                 } else {
1081                         /* Kernel does not support register reading. */
1082                         if (config.hca_attr.dev_freq_khz ==
1083                                                  (NS_PER_S / MS_PER_S))
1084                                 config.rt_timestamp = 1;
1085                 }
1086         }
1087         /*
1088          * If HW has bug working with tunnel packet decapsulation and
1089          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1090          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1091          */
1092         if (config.hca_attr.scatter_fcs_w_decap_disable && config.decap_en)
1093                 config.hw_fcs_strip = 0;
1094         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1095                 (config.hw_fcs_strip ? "" : "not "));
1096         if (config.mprq.enabled && mprq) {
1097                 if (config.mprq.stride_num_n &&
1098                     (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1099                      config.mprq.stride_num_n < mprq_min_stride_num_n)) {
1100                         config.mprq.stride_num_n =
1101                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1102                                                 mprq_min_stride_num_n),
1103                                         mprq_max_stride_num_n);
1104                         DRV_LOG(WARNING,
1105                                 "the number of strides"
1106                                 " for Multi-Packet RQ is out of range,"
1107                                 " setting default value (%u)",
1108                                 1 << config.mprq.stride_num_n);
1109                 }
1110                 if (config.mprq.stride_size_n &&
1111                     (config.mprq.stride_size_n > mprq_max_stride_size_n ||
1112                      config.mprq.stride_size_n < mprq_min_stride_size_n)) {
1113                         config.mprq.stride_size_n =
1114                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1115                                                 mprq_min_stride_size_n),
1116                                         mprq_max_stride_size_n);
1117                         DRV_LOG(WARNING,
1118                                 "the size of a stride"
1119                                 " for Multi-Packet RQ is out of range,"
1120                                 " setting default value (%u)",
1121                                 1 << config.mprq.stride_size_n);
1122                 }
1123                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1124                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1125         } else if (config.mprq.enabled && !mprq) {
1126                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1127                 config.mprq.enabled = 0;
1128         }
1129         if (config.max_dump_files_num == 0)
1130                 config.max_dump_files_num = 128;
1131         eth_dev = rte_eth_dev_allocate(name);
1132         if (eth_dev == NULL) {
1133                 DRV_LOG(ERR, "can not allocate rte ethdev");
1134                 err = ENOMEM;
1135                 goto error;
1136         }
1137         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1138         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1139         if (priv->representor) {
1140                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1141                 eth_dev->data->representor_id = priv->representor_id;
1142         }
1143         /*
1144          * Store associated network device interface index. This index
1145          * is permanent throughout the lifetime of device. So, we may store
1146          * the ifindex here and use the cached value further.
1147          */
1148         MLX5_ASSERT(spawn->ifindex);
1149         priv->if_index = spawn->ifindex;
1150         eth_dev->data->dev_private = priv;
1151         priv->dev_data = eth_dev->data;
1152         eth_dev->data->mac_addrs = priv->mac;
1153         eth_dev->device = dpdk_dev;
1154         /* Configure the first MAC address by default. */
1155         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1156                 DRV_LOG(ERR,
1157                         "port %u cannot get MAC address, is mlx5_en"
1158                         " loaded? (errno: %s)",
1159                         eth_dev->data->port_id, strerror(rte_errno));
1160                 err = ENODEV;
1161                 goto error;
1162         }
1163         DRV_LOG(INFO,
1164                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1165                 eth_dev->data->port_id,
1166                 mac.addr_bytes[0], mac.addr_bytes[1],
1167                 mac.addr_bytes[2], mac.addr_bytes[3],
1168                 mac.addr_bytes[4], mac.addr_bytes[5]);
1169 #ifdef RTE_LIBRTE_MLX5_DEBUG
1170         {
1171                 char ifname[IF_NAMESIZE];
1172
1173                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1174                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1175                                 eth_dev->data->port_id, ifname);
1176                 else
1177                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1178                                 eth_dev->data->port_id);
1179         }
1180 #endif
1181         /* Get actual MTU if possible. */
1182         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1183         if (err) {
1184                 err = rte_errno;
1185                 goto error;
1186         }
1187         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1188                 priv->mtu);
1189         /* Initialize burst functions to prevent crashes before link-up. */
1190         eth_dev->rx_pkt_burst = removed_rx_burst;
1191         eth_dev->tx_pkt_burst = removed_tx_burst;
1192         eth_dev->dev_ops = &mlx5_os_dev_ops;
1193         /* Register MAC address. */
1194         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1195         if (config.vf && config.vf_nl_en)
1196                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1197                                       mlx5_ifindex(eth_dev),
1198                                       eth_dev->data->mac_addrs,
1199                                       MLX5_MAX_MAC_ADDRESSES);
1200         priv->flows = 0;
1201         priv->ctrl_flows = 0;
1202         TAILQ_INIT(&priv->flow_meters);
1203         TAILQ_INIT(&priv->flow_meter_profiles);
1204         /* Hint libmlx5 to use PMD allocator for data plane resources */
1205         mlx5_glue->dv_set_context_attr(sh->ctx,
1206                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1207                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1208                                 .alloc = &mlx5_alloc_verbs_buf,
1209                                 .free = &mlx5_free_verbs_buf,
1210                                 .data = priv,
1211                         }));
1212         /* Bring Ethernet device up. */
1213         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1214                 eth_dev->data->port_id);
1215         mlx5_set_link_up(eth_dev);
1216         /*
1217          * Even though the interrupt handler is not installed yet,
1218          * interrupts will still trigger on the async_fd from
1219          * Verbs context returned by ibv_open_device().
1220          */
1221         mlx5_link_update(eth_dev, 0);
1222 #ifdef HAVE_MLX5DV_DR_ESWITCH
1223         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1224               (switch_info->representor || switch_info->master)))
1225                 config.dv_esw_en = 0;
1226 #else
1227         config.dv_esw_en = 0;
1228 #endif
1229         /* Detect minimal data bytes to inline. */
1230         mlx5_set_min_inline(spawn, &config);
1231         /* Store device configuration on private structure. */
1232         priv->config = config;
1233         /* Create context for virtual machine VLAN workaround. */
1234         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1235         if (config.dv_flow_en) {
1236                 err = mlx5_alloc_shared_dr(priv);
1237                 if (err)
1238                         goto error;
1239                 /*
1240                  * RSS id is shared with meter flow id. Meter flow id can only
1241                  * use the 24 MSB of the register.
1242                  */
1243                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1244                                      MLX5_MTR_COLOR_BITS);
1245                 if (!priv->qrss_id_pool) {
1246                         DRV_LOG(ERR, "can't create flow id pool");
1247                         err = ENOMEM;
1248                         goto error;
1249                 }
1250         }
1251         /* Supported Verbs flow priority number detection. */
1252         err = mlx5_flow_discover_priorities(eth_dev);
1253         if (err < 0) {
1254                 err = -err;
1255                 goto error;
1256         }
1257         priv->config.flow_prio = err;
1258         if (!priv->config.dv_esw_en &&
1259             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1260                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1261                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1262                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1263         }
1264         mlx5_set_metadata_mask(eth_dev);
1265         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1266             !priv->sh->dv_regc0_mask) {
1267                 DRV_LOG(ERR, "metadata mode %u is not supported "
1268                              "(no metadata reg_c[0] is available)",
1269                              priv->config.dv_xmeta_en);
1270                         err = ENOTSUP;
1271                         goto error;
1272         }
1273         /*
1274          * Allocate the buffer for flow creating, just once.
1275          * The allocation must be done before any flow creating.
1276          */
1277         mlx5_flow_alloc_intermediate(eth_dev);
1278         /* Query availability of metadata reg_c's. */
1279         err = mlx5_flow_discover_mreg_c(eth_dev);
1280         if (err < 0) {
1281                 err = -err;
1282                 goto error;
1283         }
1284         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1285                 DRV_LOG(DEBUG,
1286                         "port %u extensive metadata register is not supported",
1287                         eth_dev->data->port_id);
1288                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1289                         DRV_LOG(ERR, "metadata mode %u is not supported "
1290                                      "(no metadata registers available)",
1291                                      priv->config.dv_xmeta_en);
1292                         err = ENOTSUP;
1293                         goto error;
1294                 }
1295         }
1296         if (priv->config.dv_flow_en &&
1297             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1298             mlx5_flow_ext_mreg_supported(eth_dev) &&
1299             priv->sh->dv_regc0_mask) {
1300                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1301                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1302                 if (!priv->mreg_cp_tbl) {
1303                         err = ENOMEM;
1304                         goto error;
1305                 }
1306         }
1307         return eth_dev;
1308 error:
1309         if (priv) {
1310                 if (priv->mreg_cp_tbl)
1311                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1312                 if (priv->sh)
1313                         mlx5_os_free_shared_dr(priv);
1314                 if (priv->nl_socket_route >= 0)
1315                         close(priv->nl_socket_route);
1316                 if (priv->nl_socket_rdma >= 0)
1317                         close(priv->nl_socket_rdma);
1318                 if (priv->vmwa_context)
1319                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1320                 if (priv->qrss_id_pool)
1321                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1322                 if (own_domain_id)
1323                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1324                 mlx5_free(priv);
1325                 if (eth_dev != NULL)
1326                         eth_dev->data->dev_private = NULL;
1327         }
1328         if (eth_dev != NULL) {
1329                 /* mac_addrs must not be freed alone because part of
1330                  * dev_private
1331                  **/
1332                 eth_dev->data->mac_addrs = NULL;
1333                 rte_eth_dev_release_port(eth_dev);
1334         }
1335         if (sh)
1336                 mlx5_free_shared_dev_ctx(sh);
1337         MLX5_ASSERT(err > 0);
1338         rte_errno = err;
1339         return NULL;
1340 }
1341
1342 /**
1343  * Comparison callback to sort device data.
1344  *
1345  * This is meant to be used with qsort().
1346  *
1347  * @param a[in]
1348  *   Pointer to pointer to first data object.
1349  * @param b[in]
1350  *   Pointer to pointer to second data object.
1351  *
1352  * @return
1353  *   0 if both objects are equal, less than 0 if the first argument is less
1354  *   than the second, greater than 0 otherwise.
1355  */
1356 static int
1357 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1358 {
1359         const struct mlx5_switch_info *si_a =
1360                 &((const struct mlx5_dev_spawn_data *)a)->info;
1361         const struct mlx5_switch_info *si_b =
1362                 &((const struct mlx5_dev_spawn_data *)b)->info;
1363         int ret;
1364
1365         /* Master device first. */
1366         ret = si_b->master - si_a->master;
1367         if (ret)
1368                 return ret;
1369         /* Then representor devices. */
1370         ret = si_b->representor - si_a->representor;
1371         if (ret)
1372                 return ret;
1373         /* Unidentified devices come last in no specific order. */
1374         if (!si_a->representor)
1375                 return 0;
1376         /* Order representors by name. */
1377         return si_a->port_name - si_b->port_name;
1378 }
1379
1380 /**
1381  * Match PCI information for possible slaves of bonding device.
1382  *
1383  * @param[in] ibv_dev
1384  *   Pointer to Infiniband device structure.
1385  * @param[in] pci_dev
1386  *   Pointer to PCI device structure to match PCI address.
1387  * @param[in] nl_rdma
1388  *   Netlink RDMA group socket handle.
1389  *
1390  * @return
1391  *   negative value if no bonding device found, otherwise
1392  *   positive index of slave PF in bonding.
1393  */
1394 static int
1395 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1396                            const struct rte_pci_device *pci_dev,
1397                            int nl_rdma)
1398 {
1399         char ifname[IF_NAMESIZE + 1];
1400         unsigned int ifindex;
1401         unsigned int np, i;
1402         FILE *file = NULL;
1403         int pf = -1;
1404
1405         /*
1406          * Try to get master device name. If something goes
1407          * wrong suppose the lack of kernel support and no
1408          * bonding devices.
1409          */
1410         if (nl_rdma < 0)
1411                 return -1;
1412         if (!strstr(ibv_dev->name, "bond"))
1413                 return -1;
1414         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1415         if (!np)
1416                 return -1;
1417         /*
1418          * The Master device might not be on the predefined
1419          * port (not on port index 1, it is not garanted),
1420          * we have to scan all Infiniband device port and
1421          * find master.
1422          */
1423         for (i = 1; i <= np; ++i) {
1424                 /* Check whether Infiniband port is populated. */
1425                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1426                 if (!ifindex)
1427                         continue;
1428                 if (!if_indextoname(ifindex, ifname))
1429                         continue;
1430                 /* Try to read bonding slave names from sysfs. */
1431                 MKSTR(slaves,
1432                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1433                 file = fopen(slaves, "r");
1434                 if (file)
1435                         break;
1436         }
1437         if (!file)
1438                 return -1;
1439         /* Use safe format to check maximal buffer length. */
1440         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1441         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1442                 char tmp_str[IF_NAMESIZE + 32];
1443                 struct rte_pci_addr pci_addr;
1444                 struct mlx5_switch_info info;
1445
1446                 /* Process slave interface names in the loop. */
1447                 snprintf(tmp_str, sizeof(tmp_str),
1448                          "/sys/class/net/%s", ifname);
1449                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1450                         DRV_LOG(WARNING, "can not get PCI address"
1451                                          " for netdev \"%s\"", ifname);
1452                         continue;
1453                 }
1454                 if (pci_dev->addr.domain != pci_addr.domain ||
1455                     pci_dev->addr.bus != pci_addr.bus ||
1456                     pci_dev->addr.devid != pci_addr.devid ||
1457                     pci_dev->addr.function != pci_addr.function)
1458                         continue;
1459                 /* Slave interface PCI address match found. */
1460                 fclose(file);
1461                 snprintf(tmp_str, sizeof(tmp_str),
1462                          "/sys/class/net/%s/phys_port_name", ifname);
1463                 file = fopen(tmp_str, "rb");
1464                 if (!file)
1465                         break;
1466                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1467                 if (fscanf(file, "%32s", tmp_str) == 1)
1468                         mlx5_translate_port_name(tmp_str, &info);
1469                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1470                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1471                         pf = info.port_name;
1472                 break;
1473         }
1474         if (file)
1475                 fclose(file);
1476         return pf;
1477 }
1478
1479 /**
1480  * DPDK callback to register a PCI device.
1481  *
1482  * This function spawns Ethernet devices out of a given PCI device.
1483  *
1484  * @param[in] pci_drv
1485  *   PCI driver structure (mlx5_driver).
1486  * @param[in] pci_dev
1487  *   PCI device information.
1488  *
1489  * @return
1490  *   0 on success, a negative errno value otherwise and rte_errno is set.
1491  */
1492 int
1493 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1494                   struct rte_pci_device *pci_dev)
1495 {
1496         struct ibv_device **ibv_list;
1497         /*
1498          * Number of found IB Devices matching with requested PCI BDF.
1499          * nd != 1 means there are multiple IB devices over the same
1500          * PCI device and we have representors and master.
1501          */
1502         unsigned int nd = 0;
1503         /*
1504          * Number of found IB device Ports. nd = 1 and np = 1..n means
1505          * we have the single multiport IB device, and there may be
1506          * representors attached to some of found ports.
1507          */
1508         unsigned int np = 0;
1509         /*
1510          * Number of DPDK ethernet devices to Spawn - either over
1511          * multiple IB devices or multiple ports of single IB device.
1512          * Actually this is the number of iterations to spawn.
1513          */
1514         unsigned int ns = 0;
1515         /*
1516          * Bonding device
1517          *   < 0 - no bonding device (single one)
1518          *  >= 0 - bonding device (value is slave PF index)
1519          */
1520         int bd = -1;
1521         struct mlx5_dev_spawn_data *list = NULL;
1522         struct mlx5_dev_config dev_config;
1523         int ret;
1524
1525         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1526                 mlx5_pmd_socket_init();
1527         ret = mlx5_init_once();
1528         if (ret) {
1529                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1530                         strerror(rte_errno));
1531                 return -rte_errno;
1532         }
1533         errno = 0;
1534         ibv_list = mlx5_glue->get_device_list(&ret);
1535         if (!ibv_list) {
1536                 rte_errno = errno ? errno : ENOSYS;
1537                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1538                 return -rte_errno;
1539         }
1540         /*
1541          * First scan the list of all Infiniband devices to find
1542          * matching ones, gathering into the list.
1543          */
1544         struct ibv_device *ibv_match[ret + 1];
1545         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1546         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1547         unsigned int i;
1548
1549         while (ret-- > 0) {
1550                 struct rte_pci_addr pci_addr;
1551
1552                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1553                 bd = mlx5_device_bond_pci_match
1554                                 (ibv_list[ret], pci_dev, nl_rdma);
1555                 if (bd >= 0) {
1556                         /*
1557                          * Bonding device detected. Only one match is allowed,
1558                          * the bonding is supported over multi-port IB device,
1559                          * there should be no matches on representor PCI
1560                          * functions or non VF LAG bonding devices with
1561                          * specified address.
1562                          */
1563                         if (nd) {
1564                                 DRV_LOG(ERR,
1565                                         "multiple PCI match on bonding device"
1566                                         "\"%s\" found", ibv_list[ret]->name);
1567                                 rte_errno = ENOENT;
1568                                 ret = -rte_errno;
1569                                 goto exit;
1570                         }
1571                         DRV_LOG(INFO, "PCI information matches for"
1572                                       " slave %d bonding device \"%s\"",
1573                                       bd, ibv_list[ret]->name);
1574                         ibv_match[nd++] = ibv_list[ret];
1575                         break;
1576                 }
1577                 if (mlx5_dev_to_pci_addr
1578                         (ibv_list[ret]->ibdev_path, &pci_addr))
1579                         continue;
1580                 if (pci_dev->addr.domain != pci_addr.domain ||
1581                     pci_dev->addr.bus != pci_addr.bus ||
1582                     pci_dev->addr.devid != pci_addr.devid ||
1583                     pci_dev->addr.function != pci_addr.function)
1584                         continue;
1585                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1586                         ibv_list[ret]->name);
1587                 ibv_match[nd++] = ibv_list[ret];
1588         }
1589         ibv_match[nd] = NULL;
1590         if (!nd) {
1591                 /* No device matches, just complain and bail out. */
1592                 DRV_LOG(WARNING,
1593                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1594                         " are kernel drivers loaded?",
1595                         pci_dev->addr.domain, pci_dev->addr.bus,
1596                         pci_dev->addr.devid, pci_dev->addr.function);
1597                 rte_errno = ENOENT;
1598                 ret = -rte_errno;
1599                 goto exit;
1600         }
1601         if (nd == 1) {
1602                 /*
1603                  * Found single matching device may have multiple ports.
1604                  * Each port may be representor, we have to check the port
1605                  * number and check the representors existence.
1606                  */
1607                 if (nl_rdma >= 0)
1608                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1609                 if (!np)
1610                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1611                                          " ports number", ibv_match[0]->name);
1612                 if (bd >= 0 && !np) {
1613                         DRV_LOG(ERR, "can not get ports"
1614                                      " for bonding device");
1615                         rte_errno = ENOENT;
1616                         ret = -rte_errno;
1617                         goto exit;
1618                 }
1619         }
1620 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1621         if (bd >= 0) {
1622                 /*
1623                  * This may happen if there is VF LAG kernel support and
1624                  * application is compiled with older rdma_core library.
1625                  */
1626                 DRV_LOG(ERR,
1627                         "No kernel/verbs support for VF LAG bonding found.");
1628                 rte_errno = ENOTSUP;
1629                 ret = -rte_errno;
1630                 goto exit;
1631         }
1632 #endif
1633         /*
1634          * Now we can determine the maximal
1635          * amount of devices to be spawned.
1636          */
1637         list = mlx5_malloc(MLX5_MEM_ZERO,
1638                            sizeof(struct mlx5_dev_spawn_data) *
1639                            (np ? np : nd),
1640                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1641         if (!list) {
1642                 DRV_LOG(ERR, "spawn data array allocation failure");
1643                 rte_errno = ENOMEM;
1644                 ret = -rte_errno;
1645                 goto exit;
1646         }
1647         if (bd >= 0 || np > 1) {
1648                 /*
1649                  * Single IB device with multiple ports found,
1650                  * it may be E-Switch master device and representors.
1651                  * We have to perform identification through the ports.
1652                  */
1653                 MLX5_ASSERT(nl_rdma >= 0);
1654                 MLX5_ASSERT(ns == 0);
1655                 MLX5_ASSERT(nd == 1);
1656                 MLX5_ASSERT(np);
1657                 for (i = 1; i <= np; ++i) {
1658                         list[ns].max_port = np;
1659                         list[ns].phys_port = i;
1660                         list[ns].phys_dev = ibv_match[0];
1661                         list[ns].eth_dev = NULL;
1662                         list[ns].pci_dev = pci_dev;
1663                         list[ns].pf_bond = bd;
1664                         list[ns].ifindex = mlx5_nl_ifindex
1665                                 (nl_rdma,
1666                                 mlx5_os_get_dev_device_name
1667                                                 (list[ns].phys_dev), i);
1668                         if (!list[ns].ifindex) {
1669                                 /*
1670                                  * No network interface index found for the
1671                                  * specified port, it means there is no
1672                                  * representor on this port. It's OK,
1673                                  * there can be disabled ports, for example
1674                                  * if sriov_numvfs < sriov_totalvfs.
1675                                  */
1676                                 continue;
1677                         }
1678                         ret = -1;
1679                         if (nl_route >= 0)
1680                                 ret = mlx5_nl_switch_info
1681                                                (nl_route,
1682                                                 list[ns].ifindex,
1683                                                 &list[ns].info);
1684                         if (ret || (!list[ns].info.representor &&
1685                                     !list[ns].info.master)) {
1686                                 /*
1687                                  * We failed to recognize representors with
1688                                  * Netlink, let's try to perform the task
1689                                  * with sysfs.
1690                                  */
1691                                 ret =  mlx5_sysfs_switch_info
1692                                                 (list[ns].ifindex,
1693                                                  &list[ns].info);
1694                         }
1695                         if (!ret && bd >= 0) {
1696                                 switch (list[ns].info.name_type) {
1697                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1698                                         if (list[ns].info.port_name == bd)
1699                                                 ns++;
1700                                         break;
1701                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1702                                         /* Fallthrough */
1703                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1704                                         if (list[ns].info.pf_num == bd)
1705                                                 ns++;
1706                                         break;
1707                                 default:
1708                                         break;
1709                                 }
1710                                 continue;
1711                         }
1712                         if (!ret && (list[ns].info.representor ^
1713                                      list[ns].info.master))
1714                                 ns++;
1715                 }
1716                 if (!ns) {
1717                         DRV_LOG(ERR,
1718                                 "unable to recognize master/representors"
1719                                 " on the IB device with multiple ports");
1720                         rte_errno = ENOENT;
1721                         ret = -rte_errno;
1722                         goto exit;
1723                 }
1724         } else {
1725                 /*
1726                  * The existence of several matching entries (nd > 1) means
1727                  * port representors have been instantiated. No existing Verbs
1728                  * call nor sysfs entries can tell them apart, this can only
1729                  * be done through Netlink calls assuming kernel drivers are
1730                  * recent enough to support them.
1731                  *
1732                  * In the event of identification failure through Netlink,
1733                  * try again through sysfs, then:
1734                  *
1735                  * 1. A single IB device matches (nd == 1) with single
1736                  *    port (np=0/1) and is not a representor, assume
1737                  *    no switch support.
1738                  *
1739                  * 2. Otherwise no safe assumptions can be made;
1740                  *    complain louder and bail out.
1741                  */
1742                 for (i = 0; i != nd; ++i) {
1743                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1744                         list[ns].max_port = 1;
1745                         list[ns].phys_port = 1;
1746                         list[ns].phys_dev = ibv_match[i];
1747                         list[ns].eth_dev = NULL;
1748                         list[ns].pci_dev = pci_dev;
1749                         list[ns].pf_bond = -1;
1750                         list[ns].ifindex = 0;
1751                         if (nl_rdma >= 0)
1752                                 list[ns].ifindex = mlx5_nl_ifindex
1753                                 (nl_rdma,
1754                                 mlx5_os_get_dev_device_name
1755                                                 (list[ns].phys_dev), 1);
1756                         if (!list[ns].ifindex) {
1757                                 char ifname[IF_NAMESIZE];
1758
1759                                 /*
1760                                  * Netlink failed, it may happen with old
1761                                  * ib_core kernel driver (before 4.16).
1762                                  * We can assume there is old driver because
1763                                  * here we are processing single ports IB
1764                                  * devices. Let's try sysfs to retrieve
1765                                  * the ifindex. The method works for
1766                                  * master device only.
1767                                  */
1768                                 if (nd > 1) {
1769                                         /*
1770                                          * Multiple devices found, assume
1771                                          * representors, can not distinguish
1772                                          * master/representor and retrieve
1773                                          * ifindex via sysfs.
1774                                          */
1775                                         continue;
1776                                 }
1777                                 ret = mlx5_get_ifname_sysfs
1778                                         (ibv_match[i]->ibdev_path, ifname);
1779                                 if (!ret)
1780                                         list[ns].ifindex =
1781                                                 if_nametoindex(ifname);
1782                                 if (!list[ns].ifindex) {
1783                                         /*
1784                                          * No network interface index found
1785                                          * for the specified device, it means
1786                                          * there it is neither representor
1787                                          * nor master.
1788                                          */
1789                                         continue;
1790                                 }
1791                         }
1792                         ret = -1;
1793                         if (nl_route >= 0)
1794                                 ret = mlx5_nl_switch_info
1795                                                (nl_route,
1796                                                 list[ns].ifindex,
1797                                                 &list[ns].info);
1798                         if (ret || (!list[ns].info.representor &&
1799                                     !list[ns].info.master)) {
1800                                 /*
1801                                  * We failed to recognize representors with
1802                                  * Netlink, let's try to perform the task
1803                                  * with sysfs.
1804                                  */
1805                                 ret =  mlx5_sysfs_switch_info
1806                                                 (list[ns].ifindex,
1807                                                  &list[ns].info);
1808                         }
1809                         if (!ret && (list[ns].info.representor ^
1810                                      list[ns].info.master)) {
1811                                 ns++;
1812                         } else if ((nd == 1) &&
1813                                    !list[ns].info.representor &&
1814                                    !list[ns].info.master) {
1815                                 /*
1816                                  * Single IB device with
1817                                  * one physical port and
1818                                  * attached network device.
1819                                  * May be SRIOV is not enabled
1820                                  * or there is no representors.
1821                                  */
1822                                 DRV_LOG(INFO, "no E-Switch support detected");
1823                                 ns++;
1824                                 break;
1825                         }
1826                 }
1827                 if (!ns) {
1828                         DRV_LOG(ERR,
1829                                 "unable to recognize master/representors"
1830                                 " on the multiple IB devices");
1831                         rte_errno = ENOENT;
1832                         ret = -rte_errno;
1833                         goto exit;
1834                 }
1835         }
1836         MLX5_ASSERT(ns);
1837         /*
1838          * Sort list to probe devices in natural order for users convenience
1839          * (i.e. master first, then representors from lowest to highest ID).
1840          */
1841         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1842         /* Default configuration. */
1843         dev_config = (struct mlx5_dev_config){
1844                 .hw_padding = 0,
1845                 .mps = MLX5_ARG_UNSET,
1846                 .dbnc = MLX5_ARG_UNSET,
1847                 .rx_vec_en = 1,
1848                 .txq_inline_max = MLX5_ARG_UNSET,
1849                 .txq_inline_min = MLX5_ARG_UNSET,
1850                 .txq_inline_mpw = MLX5_ARG_UNSET,
1851                 .txqs_inline = MLX5_ARG_UNSET,
1852                 .vf_nl_en = 1,
1853                 .mr_ext_memseg_en = 1,
1854                 .mprq = {
1855                         .enabled = 0, /* Disabled by default. */
1856                         .stride_num_n = 0,
1857                         .stride_size_n = 0,
1858                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1859                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1860                 },
1861                 .dv_esw_en = 1,
1862                 .dv_flow_en = 1,
1863                 .decap_en = 1,
1864                 .log_hp_size = MLX5_ARG_UNSET,
1865         };
1866         /* Device specific configuration. */
1867         switch (pci_dev->id.device_id) {
1868         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1869         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1870         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1871         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1872         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1873         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1874         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1875                 dev_config.vf = 1;
1876                 break;
1877         default:
1878                 break;
1879         }
1880         for (i = 0; i != ns; ++i) {
1881                 uint32_t restore;
1882
1883                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1884                                                  &list[i],
1885                                                  dev_config);
1886                 if (!list[i].eth_dev) {
1887                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1888                                 break;
1889                         /* Device is disabled or already spawned. Ignore it. */
1890                         continue;
1891                 }
1892                 restore = list[i].eth_dev->data->dev_flags;
1893                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1894                 /* Restore non-PCI flags cleared by the above call. */
1895                 list[i].eth_dev->data->dev_flags |= restore;
1896                 rte_eth_dev_probing_finish(list[i].eth_dev);
1897         }
1898         if (i != ns) {
1899                 DRV_LOG(ERR,
1900                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1901                         " encountering an error: %s",
1902                         pci_dev->addr.domain, pci_dev->addr.bus,
1903                         pci_dev->addr.devid, pci_dev->addr.function,
1904                         strerror(rte_errno));
1905                 ret = -rte_errno;
1906                 /* Roll back. */
1907                 while (i--) {
1908                         if (!list[i].eth_dev)
1909                                 continue;
1910                         mlx5_dev_close(list[i].eth_dev);
1911                         /* mac_addrs must not be freed because in dev_private */
1912                         list[i].eth_dev->data->mac_addrs = NULL;
1913                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1914                 }
1915                 /* Restore original error. */
1916                 rte_errno = -ret;
1917         } else {
1918                 ret = 0;
1919         }
1920 exit:
1921         /*
1922          * Do the routine cleanup:
1923          * - close opened Netlink sockets
1924          * - free allocated spawn data array
1925          * - free the Infiniband device list
1926          */
1927         if (nl_rdma >= 0)
1928                 close(nl_rdma);
1929         if (nl_route >= 0)
1930                 close(nl_route);
1931         if (list)
1932                 mlx5_free(list);
1933         MLX5_ASSERT(ibv_list);
1934         mlx5_glue->free_device_list(ibv_list);
1935         return ret;
1936 }
1937
1938 static int
1939 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1940 {
1941         char *env;
1942         int value;
1943
1944         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1945         /* Get environment variable to store. */
1946         env = getenv(MLX5_SHUT_UP_BF);
1947         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1948         if (config->dbnc == MLX5_ARG_UNSET)
1949                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1950         else
1951                 setenv(MLX5_SHUT_UP_BF,
1952                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1953         return value;
1954 }
1955
1956 static void
1957 mlx5_restore_doorbell_mapping_env(int value)
1958 {
1959         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1960         /* Restore the original environment variable state. */
1961         if (value == MLX5_ARG_UNSET)
1962                 unsetenv(MLX5_SHUT_UP_BF);
1963         else
1964                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1965 }
1966
1967 /**
1968  * Extract pdn of PD object using DV API.
1969  *
1970  * @param[in] pd
1971  *   Pointer to the verbs PD object.
1972  * @param[out] pdn
1973  *   Pointer to the PD object number variable.
1974  *
1975  * @return
1976  *   0 on success, error value otherwise.
1977  */
1978 int
1979 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1980 {
1981 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1982         struct mlx5dv_obj obj;
1983         struct mlx5dv_pd pd_info;
1984         int ret = 0;
1985
1986         obj.pd.in = pd;
1987         obj.pd.out = &pd_info;
1988         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1989         if (ret) {
1990                 DRV_LOG(DEBUG, "Fail to get PD object info");
1991                 return ret;
1992         }
1993         *pdn = pd_info.pdn;
1994         return 0;
1995 #else
1996         (void)pd;
1997         (void)pdn;
1998         return -ENOTSUP;
1999 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2000 }
2001
2002 /**
2003  * Function API to open IB device.
2004  *
2005  * This function calls the Linux glue APIs to open a device.
2006  *
2007  * @param[in] spawn
2008  *   Pointer to the IB device attributes (name, port, etc).
2009  * @param[out] config
2010  *   Pointer to device configuration structure.
2011  * @param[out] sh
2012  *   Pointer to shared context structure.
2013  *
2014  * @return
2015  *   0 on success, a positive error value otherwise.
2016  */
2017 int
2018 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2019                      const struct mlx5_dev_config *config,
2020                      struct mlx5_dev_ctx_shared *sh)
2021 {
2022         int dbmap_env;
2023         int err = 0;
2024
2025         sh->numa_node = spawn->pci_dev->device.numa_node;
2026         pthread_mutex_init(&sh->txpp.mutex, NULL);
2027         /*
2028          * Configure environment variable "MLX5_BF_SHUT_UP"
2029          * before the device creation. The rdma_core library
2030          * checks the variable at device creation and
2031          * stores the result internally.
2032          */
2033         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2034         /* Try to open IB device with DV first, then usual Verbs. */
2035         errno = 0;
2036         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2037         if (sh->ctx) {
2038                 sh->devx = 1;
2039                 DRV_LOG(DEBUG, "DevX is supported");
2040                 /* The device is created, no need for environment. */
2041                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2042         } else {
2043                 /* The environment variable is still configured. */
2044                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2045                 err = errno ? errno : ENODEV;
2046                 /*
2047                  * The environment variable is not needed anymore,
2048                  * all device creation attempts are completed.
2049                  */
2050                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2051                 if (!sh->ctx)
2052                         return err;
2053                 DRV_LOG(DEBUG, "DevX is NOT supported");
2054                 err = 0;
2055         }
2056         return err;
2057 }
2058
2059 /**
2060  * Install shared asynchronous device events handler.
2061  * This function is implemented to support event sharing
2062  * between multiple ports of single IB device.
2063  *
2064  * @param sh
2065  *   Pointer to mlx5_dev_ctx_shared object.
2066  */
2067 void
2068 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2069 {
2070         int ret;
2071         int flags;
2072
2073         sh->intr_handle.fd = -1;
2074         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2075         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2076                     F_SETFL, flags | O_NONBLOCK);
2077         if (ret) {
2078                 DRV_LOG(INFO, "failed to change file descriptor async event"
2079                         " queue");
2080         } else {
2081                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2082                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2083                 if (rte_intr_callback_register(&sh->intr_handle,
2084                                         mlx5_dev_interrupt_handler, sh)) {
2085                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2086                         sh->intr_handle.fd = -1;
2087                 }
2088         }
2089         if (sh->devx) {
2090 #ifdef HAVE_IBV_DEVX_ASYNC
2091                 sh->intr_handle_devx.fd = -1;
2092                 sh->devx_comp =
2093                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2094                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2095                 if (!devx_comp) {
2096                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2097                         return;
2098                 }
2099                 flags = fcntl(devx_comp->fd, F_GETFL);
2100                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2101                 if (ret) {
2102                         DRV_LOG(INFO, "failed to change file descriptor"
2103                                 " devx comp");
2104                         return;
2105                 }
2106                 sh->intr_handle_devx.fd = devx_comp->fd;
2107                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2108                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2109                                         mlx5_dev_interrupt_handler_devx, sh)) {
2110                         DRV_LOG(INFO, "Fail to install the devx shared"
2111                                 " interrupt.");
2112                         sh->intr_handle_devx.fd = -1;
2113                 }
2114 #endif /* HAVE_IBV_DEVX_ASYNC */
2115         }
2116 }
2117
2118 /**
2119  * Uninstall shared asynchronous device events handler.
2120  * This function is implemented to support event sharing
2121  * between multiple ports of single IB device.
2122  *
2123  * @param dev
2124  *   Pointer to mlx5_dev_ctx_shared object.
2125  */
2126 void
2127 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2128 {
2129         if (sh->intr_handle.fd >= 0)
2130                 mlx5_intr_callback_unregister(&sh->intr_handle,
2131                                               mlx5_dev_interrupt_handler, sh);
2132 #ifdef HAVE_IBV_DEVX_ASYNC
2133         if (sh->intr_handle_devx.fd >= 0)
2134                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2135                                   mlx5_dev_interrupt_handler_devx, sh);
2136         if (sh->devx_comp)
2137                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2138 #endif
2139 }
2140
2141 /**
2142  * Read statistics by a named counter.
2143  *
2144  * @param[in] priv
2145  *   Pointer to the private device data structure.
2146  * @param[in] ctr_name
2147  *   Pointer to the name of the statistic counter to read
2148  * @param[out] stat
2149  *   Pointer to read statistic value.
2150  * @return
2151  *   0 on success and stat is valud, 1 if failed to read the value
2152  *   rte_errno is set.
2153  *
2154  */
2155 int
2156 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2157                       uint64_t *stat)
2158 {
2159         int fd;
2160
2161         if (priv->sh) {
2162                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2163                       priv->sh->ibdev_path,
2164                       priv->dev_port,
2165                       ctr_name);
2166                 fd = open(path, O_RDONLY);
2167                 /*
2168                  * in switchdev the file location is not per port
2169                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2170                  */
2171                 if (fd == -1) {
2172                         MKSTR(path1, "%s/hw_counters/%s",
2173                               priv->sh->ibdev_path,
2174                               ctr_name);
2175                         fd = open(path1, O_RDONLY);
2176                 }
2177                 if (fd != -1) {
2178                         char buf[21] = {'\0'};
2179                         ssize_t n = read(fd, buf, sizeof(buf));
2180
2181                         close(fd);
2182                         if (n != -1) {
2183                                 *stat = strtoull(buf, NULL, 10);
2184                                 return 0;
2185                         }
2186                 }
2187         }
2188         *stat = 0;
2189         return 1;
2190 }
2191
2192 /**
2193  * Set the reg_mr and dereg_mr call backs
2194  *
2195  * @param reg_mr_cb[out]
2196  *   Pointer to reg_mr func
2197  * @param dereg_mr_cb[out]
2198  *   Pointer to dereg_mr func
2199  *
2200  */
2201 void
2202 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2203                       mlx5_dereg_mr_t *dereg_mr_cb)
2204 {
2205         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2206         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2207 }
2208
2209 /**
2210  * Remove a MAC address from device
2211  *
2212  * @param dev
2213  *   Pointer to Ethernet device structure.
2214  * @param index
2215  *   MAC address index.
2216  */
2217 void
2218 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2219 {
2220         struct mlx5_priv *priv = dev->data->dev_private;
2221         const int vf = priv->config.vf;
2222
2223         if (vf)
2224                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2225                                         mlx5_ifindex(dev), priv->mac_own,
2226                                         &dev->data->mac_addrs[index], index);
2227 }
2228
2229 /**
2230  * Adds a MAC address to the device
2231  *
2232  * @param dev
2233  *   Pointer to Ethernet device structure.
2234  * @param mac_addr
2235  *   MAC address to register.
2236  * @param index
2237  *   MAC address index.
2238  *
2239  * @return
2240  *   0 on success, a negative errno value otherwise
2241  */
2242 int
2243 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2244                      uint32_t index)
2245 {
2246         struct mlx5_priv *priv = dev->data->dev_private;
2247         const int vf = priv->config.vf;
2248         int ret = 0;
2249
2250         if (vf)
2251                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2252                                            mlx5_ifindex(dev), priv->mac_own,
2253                                            mac, index);
2254         return ret;
2255 }
2256
2257 /**
2258  * Modify a VF MAC address
2259  *
2260  * @param priv
2261  *   Pointer to device private data.
2262  * @param mac_addr
2263  *   MAC address to modify into.
2264  * @param iface_idx
2265  *   Net device interface index
2266  * @param vf_index
2267  *   VF index
2268  *
2269  * @return
2270  *   0 on success, a negative errno value otherwise
2271  */
2272 int
2273 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2274                            unsigned int iface_idx,
2275                            struct rte_ether_addr *mac_addr,
2276                            int vf_index)
2277 {
2278         return mlx5_nl_vf_mac_addr_modify
2279                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2280 }
2281
2282 /**
2283  * Set device promiscuous mode
2284  *
2285  * @param dev
2286  *   Pointer to Ethernet device structure.
2287  * @param enable
2288  *   0 - promiscuous is disabled, otherwise - enabled
2289  *
2290  * @return
2291  *   0 on success, a negative error value otherwise
2292  */
2293 int
2294 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2295 {
2296         struct mlx5_priv *priv = dev->data->dev_private;
2297
2298         return mlx5_nl_promisc(priv->nl_socket_route,
2299                                mlx5_ifindex(dev), !!enable);
2300 }
2301
2302 /**
2303  * Set device promiscuous mode
2304  *
2305  * @param dev
2306  *   Pointer to Ethernet device structure.
2307  * @param enable
2308  *   0 - all multicase is disabled, otherwise - enabled
2309  *
2310  * @return
2311  *   0 on success, a negative error value otherwise
2312  */
2313 int
2314 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2315 {
2316         struct mlx5_priv *priv = dev->data->dev_private;
2317
2318         return mlx5_nl_allmulti(priv->nl_socket_route,
2319                                 mlx5_ifindex(dev), !!enable);
2320 }
2321
2322 const struct eth_dev_ops mlx5_os_dev_ops = {
2323         .dev_configure = mlx5_dev_configure,
2324         .dev_start = mlx5_dev_start,
2325         .dev_stop = mlx5_dev_stop,
2326         .dev_set_link_down = mlx5_set_link_down,
2327         .dev_set_link_up = mlx5_set_link_up,
2328         .dev_close = mlx5_dev_close,
2329         .promiscuous_enable = mlx5_promiscuous_enable,
2330         .promiscuous_disable = mlx5_promiscuous_disable,
2331         .allmulticast_enable = mlx5_allmulticast_enable,
2332         .allmulticast_disable = mlx5_allmulticast_disable,
2333         .link_update = mlx5_link_update,
2334         .stats_get = mlx5_stats_get,
2335         .stats_reset = mlx5_stats_reset,
2336         .xstats_get = mlx5_xstats_get,
2337         .xstats_reset = mlx5_xstats_reset,
2338         .xstats_get_names = mlx5_xstats_get_names,
2339         .fw_version_get = mlx5_fw_version_get,
2340         .dev_infos_get = mlx5_dev_infos_get,
2341         .read_clock = mlx5_txpp_read_clock,
2342         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2343         .vlan_filter_set = mlx5_vlan_filter_set,
2344         .rx_queue_setup = mlx5_rx_queue_setup,
2345         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2346         .tx_queue_setup = mlx5_tx_queue_setup,
2347         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2348         .rx_queue_release = mlx5_rx_queue_release,
2349         .tx_queue_release = mlx5_tx_queue_release,
2350         .rx_queue_start = mlx5_rx_queue_start,
2351         .rx_queue_stop = mlx5_rx_queue_stop,
2352         .tx_queue_start = mlx5_tx_queue_start,
2353         .tx_queue_stop = mlx5_tx_queue_stop,
2354         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2355         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2356         .mac_addr_remove = mlx5_mac_addr_remove,
2357         .mac_addr_add = mlx5_mac_addr_add,
2358         .mac_addr_set = mlx5_mac_addr_set,
2359         .set_mc_addr_list = mlx5_set_mc_addr_list,
2360         .mtu_set = mlx5_dev_set_mtu,
2361         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2362         .vlan_offload_set = mlx5_vlan_offload_set,
2363         .reta_update = mlx5_dev_rss_reta_update,
2364         .reta_query = mlx5_dev_rss_reta_query,
2365         .rss_hash_update = mlx5_rss_hash_update,
2366         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2367         .filter_ctrl = mlx5_dev_filter_ctrl,
2368         .rx_descriptor_status = mlx5_rx_descriptor_status,
2369         .tx_descriptor_status = mlx5_tx_descriptor_status,
2370         .rxq_info_get = mlx5_rxq_info_get,
2371         .txq_info_get = mlx5_txq_info_get,
2372         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2373         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2374         .rx_queue_count = mlx5_rx_queue_count,
2375         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2376         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2377         .is_removed = mlx5_is_removed,
2378         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2379         .get_module_info = mlx5_get_module_info,
2380         .get_module_eeprom = mlx5_get_module_eeprom,
2381         .hairpin_cap_get = mlx5_hairpin_cap_get,
2382         .mtr_ops_get = mlx5_flow_meter_ops_get,
2383 };
2384
2385 /* Available operations from secondary process. */
2386 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2387         .stats_get = mlx5_stats_get,
2388         .stats_reset = mlx5_stats_reset,
2389         .xstats_get = mlx5_xstats_get,
2390         .xstats_reset = mlx5_xstats_reset,
2391         .xstats_get_names = mlx5_xstats_get_names,
2392         .fw_version_get = mlx5_fw_version_get,
2393         .dev_infos_get = mlx5_dev_infos_get,
2394         .read_clock = mlx5_txpp_read_clock,
2395         .rx_queue_start = mlx5_rx_queue_start,
2396         .rx_queue_stop = mlx5_rx_queue_stop,
2397         .tx_queue_start = mlx5_tx_queue_start,
2398         .tx_queue_stop = mlx5_tx_queue_stop,
2399         .rx_descriptor_status = mlx5_rx_descriptor_status,
2400         .tx_descriptor_status = mlx5_tx_descriptor_status,
2401         .rxq_info_get = mlx5_rxq_info_get,
2402         .txq_info_get = mlx5_txq_info_get,
2403         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2404         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2405         .get_module_info = mlx5_get_module_info,
2406         .get_module_eeprom = mlx5_get_module_eeprom,
2407 };
2408
2409 /* Available operations in flow isolated mode. */
2410 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2411         .dev_configure = mlx5_dev_configure,
2412         .dev_start = mlx5_dev_start,
2413         .dev_stop = mlx5_dev_stop,
2414         .dev_set_link_down = mlx5_set_link_down,
2415         .dev_set_link_up = mlx5_set_link_up,
2416         .dev_close = mlx5_dev_close,
2417         .promiscuous_enable = mlx5_promiscuous_enable,
2418         .promiscuous_disable = mlx5_promiscuous_disable,
2419         .allmulticast_enable = mlx5_allmulticast_enable,
2420         .allmulticast_disable = mlx5_allmulticast_disable,
2421         .link_update = mlx5_link_update,
2422         .stats_get = mlx5_stats_get,
2423         .stats_reset = mlx5_stats_reset,
2424         .xstats_get = mlx5_xstats_get,
2425         .xstats_reset = mlx5_xstats_reset,
2426         .xstats_get_names = mlx5_xstats_get_names,
2427         .fw_version_get = mlx5_fw_version_get,
2428         .dev_infos_get = mlx5_dev_infos_get,
2429         .read_clock = mlx5_txpp_read_clock,
2430         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2431         .vlan_filter_set = mlx5_vlan_filter_set,
2432         .rx_queue_setup = mlx5_rx_queue_setup,
2433         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2434         .tx_queue_setup = mlx5_tx_queue_setup,
2435         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2436         .rx_queue_release = mlx5_rx_queue_release,
2437         .tx_queue_release = mlx5_tx_queue_release,
2438         .rx_queue_start = mlx5_rx_queue_start,
2439         .rx_queue_stop = mlx5_rx_queue_stop,
2440         .tx_queue_start = mlx5_tx_queue_start,
2441         .tx_queue_stop = mlx5_tx_queue_stop,
2442         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2443         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2444         .mac_addr_remove = mlx5_mac_addr_remove,
2445         .mac_addr_add = mlx5_mac_addr_add,
2446         .mac_addr_set = mlx5_mac_addr_set,
2447         .set_mc_addr_list = mlx5_set_mc_addr_list,
2448         .mtu_set = mlx5_dev_set_mtu,
2449         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2450         .vlan_offload_set = mlx5_vlan_offload_set,
2451         .filter_ctrl = mlx5_dev_filter_ctrl,
2452         .rx_descriptor_status = mlx5_rx_descriptor_status,
2453         .tx_descriptor_status = mlx5_tx_descriptor_status,
2454         .rxq_info_get = mlx5_rxq_info_get,
2455         .txq_info_get = mlx5_txq_info_get,
2456         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2457         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2458         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2459         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2460         .is_removed = mlx5_is_removed,
2461         .get_module_info = mlx5_get_module_info,
2462         .get_module_eeprom = mlx5_get_module_eeprom,
2463         .hairpin_cap_get = mlx5_hairpin_cap_get,
2464         .mtr_ops_get = mlx5_flow_meter_ops_get,
2465 };