drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the intetrrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, non zero error number otherwise
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err)
 154                 return err;
 155         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 156         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 157         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 158         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 159         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 160         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 161         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 162         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 163         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 164         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 165         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 166         device_attr->max_rwq_indirection_table_size =
 167                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 168         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 169         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 170
 171         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 172         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 173         if (err)
 174                 return err;
 175
 176         device_attr->flags = dv_attr.flags;
 177         device_attr->comp_mask = dv_attr.comp_mask;
 178 #ifdef HAVE_IBV_MLX5_MOD_SWP
 179         device_attr->sw_parsing_offloads =
 180                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 181 #endif
 182         device_attr->min_single_stride_log_num_of_bytes =
 183                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 184         device_attr->max_single_stride_log_num_of_bytes =
 185                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 186         device_attr->min_single_wqe_log_num_of_strides =
 187                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 188         device_attr->max_single_wqe_log_num_of_strides =
 189                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 190         device_attr->stride_supported_qpts =
 191                 dv_attr.striding_rq_caps.supported_qpts;
 192 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 193         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 194 #endif
 195         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 196                 sizeof(device_attr->fw_ver));
 197
 198         return err;
 199 }
 200
 201 /**
 202  * Detect misc5 support or not
 203  *
 204  * @param[in] priv
 205  *   Device private data pointer
 206  */
 207 #ifdef HAVE_MLX5DV_DR
 208 static void
 209 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 210 {
 211 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 212         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 213          * Case: IPv4--->UDP--->VxLAN--->vni
 214          */
 215         void *tbl;
 216         struct mlx5_flow_dv_match_params matcher_mask;
 217         void *match_m;
 218         void *matcher;
 219         void *headers_m;
 220         void *misc5_m;
 221         uint32_t *tunnel_header_m;
 222         struct mlx5dv_flow_matcher_attr dv_attr;
 223
 224         memset(&matcher_mask, 0, sizeof(matcher_mask));
 225         matcher_mask.size = sizeof(matcher_mask.buf);
 226         match_m = matcher_mask.buf;
 227         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 228         misc5_m = MLX5_ADDR_OF(fte_match_param,
 229                                match_m, misc_parameters_5);
 230         tunnel_header_m = (uint32_t *)
 231                                 MLX5_ADDR_OF(fte_match_set_misc5,
 232                                 misc5_m, tunnel_header_1);
 233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 235         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 236         *tunnel_header_m = 0xffffff;
 237
 238         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 239         if (!tbl) {
 240                 DRV_LOG(INFO, "No SW steering support");
 241                 return;
 242         }
 243         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 244         dv_attr.match_mask = (void *)&matcher_mask,
 245         dv_attr.match_criteria_enable =
 246                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 247                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 248         dv_attr.priority = 3;
 249 #ifdef HAVE_MLX5DV_DR_ESWITCH
 250         void *misc2_m;
 251         if (priv->config.dv_esw_en) {
 252                 /* FDB enabled reg_c_0 */
 253                 dv_attr.match_criteria_enable |=
 254                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 255                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 256                                        match_m, misc_parameters_2);
 257                 MLX5_SET(fte_match_set_misc2, misc2_m,
 258                          metadata_reg_c_0, 0xffff);
 259         }
 260 #endif
 261         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 262                                                     &dv_attr, tbl);
 263         if (matcher) {
 264                 priv->sh->misc5_cap = 1;
 265                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 266         }
 267         mlx5_glue->dr_destroy_flow_tbl(tbl);
 268 #else
 269         RTE_SET_USED(priv);
 270 #endif
 271 }
 272 #endif
 273
 274 /**
 275  * Initialize DR related data within private structure.
 276  * Routine checks the reference counter and does actual
 277  * resources creation/initialization only if counter is zero.
 278  *
 279  * @param[in] priv
 280  *   Pointer to the private device data structure.
 281  *
 282  * @return
 283  *   Zero on success, positive error code otherwise.
 284  */
 285 static int
 286 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 287 {
 288         struct mlx5_dev_ctx_shared *sh = priv->sh;
 289         char s[MLX5_NAME_SIZE] __rte_unused;
 290         int err;
 291
 292         MLX5_ASSERT(sh && sh->refcnt);
 293         if (sh->refcnt > 1)
 294                 return 0;
 295         err = mlx5_alloc_table_hash_list(priv);
 296         if (err)
 297                 goto error;
 298         /* The resources below are only valid with DV support. */
 299 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 300         /* Init port id action list. */
 301         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 302         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 303                                                    flow_dv_port_id_create_cb,
 304                                                    flow_dv_port_id_match_cb,
 305                                                    flow_dv_port_id_remove_cb,
 306                                                    flow_dv_port_id_clone_cb,
 307                                                  flow_dv_port_id_clone_free_cb);
 308         if (!sh->port_id_action_list)
 309                 goto error;
 310         /* Init push vlan action list. */
 311         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 312         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 313                                                     flow_dv_push_vlan_create_cb,
 314                                                     flow_dv_push_vlan_match_cb,
 315                                                     flow_dv_push_vlan_remove_cb,
 316                                                     flow_dv_push_vlan_clone_cb,
 317                                                flow_dv_push_vlan_clone_free_cb);
 318         if (!sh->push_vlan_action_list)
 319                 goto error;
 320         /* Init sample action list. */
 321         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 322         sh->sample_action_list = mlx5_list_create(s, sh, true,
 323                                                   flow_dv_sample_create_cb,
 324                                                   flow_dv_sample_match_cb,
 325                                                   flow_dv_sample_remove_cb,
 326                                                   flow_dv_sample_clone_cb,
 327                                                   flow_dv_sample_clone_free_cb);
 328         if (!sh->sample_action_list)
 329                 goto error;
 330         /* Init dest array action list. */
 331         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 332         sh->dest_array_list = mlx5_list_create(s, sh, true,
 333                                                flow_dv_dest_array_create_cb,
 334                                                flow_dv_dest_array_match_cb,
 335                                                flow_dv_dest_array_remove_cb,
 336                                                flow_dv_dest_array_clone_cb,
 337                                               flow_dv_dest_array_clone_free_cb);
 338         if (!sh->dest_array_list)
 339                 goto error;
 340 #endif
 341 #ifdef HAVE_MLX5DV_DR
 342         void *domain;
 343
 344         /* Reference counter is zero, we should initialize structures. */
 345         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 346                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 347         if (!domain) {
 348                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 349                 err = errno;
 350                 goto error;
 351         }
 352         sh->rx_domain = domain;
 353         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 354                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 355         if (!domain) {
 356                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 357                 err = errno;
 358                 goto error;
 359         }
 360         sh->tx_domain = domain;
 361 #ifdef HAVE_MLX5DV_DR_ESWITCH
 362         if (priv->config.dv_esw_en) {
 363                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 364                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 365                 if (!domain) {
 366                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 367                         err = errno;
 368                         goto error;
 369                 }
 370                 sh->fdb_domain = domain;
 371         }
 372         /*
 373          * The drop action is just some dummy placeholder in rdma-core. It
 374          * does not belong to domains and has no any attributes, and, can be
 375          * shared by the entire device.
 376          */
 377         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 378         if (!sh->dr_drop_action) {
 379                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 380                 err = errno;
 381                 goto error;
 382         }
 383 #endif
 384         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 385                 err = mlx5_alloc_tunnel_hub(sh);
 386         if (err) {
 387                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 388                 goto error;
 389         }
 390         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 391                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 392                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 393                 if (sh->fdb_domain)
 394                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 395         }
 396         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 397         if (!priv->config.allow_duplicate_pattern) {
 398 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 399                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 400 #endif
 401                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 402                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 403                 if (sh->fdb_domain)
 404                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 405         }
 406
 407         __mlx5_discovery_misc5_cap(priv);
 408 #endif /* HAVE_MLX5DV_DR */
 409         sh->default_miss_action =
 410                         mlx5_glue->dr_create_flow_action_default_miss();
 411         if (!sh->default_miss_action)
 412                 DRV_LOG(WARNING, "Default miss action is not supported.");
 413         return 0;
 414 error:
 415         /* Rollback the created objects. */
 416         if (sh->rx_domain) {
 417                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 418                 sh->rx_domain = NULL;
 419         }
 420         if (sh->tx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 422                 sh->tx_domain = NULL;
 423         }
 424         if (sh->fdb_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 426                 sh->fdb_domain = NULL;
 427         }
 428         if (sh->dr_drop_action) {
 429                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 430                 sh->dr_drop_action = NULL;
 431         }
 432         if (sh->pop_vlan_action) {
 433                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 434                 sh->pop_vlan_action = NULL;
 435         }
 436         if (sh->encaps_decaps) {
 437                 mlx5_hlist_destroy(sh->encaps_decaps);
 438                 sh->encaps_decaps = NULL;
 439         }
 440         if (sh->modify_cmds) {
 441                 mlx5_hlist_destroy(sh->modify_cmds);
 442                 sh->modify_cmds = NULL;
 443         }
 444         if (sh->tag_table) {
 445                 /* tags should be destroyed with flow before. */
 446                 mlx5_hlist_destroy(sh->tag_table);
 447                 sh->tag_table = NULL;
 448         }
 449         if (sh->tunnel_hub) {
 450                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 451                 sh->tunnel_hub = NULL;
 452         }
 453         mlx5_free_table_hash_list(priv);
 454         if (sh->port_id_action_list) {
 455                 mlx5_list_destroy(sh->port_id_action_list);
 456                 sh->port_id_action_list = NULL;
 457         }
 458         if (sh->push_vlan_action_list) {
 459                 mlx5_list_destroy(sh->push_vlan_action_list);
 460                 sh->push_vlan_action_list = NULL;
 461         }
 462         if (sh->sample_action_list) {
 463                 mlx5_list_destroy(sh->sample_action_list);
 464                 sh->sample_action_list = NULL;
 465         }
 466         if (sh->dest_array_list) {
 467                 mlx5_list_destroy(sh->dest_array_list);
 468                 sh->dest_array_list = NULL;
 469         }
 470         return err;
 471 }
 472
 473 /**
 474  * Destroy DR related data within private structure.
 475  *
 476  * @param[in] priv
 477  *   Pointer to the private device data structure.
 478  */
 479 void
 480 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 481 {
 482         struct mlx5_dev_ctx_shared *sh = priv->sh;
 483
 484         MLX5_ASSERT(sh && sh->refcnt);
 485         if (sh->refcnt > 1)
 486                 return;
 487 #ifdef HAVE_MLX5DV_DR
 488         if (sh->rx_domain) {
 489                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 490                 sh->rx_domain = NULL;
 491         }
 492         if (sh->tx_domain) {
 493                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 494                 sh->tx_domain = NULL;
 495         }
 496 #ifdef HAVE_MLX5DV_DR_ESWITCH
 497         if (sh->fdb_domain) {
 498                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 499                 sh->fdb_domain = NULL;
 500         }
 501         if (sh->dr_drop_action) {
 502                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 503                 sh->dr_drop_action = NULL;
 504         }
 505 #endif
 506         if (sh->pop_vlan_action) {
 507                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 508                 sh->pop_vlan_action = NULL;
 509         }
 510 #endif /* HAVE_MLX5DV_DR */
 511         if (sh->default_miss_action)
 512                 mlx5_glue->destroy_flow_action
 513                                 (sh->default_miss_action);
 514         if (sh->encaps_decaps) {
 515                 mlx5_hlist_destroy(sh->encaps_decaps);
 516                 sh->encaps_decaps = NULL;
 517         }
 518         if (sh->modify_cmds) {
 519                 mlx5_hlist_destroy(sh->modify_cmds);
 520                 sh->modify_cmds = NULL;
 521         }
 522         if (sh->tag_table) {
 523                 /* tags should be destroyed with flow before. */
 524                 mlx5_hlist_destroy(sh->tag_table);
 525                 sh->tag_table = NULL;
 526         }
 527         if (sh->tunnel_hub) {
 528                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 529                 sh->tunnel_hub = NULL;
 530         }
 531         mlx5_free_table_hash_list(priv);
 532         if (sh->port_id_action_list) {
 533                 mlx5_list_destroy(sh->port_id_action_list);
 534                 sh->port_id_action_list = NULL;
 535         }
 536         if (sh->push_vlan_action_list) {
 537                 mlx5_list_destroy(sh->push_vlan_action_list);
 538                 sh->push_vlan_action_list = NULL;
 539         }
 540         if (sh->sample_action_list) {
 541                 mlx5_list_destroy(sh->sample_action_list);
 542                 sh->sample_action_list = NULL;
 543         }
 544         if (sh->dest_array_list) {
 545                 mlx5_list_destroy(sh->dest_array_list);
 546                 sh->dest_array_list = NULL;
 547         }
 548 }
 549
 550 /**
 551  * Initialize shared data between primary and secondary process.
 552  *
 553  * A memzone is reserved by primary process and secondary processes attach to
 554  * the memzone.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 mlx5_init_shared_data(void)
 561 {
 562         const struct rte_memzone *mz;
 563         int ret = 0;
 564
 565         rte_spinlock_lock(&mlx5_shared_data_lock);
 566         if (mlx5_shared_data == NULL) {
 567                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 568                         /* Allocate shared memory. */
 569                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 570                                                  sizeof(*mlx5_shared_data),
 571                                                  SOCKET_ID_ANY, 0);
 572                         if (mz == NULL) {
 573                                 DRV_LOG(ERR,
 574                                         "Cannot allocate mlx5 shared data");
 575                                 ret = -rte_errno;
 576                                 goto error;
 577                         }
 578                         mlx5_shared_data = mz->addr;
 579                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 580                         rte_spinlock_init(&mlx5_shared_data->lock);
 581                 } else {
 582                         /* Lookup allocated shared memory. */
 583                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 584                         if (mz == NULL) {
 585                                 DRV_LOG(ERR,
 586                                         "Cannot attach mlx5 shared data");
 587                                 ret = -rte_errno;
 588                                 goto error;
 589                         }
 590                         mlx5_shared_data = mz->addr;
 591                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 592                 }
 593         }
 594 error:
 595         rte_spinlock_unlock(&mlx5_shared_data_lock);
 596         return ret;
 597 }
 598
 599 /**
 600  * PMD global initialization.
 601  *
 602  * Independent from individual device, this function initializes global
 603  * per-PMD data structures distinguishing primary and secondary processes.
 604  * Hence, each initialization is called once per a process.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 mlx5_init_once(void)
 611 {
 612         struct mlx5_shared_data *sd;
 613         struct mlx5_local_data *ld = &mlx5_local_data;
 614         int ret = 0;
 615
 616         if (mlx5_init_shared_data())
 617                 return -rte_errno;
 618         sd = mlx5_shared_data;
 619         MLX5_ASSERT(sd);
 620         rte_spinlock_lock(&sd->lock);
 621         switch (rte_eal_process_type()) {
 622         case RTE_PROC_PRIMARY:
 623                 if (sd->init_done)
 624                         break;
 625                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 626                                            mlx5_mp_os_primary_handle);
 627                 if (ret)
 628                         goto out;
 629                 sd->init_done = true;
 630                 break;
 631         case RTE_PROC_SECONDARY:
 632                 if (ld->init_done)
 633                         break;
 634                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 635                                              mlx5_mp_os_secondary_handle);
 636                 if (ret)
 637                         goto out;
 638                 ++sd->secondary_cnt;
 639                 ld->init_done = true;
 640                 break;
 641         default:
 642                 break;
 643         }
 644 out:
 645         rte_spinlock_unlock(&sd->lock);
 646         return ret;
 647 }
 648
 649 /**
 650  * Create the Tx queue DevX/Verbs object.
 651  *
 652  * @param dev
 653  *   Pointer to Ethernet device.
 654  * @param idx
 655  *   Queue index in DPDK Tx queue array.
 656  *
 657  * @return
 658  *   0 on success, a negative errno value otherwise and rte_errno is set.
 659  */
 660 static int
 661 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 662 {
 663         struct mlx5_priv *priv = dev->data->dev_private;
 664         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 665         struct mlx5_txq_ctrl *txq_ctrl =
 666                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 667
 668         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 669                 return mlx5_txq_devx_obj_new(dev, idx);
 670 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 671         if (!priv->config.dv_esw_en)
 672                 return mlx5_txq_devx_obj_new(dev, idx);
 673 #endif
 674         return mlx5_txq_ibv_obj_new(dev, idx);
 675 }
 676
 677 /**
 678  * Release an Tx DevX/verbs queue object.
 679  *
 680  * @param txq_obj
 681  *   DevX/Verbs Tx queue object.
 682  */
 683 static void
 684 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 685 {
 686         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 687                 mlx5_txq_devx_obj_release(txq_obj);
 688                 return;
 689         }
 690 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 691         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 692                 mlx5_txq_devx_obj_release(txq_obj);
 693                 return;
 694         }
 695 #endif
 696         mlx5_txq_ibv_obj_release(txq_obj);
 697 }
 698
 699 /**
 700  * DV flow counter mode detect and config.
 701  *
 702  * @param dev
 703  *   Pointer to rte_eth_dev structure.
 704  *
 705  */
 706 static void
 707 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 708 {
 709 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 710         struct mlx5_priv *priv = dev->data->dev_private;
 711         struct mlx5_dev_ctx_shared *sh = priv->sh;
 712         bool fallback;
 713
 714 #ifndef HAVE_IBV_DEVX_ASYNC
 715         fallback = true;
 716 #else
 717         fallback = false;
 718         if (!sh->devx || !priv->config.dv_flow_en ||
 719             !priv->config.hca_attr.flow_counters_dump ||
 720             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 721             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 722                 fallback = true;
 723 #endif
 724         if (fallback)
 725                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 726                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 727                         priv->config.hca_attr.flow_counters_dump,
 728                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 729         /* Initialize fallback mode only on the port initializes sh. */
 730         if (sh->refcnt == 1)
 731                 sh->cmng.counter_fallback = fallback;
 732         else if (fallback != sh->cmng.counter_fallback)
 733                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 734                         "with others:%d.", PORT_ID(priv), fallback);
 735 #endif
 736 }
 737
 738 /**
 739  * DR flow drop action support detect.
 740  *
 741  * @param dev
 742  *   Pointer to rte_eth_dev structure.
 743  *
 744  */
 745 static void
 746 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 747 {
 748 #ifdef HAVE_MLX5DV_DR
 749         struct mlx5_priv *priv = dev->data->dev_private;
 750
 751         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 752                 return;
 753         /**
 754          * DR supports drop action placeholder when it is supported;
 755          * otherwise, use the queue drop action.
 756          */
 757         if (mlx5_flow_discover_dr_action_support(dev))
 758                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 759         else
 760                 priv->root_drop_action = priv->sh->dr_drop_action;
 761 #endif
 762 }
 763
 764 static void
 765 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 766 {
 767         struct mlx5_priv *priv = dev->data->dev_private;
 768         void *ctx = priv->sh->cdev->ctx;
 769
 770         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 771         if (!priv->q_counters) {
 772                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 773                 struct ibv_wq *wq;
 774
 775                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 776                         "by DevX - fall-back to use the kernel driver global "
 777                         "queue counter.", dev->data->port_id);
 778                 /* Create WQ by kernel and query its queue counter ID. */
 779                 if (cq) {
 780                         wq = mlx5_glue->create_wq(ctx,
 781                                                   &(struct ibv_wq_init_attr){
 782                                                     .wq_type = IBV_WQT_RQ,
 783                                                     .max_wr = 1,
 784                                                     .max_sge = 1,
 785                                                     .pd = priv->sh->cdev->pd,
 786                                                     .cq = cq,
 787                                                 });
 788                         if (wq) {
 789                                 /* Counter is assigned only on RDY state. */
 790                                 int ret = mlx5_glue->modify_wq(wq,
 791                                                  &(struct ibv_wq_attr){
 792                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 793                                                  .wq_state = IBV_WQS_RDY,
 794                                                 });
 795
 796                                 if (ret == 0)
 797                                         mlx5_devx_cmd_wq_query(wq,
 798                                                          &priv->counter_set_id);
 799                                 claim_zero(mlx5_glue->destroy_wq(wq));
 800                         }
 801                         claim_zero(mlx5_glue->destroy_cq(cq));
 802                 }
 803         } else {
 804                 priv->counter_set_id = priv->q_counters->id;
 805         }
 806         if (priv->counter_set_id == 0)
 807                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 808                         "available.", dev->data->port_id);
 809 }
 810
 811 /**
 812  * Check if representor spawn info match devargs.
 813  *
 814  * @param spawn
 815  *   Verbs device parameters (name, port, switch_info) to spawn.
 816  * @param eth_da
 817  *   Device devargs to probe.
 818  *
 819  * @return
 820  *   Match result.
 821  */
 822 static bool
 823 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 824                        struct rte_eth_devargs *eth_da)
 825 {
 826         struct mlx5_switch_info *switch_info = &spawn->info;
 827         unsigned int p, f;
 828         uint16_t id;
 829         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 830                                                       eth_da->type);
 831
 832         switch (eth_da->type) {
 833         case RTE_ETH_REPRESENTOR_SF:
 834                 if (!(spawn->info.port_name == -1 &&
 835                       switch_info->name_type ==
 836                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 837                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 838                         rte_errno = EBUSY;
 839                         return false;
 840                 }
 841                 break;
 842         case RTE_ETH_REPRESENTOR_VF:
 843                 /* Allows HPF representor index -1 as exception. */
 844                 if (!(spawn->info.port_name == -1 &&
 845                       switch_info->name_type ==
 846                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 847                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 848                         rte_errno = EBUSY;
 849                         return false;
 850                 }
 851                 break;
 852         case RTE_ETH_REPRESENTOR_NONE:
 853                 rte_errno = EBUSY;
 854                 return false;
 855         default:
 856                 rte_errno = ENOTSUP;
 857                 DRV_LOG(ERR, "unsupported representor type");
 858                 return false;
 859         }
 860         /* Check representor ID: */
 861         for (p = 0; p < eth_da->nb_ports; ++p) {
 862                 if (spawn->pf_bond < 0) {
 863                         /* For non-LAG mode, allow and ignore pf. */
 864                         switch_info->pf_num = eth_da->ports[p];
 865                         repr_id = mlx5_representor_id_encode(switch_info,
 866                                                              eth_da->type);
 867                 }
 868                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 869                         id = MLX5_REPRESENTOR_ID
 870                                 (eth_da->ports[p], eth_da->type,
 871                                  eth_da->representor_ports[f]);
 872                         if (repr_id == id)
 873                                 return true;
 874                 }
 875         }
 876         rte_errno = EBUSY;
 877         return false;
 878 }
 879
 880
 881 /**
 882  * Spawn an Ethernet device from Verbs information.
 883  *
 884  * @param dpdk_dev
 885  *   Backing DPDK device.
 886  * @param spawn
 887  *   Verbs device parameters (name, port, switch_info) to spawn.
 888  * @param config
 889  *   Device configuration parameters.
 890  * @param eth_da
 891  *   Device arguments.
 892  *
 893  * @return
 894  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 895  *   is set. The following errors are defined:
 896  *
 897  *   EBUSY: device is not supposed to be spawned.
 898  *   EEXIST: device is already spawned
 899  */
 900 static struct rte_eth_dev *
 901 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 902                struct mlx5_dev_spawn_data *spawn,
 903                struct mlx5_dev_config *config,
 904                struct rte_eth_devargs *eth_da)
 905 {
 906         const struct mlx5_switch_info *switch_info = &spawn->info;
 907         struct mlx5_dev_ctx_shared *sh = NULL;
 908         struct ibv_port_attr port_attr;
 909         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 910         struct rte_eth_dev *eth_dev = NULL;
 911         struct mlx5_priv *priv = NULL;
 912         int err = 0;
 913         unsigned int hw_padding = 0;
 914         unsigned int mps;
 915         unsigned int mpls_en = 0;
 916         unsigned int swp = 0;
 917         unsigned int mprq = 0;
 918         unsigned int mprq_min_stride_size_n = 0;
 919         unsigned int mprq_max_stride_size_n = 0;
 920         unsigned int mprq_min_stride_num_n = 0;
 921         unsigned int mprq_max_stride_num_n = 0;
 922         struct rte_ether_addr mac;
 923         char name[RTE_ETH_NAME_MAX_LEN];
 924         int own_domain_id = 0;
 925         uint16_t port_id;
 926         struct mlx5_port_info vport_info = { .query_flags = 0 };
 927         int i;
 928
 929         /* Determine if this port representor is supposed to be spawned. */
 930         if (switch_info->representor && dpdk_dev->devargs &&
 931             !mlx5_representor_match(spawn, eth_da))
 932                 return NULL;
 933         /* Build device name. */
 934         if (spawn->pf_bond < 0) {
 935                 /* Single device. */
 936                 if (!switch_info->representor)
 937                         strlcpy(name, dpdk_dev->name, sizeof(name));
 938                 else
 939                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 940                                  dpdk_dev->name,
 941                                  switch_info->name_type ==
 942                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 943                                  switch_info->port_name);
 944         } else {
 945                 /* Bonding device. */
 946                 if (!switch_info->representor) {
 947                         err = snprintf(name, sizeof(name), "%s_%s",
 948                                        dpdk_dev->name, spawn->phys_dev_name);
 949                 } else {
 950                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 951                                 dpdk_dev->name, spawn->phys_dev_name,
 952                                 switch_info->ctrl_num,
 953                                 switch_info->pf_num,
 954                                 switch_info->name_type ==
 955                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 956                                 switch_info->port_name);
 957                 }
 958         }
 959         if (err >= (int)sizeof(name))
 960                 DRV_LOG(WARNING, "device name overflow %s", name);
 961         /* check if the device is already spawned */
 962         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 963                 rte_errno = EEXIST;
 964                 return NULL;
 965         }
 966         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 967         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 968                 struct mlx5_mp_id mp_id;
 969
 970                 eth_dev = rte_eth_dev_attach_secondary(name);
 971                 if (eth_dev == NULL) {
 972                         DRV_LOG(ERR, "can not attach rte ethdev");
 973                         rte_errno = ENOMEM;
 974                         return NULL;
 975                 }
 976                 eth_dev->device = dpdk_dev;
 977                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 978                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 979                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 980                 err = mlx5_proc_priv_init(eth_dev);
 981                 if (err)
 982                         return NULL;
 983                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 984                 /* Receive command fd from primary process */
 985                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 986                 if (err < 0)
 987                         goto err_secondary;
 988                 /* Remap UAR for Tx queues. */
 989                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 990                 if (err)
 991                         goto err_secondary;
 992                 /*
 993                  * Ethdev pointer is still required as input since
 994                  * the primary device is not accessible from the
 995                  * secondary process.
 996                  */
 997                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 998                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 999                 return eth_dev;
1000 err_secondary:
1001                 mlx5_dev_close(eth_dev);
1002                 return NULL;
1003         }
1004         /*
1005          * Some parameters ("tx_db_nc" in particularly) are needed in
1006          * advance to create dv/verbs device context. We proceed the
1007          * devargs here to get ones, and later proceed devargs again
1008          * to override some hardware settings.
1009          */
1010         err = mlx5_args(config, dpdk_dev->devargs);
1011         if (err) {
1012                 err = rte_errno;
1013                 DRV_LOG(ERR, "failed to process device arguments: %s",
1014                         strerror(rte_errno));
1015                 goto error;
1016         }
1017         if (config->dv_miss_info) {
1018                 if (switch_info->master || switch_info->representor)
1019                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1020         }
1021         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1022         if (!sh)
1023                 return NULL;
1024 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1025         config->dest_tir = 1;
1026 #endif
1027 #ifdef HAVE_IBV_MLX5_MOD_SWP
1028         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1029 #endif
1030         /*
1031          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1032          * as all ConnectX-5 devices.
1033          */
1034 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1035         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1036 #endif
1037 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1038         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1039 #endif
1040         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
1041         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1042                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1043                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1044                         mps = MLX5_MPW_ENHANCED;
1045                 } else {
1046                         DRV_LOG(DEBUG, "MPW is supported");
1047                         mps = MLX5_MPW;
1048                 }
1049         } else {
1050                 DRV_LOG(DEBUG, "MPW isn't supported");
1051                 mps = MLX5_MPW_DISABLED;
1052         }
1053 #ifdef HAVE_IBV_MLX5_MOD_SWP
1054         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1055                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1056         DRV_LOG(DEBUG, "SWP support: %u", swp);
1057 #endif
1058         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1059                 MLX5_SW_PARSING_TSO_CAP);
1060 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1061         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1062                 struct mlx5dv_striding_rq_caps mprq_caps =
1063                         dv_attr.striding_rq_caps;
1064
1065                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1066                         mprq_caps.min_single_stride_log_num_of_bytes);
1067                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1068                         mprq_caps.max_single_stride_log_num_of_bytes);
1069                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1070                         mprq_caps.min_single_wqe_log_num_of_strides);
1071                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1072                         mprq_caps.max_single_wqe_log_num_of_strides);
1073                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1074                         mprq_caps.supported_qpts);
1075                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1076                 mprq = 1;
1077                 mprq_min_stride_size_n =
1078                         mprq_caps.min_single_stride_log_num_of_bytes;
1079                 mprq_max_stride_size_n =
1080                         mprq_caps.max_single_stride_log_num_of_bytes;
1081                 mprq_min_stride_num_n =
1082                         mprq_caps.min_single_wqe_log_num_of_strides;
1083                 mprq_max_stride_num_n =
1084                         mprq_caps.max_single_wqe_log_num_of_strides;
1085         }
1086 #endif
1087         /* Rx CQE compression is enabled by default. */
1088         config->cqe_comp = 1;
1089 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1090         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1091                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1092                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1093                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1094                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1095         }
1096         if (config->tunnel_en) {
1097                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1098                 config->tunnel_en &
1099                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1100                 config->tunnel_en &
1101                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1102                 config->tunnel_en &
1103                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1104                 );
1105         } else {
1106                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1107         }
1108 #else
1109         DRV_LOG(WARNING,
1110                 "tunnel offloading disabled due to old OFED/rdma-core version");
1111 #endif
1112 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1113         mpls_en = ((dv_attr.tunnel_offloads_caps &
1114                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1115                    (dv_attr.tunnel_offloads_caps &
1116                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1117         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1118                 mpls_en ? "" : "not ");
1119 #else
1120         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1121                 " old OFED/rdma-core version or firmware configuration");
1122 #endif
1123         config->mpls_en = mpls_en;
1124         /* Check port status. */
1125         err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1126                                     &port_attr);
1127         if (err) {
1128                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1129                 goto error;
1130         }
1131         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1132                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1133                 err = EINVAL;
1134                 goto error;
1135         }
1136         if (port_attr.state != IBV_PORT_ACTIVE)
1137                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1138                         mlx5_glue->port_state_str(port_attr.state),
1139                         port_attr.state);
1140         /* Allocate private eth device data. */
1141         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1142                            sizeof(*priv),
1143                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1144         if (priv == NULL) {
1145                 DRV_LOG(ERR, "priv allocation failure");
1146                 err = ENOMEM;
1147                 goto error;
1148         }
1149         priv->sh = sh;
1150         priv->dev_port = spawn->phys_port;
1151         priv->pci_dev = spawn->pci_dev;
1152         priv->mtu = RTE_ETHER_MTU;
1153         /* Some internal functions rely on Netlink sockets, open them now. */
1154         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1155         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1156         priv->representor = !!switch_info->representor;
1157         priv->master = !!switch_info->master;
1158         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1159         priv->vport_meta_tag = 0;
1160         priv->vport_meta_mask = 0;
1161         priv->pf_bond = spawn->pf_bond;
1162
1163         DRV_LOG(DEBUG,
1164                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1165                 priv->dev_port, dpdk_dev->bus->name,
1166                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1167                 priv->master, priv->representor, priv->pf_bond);
1168
1169         /*
1170          * If we have E-Switch we should determine the vport attributes.
1171          * E-Switch may use either source vport field or reg_c[0] metadata
1172          * register to match on vport index. The engaged part of metadata
1173          * register is defined by mask.
1174          */
1175         if (switch_info->representor || switch_info->master) {
1176                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1177                                                  spawn->phys_port,
1178                                                  &vport_info);
1179                 if (err) {
1180                         DRV_LOG(WARNING,
1181                                 "Cannot query devx port %d on device %s",
1182                                 spawn->phys_port, spawn->phys_dev_name);
1183                         vport_info.query_flags = 0;
1184                 }
1185         }
1186         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1187                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1188                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1189                 if (!priv->vport_meta_mask) {
1190                         DRV_LOG(ERR,
1191                                 "vport zero mask for port %d on bonding device %s",
1192                                 spawn->phys_port, spawn->phys_dev_name);
1193                         err = ENOTSUP;
1194                         goto error;
1195                 }
1196                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1197                         DRV_LOG(ERR,
1198                                 "Invalid vport tag for port %d on bonding device %s",
1199                                 spawn->phys_port, spawn->phys_dev_name);
1200                         err = ENOTSUP;
1201                         goto error;
1202                 }
1203         }
1204         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1205                 priv->vport_id = vport_info.vport_id;
1206         } else if (spawn->pf_bond >= 0 &&
1207                    (switch_info->representor || switch_info->master)) {
1208                 DRV_LOG(ERR,
1209                         "Cannot deduce vport index for port %d on bonding device %s",
1210                         spawn->phys_port, spawn->phys_dev_name);
1211                 err = ENOTSUP;
1212                 goto error;
1213         } else {
1214                 /*
1215                  * Suppose vport index in compatible way. Kernel/rdma_core
1216                  * support single E-Switch per PF configurations only and
1217                  * vport_id field contains the vport index for associated VF,
1218                  * which is deduced from representor port name.
1219                  * For example, let's have the IB device port 10, it has
1220                  * attached network device eth0, which has port name attribute
1221                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1222                  * as 3 (2+1). This assigning schema should be changed if the
1223                  * multiple E-Switch instances per PF configurations or/and PCI
1224                  * subfunctions are added.
1225                  */
1226                 priv->vport_id = switch_info->representor ?
1227                                  switch_info->port_name + 1 : -1;
1228         }
1229         priv->representor_id = mlx5_representor_id_encode(switch_info,
1230                                                           eth_da->type);
1231         /*
1232          * Look for sibling devices in order to reuse their switch domain
1233          * if any, otherwise allocate one.
1234          */
1235         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1236                 const struct mlx5_priv *opriv =
1237                         rte_eth_devices[port_id].data->dev_private;
1238
1239                 if (!opriv ||
1240                     opriv->sh != priv->sh ||
1241                         opriv->domain_id ==
1242                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1243                         continue;
1244                 priv->domain_id = opriv->domain_id;
1245                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1246                         priv->dev_port, priv->domain_id);
1247                 break;
1248         }
1249         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1250                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1251                 if (err) {
1252                         err = rte_errno;
1253                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1254                                 strerror(rte_errno));
1255                         goto error;
1256                 }
1257                 own_domain_id = 1;
1258                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1259                         priv->dev_port, priv->domain_id);
1260         }
1261         /* Override some values set by hardware configuration. */
1262         mlx5_args(config, dpdk_dev->devargs);
1263         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1264         if (err)
1265                 goto error;
1266         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1267                             IBV_DEVICE_RAW_IP_CSUM);
1268         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1269                 (config->hw_csum ? "" : "not "));
1270 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1271         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1272         DRV_LOG(DEBUG, "counters are not supported");
1273 #endif
1274 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1275         if (config->dv_flow_en) {
1276                 DRV_LOG(WARNING, "DV flow is not supported");
1277                 config->dv_flow_en = 0;
1278         }
1279 #endif
1280         if (spawn->max_port > UINT8_MAX) {
1281                 /* Verbs can't support ports larger than 255 by design. */
1282                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1283                 err = EINVAL;
1284                 goto error;
1285         }
1286         config->ind_table_max_size =
1287                 sh->device_attr.max_rwq_indirection_table_size;
1288         /*
1289          * Remove this check once DPDK supports larger/variable
1290          * indirection tables.
1291          */
1292         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1293                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1294         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1295                 config->ind_table_max_size);
1296         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1297                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1298         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1299                 (config->hw_vlan_strip ? "" : "not "));
1300         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1301                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1302 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1303         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1304 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1305         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1306                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1307 #endif
1308         if (config->hw_padding && !hw_padding) {
1309                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1310                 config->hw_padding = 0;
1311         } else if (config->hw_padding) {
1312                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1313         }
1314         config->tso = (sh->device_attr.max_tso > 0 &&
1315                       (sh->device_attr.tso_supported_qpts &
1316                        (1 << IBV_QPT_RAW_PACKET)));
1317         if (config->tso)
1318                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1319         /*
1320          * MPW is disabled by default, while the Enhanced MPW is enabled
1321          * by default.
1322          */
1323         if (config->mps == MLX5_ARG_UNSET)
1324                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1325                                                           MLX5_MPW_DISABLED;
1326         else
1327                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1328         DRV_LOG(INFO, "%sMPS is %s",
1329                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1330                 config->mps == MLX5_MPW ? "legacy " : "",
1331                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1332         if (sh->devx) {
1333                 config->hca_attr = sh->cdev->config.hca_attr;
1334                 sh->steering_format_version =
1335                         config->hca_attr.steering_format_version;
1336                 /* Check for LRO support. */
1337                 if (config->dest_tir && config->hca_attr.lro_cap &&
1338                     config->dv_flow_en) {
1339                         /* TBD check tunnel lro caps. */
1340                         config->lro.supported = config->hca_attr.lro_cap;
1341                         DRV_LOG(DEBUG, "Device supports LRO");
1342                         /*
1343                          * If LRO timeout is not configured by application,
1344                          * use the minimal supported value.
1345                          */
1346                         if (!config->lro.timeout)
1347                                 config->lro.timeout =
1348                                 config->hca_attr.lro_timer_supported_periods[0];
1349                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1350                                 config->lro.timeout);
1351                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1352                                 "required for coalescing is %d bytes",
1353                                 config->hca_attr.lro_min_mss_size);
1354                 }
1355 #if defined(HAVE_MLX5DV_DR) && \
1356         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1357          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1358                 if (config->hca_attr.qos.sup &&
1359                     config->hca_attr.qos.flow_meter_old &&
1360                     config->dv_flow_en) {
1361                         uint8_t reg_c_mask =
1362                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1363                         /*
1364                          * Meter needs two REG_C's for color match and pre-sfx
1365                          * flow match. Here get the REG_C for color match.
1366                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1367                          */
1368                         reg_c_mask &= 0xfc;
1369                         if (__builtin_popcount(reg_c_mask) < 1) {
1370                                 priv->mtr_en = 0;
1371                                 DRV_LOG(WARNING, "No available register for"
1372                                         " meter.");
1373                         } else {
1374                                 /*
1375                                  * The meter color register is used by the
1376                                  * flow-hit feature as well.
1377                                  * The flow-hit feature must use REG_C_3
1378                                  * Prefer REG_C_3 if it is available.
1379                                  */
1380                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1381                                         priv->mtr_color_reg = REG_C_3;
1382                                 else
1383                                         priv->mtr_color_reg = ffs(reg_c_mask)
1384                                                               - 1 + REG_C_0;
1385                                 priv->mtr_en = 1;
1386                                 priv->mtr_reg_share =
1387                                       config->hca_attr.qos.flow_meter;
1388                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1389                                         priv->mtr_color_reg);
1390                         }
1391                 }
1392                 if (config->hca_attr.qos.sup &&
1393                         config->hca_attr.qos.flow_meter_aso_sup) {
1394                         uint32_t log_obj_size =
1395                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1396                         if (log_obj_size >=
1397                         config->hca_attr.qos.log_meter_aso_granularity &&
1398                         log_obj_size <=
1399                         config->hca_attr.qos.log_meter_aso_max_alloc)
1400                                 sh->meter_aso_en = 1;
1401                 }
1402                 if (priv->mtr_en) {
1403                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1404                         if (err) {
1405                                 err = -err;
1406                                 goto error;
1407                         }
1408                 }
1409                 if (config->hca_attr.flow.tunnel_header_0_1)
1410                         sh->tunnel_header_0_1 = 1;
1411 #endif
1412 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1413                 if (config->hca_attr.flow_hit_aso &&
1414                     priv->mtr_color_reg == REG_C_3) {
1415                         sh->flow_hit_aso_en = 1;
1416                         err = mlx5_flow_aso_age_mng_init(sh);
1417                         if (err) {
1418                                 err = -err;
1419                                 goto error;
1420                         }
1421                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1422                 }
1423 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1424 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1425         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1426                 if (config->hca_attr.ct_offload &&
1427                     priv->mtr_color_reg == REG_C_3) {
1428                         err = mlx5_flow_aso_ct_mng_init(sh);
1429                         if (err) {
1430                                 err = -err;
1431                                 goto error;
1432                         }
1433                         DRV_LOG(DEBUG, "CT ASO is supported.");
1434                         sh->ct_aso_en = 1;
1435                 }
1436 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1437 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1438                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1439                     config->dv_flow_en) {
1440                         priv->sampler_en = 1;
1441                         DRV_LOG(DEBUG, "Sampler enabled!");
1442                 } else {
1443                         priv->sampler_en = 0;
1444                         if (!config->hca_attr.log_max_ft_sampler_num)
1445                                 DRV_LOG(WARNING,
1446                                         "No available register for sampler.");
1447                         else
1448                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1449                 }
1450 #endif
1451         }
1452         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1453             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1454                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1455                 config->cqe_comp = 0;
1456         }
1457         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1458             (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1459                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1460                                  " format isn't supported.");
1461                 config->cqe_comp = 0;
1462         }
1463         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1464             (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1465                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1466                                  " format isn't supported.");
1467                 config->cqe_comp = 0;
1468         }
1469         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1470                         config->cqe_comp ? "" : "not ");
1471         if (config->tx_pp) {
1472                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1473                         config->hca_attr.dev_freq_khz);
1474                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1475                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1476                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1477                         config->hca_attr.cross_channel ? "" : "not ");
1478                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1479                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1480                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1481                         config->hca_attr.non_wire_sq ? "" : "not ");
1482                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1483                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1484                         config->hca_attr.log_max_static_sq_wq);
1485                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1486                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1487                 if (!sh->devx) {
1488                         DRV_LOG(ERR, "DevX is required for packet pacing");
1489                         err = ENODEV;
1490                         goto error;
1491                 }
1492                 if (!config->hca_attr.qos.packet_pacing) {
1493                         DRV_LOG(ERR, "Packet pacing is not supported");
1494                         err = ENODEV;
1495                         goto error;
1496                 }
1497                 if (!config->hca_attr.cross_channel) {
1498                         DRV_LOG(ERR, "Cross channel operations are"
1499                                      " required for packet pacing");
1500                         err = ENODEV;
1501                         goto error;
1502                 }
1503                 if (!config->hca_attr.wqe_index_ignore) {
1504                         DRV_LOG(ERR, "WQE index ignore feature is"
1505                                      " required for packet pacing");
1506                         err = ENODEV;
1507                         goto error;
1508                 }
1509                 if (!config->hca_attr.non_wire_sq) {
1510                         DRV_LOG(ERR, "Non-wire SQ feature is"
1511                                      " required for packet pacing");
1512                         err = ENODEV;
1513                         goto error;
1514                 }
1515                 if (!config->hca_attr.log_max_static_sq_wq) {
1516                         DRV_LOG(ERR, "Static WQE SQ feature is"
1517                                      " required for packet pacing");
1518                         err = ENODEV;
1519                         goto error;
1520                 }
1521                 if (!config->hca_attr.qos.wqe_rate_pp) {
1522                         DRV_LOG(ERR, "WQE rate mode is required"
1523                                      " for packet pacing");
1524                         err = ENODEV;
1525                         goto error;
1526                 }
1527 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1528                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1529                              " can't create queues for packet pacing");
1530                 err = ENODEV;
1531                 goto error;
1532 #endif
1533         }
1534         if (sh->devx) {
1535                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1536
1537                 err = config->hca_attr.access_register_user ?
1538                         mlx5_devx_cmd_register_read
1539                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1540                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1541                 if (!err) {
1542                         uint32_t ts_mode;
1543
1544                         /* MTUTC register is read successfully. */
1545                         ts_mode = MLX5_GET(register_mtutc, reg,
1546                                            time_stamp_mode);
1547                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1548                                 config->rt_timestamp = 1;
1549                 } else {
1550                         /* Kernel does not support register reading. */
1551                         if (config->hca_attr.dev_freq_khz ==
1552                                                  (NS_PER_S / MS_PER_S))
1553                                 config->rt_timestamp = 1;
1554                 }
1555         }
1556         /*
1557          * If HW has bug working with tunnel packet decapsulation and
1558          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1559          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1560          */
1561         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1562                 config->hw_fcs_strip = 0;
1563         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1564                 (config->hw_fcs_strip ? "" : "not "));
1565         if (config->mprq.enabled && mprq) {
1566                 if (config->mprq.stride_num_n &&
1567                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1568                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1569                         config->mprq.stride_num_n =
1570                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1571                                                 mprq_min_stride_num_n),
1572                                         mprq_max_stride_num_n);
1573                         DRV_LOG(WARNING,
1574                                 "the number of strides"
1575                                 " for Multi-Packet RQ is out of range,"
1576                                 " setting default value (%u)",
1577                                 1 << config->mprq.stride_num_n);
1578                 }
1579                 if (config->mprq.stride_size_n &&
1580                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1581                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1582                         config->mprq.stride_size_n =
1583                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1584                                                 mprq_min_stride_size_n),
1585                                         mprq_max_stride_size_n);
1586                         DRV_LOG(WARNING,
1587                                 "the size of a stride"
1588                                 " for Multi-Packet RQ is out of range,"
1589                                 " setting default value (%u)",
1590                                 1 << config->mprq.stride_size_n);
1591                 }
1592                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1593                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1594         } else if (config->mprq.enabled && !mprq) {
1595                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1596                 config->mprq.enabled = 0;
1597         }
1598         if (config->max_dump_files_num == 0)
1599                 config->max_dump_files_num = 128;
1600         eth_dev = rte_eth_dev_allocate(name);
1601         if (eth_dev == NULL) {
1602                 DRV_LOG(ERR, "can not allocate rte ethdev");
1603                 err = ENOMEM;
1604                 goto error;
1605         }
1606         if (priv->representor) {
1607                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1608                 eth_dev->data->representor_id = priv->representor_id;
1609                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1610                         struct mlx5_priv *opriv =
1611                                 rte_eth_devices[port_id].data->dev_private;
1612                         if (opriv &&
1613                             opriv->master &&
1614                             opriv->domain_id == priv->domain_id &&
1615                             opriv->sh == priv->sh) {
1616                                 eth_dev->data->backer_port_id = port_id;
1617                                 break;
1618                         }
1619                 }
1620                 if (port_id >= RTE_MAX_ETHPORTS)
1621                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1622         }
1623         priv->mp_id.port_id = eth_dev->data->port_id;
1624         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1625         /*
1626          * Store associated network device interface index. This index
1627          * is permanent throughout the lifetime of device. So, we may store
1628          * the ifindex here and use the cached value further.
1629          */
1630         MLX5_ASSERT(spawn->ifindex);
1631         priv->if_index = spawn->ifindex;
1632         eth_dev->data->dev_private = priv;
1633         priv->dev_data = eth_dev->data;
1634         eth_dev->data->mac_addrs = priv->mac;
1635         eth_dev->device = dpdk_dev;
1636         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1637         /* Configure the first MAC address by default. */
1638         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1639                 DRV_LOG(ERR,
1640                         "port %u cannot get MAC address, is mlx5_en"
1641                         " loaded? (errno: %s)",
1642                         eth_dev->data->port_id, strerror(rte_errno));
1643                 err = ENODEV;
1644                 goto error;
1645         }
1646         DRV_LOG(INFO,
1647                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1648                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1649 #ifdef RTE_LIBRTE_MLX5_DEBUG
1650         {
1651                 char ifname[MLX5_NAMESIZE];
1652
1653                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1654                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1655                                 eth_dev->data->port_id, ifname);
1656                 else
1657                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1658                                 eth_dev->data->port_id);
1659         }
1660 #endif
1661         /* Get actual MTU if possible. */
1662         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1663         if (err) {
1664                 err = rte_errno;
1665                 goto error;
1666         }
1667         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1668                 priv->mtu);
1669         /* Initialize burst functions to prevent crashes before link-up. */
1670         eth_dev->rx_pkt_burst = removed_rx_burst;
1671         eth_dev->tx_pkt_burst = removed_tx_burst;
1672         eth_dev->dev_ops = &mlx5_dev_ops;
1673         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1674         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1675         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1676         /* Register MAC address. */
1677         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1678         if (config->vf && config->vf_nl_en)
1679                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1680                                       mlx5_ifindex(eth_dev),
1681                                       eth_dev->data->mac_addrs,
1682                                       MLX5_MAX_MAC_ADDRESSES);
1683         priv->ctrl_flows = 0;
1684         rte_spinlock_init(&priv->flow_list_lock);
1685         TAILQ_INIT(&priv->flow_meters);
1686         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1687         if (!priv->mtr_profile_tbl)
1688                 goto error;
1689         /* Bring Ethernet device up. */
1690         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1691                 eth_dev->data->port_id);
1692         mlx5_set_link_up(eth_dev);
1693         /*
1694          * Even though the interrupt handler is not installed yet,
1695          * interrupts will still trigger on the async_fd from
1696          * Verbs context returned by ibv_open_device().
1697          */
1698         mlx5_link_update(eth_dev, 0);
1699 #ifdef HAVE_MLX5DV_DR_ESWITCH
1700         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1701               (switch_info->representor || switch_info->master)))
1702                 config->dv_esw_en = 0;
1703 #else
1704         config->dv_esw_en = 0;
1705 #endif
1706         /* Detect minimal data bytes to inline. */
1707         mlx5_set_min_inline(spawn, config);
1708         /* Store device configuration on private structure. */
1709         priv->config = *config;
1710         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1711                 icfg[i].release_mem_en = !!config->reclaim_mode;
1712                 if (config->reclaim_mode)
1713                         icfg[i].per_core_cache = 0;
1714                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1715                 if (!priv->flows[i])
1716                         goto error;
1717         }
1718         /* Create context for virtual machine VLAN workaround. */
1719         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1720         if (config->dv_flow_en) {
1721                 err = mlx5_alloc_shared_dr(priv);
1722                 if (err)
1723                         goto error;
1724         }
1725         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1726                 priv->obj_ops = devx_obj_ops;
1727                 priv->obj_ops.drop_action_create =
1728                                                 ibv_obj_ops.drop_action_create;
1729                 priv->obj_ops.drop_action_destroy =
1730                                                 ibv_obj_ops.drop_action_destroy;
1731 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1732                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1733 #else
1734                 if (config->dv_esw_en)
1735                         priv->obj_ops.txq_obj_modify =
1736                                                 ibv_obj_ops.txq_obj_modify;
1737 #endif
1738                 /* Use specific wrappers for Tx object. */
1739                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1740                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1741                 mlx5_queue_counter_id_prepare(eth_dev);
1742                 priv->obj_ops.lb_dummy_queue_create =
1743                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1744                 priv->obj_ops.lb_dummy_queue_release =
1745                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1746         } else {
1747                 priv->obj_ops = ibv_obj_ops;
1748         }
1749         if (config->tx_pp &&
1750             (priv->config.dv_esw_en ||
1751              priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1752                 /*
1753                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1754                  * packet pacing and already checked above.
1755                  * Hence, we should only make sure the SQs will be created
1756                  * with DevX, not with Verbs.
1757                  * Verbs allocates the SQ UAR on its own and it can't be shared
1758                  * with Clock Queue UAR as required for Tx scheduling.
1759                  */
1760                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1761                 err = ENODEV;
1762                 goto error;
1763         }
1764         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1765         if (!priv->drop_queue.hrxq)
1766                 goto error;
1767         /* Supported Verbs flow priority number detection. */
1768         err = mlx5_flow_discover_priorities(eth_dev);
1769         if (err < 0) {
1770                 err = -err;
1771                 goto error;
1772         }
1773         priv->config.flow_prio = err;
1774         if (!priv->config.dv_esw_en &&
1775             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1776                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1777                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1778                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1779         }
1780         mlx5_set_metadata_mask(eth_dev);
1781         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1782             !priv->sh->dv_regc0_mask) {
1783                 DRV_LOG(ERR, "metadata mode %u is not supported "
1784                              "(no metadata reg_c[0] is available)",
1785                              priv->config.dv_xmeta_en);
1786                         err = ENOTSUP;
1787                         goto error;
1788         }
1789         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1790                                        mlx5_hrxq_create_cb,
1791                                        mlx5_hrxq_match_cb,
1792                                        mlx5_hrxq_remove_cb,
1793                                        mlx5_hrxq_clone_cb,
1794                                        mlx5_hrxq_clone_free_cb);
1795         if (!priv->hrxqs)
1796                 goto error;
1797         rte_rwlock_init(&priv->ind_tbls_lock);
1798         /* Query availability of metadata reg_c's. */
1799         err = mlx5_flow_discover_mreg_c(eth_dev);
1800         if (err < 0) {
1801                 err = -err;
1802                 goto error;
1803         }
1804         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1805                 DRV_LOG(DEBUG,
1806                         "port %u extensive metadata register is not supported",
1807                         eth_dev->data->port_id);
1808                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1809                         DRV_LOG(ERR, "metadata mode %u is not supported "
1810                                      "(no metadata registers available)",
1811                                      priv->config.dv_xmeta_en);
1812                         err = ENOTSUP;
1813                         goto error;
1814                 }
1815         }
1816         if (priv->config.dv_flow_en &&
1817             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1818             mlx5_flow_ext_mreg_supported(eth_dev) &&
1819             priv->sh->dv_regc0_mask) {
1820                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1821                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1822                                                       false, true, eth_dev,
1823                                                       flow_dv_mreg_create_cb,
1824                                                       flow_dv_mreg_match_cb,
1825                                                       flow_dv_mreg_remove_cb,
1826                                                       flow_dv_mreg_clone_cb,
1827                                                     flow_dv_mreg_clone_free_cb);
1828                 if (!priv->mreg_cp_tbl) {
1829                         err = ENOMEM;
1830                         goto error;
1831                 }
1832         }
1833         rte_spinlock_init(&priv->shared_act_sl);
1834         mlx5_flow_counter_mode_config(eth_dev);
1835         mlx5_flow_drop_action_config(eth_dev);
1836         if (priv->config.dv_flow_en)
1837                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1838         return eth_dev;
1839 error:
1840         if (priv) {
1841                 if (priv->mreg_cp_tbl)
1842                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1843                 if (priv->sh)
1844                         mlx5_os_free_shared_dr(priv);
1845                 if (priv->nl_socket_route >= 0)
1846                         close(priv->nl_socket_route);
1847                 if (priv->nl_socket_rdma >= 0)
1848                         close(priv->nl_socket_rdma);
1849                 if (priv->vmwa_context)
1850                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1851                 if (eth_dev && priv->drop_queue.hrxq)
1852                         mlx5_drop_action_destroy(eth_dev);
1853                 if (priv->mtr_profile_tbl)
1854                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1855                 if (own_domain_id)
1856                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1857                 if (priv->hrxqs)
1858                         mlx5_list_destroy(priv->hrxqs);
1859                 mlx5_free(priv);
1860                 if (eth_dev != NULL)
1861                         eth_dev->data->dev_private = NULL;
1862         }
1863         if (eth_dev != NULL) {
1864                 /* mac_addrs must not be freed alone because part of
1865                  * dev_private
1866                  **/
1867                 eth_dev->data->mac_addrs = NULL;
1868                 rte_eth_dev_release_port(eth_dev);
1869         }
1870         if (sh)
1871                 mlx5_free_shared_dev_ctx(sh);
1872         MLX5_ASSERT(err > 0);
1873         rte_errno = err;
1874         return NULL;
1875 }
1876
1877 /**
1878  * Comparison callback to sort device data.
1879  *
1880  * This is meant to be used with qsort().
1881  *
1882  * @param a[in]
1883  *   Pointer to pointer to first data object.
1884  * @param b[in]
1885  *   Pointer to pointer to second data object.
1886  *
1887  * @return
1888  *   0 if both objects are equal, less than 0 if the first argument is less
1889  *   than the second, greater than 0 otherwise.
1890  */
1891 static int
1892 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1893 {
1894         const struct mlx5_switch_info *si_a =
1895                 &((const struct mlx5_dev_spawn_data *)a)->info;
1896         const struct mlx5_switch_info *si_b =
1897                 &((const struct mlx5_dev_spawn_data *)b)->info;
1898         int ret;
1899
1900         /* Master device first. */
1901         ret = si_b->master - si_a->master;
1902         if (ret)
1903                 return ret;
1904         /* Then representor devices. */
1905         ret = si_b->representor - si_a->representor;
1906         if (ret)
1907                 return ret;
1908         /* Unidentified devices come last in no specific order. */
1909         if (!si_a->representor)
1910                 return 0;
1911         /* Order representors by name. */
1912         return si_a->port_name - si_b->port_name;
1913 }
1914
1915 /**
1916  * Match PCI information for possible slaves of bonding device.
1917  *
1918  * @param[in] ibdev_name
1919  *   Name of Infiniband device.
1920  * @param[in] pci_dev
1921  *   Pointer to primary PCI address structure to match.
1922  * @param[in] nl_rdma
1923  *   Netlink RDMA group socket handle.
1924  * @param[in] owner
1925  *   Representor owner PF index.
1926  * @param[out] bond_info
1927  *   Pointer to bonding information.
1928  *
1929  * @return
1930  *   negative value if no bonding device found, otherwise
1931  *   positive index of slave PF in bonding.
1932  */
1933 static int
1934 mlx5_device_bond_pci_match(const char *ibdev_name,
1935                            const struct rte_pci_addr *pci_dev,
1936                            int nl_rdma, uint16_t owner,
1937                            struct mlx5_bond_info *bond_info)
1938 {
1939         char ifname[IF_NAMESIZE + 1];
1940         unsigned int ifindex;
1941         unsigned int np, i;
1942         FILE *bond_file = NULL, *file;
1943         int pf = -1;
1944         int ret;
1945
1946         /*
1947          * Try to get master device name. If something goes wrong suppose
1948          * the lack of kernel support and no bonding devices.
1949          */
1950         memset(bond_info, 0, sizeof(*bond_info));
1951         if (nl_rdma < 0)
1952                 return -1;
1953         if (!strstr(ibdev_name, "bond"))
1954                 return -1;
1955         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1956         if (!np)
1957                 return -1;
1958         /*
1959          * The master device might not be on the predefined port(not on port
1960          * index 1, it is not guaranteed), we have to scan all Infiniband
1961          * device ports and find master.
1962          */
1963         for (i = 1; i <= np; ++i) {
1964                 /* Check whether Infiniband port is populated. */
1965                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1966                 if (!ifindex)
1967                         continue;
1968                 if (!if_indextoname(ifindex, ifname))
1969                         continue;
1970                 /* Try to read bonding slave names from sysfs. */
1971                 MKSTR(slaves,
1972                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1973                 bond_file = fopen(slaves, "r");
1974                 if (bond_file)
1975                         break;
1976         }
1977         if (!bond_file)
1978                 return -1;
1979         /* Use safe format to check maximal buffer length. */
1980         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1981         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1982                 char tmp_str[IF_NAMESIZE + 32];
1983                 struct rte_pci_addr pci_addr;
1984                 struct mlx5_switch_info info;
1985
1986                 /* Process slave interface names in the loop. */
1987                 snprintf(tmp_str, sizeof(tmp_str),
1988                          "/sys/class/net/%s", ifname);
1989                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1990                         DRV_LOG(WARNING,
1991                                 "Cannot get PCI address for netdev \"%s\".",
1992                                 ifname);
1993                         continue;
1994                 }
1995                 /* Slave interface PCI address match found. */
1996                 snprintf(tmp_str, sizeof(tmp_str),
1997                          "/sys/class/net/%s/phys_port_name", ifname);
1998                 file = fopen(tmp_str, "rb");
1999                 if (!file)
2000                         break;
2001                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2002                 if (fscanf(file, "%32s", tmp_str) == 1)
2003                         mlx5_translate_port_name(tmp_str, &info);
2004                 fclose(file);
2005                 /* Only process PF ports. */
2006                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2007                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2008                         continue;
2009                 /* Check max bonding member. */
2010                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2011                         DRV_LOG(WARNING, "bonding index out of range, "
2012                                 "please increase MLX5_BOND_MAX_PORTS: %s",
2013                                 tmp_str);
2014                         break;
2015                 }
2016                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2017                 if (pci_dev->domain == pci_addr.domain &&
2018                     pci_dev->bus == pci_addr.bus &&
2019                     pci_dev->devid == pci_addr.devid &&
2020                     ((pci_dev->function == 0 &&
2021                       pci_dev->function + owner == pci_addr.function) ||
2022                      (pci_dev->function == owner &&
2023                       pci_addr.function == owner)))
2024                         pf = info.port_name;
2025                 /* Get ifindex. */
2026                 snprintf(tmp_str, sizeof(tmp_str),
2027                          "/sys/class/net/%s/ifindex", ifname);
2028                 file = fopen(tmp_str, "rb");
2029                 if (!file)
2030                         break;
2031                 ret = fscanf(file, "%u", &ifindex);
2032                 fclose(file);
2033                 if (ret != 1)
2034                         break;
2035                 /* Save bonding info. */
2036                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2037                         sizeof(bond_info->ports[0].ifname));
2038                 bond_info->ports[info.port_name].pci_addr = pci_addr;
2039                 bond_info->ports[info.port_name].ifindex = ifindex;
2040                 bond_info->n_port++;
2041         }
2042         if (pf >= 0) {
2043                 /* Get bond interface info */
2044                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2045                                            bond_info->ifname);
2046                 if (ret)
2047                         DRV_LOG(ERR, "unable to get bond info: %s",
2048                                 strerror(rte_errno));
2049                 else
2050                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2051                                 ifindex, bond_info->ifindex, bond_info->ifname);
2052         }
2053         return pf;
2054 }
2055
2056 static void
2057 mlx5_os_config_default(struct mlx5_dev_config *config)
2058 {
2059         memset(config, 0, sizeof(*config));
2060         config->mps = MLX5_ARG_UNSET;
2061         config->rx_vec_en = 1;
2062         config->txq_inline_max = MLX5_ARG_UNSET;
2063         config->txq_inline_min = MLX5_ARG_UNSET;
2064         config->txq_inline_mpw = MLX5_ARG_UNSET;
2065         config->txqs_inline = MLX5_ARG_UNSET;
2066         config->vf_nl_en = 1;
2067         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2068         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2069         config->dv_esw_en = 1;
2070         config->dv_flow_en = 1;
2071         config->decap_en = 1;
2072         config->log_hp_size = MLX5_ARG_UNSET;
2073         config->allow_duplicate_pattern = 1;
2074 }
2075
2076 /**
2077  * Register a PCI device within bonding.
2078  *
2079  * This function spawns Ethernet devices out of a given PCI device and
2080  * bonding owner PF index.
2081  *
2082  * @param[in] cdev
2083  *   Pointer to common mlx5 device structure.
2084  * @param[in] req_eth_da
2085  *   Requested ethdev device argument.
2086  * @param[in] owner_id
2087  *   Requested owner PF port ID within bonding device, default to 0.
2088  *
2089  * @return
2090  *   0 on success, a negative errno value otherwise and rte_errno is set.
2091  */
2092 static int
2093 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2094                      struct rte_eth_devargs *req_eth_da,
2095                      uint16_t owner_id)
2096 {
2097         struct ibv_device **ibv_list;
2098         /*
2099          * Number of found IB Devices matching with requested PCI BDF.
2100          * nd != 1 means there are multiple IB devices over the same
2101          * PCI device and we have representors and master.
2102          */
2103         unsigned int nd = 0;
2104         /*
2105          * Number of found IB device Ports. nd = 1 and np = 1..n means
2106          * we have the single multiport IB device, and there may be
2107          * representors attached to some of found ports.
2108          */
2109         unsigned int np = 0;
2110         /*
2111          * Number of DPDK ethernet devices to Spawn - either over
2112          * multiple IB devices or multiple ports of single IB device.
2113          * Actually this is the number of iterations to spawn.
2114          */
2115         unsigned int ns = 0;
2116         /*
2117          * Bonding device
2118          *   < 0 - no bonding device (single one)
2119          *  >= 0 - bonding device (value is slave PF index)
2120          */
2121         int bd = -1;
2122         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2123         struct mlx5_dev_spawn_data *list = NULL;
2124         struct mlx5_dev_config dev_config;
2125         unsigned int dev_config_vf;
2126         struct rte_eth_devargs eth_da = *req_eth_da;
2127         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2128         struct mlx5_bond_info bond_info;
2129         int ret = -1;
2130
2131         errno = 0;
2132         ibv_list = mlx5_glue->get_device_list(&ret);
2133         if (!ibv_list) {
2134                 rte_errno = errno ? errno : ENOSYS;
2135                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2136                 return -rte_errno;
2137         }
2138         /*
2139          * First scan the list of all Infiniband devices to find
2140          * matching ones, gathering into the list.
2141          */
2142         struct ibv_device *ibv_match[ret + 1];
2143         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2144         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2145         unsigned int i;
2146
2147         while (ret-- > 0) {
2148                 struct rte_pci_addr pci_addr;
2149
2150                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2151                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2152                                                 nl_rdma, owner_id, &bond_info);
2153                 if (bd >= 0) {
2154                         /*
2155                          * Bonding device detected. Only one match is allowed,
2156                          * the bonding is supported over multi-port IB device,
2157                          * there should be no matches on representor PCI
2158                          * functions or non VF LAG bonding devices with
2159                          * specified address.
2160                          */
2161                         if (nd) {
2162                                 DRV_LOG(ERR,
2163                                         "multiple PCI match on bonding device"
2164                                         "\"%s\" found", ibv_list[ret]->name);
2165                                 rte_errno = ENOENT;
2166                                 ret = -rte_errno;
2167                                 goto exit;
2168                         }
2169                         /* Amend owner pci address if owner PF ID specified. */
2170                         if (eth_da.nb_representor_ports)
2171                                 owner_pci.function += owner_id;
2172                         DRV_LOG(INFO,
2173                                 "PCI information matches for slave %d bonding device \"%s\"",
2174                                 bd, ibv_list[ret]->name);
2175                         ibv_match[nd++] = ibv_list[ret];
2176                         break;
2177                 } else {
2178                         /* Bonding device not found. */
2179                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2180                                               &pci_addr))
2181                                 continue;
2182                         if (owner_pci.domain != pci_addr.domain ||
2183                             owner_pci.bus != pci_addr.bus ||
2184                             owner_pci.devid != pci_addr.devid ||
2185                             owner_pci.function != pci_addr.function)
2186                                 continue;
2187                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2188                                 ibv_list[ret]->name);
2189                         ibv_match[nd++] = ibv_list[ret];
2190                 }
2191         }
2192         ibv_match[nd] = NULL;
2193         if (!nd) {
2194                 /* No device matches, just complain and bail out. */
2195                 DRV_LOG(WARNING,
2196                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2197                         " are kernel drivers loaded?",
2198                         owner_pci.domain, owner_pci.bus,
2199                         owner_pci.devid, owner_pci.function);
2200                 rte_errno = ENOENT;
2201                 ret = -rte_errno;
2202                 goto exit;
2203         }
2204         if (nd == 1) {
2205                 /*
2206                  * Found single matching device may have multiple ports.
2207                  * Each port may be representor, we have to check the port
2208                  * number and check the representors existence.
2209                  */
2210                 if (nl_rdma >= 0)
2211                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2212                 if (!np)
2213                         DRV_LOG(WARNING,
2214                                 "Cannot get IB device \"%s\" ports number.",
2215                                 ibv_match[0]->name);
2216                 if (bd >= 0 && !np) {
2217                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2218                         rte_errno = ENOENT;
2219                         ret = -rte_errno;
2220                         goto exit;
2221                 }
2222         }
2223         /* Now we can determine the maximal amount of devices to be spawned. */
2224         list = mlx5_malloc(MLX5_MEM_ZERO,
2225                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2226                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2227         if (!list) {
2228                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2229                 rte_errno = ENOMEM;
2230                 ret = -rte_errno;
2231                 goto exit;
2232         }
2233         if (bd >= 0 || np > 1) {
2234                 /*
2235                  * Single IB device with multiple ports found,
2236                  * it may be E-Switch master device and representors.
2237                  * We have to perform identification through the ports.
2238                  */
2239                 MLX5_ASSERT(nl_rdma >= 0);
2240                 MLX5_ASSERT(ns == 0);
2241                 MLX5_ASSERT(nd == 1);
2242                 MLX5_ASSERT(np);
2243                 for (i = 1; i <= np; ++i) {
2244                         list[ns].bond_info = &bond_info;
2245                         list[ns].max_port = np;
2246                         list[ns].phys_port = i;
2247                         list[ns].phys_dev_name = ibv_match[0]->name;
2248                         list[ns].eth_dev = NULL;
2249                         list[ns].pci_dev = pci_dev;
2250                         list[ns].cdev = cdev;
2251                         list[ns].pf_bond = bd;
2252                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2253                                                            ibv_match[0]->name,
2254                                                            i);
2255                         if (!list[ns].ifindex) {
2256                                 /*
2257                                  * No network interface index found for the
2258                                  * specified port, it means there is no
2259                                  * representor on this port. It's OK,
2260                                  * there can be disabled ports, for example
2261                                  * if sriov_numvfs < sriov_totalvfs.
2262                                  */
2263                                 continue;
2264                         }
2265                         ret = -1;
2266                         if (nl_route >= 0)
2267                                 ret = mlx5_nl_switch_info(nl_route,
2268                                                           list[ns].ifindex,
2269                                                           &list[ns].info);
2270                         if (ret || (!list[ns].info.representor &&
2271                                     !list[ns].info.master)) {
2272                                 /*
2273                                  * We failed to recognize representors with
2274                                  * Netlink, let's try to perform the task
2275                                  * with sysfs.
2276                                  */
2277                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2278                                                              &list[ns].info);
2279                         }
2280                         if (!ret && bd >= 0) {
2281                                 switch (list[ns].info.name_type) {
2282                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2283                                         if (np == 1) {
2284                                                 /*
2285                                                  * Force standalone bonding
2286                                                  * device for ROCE LAG
2287                                                  * confgiurations.
2288                                                  */
2289                                                 list[ns].info.master = 0;
2290                                                 list[ns].info.representor = 0;
2291                                         }
2292                                         if (list[ns].info.port_name == bd)
2293                                                 ns++;
2294                                         break;
2295                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2296                                         /* Fallthrough */
2297                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2298                                         /* Fallthrough */
2299                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2300                                         if (list[ns].info.pf_num == bd)
2301                                                 ns++;
2302                                         break;
2303                                 default:
2304                                         break;
2305                                 }
2306                                 continue;
2307                         }
2308                         if (!ret && (list[ns].info.representor ^
2309                                      list[ns].info.master))
2310                                 ns++;
2311                 }
2312                 if (!ns) {
2313                         DRV_LOG(ERR,
2314                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2315                         rte_errno = ENOENT;
2316                         ret = -rte_errno;
2317                         goto exit;
2318                 }
2319         } else {
2320                 /*
2321                  * The existence of several matching entries (nd > 1) means
2322                  * port representors have been instantiated. No existing Verbs
2323                  * call nor sysfs entries can tell them apart, this can only
2324                  * be done through Netlink calls assuming kernel drivers are
2325                  * recent enough to support them.
2326                  *
2327                  * In the event of identification failure through Netlink,
2328                  * try again through sysfs, then:
2329                  *
2330                  * 1. A single IB device matches (nd == 1) with single
2331                  *    port (np=0/1) and is not a representor, assume
2332                  *    no switch support.
2333                  *
2334                  * 2. Otherwise no safe assumptions can be made;
2335                  *    complain louder and bail out.
2336                  */
2337                 for (i = 0; i != nd; ++i) {
2338                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2339                         list[ns].bond_info = NULL;
2340                         list[ns].max_port = 1;
2341                         list[ns].phys_port = 1;
2342                         list[ns].phys_dev_name = ibv_match[i]->name;
2343                         list[ns].eth_dev = NULL;
2344                         list[ns].pci_dev = pci_dev;
2345                         list[ns].cdev = cdev;
2346                         list[ns].pf_bond = -1;
2347                         list[ns].ifindex = 0;
2348                         if (nl_rdma >= 0)
2349                                 list[ns].ifindex = mlx5_nl_ifindex
2350                                                             (nl_rdma,
2351                                                              ibv_match[i]->name,
2352                                                              1);
2353                         if (!list[ns].ifindex) {
2354                                 char ifname[IF_NAMESIZE];
2355
2356                                 /*
2357                                  * Netlink failed, it may happen with old
2358                                  * ib_core kernel driver (before 4.16).
2359                                  * We can assume there is old driver because
2360                                  * here we are processing single ports IB
2361                                  * devices. Let's try sysfs to retrieve
2362                                  * the ifindex. The method works for
2363                                  * master device only.
2364                                  */
2365                                 if (nd > 1) {
2366                                         /*
2367                                          * Multiple devices found, assume
2368                                          * representors, can not distinguish
2369                                          * master/representor and retrieve
2370                                          * ifindex via sysfs.
2371                                          */
2372                                         continue;
2373                                 }
2374                                 ret = mlx5_get_ifname_sysfs
2375                                         (ibv_match[i]->ibdev_path, ifname);
2376                                 if (!ret)
2377                                         list[ns].ifindex =
2378                                                 if_nametoindex(ifname);
2379                                 if (!list[ns].ifindex) {
2380                                         /*
2381                                          * No network interface index found
2382                                          * for the specified device, it means
2383                                          * there it is neither representor
2384                                          * nor master.
2385                                          */
2386                                         continue;
2387                                 }
2388                         }
2389                         ret = -1;
2390                         if (nl_route >= 0)
2391                                 ret = mlx5_nl_switch_info(nl_route,
2392                                                           list[ns].ifindex,
2393                                                           &list[ns].info);
2394                         if (ret || (!list[ns].info.representor &&
2395                                     !list[ns].info.master)) {
2396                                 /*
2397                                  * We failed to recognize representors with
2398                                  * Netlink, let's try to perform the task
2399                                  * with sysfs.
2400                                  */
2401                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2402                                                              &list[ns].info);
2403                         }
2404                         if (!ret && (list[ns].info.representor ^
2405                                      list[ns].info.master)) {
2406                                 ns++;
2407                         } else if ((nd == 1) &&
2408                                    !list[ns].info.representor &&
2409                                    !list[ns].info.master) {
2410                                 /*
2411                                  * Single IB device with one physical port and
2412                                  * attached network device.
2413                                  * May be SRIOV is not enabled or there is no
2414                                  * representors.
2415                                  */
2416                                 DRV_LOG(INFO, "No E-Switch support detected.");
2417                                 ns++;
2418                                 break;
2419                         }
2420                 }
2421                 if (!ns) {
2422                         DRV_LOG(ERR,
2423                                 "Unable to recognize master/representors on the multiple IB devices.");
2424                         rte_errno = ENOENT;
2425                         ret = -rte_errno;
2426                         goto exit;
2427                 }
2428                 /*
2429                  * New kernels may add the switch_id attribute for the case
2430                  * there is no E-Switch and we wrongly recognized the only
2431                  * device as master. Override this if there is the single
2432                  * device with single port and new device name format present.
2433                  */
2434                 if (nd == 1 &&
2435                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2436                         list[0].info.master = 0;
2437                         list[0].info.representor = 0;
2438                 }
2439         }
2440         MLX5_ASSERT(ns);
2441         /*
2442          * Sort list to probe devices in natural order for users convenience
2443          * (i.e. master first, then representors from lowest to highest ID).
2444          */
2445         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2446         /* Device specific configuration. */
2447         switch (pci_dev->id.device_id) {
2448         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2449         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2450         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2451         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2452         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2453         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2454         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2455                 dev_config_vf = 1;
2456                 break;
2457         default:
2458                 dev_config_vf = 0;
2459                 break;
2460         }
2461         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2462                 /* Set devargs default values. */
2463                 if (eth_da.nb_mh_controllers == 0) {
2464                         eth_da.nb_mh_controllers = 1;
2465                         eth_da.mh_controllers[0] = 0;
2466                 }
2467                 if (eth_da.nb_ports == 0 && ns > 0) {
2468                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2469                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2470                                         pci_dev->device.devargs->args);
2471                         eth_da.nb_ports = 1;
2472                         eth_da.ports[0] = list[0].info.pf_num;
2473                 }
2474                 if (eth_da.nb_representor_ports == 0) {
2475                         eth_da.nb_representor_ports = 1;
2476                         eth_da.representor_ports[0] = 0;
2477                 }
2478         }
2479         for (i = 0; i != ns; ++i) {
2480                 uint32_t restore;
2481
2482                 /* Default configuration. */
2483                 mlx5_os_config_default(&dev_config);
2484                 dev_config.vf = dev_config_vf;
2485                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2486                                                  &dev_config, &eth_da);
2487                 if (!list[i].eth_dev) {
2488                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2489                                 break;
2490                         /* Device is disabled or already spawned. Ignore it. */
2491                         continue;
2492                 }
2493                 restore = list[i].eth_dev->data->dev_flags;
2494                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2495                 /**
2496                  * Each representor has a dedicated interrupts vector.
2497                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2498                  * representor eth_dev object because representor and PF
2499                  * share the same PCI address.
2500                  * Override representor device with a dedicated
2501                  * interrupts handle here.
2502                  * Representor interrupts handle is released in mlx5_dev_stop().
2503                  */
2504                 if (list[i].info.representor) {
2505                         struct rte_intr_handle *intr_handle;
2506                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2507                                                   sizeof(*intr_handle), 0,
2508                                                   SOCKET_ID_ANY);
2509                         if (!intr_handle) {
2510                                 DRV_LOG(ERR,
2511                                         "port %u failed to allocate memory for interrupt handler "
2512                                         "Rx interrupts will not be supported",
2513                                         i);
2514                                 rte_errno = ENOMEM;
2515                                 ret = -rte_errno;
2516                                 goto exit;
2517                         }
2518                         list[i].eth_dev->intr_handle = intr_handle;
2519                 }
2520                 /* Restore non-PCI flags cleared by the above call. */
2521                 list[i].eth_dev->data->dev_flags |= restore;
2522                 rte_eth_dev_probing_finish(list[i].eth_dev);
2523         }
2524         if (i != ns) {
2525                 DRV_LOG(ERR,
2526                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2527                         " encountering an error: %s",
2528                         owner_pci.domain, owner_pci.bus,
2529                         owner_pci.devid, owner_pci.function,
2530                         strerror(rte_errno));
2531                 ret = -rte_errno;
2532                 /* Roll back. */
2533                 while (i--) {
2534                         if (!list[i].eth_dev)
2535                                 continue;
2536                         mlx5_dev_close(list[i].eth_dev);
2537                         /* mac_addrs must not be freed because in dev_private */
2538                         list[i].eth_dev->data->mac_addrs = NULL;
2539                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2540                 }
2541                 /* Restore original error. */
2542                 rte_errno = -ret;
2543         } else {
2544                 ret = 0;
2545         }
2546 exit:
2547         /*
2548          * Do the routine cleanup:
2549          * - close opened Netlink sockets
2550          * - free allocated spawn data array
2551          * - free the Infiniband device list
2552          */
2553         if (nl_rdma >= 0)
2554                 close(nl_rdma);
2555         if (nl_route >= 0)
2556                 close(nl_route);
2557         if (list)
2558                 mlx5_free(list);
2559         MLX5_ASSERT(ibv_list);
2560         mlx5_glue->free_device_list(ibv_list);
2561         return ret;
2562 }
2563
2564 static int
2565 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2566                           struct rte_eth_devargs *eth_da)
2567 {
2568         int ret = 0;
2569
2570         if (dev->devargs == NULL)
2571                 return 0;
2572         memset(eth_da, 0, sizeof(*eth_da));
2573         /* Parse representor information first from class argument. */
2574         if (dev->devargs->cls_str)
2575                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2576         if (ret != 0) {
2577                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2578                         dev->devargs->cls_str);
2579                 return -rte_errno;
2580         }
2581         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2582                 /* Parse legacy device argument */
2583                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2584                 if (ret) {
2585                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2586                                 dev->devargs->args);
2587                         return -rte_errno;
2588                 }
2589         }
2590         return 0;
2591 }
2592
2593 /**
2594  * Callback to register a PCI device.
2595  *
2596  * This function spawns Ethernet devices out of a given PCI device.
2597  *
2598  * @param[in] cdev
2599  *   Pointer to common mlx5 device structure.
2600  *
2601  * @return
2602  *   0 on success, a negative errno value otherwise and rte_errno is set.
2603  */
2604 static int
2605 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2606 {
2607         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2608         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2609         int ret = 0;
2610         uint16_t p;
2611
2612         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2613         if (ret != 0)
2614                 return ret;
2615
2616         if (eth_da.nb_ports > 0) {
2617                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2618                 for (p = 0; p < eth_da.nb_ports; p++) {
2619                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2620                                                    eth_da.ports[p]);
2621                         if (ret)
2622                                 break;
2623                 }
2624                 if (ret) {
2625                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2626                                 "aborted due to proding failure of PF %u",
2627                                 pci_dev->addr.domain, pci_dev->addr.bus,
2628                                 pci_dev->addr.devid, pci_dev->addr.function,
2629                                 eth_da.ports[p]);
2630                         mlx5_net_remove(cdev);
2631                 }
2632         } else {
2633                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2634         }
2635         return ret;
2636 }
2637
2638 /* Probe a single SF device on auxiliary bus, no representor support. */
2639 static int
2640 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2641 {
2642         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2643         struct mlx5_dev_config config;
2644         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2645         struct rte_device *dev = cdev->dev;
2646         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2647         struct rte_eth_dev *eth_dev;
2648         int ret = 0;
2649
2650         /* Parse ethdev devargs. */
2651         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2652         if (ret != 0)
2653                 return ret;
2654         /* Set default config data. */
2655         mlx5_os_config_default(&config);
2656         config.sf = 1;
2657         /* Init spawn data. */
2658         spawn.max_port = 1;
2659         spawn.phys_port = 1;
2660         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2661         ret = mlx5_auxiliary_get_ifindex(dev->name);
2662         if (ret < 0) {
2663                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2664                 return ret;
2665         }
2666         spawn.ifindex = ret;
2667         spawn.cdev = cdev;
2668         /* Spawn device. */
2669         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2670         if (eth_dev == NULL)
2671                 return -rte_errno;
2672         /* Post create. */
2673         eth_dev->intr_handle = &adev->intr_handle;
2674         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2675                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2676                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2677                 eth_dev->data->numa_node = dev->numa_node;
2678         }
2679         rte_eth_dev_probing_finish(eth_dev);
2680         return 0;
2681 }
2682
2683 /**
2684  * Net class driver callback to probe a device.
2685  *
2686  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2687  *
2688  * @param[in] cdev
2689  *   Pointer to the common mlx5 device.
2690  *
2691  * @return
2692  *   0 on success, a negative errno value otherwise and rte_errno is set.
2693  */
2694 int
2695 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2696 {
2697         int ret;
2698
2699         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2700                 mlx5_pmd_socket_init();
2701         ret = mlx5_init_once();
2702         if (ret) {
2703                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2704                         strerror(rte_errno));
2705                 return -rte_errno;
2706         }
2707         if (mlx5_dev_is_pci(cdev->dev))
2708                 return mlx5_os_pci_probe(cdev);
2709         else
2710                 return mlx5_os_auxiliary_probe(cdev);
2711 }
2712
2713 /**
2714  * Install shared asynchronous device events handler.
2715  * This function is implemented to support event sharing
2716  * between multiple ports of single IB device.
2717  *
2718  * @param sh
2719  *   Pointer to mlx5_dev_ctx_shared object.
2720  */
2721 void
2722 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2723 {
2724         int ret;
2725         int flags;
2726         struct ibv_context *ctx = sh->cdev->ctx;
2727
2728         sh->intr_handle.fd = -1;
2729         flags = fcntl(ctx->async_fd, F_GETFL);
2730         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2731         if (ret) {
2732                 DRV_LOG(INFO, "failed to change file descriptor async event"
2733                         " queue");
2734         } else {
2735                 sh->intr_handle.fd = ctx->async_fd;
2736                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2737                 if (rte_intr_callback_register(&sh->intr_handle,
2738                                         mlx5_dev_interrupt_handler, sh)) {
2739                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2740                         sh->intr_handle.fd = -1;
2741                 }
2742         }
2743         if (sh->devx) {
2744 #ifdef HAVE_IBV_DEVX_ASYNC
2745                 sh->intr_handle_devx.fd = -1;
2746                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2747                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2748                 if (!devx_comp) {
2749                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2750                         return;
2751                 }
2752                 flags = fcntl(devx_comp->fd, F_GETFL);
2753                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2754                 if (ret) {
2755                         DRV_LOG(INFO, "failed to change file descriptor"
2756                                 " devx comp");
2757                         return;
2758                 }
2759                 sh->intr_handle_devx.fd = devx_comp->fd;
2760                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2761                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2762                                         mlx5_dev_interrupt_handler_devx, sh)) {
2763                         DRV_LOG(INFO, "Fail to install the devx shared"
2764                                 " interrupt.");
2765                         sh->intr_handle_devx.fd = -1;
2766                 }
2767 #endif /* HAVE_IBV_DEVX_ASYNC */
2768         }
2769 }
2770
2771 /**
2772  * Uninstall shared asynchronous device events handler.
2773  * This function is implemented to support event sharing
2774  * between multiple ports of single IB device.
2775  *
2776  * @param dev
2777  *   Pointer to mlx5_dev_ctx_shared object.
2778  */
2779 void
2780 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2781 {
2782         if (sh->intr_handle.fd >= 0)
2783                 mlx5_intr_callback_unregister(&sh->intr_handle,
2784                                               mlx5_dev_interrupt_handler, sh);
2785 #ifdef HAVE_IBV_DEVX_ASYNC
2786         if (sh->intr_handle_devx.fd >= 0)
2787                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2788                                   mlx5_dev_interrupt_handler_devx, sh);
2789         if (sh->devx_comp)
2790                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2791 #endif
2792 }
2793
2794 /**
2795  * Read statistics by a named counter.
2796  *
2797  * @param[in] priv
2798  *   Pointer to the private device data structure.
2799  * @param[in] ctr_name
2800  *   Pointer to the name of the statistic counter to read
2801  * @param[out] stat
2802  *   Pointer to read statistic value.
2803  * @return
2804  *   0 on success and stat is valud, 1 if failed to read the value
2805  *   rte_errno is set.
2806  *
2807  */
2808 int
2809 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2810                       uint64_t *stat)
2811 {
2812         int fd;
2813
2814         if (priv->sh) {
2815                 if (priv->q_counters != NULL &&
2816                     strcmp(ctr_name, "out_of_buffer") == 0)
2817                         return mlx5_devx_cmd_queue_counter_query
2818                                         (priv->q_counters, 0, (uint32_t *)stat);
2819                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2820                       priv->sh->ibdev_path,
2821                       priv->dev_port,
2822                       ctr_name);
2823                 fd = open(path, O_RDONLY);
2824                 /*
2825                  * in switchdev the file location is not per port
2826                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2827                  */
2828                 if (fd == -1) {
2829                         MKSTR(path1, "%s/hw_counters/%s",
2830                               priv->sh->ibdev_path,
2831                               ctr_name);
2832                         fd = open(path1, O_RDONLY);
2833                 }
2834                 if (fd != -1) {
2835                         char buf[21] = {'\0'};
2836                         ssize_t n = read(fd, buf, sizeof(buf));
2837
2838                         close(fd);
2839                         if (n != -1) {
2840                                 *stat = strtoull(buf, NULL, 10);
2841                                 return 0;
2842                         }
2843                 }
2844         }
2845         *stat = 0;
2846         return 1;
2847 }
2848
2849 /**
2850  * Remove a MAC address from device
2851  *
2852  * @param dev
2853  *   Pointer to Ethernet device structure.
2854  * @param index
2855  *   MAC address index.
2856  */
2857 void
2858 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2859 {
2860         struct mlx5_priv *priv = dev->data->dev_private;
2861         const int vf = priv->config.vf;
2862
2863         if (vf)
2864                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2865                                         mlx5_ifindex(dev), priv->mac_own,
2866                                         &dev->data->mac_addrs[index], index);
2867 }
2868
2869 /**
2870  * Adds a MAC address to the device
2871  *
2872  * @param dev
2873  *   Pointer to Ethernet device structure.
2874  * @param mac_addr
2875  *   MAC address to register.
2876  * @param index
2877  *   MAC address index.
2878  *
2879  * @return
2880  *   0 on success, a negative errno value otherwise
2881  */
2882 int
2883 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2884                      uint32_t index)
2885 {
2886         struct mlx5_priv *priv = dev->data->dev_private;
2887         const int vf = priv->config.vf;
2888         int ret = 0;
2889
2890         if (vf)
2891                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2892                                            mlx5_ifindex(dev), priv->mac_own,
2893                                            mac, index);
2894         return ret;
2895 }
2896
2897 /**
2898  * Modify a VF MAC address
2899  *
2900  * @param priv
2901  *   Pointer to device private data.
2902  * @param mac_addr
2903  *   MAC address to modify into.
2904  * @param iface_idx
2905  *   Net device interface index
2906  * @param vf_index
2907  *   VF index
2908  *
2909  * @return
2910  *   0 on success, a negative errno value otherwise
2911  */
2912 int
2913 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2914                            unsigned int iface_idx,
2915                            struct rte_ether_addr *mac_addr,
2916                            int vf_index)
2917 {
2918         return mlx5_nl_vf_mac_addr_modify
2919                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2920 }
2921
2922 /**
2923  * Set device promiscuous mode
2924  *
2925  * @param dev
2926  *   Pointer to Ethernet device structure.
2927  * @param enable
2928  *   0 - promiscuous is disabled, otherwise - enabled
2929  *
2930  * @return
2931  *   0 on success, a negative error value otherwise
2932  */
2933 int
2934 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2935 {
2936         struct mlx5_priv *priv = dev->data->dev_private;
2937
2938         return mlx5_nl_promisc(priv->nl_socket_route,
2939                                mlx5_ifindex(dev), !!enable);
2940 }
2941
2942 /**
2943  * Set device promiscuous mode
2944  *
2945  * @param dev
2946  *   Pointer to Ethernet device structure.
2947  * @param enable
2948  *   0 - all multicase is disabled, otherwise - enabled
2949  *
2950  * @return
2951  *   0 on success, a negative error value otherwise
2952  */
2953 int
2954 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2955 {
2956         struct mlx5_priv *priv = dev->data->dev_private;
2957
2958         return mlx5_nl_allmulti(priv->nl_socket_route,
2959                                 mlx5_ifindex(dev), !!enable);
2960 }
2961
2962 /**
2963  * Flush device MAC addresses
2964  *
2965  * @param dev
2966  *   Pointer to Ethernet device structure.
2967  *
2968  */
2969 void
2970 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2971 {
2972         struct mlx5_priv *priv = dev->data->dev_private;
2973
2974         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2975                                dev->data->mac_addrs,
2976                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2977 }