drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 goto error;
 237         /* The resources below are only valid with DV support. */
 238 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 239         /* Init port id action cache list. */
 240         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 242                              flow_dv_port_id_create_cb,
 243                              flow_dv_port_id_match_cb,
 244                              flow_dv_port_id_remove_cb);
 245         /* Init push vlan action cache list. */
 246         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 248                              flow_dv_push_vlan_create_cb,
 249                              flow_dv_push_vlan_match_cb,
 250                              flow_dv_push_vlan_remove_cb);
 251         /* Init sample action cache list. */
 252         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->sample_action_list, s, 0,
 254                              &rte_eth_devices[priv->dev_data->port_id],
 255                              flow_dv_sample_create_cb,
 256                              flow_dv_sample_match_cb,
 257                              flow_dv_sample_remove_cb);
 258         /* Init dest array action cache list. */
 259         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 260         mlx5_cache_list_init(&sh->dest_array_list, s, 0,
 261                              &rte_eth_devices[priv->dev_data->port_id],
 262                              flow_dv_dest_array_create_cb,
 263                              flow_dv_dest_array_match_cb,
 264                              flow_dv_dest_array_remove_cb);
 265         /* Create tags hash list table. */
 266         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 267         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 268                                           MLX5_HLIST_WRITE_MOST,
 269                                           flow_dv_tag_create_cb, NULL,
 270                                           flow_dv_tag_remove_cb);
 271         if (!sh->tag_table) {
 272                 DRV_LOG(ERR, "tags with hash creation failed.");
 273                 err = ENOMEM;
 274                 goto error;
 275         }
 276         sh->tag_table->ctx = sh;
 277         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 278         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 279                                             0, MLX5_HLIST_WRITE_MOST |
 280                                             MLX5_HLIST_DIRECT_KEY,
 281                                             flow_dv_modify_create_cb,
 282                                             flow_dv_modify_match_cb,
 283                                             flow_dv_modify_remove_cb);
 284         if (!sh->modify_cmds) {
 285                 DRV_LOG(ERR, "hdr modify hash creation failed");
 286                 err = ENOMEM;
 287                 goto error;
 288         }
 289         sh->modify_cmds->ctx = sh;
 290         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 291         sh->encaps_decaps = mlx5_hlist_create(s,
 292                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 293                                               0, MLX5_HLIST_DIRECT_KEY |
 294                                               MLX5_HLIST_WRITE_MOST,
 295                                               flow_dv_encap_decap_create_cb,
 296                                               flow_dv_encap_decap_match_cb,
 297                                               flow_dv_encap_decap_remove_cb);
 298         if (!sh->encaps_decaps) {
 299                 DRV_LOG(ERR, "encap decap hash creation failed");
 300                 err = ENOMEM;
 301                 goto error;
 302         }
 303         sh->encaps_decaps->ctx = sh;
 304 #endif
 305 #ifdef HAVE_MLX5DV_DR
 306         void *domain;
 307
 308         /* Reference counter is zero, we should initialize structures. */
 309         domain = mlx5_glue->dr_create_domain(sh->ctx,
 310                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 311         if (!domain) {
 312                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 313                 err = errno;
 314                 goto error;
 315         }
 316         sh->rx_domain = domain;
 317         domain = mlx5_glue->dr_create_domain(sh->ctx,
 318                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 319         if (!domain) {
 320                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 321                 err = errno;
 322                 goto error;
 323         }
 324         pthread_mutex_init(&sh->dv_mutex, NULL);
 325         sh->tx_domain = domain;
 326 #ifdef HAVE_MLX5DV_DR_ESWITCH
 327         if (priv->config.dv_esw_en) {
 328                 domain  = mlx5_glue->dr_create_domain
 329                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 330                 if (!domain) {
 331                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 332                         err = errno;
 333                         goto error;
 334                 }
 335                 sh->fdb_domain = domain;
 336                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 337         }
 338 #endif
 339         if (!sh->tunnel_hub)
 340                 err = mlx5_alloc_tunnel_hub(sh);
 341         if (err) {
 342                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 343                 goto error;
 344         }
 345         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 346                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 347                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 348                 if (sh->fdb_domain)
 349                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 350         }
 351         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 352 #endif /* HAVE_MLX5DV_DR */
 353         sh->default_miss_action =
 354                         mlx5_glue->dr_create_flow_action_default_miss();
 355         if (!sh->default_miss_action)
 356                 DRV_LOG(WARNING, "Default miss action is not supported.");
 357         return 0;
 358 error:
 359         /* Rollback the created objects. */
 360         if (sh->rx_domain) {
 361                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 362                 sh->rx_domain = NULL;
 363         }
 364         if (sh->tx_domain) {
 365                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 366                 sh->tx_domain = NULL;
 367         }
 368         if (sh->fdb_domain) {
 369                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 370                 sh->fdb_domain = NULL;
 371         }
 372         if (sh->esw_drop_action) {
 373                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 374                 sh->esw_drop_action = NULL;
 375         }
 376         if (sh->pop_vlan_action) {
 377                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 378                 sh->pop_vlan_action = NULL;
 379         }
 380         if (sh->encaps_decaps) {
 381                 mlx5_hlist_destroy(sh->encaps_decaps);
 382                 sh->encaps_decaps = NULL;
 383         }
 384         if (sh->modify_cmds) {
 385                 mlx5_hlist_destroy(sh->modify_cmds);
 386                 sh->modify_cmds = NULL;
 387         }
 388         if (sh->tag_table) {
 389                 /* tags should be destroyed with flow before. */
 390                 mlx5_hlist_destroy(sh->tag_table);
 391                 sh->tag_table = NULL;
 392         }
 393         if (sh->tunnel_hub) {
 394                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 395                 sh->tunnel_hub = NULL;
 396         }
 397         mlx5_free_table_hash_list(priv);
 398         return err;
 399 }
 400
 401 /**
 402  * Destroy DR related data within private structure.
 403  *
 404  * @param[in] priv
 405  *   Pointer to the private device data structure.
 406  */
 407 void
 408 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 409 {
 410         struct mlx5_dev_ctx_shared *sh = priv->sh;
 411
 412         MLX5_ASSERT(sh && sh->refcnt);
 413         if (sh->refcnt > 1)
 414                 return;
 415 #ifdef HAVE_MLX5DV_DR
 416         if (sh->rx_domain) {
 417                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 418                 sh->rx_domain = NULL;
 419         }
 420         if (sh->tx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 422                 sh->tx_domain = NULL;
 423         }
 424 #ifdef HAVE_MLX5DV_DR_ESWITCH
 425         if (sh->fdb_domain) {
 426                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 427                 sh->fdb_domain = NULL;
 428         }
 429         if (sh->esw_drop_action) {
 430                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 431                 sh->esw_drop_action = NULL;
 432         }
 433 #endif
 434         if (sh->pop_vlan_action) {
 435                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 436                 sh->pop_vlan_action = NULL;
 437         }
 438         pthread_mutex_destroy(&sh->dv_mutex);
 439 #endif /* HAVE_MLX5DV_DR */
 440         if (sh->default_miss_action)
 441                 mlx5_glue->destroy_flow_action
 442                                 (sh->default_miss_action);
 443         if (sh->encaps_decaps) {
 444                 mlx5_hlist_destroy(sh->encaps_decaps);
 445                 sh->encaps_decaps = NULL;
 446         }
 447         if (sh->modify_cmds) {
 448                 mlx5_hlist_destroy(sh->modify_cmds);
 449                 sh->modify_cmds = NULL;
 450         }
 451         if (sh->tag_table) {
 452                 /* tags should be destroyed with flow before. */
 453                 mlx5_hlist_destroy(sh->tag_table);
 454                 sh->tag_table = NULL;
 455         }
 456         if (sh->tunnel_hub) {
 457                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 458                 sh->tunnel_hub = NULL;
 459         }
 460         mlx5_cache_list_destroy(&sh->port_id_action_list);
 461         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 462         mlx5_free_table_hash_list(priv);
 463 }
 464
 465 /**
 466  * Initialize shared data between primary and secondary process.
 467  *
 468  * A memzone is reserved by primary process and secondary processes attach to
 469  * the memzone.
 470  *
 471  * @return
 472  *   0 on success, a negative errno value otherwise and rte_errno is set.
 473  */
 474 static int
 475 mlx5_init_shared_data(void)
 476 {
 477         const struct rte_memzone *mz;
 478         int ret = 0;
 479
 480         rte_spinlock_lock(&mlx5_shared_data_lock);
 481         if (mlx5_shared_data == NULL) {
 482                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 483                         /* Allocate shared memory. */
 484                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 485                                                  sizeof(*mlx5_shared_data),
 486                                                  SOCKET_ID_ANY, 0);
 487                         if (mz == NULL) {
 488                                 DRV_LOG(ERR,
 489                                         "Cannot allocate mlx5 shared data");
 490                                 ret = -rte_errno;
 491                                 goto error;
 492                         }
 493                         mlx5_shared_data = mz->addr;
 494                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 495                         rte_spinlock_init(&mlx5_shared_data->lock);
 496                 } else {
 497                         /* Lookup allocated shared memory. */
 498                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 499                         if (mz == NULL) {
 500                                 DRV_LOG(ERR,
 501                                         "Cannot attach mlx5 shared data");
 502                                 ret = -rte_errno;
 503                                 goto error;
 504                         }
 505                         mlx5_shared_data = mz->addr;
 506                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 507                 }
 508         }
 509 error:
 510         rte_spinlock_unlock(&mlx5_shared_data_lock);
 511         return ret;
 512 }
 513
 514 /**
 515  * PMD global initialization.
 516  *
 517  * Independent from individual device, this function initializes global
 518  * per-PMD data structures distinguishing primary and secondary processes.
 519  * Hence, each initialization is called once per a process.
 520  *
 521  * @return
 522  *   0 on success, a negative errno value otherwise and rte_errno is set.
 523  */
 524 static int
 525 mlx5_init_once(void)
 526 {
 527         struct mlx5_shared_data *sd;
 528         struct mlx5_local_data *ld = &mlx5_local_data;
 529         int ret = 0;
 530
 531         if (mlx5_init_shared_data())
 532                 return -rte_errno;
 533         sd = mlx5_shared_data;
 534         MLX5_ASSERT(sd);
 535         rte_spinlock_lock(&sd->lock);
 536         switch (rte_eal_process_type()) {
 537         case RTE_PROC_PRIMARY:
 538                 if (sd->init_done)
 539                         break;
 540                 LIST_INIT(&sd->mem_event_cb_list);
 541                 rte_rwlock_init(&sd->mem_event_rwlock);
 542                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 543                                                 mlx5_mr_mem_event_cb, NULL);
 544                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 545                                            mlx5_mp_os_primary_handle);
 546                 if (ret)
 547                         goto out;
 548                 sd->init_done = true;
 549                 break;
 550         case RTE_PROC_SECONDARY:
 551                 if (ld->init_done)
 552                         break;
 553                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 554                                              mlx5_mp_os_secondary_handle);
 555                 if (ret)
 556                         goto out;
 557                 ++sd->secondary_cnt;
 558                 ld->init_done = true;
 559                 break;
 560         default:
 561                 break;
 562         }
 563 out:
 564         rte_spinlock_unlock(&sd->lock);
 565         return ret;
 566 }
 567
 568 /**
 569  * Create the Tx queue DevX/Verbs object.
 570  *
 571  * @param dev
 572  *   Pointer to Ethernet device.
 573  * @param idx
 574  *   Queue index in DPDK Tx queue array.
 575  *
 576  * @return
 577  *   0 on success, a negative errno value otherwise and rte_errno is set.
 578  */
 579 static int
 580 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 581 {
 582         struct mlx5_priv *priv = dev->data->dev_private;
 583         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 584         struct mlx5_txq_ctrl *txq_ctrl =
 585                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 586
 587         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 588                 return mlx5_txq_devx_obj_new(dev, idx);
 589 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 590         if (!priv->config.dv_esw_en)
 591                 return mlx5_txq_devx_obj_new(dev, idx);
 592 #endif
 593         return mlx5_txq_ibv_obj_new(dev, idx);
 594 }
 595
 596 /**
 597  * Release an Tx DevX/verbs queue object.
 598  *
 599  * @param txq_obj
 600  *   DevX/Verbs Tx queue object.
 601  */
 602 static void
 603 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 604 {
 605         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 606                 mlx5_txq_devx_obj_release(txq_obj);
 607                 return;
 608         }
 609 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 610         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 611                 mlx5_txq_devx_obj_release(txq_obj);
 612                 return;
 613         }
 614 #endif
 615         mlx5_txq_ibv_obj_release(txq_obj);
 616 }
 617
 618 /**
 619  * DV flow counter mode detect and config.
 620  *
 621  * @param dev
 622  *   Pointer to rte_eth_dev structure.
 623  *
 624  */
 625 static void
 626 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 627 {
 628 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 629         struct mlx5_priv *priv = dev->data->dev_private;
 630         struct mlx5_dev_ctx_shared *sh = priv->sh;
 631         bool fallback;
 632
 633 #ifndef HAVE_IBV_DEVX_ASYNC
 634         fallback = true;
 635 #else
 636         fallback = false;
 637         if (!priv->config.devx || !priv->config.dv_flow_en ||
 638             !priv->config.hca_attr.flow_counters_dump ||
 639             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 640             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 641                 fallback = true;
 642 #endif
 643         if (fallback)
 644                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 645                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 646                         priv->config.hca_attr.flow_counters_dump,
 647                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 648         /* Initialize fallback mode only on the port initializes sh. */
 649         if (sh->refcnt == 1)
 650                 sh->cmng.counter_fallback = fallback;
 651         else if (fallback != sh->cmng.counter_fallback)
 652                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 653                         "with others:%d.", PORT_ID(priv), fallback);
 654 #endif
 655 }
 656
 657 /**
 658  * Spawn an Ethernet device from Verbs information.
 659  *
 660  * @param dpdk_dev
 661  *   Backing DPDK device.
 662  * @param spawn
 663  *   Verbs device parameters (name, port, switch_info) to spawn.
 664  * @param config
 665  *   Device configuration parameters.
 666  *
 667  * @return
 668  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 669  *   is set. The following errors are defined:
 670  *
 671  *   EBUSY: device is not supposed to be spawned.
 672  *   EEXIST: device is already spawned
 673  */
 674 static struct rte_eth_dev *
 675 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 676                struct mlx5_dev_spawn_data *spawn,
 677                struct mlx5_dev_config *config)
 678 {
 679         const struct mlx5_switch_info *switch_info = &spawn->info;
 680         struct mlx5_dev_ctx_shared *sh = NULL;
 681         struct ibv_port_attr port_attr;
 682         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 683         struct rte_eth_dev *eth_dev = NULL;
 684         struct mlx5_priv *priv = NULL;
 685         int err = 0;
 686         unsigned int hw_padding = 0;
 687         unsigned int mps;
 688         unsigned int cqe_comp;
 689         unsigned int cqe_pad = 0;
 690         unsigned int tunnel_en = 0;
 691         unsigned int mpls_en = 0;
 692         unsigned int swp = 0;
 693         unsigned int mprq = 0;
 694         unsigned int mprq_min_stride_size_n = 0;
 695         unsigned int mprq_max_stride_size_n = 0;
 696         unsigned int mprq_min_stride_num_n = 0;
 697         unsigned int mprq_max_stride_num_n = 0;
 698         struct rte_ether_addr mac;
 699         char name[RTE_ETH_NAME_MAX_LEN];
 700         int own_domain_id = 0;
 701         uint16_t port_id;
 702         unsigned int i;
 703 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 704         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 705 #endif
 706
 707         /* Determine if this port representor is supposed to be spawned. */
 708         if (switch_info->representor && dpdk_dev->devargs) {
 709                 struct rte_eth_devargs eth_da;
 710
 711                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 712                 if (err) {
 713                         rte_errno = -err;
 714                         DRV_LOG(ERR, "failed to process device arguments: %s",
 715                                 strerror(rte_errno));
 716                         return NULL;
 717                 }
 718                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 719                         if (eth_da.representor_ports[i] ==
 720                             (uint16_t)switch_info->port_name)
 721                                 break;
 722                 if (i == eth_da.nb_representor_ports) {
 723                         rte_errno = EBUSY;
 724                         return NULL;
 725                 }
 726         }
 727         /* Build device name. */
 728         if (spawn->pf_bond <  0) {
 729                 /* Single device. */
 730                 if (!switch_info->representor)
 731                         strlcpy(name, dpdk_dev->name, sizeof(name));
 732                 else
 733                         snprintf(name, sizeof(name), "%s_representor_%u",
 734                                  dpdk_dev->name, switch_info->port_name);
 735         } else {
 736                 /* Bonding device. */
 737                 if (!switch_info->representor)
 738                         snprintf(name, sizeof(name), "%s_%s",
 739                                  dpdk_dev->name,
 740                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 741                 else
 742                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 743                                  dpdk_dev->name,
 744                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 745                                  switch_info->port_name);
 746         }
 747         /* check if the device is already spawned */
 748         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 749                 rte_errno = EEXIST;
 750                 return NULL;
 751         }
 752         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 753         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 754                 struct mlx5_mp_id mp_id;
 755
 756                 eth_dev = rte_eth_dev_attach_secondary(name);
 757                 if (eth_dev == NULL) {
 758                         DRV_LOG(ERR, "can not attach rte ethdev");
 759                         rte_errno = ENOMEM;
 760                         return NULL;
 761                 }
 762                 eth_dev->device = dpdk_dev;
 763                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 764                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 765                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 766                 err = mlx5_proc_priv_init(eth_dev);
 767                 if (err)
 768                         return NULL;
 769                 mp_id.port_id = eth_dev->data->port_id;
 770                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 771                 /* Receive command fd from primary process */
 772                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 773                 if (err < 0)
 774                         goto err_secondary;
 775                 /* Remap UAR for Tx queues. */
 776                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 777                 if (err)
 778                         goto err_secondary;
 779                 /*
 780                  * Ethdev pointer is still required as input since
 781                  * the primary device is not accessible from the
 782                  * secondary process.
 783                  */
 784                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 785                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 786                 return eth_dev;
 787 err_secondary:
 788                 mlx5_dev_close(eth_dev);
 789                 return NULL;
 790         }
 791         /*
 792          * Some parameters ("tx_db_nc" in particularly) are needed in
 793          * advance to create dv/verbs device context. We proceed the
 794          * devargs here to get ones, and later proceed devargs again
 795          * to override some hardware settings.
 796          */
 797         err = mlx5_args(config, dpdk_dev->devargs);
 798         if (err) {
 799                 err = rte_errno;
 800                 DRV_LOG(ERR, "failed to process device arguments: %s",
 801                         strerror(rte_errno));
 802                 goto error;
 803         }
 804         if (config->dv_miss_info) {
 805                 if (switch_info->master || switch_info->representor)
 806                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 807         }
 808         mlx5_malloc_mem_select(config->sys_mem_en);
 809         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 810         if (!sh)
 811                 return NULL;
 812         config->devx = sh->devx;
 813 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 814         config->dest_tir = 1;
 815 #endif
 816 #ifdef HAVE_IBV_MLX5_MOD_SWP
 817         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 818 #endif
 819         /*
 820          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 821          * as all ConnectX-5 devices.
 822          */
 823 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 824         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 825 #endif
 826 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 827         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 828 #endif
 829         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 830         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 831                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 832                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 833                         mps = MLX5_MPW_ENHANCED;
 834                 } else {
 835                         DRV_LOG(DEBUG, "MPW is supported");
 836                         mps = MLX5_MPW;
 837                 }
 838         } else {
 839                 DRV_LOG(DEBUG, "MPW isn't supported");
 840                 mps = MLX5_MPW_DISABLED;
 841         }
 842 #ifdef HAVE_IBV_MLX5_MOD_SWP
 843         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 844                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 845         DRV_LOG(DEBUG, "SWP support: %u", swp);
 846 #endif
 847         config->swp = !!swp;
 848 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 849         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 850                 struct mlx5dv_striding_rq_caps mprq_caps =
 851                         dv_attr.striding_rq_caps;
 852
 853                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 854                         mprq_caps.min_single_stride_log_num_of_bytes);
 855                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 856                         mprq_caps.max_single_stride_log_num_of_bytes);
 857                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 858                         mprq_caps.min_single_wqe_log_num_of_strides);
 859                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 860                         mprq_caps.max_single_wqe_log_num_of_strides);
 861                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 862                         mprq_caps.supported_qpts);
 863                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 864                 mprq = 1;
 865                 mprq_min_stride_size_n =
 866                         mprq_caps.min_single_stride_log_num_of_bytes;
 867                 mprq_max_stride_size_n =
 868                         mprq_caps.max_single_stride_log_num_of_bytes;
 869                 mprq_min_stride_num_n =
 870                         mprq_caps.min_single_wqe_log_num_of_strides;
 871                 mprq_max_stride_num_n =
 872                         mprq_caps.max_single_wqe_log_num_of_strides;
 873         }
 874 #endif
 875         if (RTE_CACHE_LINE_SIZE == 128 &&
 876             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 877                 cqe_comp = 0;
 878         else
 879                 cqe_comp = 1;
 880         config->cqe_comp = cqe_comp;
 881 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 882         /* Whether device supports 128B Rx CQE padding. */
 883         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 884                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 885 #endif
 886 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 887         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 888                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 889                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 890                              (dv_attr.tunnel_offloads_caps &
 891                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 892                              (dv_attr.tunnel_offloads_caps &
 893                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 894         }
 895         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 896                 tunnel_en ? "" : "not ");
 897 #else
 898         DRV_LOG(WARNING,
 899                 "tunnel offloading disabled due to old OFED/rdma-core version");
 900 #endif
 901         config->tunnel_en = tunnel_en;
 902 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 903         mpls_en = ((dv_attr.tunnel_offloads_caps &
 904                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 905                    (dv_attr.tunnel_offloads_caps &
 906                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 907         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 908                 mpls_en ? "" : "not ");
 909 #else
 910         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 911                 " old OFED/rdma-core version or firmware configuration");
 912 #endif
 913         config->mpls_en = mpls_en;
 914         /* Check port status. */
 915         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 916         if (err) {
 917                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 918                 goto error;
 919         }
 920         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 921                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 922                 err = EINVAL;
 923                 goto error;
 924         }
 925         if (port_attr.state != IBV_PORT_ACTIVE)
 926                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 927                         mlx5_glue->port_state_str(port_attr.state),
 928                         port_attr.state);
 929         /* Allocate private eth device data. */
 930         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 931                            sizeof(*priv),
 932                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 933         if (priv == NULL) {
 934                 DRV_LOG(ERR, "priv allocation failure");
 935                 err = ENOMEM;
 936                 goto error;
 937         }
 938         priv->sh = sh;
 939         priv->dev_port = spawn->phys_port;
 940         priv->pci_dev = spawn->pci_dev;
 941         priv->mtu = RTE_ETHER_MTU;
 942         priv->mp_id.port_id = port_id;
 943         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 944         /* Some internal functions rely on Netlink sockets, open them now. */
 945         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 946         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 947         priv->representor = !!switch_info->representor;
 948         priv->master = !!switch_info->master;
 949         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 950         priv->vport_meta_tag = 0;
 951         priv->vport_meta_mask = 0;
 952         priv->pf_bond = spawn->pf_bond;
 953 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 954         /*
 955          * The DevX port query API is implemented. E-Switch may use
 956          * either vport or reg_c[0] metadata register to match on
 957          * vport index. The engaged part of metadata register is
 958          * defined by mask.
 959          */
 960         if (switch_info->representor || switch_info->master) {
 961                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 962                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 963                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 964                                                  &devx_port);
 965                 if (err) {
 966                         DRV_LOG(WARNING,
 967                                 "can't query devx port %d on device %s",
 968                                 spawn->phys_port,
 969                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 970                         devx_port.comp_mask = 0;
 971                 }
 972         }
 973         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 974                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 975                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 976                 if (!priv->vport_meta_mask) {
 977                         DRV_LOG(ERR, "vport zero mask for port %d"
 978                                      " on bonding device %s",
 979                                      spawn->phys_port,
 980                                      mlx5_os_get_dev_device_name
 981                                                         (spawn->phys_dev));
 982                         err = ENOTSUP;
 983                         goto error;
 984                 }
 985                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 986                         DRV_LOG(ERR, "invalid vport tag for port %d"
 987                                      " on bonding device %s",
 988                                      spawn->phys_port,
 989                                      mlx5_os_get_dev_device_name
 990                                                         (spawn->phys_dev));
 991                         err = ENOTSUP;
 992                         goto error;
 993                 }
 994         }
 995         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 996                 priv->vport_id = devx_port.vport_num;
 997         } else if (spawn->pf_bond >= 0) {
 998                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 999                              " on bonding device %s",
1000                              spawn->phys_port,
1001                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1002                 err = ENOTSUP;
1003                 goto error;
1004         } else {
1005                 /* Suppose vport index in compatible way. */
1006                 priv->vport_id = switch_info->representor ?
1007                                  switch_info->port_name + 1 : -1;
1008         }
1009 #else
1010         /*
1011          * Kernel/rdma_core support single E-Switch per PF configurations
1012          * only and vport_id field contains the vport index for
1013          * associated VF, which is deduced from representor port name.
1014          * For example, let's have the IB device port 10, it has
1015          * attached network device eth0, which has port name attribute
1016          * pf0vf2, we can deduce the VF number as 2, and set vport index
1017          * as 3 (2+1). This assigning schema should be changed if the
1018          * multiple E-Switch instances per PF configurations or/and PCI
1019          * subfunctions are added.
1020          */
1021         priv->vport_id = switch_info->representor ?
1022                          switch_info->port_name + 1 : -1;
1023 #endif
1024         /* representor_id field keeps the unmodified VF index. */
1025         priv->representor_id = switch_info->representor ?
1026                                switch_info->port_name : -1;
1027         /*
1028          * Look for sibling devices in order to reuse their switch domain
1029          * if any, otherwise allocate one.
1030          */
1031         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1032                 const struct mlx5_priv *opriv =
1033                         rte_eth_devices[port_id].data->dev_private;
1034
1035                 if (!opriv ||
1036                     opriv->sh != priv->sh ||
1037                         opriv->domain_id ==
1038                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1039                         continue;
1040                 priv->domain_id = opriv->domain_id;
1041                 break;
1042         }
1043         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1044                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1045                 if (err) {
1046                         err = rte_errno;
1047                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1048                                 strerror(rte_errno));
1049                         goto error;
1050                 }
1051                 own_domain_id = 1;
1052         }
1053         /* Override some values set by hardware configuration. */
1054         mlx5_args(config, dpdk_dev->devargs);
1055         err = mlx5_dev_check_sibling_config(priv, config);
1056         if (err)
1057                 goto error;
1058         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1059                             IBV_DEVICE_RAW_IP_CSUM);
1060         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1061                 (config->hw_csum ? "" : "not "));
1062 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1063         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1064         DRV_LOG(DEBUG, "counters are not supported");
1065 #endif
1066 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1067         if (config->dv_flow_en) {
1068                 DRV_LOG(WARNING, "DV flow is not supported");
1069                 config->dv_flow_en = 0;
1070         }
1071 #endif
1072         config->ind_table_max_size =
1073                 sh->device_attr.max_rwq_indirection_table_size;
1074         /*
1075          * Remove this check once DPDK supports larger/variable
1076          * indirection tables.
1077          */
1078         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1079                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1080         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1081                 config->ind_table_max_size);
1082         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1083                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1084         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1085                 (config->hw_vlan_strip ? "" : "not "));
1086         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1087                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1088 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1089         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1090 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1091         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1092                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1093 #endif
1094         if (config->hw_padding && !hw_padding) {
1095                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1096                 config->hw_padding = 0;
1097         } else if (config->hw_padding) {
1098                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1099         }
1100         config->tso = (sh->device_attr.max_tso > 0 &&
1101                       (sh->device_attr.tso_supported_qpts &
1102                        (1 << IBV_QPT_RAW_PACKET)));
1103         if (config->tso)
1104                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1105         /*
1106          * MPW is disabled by default, while the Enhanced MPW is enabled
1107          * by default.
1108          */
1109         if (config->mps == MLX5_ARG_UNSET)
1110                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1111                                                           MLX5_MPW_DISABLED;
1112         else
1113                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1114         DRV_LOG(INFO, "%sMPS is %s",
1115                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1116                 config->mps == MLX5_MPW ? "legacy " : "",
1117                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1118         if (config->cqe_comp && !cqe_comp) {
1119                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1120                 config->cqe_comp = 0;
1121         }
1122         if (config->cqe_pad && !cqe_pad) {
1123                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1124                 config->cqe_pad = 0;
1125         } else if (config->cqe_pad) {
1126                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1127         }
1128         if (config->devx) {
1129                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1130                 if (err) {
1131                         err = -err;
1132                         goto error;
1133                 }
1134                 /* Check relax ordering support. */
1135                 if (config->hca_attr.relaxed_ordering_write &&
1136                     config->hca_attr.relaxed_ordering_read  &&
1137                     !haswell_broadwell_cpu)
1138                         sh->cmng.relaxed_ordering = 1;
1139                 /* Check for LRO support. */
1140                 if (config->dest_tir && config->hca_attr.lro_cap &&
1141                     config->dv_flow_en) {
1142                         /* TBD check tunnel lro caps. */
1143                         config->lro.supported = config->hca_attr.lro_cap;
1144                         DRV_LOG(DEBUG, "Device supports LRO");
1145                         /*
1146                          * If LRO timeout is not configured by application,
1147                          * use the minimal supported value.
1148                          */
1149                         if (!config->lro.timeout)
1150                                 config->lro.timeout =
1151                                 config->hca_attr.lro_timer_supported_periods[0];
1152                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1153                                 config->lro.timeout);
1154                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1155                                 "required for coalescing is %d bytes",
1156                                 config->hca_attr.lro_min_mss_size);
1157                 }
1158 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1159                 if (config->hca_attr.qos.sup &&
1160                     config->hca_attr.qos.srtcm_sup &&
1161                     config->dv_flow_en) {
1162                         uint8_t reg_c_mask =
1163                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1164                         /*
1165                          * Meter needs two REG_C's for color match and pre-sfx
1166                          * flow match. Here get the REG_C for color match.
1167                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1168                          */
1169                         reg_c_mask &= 0xfc;
1170                         if (__builtin_popcount(reg_c_mask) < 1) {
1171                                 priv->mtr_en = 0;
1172                                 DRV_LOG(WARNING, "No available register for"
1173                                         " meter.");
1174                         } else {
1175                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1176                                                       REG_C_0;
1177                                 priv->mtr_en = 1;
1178                                 priv->mtr_reg_share =
1179                                       config->hca_attr.qos.flow_meter_reg_share;
1180                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1181                                         priv->mtr_color_reg);
1182                         }
1183                 }
1184 #endif
1185 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1186                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1187                     config->dv_flow_en) {
1188                         priv->sampler_en = 1;
1189                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1190                 } else {
1191                         priv->sampler_en = 0;
1192                         if (!config->hca_attr.log_max_ft_sampler_num)
1193                                 DRV_LOG(WARNING, "No available register for"
1194                                                 " Sampler.");
1195                         else
1196                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1197                 }
1198 #endif
1199         }
1200         if (config->tx_pp) {
1201                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1202                         config->hca_attr.dev_freq_khz);
1203                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1204                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1205                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1206                         config->hca_attr.cross_channel ? "" : "not ");
1207                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1208                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1209                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1210                         config->hca_attr.non_wire_sq ? "" : "not ");
1211                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1212                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1213                         config->hca_attr.log_max_static_sq_wq);
1214                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1215                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1216                 if (!config->devx) {
1217                         DRV_LOG(ERR, "DevX is required for packet pacing");
1218                         err = ENODEV;
1219                         goto error;
1220                 }
1221                 if (!config->hca_attr.qos.packet_pacing) {
1222                         DRV_LOG(ERR, "Packet pacing is not supported");
1223                         err = ENODEV;
1224                         goto error;
1225                 }
1226                 if (!config->hca_attr.cross_channel) {
1227                         DRV_LOG(ERR, "Cross channel operations are"
1228                                      " required for packet pacing");
1229                         err = ENODEV;
1230                         goto error;
1231                 }
1232                 if (!config->hca_attr.wqe_index_ignore) {
1233                         DRV_LOG(ERR, "WQE index ignore feature is"
1234                                      " required for packet pacing");
1235                         err = ENODEV;
1236                         goto error;
1237                 }
1238                 if (!config->hca_attr.non_wire_sq) {
1239                         DRV_LOG(ERR, "Non-wire SQ feature is"
1240                                      " required for packet pacing");
1241                         err = ENODEV;
1242                         goto error;
1243                 }
1244                 if (!config->hca_attr.log_max_static_sq_wq) {
1245                         DRV_LOG(ERR, "Static WQE SQ feature is"
1246                                      " required for packet pacing");
1247                         err = ENODEV;
1248                         goto error;
1249                 }
1250                 if (!config->hca_attr.qos.wqe_rate_pp) {
1251                         DRV_LOG(ERR, "WQE rate mode is required"
1252                                      " for packet pacing");
1253                         err = ENODEV;
1254                         goto error;
1255                 }
1256 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1257                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1258                              " can't create queues for packet pacing");
1259                 err = ENODEV;
1260                 goto error;
1261 #endif
1262         }
1263         if (config->devx) {
1264                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1265
1266                 err = config->hca_attr.access_register_user ?
1267                         mlx5_devx_cmd_register_read
1268                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1269                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1270                 if (!err) {
1271                         uint32_t ts_mode;
1272
1273                         /* MTUTC register is read successfully. */
1274                         ts_mode = MLX5_GET(register_mtutc, reg,
1275                                            time_stamp_mode);
1276                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1277                                 config->rt_timestamp = 1;
1278                 } else {
1279                         /* Kernel does not support register reading. */
1280                         if (config->hca_attr.dev_freq_khz ==
1281                                                  (NS_PER_S / MS_PER_S))
1282                                 config->rt_timestamp = 1;
1283                 }
1284         }
1285         /*
1286          * If HW has bug working with tunnel packet decapsulation and
1287          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1288          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1289          */
1290         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1291                 config->hw_fcs_strip = 0;
1292         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1293                 (config->hw_fcs_strip ? "" : "not "));
1294         if (config->mprq.enabled && mprq) {
1295                 if (config->mprq.stride_num_n &&
1296                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1297                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1298                         config->mprq.stride_num_n =
1299                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1300                                                 mprq_min_stride_num_n),
1301                                         mprq_max_stride_num_n);
1302                         DRV_LOG(WARNING,
1303                                 "the number of strides"
1304                                 " for Multi-Packet RQ is out of range,"
1305                                 " setting default value (%u)",
1306                                 1 << config->mprq.stride_num_n);
1307                 }
1308                 if (config->mprq.stride_size_n &&
1309                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1310                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1311                         config->mprq.stride_size_n =
1312                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1313                                                 mprq_min_stride_size_n),
1314                                         mprq_max_stride_size_n);
1315                         DRV_LOG(WARNING,
1316                                 "the size of a stride"
1317                                 " for Multi-Packet RQ is out of range,"
1318                                 " setting default value (%u)",
1319                                 1 << config->mprq.stride_size_n);
1320                 }
1321                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1322                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1323         } else if (config->mprq.enabled && !mprq) {
1324                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1325                 config->mprq.enabled = 0;
1326         }
1327         if (config->max_dump_files_num == 0)
1328                 config->max_dump_files_num = 128;
1329         eth_dev = rte_eth_dev_allocate(name);
1330         if (eth_dev == NULL) {
1331                 DRV_LOG(ERR, "can not allocate rte ethdev");
1332                 err = ENOMEM;
1333                 goto error;
1334         }
1335         if (priv->representor) {
1336                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1337                 eth_dev->data->representor_id = priv->representor_id;
1338         }
1339         /*
1340          * Store associated network device interface index. This index
1341          * is permanent throughout the lifetime of device. So, we may store
1342          * the ifindex here and use the cached value further.
1343          */
1344         MLX5_ASSERT(spawn->ifindex);
1345         priv->if_index = spawn->ifindex;
1346         if (priv->pf_bond >= 0 && priv->master) {
1347                 /* Get bond interface info */
1348                 err = mlx5_sysfs_bond_info(priv->if_index,
1349                                      &priv->bond_ifindex,
1350                                      priv->bond_name);
1351                 if (err)
1352                         DRV_LOG(ERR, "unable to get bond info: %s",
1353                                 strerror(rte_errno));
1354                 else
1355                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1356                                 priv->if_index, priv->bond_ifindex,
1357                                 priv->bond_name);
1358         }
1359         eth_dev->data->dev_private = priv;
1360         priv->dev_data = eth_dev->data;
1361         eth_dev->data->mac_addrs = priv->mac;
1362         eth_dev->device = dpdk_dev;
1363         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1364         /* Configure the first MAC address by default. */
1365         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1366                 DRV_LOG(ERR,
1367                         "port %u cannot get MAC address, is mlx5_en"
1368                         " loaded? (errno: %s)",
1369                         eth_dev->data->port_id, strerror(rte_errno));
1370                 err = ENODEV;
1371                 goto error;
1372         }
1373         DRV_LOG(INFO,
1374                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1375                 eth_dev->data->port_id,
1376                 mac.addr_bytes[0], mac.addr_bytes[1],
1377                 mac.addr_bytes[2], mac.addr_bytes[3],
1378                 mac.addr_bytes[4], mac.addr_bytes[5]);
1379 #ifdef RTE_LIBRTE_MLX5_DEBUG
1380         {
1381                 char ifname[IF_NAMESIZE];
1382
1383                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1384                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1385                                 eth_dev->data->port_id, ifname);
1386                 else
1387                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1388                                 eth_dev->data->port_id);
1389         }
1390 #endif
1391         /* Get actual MTU if possible. */
1392         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1393         if (err) {
1394                 err = rte_errno;
1395                 goto error;
1396         }
1397         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1398                 priv->mtu);
1399         /* Initialize burst functions to prevent crashes before link-up. */
1400         eth_dev->rx_pkt_burst = removed_rx_burst;
1401         eth_dev->tx_pkt_burst = removed_tx_burst;
1402         eth_dev->dev_ops = &mlx5_os_dev_ops;
1403         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1404         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1405         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1406         /* Register MAC address. */
1407         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1408         if (config->vf && config->vf_nl_en)
1409                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1410                                       mlx5_ifindex(eth_dev),
1411                                       eth_dev->data->mac_addrs,
1412                                       MLX5_MAX_MAC_ADDRESSES);
1413         priv->flows = 0;
1414         priv->ctrl_flows = 0;
1415         rte_spinlock_init(&priv->flow_list_lock);
1416         TAILQ_INIT(&priv->flow_meters);
1417         TAILQ_INIT(&priv->flow_meter_profiles);
1418         /* Hint libmlx5 to use PMD allocator for data plane resources */
1419         mlx5_glue->dv_set_context_attr(sh->ctx,
1420                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1421                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1422                                 .alloc = &mlx5_alloc_verbs_buf,
1423                                 .free = &mlx5_free_verbs_buf,
1424                                 .data = priv,
1425                         }));
1426         /* Bring Ethernet device up. */
1427         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1428                 eth_dev->data->port_id);
1429         mlx5_set_link_up(eth_dev);
1430         /*
1431          * Even though the interrupt handler is not installed yet,
1432          * interrupts will still trigger on the async_fd from
1433          * Verbs context returned by ibv_open_device().
1434          */
1435         mlx5_link_update(eth_dev, 0);
1436 #ifdef HAVE_MLX5DV_DR_ESWITCH
1437         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1438               (switch_info->representor || switch_info->master)))
1439                 config->dv_esw_en = 0;
1440 #else
1441         config->dv_esw_en = 0;
1442 #endif
1443         /* Detect minimal data bytes to inline. */
1444         mlx5_set_min_inline(spawn, config);
1445         /* Store device configuration on private structure. */
1446         priv->config = *config;
1447         /* Create context for virtual machine VLAN workaround. */
1448         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1449         if (config->dv_flow_en) {
1450                 err = mlx5_alloc_shared_dr(priv);
1451                 if (err)
1452                         goto error;
1453         }
1454         if (config->devx && config->dv_flow_en && config->dest_tir) {
1455                 priv->obj_ops = devx_obj_ops;
1456                 priv->obj_ops.drop_action_create =
1457                                                 ibv_obj_ops.drop_action_create;
1458                 priv->obj_ops.drop_action_destroy =
1459                                                 ibv_obj_ops.drop_action_destroy;
1460 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1461                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1462 #else
1463                 if (config->dv_esw_en)
1464                         priv->obj_ops.txq_obj_modify =
1465                                                 ibv_obj_ops.txq_obj_modify;
1466 #endif
1467                 /* Use specific wrappers for Tx object. */
1468                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1469                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1470
1471         } else {
1472                 priv->obj_ops = ibv_obj_ops;
1473         }
1474         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1475         if (!priv->drop_queue.hrxq)
1476                 goto error;
1477         /* Supported Verbs flow priority number detection. */
1478         err = mlx5_flow_discover_priorities(eth_dev);
1479         if (err < 0) {
1480                 err = -err;
1481                 goto error;
1482         }
1483         priv->config.flow_prio = err;
1484         if (!priv->config.dv_esw_en &&
1485             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1486                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1487                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1488                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1489         }
1490         mlx5_set_metadata_mask(eth_dev);
1491         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1492             !priv->sh->dv_regc0_mask) {
1493                 DRV_LOG(ERR, "metadata mode %u is not supported "
1494                              "(no metadata reg_c[0] is available)",
1495                              priv->config.dv_xmeta_en);
1496                         err = ENOTSUP;
1497                         goto error;
1498         }
1499         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1500                              mlx5_hrxq_create_cb,
1501                              mlx5_hrxq_match_cb,
1502                              mlx5_hrxq_remove_cb);
1503         /* Query availability of metadata reg_c's. */
1504         err = mlx5_flow_discover_mreg_c(eth_dev);
1505         if (err < 0) {
1506                 err = -err;
1507                 goto error;
1508         }
1509         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1510                 DRV_LOG(DEBUG,
1511                         "port %u extensive metadata register is not supported",
1512                         eth_dev->data->port_id);
1513                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1514                         DRV_LOG(ERR, "metadata mode %u is not supported "
1515                                      "(no metadata registers available)",
1516                                      priv->config.dv_xmeta_en);
1517                         err = ENOTSUP;
1518                         goto error;
1519                 }
1520         }
1521         if (priv->config.dv_flow_en &&
1522             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1523             mlx5_flow_ext_mreg_supported(eth_dev) &&
1524             priv->sh->dv_regc0_mask) {
1525                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1526                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1527                                                       0, 0,
1528                                                       flow_dv_mreg_create_cb,
1529                                                       NULL,
1530                                                       flow_dv_mreg_remove_cb);
1531                 if (!priv->mreg_cp_tbl) {
1532                         err = ENOMEM;
1533                         goto error;
1534                 }
1535                 priv->mreg_cp_tbl->ctx = eth_dev;
1536         }
1537         mlx5_flow_counter_mode_config(eth_dev);
1538         return eth_dev;
1539 error:
1540         if (priv) {
1541                 if (priv->mreg_cp_tbl)
1542                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1543                 if (priv->sh)
1544                         mlx5_os_free_shared_dr(priv);
1545                 if (priv->nl_socket_route >= 0)
1546                         close(priv->nl_socket_route);
1547                 if (priv->nl_socket_rdma >= 0)
1548                         close(priv->nl_socket_rdma);
1549                 if (priv->vmwa_context)
1550                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1551                 if (eth_dev && priv->drop_queue.hrxq)
1552                         mlx5_drop_action_destroy(eth_dev);
1553                 if (own_domain_id)
1554                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1555                 mlx5_cache_list_destroy(&priv->hrxqs);
1556                 mlx5_free(priv);
1557                 if (eth_dev != NULL)
1558                         eth_dev->data->dev_private = NULL;
1559         }
1560         if (eth_dev != NULL) {
1561                 /* mac_addrs must not be freed alone because part of
1562                  * dev_private
1563                  **/
1564                 eth_dev->data->mac_addrs = NULL;
1565                 rte_eth_dev_release_port(eth_dev);
1566         }
1567         if (sh)
1568                 mlx5_free_shared_dev_ctx(sh);
1569         MLX5_ASSERT(err > 0);
1570         rte_errno = err;
1571         return NULL;
1572 }
1573
1574 /**
1575  * Comparison callback to sort device data.
1576  *
1577  * This is meant to be used with qsort().
1578  *
1579  * @param a[in]
1580  *   Pointer to pointer to first data object.
1581  * @param b[in]
1582  *   Pointer to pointer to second data object.
1583  *
1584  * @return
1585  *   0 if both objects are equal, less than 0 if the first argument is less
1586  *   than the second, greater than 0 otherwise.
1587  */
1588 static int
1589 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1590 {
1591         const struct mlx5_switch_info *si_a =
1592                 &((const struct mlx5_dev_spawn_data *)a)->info;
1593         const struct mlx5_switch_info *si_b =
1594                 &((const struct mlx5_dev_spawn_data *)b)->info;
1595         int ret;
1596
1597         /* Master device first. */
1598         ret = si_b->master - si_a->master;
1599         if (ret)
1600                 return ret;
1601         /* Then representor devices. */
1602         ret = si_b->representor - si_a->representor;
1603         if (ret)
1604                 return ret;
1605         /* Unidentified devices come last in no specific order. */
1606         if (!si_a->representor)
1607                 return 0;
1608         /* Order representors by name. */
1609         return si_a->port_name - si_b->port_name;
1610 }
1611
1612 /**
1613  * Match PCI information for possible slaves of bonding device.
1614  *
1615  * @param[in] ibv_dev
1616  *   Pointer to Infiniband device structure.
1617  * @param[in] pci_dev
1618  *   Pointer to PCI device structure to match PCI address.
1619  * @param[in] nl_rdma
1620  *   Netlink RDMA group socket handle.
1621  *
1622  * @return
1623  *   negative value if no bonding device found, otherwise
1624  *   positive index of slave PF in bonding.
1625  */
1626 static int
1627 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1628                            const struct rte_pci_device *pci_dev,
1629                            int nl_rdma)
1630 {
1631         char ifname[IF_NAMESIZE + 1];
1632         unsigned int ifindex;
1633         unsigned int np, i;
1634         FILE *file = NULL;
1635         int pf = -1;
1636
1637         /*
1638          * Try to get master device name. If something goes
1639          * wrong suppose the lack of kernel support and no
1640          * bonding devices.
1641          */
1642         if (nl_rdma < 0)
1643                 return -1;
1644         if (!strstr(ibv_dev->name, "bond"))
1645                 return -1;
1646         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1647         if (!np)
1648                 return -1;
1649         /*
1650          * The Master device might not be on the predefined
1651          * port (not on port index 1, it is not garanted),
1652          * we have to scan all Infiniband device port and
1653          * find master.
1654          */
1655         for (i = 1; i <= np; ++i) {
1656                 /* Check whether Infiniband port is populated. */
1657                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1658                 if (!ifindex)
1659                         continue;
1660                 if (!if_indextoname(ifindex, ifname))
1661                         continue;
1662                 /* Try to read bonding slave names from sysfs. */
1663                 MKSTR(slaves,
1664                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1665                 file = fopen(slaves, "r");
1666                 if (file)
1667                         break;
1668         }
1669         if (!file)
1670                 return -1;
1671         /* Use safe format to check maximal buffer length. */
1672         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1673         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1674                 char tmp_str[IF_NAMESIZE + 32];
1675                 struct rte_pci_addr pci_addr;
1676                 struct mlx5_switch_info info;
1677
1678                 /* Process slave interface names in the loop. */
1679                 snprintf(tmp_str, sizeof(tmp_str),
1680                          "/sys/class/net/%s", ifname);
1681                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1682                         DRV_LOG(WARNING, "can not get PCI address"
1683                                          " for netdev \"%s\"", ifname);
1684                         continue;
1685                 }
1686                 if (pci_dev->addr.domain != pci_addr.domain ||
1687                     pci_dev->addr.bus != pci_addr.bus ||
1688                     pci_dev->addr.devid != pci_addr.devid ||
1689                     pci_dev->addr.function != pci_addr.function)
1690                         continue;
1691                 /* Slave interface PCI address match found. */
1692                 fclose(file);
1693                 snprintf(tmp_str, sizeof(tmp_str),
1694                          "/sys/class/net/%s/phys_port_name", ifname);
1695                 file = fopen(tmp_str, "rb");
1696                 if (!file)
1697                         break;
1698                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1699                 if (fscanf(file, "%32s", tmp_str) == 1)
1700                         mlx5_translate_port_name(tmp_str, &info);
1701                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1702                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1703                         pf = info.port_name;
1704                 break;
1705         }
1706         if (file)
1707                 fclose(file);
1708         return pf;
1709 }
1710
1711 /**
1712  * DPDK callback to register a PCI device.
1713  *
1714  * This function spawns Ethernet devices out of a given PCI device.
1715  *
1716  * @param[in] pci_drv
1717  *   PCI driver structure (mlx5_driver).
1718  * @param[in] pci_dev
1719  *   PCI device information.
1720  *
1721  * @return
1722  *   0 on success, a negative errno value otherwise and rte_errno is set.
1723  */
1724 int
1725 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1726                   struct rte_pci_device *pci_dev)
1727 {
1728         struct ibv_device **ibv_list;
1729         /*
1730          * Number of found IB Devices matching with requested PCI BDF.
1731          * nd != 1 means there are multiple IB devices over the same
1732          * PCI device and we have representors and master.
1733          */
1734         unsigned int nd = 0;
1735         /*
1736          * Number of found IB device Ports. nd = 1 and np = 1..n means
1737          * we have the single multiport IB device, and there may be
1738          * representors attached to some of found ports.
1739          */
1740         unsigned int np = 0;
1741         /*
1742          * Number of DPDK ethernet devices to Spawn - either over
1743          * multiple IB devices or multiple ports of single IB device.
1744          * Actually this is the number of iterations to spawn.
1745          */
1746         unsigned int ns = 0;
1747         /*
1748          * Bonding device
1749          *   < 0 - no bonding device (single one)
1750          *  >= 0 - bonding device (value is slave PF index)
1751          */
1752         int bd = -1;
1753         struct mlx5_dev_spawn_data *list = NULL;
1754         struct mlx5_dev_config dev_config;
1755         unsigned int dev_config_vf;
1756         int ret;
1757
1758         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1759                 mlx5_pmd_socket_init();
1760         ret = mlx5_init_once();
1761         if (ret) {
1762                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1763                         strerror(rte_errno));
1764                 return -rte_errno;
1765         }
1766         errno = 0;
1767         ibv_list = mlx5_glue->get_device_list(&ret);
1768         if (!ibv_list) {
1769                 rte_errno = errno ? errno : ENOSYS;
1770                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1771                 return -rte_errno;
1772         }
1773         /*
1774          * First scan the list of all Infiniband devices to find
1775          * matching ones, gathering into the list.
1776          */
1777         struct ibv_device *ibv_match[ret + 1];
1778         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1779         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1780         unsigned int i;
1781
1782         while (ret-- > 0) {
1783                 struct rte_pci_addr pci_addr;
1784
1785                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1786                 bd = mlx5_device_bond_pci_match
1787                                 (ibv_list[ret], pci_dev, nl_rdma);
1788                 if (bd >= 0) {
1789                         /*
1790                          * Bonding device detected. Only one match is allowed,
1791                          * the bonding is supported over multi-port IB device,
1792                          * there should be no matches on representor PCI
1793                          * functions or non VF LAG bonding devices with
1794                          * specified address.
1795                          */
1796                         if (nd) {
1797                                 DRV_LOG(ERR,
1798                                         "multiple PCI match on bonding device"
1799                                         "\"%s\" found", ibv_list[ret]->name);
1800                                 rte_errno = ENOENT;
1801                                 ret = -rte_errno;
1802                                 goto exit;
1803                         }
1804                         DRV_LOG(INFO, "PCI information matches for"
1805                                       " slave %d bonding device \"%s\"",
1806                                       bd, ibv_list[ret]->name);
1807                         ibv_match[nd++] = ibv_list[ret];
1808                         break;
1809                 }
1810                 if (mlx5_dev_to_pci_addr
1811                         (ibv_list[ret]->ibdev_path, &pci_addr))
1812                         continue;
1813                 if (pci_dev->addr.domain != pci_addr.domain ||
1814                     pci_dev->addr.bus != pci_addr.bus ||
1815                     pci_dev->addr.devid != pci_addr.devid ||
1816                     pci_dev->addr.function != pci_addr.function)
1817                         continue;
1818                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1819                         ibv_list[ret]->name);
1820                 ibv_match[nd++] = ibv_list[ret];
1821         }
1822         ibv_match[nd] = NULL;
1823         if (!nd) {
1824                 /* No device matches, just complain and bail out. */
1825                 DRV_LOG(WARNING,
1826                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1827                         " are kernel drivers loaded?",
1828                         pci_dev->addr.domain, pci_dev->addr.bus,
1829                         pci_dev->addr.devid, pci_dev->addr.function);
1830                 rte_errno = ENOENT;
1831                 ret = -rte_errno;
1832                 goto exit;
1833         }
1834         if (nd == 1) {
1835                 /*
1836                  * Found single matching device may have multiple ports.
1837                  * Each port may be representor, we have to check the port
1838                  * number and check the representors existence.
1839                  */
1840                 if (nl_rdma >= 0)
1841                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1842                 if (!np)
1843                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1844                                          " ports number", ibv_match[0]->name);
1845                 if (bd >= 0 && !np) {
1846                         DRV_LOG(ERR, "can not get ports"
1847                                      " for bonding device");
1848                         rte_errno = ENOENT;
1849                         ret = -rte_errno;
1850                         goto exit;
1851                 }
1852         }
1853 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1854         if (bd >= 0) {
1855                 /*
1856                  * This may happen if there is VF LAG kernel support and
1857                  * application is compiled with older rdma_core library.
1858                  */
1859                 DRV_LOG(ERR,
1860                         "No kernel/verbs support for VF LAG bonding found.");
1861                 rte_errno = ENOTSUP;
1862                 ret = -rte_errno;
1863                 goto exit;
1864         }
1865 #endif
1866         /*
1867          * Now we can determine the maximal
1868          * amount of devices to be spawned.
1869          */
1870         list = mlx5_malloc(MLX5_MEM_ZERO,
1871                            sizeof(struct mlx5_dev_spawn_data) *
1872                            (np ? np : nd),
1873                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1874         if (!list) {
1875                 DRV_LOG(ERR, "spawn data array allocation failure");
1876                 rte_errno = ENOMEM;
1877                 ret = -rte_errno;
1878                 goto exit;
1879         }
1880         if (bd >= 0 || np > 1) {
1881                 /*
1882                  * Single IB device with multiple ports found,
1883                  * it may be E-Switch master device and representors.
1884                  * We have to perform identification through the ports.
1885                  */
1886                 MLX5_ASSERT(nl_rdma >= 0);
1887                 MLX5_ASSERT(ns == 0);
1888                 MLX5_ASSERT(nd == 1);
1889                 MLX5_ASSERT(np);
1890                 for (i = 1; i <= np; ++i) {
1891                         list[ns].max_port = np;
1892                         list[ns].phys_port = i;
1893                         list[ns].phys_dev = ibv_match[0];
1894                         list[ns].eth_dev = NULL;
1895                         list[ns].pci_dev = pci_dev;
1896                         list[ns].pf_bond = bd;
1897                         list[ns].ifindex = mlx5_nl_ifindex
1898                                 (nl_rdma,
1899                                 mlx5_os_get_dev_device_name
1900                                                 (list[ns].phys_dev), i);
1901                         if (!list[ns].ifindex) {
1902                                 /*
1903                                  * No network interface index found for the
1904                                  * specified port, it means there is no
1905                                  * representor on this port. It's OK,
1906                                  * there can be disabled ports, for example
1907                                  * if sriov_numvfs < sriov_totalvfs.
1908                                  */
1909                                 continue;
1910                         }
1911                         ret = -1;
1912                         if (nl_route >= 0)
1913                                 ret = mlx5_nl_switch_info
1914                                                (nl_route,
1915                                                 list[ns].ifindex,
1916                                                 &list[ns].info);
1917                         if (ret || (!list[ns].info.representor &&
1918                                     !list[ns].info.master)) {
1919                                 /*
1920                                  * We failed to recognize representors with
1921                                  * Netlink, let's try to perform the task
1922                                  * with sysfs.
1923                                  */
1924                                 ret =  mlx5_sysfs_switch_info
1925                                                 (list[ns].ifindex,
1926                                                  &list[ns].info);
1927                         }
1928                         if (!ret && bd >= 0) {
1929                                 switch (list[ns].info.name_type) {
1930                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1931                                         if (list[ns].info.port_name == bd)
1932                                                 ns++;
1933                                         break;
1934                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1935                                         /* Fallthrough */
1936                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1937                                         if (list[ns].info.pf_num == bd)
1938                                                 ns++;
1939                                         break;
1940                                 default:
1941                                         break;
1942                                 }
1943                                 continue;
1944                         }
1945                         if (!ret && (list[ns].info.representor ^
1946                                      list[ns].info.master))
1947                                 ns++;
1948                 }
1949                 if (!ns) {
1950                         DRV_LOG(ERR,
1951                                 "unable to recognize master/representors"
1952                                 " on the IB device with multiple ports");
1953                         rte_errno = ENOENT;
1954                         ret = -rte_errno;
1955                         goto exit;
1956                 }
1957         } else {
1958                 /*
1959                  * The existence of several matching entries (nd > 1) means
1960                  * port representors have been instantiated. No existing Verbs
1961                  * call nor sysfs entries can tell them apart, this can only
1962                  * be done through Netlink calls assuming kernel drivers are
1963                  * recent enough to support them.
1964                  *
1965                  * In the event of identification failure through Netlink,
1966                  * try again through sysfs, then:
1967                  *
1968                  * 1. A single IB device matches (nd == 1) with single
1969                  *    port (np=0/1) and is not a representor, assume
1970                  *    no switch support.
1971                  *
1972                  * 2. Otherwise no safe assumptions can be made;
1973                  *    complain louder and bail out.
1974                  */
1975                 for (i = 0; i != nd; ++i) {
1976                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1977                         list[ns].max_port = 1;
1978                         list[ns].phys_port = 1;
1979                         list[ns].phys_dev = ibv_match[i];
1980                         list[ns].eth_dev = NULL;
1981                         list[ns].pci_dev = pci_dev;
1982                         list[ns].pf_bond = -1;
1983                         list[ns].ifindex = 0;
1984                         if (nl_rdma >= 0)
1985                                 list[ns].ifindex = mlx5_nl_ifindex
1986                                 (nl_rdma,
1987                                 mlx5_os_get_dev_device_name
1988                                                 (list[ns].phys_dev), 1);
1989                         if (!list[ns].ifindex) {
1990                                 char ifname[IF_NAMESIZE];
1991
1992                                 /*
1993                                  * Netlink failed, it may happen with old
1994                                  * ib_core kernel driver (before 4.16).
1995                                  * We can assume there is old driver because
1996                                  * here we are processing single ports IB
1997                                  * devices. Let's try sysfs to retrieve
1998                                  * the ifindex. The method works for
1999                                  * master device only.
2000                                  */
2001                                 if (nd > 1) {
2002                                         /*
2003                                          * Multiple devices found, assume
2004                                          * representors, can not distinguish
2005                                          * master/representor and retrieve
2006                                          * ifindex via sysfs.
2007                                          */
2008                                         continue;
2009                                 }
2010                                 ret = mlx5_get_ifname_sysfs
2011                                         (ibv_match[i]->ibdev_path, ifname);
2012                                 if (!ret)
2013                                         list[ns].ifindex =
2014                                                 if_nametoindex(ifname);
2015                                 if (!list[ns].ifindex) {
2016                                         /*
2017                                          * No network interface index found
2018                                          * for the specified device, it means
2019                                          * there it is neither representor
2020                                          * nor master.
2021                                          */
2022                                         continue;
2023                                 }
2024                         }
2025                         ret = -1;
2026                         if (nl_route >= 0)
2027                                 ret = mlx5_nl_switch_info
2028                                                (nl_route,
2029                                                 list[ns].ifindex,
2030                                                 &list[ns].info);
2031                         if (ret || (!list[ns].info.representor &&
2032                                     !list[ns].info.master)) {
2033                                 /*
2034                                  * We failed to recognize representors with
2035                                  * Netlink, let's try to perform the task
2036                                  * with sysfs.
2037                                  */
2038                                 ret =  mlx5_sysfs_switch_info
2039                                                 (list[ns].ifindex,
2040                                                  &list[ns].info);
2041                         }
2042                         if (!ret && (list[ns].info.representor ^
2043                                      list[ns].info.master)) {
2044                                 ns++;
2045                         } else if ((nd == 1) &&
2046                                    !list[ns].info.representor &&
2047                                    !list[ns].info.master) {
2048                                 /*
2049                                  * Single IB device with
2050                                  * one physical port and
2051                                  * attached network device.
2052                                  * May be SRIOV is not enabled
2053                                  * or there is no representors.
2054                                  */
2055                                 DRV_LOG(INFO, "no E-Switch support detected");
2056                                 ns++;
2057                                 break;
2058                         }
2059                 }
2060                 if (!ns) {
2061                         DRV_LOG(ERR,
2062                                 "unable to recognize master/representors"
2063                                 " on the multiple IB devices");
2064                         rte_errno = ENOENT;
2065                         ret = -rte_errno;
2066                         goto exit;
2067                 }
2068         }
2069         MLX5_ASSERT(ns);
2070         /*
2071          * Sort list to probe devices in natural order for users convenience
2072          * (i.e. master first, then representors from lowest to highest ID).
2073          */
2074         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2075         /* Device specific configuration. */
2076         switch (pci_dev->id.device_id) {
2077         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2078         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2079         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2080         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2081         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2082         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2083         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2084                 dev_config_vf = 1;
2085                 break;
2086         default:
2087                 dev_config_vf = 0;
2088                 break;
2089         }
2090         for (i = 0; i != ns; ++i) {
2091                 uint32_t restore;
2092
2093                 /* Default configuration. */
2094                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2095                 dev_config.vf = dev_config_vf;
2096                 dev_config.mps = MLX5_ARG_UNSET;
2097                 dev_config.dbnc = MLX5_ARG_UNSET;
2098                 dev_config.rx_vec_en = 1;
2099                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2100                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2101                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2102                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2103                 dev_config.vf_nl_en = 1;
2104                 dev_config.mr_ext_memseg_en = 1;
2105                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2106                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2107                 dev_config.dv_esw_en = 1;
2108                 dev_config.dv_flow_en = 1;
2109                 dev_config.decap_en = 1;
2110                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2111                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2112                                                  &list[i],
2113                                                  &dev_config);
2114                 if (!list[i].eth_dev) {
2115                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2116                                 break;
2117                         /* Device is disabled or already spawned. Ignore it. */
2118                         continue;
2119                 }
2120                 restore = list[i].eth_dev->data->dev_flags;
2121                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2122                 /* Restore non-PCI flags cleared by the above call. */
2123                 list[i].eth_dev->data->dev_flags |= restore;
2124                 rte_eth_dev_probing_finish(list[i].eth_dev);
2125         }
2126         if (i != ns) {
2127                 DRV_LOG(ERR,
2128                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2129                         " encountering an error: %s",
2130                         pci_dev->addr.domain, pci_dev->addr.bus,
2131                         pci_dev->addr.devid, pci_dev->addr.function,
2132                         strerror(rte_errno));
2133                 ret = -rte_errno;
2134                 /* Roll back. */
2135                 while (i--) {
2136                         if (!list[i].eth_dev)
2137                                 continue;
2138                         mlx5_dev_close(list[i].eth_dev);
2139                         /* mac_addrs must not be freed because in dev_private */
2140                         list[i].eth_dev->data->mac_addrs = NULL;
2141                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2142                 }
2143                 /* Restore original error. */
2144                 rte_errno = -ret;
2145         } else {
2146                 ret = 0;
2147         }
2148 exit:
2149         /*
2150          * Do the routine cleanup:
2151          * - close opened Netlink sockets
2152          * - free allocated spawn data array
2153          * - free the Infiniband device list
2154          */
2155         if (nl_rdma >= 0)
2156                 close(nl_rdma);
2157         if (nl_route >= 0)
2158                 close(nl_route);
2159         if (list)
2160                 mlx5_free(list);
2161         MLX5_ASSERT(ibv_list);
2162         mlx5_glue->free_device_list(ibv_list);
2163         return ret;
2164 }
2165
2166 static int
2167 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2168 {
2169         char *env;
2170         int value;
2171
2172         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2173         /* Get environment variable to store. */
2174         env = getenv(MLX5_SHUT_UP_BF);
2175         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2176         if (config->dbnc == MLX5_ARG_UNSET)
2177                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2178         else
2179                 setenv(MLX5_SHUT_UP_BF,
2180                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2181         return value;
2182 }
2183
2184 static void
2185 mlx5_restore_doorbell_mapping_env(int value)
2186 {
2187         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2188         /* Restore the original environment variable state. */
2189         if (value == MLX5_ARG_UNSET)
2190                 unsetenv(MLX5_SHUT_UP_BF);
2191         else
2192                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2193 }
2194
2195 /**
2196  * Extract pdn of PD object using DV API.
2197  *
2198  * @param[in] pd
2199  *   Pointer to the verbs PD object.
2200  * @param[out] pdn
2201  *   Pointer to the PD object number variable.
2202  *
2203  * @return
2204  *   0 on success, error value otherwise.
2205  */
2206 int
2207 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2208 {
2209 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2210         struct mlx5dv_obj obj;
2211         struct mlx5dv_pd pd_info;
2212         int ret = 0;
2213
2214         obj.pd.in = pd;
2215         obj.pd.out = &pd_info;
2216         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2217         if (ret) {
2218                 DRV_LOG(DEBUG, "Fail to get PD object info");
2219                 return ret;
2220         }
2221         *pdn = pd_info.pdn;
2222         return 0;
2223 #else
2224         (void)pd;
2225         (void)pdn;
2226         return -ENOTSUP;
2227 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2228 }
2229
2230 /**
2231  * Function API to open IB device.
2232  *
2233  * This function calls the Linux glue APIs to open a device.
2234  *
2235  * @param[in] spawn
2236  *   Pointer to the IB device attributes (name, port, etc).
2237  * @param[out] config
2238  *   Pointer to device configuration structure.
2239  * @param[out] sh
2240  *   Pointer to shared context structure.
2241  *
2242  * @return
2243  *   0 on success, a positive error value otherwise.
2244  */
2245 int
2246 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2247                      const struct mlx5_dev_config *config,
2248                      struct mlx5_dev_ctx_shared *sh)
2249 {
2250         int dbmap_env;
2251         int err = 0;
2252
2253         sh->numa_node = spawn->pci_dev->device.numa_node;
2254         pthread_mutex_init(&sh->txpp.mutex, NULL);
2255         /*
2256          * Configure environment variable "MLX5_BF_SHUT_UP"
2257          * before the device creation. The rdma_core library
2258          * checks the variable at device creation and
2259          * stores the result internally.
2260          */
2261         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2262         /* Try to open IB device with DV first, then usual Verbs. */
2263         errno = 0;
2264         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2265         if (sh->ctx) {
2266                 sh->devx = 1;
2267                 DRV_LOG(DEBUG, "DevX is supported");
2268                 /* The device is created, no need for environment. */
2269                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2270         } else {
2271                 /* The environment variable is still configured. */
2272                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2273                 err = errno ? errno : ENODEV;
2274                 /*
2275                  * The environment variable is not needed anymore,
2276                  * all device creation attempts are completed.
2277                  */
2278                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2279                 if (!sh->ctx)
2280                         return err;
2281                 DRV_LOG(DEBUG, "DevX is NOT supported");
2282                 err = 0;
2283         }
2284         return err;
2285 }
2286
2287 /**
2288  * Install shared asynchronous device events handler.
2289  * This function is implemented to support event sharing
2290  * between multiple ports of single IB device.
2291  *
2292  * @param sh
2293  *   Pointer to mlx5_dev_ctx_shared object.
2294  */
2295 void
2296 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2297 {
2298         int ret;
2299         int flags;
2300
2301         sh->intr_handle.fd = -1;
2302         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2303         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2304                     F_SETFL, flags | O_NONBLOCK);
2305         if (ret) {
2306                 DRV_LOG(INFO, "failed to change file descriptor async event"
2307                         " queue");
2308         } else {
2309                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2310                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2311                 if (rte_intr_callback_register(&sh->intr_handle,
2312                                         mlx5_dev_interrupt_handler, sh)) {
2313                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2314                         sh->intr_handle.fd = -1;
2315                 }
2316         }
2317         if (sh->devx) {
2318 #ifdef HAVE_IBV_DEVX_ASYNC
2319                 sh->intr_handle_devx.fd = -1;
2320                 sh->devx_comp =
2321                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2322                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2323                 if (!devx_comp) {
2324                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2325                         return;
2326                 }
2327                 flags = fcntl(devx_comp->fd, F_GETFL);
2328                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2329                 if (ret) {
2330                         DRV_LOG(INFO, "failed to change file descriptor"
2331                                 " devx comp");
2332                         return;
2333                 }
2334                 sh->intr_handle_devx.fd = devx_comp->fd;
2335                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2336                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2337                                         mlx5_dev_interrupt_handler_devx, sh)) {
2338                         DRV_LOG(INFO, "Fail to install the devx shared"
2339                                 " interrupt.");
2340                         sh->intr_handle_devx.fd = -1;
2341                 }
2342 #endif /* HAVE_IBV_DEVX_ASYNC */
2343         }
2344 }
2345
2346 /**
2347  * Uninstall shared asynchronous device events handler.
2348  * This function is implemented to support event sharing
2349  * between multiple ports of single IB device.
2350  *
2351  * @param dev
2352  *   Pointer to mlx5_dev_ctx_shared object.
2353  */
2354 void
2355 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2356 {
2357         if (sh->intr_handle.fd >= 0)
2358                 mlx5_intr_callback_unregister(&sh->intr_handle,
2359                                               mlx5_dev_interrupt_handler, sh);
2360 #ifdef HAVE_IBV_DEVX_ASYNC
2361         if (sh->intr_handle_devx.fd >= 0)
2362                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2363                                   mlx5_dev_interrupt_handler_devx, sh);
2364         if (sh->devx_comp)
2365                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2366 #endif
2367 }
2368
2369 /**
2370  * Read statistics by a named counter.
2371  *
2372  * @param[in] priv
2373  *   Pointer to the private device data structure.
2374  * @param[in] ctr_name
2375  *   Pointer to the name of the statistic counter to read
2376  * @param[out] stat
2377  *   Pointer to read statistic value.
2378  * @return
2379  *   0 on success and stat is valud, 1 if failed to read the value
2380  *   rte_errno is set.
2381  *
2382  */
2383 int
2384 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2385                       uint64_t *stat)
2386 {
2387         int fd;
2388
2389         if (priv->sh) {
2390                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2391                       priv->sh->ibdev_path,
2392                       priv->dev_port,
2393                       ctr_name);
2394                 fd = open(path, O_RDONLY);
2395                 /*
2396                  * in switchdev the file location is not per port
2397                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2398                  */
2399                 if (fd == -1) {
2400                         MKSTR(path1, "%s/hw_counters/%s",
2401                               priv->sh->ibdev_path,
2402                               ctr_name);
2403                         fd = open(path1, O_RDONLY);
2404                 }
2405                 if (fd != -1) {
2406                         char buf[21] = {'\0'};
2407                         ssize_t n = read(fd, buf, sizeof(buf));
2408
2409                         close(fd);
2410                         if (n != -1) {
2411                                 *stat = strtoull(buf, NULL, 10);
2412                                 return 0;
2413                         }
2414                 }
2415         }
2416         *stat = 0;
2417         return 1;
2418 }
2419
2420 /**
2421  * Set the reg_mr and dereg_mr call backs
2422  *
2423  * @param reg_mr_cb[out]
2424  *   Pointer to reg_mr func
2425  * @param dereg_mr_cb[out]
2426  *   Pointer to dereg_mr func
2427  *
2428  */
2429 void
2430 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2431                       mlx5_dereg_mr_t *dereg_mr_cb)
2432 {
2433         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2434         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2435 }
2436
2437 /**
2438  * Remove a MAC address from device
2439  *
2440  * @param dev
2441  *   Pointer to Ethernet device structure.
2442  * @param index
2443  *   MAC address index.
2444  */
2445 void
2446 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2447 {
2448         struct mlx5_priv *priv = dev->data->dev_private;
2449         const int vf = priv->config.vf;
2450
2451         if (vf)
2452                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2453                                         mlx5_ifindex(dev), priv->mac_own,
2454                                         &dev->data->mac_addrs[index], index);
2455 }
2456
2457 /**
2458  * Adds a MAC address to the device
2459  *
2460  * @param dev
2461  *   Pointer to Ethernet device structure.
2462  * @param mac_addr
2463  *   MAC address to register.
2464  * @param index
2465  *   MAC address index.
2466  *
2467  * @return
2468  *   0 on success, a negative errno value otherwise
2469  */
2470 int
2471 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2472                      uint32_t index)
2473 {
2474         struct mlx5_priv *priv = dev->data->dev_private;
2475         const int vf = priv->config.vf;
2476         int ret = 0;
2477
2478         if (vf)
2479                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2480                                            mlx5_ifindex(dev), priv->mac_own,
2481                                            mac, index);
2482         return ret;
2483 }
2484
2485 /**
2486  * Modify a VF MAC address
2487  *
2488  * @param priv
2489  *   Pointer to device private data.
2490  * @param mac_addr
2491  *   MAC address to modify into.
2492  * @param iface_idx
2493  *   Net device interface index
2494  * @param vf_index
2495  *   VF index
2496  *
2497  * @return
2498  *   0 on success, a negative errno value otherwise
2499  */
2500 int
2501 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2502                            unsigned int iface_idx,
2503                            struct rte_ether_addr *mac_addr,
2504                            int vf_index)
2505 {
2506         return mlx5_nl_vf_mac_addr_modify
2507                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2508 }
2509
2510 /**
2511  * Set device promiscuous mode
2512  *
2513  * @param dev
2514  *   Pointer to Ethernet device structure.
2515  * @param enable
2516  *   0 - promiscuous is disabled, otherwise - enabled
2517  *
2518  * @return
2519  *   0 on success, a negative error value otherwise
2520  */
2521 int
2522 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2523 {
2524         struct mlx5_priv *priv = dev->data->dev_private;
2525
2526         return mlx5_nl_promisc(priv->nl_socket_route,
2527                                mlx5_ifindex(dev), !!enable);
2528 }
2529
2530 /**
2531  * Set device promiscuous mode
2532  *
2533  * @param dev
2534  *   Pointer to Ethernet device structure.
2535  * @param enable
2536  *   0 - all multicase is disabled, otherwise - enabled
2537  *
2538  * @return
2539  *   0 on success, a negative error value otherwise
2540  */
2541 int
2542 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2543 {
2544         struct mlx5_priv *priv = dev->data->dev_private;
2545
2546         return mlx5_nl_allmulti(priv->nl_socket_route,
2547                                 mlx5_ifindex(dev), !!enable);
2548 }
2549
2550 /**
2551  * Flush device MAC addresses
2552  *
2553  * @param dev
2554  *   Pointer to Ethernet device structure.
2555  *
2556  */
2557 void
2558 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2559 {
2560         struct mlx5_priv *priv = dev->data->dev_private;
2561
2562         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2563                                dev->data->mac_addrs,
2564                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2565 }
2566
2567 const struct eth_dev_ops mlx5_os_dev_ops = {
2568         .dev_configure = mlx5_dev_configure,
2569         .dev_start = mlx5_dev_start,
2570         .dev_stop = mlx5_dev_stop,
2571         .dev_set_link_down = mlx5_set_link_down,
2572         .dev_set_link_up = mlx5_set_link_up,
2573         .dev_close = mlx5_dev_close,
2574         .promiscuous_enable = mlx5_promiscuous_enable,
2575         .promiscuous_disable = mlx5_promiscuous_disable,
2576         .allmulticast_enable = mlx5_allmulticast_enable,
2577         .allmulticast_disable = mlx5_allmulticast_disable,
2578         .link_update = mlx5_link_update,
2579         .stats_get = mlx5_stats_get,
2580         .stats_reset = mlx5_stats_reset,
2581         .xstats_get = mlx5_xstats_get,
2582         .xstats_reset = mlx5_xstats_reset,
2583         .xstats_get_names = mlx5_xstats_get_names,
2584         .fw_version_get = mlx5_fw_version_get,
2585         .dev_infos_get = mlx5_dev_infos_get,
2586         .read_clock = mlx5_txpp_read_clock,
2587         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2588         .vlan_filter_set = mlx5_vlan_filter_set,
2589         .rx_queue_setup = mlx5_rx_queue_setup,
2590         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2591         .tx_queue_setup = mlx5_tx_queue_setup,
2592         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2593         .rx_queue_release = mlx5_rx_queue_release,
2594         .tx_queue_release = mlx5_tx_queue_release,
2595         .rx_queue_start = mlx5_rx_queue_start,
2596         .rx_queue_stop = mlx5_rx_queue_stop,
2597         .tx_queue_start = mlx5_tx_queue_start,
2598         .tx_queue_stop = mlx5_tx_queue_stop,
2599         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2600         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2601         .mac_addr_remove = mlx5_mac_addr_remove,
2602         .mac_addr_add = mlx5_mac_addr_add,
2603         .mac_addr_set = mlx5_mac_addr_set,
2604         .set_mc_addr_list = mlx5_set_mc_addr_list,
2605         .mtu_set = mlx5_dev_set_mtu,
2606         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2607         .vlan_offload_set = mlx5_vlan_offload_set,
2608         .reta_update = mlx5_dev_rss_reta_update,
2609         .reta_query = mlx5_dev_rss_reta_query,
2610         .rss_hash_update = mlx5_rss_hash_update,
2611         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2612         .filter_ctrl = mlx5_dev_filter_ctrl,
2613         .rxq_info_get = mlx5_rxq_info_get,
2614         .txq_info_get = mlx5_txq_info_get,
2615         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2616         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2617         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2618         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2619         .is_removed = mlx5_is_removed,
2620         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2621         .get_module_info = mlx5_get_module_info,
2622         .get_module_eeprom = mlx5_get_module_eeprom,
2623         .hairpin_cap_get = mlx5_hairpin_cap_get,
2624         .mtr_ops_get = mlx5_flow_meter_ops_get,
2625         .hairpin_bind = mlx5_hairpin_bind,
2626         .hairpin_unbind = mlx5_hairpin_unbind,
2627         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2628         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2629         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2630         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2631 };
2632
2633 /* Available operations from secondary process. */
2634 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2635         .stats_get = mlx5_stats_get,
2636         .stats_reset = mlx5_stats_reset,
2637         .xstats_get = mlx5_xstats_get,
2638         .xstats_reset = mlx5_xstats_reset,
2639         .xstats_get_names = mlx5_xstats_get_names,
2640         .fw_version_get = mlx5_fw_version_get,
2641         .dev_infos_get = mlx5_dev_infos_get,
2642         .read_clock = mlx5_txpp_read_clock,
2643         .rx_queue_start = mlx5_rx_queue_start,
2644         .rx_queue_stop = mlx5_rx_queue_stop,
2645         .tx_queue_start = mlx5_tx_queue_start,
2646         .tx_queue_stop = mlx5_tx_queue_stop,
2647         .rxq_info_get = mlx5_rxq_info_get,
2648         .txq_info_get = mlx5_txq_info_get,
2649         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2650         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2651         .get_module_info = mlx5_get_module_info,
2652         .get_module_eeprom = mlx5_get_module_eeprom,
2653 };
2654
2655 /* Available operations in flow isolated mode. */
2656 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2657         .dev_configure = mlx5_dev_configure,
2658         .dev_start = mlx5_dev_start,
2659         .dev_stop = mlx5_dev_stop,
2660         .dev_set_link_down = mlx5_set_link_down,
2661         .dev_set_link_up = mlx5_set_link_up,
2662         .dev_close = mlx5_dev_close,
2663         .promiscuous_enable = mlx5_promiscuous_enable,
2664         .promiscuous_disable = mlx5_promiscuous_disable,
2665         .allmulticast_enable = mlx5_allmulticast_enable,
2666         .allmulticast_disable = mlx5_allmulticast_disable,
2667         .link_update = mlx5_link_update,
2668         .stats_get = mlx5_stats_get,
2669         .stats_reset = mlx5_stats_reset,
2670         .xstats_get = mlx5_xstats_get,
2671         .xstats_reset = mlx5_xstats_reset,
2672         .xstats_get_names = mlx5_xstats_get_names,
2673         .fw_version_get = mlx5_fw_version_get,
2674         .dev_infos_get = mlx5_dev_infos_get,
2675         .read_clock = mlx5_txpp_read_clock,
2676         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2677         .vlan_filter_set = mlx5_vlan_filter_set,
2678         .rx_queue_setup = mlx5_rx_queue_setup,
2679         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2680         .tx_queue_setup = mlx5_tx_queue_setup,
2681         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2682         .rx_queue_release = mlx5_rx_queue_release,
2683         .tx_queue_release = mlx5_tx_queue_release,
2684         .rx_queue_start = mlx5_rx_queue_start,
2685         .rx_queue_stop = mlx5_rx_queue_stop,
2686         .tx_queue_start = mlx5_tx_queue_start,
2687         .tx_queue_stop = mlx5_tx_queue_stop,
2688         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2689         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2690         .mac_addr_remove = mlx5_mac_addr_remove,
2691         .mac_addr_add = mlx5_mac_addr_add,
2692         .mac_addr_set = mlx5_mac_addr_set,
2693         .set_mc_addr_list = mlx5_set_mc_addr_list,
2694         .mtu_set = mlx5_dev_set_mtu,
2695         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2696         .vlan_offload_set = mlx5_vlan_offload_set,
2697         .filter_ctrl = mlx5_dev_filter_ctrl,
2698         .rxq_info_get = mlx5_rxq_info_get,
2699         .txq_info_get = mlx5_txq_info_get,
2700         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2701         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2702         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2703         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2704         .is_removed = mlx5_is_removed,
2705         .get_module_info = mlx5_get_module_info,
2706         .get_module_eeprom = mlx5_get_module_eeprom,
2707         .hairpin_cap_get = mlx5_hairpin_cap_get,
2708         .mtr_ops_get = mlx5_flow_meter_ops_get,
2709         .hairpin_bind = mlx5_hairpin_bind,
2710         .hairpin_unbind = mlx5_hairpin_unbind,
2711         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2712         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2713         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2714         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2715 };