net/mlx5: separate Rx queue object creations
[dpdk.git] / drivers / net / mlx5 / linux / mlx5_os.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2020 Mellanox Technologies, Ltd
4  */
5
6 #include <stddef.h>
7 #include <unistd.h>
8 #include <string.h>
9 #include <stdint.h>
10 #include <stdlib.h>
11 #include <errno.h>
12 #include <net/if.h>
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
16 #include <fcntl.h>
17
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
21 #include <rte_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
30
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
37
38 #include "mlx5_defs.h"
39 #include "mlx5.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
44 #include "mlx5_mr.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
48 #include "mlx5_nl.h"
49 #include "mlx5_devx.h"
50
51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
52
53 #ifndef HAVE_IBV_MLX5_MOD_MPW
54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
56 #endif
57
58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
60 #endif
61
62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
63
64 /* Spinlock for mlx5_shared_data allocation. */
65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66
67 /* Process local data for secondary processes. */
68 static struct mlx5_local_data mlx5_local_data;
69
70 /**
71  * Set the completion channel file descriptor interrupt as non-blocking.
72  *
73  * @param[in] rxq_obj
74  *   Pointer to RQ channel object, which includes the channel fd
75  *
76  * @param[out] fd
77  *   The file descriptor (representing the intetrrupt) used in this channel.
78  *
79  * @return
80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
81  */
82 int
83 mlx5_os_set_nonblock_channel_fd(int fd)
84 {
85         int flags;
86
87         flags = fcntl(fd, F_GETFL);
88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
89 }
90
91 /**
92  * Get mlx5 device attributes. The glue function query_device_ex() is called
93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
94  * device attributes from the glue out parameter.
95  *
96  * @param dev
97  *   Pointer to ibv context.
98  *
99  * @param device_attr
100  *   Pointer to mlx5 device attributes.
101  *
102  * @return
103  *   0 on success, non zero error number otherwise
104  */
105 int
106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
107 {
108         int err;
109         struct ibv_device_attr_ex attr_ex;
110         memset(device_attr, 0, sizeof(*device_attr));
111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
112         if (err)
113                 return err;
114
115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
121         device_attr->max_rwq_indirection_table_size =
122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
125
126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
128         if (err)
129                 return err;
130
131         device_attr->flags = dv_attr.flags;
132         device_attr->comp_mask = dv_attr.comp_mask;
133 #ifdef HAVE_IBV_MLX5_MOD_SWP
134         device_attr->sw_parsing_offloads =
135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
136 #endif
137         device_attr->min_single_stride_log_num_of_bytes =
138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
139         device_attr->max_single_stride_log_num_of_bytes =
140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
141         device_attr->min_single_wqe_log_num_of_strides =
142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
143         device_attr->max_single_wqe_log_num_of_strides =
144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
145         device_attr->stride_supported_qpts =
146                 dv_attr.striding_rq_caps.supported_qpts;
147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
149 #endif
150
151         return err;
152 }
153
154 /**
155  * Verbs callback to allocate a memory. This function should allocate the space
156  * according to the size provided residing inside a huge page.
157  * Please note that all allocation must respect the alignment from libmlx5
158  * (i.e. currently rte_mem_page_size()).
159  *
160  * @param[in] size
161  *   The size in bytes of the memory to allocate.
162  * @param[in] data
163  *   A pointer to the callback data.
164  *
165  * @return
166  *   Allocated buffer, NULL otherwise and rte_errno is set.
167  */
168 static void *
169 mlx5_alloc_verbs_buf(size_t size, void *data)
170 {
171         struct mlx5_priv *priv = data;
172         void *ret;
173         unsigned int socket = SOCKET_ID_ANY;
174         size_t alignment = rte_mem_page_size();
175         if (alignment == (size_t)-1) {
176                 DRV_LOG(ERR, "Failed to get mem page size");
177                 rte_errno = ENOMEM;
178                 return NULL;
179         }
180
181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
183
184                 socket = ctrl->socket;
185         } else if (priv->verbs_alloc_ctx.type ==
186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
188
189                 socket = ctrl->socket;
190         }
191         MLX5_ASSERT(data != NULL);
192         ret = mlx5_malloc(0, size, alignment, socket);
193         if (!ret && size)
194                 rte_errno = ENOMEM;
195         return ret;
196 }
197
198 /**
199  * Verbs callback to free a memory.
200  *
201  * @param[in] ptr
202  *   A pointer to the memory to free.
203  * @param[in] data
204  *   A pointer to the callback data.
205  */
206 static void
207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
208 {
209         MLX5_ASSERT(data != NULL);
210         mlx5_free(ptr);
211 }
212
213 /**
214  * Initialize DR related data within private structure.
215  * Routine checks the reference counter and does actual
216  * resources creation/initialization only if counter is zero.
217  *
218  * @param[in] priv
219  *   Pointer to the private device data structure.
220  *
221  * @return
222  *   Zero on success, positive error code otherwise.
223  */
224 static int
225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
226 {
227         struct mlx5_dev_ctx_shared *sh = priv->sh;
228         char s[MLX5_HLIST_NAMESIZE];
229         int err = 0;
230
231         if (!sh->flow_tbls)
232                 err = mlx5_alloc_table_hash_list(priv);
233         else
234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
235                         (void *)sh->flow_tbls);
236         if (err)
237                 return err;
238         /* Create tags hash list table. */
239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
241         if (!sh->tag_table) {
242                 DRV_LOG(ERR, "tags with hash creation failed.");
243                 err = ENOMEM;
244                 goto error;
245         }
246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
248         if (!sh->modify_cmds) {
249                 DRV_LOG(ERR, "hdr modify hash creation failed");
250                 err = ENOMEM;
251                 goto error;
252         }
253 #ifdef HAVE_MLX5DV_DR
254         void *domain;
255
256         if (sh->dv_refcnt) {
257                 /* Shared DV/DR structures is already initialized. */
258                 sh->dv_refcnt++;
259                 priv->dr_shared = 1;
260                 return 0;
261         }
262         /* Reference counter is zero, we should initialize structures. */
263         domain = mlx5_glue->dr_create_domain(sh->ctx,
264                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
265         if (!domain) {
266                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
267                 err = errno;
268                 goto error;
269         }
270         sh->rx_domain = domain;
271         domain = mlx5_glue->dr_create_domain(sh->ctx,
272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
273         if (!domain) {
274                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
275                 err = errno;
276                 goto error;
277         }
278         pthread_mutex_init(&sh->dv_mutex, NULL);
279         sh->tx_domain = domain;
280 #ifdef HAVE_MLX5DV_DR_ESWITCH
281         if (priv->config.dv_esw_en) {
282                 domain  = mlx5_glue->dr_create_domain
283                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
284                 if (!domain) {
285                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
286                         err = errno;
287                         goto error;
288                 }
289                 sh->fdb_domain = domain;
290                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
291         }
292 #endif
293         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
294                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
295                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
296                 if (sh->fdb_domain)
297                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
298         }
299         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
300 #endif /* HAVE_MLX5DV_DR */
301         sh->dv_refcnt++;
302         priv->dr_shared = 1;
303         return 0;
304 error:
305         /* Rollback the created objects. */
306         if (sh->rx_domain) {
307                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
308                 sh->rx_domain = NULL;
309         }
310         if (sh->tx_domain) {
311                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
312                 sh->tx_domain = NULL;
313         }
314         if (sh->fdb_domain) {
315                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
316                 sh->fdb_domain = NULL;
317         }
318         if (sh->esw_drop_action) {
319                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
320                 sh->esw_drop_action = NULL;
321         }
322         if (sh->pop_vlan_action) {
323                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
324                 sh->pop_vlan_action = NULL;
325         }
326         if (sh->modify_cmds) {
327                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
328                 sh->modify_cmds = NULL;
329         }
330         if (sh->tag_table) {
331                 /* tags should be destroyed with flow before. */
332                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
333                 sh->tag_table = NULL;
334         }
335         mlx5_free_table_hash_list(priv);
336         return err;
337 }
338
339 /**
340  * Destroy DR related data within private structure.
341  *
342  * @param[in] priv
343  *   Pointer to the private device data structure.
344  */
345 void
346 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
347 {
348         struct mlx5_dev_ctx_shared *sh;
349
350         if (!priv->dr_shared)
351                 return;
352         priv->dr_shared = 0;
353         sh = priv->sh;
354         MLX5_ASSERT(sh);
355 #ifdef HAVE_MLX5DV_DR
356         MLX5_ASSERT(sh->dv_refcnt);
357         if (sh->dv_refcnt && --sh->dv_refcnt)
358                 return;
359         if (sh->rx_domain) {
360                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
361                 sh->rx_domain = NULL;
362         }
363         if (sh->tx_domain) {
364                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
365                 sh->tx_domain = NULL;
366         }
367 #ifdef HAVE_MLX5DV_DR_ESWITCH
368         if (sh->fdb_domain) {
369                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
370                 sh->fdb_domain = NULL;
371         }
372         if (sh->esw_drop_action) {
373                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
374                 sh->esw_drop_action = NULL;
375         }
376 #endif
377         if (sh->pop_vlan_action) {
378                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
379                 sh->pop_vlan_action = NULL;
380         }
381         pthread_mutex_destroy(&sh->dv_mutex);
382 #endif /* HAVE_MLX5DV_DR */
383         if (sh->modify_cmds) {
384                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
385                 sh->modify_cmds = NULL;
386         }
387         if (sh->tag_table) {
388                 /* tags should be destroyed with flow before. */
389                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
390                 sh->tag_table = NULL;
391         }
392         mlx5_free_table_hash_list(priv);
393 }
394
395 /**
396  * Initialize shared data between primary and secondary process.
397  *
398  * A memzone is reserved by primary process and secondary processes attach to
399  * the memzone.
400  *
401  * @return
402  *   0 on success, a negative errno value otherwise and rte_errno is set.
403  */
404 static int
405 mlx5_init_shared_data(void)
406 {
407         const struct rte_memzone *mz;
408         int ret = 0;
409
410         rte_spinlock_lock(&mlx5_shared_data_lock);
411         if (mlx5_shared_data == NULL) {
412                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
413                         /* Allocate shared memory. */
414                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
415                                                  sizeof(*mlx5_shared_data),
416                                                  SOCKET_ID_ANY, 0);
417                         if (mz == NULL) {
418                                 DRV_LOG(ERR,
419                                         "Cannot allocate mlx5 shared data");
420                                 ret = -rte_errno;
421                                 goto error;
422                         }
423                         mlx5_shared_data = mz->addr;
424                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
425                         rte_spinlock_init(&mlx5_shared_data->lock);
426                 } else {
427                         /* Lookup allocated shared memory. */
428                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
429                         if (mz == NULL) {
430                                 DRV_LOG(ERR,
431                                         "Cannot attach mlx5 shared data");
432                                 ret = -rte_errno;
433                                 goto error;
434                         }
435                         mlx5_shared_data = mz->addr;
436                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
437                 }
438         }
439 error:
440         rte_spinlock_unlock(&mlx5_shared_data_lock);
441         return ret;
442 }
443
444 /**
445  * PMD global initialization.
446  *
447  * Independent from individual device, this function initializes global
448  * per-PMD data structures distinguishing primary and secondary processes.
449  * Hence, each initialization is called once per a process.
450  *
451  * @return
452  *   0 on success, a negative errno value otherwise and rte_errno is set.
453  */
454 static int
455 mlx5_init_once(void)
456 {
457         struct mlx5_shared_data *sd;
458         struct mlx5_local_data *ld = &mlx5_local_data;
459         int ret = 0;
460
461         if (mlx5_init_shared_data())
462                 return -rte_errno;
463         sd = mlx5_shared_data;
464         MLX5_ASSERT(sd);
465         rte_spinlock_lock(&sd->lock);
466         switch (rte_eal_process_type()) {
467         case RTE_PROC_PRIMARY:
468                 if (sd->init_done)
469                         break;
470                 LIST_INIT(&sd->mem_event_cb_list);
471                 rte_rwlock_init(&sd->mem_event_rwlock);
472                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
473                                                 mlx5_mr_mem_event_cb, NULL);
474                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
475                                            mlx5_mp_os_primary_handle);
476                 if (ret)
477                         goto out;
478                 sd->init_done = true;
479                 break;
480         case RTE_PROC_SECONDARY:
481                 if (ld->init_done)
482                         break;
483                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
484                                              mlx5_mp_os_secondary_handle);
485                 if (ret)
486                         goto out;
487                 ++sd->secondary_cnt;
488                 ld->init_done = true;
489                 break;
490         default:
491                 break;
492         }
493 out:
494         rte_spinlock_unlock(&sd->lock);
495         return ret;
496 }
497
498 /**
499  * Spawn an Ethernet device from Verbs information.
500  *
501  * @param dpdk_dev
502  *   Backing DPDK device.
503  * @param spawn
504  *   Verbs device parameters (name, port, switch_info) to spawn.
505  * @param config
506  *   Device configuration parameters.
507  *
508  * @return
509  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
510  *   is set. The following errors are defined:
511  *
512  *   EBUSY: device is not supposed to be spawned.
513  *   EEXIST: device is already spawned
514  */
515 static struct rte_eth_dev *
516 mlx5_dev_spawn(struct rte_device *dpdk_dev,
517                struct mlx5_dev_spawn_data *spawn,
518                struct mlx5_dev_config *config)
519 {
520         const struct mlx5_switch_info *switch_info = &spawn->info;
521         struct mlx5_dev_ctx_shared *sh = NULL;
522         struct ibv_port_attr port_attr;
523         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
524         struct rte_eth_dev *eth_dev = NULL;
525         struct mlx5_priv *priv = NULL;
526         int err = 0;
527         unsigned int hw_padding = 0;
528         unsigned int mps;
529         unsigned int cqe_comp;
530         unsigned int cqe_pad = 0;
531         unsigned int tunnel_en = 0;
532         unsigned int mpls_en = 0;
533         unsigned int swp = 0;
534         unsigned int mprq = 0;
535         unsigned int mprq_min_stride_size_n = 0;
536         unsigned int mprq_max_stride_size_n = 0;
537         unsigned int mprq_min_stride_num_n = 0;
538         unsigned int mprq_max_stride_num_n = 0;
539         struct rte_ether_addr mac;
540         char name[RTE_ETH_NAME_MAX_LEN];
541         int own_domain_id = 0;
542         uint16_t port_id;
543         unsigned int i;
544 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
545         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
546 #endif
547
548         /* Determine if this port representor is supposed to be spawned. */
549         if (switch_info->representor && dpdk_dev->devargs) {
550                 struct rte_eth_devargs eth_da;
551
552                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
553                 if (err) {
554                         rte_errno = -err;
555                         DRV_LOG(ERR, "failed to process device arguments: %s",
556                                 strerror(rte_errno));
557                         return NULL;
558                 }
559                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
560                         if (eth_da.representor_ports[i] ==
561                             (uint16_t)switch_info->port_name)
562                                 break;
563                 if (i == eth_da.nb_representor_ports) {
564                         rte_errno = EBUSY;
565                         return NULL;
566                 }
567         }
568         /* Build device name. */
569         if (spawn->pf_bond <  0) {
570                 /* Single device. */
571                 if (!switch_info->representor)
572                         strlcpy(name, dpdk_dev->name, sizeof(name));
573                 else
574                         snprintf(name, sizeof(name), "%s_representor_%u",
575                                  dpdk_dev->name, switch_info->port_name);
576         } else {
577                 /* Bonding device. */
578                 if (!switch_info->representor)
579                         snprintf(name, sizeof(name), "%s_%s",
580                                  dpdk_dev->name,
581                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
582                 else
583                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
584                                  dpdk_dev->name,
585                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
586                                  switch_info->port_name);
587         }
588         /* check if the device is already spawned */
589         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
590                 rte_errno = EEXIST;
591                 return NULL;
592         }
593         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
594         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
595                 struct mlx5_mp_id mp_id;
596
597                 eth_dev = rte_eth_dev_attach_secondary(name);
598                 if (eth_dev == NULL) {
599                         DRV_LOG(ERR, "can not attach rte ethdev");
600                         rte_errno = ENOMEM;
601                         return NULL;
602                 }
603                 eth_dev->device = dpdk_dev;
604                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
605                 err = mlx5_proc_priv_init(eth_dev);
606                 if (err)
607                         return NULL;
608                 mp_id.port_id = eth_dev->data->port_id;
609                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
610                 /* Receive command fd from primary process */
611                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
612                 if (err < 0)
613                         goto err_secondary;
614                 /* Remap UAR for Tx queues. */
615                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
616                 if (err)
617                         goto err_secondary;
618                 /*
619                  * Ethdev pointer is still required as input since
620                  * the primary device is not accessible from the
621                  * secondary process.
622                  */
623                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
624                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
625                 return eth_dev;
626 err_secondary:
627                 mlx5_dev_close(eth_dev);
628                 return NULL;
629         }
630         /*
631          * Some parameters ("tx_db_nc" in particularly) are needed in
632          * advance to create dv/verbs device context. We proceed the
633          * devargs here to get ones, and later proceed devargs again
634          * to override some hardware settings.
635          */
636         err = mlx5_args(config, dpdk_dev->devargs);
637         if (err) {
638                 err = rte_errno;
639                 DRV_LOG(ERR, "failed to process device arguments: %s",
640                         strerror(rte_errno));
641                 goto error;
642         }
643         mlx5_malloc_mem_select(config->sys_mem_en);
644         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
645         if (!sh)
646                 return NULL;
647         config->devx = sh->devx;
648 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
649         config->dest_tir = 1;
650 #endif
651 #ifdef HAVE_IBV_MLX5_MOD_SWP
652         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
653 #endif
654         /*
655          * Multi-packet send is supported by ConnectX-4 Lx PF as well
656          * as all ConnectX-5 devices.
657          */
658 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
659         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
660 #endif
661 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
662         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
663 #endif
664         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
665         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
666                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
667                         DRV_LOG(DEBUG, "enhanced MPW is supported");
668                         mps = MLX5_MPW_ENHANCED;
669                 } else {
670                         DRV_LOG(DEBUG, "MPW is supported");
671                         mps = MLX5_MPW;
672                 }
673         } else {
674                 DRV_LOG(DEBUG, "MPW isn't supported");
675                 mps = MLX5_MPW_DISABLED;
676         }
677 #ifdef HAVE_IBV_MLX5_MOD_SWP
678         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
679                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
680         DRV_LOG(DEBUG, "SWP support: %u", swp);
681 #endif
682         config->swp = !!swp;
683 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
684         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
685                 struct mlx5dv_striding_rq_caps mprq_caps =
686                         dv_attr.striding_rq_caps;
687
688                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
689                         mprq_caps.min_single_stride_log_num_of_bytes);
690                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
691                         mprq_caps.max_single_stride_log_num_of_bytes);
692                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
693                         mprq_caps.min_single_wqe_log_num_of_strides);
694                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
695                         mprq_caps.max_single_wqe_log_num_of_strides);
696                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
697                         mprq_caps.supported_qpts);
698                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
699                 mprq = 1;
700                 mprq_min_stride_size_n =
701                         mprq_caps.min_single_stride_log_num_of_bytes;
702                 mprq_max_stride_size_n =
703                         mprq_caps.max_single_stride_log_num_of_bytes;
704                 mprq_min_stride_num_n =
705                         mprq_caps.min_single_wqe_log_num_of_strides;
706                 mprq_max_stride_num_n =
707                         mprq_caps.max_single_wqe_log_num_of_strides;
708         }
709 #endif
710         if (RTE_CACHE_LINE_SIZE == 128 &&
711             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
712                 cqe_comp = 0;
713         else
714                 cqe_comp = 1;
715         config->cqe_comp = cqe_comp;
716 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
717         /* Whether device supports 128B Rx CQE padding. */
718         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
719                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
720 #endif
721 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
722         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
723                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
724                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
725                              (dv_attr.tunnel_offloads_caps &
726                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
727                              (dv_attr.tunnel_offloads_caps &
728                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
729         }
730         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
731                 tunnel_en ? "" : "not ");
732 #else
733         DRV_LOG(WARNING,
734                 "tunnel offloading disabled due to old OFED/rdma-core version");
735 #endif
736         config->tunnel_en = tunnel_en;
737 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
738         mpls_en = ((dv_attr.tunnel_offloads_caps &
739                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
740                    (dv_attr.tunnel_offloads_caps &
741                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
742         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
743                 mpls_en ? "" : "not ");
744 #else
745         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
746                 " old OFED/rdma-core version or firmware configuration");
747 #endif
748         config->mpls_en = mpls_en;
749         /* Check port status. */
750         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
751         if (err) {
752                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
753                 goto error;
754         }
755         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
756                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
757                 err = EINVAL;
758                 goto error;
759         }
760         if (port_attr.state != IBV_PORT_ACTIVE)
761                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
762                         mlx5_glue->port_state_str(port_attr.state),
763                         port_attr.state);
764         /* Allocate private eth device data. */
765         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
766                            sizeof(*priv),
767                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
768         if (priv == NULL) {
769                 DRV_LOG(ERR, "priv allocation failure");
770                 err = ENOMEM;
771                 goto error;
772         }
773         priv->sh = sh;
774         priv->dev_port = spawn->phys_port;
775         priv->pci_dev = spawn->pci_dev;
776         priv->mtu = RTE_ETHER_MTU;
777         priv->mp_id.port_id = port_id;
778         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
779         /* Some internal functions rely on Netlink sockets, open them now. */
780         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
781         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
782         priv->representor = !!switch_info->representor;
783         priv->master = !!switch_info->master;
784         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
785         priv->vport_meta_tag = 0;
786         priv->vport_meta_mask = 0;
787         priv->pf_bond = spawn->pf_bond;
788 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
789         /*
790          * The DevX port query API is implemented. E-Switch may use
791          * either vport or reg_c[0] metadata register to match on
792          * vport index. The engaged part of metadata register is
793          * defined by mask.
794          */
795         if (switch_info->representor || switch_info->master) {
796                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
797                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
798                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
799                                                  &devx_port);
800                 if (err) {
801                         DRV_LOG(WARNING,
802                                 "can't query devx port %d on device %s",
803                                 spawn->phys_port,
804                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
805                         devx_port.comp_mask = 0;
806                 }
807         }
808         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
809                 priv->vport_meta_tag = devx_port.reg_c_0.value;
810                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
811                 if (!priv->vport_meta_mask) {
812                         DRV_LOG(ERR, "vport zero mask for port %d"
813                                      " on bonding device %s",
814                                      spawn->phys_port,
815                                      mlx5_os_get_dev_device_name
816                                                         (spawn->phys_dev));
817                         err = ENOTSUP;
818                         goto error;
819                 }
820                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
821                         DRV_LOG(ERR, "invalid vport tag for port %d"
822                                      " on bonding device %s",
823                                      spawn->phys_port,
824                                      mlx5_os_get_dev_device_name
825                                                         (spawn->phys_dev));
826                         err = ENOTSUP;
827                         goto error;
828                 }
829         }
830         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
831                 priv->vport_id = devx_port.vport_num;
832         } else if (spawn->pf_bond >= 0) {
833                 DRV_LOG(ERR, "can't deduce vport index for port %d"
834                              " on bonding device %s",
835                              spawn->phys_port,
836                              mlx5_os_get_dev_device_name(spawn->phys_dev));
837                 err = ENOTSUP;
838                 goto error;
839         } else {
840                 /* Suppose vport index in compatible way. */
841                 priv->vport_id = switch_info->representor ?
842                                  switch_info->port_name + 1 : -1;
843         }
844 #else
845         /*
846          * Kernel/rdma_core support single E-Switch per PF configurations
847          * only and vport_id field contains the vport index for
848          * associated VF, which is deduced from representor port name.
849          * For example, let's have the IB device port 10, it has
850          * attached network device eth0, which has port name attribute
851          * pf0vf2, we can deduce the VF number as 2, and set vport index
852          * as 3 (2+1). This assigning schema should be changed if the
853          * multiple E-Switch instances per PF configurations or/and PCI
854          * subfunctions are added.
855          */
856         priv->vport_id = switch_info->representor ?
857                          switch_info->port_name + 1 : -1;
858 #endif
859         /* representor_id field keeps the unmodified VF index. */
860         priv->representor_id = switch_info->representor ?
861                                switch_info->port_name : -1;
862         /*
863          * Look for sibling devices in order to reuse their switch domain
864          * if any, otherwise allocate one.
865          */
866         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
867                 const struct mlx5_priv *opriv =
868                         rte_eth_devices[port_id].data->dev_private;
869
870                 if (!opriv ||
871                     opriv->sh != priv->sh ||
872                         opriv->domain_id ==
873                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
874                         continue;
875                 priv->domain_id = opriv->domain_id;
876                 break;
877         }
878         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
879                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
880                 if (err) {
881                         err = rte_errno;
882                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
883                                 strerror(rte_errno));
884                         goto error;
885                 }
886                 own_domain_id = 1;
887         }
888         /* Override some values set by hardware configuration. */
889         mlx5_args(config, dpdk_dev->devargs);
890         err = mlx5_dev_check_sibling_config(priv, config);
891         if (err)
892                 goto error;
893         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
894                             IBV_DEVICE_RAW_IP_CSUM);
895         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
896                 (config->hw_csum ? "" : "not "));
897 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
898         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
899         DRV_LOG(DEBUG, "counters are not supported");
900 #endif
901 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
902         if (config->dv_flow_en) {
903                 DRV_LOG(WARNING, "DV flow is not supported");
904                 config->dv_flow_en = 0;
905         }
906 #endif
907         config->ind_table_max_size =
908                 sh->device_attr.max_rwq_indirection_table_size;
909         /*
910          * Remove this check once DPDK supports larger/variable
911          * indirection tables.
912          */
913         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
914                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
915         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
916                 config->ind_table_max_size);
917         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
918                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
919         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
920                 (config->hw_vlan_strip ? "" : "not "));
921         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
922                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
923 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
924         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
925 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
926         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
927                         IBV_DEVICE_PCI_WRITE_END_PADDING);
928 #endif
929         if (config->hw_padding && !hw_padding) {
930                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
931                 config->hw_padding = 0;
932         } else if (config->hw_padding) {
933                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
934         }
935         config->tso = (sh->device_attr.max_tso > 0 &&
936                       (sh->device_attr.tso_supported_qpts &
937                        (1 << IBV_QPT_RAW_PACKET)));
938         if (config->tso)
939                 config->tso_max_payload_sz = sh->device_attr.max_tso;
940         /*
941          * MPW is disabled by default, while the Enhanced MPW is enabled
942          * by default.
943          */
944         if (config->mps == MLX5_ARG_UNSET)
945                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
946                                                           MLX5_MPW_DISABLED;
947         else
948                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
949         DRV_LOG(INFO, "%sMPS is %s",
950                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
951                 config->mps == MLX5_MPW ? "legacy " : "",
952                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
953         if (config->cqe_comp && !cqe_comp) {
954                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
955                 config->cqe_comp = 0;
956         }
957         if (config->cqe_pad && !cqe_pad) {
958                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
959                 config->cqe_pad = 0;
960         } else if (config->cqe_pad) {
961                 DRV_LOG(INFO, "Rx CQE padding is enabled");
962         }
963         if (config->devx) {
964                 priv->counter_fallback = 0;
965                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
966                 if (err) {
967                         err = -err;
968                         goto error;
969                 }
970                 if (!config->hca_attr.flow_counters_dump)
971                         priv->counter_fallback = 1;
972 #ifndef HAVE_IBV_DEVX_ASYNC
973                 priv->counter_fallback = 1;
974 #endif
975                 if (priv->counter_fallback)
976                         DRV_LOG(INFO, "Use fall-back DV counter management");
977                 /* Check for LRO support. */
978                 if (config->dest_tir && config->hca_attr.lro_cap &&
979                     config->dv_flow_en) {
980                         /* TBD check tunnel lro caps. */
981                         config->lro.supported = config->hca_attr.lro_cap;
982                         DRV_LOG(DEBUG, "Device supports LRO");
983                         /*
984                          * If LRO timeout is not configured by application,
985                          * use the minimal supported value.
986                          */
987                         if (!config->lro.timeout)
988                                 config->lro.timeout =
989                                 config->hca_attr.lro_timer_supported_periods[0];
990                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
991                                 config->lro.timeout);
992                 }
993 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
994                 if (config->hca_attr.qos.sup &&
995                     config->hca_attr.qos.srtcm_sup &&
996                     config->dv_flow_en) {
997                         uint8_t reg_c_mask =
998                                 config->hca_attr.qos.flow_meter_reg_c_ids;
999                         /*
1000                          * Meter needs two REG_C's for color match and pre-sfx
1001                          * flow match. Here get the REG_C for color match.
1002                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1003                          */
1004                         reg_c_mask &= 0xfc;
1005                         if (__builtin_popcount(reg_c_mask) < 1) {
1006                                 priv->mtr_en = 0;
1007                                 DRV_LOG(WARNING, "No available register for"
1008                                         " meter.");
1009                         } else {
1010                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1011                                                       REG_C_0;
1012                                 priv->mtr_en = 1;
1013                                 priv->mtr_reg_share =
1014                                       config->hca_attr.qos.flow_meter_reg_share;
1015                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1016                                         priv->mtr_color_reg);
1017                         }
1018                 }
1019 #endif
1020         }
1021         if (config->tx_pp) {
1022                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1023                         config->hca_attr.dev_freq_khz);
1024                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1025                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1026                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1027                         config->hca_attr.cross_channel ? "" : "not ");
1028                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1029                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1030                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1031                         config->hca_attr.non_wire_sq ? "" : "not ");
1032                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1033                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1034                         config->hca_attr.log_max_static_sq_wq);
1035                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1036                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1037                 if (!config->devx) {
1038                         DRV_LOG(ERR, "DevX is required for packet pacing");
1039                         err = ENODEV;
1040                         goto error;
1041                 }
1042                 if (!config->hca_attr.qos.packet_pacing) {
1043                         DRV_LOG(ERR, "Packet pacing is not supported");
1044                         err = ENODEV;
1045                         goto error;
1046                 }
1047                 if (!config->hca_attr.cross_channel) {
1048                         DRV_LOG(ERR, "Cross channel operations are"
1049                                      " required for packet pacing");
1050                         err = ENODEV;
1051                         goto error;
1052                 }
1053                 if (!config->hca_attr.wqe_index_ignore) {
1054                         DRV_LOG(ERR, "WQE index ignore feature is"
1055                                      " required for packet pacing");
1056                         err = ENODEV;
1057                         goto error;
1058                 }
1059                 if (!config->hca_attr.non_wire_sq) {
1060                         DRV_LOG(ERR, "Non-wire SQ feature is"
1061                                      " required for packet pacing");
1062                         err = ENODEV;
1063                         goto error;
1064                 }
1065                 if (!config->hca_attr.log_max_static_sq_wq) {
1066                         DRV_LOG(ERR, "Static WQE SQ feature is"
1067                                      " required for packet pacing");
1068                         err = ENODEV;
1069                         goto error;
1070                 }
1071                 if (!config->hca_attr.qos.wqe_rate_pp) {
1072                         DRV_LOG(ERR, "WQE rate mode is required"
1073                                      " for packet pacing");
1074                         err = ENODEV;
1075                         goto error;
1076                 }
1077 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1078                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1079                              " can't create queues for packet pacing");
1080                 err = ENODEV;
1081                 goto error;
1082 #endif
1083         }
1084         if (config->devx) {
1085                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1086
1087                 err = config->hca_attr.access_register_user ?
1088                         mlx5_devx_cmd_register_read
1089                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1090                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1091                 if (!err) {
1092                         uint32_t ts_mode;
1093
1094                         /* MTUTC register is read successfully. */
1095                         ts_mode = MLX5_GET(register_mtutc, reg,
1096                                            time_stamp_mode);
1097                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1098                                 config->rt_timestamp = 1;
1099                 } else {
1100                         /* Kernel does not support register reading. */
1101                         if (config->hca_attr.dev_freq_khz ==
1102                                                  (NS_PER_S / MS_PER_S))
1103                                 config->rt_timestamp = 1;
1104                 }
1105         }
1106         /*
1107          * If HW has bug working with tunnel packet decapsulation and
1108          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1109          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1110          */
1111         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1112                 config->hw_fcs_strip = 0;
1113         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1114                 (config->hw_fcs_strip ? "" : "not "));
1115         if (config->mprq.enabled && mprq) {
1116                 if (config->mprq.stride_num_n &&
1117                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1118                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1119                         config->mprq.stride_num_n =
1120                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1121                                                 mprq_min_stride_num_n),
1122                                         mprq_max_stride_num_n);
1123                         DRV_LOG(WARNING,
1124                                 "the number of strides"
1125                                 " for Multi-Packet RQ is out of range,"
1126                                 " setting default value (%u)",
1127                                 1 << config->mprq.stride_num_n);
1128                 }
1129                 if (config->mprq.stride_size_n &&
1130                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1131                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1132                         config->mprq.stride_size_n =
1133                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1134                                                 mprq_min_stride_size_n),
1135                                         mprq_max_stride_size_n);
1136                         DRV_LOG(WARNING,
1137                                 "the size of a stride"
1138                                 " for Multi-Packet RQ is out of range,"
1139                                 " setting default value (%u)",
1140                                 1 << config->mprq.stride_size_n);
1141                 }
1142                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1143                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1144         } else if (config->mprq.enabled && !mprq) {
1145                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1146                 config->mprq.enabled = 0;
1147         }
1148         if (config->max_dump_files_num == 0)
1149                 config->max_dump_files_num = 128;
1150         eth_dev = rte_eth_dev_allocate(name);
1151         if (eth_dev == NULL) {
1152                 DRV_LOG(ERR, "can not allocate rte ethdev");
1153                 err = ENOMEM;
1154                 goto error;
1155         }
1156         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1157         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1158         if (priv->representor) {
1159                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1160                 eth_dev->data->representor_id = priv->representor_id;
1161         }
1162         /*
1163          * Store associated network device interface index. This index
1164          * is permanent throughout the lifetime of device. So, we may store
1165          * the ifindex here and use the cached value further.
1166          */
1167         MLX5_ASSERT(spawn->ifindex);
1168         priv->if_index = spawn->ifindex;
1169         eth_dev->data->dev_private = priv;
1170         priv->dev_data = eth_dev->data;
1171         eth_dev->data->mac_addrs = priv->mac;
1172         eth_dev->device = dpdk_dev;
1173         /* Configure the first MAC address by default. */
1174         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1175                 DRV_LOG(ERR,
1176                         "port %u cannot get MAC address, is mlx5_en"
1177                         " loaded? (errno: %s)",
1178                         eth_dev->data->port_id, strerror(rte_errno));
1179                 err = ENODEV;
1180                 goto error;
1181         }
1182         DRV_LOG(INFO,
1183                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1184                 eth_dev->data->port_id,
1185                 mac.addr_bytes[0], mac.addr_bytes[1],
1186                 mac.addr_bytes[2], mac.addr_bytes[3],
1187                 mac.addr_bytes[4], mac.addr_bytes[5]);
1188 #ifdef RTE_LIBRTE_MLX5_DEBUG
1189         {
1190                 char ifname[IF_NAMESIZE];
1191
1192                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1193                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1194                                 eth_dev->data->port_id, ifname);
1195                 else
1196                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1197                                 eth_dev->data->port_id);
1198         }
1199 #endif
1200         /* Get actual MTU if possible. */
1201         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1202         if (err) {
1203                 err = rte_errno;
1204                 goto error;
1205         }
1206         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1207                 priv->mtu);
1208         /* Initialize burst functions to prevent crashes before link-up. */
1209         eth_dev->rx_pkt_burst = removed_rx_burst;
1210         eth_dev->tx_pkt_burst = removed_tx_burst;
1211         eth_dev->dev_ops = &mlx5_os_dev_ops;
1212         /* Register MAC address. */
1213         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1214         if (config->vf && config->vf_nl_en)
1215                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1216                                       mlx5_ifindex(eth_dev),
1217                                       eth_dev->data->mac_addrs,
1218                                       MLX5_MAX_MAC_ADDRESSES);
1219         priv->flows = 0;
1220         priv->ctrl_flows = 0;
1221         TAILQ_INIT(&priv->flow_meters);
1222         TAILQ_INIT(&priv->flow_meter_profiles);
1223         /* Hint libmlx5 to use PMD allocator for data plane resources */
1224         mlx5_glue->dv_set_context_attr(sh->ctx,
1225                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1226                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1227                                 .alloc = &mlx5_alloc_verbs_buf,
1228                                 .free = &mlx5_free_verbs_buf,
1229                                 .data = priv,
1230                         }));
1231         /* Bring Ethernet device up. */
1232         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1233                 eth_dev->data->port_id);
1234         mlx5_set_link_up(eth_dev);
1235         /*
1236          * Even though the interrupt handler is not installed yet,
1237          * interrupts will still trigger on the async_fd from
1238          * Verbs context returned by ibv_open_device().
1239          */
1240         mlx5_link_update(eth_dev, 0);
1241 #ifdef HAVE_MLX5DV_DR_ESWITCH
1242         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1243               (switch_info->representor || switch_info->master)))
1244                 config->dv_esw_en = 0;
1245 #else
1246         config->dv_esw_en = 0;
1247 #endif
1248         /* Detect minimal data bytes to inline. */
1249         mlx5_set_min_inline(spawn, config);
1250         /* Store device configuration on private structure. */
1251         priv->config = *config;
1252         /* Create context for virtual machine VLAN workaround. */
1253         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1254         if (config->dv_flow_en) {
1255                 err = mlx5_alloc_shared_dr(priv);
1256                 if (err)
1257                         goto error;
1258                 /*
1259                  * RSS id is shared with meter flow id. Meter flow id can only
1260                  * use the 24 MSB of the register.
1261                  */
1262                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1263                                      MLX5_MTR_COLOR_BITS);
1264                 if (!priv->qrss_id_pool) {
1265                         DRV_LOG(ERR, "can't create flow id pool");
1266                         err = ENOMEM;
1267                         goto error;
1268                 }
1269         }
1270         /* Supported Verbs flow priority number detection. */
1271         err = mlx5_flow_discover_priorities(eth_dev);
1272         if (err < 0) {
1273                 err = -err;
1274                 goto error;
1275         }
1276         priv->config.flow_prio = err;
1277         if (!priv->config.dv_esw_en &&
1278             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1279                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1280                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1281                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1282         }
1283         mlx5_set_metadata_mask(eth_dev);
1284         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1285             !priv->sh->dv_regc0_mask) {
1286                 DRV_LOG(ERR, "metadata mode %u is not supported "
1287                              "(no metadata reg_c[0] is available)",
1288                              priv->config.dv_xmeta_en);
1289                         err = ENOTSUP;
1290                         goto error;
1291         }
1292         /*
1293          * Allocate the buffer for flow creating, just once.
1294          * The allocation must be done before any flow creating.
1295          */
1296         mlx5_flow_alloc_intermediate(eth_dev);
1297         /* Query availability of metadata reg_c's. */
1298         err = mlx5_flow_discover_mreg_c(eth_dev);
1299         if (err < 0) {
1300                 err = -err;
1301                 goto error;
1302         }
1303         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1304                 DRV_LOG(DEBUG,
1305                         "port %u extensive metadata register is not supported",
1306                         eth_dev->data->port_id);
1307                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1308                         DRV_LOG(ERR, "metadata mode %u is not supported "
1309                                      "(no metadata registers available)",
1310                                      priv->config.dv_xmeta_en);
1311                         err = ENOTSUP;
1312                         goto error;
1313                 }
1314         }
1315         if (priv->config.dv_flow_en &&
1316             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1317             mlx5_flow_ext_mreg_supported(eth_dev) &&
1318             priv->sh->dv_regc0_mask) {
1319                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1320                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1321                 if (!priv->mreg_cp_tbl) {
1322                         err = ENOMEM;
1323                         goto error;
1324                 }
1325         }
1326         if (config->devx && config->dv_flow_en)
1327                 priv->obj_ops = &devx_obj_ops;
1328         else
1329                 priv->obj_ops = &ibv_obj_ops;
1330         return eth_dev;
1331 error:
1332         if (priv) {
1333                 if (priv->mreg_cp_tbl)
1334                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1335                 if (priv->sh)
1336                         mlx5_os_free_shared_dr(priv);
1337                 if (priv->nl_socket_route >= 0)
1338                         close(priv->nl_socket_route);
1339                 if (priv->nl_socket_rdma >= 0)
1340                         close(priv->nl_socket_rdma);
1341                 if (priv->vmwa_context)
1342                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1343                 if (priv->qrss_id_pool)
1344                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1345                 if (own_domain_id)
1346                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1347                 mlx5_free(priv);
1348                 if (eth_dev != NULL)
1349                         eth_dev->data->dev_private = NULL;
1350         }
1351         if (eth_dev != NULL) {
1352                 /* mac_addrs must not be freed alone because part of
1353                  * dev_private
1354                  **/
1355                 eth_dev->data->mac_addrs = NULL;
1356                 rte_eth_dev_release_port(eth_dev);
1357         }
1358         if (sh)
1359                 mlx5_free_shared_dev_ctx(sh);
1360         MLX5_ASSERT(err > 0);
1361         rte_errno = err;
1362         return NULL;
1363 }
1364
1365 /**
1366  * Comparison callback to sort device data.
1367  *
1368  * This is meant to be used with qsort().
1369  *
1370  * @param a[in]
1371  *   Pointer to pointer to first data object.
1372  * @param b[in]
1373  *   Pointer to pointer to second data object.
1374  *
1375  * @return
1376  *   0 if both objects are equal, less than 0 if the first argument is less
1377  *   than the second, greater than 0 otherwise.
1378  */
1379 static int
1380 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1381 {
1382         const struct mlx5_switch_info *si_a =
1383                 &((const struct mlx5_dev_spawn_data *)a)->info;
1384         const struct mlx5_switch_info *si_b =
1385                 &((const struct mlx5_dev_spawn_data *)b)->info;
1386         int ret;
1387
1388         /* Master device first. */
1389         ret = si_b->master - si_a->master;
1390         if (ret)
1391                 return ret;
1392         /* Then representor devices. */
1393         ret = si_b->representor - si_a->representor;
1394         if (ret)
1395                 return ret;
1396         /* Unidentified devices come last in no specific order. */
1397         if (!si_a->representor)
1398                 return 0;
1399         /* Order representors by name. */
1400         return si_a->port_name - si_b->port_name;
1401 }
1402
1403 /**
1404  * Match PCI information for possible slaves of bonding device.
1405  *
1406  * @param[in] ibv_dev
1407  *   Pointer to Infiniband device structure.
1408  * @param[in] pci_dev
1409  *   Pointer to PCI device structure to match PCI address.
1410  * @param[in] nl_rdma
1411  *   Netlink RDMA group socket handle.
1412  *
1413  * @return
1414  *   negative value if no bonding device found, otherwise
1415  *   positive index of slave PF in bonding.
1416  */
1417 static int
1418 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1419                            const struct rte_pci_device *pci_dev,
1420                            int nl_rdma)
1421 {
1422         char ifname[IF_NAMESIZE + 1];
1423         unsigned int ifindex;
1424         unsigned int np, i;
1425         FILE *file = NULL;
1426         int pf = -1;
1427
1428         /*
1429          * Try to get master device name. If something goes
1430          * wrong suppose the lack of kernel support and no
1431          * bonding devices.
1432          */
1433         if (nl_rdma < 0)
1434                 return -1;
1435         if (!strstr(ibv_dev->name, "bond"))
1436                 return -1;
1437         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1438         if (!np)
1439                 return -1;
1440         /*
1441          * The Master device might not be on the predefined
1442          * port (not on port index 1, it is not garanted),
1443          * we have to scan all Infiniband device port and
1444          * find master.
1445          */
1446         for (i = 1; i <= np; ++i) {
1447                 /* Check whether Infiniband port is populated. */
1448                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1449                 if (!ifindex)
1450                         continue;
1451                 if (!if_indextoname(ifindex, ifname))
1452                         continue;
1453                 /* Try to read bonding slave names from sysfs. */
1454                 MKSTR(slaves,
1455                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1456                 file = fopen(slaves, "r");
1457                 if (file)
1458                         break;
1459         }
1460         if (!file)
1461                 return -1;
1462         /* Use safe format to check maximal buffer length. */
1463         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1464         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1465                 char tmp_str[IF_NAMESIZE + 32];
1466                 struct rte_pci_addr pci_addr;
1467                 struct mlx5_switch_info info;
1468
1469                 /* Process slave interface names in the loop. */
1470                 snprintf(tmp_str, sizeof(tmp_str),
1471                          "/sys/class/net/%s", ifname);
1472                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1473                         DRV_LOG(WARNING, "can not get PCI address"
1474                                          " for netdev \"%s\"", ifname);
1475                         continue;
1476                 }
1477                 if (pci_dev->addr.domain != pci_addr.domain ||
1478                     pci_dev->addr.bus != pci_addr.bus ||
1479                     pci_dev->addr.devid != pci_addr.devid ||
1480                     pci_dev->addr.function != pci_addr.function)
1481                         continue;
1482                 /* Slave interface PCI address match found. */
1483                 fclose(file);
1484                 snprintf(tmp_str, sizeof(tmp_str),
1485                          "/sys/class/net/%s/phys_port_name", ifname);
1486                 file = fopen(tmp_str, "rb");
1487                 if (!file)
1488                         break;
1489                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1490                 if (fscanf(file, "%32s", tmp_str) == 1)
1491                         mlx5_translate_port_name(tmp_str, &info);
1492                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1493                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1494                         pf = info.port_name;
1495                 break;
1496         }
1497         if (file)
1498                 fclose(file);
1499         return pf;
1500 }
1501
1502 /**
1503  * DPDK callback to register a PCI device.
1504  *
1505  * This function spawns Ethernet devices out of a given PCI device.
1506  *
1507  * @param[in] pci_drv
1508  *   PCI driver structure (mlx5_driver).
1509  * @param[in] pci_dev
1510  *   PCI device information.
1511  *
1512  * @return
1513  *   0 on success, a negative errno value otherwise and rte_errno is set.
1514  */
1515 int
1516 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1517                   struct rte_pci_device *pci_dev)
1518 {
1519         struct ibv_device **ibv_list;
1520         /*
1521          * Number of found IB Devices matching with requested PCI BDF.
1522          * nd != 1 means there are multiple IB devices over the same
1523          * PCI device and we have representors and master.
1524          */
1525         unsigned int nd = 0;
1526         /*
1527          * Number of found IB device Ports. nd = 1 and np = 1..n means
1528          * we have the single multiport IB device, and there may be
1529          * representors attached to some of found ports.
1530          */
1531         unsigned int np = 0;
1532         /*
1533          * Number of DPDK ethernet devices to Spawn - either over
1534          * multiple IB devices or multiple ports of single IB device.
1535          * Actually this is the number of iterations to spawn.
1536          */
1537         unsigned int ns = 0;
1538         /*
1539          * Bonding device
1540          *   < 0 - no bonding device (single one)
1541          *  >= 0 - bonding device (value is slave PF index)
1542          */
1543         int bd = -1;
1544         struct mlx5_dev_spawn_data *list = NULL;
1545         struct mlx5_dev_config dev_config;
1546         unsigned int dev_config_vf;
1547         int ret;
1548
1549         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1550                 mlx5_pmd_socket_init();
1551         ret = mlx5_init_once();
1552         if (ret) {
1553                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1554                         strerror(rte_errno));
1555                 return -rte_errno;
1556         }
1557         errno = 0;
1558         ibv_list = mlx5_glue->get_device_list(&ret);
1559         if (!ibv_list) {
1560                 rte_errno = errno ? errno : ENOSYS;
1561                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1562                 return -rte_errno;
1563         }
1564         /*
1565          * First scan the list of all Infiniband devices to find
1566          * matching ones, gathering into the list.
1567          */
1568         struct ibv_device *ibv_match[ret + 1];
1569         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1570         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1571         unsigned int i;
1572
1573         while (ret-- > 0) {
1574                 struct rte_pci_addr pci_addr;
1575
1576                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1577                 bd = mlx5_device_bond_pci_match
1578                                 (ibv_list[ret], pci_dev, nl_rdma);
1579                 if (bd >= 0) {
1580                         /*
1581                          * Bonding device detected. Only one match is allowed,
1582                          * the bonding is supported over multi-port IB device,
1583                          * there should be no matches on representor PCI
1584                          * functions or non VF LAG bonding devices with
1585                          * specified address.
1586                          */
1587                         if (nd) {
1588                                 DRV_LOG(ERR,
1589                                         "multiple PCI match on bonding device"
1590                                         "\"%s\" found", ibv_list[ret]->name);
1591                                 rte_errno = ENOENT;
1592                                 ret = -rte_errno;
1593                                 goto exit;
1594                         }
1595                         DRV_LOG(INFO, "PCI information matches for"
1596                                       " slave %d bonding device \"%s\"",
1597                                       bd, ibv_list[ret]->name);
1598                         ibv_match[nd++] = ibv_list[ret];
1599                         break;
1600                 }
1601                 if (mlx5_dev_to_pci_addr
1602                         (ibv_list[ret]->ibdev_path, &pci_addr))
1603                         continue;
1604                 if (pci_dev->addr.domain != pci_addr.domain ||
1605                     pci_dev->addr.bus != pci_addr.bus ||
1606                     pci_dev->addr.devid != pci_addr.devid ||
1607                     pci_dev->addr.function != pci_addr.function)
1608                         continue;
1609                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1610                         ibv_list[ret]->name);
1611                 ibv_match[nd++] = ibv_list[ret];
1612         }
1613         ibv_match[nd] = NULL;
1614         if (!nd) {
1615                 /* No device matches, just complain and bail out. */
1616                 DRV_LOG(WARNING,
1617                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1618                         " are kernel drivers loaded?",
1619                         pci_dev->addr.domain, pci_dev->addr.bus,
1620                         pci_dev->addr.devid, pci_dev->addr.function);
1621                 rte_errno = ENOENT;
1622                 ret = -rte_errno;
1623                 goto exit;
1624         }
1625         if (nd == 1) {
1626                 /*
1627                  * Found single matching device may have multiple ports.
1628                  * Each port may be representor, we have to check the port
1629                  * number and check the representors existence.
1630                  */
1631                 if (nl_rdma >= 0)
1632                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1633                 if (!np)
1634                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1635                                          " ports number", ibv_match[0]->name);
1636                 if (bd >= 0 && !np) {
1637                         DRV_LOG(ERR, "can not get ports"
1638                                      " for bonding device");
1639                         rte_errno = ENOENT;
1640                         ret = -rte_errno;
1641                         goto exit;
1642                 }
1643         }
1644 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1645         if (bd >= 0) {
1646                 /*
1647                  * This may happen if there is VF LAG kernel support and
1648                  * application is compiled with older rdma_core library.
1649                  */
1650                 DRV_LOG(ERR,
1651                         "No kernel/verbs support for VF LAG bonding found.");
1652                 rte_errno = ENOTSUP;
1653                 ret = -rte_errno;
1654                 goto exit;
1655         }
1656 #endif
1657         /*
1658          * Now we can determine the maximal
1659          * amount of devices to be spawned.
1660          */
1661         list = mlx5_malloc(MLX5_MEM_ZERO,
1662                            sizeof(struct mlx5_dev_spawn_data) *
1663                            (np ? np : nd),
1664                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1665         if (!list) {
1666                 DRV_LOG(ERR, "spawn data array allocation failure");
1667                 rte_errno = ENOMEM;
1668                 ret = -rte_errno;
1669                 goto exit;
1670         }
1671         if (bd >= 0 || np > 1) {
1672                 /*
1673                  * Single IB device with multiple ports found,
1674                  * it may be E-Switch master device and representors.
1675                  * We have to perform identification through the ports.
1676                  */
1677                 MLX5_ASSERT(nl_rdma >= 0);
1678                 MLX5_ASSERT(ns == 0);
1679                 MLX5_ASSERT(nd == 1);
1680                 MLX5_ASSERT(np);
1681                 for (i = 1; i <= np; ++i) {
1682                         list[ns].max_port = np;
1683                         list[ns].phys_port = i;
1684                         list[ns].phys_dev = ibv_match[0];
1685                         list[ns].eth_dev = NULL;
1686                         list[ns].pci_dev = pci_dev;
1687                         list[ns].pf_bond = bd;
1688                         list[ns].ifindex = mlx5_nl_ifindex
1689                                 (nl_rdma,
1690                                 mlx5_os_get_dev_device_name
1691                                                 (list[ns].phys_dev), i);
1692                         if (!list[ns].ifindex) {
1693                                 /*
1694                                  * No network interface index found for the
1695                                  * specified port, it means there is no
1696                                  * representor on this port. It's OK,
1697                                  * there can be disabled ports, for example
1698                                  * if sriov_numvfs < sriov_totalvfs.
1699                                  */
1700                                 continue;
1701                         }
1702                         ret = -1;
1703                         if (nl_route >= 0)
1704                                 ret = mlx5_nl_switch_info
1705                                                (nl_route,
1706                                                 list[ns].ifindex,
1707                                                 &list[ns].info);
1708                         if (ret || (!list[ns].info.representor &&
1709                                     !list[ns].info.master)) {
1710                                 /*
1711                                  * We failed to recognize representors with
1712                                  * Netlink, let's try to perform the task
1713                                  * with sysfs.
1714                                  */
1715                                 ret =  mlx5_sysfs_switch_info
1716                                                 (list[ns].ifindex,
1717                                                  &list[ns].info);
1718                         }
1719                         if (!ret && bd >= 0) {
1720                                 switch (list[ns].info.name_type) {
1721                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1722                                         if (list[ns].info.port_name == bd)
1723                                                 ns++;
1724                                         break;
1725                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1726                                         /* Fallthrough */
1727                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1728                                         if (list[ns].info.pf_num == bd)
1729                                                 ns++;
1730                                         break;
1731                                 default:
1732                                         break;
1733                                 }
1734                                 continue;
1735                         }
1736                         if (!ret && (list[ns].info.representor ^
1737                                      list[ns].info.master))
1738                                 ns++;
1739                 }
1740                 if (!ns) {
1741                         DRV_LOG(ERR,
1742                                 "unable to recognize master/representors"
1743                                 " on the IB device with multiple ports");
1744                         rte_errno = ENOENT;
1745                         ret = -rte_errno;
1746                         goto exit;
1747                 }
1748         } else {
1749                 /*
1750                  * The existence of several matching entries (nd > 1) means
1751                  * port representors have been instantiated. No existing Verbs
1752                  * call nor sysfs entries can tell them apart, this can only
1753                  * be done through Netlink calls assuming kernel drivers are
1754                  * recent enough to support them.
1755                  *
1756                  * In the event of identification failure through Netlink,
1757                  * try again through sysfs, then:
1758                  *
1759                  * 1. A single IB device matches (nd == 1) with single
1760                  *    port (np=0/1) and is not a representor, assume
1761                  *    no switch support.
1762                  *
1763                  * 2. Otherwise no safe assumptions can be made;
1764                  *    complain louder and bail out.
1765                  */
1766                 for (i = 0; i != nd; ++i) {
1767                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1768                         list[ns].max_port = 1;
1769                         list[ns].phys_port = 1;
1770                         list[ns].phys_dev = ibv_match[i];
1771                         list[ns].eth_dev = NULL;
1772                         list[ns].pci_dev = pci_dev;
1773                         list[ns].pf_bond = -1;
1774                         list[ns].ifindex = 0;
1775                         if (nl_rdma >= 0)
1776                                 list[ns].ifindex = mlx5_nl_ifindex
1777                                 (nl_rdma,
1778                                 mlx5_os_get_dev_device_name
1779                                                 (list[ns].phys_dev), 1);
1780                         if (!list[ns].ifindex) {
1781                                 char ifname[IF_NAMESIZE];
1782
1783                                 /*
1784                                  * Netlink failed, it may happen with old
1785                                  * ib_core kernel driver (before 4.16).
1786                                  * We can assume there is old driver because
1787                                  * here we are processing single ports IB
1788                                  * devices. Let's try sysfs to retrieve
1789                                  * the ifindex. The method works for
1790                                  * master device only.
1791                                  */
1792                                 if (nd > 1) {
1793                                         /*
1794                                          * Multiple devices found, assume
1795                                          * representors, can not distinguish
1796                                          * master/representor and retrieve
1797                                          * ifindex via sysfs.
1798                                          */
1799                                         continue;
1800                                 }
1801                                 ret = mlx5_get_ifname_sysfs
1802                                         (ibv_match[i]->ibdev_path, ifname);
1803                                 if (!ret)
1804                                         list[ns].ifindex =
1805                                                 if_nametoindex(ifname);
1806                                 if (!list[ns].ifindex) {
1807                                         /*
1808                                          * No network interface index found
1809                                          * for the specified device, it means
1810                                          * there it is neither representor
1811                                          * nor master.
1812                                          */
1813                                         continue;
1814                                 }
1815                         }
1816                         ret = -1;
1817                         if (nl_route >= 0)
1818                                 ret = mlx5_nl_switch_info
1819                                                (nl_route,
1820                                                 list[ns].ifindex,
1821                                                 &list[ns].info);
1822                         if (ret || (!list[ns].info.representor &&
1823                                     !list[ns].info.master)) {
1824                                 /*
1825                                  * We failed to recognize representors with
1826                                  * Netlink, let's try to perform the task
1827                                  * with sysfs.
1828                                  */
1829                                 ret =  mlx5_sysfs_switch_info
1830                                                 (list[ns].ifindex,
1831                                                  &list[ns].info);
1832                         }
1833                         if (!ret && (list[ns].info.representor ^
1834                                      list[ns].info.master)) {
1835                                 ns++;
1836                         } else if ((nd == 1) &&
1837                                    !list[ns].info.representor &&
1838                                    !list[ns].info.master) {
1839                                 /*
1840                                  * Single IB device with
1841                                  * one physical port and
1842                                  * attached network device.
1843                                  * May be SRIOV is not enabled
1844                                  * or there is no representors.
1845                                  */
1846                                 DRV_LOG(INFO, "no E-Switch support detected");
1847                                 ns++;
1848                                 break;
1849                         }
1850                 }
1851                 if (!ns) {
1852                         DRV_LOG(ERR,
1853                                 "unable to recognize master/representors"
1854                                 " on the multiple IB devices");
1855                         rte_errno = ENOENT;
1856                         ret = -rte_errno;
1857                         goto exit;
1858                 }
1859         }
1860         MLX5_ASSERT(ns);
1861         /*
1862          * Sort list to probe devices in natural order for users convenience
1863          * (i.e. master first, then representors from lowest to highest ID).
1864          */
1865         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1866         /* Device specific configuration. */
1867         switch (pci_dev->id.device_id) {
1868         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1869         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1870         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1871         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1872         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1873         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1874         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1875                 dev_config_vf = 1;
1876                 break;
1877         default:
1878                 dev_config_vf = 0;
1879                 break;
1880         }
1881         for (i = 0; i != ns; ++i) {
1882                 uint32_t restore;
1883
1884                 /* Default configuration. */
1885                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1886                 dev_config.vf = dev_config_vf;
1887                 dev_config.mps = MLX5_ARG_UNSET;
1888                 dev_config.dbnc = MLX5_ARG_UNSET;
1889                 dev_config.rx_vec_en = 1;
1890                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1891                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1892                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1893                 dev_config.txqs_inline = MLX5_ARG_UNSET;
1894                 dev_config.vf_nl_en = 1;
1895                 dev_config.mr_ext_memseg_en = 1;
1896                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1897                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1898                 dev_config.dv_esw_en = 1;
1899                 dev_config.dv_flow_en = 1;
1900                 dev_config.decap_en = 1;
1901                 dev_config.log_hp_size = MLX5_ARG_UNSET;
1902                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1903                                                  &list[i],
1904                                                  &dev_config);
1905                 if (!list[i].eth_dev) {
1906                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1907                                 break;
1908                         /* Device is disabled or already spawned. Ignore it. */
1909                         continue;
1910                 }
1911                 restore = list[i].eth_dev->data->dev_flags;
1912                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1913                 /* Restore non-PCI flags cleared by the above call. */
1914                 list[i].eth_dev->data->dev_flags |= restore;
1915                 rte_eth_dev_probing_finish(list[i].eth_dev);
1916         }
1917         if (i != ns) {
1918                 DRV_LOG(ERR,
1919                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1920                         " encountering an error: %s",
1921                         pci_dev->addr.domain, pci_dev->addr.bus,
1922                         pci_dev->addr.devid, pci_dev->addr.function,
1923                         strerror(rte_errno));
1924                 ret = -rte_errno;
1925                 /* Roll back. */
1926                 while (i--) {
1927                         if (!list[i].eth_dev)
1928                                 continue;
1929                         mlx5_dev_close(list[i].eth_dev);
1930                         /* mac_addrs must not be freed because in dev_private */
1931                         list[i].eth_dev->data->mac_addrs = NULL;
1932                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1933                 }
1934                 /* Restore original error. */
1935                 rte_errno = -ret;
1936         } else {
1937                 ret = 0;
1938         }
1939 exit:
1940         /*
1941          * Do the routine cleanup:
1942          * - close opened Netlink sockets
1943          * - free allocated spawn data array
1944          * - free the Infiniband device list
1945          */
1946         if (nl_rdma >= 0)
1947                 close(nl_rdma);
1948         if (nl_route >= 0)
1949                 close(nl_route);
1950         if (list)
1951                 mlx5_free(list);
1952         MLX5_ASSERT(ibv_list);
1953         mlx5_glue->free_device_list(ibv_list);
1954         return ret;
1955 }
1956
1957 static int
1958 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1959 {
1960         char *env;
1961         int value;
1962
1963         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1964         /* Get environment variable to store. */
1965         env = getenv(MLX5_SHUT_UP_BF);
1966         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1967         if (config->dbnc == MLX5_ARG_UNSET)
1968                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1969         else
1970                 setenv(MLX5_SHUT_UP_BF,
1971                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1972         return value;
1973 }
1974
1975 static void
1976 mlx5_restore_doorbell_mapping_env(int value)
1977 {
1978         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1979         /* Restore the original environment variable state. */
1980         if (value == MLX5_ARG_UNSET)
1981                 unsetenv(MLX5_SHUT_UP_BF);
1982         else
1983                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1984 }
1985
1986 /**
1987  * Extract pdn of PD object using DV API.
1988  *
1989  * @param[in] pd
1990  *   Pointer to the verbs PD object.
1991  * @param[out] pdn
1992  *   Pointer to the PD object number variable.
1993  *
1994  * @return
1995  *   0 on success, error value otherwise.
1996  */
1997 int
1998 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1999 {
2000 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2001         struct mlx5dv_obj obj;
2002         struct mlx5dv_pd pd_info;
2003         int ret = 0;
2004
2005         obj.pd.in = pd;
2006         obj.pd.out = &pd_info;
2007         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2008         if (ret) {
2009                 DRV_LOG(DEBUG, "Fail to get PD object info");
2010                 return ret;
2011         }
2012         *pdn = pd_info.pdn;
2013         return 0;
2014 #else
2015         (void)pd;
2016         (void)pdn;
2017         return -ENOTSUP;
2018 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2019 }
2020
2021 /**
2022  * Function API to open IB device.
2023  *
2024  * This function calls the Linux glue APIs to open a device.
2025  *
2026  * @param[in] spawn
2027  *   Pointer to the IB device attributes (name, port, etc).
2028  * @param[out] config
2029  *   Pointer to device configuration structure.
2030  * @param[out] sh
2031  *   Pointer to shared context structure.
2032  *
2033  * @return
2034  *   0 on success, a positive error value otherwise.
2035  */
2036 int
2037 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2038                      const struct mlx5_dev_config *config,
2039                      struct mlx5_dev_ctx_shared *sh)
2040 {
2041         int dbmap_env;
2042         int err = 0;
2043
2044         sh->numa_node = spawn->pci_dev->device.numa_node;
2045         pthread_mutex_init(&sh->txpp.mutex, NULL);
2046         /*
2047          * Configure environment variable "MLX5_BF_SHUT_UP"
2048          * before the device creation. The rdma_core library
2049          * checks the variable at device creation and
2050          * stores the result internally.
2051          */
2052         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2053         /* Try to open IB device with DV first, then usual Verbs. */
2054         errno = 0;
2055         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2056         if (sh->ctx) {
2057                 sh->devx = 1;
2058                 DRV_LOG(DEBUG, "DevX is supported");
2059                 /* The device is created, no need for environment. */
2060                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2061         } else {
2062                 /* The environment variable is still configured. */
2063                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2064                 err = errno ? errno : ENODEV;
2065                 /*
2066                  * The environment variable is not needed anymore,
2067                  * all device creation attempts are completed.
2068                  */
2069                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2070                 if (!sh->ctx)
2071                         return err;
2072                 DRV_LOG(DEBUG, "DevX is NOT supported");
2073                 err = 0;
2074         }
2075         return err;
2076 }
2077
2078 /**
2079  * Install shared asynchronous device events handler.
2080  * This function is implemented to support event sharing
2081  * between multiple ports of single IB device.
2082  *
2083  * @param sh
2084  *   Pointer to mlx5_dev_ctx_shared object.
2085  */
2086 void
2087 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2088 {
2089         int ret;
2090         int flags;
2091
2092         sh->intr_handle.fd = -1;
2093         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2094         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2095                     F_SETFL, flags | O_NONBLOCK);
2096         if (ret) {
2097                 DRV_LOG(INFO, "failed to change file descriptor async event"
2098                         " queue");
2099         } else {
2100                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2101                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2102                 if (rte_intr_callback_register(&sh->intr_handle,
2103                                         mlx5_dev_interrupt_handler, sh)) {
2104                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2105                         sh->intr_handle.fd = -1;
2106                 }
2107         }
2108         if (sh->devx) {
2109 #ifdef HAVE_IBV_DEVX_ASYNC
2110                 sh->intr_handle_devx.fd = -1;
2111                 sh->devx_comp =
2112                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2113                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2114                 if (!devx_comp) {
2115                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2116                         return;
2117                 }
2118                 flags = fcntl(devx_comp->fd, F_GETFL);
2119                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2120                 if (ret) {
2121                         DRV_LOG(INFO, "failed to change file descriptor"
2122                                 " devx comp");
2123                         return;
2124                 }
2125                 sh->intr_handle_devx.fd = devx_comp->fd;
2126                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2127                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2128                                         mlx5_dev_interrupt_handler_devx, sh)) {
2129                         DRV_LOG(INFO, "Fail to install the devx shared"
2130                                 " interrupt.");
2131                         sh->intr_handle_devx.fd = -1;
2132                 }
2133 #endif /* HAVE_IBV_DEVX_ASYNC */
2134         }
2135 }
2136
2137 /**
2138  * Uninstall shared asynchronous device events handler.
2139  * This function is implemented to support event sharing
2140  * between multiple ports of single IB device.
2141  *
2142  * @param dev
2143  *   Pointer to mlx5_dev_ctx_shared object.
2144  */
2145 void
2146 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2147 {
2148         if (sh->intr_handle.fd >= 0)
2149                 mlx5_intr_callback_unregister(&sh->intr_handle,
2150                                               mlx5_dev_interrupt_handler, sh);
2151 #ifdef HAVE_IBV_DEVX_ASYNC
2152         if (sh->intr_handle_devx.fd >= 0)
2153                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2154                                   mlx5_dev_interrupt_handler_devx, sh);
2155         if (sh->devx_comp)
2156                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2157 #endif
2158 }
2159
2160 /**
2161  * Read statistics by a named counter.
2162  *
2163  * @param[in] priv
2164  *   Pointer to the private device data structure.
2165  * @param[in] ctr_name
2166  *   Pointer to the name of the statistic counter to read
2167  * @param[out] stat
2168  *   Pointer to read statistic value.
2169  * @return
2170  *   0 on success and stat is valud, 1 if failed to read the value
2171  *   rte_errno is set.
2172  *
2173  */
2174 int
2175 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2176                       uint64_t *stat)
2177 {
2178         int fd;
2179
2180         if (priv->sh) {
2181                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2182                       priv->sh->ibdev_path,
2183                       priv->dev_port,
2184                       ctr_name);
2185                 fd = open(path, O_RDONLY);
2186                 /*
2187                  * in switchdev the file location is not per port
2188                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2189                  */
2190                 if (fd == -1) {
2191                         MKSTR(path1, "%s/hw_counters/%s",
2192                               priv->sh->ibdev_path,
2193                               ctr_name);
2194                         fd = open(path1, O_RDONLY);
2195                 }
2196                 if (fd != -1) {
2197                         char buf[21] = {'\0'};
2198                         ssize_t n = read(fd, buf, sizeof(buf));
2199
2200                         close(fd);
2201                         if (n != -1) {
2202                                 *stat = strtoull(buf, NULL, 10);
2203                                 return 0;
2204                         }
2205                 }
2206         }
2207         *stat = 0;
2208         return 1;
2209 }
2210
2211 /**
2212  * Set the reg_mr and dereg_mr call backs
2213  *
2214  * @param reg_mr_cb[out]
2215  *   Pointer to reg_mr func
2216  * @param dereg_mr_cb[out]
2217  *   Pointer to dereg_mr func
2218  *
2219  */
2220 void
2221 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2222                       mlx5_dereg_mr_t *dereg_mr_cb)
2223 {
2224         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2225         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2226 }
2227
2228 /**
2229  * Remove a MAC address from device
2230  *
2231  * @param dev
2232  *   Pointer to Ethernet device structure.
2233  * @param index
2234  *   MAC address index.
2235  */
2236 void
2237 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2238 {
2239         struct mlx5_priv *priv = dev->data->dev_private;
2240         const int vf = priv->config.vf;
2241
2242         if (vf)
2243                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2244                                         mlx5_ifindex(dev), priv->mac_own,
2245                                         &dev->data->mac_addrs[index], index);
2246 }
2247
2248 /**
2249  * Adds a MAC address to the device
2250  *
2251  * @param dev
2252  *   Pointer to Ethernet device structure.
2253  * @param mac_addr
2254  *   MAC address to register.
2255  * @param index
2256  *   MAC address index.
2257  *
2258  * @return
2259  *   0 on success, a negative errno value otherwise
2260  */
2261 int
2262 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2263                      uint32_t index)
2264 {
2265         struct mlx5_priv *priv = dev->data->dev_private;
2266         const int vf = priv->config.vf;
2267         int ret = 0;
2268
2269         if (vf)
2270                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2271                                            mlx5_ifindex(dev), priv->mac_own,
2272                                            mac, index);
2273         return ret;
2274 }
2275
2276 /**
2277  * Modify a VF MAC address
2278  *
2279  * @param priv
2280  *   Pointer to device private data.
2281  * @param mac_addr
2282  *   MAC address to modify into.
2283  * @param iface_idx
2284  *   Net device interface index
2285  * @param vf_index
2286  *   VF index
2287  *
2288  * @return
2289  *   0 on success, a negative errno value otherwise
2290  */
2291 int
2292 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2293                            unsigned int iface_idx,
2294                            struct rte_ether_addr *mac_addr,
2295                            int vf_index)
2296 {
2297         return mlx5_nl_vf_mac_addr_modify
2298                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2299 }
2300
2301 /**
2302  * Set device promiscuous mode
2303  *
2304  * @param dev
2305  *   Pointer to Ethernet device structure.
2306  * @param enable
2307  *   0 - promiscuous is disabled, otherwise - enabled
2308  *
2309  * @return
2310  *   0 on success, a negative error value otherwise
2311  */
2312 int
2313 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2314 {
2315         struct mlx5_priv *priv = dev->data->dev_private;
2316
2317         return mlx5_nl_promisc(priv->nl_socket_route,
2318                                mlx5_ifindex(dev), !!enable);
2319 }
2320
2321 /**
2322  * Set device promiscuous mode
2323  *
2324  * @param dev
2325  *   Pointer to Ethernet device structure.
2326  * @param enable
2327  *   0 - all multicase is disabled, otherwise - enabled
2328  *
2329  * @return
2330  *   0 on success, a negative error value otherwise
2331  */
2332 int
2333 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2334 {
2335         struct mlx5_priv *priv = dev->data->dev_private;
2336
2337         return mlx5_nl_allmulti(priv->nl_socket_route,
2338                                 mlx5_ifindex(dev), !!enable);
2339 }
2340
2341 /**
2342  * Flush device MAC addresses
2343  *
2344  * @param dev
2345  *   Pointer to Ethernet device structure.
2346  *
2347  */
2348 void
2349 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2350 {
2351         struct mlx5_priv *priv = dev->data->dev_private;
2352
2353         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2354                                dev->data->mac_addrs,
2355                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2356 }
2357
2358 const struct eth_dev_ops mlx5_os_dev_ops = {
2359         .dev_configure = mlx5_dev_configure,
2360         .dev_start = mlx5_dev_start,
2361         .dev_stop = mlx5_dev_stop,
2362         .dev_set_link_down = mlx5_set_link_down,
2363         .dev_set_link_up = mlx5_set_link_up,
2364         .dev_close = mlx5_dev_close,
2365         .promiscuous_enable = mlx5_promiscuous_enable,
2366         .promiscuous_disable = mlx5_promiscuous_disable,
2367         .allmulticast_enable = mlx5_allmulticast_enable,
2368         .allmulticast_disable = mlx5_allmulticast_disable,
2369         .link_update = mlx5_link_update,
2370         .stats_get = mlx5_stats_get,
2371         .stats_reset = mlx5_stats_reset,
2372         .xstats_get = mlx5_xstats_get,
2373         .xstats_reset = mlx5_xstats_reset,
2374         .xstats_get_names = mlx5_xstats_get_names,
2375         .fw_version_get = mlx5_fw_version_get,
2376         .dev_infos_get = mlx5_dev_infos_get,
2377         .read_clock = mlx5_txpp_read_clock,
2378         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2379         .vlan_filter_set = mlx5_vlan_filter_set,
2380         .rx_queue_setup = mlx5_rx_queue_setup,
2381         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2382         .tx_queue_setup = mlx5_tx_queue_setup,
2383         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2384         .rx_queue_release = mlx5_rx_queue_release,
2385         .tx_queue_release = mlx5_tx_queue_release,
2386         .rx_queue_start = mlx5_rx_queue_start,
2387         .rx_queue_stop = mlx5_rx_queue_stop,
2388         .tx_queue_start = mlx5_tx_queue_start,
2389         .tx_queue_stop = mlx5_tx_queue_stop,
2390         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2391         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2392         .mac_addr_remove = mlx5_mac_addr_remove,
2393         .mac_addr_add = mlx5_mac_addr_add,
2394         .mac_addr_set = mlx5_mac_addr_set,
2395         .set_mc_addr_list = mlx5_set_mc_addr_list,
2396         .mtu_set = mlx5_dev_set_mtu,
2397         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2398         .vlan_offload_set = mlx5_vlan_offload_set,
2399         .reta_update = mlx5_dev_rss_reta_update,
2400         .reta_query = mlx5_dev_rss_reta_query,
2401         .rss_hash_update = mlx5_rss_hash_update,
2402         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2403         .filter_ctrl = mlx5_dev_filter_ctrl,
2404         .rx_descriptor_status = mlx5_rx_descriptor_status,
2405         .tx_descriptor_status = mlx5_tx_descriptor_status,
2406         .rxq_info_get = mlx5_rxq_info_get,
2407         .txq_info_get = mlx5_txq_info_get,
2408         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2409         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2410         .rx_queue_count = mlx5_rx_queue_count,
2411         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2412         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2413         .is_removed = mlx5_is_removed,
2414         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2415         .get_module_info = mlx5_get_module_info,
2416         .get_module_eeprom = mlx5_get_module_eeprom,
2417         .hairpin_cap_get = mlx5_hairpin_cap_get,
2418         .mtr_ops_get = mlx5_flow_meter_ops_get,
2419 };
2420
2421 /* Available operations from secondary process. */
2422 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2423         .stats_get = mlx5_stats_get,
2424         .stats_reset = mlx5_stats_reset,
2425         .xstats_get = mlx5_xstats_get,
2426         .xstats_reset = mlx5_xstats_reset,
2427         .xstats_get_names = mlx5_xstats_get_names,
2428         .fw_version_get = mlx5_fw_version_get,
2429         .dev_infos_get = mlx5_dev_infos_get,
2430         .read_clock = mlx5_txpp_read_clock,
2431         .rx_queue_start = mlx5_rx_queue_start,
2432         .rx_queue_stop = mlx5_rx_queue_stop,
2433         .tx_queue_start = mlx5_tx_queue_start,
2434         .tx_queue_stop = mlx5_tx_queue_stop,
2435         .rx_descriptor_status = mlx5_rx_descriptor_status,
2436         .tx_descriptor_status = mlx5_tx_descriptor_status,
2437         .rxq_info_get = mlx5_rxq_info_get,
2438         .txq_info_get = mlx5_txq_info_get,
2439         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2440         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2441         .get_module_info = mlx5_get_module_info,
2442         .get_module_eeprom = mlx5_get_module_eeprom,
2443 };
2444
2445 /* Available operations in flow isolated mode. */
2446 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2447         .dev_configure = mlx5_dev_configure,
2448         .dev_start = mlx5_dev_start,
2449         .dev_stop = mlx5_dev_stop,
2450         .dev_set_link_down = mlx5_set_link_down,
2451         .dev_set_link_up = mlx5_set_link_up,
2452         .dev_close = mlx5_dev_close,
2453         .promiscuous_enable = mlx5_promiscuous_enable,
2454         .promiscuous_disable = mlx5_promiscuous_disable,
2455         .allmulticast_enable = mlx5_allmulticast_enable,
2456         .allmulticast_disable = mlx5_allmulticast_disable,
2457         .link_update = mlx5_link_update,
2458         .stats_get = mlx5_stats_get,
2459         .stats_reset = mlx5_stats_reset,
2460         .xstats_get = mlx5_xstats_get,
2461         .xstats_reset = mlx5_xstats_reset,
2462         .xstats_get_names = mlx5_xstats_get_names,
2463         .fw_version_get = mlx5_fw_version_get,
2464         .dev_infos_get = mlx5_dev_infos_get,
2465         .read_clock = mlx5_txpp_read_clock,
2466         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2467         .vlan_filter_set = mlx5_vlan_filter_set,
2468         .rx_queue_setup = mlx5_rx_queue_setup,
2469         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2470         .tx_queue_setup = mlx5_tx_queue_setup,
2471         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2472         .rx_queue_release = mlx5_rx_queue_release,
2473         .tx_queue_release = mlx5_tx_queue_release,
2474         .rx_queue_start = mlx5_rx_queue_start,
2475         .rx_queue_stop = mlx5_rx_queue_stop,
2476         .tx_queue_start = mlx5_tx_queue_start,
2477         .tx_queue_stop = mlx5_tx_queue_stop,
2478         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2479         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2480         .mac_addr_remove = mlx5_mac_addr_remove,
2481         .mac_addr_add = mlx5_mac_addr_add,
2482         .mac_addr_set = mlx5_mac_addr_set,
2483         .set_mc_addr_list = mlx5_set_mc_addr_list,
2484         .mtu_set = mlx5_dev_set_mtu,
2485         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2486         .vlan_offload_set = mlx5_vlan_offload_set,
2487         .filter_ctrl = mlx5_dev_filter_ctrl,
2488         .rx_descriptor_status = mlx5_rx_descriptor_status,
2489         .tx_descriptor_status = mlx5_tx_descriptor_status,
2490         .rxq_info_get = mlx5_rxq_info_get,
2491         .txq_info_get = mlx5_txq_info_get,
2492         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2493         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2494         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2495         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2496         .is_removed = mlx5_is_removed,
2497         .get_module_info = mlx5_get_module_info,
2498         .get_module_eeprom = mlx5_get_module_eeprom,
2499         .hairpin_cap_get = mlx5_hairpin_cap_get,
2500         .mtr_ops_get = mlx5_flow_meter_ops_get,
2501 };