drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /* rte flow indexed pool configuration. */
  71 static struct mlx5_indexed_pool_config icfg[] = {
  72         {
  73                 .size = sizeof(struct rte_flow),
  74                 .trunk_size = 64,
  75                 .need_lock = 1,
  76                 .release_mem_en = 0,
  77                 .malloc = mlx5_malloc,
  78                 .free = mlx5_free,
  79                 .per_core_cache = 0,
  80                 .type = "ctl_flow_ipool",
  81         },
  82         {
  83                 .size = sizeof(struct rte_flow),
  84                 .trunk_size = 64,
  85                 .grow_trunk = 3,
  86                 .grow_shift = 2,
  87                 .need_lock = 1,
  88                 .release_mem_en = 0,
  89                 .malloc = mlx5_malloc,
  90                 .free = mlx5_free,
  91                 .per_core_cache = 1 << 14,
  92                 .type = "rte_flow_ipool",
  93         },
  94         {
  95                 .size = sizeof(struct rte_flow),
  96                 .trunk_size = 64,
  97                 .grow_trunk = 3,
  98                 .grow_shift = 2,
  99                 .need_lock = 1,
 100                 .release_mem_en = 0,
 101                 .malloc = mlx5_malloc,
 102                 .free = mlx5_free,
 103                 .per_core_cache = 0,
 104                 .type = "mcp_flow_ipool",
 105         },
 106 };
 107
 108 /**
 109  * Set the completion channel file descriptor interrupt as non-blocking.
 110  *
 111  * @param[in] rxq_obj
 112  *   Pointer to RQ channel object, which includes the channel fd
 113  *
 114  * @param[out] fd
 115  *   The file descriptor (representing the intetrrupt) used in this channel.
 116  *
 117  * @return
 118  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 119  */
 120 int
 121 mlx5_os_set_nonblock_channel_fd(int fd)
 122 {
 123         int flags;
 124
 125         flags = fcntl(fd, F_GETFL);
 126         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 127 }
 128
 129 /**
 130  * Get mlx5 device attributes. The glue function query_device_ex() is called
 131  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 132  * device attributes from the glue out parameter.
 133  *
 134  * @param cdev
 135  *   Pointer to mlx5 device.
 136  *
 137  * @param device_attr
 138  *   Pointer to mlx5 device attributes.
 139  *
 140  * @return
 141  *   0 on success, non zero error number otherwise
 142  */
 143 int
 144 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 145                      struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_context *ctx = cdev->ctx;
 149         struct ibv_device_attr_ex attr_ex;
 150
 151         memset(device_attr, 0, sizeof(*device_attr));
 152         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 153         if (err)
 154                 return err;
 155         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 156         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 157         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 158         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 159         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 160         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 161         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 162         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 163         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 164         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 165         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 166         device_attr->max_rwq_indirection_table_size =
 167                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 168         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 169         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 170
 171         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 172         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 173         if (err)
 174                 return err;
 175
 176         device_attr->flags = dv_attr.flags;
 177         device_attr->comp_mask = dv_attr.comp_mask;
 178 #ifdef HAVE_IBV_MLX5_MOD_SWP
 179         device_attr->sw_parsing_offloads =
 180                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 181 #endif
 182         device_attr->min_single_stride_log_num_of_bytes =
 183                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 184         device_attr->max_single_stride_log_num_of_bytes =
 185                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 186         device_attr->min_single_wqe_log_num_of_strides =
 187                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 188         device_attr->max_single_wqe_log_num_of_strides =
 189                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 190         device_attr->stride_supported_qpts =
 191                 dv_attr.striding_rq_caps.supported_qpts;
 192 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 193         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 194 #endif
 195         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 196                 sizeof(device_attr->fw_ver));
 197
 198         return err;
 199 }
 200
 201 /**
 202  * Detect misc5 support or not
 203  *
 204  * @param[in] priv
 205  *   Device private data pointer
 206  */
 207 #ifdef HAVE_MLX5DV_DR
 208 static void
 209 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 210 {
 211 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 212         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 213          * Case: IPv4--->UDP--->VxLAN--->vni
 214          */
 215         void *tbl;
 216         struct mlx5_flow_dv_match_params matcher_mask;
 217         void *match_m;
 218         void *matcher;
 219         void *headers_m;
 220         void *misc5_m;
 221         uint32_t *tunnel_header_m;
 222         struct mlx5dv_flow_matcher_attr dv_attr;
 223
 224         memset(&matcher_mask, 0, sizeof(matcher_mask));
 225         matcher_mask.size = sizeof(matcher_mask.buf);
 226         match_m = matcher_mask.buf;
 227         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 228         misc5_m = MLX5_ADDR_OF(fte_match_param,
 229                                match_m, misc_parameters_5);
 230         tunnel_header_m = (uint32_t *)
 231                                 MLX5_ADDR_OF(fte_match_set_misc5,
 232                                 misc5_m, tunnel_header_1);
 233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 235         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 236         *tunnel_header_m = 0xffffff;
 237
 238         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 239         if (!tbl) {
 240                 DRV_LOG(INFO, "No SW steering support");
 241                 return;
 242         }
 243         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 244         dv_attr.match_mask = (void *)&matcher_mask,
 245         dv_attr.match_criteria_enable =
 246                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 247                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 248         dv_attr.priority = 3;
 249 #ifdef HAVE_MLX5DV_DR_ESWITCH
 250         void *misc2_m;
 251         if (priv->config.dv_esw_en) {
 252                 /* FDB enabled reg_c_0 */
 253                 dv_attr.match_criteria_enable |=
 254                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 255                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 256                                        match_m, misc_parameters_2);
 257                 MLX5_SET(fte_match_set_misc2, misc2_m,
 258                          metadata_reg_c_0, 0xffff);
 259         }
 260 #endif
 261         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 262                                                     &dv_attr, tbl);
 263         if (matcher) {
 264                 priv->sh->misc5_cap = 1;
 265                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 266         }
 267         mlx5_glue->dr_destroy_flow_tbl(tbl);
 268 #else
 269         RTE_SET_USED(priv);
 270 #endif
 271 }
 272 #endif
 273
 274 /**
 275  * Initialize DR related data within private structure.
 276  * Routine checks the reference counter and does actual
 277  * resources creation/initialization only if counter is zero.
 278  *
 279  * @param[in] priv
 280  *   Pointer to the private device data structure.
 281  *
 282  * @return
 283  *   Zero on success, positive error code otherwise.
 284  */
 285 static int
 286 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 287 {
 288         struct mlx5_dev_ctx_shared *sh = priv->sh;
 289         char s[MLX5_NAME_SIZE] __rte_unused;
 290         int err;
 291
 292         MLX5_ASSERT(sh && sh->refcnt);
 293         if (sh->refcnt > 1)
 294                 return 0;
 295         err = mlx5_alloc_table_hash_list(priv);
 296         if (err)
 297                 goto error;
 298         /* The resources below are only valid with DV support. */
 299 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 300         /* Init port id action list. */
 301         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 302         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 303                                                    flow_dv_port_id_create_cb,
 304                                                    flow_dv_port_id_match_cb,
 305                                                    flow_dv_port_id_remove_cb,
 306                                                    flow_dv_port_id_clone_cb,
 307                                                  flow_dv_port_id_clone_free_cb);
 308         if (!sh->port_id_action_list)
 309                 goto error;
 310         /* Init push vlan action list. */
 311         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 312         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 313                                                     flow_dv_push_vlan_create_cb,
 314                                                     flow_dv_push_vlan_match_cb,
 315                                                     flow_dv_push_vlan_remove_cb,
 316                                                     flow_dv_push_vlan_clone_cb,
 317                                                flow_dv_push_vlan_clone_free_cb);
 318         if (!sh->push_vlan_action_list)
 319                 goto error;
 320         /* Init sample action list. */
 321         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 322         sh->sample_action_list = mlx5_list_create(s, sh, true,
 323                                                   flow_dv_sample_create_cb,
 324                                                   flow_dv_sample_match_cb,
 325                                                   flow_dv_sample_remove_cb,
 326                                                   flow_dv_sample_clone_cb,
 327                                                   flow_dv_sample_clone_free_cb);
 328         if (!sh->sample_action_list)
 329                 goto error;
 330         /* Init dest array action list. */
 331         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 332         sh->dest_array_list = mlx5_list_create(s, sh, true,
 333                                                flow_dv_dest_array_create_cb,
 334                                                flow_dv_dest_array_match_cb,
 335                                                flow_dv_dest_array_remove_cb,
 336                                                flow_dv_dest_array_clone_cb,
 337                                               flow_dv_dest_array_clone_free_cb);
 338         if (!sh->dest_array_list)
 339                 goto error;
 340 #endif
 341 #ifdef HAVE_MLX5DV_DR
 342         void *domain;
 343
 344         /* Reference counter is zero, we should initialize structures. */
 345         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 346                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 347         if (!domain) {
 348                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 349                 err = errno;
 350                 goto error;
 351         }
 352         sh->rx_domain = domain;
 353         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 354                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 355         if (!domain) {
 356                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 357                 err = errno;
 358                 goto error;
 359         }
 360         sh->tx_domain = domain;
 361 #ifdef HAVE_MLX5DV_DR_ESWITCH
 362         if (priv->config.dv_esw_en) {
 363                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 364                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 365                 if (!domain) {
 366                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 367                         err = errno;
 368                         goto error;
 369                 }
 370                 sh->fdb_domain = domain;
 371         }
 372         /*
 373          * The drop action is just some dummy placeholder in rdma-core. It
 374          * does not belong to domains and has no any attributes, and, can be
 375          * shared by the entire device.
 376          */
 377         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 378         if (!sh->dr_drop_action) {
 379                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 380                 err = errno;
 381                 goto error;
 382         }
 383 #endif
 384         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 385                 err = mlx5_alloc_tunnel_hub(sh);
 386         if (err) {
 387                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 388                 goto error;
 389         }
 390         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 391                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 392                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 393                 if (sh->fdb_domain)
 394                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 395         }
 396         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 397         if (!priv->config.allow_duplicate_pattern) {
 398 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 399                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 400 #endif
 401                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 402                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 403                 if (sh->fdb_domain)
 404                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 405         }
 406
 407         __mlx5_discovery_misc5_cap(priv);
 408 #endif /* HAVE_MLX5DV_DR */
 409         sh->default_miss_action =
 410                         mlx5_glue->dr_create_flow_action_default_miss();
 411         if (!sh->default_miss_action)
 412                 DRV_LOG(WARNING, "Default miss action is not supported.");
 413         return 0;
 414 error:
 415         /* Rollback the created objects. */
 416         if (sh->rx_domain) {
 417                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 418                 sh->rx_domain = NULL;
 419         }
 420         if (sh->tx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 422                 sh->tx_domain = NULL;
 423         }
 424         if (sh->fdb_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 426                 sh->fdb_domain = NULL;
 427         }
 428         if (sh->dr_drop_action) {
 429                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 430                 sh->dr_drop_action = NULL;
 431         }
 432         if (sh->pop_vlan_action) {
 433                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 434                 sh->pop_vlan_action = NULL;
 435         }
 436         if (sh->encaps_decaps) {
 437                 mlx5_hlist_destroy(sh->encaps_decaps);
 438                 sh->encaps_decaps = NULL;
 439         }
 440         if (sh->modify_cmds) {
 441                 mlx5_hlist_destroy(sh->modify_cmds);
 442                 sh->modify_cmds = NULL;
 443         }
 444         if (sh->tag_table) {
 445                 /* tags should be destroyed with flow before. */
 446                 mlx5_hlist_destroy(sh->tag_table);
 447                 sh->tag_table = NULL;
 448         }
 449         if (sh->tunnel_hub) {
 450                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 451                 sh->tunnel_hub = NULL;
 452         }
 453         mlx5_free_table_hash_list(priv);
 454         if (sh->port_id_action_list) {
 455                 mlx5_list_destroy(sh->port_id_action_list);
 456                 sh->port_id_action_list = NULL;
 457         }
 458         if (sh->push_vlan_action_list) {
 459                 mlx5_list_destroy(sh->push_vlan_action_list);
 460                 sh->push_vlan_action_list = NULL;
 461         }
 462         if (sh->sample_action_list) {
 463                 mlx5_list_destroy(sh->sample_action_list);
 464                 sh->sample_action_list = NULL;
 465         }
 466         if (sh->dest_array_list) {
 467                 mlx5_list_destroy(sh->dest_array_list);
 468                 sh->dest_array_list = NULL;
 469         }
 470         return err;
 471 }
 472
 473 /**
 474  * Destroy DR related data within private structure.
 475  *
 476  * @param[in] priv
 477  *   Pointer to the private device data structure.
 478  */
 479 void
 480 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 481 {
 482         struct mlx5_dev_ctx_shared *sh = priv->sh;
 483
 484         MLX5_ASSERT(sh && sh->refcnt);
 485         if (sh->refcnt > 1)
 486                 return;
 487 #ifdef HAVE_MLX5DV_DR
 488         if (sh->rx_domain) {
 489                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 490                 sh->rx_domain = NULL;
 491         }
 492         if (sh->tx_domain) {
 493                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 494                 sh->tx_domain = NULL;
 495         }
 496 #ifdef HAVE_MLX5DV_DR_ESWITCH
 497         if (sh->fdb_domain) {
 498                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 499                 sh->fdb_domain = NULL;
 500         }
 501         if (sh->dr_drop_action) {
 502                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 503                 sh->dr_drop_action = NULL;
 504         }
 505 #endif
 506         if (sh->pop_vlan_action) {
 507                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 508                 sh->pop_vlan_action = NULL;
 509         }
 510 #endif /* HAVE_MLX5DV_DR */
 511         if (sh->default_miss_action)
 512                 mlx5_glue->destroy_flow_action
 513                                 (sh->default_miss_action);
 514         if (sh->encaps_decaps) {
 515                 mlx5_hlist_destroy(sh->encaps_decaps);
 516                 sh->encaps_decaps = NULL;
 517         }
 518         if (sh->modify_cmds) {
 519                 mlx5_hlist_destroy(sh->modify_cmds);
 520                 sh->modify_cmds = NULL;
 521         }
 522         if (sh->tag_table) {
 523                 /* tags should be destroyed with flow before. */
 524                 mlx5_hlist_destroy(sh->tag_table);
 525                 sh->tag_table = NULL;
 526         }
 527         if (sh->tunnel_hub) {
 528                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 529                 sh->tunnel_hub = NULL;
 530         }
 531         mlx5_free_table_hash_list(priv);
 532         if (sh->port_id_action_list) {
 533                 mlx5_list_destroy(sh->port_id_action_list);
 534                 sh->port_id_action_list = NULL;
 535         }
 536         if (sh->push_vlan_action_list) {
 537                 mlx5_list_destroy(sh->push_vlan_action_list);
 538                 sh->push_vlan_action_list = NULL;
 539         }
 540         if (sh->sample_action_list) {
 541                 mlx5_list_destroy(sh->sample_action_list);
 542                 sh->sample_action_list = NULL;
 543         }
 544         if (sh->dest_array_list) {
 545                 mlx5_list_destroy(sh->dest_array_list);
 546                 sh->dest_array_list = NULL;
 547         }
 548 }
 549
 550 /**
 551  * Initialize shared data between primary and secondary process.
 552  *
 553  * A memzone is reserved by primary process and secondary processes attach to
 554  * the memzone.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 mlx5_init_shared_data(void)
 561 {
 562         const struct rte_memzone *mz;
 563         int ret = 0;
 564
 565         rte_spinlock_lock(&mlx5_shared_data_lock);
 566         if (mlx5_shared_data == NULL) {
 567                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 568                         /* Allocate shared memory. */
 569                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 570                                                  sizeof(*mlx5_shared_data),
 571                                                  SOCKET_ID_ANY, 0);
 572                         if (mz == NULL) {
 573                                 DRV_LOG(ERR,
 574                                         "Cannot allocate mlx5 shared data");
 575                                 ret = -rte_errno;
 576                                 goto error;
 577                         }
 578                         mlx5_shared_data = mz->addr;
 579                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 580                         rte_spinlock_init(&mlx5_shared_data->lock);
 581                 } else {
 582                         /* Lookup allocated shared memory. */
 583                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 584                         if (mz == NULL) {
 585                                 DRV_LOG(ERR,
 586                                         "Cannot attach mlx5 shared data");
 587                                 ret = -rte_errno;
 588                                 goto error;
 589                         }
 590                         mlx5_shared_data = mz->addr;
 591                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 592                 }
 593         }
 594 error:
 595         rte_spinlock_unlock(&mlx5_shared_data_lock);
 596         return ret;
 597 }
 598
 599 /**
 600  * PMD global initialization.
 601  *
 602  * Independent from individual device, this function initializes global
 603  * per-PMD data structures distinguishing primary and secondary processes.
 604  * Hence, each initialization is called once per a process.
 605  *
 606  * @return
 607  *   0 on success, a negative errno value otherwise and rte_errno is set.
 608  */
 609 static int
 610 mlx5_init_once(void)
 611 {
 612         struct mlx5_shared_data *sd;
 613         struct mlx5_local_data *ld = &mlx5_local_data;
 614         int ret = 0;
 615
 616         if (mlx5_init_shared_data())
 617                 return -rte_errno;
 618         sd = mlx5_shared_data;
 619         MLX5_ASSERT(sd);
 620         rte_spinlock_lock(&sd->lock);
 621         switch (rte_eal_process_type()) {
 622         case RTE_PROC_PRIMARY:
 623                 if (sd->init_done)
 624                         break;
 625                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 626                                            mlx5_mp_os_primary_handle);
 627                 if (ret)
 628                         goto out;
 629                 sd->init_done = true;
 630                 break;
 631         case RTE_PROC_SECONDARY:
 632                 if (ld->init_done)
 633                         break;
 634                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 635                                              mlx5_mp_os_secondary_handle);
 636                 if (ret)
 637                         goto out;
 638                 ++sd->secondary_cnt;
 639                 ld->init_done = true;
 640                 break;
 641         default:
 642                 break;
 643         }
 644 out:
 645         rte_spinlock_unlock(&sd->lock);
 646         return ret;
 647 }
 648
 649 /**
 650  * DV flow counter mode detect and config.
 651  *
 652  * @param dev
 653  *   Pointer to rte_eth_dev structure.
 654  *
 655  */
 656 static void
 657 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 658 {
 659 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 660         struct mlx5_priv *priv = dev->data->dev_private;
 661         struct mlx5_dev_ctx_shared *sh = priv->sh;
 662         bool fallback;
 663
 664 #ifndef HAVE_IBV_DEVX_ASYNC
 665         fallback = true;
 666 #else
 667         fallback = false;
 668         if (!sh->devx || !priv->config.dv_flow_en ||
 669             !priv->config.hca_attr.flow_counters_dump ||
 670             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 671             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 672                 fallback = true;
 673 #endif
 674         if (fallback)
 675                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 676                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 677                         priv->config.hca_attr.flow_counters_dump,
 678                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 679         /* Initialize fallback mode only on the port initializes sh. */
 680         if (sh->refcnt == 1)
 681                 sh->cmng.counter_fallback = fallback;
 682         else if (fallback != sh->cmng.counter_fallback)
 683                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 684                         "with others:%d.", PORT_ID(priv), fallback);
 685 #endif
 686 }
 687
 688 /**
 689  * DR flow drop action support detect.
 690  *
 691  * @param dev
 692  *   Pointer to rte_eth_dev structure.
 693  *
 694  */
 695 static void
 696 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 697 {
 698 #ifdef HAVE_MLX5DV_DR
 699         struct mlx5_priv *priv = dev->data->dev_private;
 700
 701         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 702                 return;
 703         /**
 704          * DR supports drop action placeholder when it is supported;
 705          * otherwise, use the queue drop action.
 706          */
 707         if (mlx5_flow_discover_dr_action_support(dev))
 708                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 709         else
 710                 priv->root_drop_action = priv->sh->dr_drop_action;
 711 #endif
 712 }
 713
 714 static void
 715 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 716 {
 717         struct mlx5_priv *priv = dev->data->dev_private;
 718         void *ctx = priv->sh->cdev->ctx;
 719
 720         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 721         if (!priv->q_counters) {
 722                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 723                 struct ibv_wq *wq;
 724
 725                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 726                         "by DevX - fall-back to use the kernel driver global "
 727                         "queue counter.", dev->data->port_id);
 728                 /* Create WQ by kernel and query its queue counter ID. */
 729                 if (cq) {
 730                         wq = mlx5_glue->create_wq(ctx,
 731                                                   &(struct ibv_wq_init_attr){
 732                                                     .wq_type = IBV_WQT_RQ,
 733                                                     .max_wr = 1,
 734                                                     .max_sge = 1,
 735                                                     .pd = priv->sh->cdev->pd,
 736                                                     .cq = cq,
 737                                                 });
 738                         if (wq) {
 739                                 /* Counter is assigned only on RDY state. */
 740                                 int ret = mlx5_glue->modify_wq(wq,
 741                                                  &(struct ibv_wq_attr){
 742                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 743                                                  .wq_state = IBV_WQS_RDY,
 744                                                 });
 745
 746                                 if (ret == 0)
 747                                         mlx5_devx_cmd_wq_query(wq,
 748                                                          &priv->counter_set_id);
 749                                 claim_zero(mlx5_glue->destroy_wq(wq));
 750                         }
 751                         claim_zero(mlx5_glue->destroy_cq(cq));
 752                 }
 753         } else {
 754                 priv->counter_set_id = priv->q_counters->id;
 755         }
 756         if (priv->counter_set_id == 0)
 757                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 758                         "available.", dev->data->port_id);
 759 }
 760
 761 /**
 762  * Check if representor spawn info match devargs.
 763  *
 764  * @param spawn
 765  *   Verbs device parameters (name, port, switch_info) to spawn.
 766  * @param eth_da
 767  *   Device devargs to probe.
 768  *
 769  * @return
 770  *   Match result.
 771  */
 772 static bool
 773 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 774                        struct rte_eth_devargs *eth_da)
 775 {
 776         struct mlx5_switch_info *switch_info = &spawn->info;
 777         unsigned int p, f;
 778         uint16_t id;
 779         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 780                                                       eth_da->type);
 781
 782         switch (eth_da->type) {
 783         case RTE_ETH_REPRESENTOR_SF:
 784                 if (!(spawn->info.port_name == -1 &&
 785                       switch_info->name_type ==
 786                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 787                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 788                         rte_errno = EBUSY;
 789                         return false;
 790                 }
 791                 break;
 792         case RTE_ETH_REPRESENTOR_VF:
 793                 /* Allows HPF representor index -1 as exception. */
 794                 if (!(spawn->info.port_name == -1 &&
 795                       switch_info->name_type ==
 796                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 797                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 798                         rte_errno = EBUSY;
 799                         return false;
 800                 }
 801                 break;
 802         case RTE_ETH_REPRESENTOR_NONE:
 803                 rte_errno = EBUSY;
 804                 return false;
 805         default:
 806                 rte_errno = ENOTSUP;
 807                 DRV_LOG(ERR, "unsupported representor type");
 808                 return false;
 809         }
 810         /* Check representor ID: */
 811         for (p = 0; p < eth_da->nb_ports; ++p) {
 812                 if (spawn->pf_bond < 0) {
 813                         /* For non-LAG mode, allow and ignore pf. */
 814                         switch_info->pf_num = eth_da->ports[p];
 815                         repr_id = mlx5_representor_id_encode(switch_info,
 816                                                              eth_da->type);
 817                 }
 818                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 819                         id = MLX5_REPRESENTOR_ID
 820                                 (eth_da->ports[p], eth_da->type,
 821                                  eth_da->representor_ports[f]);
 822                         if (repr_id == id)
 823                                 return true;
 824                 }
 825         }
 826         rte_errno = EBUSY;
 827         return false;
 828 }
 829
 830
 831 /**
 832  * Spawn an Ethernet device from Verbs information.
 833  *
 834  * @param dpdk_dev
 835  *   Backing DPDK device.
 836  * @param spawn
 837  *   Verbs device parameters (name, port, switch_info) to spawn.
 838  * @param config
 839  *   Device configuration parameters.
 840  * @param eth_da
 841  *   Device arguments.
 842  *
 843  * @return
 844  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 845  *   is set. The following errors are defined:
 846  *
 847  *   EBUSY: device is not supposed to be spawned.
 848  *   EEXIST: device is already spawned
 849  */
 850 static struct rte_eth_dev *
 851 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 852                struct mlx5_dev_spawn_data *spawn,
 853                struct mlx5_dev_config *config,
 854                struct rte_eth_devargs *eth_da)
 855 {
 856         const struct mlx5_switch_info *switch_info = &spawn->info;
 857         struct mlx5_dev_ctx_shared *sh = NULL;
 858         struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 859         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 860         struct rte_eth_dev *eth_dev = NULL;
 861         struct mlx5_priv *priv = NULL;
 862         int err = 0;
 863         unsigned int hw_padding = 0;
 864         unsigned int mps;
 865         unsigned int mpls_en = 0;
 866         unsigned int swp = 0;
 867         unsigned int mprq = 0;
 868         unsigned int mprq_min_stride_size_n = 0;
 869         unsigned int mprq_max_stride_size_n = 0;
 870         unsigned int mprq_min_stride_num_n = 0;
 871         unsigned int mprq_max_stride_num_n = 0;
 872         struct rte_ether_addr mac;
 873         char name[RTE_ETH_NAME_MAX_LEN];
 874         int own_domain_id = 0;
 875         uint16_t port_id;
 876         struct mlx5_port_info vport_info = { .query_flags = 0 };
 877         int nl_rdma = -1;
 878         int i;
 879
 880         /* Determine if this port representor is supposed to be spawned. */
 881         if (switch_info->representor && dpdk_dev->devargs &&
 882             !mlx5_representor_match(spawn, eth_da))
 883                 return NULL;
 884         /* Build device name. */
 885         if (spawn->pf_bond < 0) {
 886                 /* Single device. */
 887                 if (!switch_info->representor)
 888                         strlcpy(name, dpdk_dev->name, sizeof(name));
 889                 else
 890                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 891                                  dpdk_dev->name,
 892                                  switch_info->name_type ==
 893                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 894                                  switch_info->port_name);
 895         } else {
 896                 /* Bonding device. */
 897                 if (!switch_info->representor) {
 898                         err = snprintf(name, sizeof(name), "%s_%s",
 899                                        dpdk_dev->name, spawn->phys_dev_name);
 900                 } else {
 901                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 902                                 dpdk_dev->name, spawn->phys_dev_name,
 903                                 switch_info->ctrl_num,
 904                                 switch_info->pf_num,
 905                                 switch_info->name_type ==
 906                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 907                                 switch_info->port_name);
 908                 }
 909         }
 910         if (err >= (int)sizeof(name))
 911                 DRV_LOG(WARNING, "device name overflow %s", name);
 912         /* check if the device is already spawned */
 913         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 914                 rte_errno = EEXIST;
 915                 return NULL;
 916         }
 917         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 918         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 919                 struct mlx5_mp_id mp_id;
 920
 921                 eth_dev = rte_eth_dev_attach_secondary(name);
 922                 if (eth_dev == NULL) {
 923                         DRV_LOG(ERR, "can not attach rte ethdev");
 924                         rte_errno = ENOMEM;
 925                         return NULL;
 926                 }
 927                 eth_dev->device = dpdk_dev;
 928                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 929                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 930                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 931                 err = mlx5_proc_priv_init(eth_dev);
 932                 if (err)
 933                         return NULL;
 934                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 935                 /* Receive command fd from primary process */
 936                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 937                 if (err < 0)
 938                         goto err_secondary;
 939                 /* Remap UAR for Tx queues. */
 940                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 941                 if (err)
 942                         goto err_secondary;
 943                 /*
 944                  * Ethdev pointer is still required as input since
 945                  * the primary device is not accessible from the
 946                  * secondary process.
 947                  */
 948                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 949                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 950                 return eth_dev;
 951 err_secondary:
 952                 mlx5_dev_close(eth_dev);
 953                 return NULL;
 954         }
 955         /*
 956          * Some parameters ("tx_db_nc" in particularly) are needed in
 957          * advance to create dv/verbs device context. We proceed the
 958          * devargs here to get ones, and later proceed devargs again
 959          * to override some hardware settings.
 960          */
 961         err = mlx5_args(config, dpdk_dev->devargs);
 962         if (err) {
 963                 err = rte_errno;
 964                 DRV_LOG(ERR, "failed to process device arguments: %s",
 965                         strerror(rte_errno));
 966                 goto error;
 967         }
 968         if (config->dv_miss_info) {
 969                 if (switch_info->master || switch_info->representor)
 970                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 971         }
 972         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 973         if (!sh)
 974                 return NULL;
 975 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 976         config->dest_tir = 1;
 977 #endif
 978 #ifdef HAVE_IBV_MLX5_MOD_SWP
 979         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 980 #endif
 981         /*
 982          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 983          * as all ConnectX-5 devices.
 984          */
 985 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 986         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 987 #endif
 988 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 989         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 990 #endif
 991         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
 992         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 993                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 994                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 995                         mps = MLX5_MPW_ENHANCED;
 996                 } else {
 997                         DRV_LOG(DEBUG, "MPW is supported");
 998                         mps = MLX5_MPW;
 999                 }
1000         } else {
1001                 DRV_LOG(DEBUG, "MPW isn't supported");
1002                 mps = MLX5_MPW_DISABLED;
1003         }
1004 #ifdef HAVE_IBV_MLX5_MOD_SWP
1005         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1006                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1007         DRV_LOG(DEBUG, "SWP support: %u", swp);
1008 #endif
1009         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1010                 MLX5_SW_PARSING_TSO_CAP);
1011 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1012         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1013                 struct mlx5dv_striding_rq_caps mprq_caps =
1014                         dv_attr.striding_rq_caps;
1015
1016                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1017                         mprq_caps.min_single_stride_log_num_of_bytes);
1018                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1019                         mprq_caps.max_single_stride_log_num_of_bytes);
1020                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1021                         mprq_caps.min_single_wqe_log_num_of_strides);
1022                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1023                         mprq_caps.max_single_wqe_log_num_of_strides);
1024                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1025                         mprq_caps.supported_qpts);
1026                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1027                 mprq = 1;
1028                 mprq_min_stride_size_n =
1029                         mprq_caps.min_single_stride_log_num_of_bytes;
1030                 mprq_max_stride_size_n =
1031                         mprq_caps.max_single_stride_log_num_of_bytes;
1032                 mprq_min_stride_num_n =
1033                         mprq_caps.min_single_wqe_log_num_of_strides;
1034                 mprq_max_stride_num_n =
1035                         mprq_caps.max_single_wqe_log_num_of_strides;
1036         }
1037 #endif
1038         /* Rx CQE compression is enabled by default. */
1039         config->cqe_comp = 1;
1040 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1041         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1042                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1043                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1044                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1045                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1046         }
1047         if (config->tunnel_en) {
1048                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1049                 config->tunnel_en &
1050                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1051                 config->tunnel_en &
1052                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1053                 config->tunnel_en &
1054                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1055                 );
1056         } else {
1057                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1058         }
1059 #else
1060         DRV_LOG(WARNING,
1061                 "tunnel offloading disabled due to old OFED/rdma-core version");
1062 #endif
1063 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1064         mpls_en = ((dv_attr.tunnel_offloads_caps &
1065                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1066                    (dv_attr.tunnel_offloads_caps &
1067                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1068         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1069                 mpls_en ? "" : "not ");
1070 #else
1071         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1072                 " old OFED/rdma-core version or firmware configuration");
1073 #endif
1074         config->mpls_en = mpls_en;
1075         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1076         /* Check port status. */
1077         if (spawn->phys_port <= UINT8_MAX) {
1078                 /* Legacy Verbs api only support u8 port number. */
1079                 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1080                                             &port_attr);
1081                 if (err) {
1082                         DRV_LOG(ERR, "port query failed: %s", strerror(err));
1083                         goto error;
1084                 }
1085                 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1086                         DRV_LOG(ERR, "port is not configured in Ethernet mode");
1087                         err = EINVAL;
1088                         goto error;
1089                 }
1090         } else if (nl_rdma >= 0) {
1091                 /* IB doesn't allow more than 255 ports, must be Ethernet. */
1092                 err = mlx5_nl_port_state(nl_rdma,
1093                         spawn->phys_dev_name,
1094                         spawn->phys_port);
1095                 if (err < 0) {
1096                         DRV_LOG(INFO, "Failed to get netlink port state: %s",
1097                                 strerror(rte_errno));
1098                         err = -rte_errno;
1099                         goto error;
1100                 }
1101                 port_attr.state = (enum ibv_port_state)err;
1102         }
1103         if (port_attr.state != IBV_PORT_ACTIVE)
1104                 DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
1105                         mlx5_glue->port_state_str(port_attr.state),
1106                         port_attr.state);
1107         /* Allocate private eth device data. */
1108         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1109                            sizeof(*priv),
1110                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1111         if (priv == NULL) {
1112                 DRV_LOG(ERR, "priv allocation failure");
1113                 err = ENOMEM;
1114                 goto error;
1115         }
1116         priv->sh = sh;
1117         priv->dev_port = spawn->phys_port;
1118         priv->pci_dev = spawn->pci_dev;
1119         priv->mtu = RTE_ETHER_MTU;
1120         /* Some internal functions rely on Netlink sockets, open them now. */
1121         priv->nl_socket_rdma = nl_rdma;
1122         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1123         priv->representor = !!switch_info->representor;
1124         priv->master = !!switch_info->master;
1125         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1126         priv->vport_meta_tag = 0;
1127         priv->vport_meta_mask = 0;
1128         priv->pf_bond = spawn->pf_bond;
1129
1130         DRV_LOG(DEBUG,
1131                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1132                 priv->dev_port, dpdk_dev->bus->name,
1133                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1134                 priv->master, priv->representor, priv->pf_bond);
1135
1136         /*
1137          * If we have E-Switch we should determine the vport attributes.
1138          * E-Switch may use either source vport field or reg_c[0] metadata
1139          * register to match on vport index. The engaged part of metadata
1140          * register is defined by mask.
1141          */
1142         if (switch_info->representor || switch_info->master) {
1143                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1144                                                  spawn->phys_port,
1145                                                  &vport_info);
1146                 if (err) {
1147                         DRV_LOG(WARNING,
1148                                 "Cannot query devx port %d on device %s",
1149                                 spawn->phys_port, spawn->phys_dev_name);
1150                         vport_info.query_flags = 0;
1151                 }
1152         }
1153         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1154                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1155                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1156                 if (!priv->vport_meta_mask) {
1157                         DRV_LOG(ERR,
1158                                 "vport zero mask for port %d on bonding device %s",
1159                                 spawn->phys_port, spawn->phys_dev_name);
1160                         err = ENOTSUP;
1161                         goto error;
1162                 }
1163                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1164                         DRV_LOG(ERR,
1165                                 "Invalid vport tag for port %d on bonding device %s",
1166                                 spawn->phys_port, spawn->phys_dev_name);
1167                         err = ENOTSUP;
1168                         goto error;
1169                 }
1170         }
1171         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1172                 priv->vport_id = vport_info.vport_id;
1173         } else if (spawn->pf_bond >= 0 &&
1174                    (switch_info->representor || switch_info->master)) {
1175                 DRV_LOG(ERR,
1176                         "Cannot deduce vport index for port %d on bonding device %s",
1177                         spawn->phys_port, spawn->phys_dev_name);
1178                 err = ENOTSUP;
1179                 goto error;
1180         } else {
1181                 /*
1182                  * Suppose vport index in compatible way. Kernel/rdma_core
1183                  * support single E-Switch per PF configurations only and
1184                  * vport_id field contains the vport index for associated VF,
1185                  * which is deduced from representor port name.
1186                  * For example, let's have the IB device port 10, it has
1187                  * attached network device eth0, which has port name attribute
1188                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1189                  * as 3 (2+1). This assigning schema should be changed if the
1190                  * multiple E-Switch instances per PF configurations or/and PCI
1191                  * subfunctions are added.
1192                  */
1193                 priv->vport_id = switch_info->representor ?
1194                                  switch_info->port_name + 1 : -1;
1195         }
1196         priv->representor_id = mlx5_representor_id_encode(switch_info,
1197                                                           eth_da->type);
1198         /*
1199          * Look for sibling devices in order to reuse their switch domain
1200          * if any, otherwise allocate one.
1201          */
1202         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1203                 const struct mlx5_priv *opriv =
1204                         rte_eth_devices[port_id].data->dev_private;
1205
1206                 if (!opriv ||
1207                     opriv->sh != priv->sh ||
1208                         opriv->domain_id ==
1209                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1210                         continue;
1211                 priv->domain_id = opriv->domain_id;
1212                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1213                         priv->dev_port, priv->domain_id);
1214                 break;
1215         }
1216         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1217                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1218                 if (err) {
1219                         err = rte_errno;
1220                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1221                                 strerror(rte_errno));
1222                         goto error;
1223                 }
1224                 own_domain_id = 1;
1225                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1226                         priv->dev_port, priv->domain_id);
1227         }
1228         /* Override some values set by hardware configuration. */
1229         mlx5_args(config, dpdk_dev->devargs);
1230         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1231         if (err)
1232                 goto error;
1233         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1234                             IBV_DEVICE_RAW_IP_CSUM);
1235         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1236                 (config->hw_csum ? "" : "not "));
1237 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1238         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1239         DRV_LOG(DEBUG, "counters are not supported");
1240 #endif
1241 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1242         if (config->dv_flow_en) {
1243                 DRV_LOG(WARNING, "DV flow is not supported");
1244                 config->dv_flow_en = 0;
1245         }
1246 #endif
1247         config->ind_table_max_size =
1248                 sh->device_attr.max_rwq_indirection_table_size;
1249         /*
1250          * Remove this check once DPDK supports larger/variable
1251          * indirection tables.
1252          */
1253         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1254                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1255         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1256                 config->ind_table_max_size);
1257         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1258                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1259         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1260                 (config->hw_vlan_strip ? "" : "not "));
1261         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1262                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1263 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1264         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1265 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1266         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1267                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1268 #endif
1269         if (config->hw_padding && !hw_padding) {
1270                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1271                 config->hw_padding = 0;
1272         } else if (config->hw_padding) {
1273                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1274         }
1275         config->tso = (sh->device_attr.max_tso > 0 &&
1276                       (sh->device_attr.tso_supported_qpts &
1277                        (1 << IBV_QPT_RAW_PACKET)));
1278         if (config->tso)
1279                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1280         /*
1281          * MPW is disabled by default, while the Enhanced MPW is enabled
1282          * by default.
1283          */
1284         if (config->mps == MLX5_ARG_UNSET)
1285                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1286                                                           MLX5_MPW_DISABLED;
1287         else
1288                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1289         DRV_LOG(INFO, "%sMPS is %s",
1290                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1291                 config->mps == MLX5_MPW ? "legacy " : "",
1292                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1293         if (sh->devx) {
1294                 config->hca_attr = sh->cdev->config.hca_attr;
1295                 sh->steering_format_version =
1296                         config->hca_attr.steering_format_version;
1297                 /* Check for LRO support. */
1298                 if (config->dest_tir && config->hca_attr.lro_cap &&
1299                     config->dv_flow_en) {
1300                         /* TBD check tunnel lro caps. */
1301                         config->lro.supported = config->hca_attr.lro_cap;
1302                         DRV_LOG(DEBUG, "Device supports LRO");
1303                         /*
1304                          * If LRO timeout is not configured by application,
1305                          * use the minimal supported value.
1306                          */
1307                         if (!config->lro.timeout)
1308                                 config->lro.timeout =
1309                                 config->hca_attr.lro_timer_supported_periods[0];
1310                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1311                                 config->lro.timeout);
1312                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1313                                 "required for coalescing is %d bytes",
1314                                 config->hca_attr.lro_min_mss_size);
1315                 }
1316 #if defined(HAVE_MLX5DV_DR) && \
1317         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1318          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1319                 if (config->hca_attr.qos.sup &&
1320                     config->hca_attr.qos.flow_meter_old &&
1321                     config->dv_flow_en) {
1322                         uint8_t reg_c_mask =
1323                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1324                         /*
1325                          * Meter needs two REG_C's for color match and pre-sfx
1326                          * flow match. Here get the REG_C for color match.
1327                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1328                          */
1329                         reg_c_mask &= 0xfc;
1330                         if (__builtin_popcount(reg_c_mask) < 1) {
1331                                 priv->mtr_en = 0;
1332                                 DRV_LOG(WARNING, "No available register for"
1333                                         " meter.");
1334                         } else {
1335                                 /*
1336                                  * The meter color register is used by the
1337                                  * flow-hit feature as well.
1338                                  * The flow-hit feature must use REG_C_3
1339                                  * Prefer REG_C_3 if it is available.
1340                                  */
1341                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1342                                         priv->mtr_color_reg = REG_C_3;
1343                                 else
1344                                         priv->mtr_color_reg = ffs(reg_c_mask)
1345                                                               - 1 + REG_C_0;
1346                                 priv->mtr_en = 1;
1347                                 priv->mtr_reg_share =
1348                                       config->hca_attr.qos.flow_meter;
1349                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1350                                         priv->mtr_color_reg);
1351                         }
1352                 }
1353                 if (config->hca_attr.qos.sup &&
1354                         config->hca_attr.qos.flow_meter_aso_sup) {
1355                         uint32_t log_obj_size =
1356                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1357                         if (log_obj_size >=
1358                         config->hca_attr.qos.log_meter_aso_granularity &&
1359                         log_obj_size <=
1360                         config->hca_attr.qos.log_meter_aso_max_alloc)
1361                                 sh->meter_aso_en = 1;
1362                 }
1363                 if (priv->mtr_en) {
1364                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1365                         if (err) {
1366                                 err = -err;
1367                                 goto error;
1368                         }
1369                 }
1370                 if (config->hca_attr.flow.tunnel_header_0_1)
1371                         sh->tunnel_header_0_1 = 1;
1372 #endif
1373 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1374                 if (config->hca_attr.flow_hit_aso &&
1375                     priv->mtr_color_reg == REG_C_3) {
1376                         sh->flow_hit_aso_en = 1;
1377                         err = mlx5_flow_aso_age_mng_init(sh);
1378                         if (err) {
1379                                 err = -err;
1380                                 goto error;
1381                         }
1382                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1383                 }
1384 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1385 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1386         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1387                 if (config->hca_attr.ct_offload &&
1388                     priv->mtr_color_reg == REG_C_3) {
1389                         err = mlx5_flow_aso_ct_mng_init(sh);
1390                         if (err) {
1391                                 err = -err;
1392                                 goto error;
1393                         }
1394                         DRV_LOG(DEBUG, "CT ASO is supported.");
1395                         sh->ct_aso_en = 1;
1396                 }
1397 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1398 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1399                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1400                     config->dv_flow_en) {
1401                         priv->sampler_en = 1;
1402                         DRV_LOG(DEBUG, "Sampler enabled!");
1403                 } else {
1404                         priv->sampler_en = 0;
1405                         if (!config->hca_attr.log_max_ft_sampler_num)
1406                                 DRV_LOG(WARNING,
1407                                         "No available register for sampler.");
1408                         else
1409                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1410                 }
1411 #endif
1412         }
1413         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1414             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1415                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1416                 config->cqe_comp = 0;
1417         }
1418         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1419             (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1420                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1421                                  " format isn't supported.");
1422                 config->cqe_comp = 0;
1423         }
1424         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1425             (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1426                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1427                                  " format isn't supported.");
1428                 config->cqe_comp = 0;
1429         }
1430         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1431                         config->cqe_comp ? "" : "not ");
1432         if (config->tx_pp) {
1433                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1434                         config->hca_attr.dev_freq_khz);
1435                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1436                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1437                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1438                         config->hca_attr.cross_channel ? "" : "not ");
1439                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1440                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1441                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1442                         config->hca_attr.non_wire_sq ? "" : "not ");
1443                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1444                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1445                         config->hca_attr.log_max_static_sq_wq);
1446                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1447                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1448                 if (!sh->devx) {
1449                         DRV_LOG(ERR, "DevX is required for packet pacing");
1450                         err = ENODEV;
1451                         goto error;
1452                 }
1453                 if (!config->hca_attr.qos.packet_pacing) {
1454                         DRV_LOG(ERR, "Packet pacing is not supported");
1455                         err = ENODEV;
1456                         goto error;
1457                 }
1458                 if (!config->hca_attr.cross_channel) {
1459                         DRV_LOG(ERR, "Cross channel operations are"
1460                                      " required for packet pacing");
1461                         err = ENODEV;
1462                         goto error;
1463                 }
1464                 if (!config->hca_attr.wqe_index_ignore) {
1465                         DRV_LOG(ERR, "WQE index ignore feature is"
1466                                      " required for packet pacing");
1467                         err = ENODEV;
1468                         goto error;
1469                 }
1470                 if (!config->hca_attr.non_wire_sq) {
1471                         DRV_LOG(ERR, "Non-wire SQ feature is"
1472                                      " required for packet pacing");
1473                         err = ENODEV;
1474                         goto error;
1475                 }
1476                 if (!config->hca_attr.log_max_static_sq_wq) {
1477                         DRV_LOG(ERR, "Static WQE SQ feature is"
1478                                      " required for packet pacing");
1479                         err = ENODEV;
1480                         goto error;
1481                 }
1482                 if (!config->hca_attr.qos.wqe_rate_pp) {
1483                         DRV_LOG(ERR, "WQE rate mode is required"
1484                                      " for packet pacing");
1485                         err = ENODEV;
1486                         goto error;
1487                 }
1488 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1489                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1490                              " can't create queues for packet pacing");
1491                 err = ENODEV;
1492                 goto error;
1493 #endif
1494         }
1495         if (sh->devx) {
1496                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1497
1498                 err = config->hca_attr.access_register_user ?
1499                         mlx5_devx_cmd_register_read
1500                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1501                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1502                 if (!err) {
1503                         uint32_t ts_mode;
1504
1505                         /* MTUTC register is read successfully. */
1506                         ts_mode = MLX5_GET(register_mtutc, reg,
1507                                            time_stamp_mode);
1508                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1509                                 config->rt_timestamp = 1;
1510                 } else {
1511                         /* Kernel does not support register reading. */
1512                         if (config->hca_attr.dev_freq_khz ==
1513                                                  (NS_PER_S / MS_PER_S))
1514                                 config->rt_timestamp = 1;
1515                 }
1516         }
1517         /*
1518          * If HW has bug working with tunnel packet decapsulation and
1519          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1520          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1521          */
1522         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1523                 config->hw_fcs_strip = 0;
1524         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1525                 (config->hw_fcs_strip ? "" : "not "));
1526         if (config->mprq.enabled && mprq) {
1527                 if (config->mprq.stride_num_n &&
1528                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1529                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1530                         config->mprq.stride_num_n =
1531                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1532                                                 mprq_min_stride_num_n),
1533                                         mprq_max_stride_num_n);
1534                         DRV_LOG(WARNING,
1535                                 "the number of strides"
1536                                 " for Multi-Packet RQ is out of range,"
1537                                 " setting default value (%u)",
1538                                 1 << config->mprq.stride_num_n);
1539                 }
1540                 if (config->mprq.stride_size_n &&
1541                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1542                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1543                         config->mprq.stride_size_n =
1544                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1545                                                 mprq_min_stride_size_n),
1546                                         mprq_max_stride_size_n);
1547                         DRV_LOG(WARNING,
1548                                 "the size of a stride"
1549                                 " for Multi-Packet RQ is out of range,"
1550                                 " setting default value (%u)",
1551                                 1 << config->mprq.stride_size_n);
1552                 }
1553                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1554                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1555         } else if (config->mprq.enabled && !mprq) {
1556                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1557                 config->mprq.enabled = 0;
1558         }
1559         if (config->max_dump_files_num == 0)
1560                 config->max_dump_files_num = 128;
1561         eth_dev = rte_eth_dev_allocate(name);
1562         if (eth_dev == NULL) {
1563                 DRV_LOG(ERR, "can not allocate rte ethdev");
1564                 err = ENOMEM;
1565                 goto error;
1566         }
1567         if (priv->representor) {
1568                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1569                 eth_dev->data->representor_id = priv->representor_id;
1570                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1571                         struct mlx5_priv *opriv =
1572                                 rte_eth_devices[port_id].data->dev_private;
1573                         if (opriv &&
1574                             opriv->master &&
1575                             opriv->domain_id == priv->domain_id &&
1576                             opriv->sh == priv->sh) {
1577                                 eth_dev->data->backer_port_id = port_id;
1578                                 break;
1579                         }
1580                 }
1581                 if (port_id >= RTE_MAX_ETHPORTS)
1582                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1583         }
1584         priv->mp_id.port_id = eth_dev->data->port_id;
1585         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1586         /*
1587          * Store associated network device interface index. This index
1588          * is permanent throughout the lifetime of device. So, we may store
1589          * the ifindex here and use the cached value further.
1590          */
1591         MLX5_ASSERT(spawn->ifindex);
1592         priv->if_index = spawn->ifindex;
1593         eth_dev->data->dev_private = priv;
1594         priv->dev_data = eth_dev->data;
1595         eth_dev->data->mac_addrs = priv->mac;
1596         eth_dev->device = dpdk_dev;
1597         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1598         /* Configure the first MAC address by default. */
1599         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1600                 DRV_LOG(ERR,
1601                         "port %u cannot get MAC address, is mlx5_en"
1602                         " loaded? (errno: %s)",
1603                         eth_dev->data->port_id, strerror(rte_errno));
1604                 err = ENODEV;
1605                 goto error;
1606         }
1607         DRV_LOG(INFO,
1608                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1609                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1610 #ifdef RTE_LIBRTE_MLX5_DEBUG
1611         {
1612                 char ifname[MLX5_NAMESIZE];
1613
1614                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1615                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1616                                 eth_dev->data->port_id, ifname);
1617                 else
1618                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1619                                 eth_dev->data->port_id);
1620         }
1621 #endif
1622         /* Get actual MTU if possible. */
1623         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1624         if (err) {
1625                 err = rte_errno;
1626                 goto error;
1627         }
1628         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1629                 priv->mtu);
1630         /* Initialize burst functions to prevent crashes before link-up. */
1631         eth_dev->rx_pkt_burst = removed_rx_burst;
1632         eth_dev->tx_pkt_burst = removed_tx_burst;
1633         eth_dev->dev_ops = &mlx5_dev_ops;
1634         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1635         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1636         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1637         /* Register MAC address. */
1638         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1639         if (config->vf && config->vf_nl_en)
1640                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1641                                       mlx5_ifindex(eth_dev),
1642                                       eth_dev->data->mac_addrs,
1643                                       MLX5_MAX_MAC_ADDRESSES);
1644         priv->ctrl_flows = 0;
1645         rte_spinlock_init(&priv->flow_list_lock);
1646         TAILQ_INIT(&priv->flow_meters);
1647         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1648         if (!priv->mtr_profile_tbl)
1649                 goto error;
1650         /* Bring Ethernet device up. */
1651         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1652                 eth_dev->data->port_id);
1653         mlx5_set_link_up(eth_dev);
1654         /*
1655          * Even though the interrupt handler is not installed yet,
1656          * interrupts will still trigger on the async_fd from
1657          * Verbs context returned by ibv_open_device().
1658          */
1659         mlx5_link_update(eth_dev, 0);
1660 #ifdef HAVE_MLX5DV_DR_ESWITCH
1661         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1662               (switch_info->representor || switch_info->master)))
1663                 config->dv_esw_en = 0;
1664 #else
1665         config->dv_esw_en = 0;
1666 #endif
1667         /* Detect minimal data bytes to inline. */
1668         mlx5_set_min_inline(spawn, config);
1669         /* Store device configuration on private structure. */
1670         priv->config = *config;
1671         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1672                 icfg[i].release_mem_en = !!config->reclaim_mode;
1673                 if (config->reclaim_mode)
1674                         icfg[i].per_core_cache = 0;
1675                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1676                 if (!priv->flows[i])
1677                         goto error;
1678         }
1679         /* Create context for virtual machine VLAN workaround. */
1680         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1681         if (config->dv_flow_en) {
1682                 err = mlx5_alloc_shared_dr(priv);
1683                 if (err)
1684                         goto error;
1685         }
1686         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1687                 priv->obj_ops = devx_obj_ops;
1688                 priv->obj_ops.drop_action_create =
1689                                                 ibv_obj_ops.drop_action_create;
1690                 priv->obj_ops.drop_action_destroy =
1691                                                 ibv_obj_ops.drop_action_destroy;
1692                 mlx5_queue_counter_id_prepare(eth_dev);
1693                 priv->obj_ops.lb_dummy_queue_create =
1694                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1695                 priv->obj_ops.lb_dummy_queue_release =
1696                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1697         } else if (spawn->max_port > UINT8_MAX) {
1698                 /* Verbs can't support ports larger than 255 by design. */
1699                 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1700                 err = ENOTSUP;
1701                 goto error;
1702         } else {
1703                 priv->obj_ops = ibv_obj_ops;
1704         }
1705         if (config->tx_pp &&
1706             (priv->config.dv_esw_en ||
1707              priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
1708                 /*
1709                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1710                  * packet pacing and already checked above.
1711                  * Hence, we should only make sure the SQs will be created
1712                  * with DevX, not with Verbs.
1713                  * Verbs allocates the SQ UAR on its own and it can't be shared
1714                  * with Clock Queue UAR as required for Tx scheduling.
1715                  */
1716                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1717                 err = ENODEV;
1718                 goto error;
1719         }
1720         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1721         if (!priv->drop_queue.hrxq)
1722                 goto error;
1723         /* Supported Verbs flow priority number detection. */
1724         err = mlx5_flow_discover_priorities(eth_dev);
1725         if (err < 0) {
1726                 err = -err;
1727                 goto error;
1728         }
1729         priv->config.flow_prio = err;
1730         if (!priv->config.dv_esw_en &&
1731             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1732                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1733                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1734                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1735         }
1736         mlx5_set_metadata_mask(eth_dev);
1737         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1738             !priv->sh->dv_regc0_mask) {
1739                 DRV_LOG(ERR, "metadata mode %u is not supported "
1740                              "(no metadata reg_c[0] is available)",
1741                              priv->config.dv_xmeta_en);
1742                         err = ENOTSUP;
1743                         goto error;
1744         }
1745         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1746                                        mlx5_hrxq_create_cb,
1747                                        mlx5_hrxq_match_cb,
1748                                        mlx5_hrxq_remove_cb,
1749                                        mlx5_hrxq_clone_cb,
1750                                        mlx5_hrxq_clone_free_cb);
1751         if (!priv->hrxqs)
1752                 goto error;
1753         rte_rwlock_init(&priv->ind_tbls_lock);
1754         /* Query availability of metadata reg_c's. */
1755         err = mlx5_flow_discover_mreg_c(eth_dev);
1756         if (err < 0) {
1757                 err = -err;
1758                 goto error;
1759         }
1760         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1761                 DRV_LOG(DEBUG,
1762                         "port %u extensive metadata register is not supported",
1763                         eth_dev->data->port_id);
1764                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1765                         DRV_LOG(ERR, "metadata mode %u is not supported "
1766                                      "(no metadata registers available)",
1767                                      priv->config.dv_xmeta_en);
1768                         err = ENOTSUP;
1769                         goto error;
1770                 }
1771         }
1772         if (priv->config.dv_flow_en &&
1773             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1774             mlx5_flow_ext_mreg_supported(eth_dev) &&
1775             priv->sh->dv_regc0_mask) {
1776                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1777                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1778                                                       false, true, eth_dev,
1779                                                       flow_dv_mreg_create_cb,
1780                                                       flow_dv_mreg_match_cb,
1781                                                       flow_dv_mreg_remove_cb,
1782                                                       flow_dv_mreg_clone_cb,
1783                                                     flow_dv_mreg_clone_free_cb);
1784                 if (!priv->mreg_cp_tbl) {
1785                         err = ENOMEM;
1786                         goto error;
1787                 }
1788         }
1789         rte_spinlock_init(&priv->shared_act_sl);
1790         mlx5_flow_counter_mode_config(eth_dev);
1791         mlx5_flow_drop_action_config(eth_dev);
1792         if (priv->config.dv_flow_en)
1793                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1794         return eth_dev;
1795 error:
1796         if (priv) {
1797                 if (priv->mreg_cp_tbl)
1798                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1799                 if (priv->sh)
1800                         mlx5_os_free_shared_dr(priv);
1801                 if (priv->nl_socket_route >= 0)
1802                         close(priv->nl_socket_route);
1803                 if (priv->vmwa_context)
1804                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1805                 if (eth_dev && priv->drop_queue.hrxq)
1806                         mlx5_drop_action_destroy(eth_dev);
1807                 if (priv->mtr_profile_tbl)
1808                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1809                 if (own_domain_id)
1810                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1811                 if (priv->hrxqs)
1812                         mlx5_list_destroy(priv->hrxqs);
1813                 mlx5_free(priv);
1814                 if (eth_dev != NULL)
1815                         eth_dev->data->dev_private = NULL;
1816         }
1817         if (eth_dev != NULL) {
1818                 /* mac_addrs must not be freed alone because part of
1819                  * dev_private
1820                  **/
1821                 eth_dev->data->mac_addrs = NULL;
1822                 rte_eth_dev_release_port(eth_dev);
1823         }
1824         if (sh)
1825                 mlx5_free_shared_dev_ctx(sh);
1826         if (nl_rdma >= 0)
1827                 close(nl_rdma);
1828         MLX5_ASSERT(err > 0);
1829         rte_errno = err;
1830         return NULL;
1831 }
1832
1833 /**
1834  * Comparison callback to sort device data.
1835  *
1836  * This is meant to be used with qsort().
1837  *
1838  * @param a[in]
1839  *   Pointer to pointer to first data object.
1840  * @param b[in]
1841  *   Pointer to pointer to second data object.
1842  *
1843  * @return
1844  *   0 if both objects are equal, less than 0 if the first argument is less
1845  *   than the second, greater than 0 otherwise.
1846  */
1847 static int
1848 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1849 {
1850         const struct mlx5_switch_info *si_a =
1851                 &((const struct mlx5_dev_spawn_data *)a)->info;
1852         const struct mlx5_switch_info *si_b =
1853                 &((const struct mlx5_dev_spawn_data *)b)->info;
1854         int ret;
1855
1856         /* Master device first. */
1857         ret = si_b->master - si_a->master;
1858         if (ret)
1859                 return ret;
1860         /* Then representor devices. */
1861         ret = si_b->representor - si_a->representor;
1862         if (ret)
1863                 return ret;
1864         /* Unidentified devices come last in no specific order. */
1865         if (!si_a->representor)
1866                 return 0;
1867         /* Order representors by name. */
1868         return si_a->port_name - si_b->port_name;
1869 }
1870
1871 /**
1872  * Match PCI information for possible slaves of bonding device.
1873  *
1874  * @param[in] ibdev_name
1875  *   Name of Infiniband device.
1876  * @param[in] pci_dev
1877  *   Pointer to primary PCI address structure to match.
1878  * @param[in] nl_rdma
1879  *   Netlink RDMA group socket handle.
1880  * @param[in] owner
1881  *   Representor owner PF index.
1882  * @param[out] bond_info
1883  *   Pointer to bonding information.
1884  *
1885  * @return
1886  *   negative value if no bonding device found, otherwise
1887  *   positive index of slave PF in bonding.
1888  */
1889 static int
1890 mlx5_device_bond_pci_match(const char *ibdev_name,
1891                            const struct rte_pci_addr *pci_dev,
1892                            int nl_rdma, uint16_t owner,
1893                            struct mlx5_bond_info *bond_info)
1894 {
1895         char ifname[IF_NAMESIZE + 1];
1896         unsigned int ifindex;
1897         unsigned int np, i;
1898         FILE *bond_file = NULL, *file;
1899         int pf = -1;
1900         int ret;
1901
1902         /*
1903          * Try to get master device name. If something goes wrong suppose
1904          * the lack of kernel support and no bonding devices.
1905          */
1906         memset(bond_info, 0, sizeof(*bond_info));
1907         if (nl_rdma < 0)
1908                 return -1;
1909         if (!strstr(ibdev_name, "bond"))
1910                 return -1;
1911         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1912         if (!np)
1913                 return -1;
1914         /*
1915          * The master device might not be on the predefined port(not on port
1916          * index 1, it is not guaranteed), we have to scan all Infiniband
1917          * device ports and find master.
1918          */
1919         for (i = 1; i <= np; ++i) {
1920                 /* Check whether Infiniband port is populated. */
1921                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1922                 if (!ifindex)
1923                         continue;
1924                 if (!if_indextoname(ifindex, ifname))
1925                         continue;
1926                 /* Try to read bonding slave names from sysfs. */
1927                 MKSTR(slaves,
1928                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1929                 bond_file = fopen(slaves, "r");
1930                 if (bond_file)
1931                         break;
1932         }
1933         if (!bond_file)
1934                 return -1;
1935         /* Use safe format to check maximal buffer length. */
1936         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1937         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1938                 char tmp_str[IF_NAMESIZE + 32];
1939                 struct rte_pci_addr pci_addr;
1940                 struct mlx5_switch_info info;
1941
1942                 /* Process slave interface names in the loop. */
1943                 snprintf(tmp_str, sizeof(tmp_str),
1944                          "/sys/class/net/%s", ifname);
1945                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1946                         DRV_LOG(WARNING,
1947                                 "Cannot get PCI address for netdev \"%s\".",
1948                                 ifname);
1949                         continue;
1950                 }
1951                 /* Slave interface PCI address match found. */
1952                 snprintf(tmp_str, sizeof(tmp_str),
1953                          "/sys/class/net/%s/phys_port_name", ifname);
1954                 file = fopen(tmp_str, "rb");
1955                 if (!file)
1956                         break;
1957                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1958                 if (fscanf(file, "%32s", tmp_str) == 1)
1959                         mlx5_translate_port_name(tmp_str, &info);
1960                 fclose(file);
1961                 /* Only process PF ports. */
1962                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1963                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1964                         continue;
1965                 /* Check max bonding member. */
1966                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1967                         DRV_LOG(WARNING, "bonding index out of range, "
1968                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1969                                 tmp_str);
1970                         break;
1971                 }
1972                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
1973                 if (pci_dev->domain == pci_addr.domain &&
1974                     pci_dev->bus == pci_addr.bus &&
1975                     pci_dev->devid == pci_addr.devid &&
1976                     ((pci_dev->function == 0 &&
1977                       pci_dev->function + owner == pci_addr.function) ||
1978                      (pci_dev->function == owner &&
1979                       pci_addr.function == owner)))
1980                         pf = info.port_name;
1981                 /* Get ifindex. */
1982                 snprintf(tmp_str, sizeof(tmp_str),
1983                          "/sys/class/net/%s/ifindex", ifname);
1984                 file = fopen(tmp_str, "rb");
1985                 if (!file)
1986                         break;
1987                 ret = fscanf(file, "%u", &ifindex);
1988                 fclose(file);
1989                 if (ret != 1)
1990                         break;
1991                 /* Save bonding info. */
1992                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1993                         sizeof(bond_info->ports[0].ifname));
1994                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1995                 bond_info->ports[info.port_name].ifindex = ifindex;
1996                 bond_info->n_port++;
1997         }
1998         if (pf >= 0) {
1999                 /* Get bond interface info */
2000                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2001                                            bond_info->ifname);
2002                 if (ret)
2003                         DRV_LOG(ERR, "unable to get bond info: %s",
2004                                 strerror(rte_errno));
2005                 else
2006                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2007                                 ifindex, bond_info->ifindex, bond_info->ifname);
2008         }
2009         return pf;
2010 }
2011
2012 static void
2013 mlx5_os_config_default(struct mlx5_dev_config *config)
2014 {
2015         memset(config, 0, sizeof(*config));
2016         config->mps = MLX5_ARG_UNSET;
2017         config->rx_vec_en = 1;
2018         config->txq_inline_max = MLX5_ARG_UNSET;
2019         config->txq_inline_min = MLX5_ARG_UNSET;
2020         config->txq_inline_mpw = MLX5_ARG_UNSET;
2021         config->txqs_inline = MLX5_ARG_UNSET;
2022         config->vf_nl_en = 1;
2023         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2024         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2025         config->dv_esw_en = 1;
2026         config->dv_flow_en = 1;
2027         config->decap_en = 1;
2028         config->log_hp_size = MLX5_ARG_UNSET;
2029         config->allow_duplicate_pattern = 1;
2030 }
2031
2032 /**
2033  * Register a PCI device within bonding.
2034  *
2035  * This function spawns Ethernet devices out of a given PCI device and
2036  * bonding owner PF index.
2037  *
2038  * @param[in] cdev
2039  *   Pointer to common mlx5 device structure.
2040  * @param[in] req_eth_da
2041  *   Requested ethdev device argument.
2042  * @param[in] owner_id
2043  *   Requested owner PF port ID within bonding device, default to 0.
2044  *
2045  * @return
2046  *   0 on success, a negative errno value otherwise and rte_errno is set.
2047  */
2048 static int
2049 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2050                      struct rte_eth_devargs *req_eth_da,
2051                      uint16_t owner_id)
2052 {
2053         struct ibv_device **ibv_list;
2054         /*
2055          * Number of found IB Devices matching with requested PCI BDF.
2056          * nd != 1 means there are multiple IB devices over the same
2057          * PCI device and we have representors and master.
2058          */
2059         unsigned int nd = 0;
2060         /*
2061          * Number of found IB device Ports. nd = 1 and np = 1..n means
2062          * we have the single multiport IB device, and there may be
2063          * representors attached to some of found ports.
2064          */
2065         unsigned int np = 0;
2066         /*
2067          * Number of DPDK ethernet devices to Spawn - either over
2068          * multiple IB devices or multiple ports of single IB device.
2069          * Actually this is the number of iterations to spawn.
2070          */
2071         unsigned int ns = 0;
2072         /*
2073          * Bonding device
2074          *   < 0 - no bonding device (single one)
2075          *  >= 0 - bonding device (value is slave PF index)
2076          */
2077         int bd = -1;
2078         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2079         struct mlx5_dev_spawn_data *list = NULL;
2080         struct mlx5_dev_config dev_config;
2081         unsigned int dev_config_vf;
2082         struct rte_eth_devargs eth_da = *req_eth_da;
2083         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2084         struct mlx5_bond_info bond_info;
2085         int ret = -1;
2086
2087         errno = 0;
2088         ibv_list = mlx5_glue->get_device_list(&ret);
2089         if (!ibv_list) {
2090                 rte_errno = errno ? errno : ENOSYS;
2091                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2092                 return -rte_errno;
2093         }
2094         /*
2095          * First scan the list of all Infiniband devices to find
2096          * matching ones, gathering into the list.
2097          */
2098         struct ibv_device *ibv_match[ret + 1];
2099         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2100         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2101         unsigned int i;
2102
2103         while (ret-- > 0) {
2104                 struct rte_pci_addr pci_addr;
2105
2106                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2107                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2108                                                 nl_rdma, owner_id, &bond_info);
2109                 if (bd >= 0) {
2110                         /*
2111                          * Bonding device detected. Only one match is allowed,
2112                          * the bonding is supported over multi-port IB device,
2113                          * there should be no matches on representor PCI
2114                          * functions or non VF LAG bonding devices with
2115                          * specified address.
2116                          */
2117                         if (nd) {
2118                                 DRV_LOG(ERR,
2119                                         "multiple PCI match on bonding device"
2120                                         "\"%s\" found", ibv_list[ret]->name);
2121                                 rte_errno = ENOENT;
2122                                 ret = -rte_errno;
2123                                 goto exit;
2124                         }
2125                         /* Amend owner pci address if owner PF ID specified. */
2126                         if (eth_da.nb_representor_ports)
2127                                 owner_pci.function += owner_id;
2128                         DRV_LOG(INFO,
2129                                 "PCI information matches for slave %d bonding device \"%s\"",
2130                                 bd, ibv_list[ret]->name);
2131                         ibv_match[nd++] = ibv_list[ret];
2132                         break;
2133                 } else {
2134                         /* Bonding device not found. */
2135                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2136                                               &pci_addr))
2137                                 continue;
2138                         if (owner_pci.domain != pci_addr.domain ||
2139                             owner_pci.bus != pci_addr.bus ||
2140                             owner_pci.devid != pci_addr.devid ||
2141                             owner_pci.function != pci_addr.function)
2142                                 continue;
2143                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2144                                 ibv_list[ret]->name);
2145                         ibv_match[nd++] = ibv_list[ret];
2146                 }
2147         }
2148         ibv_match[nd] = NULL;
2149         if (!nd) {
2150                 /* No device matches, just complain and bail out. */
2151                 DRV_LOG(WARNING,
2152                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2153                         " are kernel drivers loaded?",
2154                         owner_pci.domain, owner_pci.bus,
2155                         owner_pci.devid, owner_pci.function);
2156                 rte_errno = ENOENT;
2157                 ret = -rte_errno;
2158                 goto exit;
2159         }
2160         if (nd == 1) {
2161                 /*
2162                  * Found single matching device may have multiple ports.
2163                  * Each port may be representor, we have to check the port
2164                  * number and check the representors existence.
2165                  */
2166                 if (nl_rdma >= 0)
2167                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2168                 if (!np)
2169                         DRV_LOG(WARNING,
2170                                 "Cannot get IB device \"%s\" ports number.",
2171                                 ibv_match[0]->name);
2172                 if (bd >= 0 && !np) {
2173                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2174                         rte_errno = ENOENT;
2175                         ret = -rte_errno;
2176                         goto exit;
2177                 }
2178         }
2179         /* Now we can determine the maximal amount of devices to be spawned. */
2180         list = mlx5_malloc(MLX5_MEM_ZERO,
2181                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2182                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2183         if (!list) {
2184                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2185                 rte_errno = ENOMEM;
2186                 ret = -rte_errno;
2187                 goto exit;
2188         }
2189         if (bd >= 0 || np > 1) {
2190                 /*
2191                  * Single IB device with multiple ports found,
2192                  * it may be E-Switch master device and representors.
2193                  * We have to perform identification through the ports.
2194                  */
2195                 MLX5_ASSERT(nl_rdma >= 0);
2196                 MLX5_ASSERT(ns == 0);
2197                 MLX5_ASSERT(nd == 1);
2198                 MLX5_ASSERT(np);
2199                 for (i = 1; i <= np; ++i) {
2200                         list[ns].bond_info = &bond_info;
2201                         list[ns].max_port = np;
2202                         list[ns].phys_port = i;
2203                         list[ns].phys_dev_name = ibv_match[0]->name;
2204                         list[ns].eth_dev = NULL;
2205                         list[ns].pci_dev = pci_dev;
2206                         list[ns].cdev = cdev;
2207                         list[ns].pf_bond = bd;
2208                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2209                                                            ibv_match[0]->name,
2210                                                            i);
2211                         if (!list[ns].ifindex) {
2212                                 /*
2213                                  * No network interface index found for the
2214                                  * specified port, it means there is no
2215                                  * representor on this port. It's OK,
2216                                  * there can be disabled ports, for example
2217                                  * if sriov_numvfs < sriov_totalvfs.
2218                                  */
2219                                 continue;
2220                         }
2221                         ret = -1;
2222                         if (nl_route >= 0)
2223                                 ret = mlx5_nl_switch_info(nl_route,
2224                                                           list[ns].ifindex,
2225                                                           &list[ns].info);
2226                         if (ret || (!list[ns].info.representor &&
2227                                     !list[ns].info.master)) {
2228                                 /*
2229                                  * We failed to recognize representors with
2230                                  * Netlink, let's try to perform the task
2231                                  * with sysfs.
2232                                  */
2233                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2234                                                              &list[ns].info);
2235                         }
2236                         if (!ret && bd >= 0) {
2237                                 switch (list[ns].info.name_type) {
2238                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2239                                         if (np == 1) {
2240                                                 /*
2241                                                  * Force standalone bonding
2242                                                  * device for ROCE LAG
2243                                                  * confgiurations.
2244                                                  */
2245                                                 list[ns].info.master = 0;
2246                                                 list[ns].info.representor = 0;
2247                                         }
2248                                         if (list[ns].info.port_name == bd)
2249                                                 ns++;
2250                                         break;
2251                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2252                                         /* Fallthrough */
2253                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2254                                         /* Fallthrough */
2255                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2256                                         if (list[ns].info.pf_num == bd)
2257                                                 ns++;
2258                                         break;
2259                                 default:
2260                                         break;
2261                                 }
2262                                 continue;
2263                         }
2264                         if (!ret && (list[ns].info.representor ^
2265                                      list[ns].info.master))
2266                                 ns++;
2267                 }
2268                 if (!ns) {
2269                         DRV_LOG(ERR,
2270                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2271                         rte_errno = ENOENT;
2272                         ret = -rte_errno;
2273                         goto exit;
2274                 }
2275         } else {
2276                 /*
2277                  * The existence of several matching entries (nd > 1) means
2278                  * port representors have been instantiated. No existing Verbs
2279                  * call nor sysfs entries can tell them apart, this can only
2280                  * be done through Netlink calls assuming kernel drivers are
2281                  * recent enough to support them.
2282                  *
2283                  * In the event of identification failure through Netlink,
2284                  * try again through sysfs, then:
2285                  *
2286                  * 1. A single IB device matches (nd == 1) with single
2287                  *    port (np=0/1) and is not a representor, assume
2288                  *    no switch support.
2289                  *
2290                  * 2. Otherwise no safe assumptions can be made;
2291                  *    complain louder and bail out.
2292                  */
2293                 for (i = 0; i != nd; ++i) {
2294                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2295                         list[ns].bond_info = NULL;
2296                         list[ns].max_port = 1;
2297                         list[ns].phys_port = 1;
2298                         list[ns].phys_dev_name = ibv_match[i]->name;
2299                         list[ns].eth_dev = NULL;
2300                         list[ns].pci_dev = pci_dev;
2301                         list[ns].cdev = cdev;
2302                         list[ns].pf_bond = -1;
2303                         list[ns].ifindex = 0;
2304                         if (nl_rdma >= 0)
2305                                 list[ns].ifindex = mlx5_nl_ifindex
2306                                                             (nl_rdma,
2307                                                              ibv_match[i]->name,
2308                                                              1);
2309                         if (!list[ns].ifindex) {
2310                                 char ifname[IF_NAMESIZE];
2311
2312                                 /*
2313                                  * Netlink failed, it may happen with old
2314                                  * ib_core kernel driver (before 4.16).
2315                                  * We can assume there is old driver because
2316                                  * here we are processing single ports IB
2317                                  * devices. Let's try sysfs to retrieve
2318                                  * the ifindex. The method works for
2319                                  * master device only.
2320                                  */
2321                                 if (nd > 1) {
2322                                         /*
2323                                          * Multiple devices found, assume
2324                                          * representors, can not distinguish
2325                                          * master/representor and retrieve
2326                                          * ifindex via sysfs.
2327                                          */
2328                                         continue;
2329                                 }
2330                                 ret = mlx5_get_ifname_sysfs
2331                                         (ibv_match[i]->ibdev_path, ifname);
2332                                 if (!ret)
2333                                         list[ns].ifindex =
2334                                                 if_nametoindex(ifname);
2335                                 if (!list[ns].ifindex) {
2336                                         /*
2337                                          * No network interface index found
2338                                          * for the specified device, it means
2339                                          * there it is neither representor
2340                                          * nor master.
2341                                          */
2342                                         continue;
2343                                 }
2344                         }
2345                         ret = -1;
2346                         if (nl_route >= 0)
2347                                 ret = mlx5_nl_switch_info(nl_route,
2348                                                           list[ns].ifindex,
2349                                                           &list[ns].info);
2350                         if (ret || (!list[ns].info.representor &&
2351                                     !list[ns].info.master)) {
2352                                 /*
2353                                  * We failed to recognize representors with
2354                                  * Netlink, let's try to perform the task
2355                                  * with sysfs.
2356                                  */
2357                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2358                                                              &list[ns].info);
2359                         }
2360                         if (!ret && (list[ns].info.representor ^
2361                                      list[ns].info.master)) {
2362                                 ns++;
2363                         } else if ((nd == 1) &&
2364                                    !list[ns].info.representor &&
2365                                    !list[ns].info.master) {
2366                                 /*
2367                                  * Single IB device with one physical port and
2368                                  * attached network device.
2369                                  * May be SRIOV is not enabled or there is no
2370                                  * representors.
2371                                  */
2372                                 DRV_LOG(INFO, "No E-Switch support detected.");
2373                                 ns++;
2374                                 break;
2375                         }
2376                 }
2377                 if (!ns) {
2378                         DRV_LOG(ERR,
2379                                 "Unable to recognize master/representors on the multiple IB devices.");
2380                         rte_errno = ENOENT;
2381                         ret = -rte_errno;
2382                         goto exit;
2383                 }
2384                 /*
2385                  * New kernels may add the switch_id attribute for the case
2386                  * there is no E-Switch and we wrongly recognized the only
2387                  * device as master. Override this if there is the single
2388                  * device with single port and new device name format present.
2389                  */
2390                 if (nd == 1 &&
2391                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2392                         list[0].info.master = 0;
2393                         list[0].info.representor = 0;
2394                 }
2395         }
2396         MLX5_ASSERT(ns);
2397         /*
2398          * Sort list to probe devices in natural order for users convenience
2399          * (i.e. master first, then representors from lowest to highest ID).
2400          */
2401         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2402         /* Device specific configuration. */
2403         switch (pci_dev->id.device_id) {
2404         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2405         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2406         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2407         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2408         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2409         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2410         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2411                 dev_config_vf = 1;
2412                 break;
2413         default:
2414                 dev_config_vf = 0;
2415                 break;
2416         }
2417         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2418                 /* Set devargs default values. */
2419                 if (eth_da.nb_mh_controllers == 0) {
2420                         eth_da.nb_mh_controllers = 1;
2421                         eth_da.mh_controllers[0] = 0;
2422                 }
2423                 if (eth_da.nb_ports == 0 && ns > 0) {
2424                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2425                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2426                                         pci_dev->device.devargs->args);
2427                         eth_da.nb_ports = 1;
2428                         eth_da.ports[0] = list[0].info.pf_num;
2429                 }
2430                 if (eth_da.nb_representor_ports == 0) {
2431                         eth_da.nb_representor_ports = 1;
2432                         eth_da.representor_ports[0] = 0;
2433                 }
2434         }
2435         for (i = 0; i != ns; ++i) {
2436                 uint32_t restore;
2437
2438                 /* Default configuration. */
2439                 mlx5_os_config_default(&dev_config);
2440                 dev_config.vf = dev_config_vf;
2441                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2442                                                  &dev_config, &eth_da);
2443                 if (!list[i].eth_dev) {
2444                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2445                                 break;
2446                         /* Device is disabled or already spawned. Ignore it. */
2447                         continue;
2448                 }
2449                 restore = list[i].eth_dev->data->dev_flags;
2450                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2451                 /**
2452                  * Each representor has a dedicated interrupts vector.
2453                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2454                  * representor eth_dev object because representor and PF
2455                  * share the same PCI address.
2456                  * Override representor device with a dedicated
2457                  * interrupts handle here.
2458                  * Representor interrupts handle is released in mlx5_dev_stop().
2459                  */
2460                 if (list[i].info.representor) {
2461                         struct rte_intr_handle *intr_handle;
2462                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2463                                                   sizeof(*intr_handle), 0,
2464                                                   SOCKET_ID_ANY);
2465                         if (!intr_handle) {
2466                                 DRV_LOG(ERR,
2467                                         "port %u failed to allocate memory for interrupt handler "
2468                                         "Rx interrupts will not be supported",
2469                                         i);
2470                                 rte_errno = ENOMEM;
2471                                 ret = -rte_errno;
2472                                 goto exit;
2473                         }
2474                         list[i].eth_dev->intr_handle = intr_handle;
2475                 }
2476                 /* Restore non-PCI flags cleared by the above call. */
2477                 list[i].eth_dev->data->dev_flags |= restore;
2478                 rte_eth_dev_probing_finish(list[i].eth_dev);
2479         }
2480         if (i != ns) {
2481                 DRV_LOG(ERR,
2482                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2483                         " encountering an error: %s",
2484                         owner_pci.domain, owner_pci.bus,
2485                         owner_pci.devid, owner_pci.function,
2486                         strerror(rte_errno));
2487                 ret = -rte_errno;
2488                 /* Roll back. */
2489                 while (i--) {
2490                         if (!list[i].eth_dev)
2491                                 continue;
2492                         mlx5_dev_close(list[i].eth_dev);
2493                         /* mac_addrs must not be freed because in dev_private */
2494                         list[i].eth_dev->data->mac_addrs = NULL;
2495                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2496                 }
2497                 /* Restore original error. */
2498                 rte_errno = -ret;
2499         } else {
2500                 ret = 0;
2501         }
2502 exit:
2503         /*
2504          * Do the routine cleanup:
2505          * - close opened Netlink sockets
2506          * - free allocated spawn data array
2507          * - free the Infiniband device list
2508          */
2509         if (nl_rdma >= 0)
2510                 close(nl_rdma);
2511         if (nl_route >= 0)
2512                 close(nl_route);
2513         if (list)
2514                 mlx5_free(list);
2515         MLX5_ASSERT(ibv_list);
2516         mlx5_glue->free_device_list(ibv_list);
2517         return ret;
2518 }
2519
2520 static int
2521 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2522                           struct rte_eth_devargs *eth_da)
2523 {
2524         int ret = 0;
2525
2526         if (dev->devargs == NULL)
2527                 return 0;
2528         memset(eth_da, 0, sizeof(*eth_da));
2529         /* Parse representor information first from class argument. */
2530         if (dev->devargs->cls_str)
2531                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2532         if (ret != 0) {
2533                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2534                         dev->devargs->cls_str);
2535                 return -rte_errno;
2536         }
2537         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2538                 /* Parse legacy device argument */
2539                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2540                 if (ret) {
2541                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2542                                 dev->devargs->args);
2543                         return -rte_errno;
2544                 }
2545         }
2546         return 0;
2547 }
2548
2549 /**
2550  * Callback to register a PCI device.
2551  *
2552  * This function spawns Ethernet devices out of a given PCI device.
2553  *
2554  * @param[in] cdev
2555  *   Pointer to common mlx5 device structure.
2556  *
2557  * @return
2558  *   0 on success, a negative errno value otherwise and rte_errno is set.
2559  */
2560 static int
2561 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2562 {
2563         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2564         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2565         int ret = 0;
2566         uint16_t p;
2567
2568         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2569         if (ret != 0)
2570                 return ret;
2571
2572         if (eth_da.nb_ports > 0) {
2573                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2574                 for (p = 0; p < eth_da.nb_ports; p++) {
2575                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2576                                                    eth_da.ports[p]);
2577                         if (ret)
2578                                 break;
2579                 }
2580                 if (ret) {
2581                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2582                                 "aborted due to proding failure of PF %u",
2583                                 pci_dev->addr.domain, pci_dev->addr.bus,
2584                                 pci_dev->addr.devid, pci_dev->addr.function,
2585                                 eth_da.ports[p]);
2586                         mlx5_net_remove(cdev);
2587                 }
2588         } else {
2589                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2590         }
2591         return ret;
2592 }
2593
2594 /* Probe a single SF device on auxiliary bus, no representor support. */
2595 static int
2596 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2597 {
2598         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2599         struct mlx5_dev_config config;
2600         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2601         struct rte_device *dev = cdev->dev;
2602         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2603         struct rte_eth_dev *eth_dev;
2604         int ret = 0;
2605
2606         /* Parse ethdev devargs. */
2607         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2608         if (ret != 0)
2609                 return ret;
2610         /* Set default config data. */
2611         mlx5_os_config_default(&config);
2612         config.sf = 1;
2613         /* Init spawn data. */
2614         spawn.max_port = 1;
2615         spawn.phys_port = 1;
2616         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2617         ret = mlx5_auxiliary_get_ifindex(dev->name);
2618         if (ret < 0) {
2619                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2620                 return ret;
2621         }
2622         spawn.ifindex = ret;
2623         spawn.cdev = cdev;
2624         /* Spawn device. */
2625         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2626         if (eth_dev == NULL)
2627                 return -rte_errno;
2628         /* Post create. */
2629         eth_dev->intr_handle = &adev->intr_handle;
2630         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2631                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2632                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2633                 eth_dev->data->numa_node = dev->numa_node;
2634         }
2635         rte_eth_dev_probing_finish(eth_dev);
2636         return 0;
2637 }
2638
2639 /**
2640  * Net class driver callback to probe a device.
2641  *
2642  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2643  *
2644  * @param[in] cdev
2645  *   Pointer to the common mlx5 device.
2646  *
2647  * @return
2648  *   0 on success, a negative errno value otherwise and rte_errno is set.
2649  */
2650 int
2651 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2652 {
2653         int ret;
2654
2655         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2656                 mlx5_pmd_socket_init();
2657         ret = mlx5_init_once();
2658         if (ret) {
2659                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2660                         strerror(rte_errno));
2661                 return -rte_errno;
2662         }
2663         if (mlx5_dev_is_pci(cdev->dev))
2664                 return mlx5_os_pci_probe(cdev);
2665         else
2666                 return mlx5_os_auxiliary_probe(cdev);
2667 }
2668
2669 /**
2670  * Install shared asynchronous device events handler.
2671  * This function is implemented to support event sharing
2672  * between multiple ports of single IB device.
2673  *
2674  * @param sh
2675  *   Pointer to mlx5_dev_ctx_shared object.
2676  */
2677 void
2678 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2679 {
2680         int ret;
2681         int flags;
2682         struct ibv_context *ctx = sh->cdev->ctx;
2683
2684         sh->intr_handle.fd = -1;
2685         flags = fcntl(ctx->async_fd, F_GETFL);
2686         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2687         if (ret) {
2688                 DRV_LOG(INFO, "failed to change file descriptor async event"
2689                         " queue");
2690         } else {
2691                 sh->intr_handle.fd = ctx->async_fd;
2692                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2693                 if (rte_intr_callback_register(&sh->intr_handle,
2694                                         mlx5_dev_interrupt_handler, sh)) {
2695                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2696                         sh->intr_handle.fd = -1;
2697                 }
2698         }
2699         if (sh->devx) {
2700 #ifdef HAVE_IBV_DEVX_ASYNC
2701                 sh->intr_handle_devx.fd = -1;
2702                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2703                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2704                 if (!devx_comp) {
2705                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2706                         return;
2707                 }
2708                 flags = fcntl(devx_comp->fd, F_GETFL);
2709                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2710                 if (ret) {
2711                         DRV_LOG(INFO, "failed to change file descriptor"
2712                                 " devx comp");
2713                         return;
2714                 }
2715                 sh->intr_handle_devx.fd = devx_comp->fd;
2716                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2717                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2718                                         mlx5_dev_interrupt_handler_devx, sh)) {
2719                         DRV_LOG(INFO, "Fail to install the devx shared"
2720                                 " interrupt.");
2721                         sh->intr_handle_devx.fd = -1;
2722                 }
2723 #endif /* HAVE_IBV_DEVX_ASYNC */
2724         }
2725 }
2726
2727 /**
2728  * Uninstall shared asynchronous device events handler.
2729  * This function is implemented to support event sharing
2730  * between multiple ports of single IB device.
2731  *
2732  * @param dev
2733  *   Pointer to mlx5_dev_ctx_shared object.
2734  */
2735 void
2736 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2737 {
2738         if (sh->intr_handle.fd >= 0)
2739                 mlx5_intr_callback_unregister(&sh->intr_handle,
2740                                               mlx5_dev_interrupt_handler, sh);
2741 #ifdef HAVE_IBV_DEVX_ASYNC
2742         if (sh->intr_handle_devx.fd >= 0)
2743                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2744                                   mlx5_dev_interrupt_handler_devx, sh);
2745         if (sh->devx_comp)
2746                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2747 #endif
2748 }
2749
2750 /**
2751  * Read statistics by a named counter.
2752  *
2753  * @param[in] priv
2754  *   Pointer to the private device data structure.
2755  * @param[in] ctr_name
2756  *   Pointer to the name of the statistic counter to read
2757  * @param[out] stat
2758  *   Pointer to read statistic value.
2759  * @return
2760  *   0 on success and stat is valud, 1 if failed to read the value
2761  *   rte_errno is set.
2762  *
2763  */
2764 int
2765 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2766                       uint64_t *stat)
2767 {
2768         int fd;
2769
2770         if (priv->sh) {
2771                 if (priv->q_counters != NULL &&
2772                     strcmp(ctr_name, "out_of_buffer") == 0)
2773                         return mlx5_devx_cmd_queue_counter_query
2774                                         (priv->q_counters, 0, (uint32_t *)stat);
2775                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2776                       priv->sh->ibdev_path,
2777                       priv->dev_port,
2778                       ctr_name);
2779                 fd = open(path, O_RDONLY);
2780                 /*
2781                  * in switchdev the file location is not per port
2782                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2783                  */
2784                 if (fd == -1) {
2785                         MKSTR(path1, "%s/hw_counters/%s",
2786                               priv->sh->ibdev_path,
2787                               ctr_name);
2788                         fd = open(path1, O_RDONLY);
2789                 }
2790                 if (fd != -1) {
2791                         char buf[21] = {'\0'};
2792                         ssize_t n = read(fd, buf, sizeof(buf));
2793
2794                         close(fd);
2795                         if (n != -1) {
2796                                 *stat = strtoull(buf, NULL, 10);
2797                                 return 0;
2798                         }
2799                 }
2800         }
2801         *stat = 0;
2802         return 1;
2803 }
2804
2805 /**
2806  * Remove a MAC address from device
2807  *
2808  * @param dev
2809  *   Pointer to Ethernet device structure.
2810  * @param index
2811  *   MAC address index.
2812  */
2813 void
2814 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2815 {
2816         struct mlx5_priv *priv = dev->data->dev_private;
2817         const int vf = priv->config.vf;
2818
2819         if (vf)
2820                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2821                                         mlx5_ifindex(dev), priv->mac_own,
2822                                         &dev->data->mac_addrs[index], index);
2823 }
2824
2825 /**
2826  * Adds a MAC address to the device
2827  *
2828  * @param dev
2829  *   Pointer to Ethernet device structure.
2830  * @param mac_addr
2831  *   MAC address to register.
2832  * @param index
2833  *   MAC address index.
2834  *
2835  * @return
2836  *   0 on success, a negative errno value otherwise
2837  */
2838 int
2839 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2840                      uint32_t index)
2841 {
2842         struct mlx5_priv *priv = dev->data->dev_private;
2843         const int vf = priv->config.vf;
2844         int ret = 0;
2845
2846         if (vf)
2847                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2848                                            mlx5_ifindex(dev), priv->mac_own,
2849                                            mac, index);
2850         return ret;
2851 }
2852
2853 /**
2854  * Modify a VF MAC address
2855  *
2856  * @param priv
2857  *   Pointer to device private data.
2858  * @param mac_addr
2859  *   MAC address to modify into.
2860  * @param iface_idx
2861  *   Net device interface index
2862  * @param vf_index
2863  *   VF index
2864  *
2865  * @return
2866  *   0 on success, a negative errno value otherwise
2867  */
2868 int
2869 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2870                            unsigned int iface_idx,
2871                            struct rte_ether_addr *mac_addr,
2872                            int vf_index)
2873 {
2874         return mlx5_nl_vf_mac_addr_modify
2875                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2876 }
2877
2878 /**
2879  * Set device promiscuous mode
2880  *
2881  * @param dev
2882  *   Pointer to Ethernet device structure.
2883  * @param enable
2884  *   0 - promiscuous is disabled, otherwise - enabled
2885  *
2886  * @return
2887  *   0 on success, a negative error value otherwise
2888  */
2889 int
2890 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2891 {
2892         struct mlx5_priv *priv = dev->data->dev_private;
2893
2894         return mlx5_nl_promisc(priv->nl_socket_route,
2895                                mlx5_ifindex(dev), !!enable);
2896 }
2897
2898 /**
2899  * Set device promiscuous mode
2900  *
2901  * @param dev
2902  *   Pointer to Ethernet device structure.
2903  * @param enable
2904  *   0 - all multicase is disabled, otherwise - enabled
2905  *
2906  * @return
2907  *   0 on success, a negative error value otherwise
2908  */
2909 int
2910 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2911 {
2912         struct mlx5_priv *priv = dev->data->dev_private;
2913
2914         return mlx5_nl_allmulti(priv->nl_socket_route,
2915                                 mlx5_ifindex(dev), !!enable);
2916 }
2917
2918 /**
2919  * Flush device MAC addresses
2920  *
2921  * @param dev
2922  *   Pointer to Ethernet device structure.
2923  *
2924  */
2925 void
2926 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2927 {
2928         struct mlx5_priv *priv = dev->data->dev_private;
2929
2930         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2931                                dev->data->mac_addrs,
2932                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2933 }