drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_rx.h"
  44 #include "mlx5_tx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_mr.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  54
  55 #ifndef HAVE_IBV_MLX5_MOD_MPW
  56 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  57 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  58 #endif
  59
  60 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  61 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  62 #endif
  63
  64 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  65
  66 /* Spinlock for mlx5_shared_data allocation. */
  67 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  68
  69 /* Process local data for secondary processes. */
  70 static struct mlx5_local_data mlx5_local_data;
  71
  72 /**
  73  * Set the completion channel file descriptor interrupt as non-blocking.
  74  *
  75  * @param[in] rxq_obj
  76  *   Pointer to RQ channel object, which includes the channel fd
  77  *
  78  * @param[out] fd
  79  *   The file descriptor (representing the intetrrupt) used in this channel.
  80  *
  81  * @return
  82  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  83  */
  84 int
  85 mlx5_os_set_nonblock_channel_fd(int fd)
  86 {
  87         int flags;
  88
  89         flags = fcntl(fd, F_GETFL);
  90         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  91 }
  92
  93 /**
  94  * Get mlx5 device attributes. The glue function query_device_ex() is called
  95  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  96  * device attributes from the glue out parameter.
  97  *
  98  * @param dev
  99  *   Pointer to ibv context.
 100  *
 101  * @param device_attr
 102  *   Pointer to mlx5 device attributes.
 103  *
 104  * @return
 105  *   0 on success, non zero error number otherwise
 106  */
 107 int
 108 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 109 {
 110         int err;
 111         struct ibv_device_attr_ex attr_ex;
 112         memset(device_attr, 0, sizeof(*device_attr));
 113         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 114         if (err)
 115                 return err;
 116
 117         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 118         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 119         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 120         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 121         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 122         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 123         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 124         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 125         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 126         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 127         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 128         device_attr->max_rwq_indirection_table_size =
 129                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 130         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 131         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 132
 133         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 134         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 135         if (err)
 136                 return err;
 137
 138         device_attr->flags = dv_attr.flags;
 139         device_attr->comp_mask = dv_attr.comp_mask;
 140 #ifdef HAVE_IBV_MLX5_MOD_SWP
 141         device_attr->sw_parsing_offloads =
 142                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 143 #endif
 144         device_attr->min_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 146         device_attr->max_single_stride_log_num_of_bytes =
 147                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 148         device_attr->min_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 150         device_attr->max_single_wqe_log_num_of_strides =
 151                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 152         device_attr->stride_supported_qpts =
 153                 dv_attr.striding_rq_caps.supported_qpts;
 154 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 155         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 156 #endif
 157
 158         return err;
 159 }
 160
 161 /**
 162  * Verbs callback to allocate a memory. This function should allocate the space
 163  * according to the size provided residing inside a huge page.
 164  * Please note that all allocation must respect the alignment from libmlx5
 165  * (i.e. currently rte_mem_page_size()).
 166  *
 167  * @param[in] size
 168  *   The size in bytes of the memory to allocate.
 169  * @param[in] data
 170  *   A pointer to the callback data.
 171  *
 172  * @return
 173  *   Allocated buffer, NULL otherwise and rte_errno is set.
 174  */
 175 static void *
 176 mlx5_alloc_verbs_buf(size_t size, void *data)
 177 {
 178         struct mlx5_dev_ctx_shared *sh = data;
 179         void *ret;
 180         size_t alignment = rte_mem_page_size();
 181         if (alignment == (size_t)-1) {
 182                 DRV_LOG(ERR, "Failed to get mem page size");
 183                 rte_errno = ENOMEM;
 184                 return NULL;
 185         }
 186
 187         MLX5_ASSERT(data != NULL);
 188         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 189         if (!ret && size)
 190                 rte_errno = ENOMEM;
 191         return ret;
 192 }
 193
 194 /**
 195  * Verbs callback to free a memory.
 196  *
 197  * @param[in] ptr
 198  *   A pointer to the memory to free.
 199  * @param[in] data
 200  *   A pointer to the callback data.
 201  */
 202 static void
 203 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 204 {
 205         MLX5_ASSERT(data != NULL);
 206         mlx5_free(ptr);
 207 }
 208
 209 /**
 210  * Initialize DR related data within private structure.
 211  * Routine checks the reference counter and does actual
 212  * resources creation/initialization only if counter is zero.
 213  *
 214  * @param[in] priv
 215  *   Pointer to the private device data structure.
 216  *
 217  * @return
 218  *   Zero on success, positive error code otherwise.
 219  */
 220 static int
 221 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 222 {
 223         struct mlx5_dev_ctx_shared *sh = priv->sh;
 224         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 225         int err;
 226
 227         MLX5_ASSERT(sh && sh->refcnt);
 228         if (sh->refcnt > 1)
 229                 return 0;
 230         err = mlx5_alloc_table_hash_list(priv);
 231         if (err)
 232                 goto error;
 233         /* The resources below are only valid with DV support. */
 234 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 235         /* Init port id action cache list. */
 236         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 237         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 238                              flow_dv_port_id_create_cb,
 239                              flow_dv_port_id_match_cb,
 240                              flow_dv_port_id_remove_cb);
 241         /* Init push vlan action cache list. */
 242         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 243         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 244                              flow_dv_push_vlan_create_cb,
 245                              flow_dv_push_vlan_match_cb,
 246                              flow_dv_push_vlan_remove_cb);
 247         /* Init sample action cache list. */
 248         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 249         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 250                              flow_dv_sample_create_cb,
 251                              flow_dv_sample_match_cb,
 252                              flow_dv_sample_remove_cb);
 253         /* Init dest array action cache list. */
 254         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 255         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 256                              flow_dv_dest_array_create_cb,
 257                              flow_dv_dest_array_match_cb,
 258                              flow_dv_dest_array_remove_cb);
 259         /* Create tags hash list table. */
 260         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 261         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 262                                           MLX5_HLIST_WRITE_MOST,
 263                                           flow_dv_tag_create_cb,
 264                                           flow_dv_tag_match_cb,
 265                                           flow_dv_tag_remove_cb);
 266         if (!sh->tag_table) {
 267                 DRV_LOG(ERR, "tags with hash creation failed.");
 268                 err = ENOMEM;
 269                 goto error;
 270         }
 271         sh->tag_table->ctx = sh;
 272         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 273         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 274                                             0, MLX5_HLIST_WRITE_MOST |
 275                                             MLX5_HLIST_DIRECT_KEY,
 276                                             flow_dv_modify_create_cb,
 277                                             flow_dv_modify_match_cb,
 278                                             flow_dv_modify_remove_cb);
 279         if (!sh->modify_cmds) {
 280                 DRV_LOG(ERR, "hdr modify hash creation failed");
 281                 err = ENOMEM;
 282                 goto error;
 283         }
 284         sh->modify_cmds->ctx = sh;
 285         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 286         sh->encaps_decaps = mlx5_hlist_create(s,
 287                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 288                                               0, MLX5_HLIST_DIRECT_KEY |
 289                                               MLX5_HLIST_WRITE_MOST,
 290                                               flow_dv_encap_decap_create_cb,
 291                                               flow_dv_encap_decap_match_cb,
 292                                               flow_dv_encap_decap_remove_cb);
 293         if (!sh->encaps_decaps) {
 294                 DRV_LOG(ERR, "encap decap hash creation failed");
 295                 err = ENOMEM;
 296                 goto error;
 297         }
 298         sh->encaps_decaps->ctx = sh;
 299 #endif
 300 #ifdef HAVE_MLX5DV_DR
 301         void *domain;
 302
 303         /* Reference counter is zero, we should initialize structures. */
 304         domain = mlx5_glue->dr_create_domain(sh->ctx,
 305                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 306         if (!domain) {
 307                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 308                 err = errno;
 309                 goto error;
 310         }
 311         sh->rx_domain = domain;
 312         domain = mlx5_glue->dr_create_domain(sh->ctx,
 313                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 314         if (!domain) {
 315                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 316                 err = errno;
 317                 goto error;
 318         }
 319         sh->tx_domain = domain;
 320 #ifdef HAVE_MLX5DV_DR_ESWITCH
 321         if (priv->config.dv_esw_en) {
 322                 domain  = mlx5_glue->dr_create_domain
 323                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 324                 if (!domain) {
 325                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 326                         err = errno;
 327                         goto error;
 328                 }
 329                 sh->fdb_domain = domain;
 330         }
 331         /*
 332          * The drop action is just some dummy placeholder in rdma-core. It
 333          * does not belong to domains and has no any attributes, and, can be
 334          * shared by the entire device.
 335          */
 336         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 337         if (!sh->dr_drop_action) {
 338                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 339                 err = errno;
 340                 goto error;
 341         }
 342 #endif
 343         if (!sh->tunnel_hub)
 344                 err = mlx5_alloc_tunnel_hub(sh);
 345         if (err) {
 346                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 347                 goto error;
 348         }
 349         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 350                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 351                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 352                 if (sh->fdb_domain)
 353                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 354         }
 355         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 356 #endif /* HAVE_MLX5DV_DR */
 357         sh->default_miss_action =
 358                         mlx5_glue->dr_create_flow_action_default_miss();
 359         if (!sh->default_miss_action)
 360                 DRV_LOG(WARNING, "Default miss action is not supported.");
 361         return 0;
 362 error:
 363         /* Rollback the created objects. */
 364         if (sh->rx_domain) {
 365                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 366                 sh->rx_domain = NULL;
 367         }
 368         if (sh->tx_domain) {
 369                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 370                 sh->tx_domain = NULL;
 371         }
 372         if (sh->fdb_domain) {
 373                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 374                 sh->fdb_domain = NULL;
 375         }
 376         if (sh->dr_drop_action) {
 377                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 378                 sh->dr_drop_action = NULL;
 379         }
 380         if (sh->pop_vlan_action) {
 381                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 382                 sh->pop_vlan_action = NULL;
 383         }
 384         if (sh->encaps_decaps) {
 385                 mlx5_hlist_destroy(sh->encaps_decaps);
 386                 sh->encaps_decaps = NULL;
 387         }
 388         if (sh->modify_cmds) {
 389                 mlx5_hlist_destroy(sh->modify_cmds);
 390                 sh->modify_cmds = NULL;
 391         }
 392         if (sh->tag_table) {
 393                 /* tags should be destroyed with flow before. */
 394                 mlx5_hlist_destroy(sh->tag_table);
 395                 sh->tag_table = NULL;
 396         }
 397         if (sh->tunnel_hub) {
 398                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 399                 sh->tunnel_hub = NULL;
 400         }
 401         mlx5_free_table_hash_list(priv);
 402         return err;
 403 }
 404
 405 /**
 406  * Destroy DR related data within private structure.
 407  *
 408  * @param[in] priv
 409  *   Pointer to the private device data structure.
 410  */
 411 void
 412 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 413 {
 414         struct mlx5_dev_ctx_shared *sh = priv->sh;
 415
 416         MLX5_ASSERT(sh && sh->refcnt);
 417         if (sh->refcnt > 1)
 418                 return;
 419 #ifdef HAVE_MLX5DV_DR
 420         if (sh->rx_domain) {
 421                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 422                 sh->rx_domain = NULL;
 423         }
 424         if (sh->tx_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 426                 sh->tx_domain = NULL;
 427         }
 428 #ifdef HAVE_MLX5DV_DR_ESWITCH
 429         if (sh->fdb_domain) {
 430                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 431                 sh->fdb_domain = NULL;
 432         }
 433         if (sh->dr_drop_action) {
 434                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 435                 sh->dr_drop_action = NULL;
 436         }
 437 #endif
 438         if (sh->pop_vlan_action) {
 439                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 440                 sh->pop_vlan_action = NULL;
 441         }
 442 #endif /* HAVE_MLX5DV_DR */
 443         if (sh->default_miss_action)
 444                 mlx5_glue->destroy_flow_action
 445                                 (sh->default_miss_action);
 446         if (sh->encaps_decaps) {
 447                 mlx5_hlist_destroy(sh->encaps_decaps);
 448                 sh->encaps_decaps = NULL;
 449         }
 450         if (sh->modify_cmds) {
 451                 mlx5_hlist_destroy(sh->modify_cmds);
 452                 sh->modify_cmds = NULL;
 453         }
 454         if (sh->tag_table) {
 455                 /* tags should be destroyed with flow before. */
 456                 mlx5_hlist_destroy(sh->tag_table);
 457                 sh->tag_table = NULL;
 458         }
 459         if (sh->tunnel_hub) {
 460                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 461                 sh->tunnel_hub = NULL;
 462         }
 463         mlx5_cache_list_destroy(&sh->port_id_action_list);
 464         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 465         mlx5_free_table_hash_list(priv);
 466 }
 467
 468 /**
 469  * Initialize shared data between primary and secondary process.
 470  *
 471  * A memzone is reserved by primary process and secondary processes attach to
 472  * the memzone.
 473  *
 474  * @return
 475  *   0 on success, a negative errno value otherwise and rte_errno is set.
 476  */
 477 static int
 478 mlx5_init_shared_data(void)
 479 {
 480         const struct rte_memzone *mz;
 481         int ret = 0;
 482
 483         rte_spinlock_lock(&mlx5_shared_data_lock);
 484         if (mlx5_shared_data == NULL) {
 485                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 486                         /* Allocate shared memory. */
 487                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 488                                                  sizeof(*mlx5_shared_data),
 489                                                  SOCKET_ID_ANY, 0);
 490                         if (mz == NULL) {
 491                                 DRV_LOG(ERR,
 492                                         "Cannot allocate mlx5 shared data");
 493                                 ret = -rte_errno;
 494                                 goto error;
 495                         }
 496                         mlx5_shared_data = mz->addr;
 497                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 498                         rte_spinlock_init(&mlx5_shared_data->lock);
 499                 } else {
 500                         /* Lookup allocated shared memory. */
 501                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 502                         if (mz == NULL) {
 503                                 DRV_LOG(ERR,
 504                                         "Cannot attach mlx5 shared data");
 505                                 ret = -rte_errno;
 506                                 goto error;
 507                         }
 508                         mlx5_shared_data = mz->addr;
 509                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 510                 }
 511         }
 512 error:
 513         rte_spinlock_unlock(&mlx5_shared_data_lock);
 514         return ret;
 515 }
 516
 517 /**
 518  * PMD global initialization.
 519  *
 520  * Independent from individual device, this function initializes global
 521  * per-PMD data structures distinguishing primary and secondary processes.
 522  * Hence, each initialization is called once per a process.
 523  *
 524  * @return
 525  *   0 on success, a negative errno value otherwise and rte_errno is set.
 526  */
 527 static int
 528 mlx5_init_once(void)
 529 {
 530         struct mlx5_shared_data *sd;
 531         struct mlx5_local_data *ld = &mlx5_local_data;
 532         int ret = 0;
 533
 534         if (mlx5_init_shared_data())
 535                 return -rte_errno;
 536         sd = mlx5_shared_data;
 537         MLX5_ASSERT(sd);
 538         rte_spinlock_lock(&sd->lock);
 539         switch (rte_eal_process_type()) {
 540         case RTE_PROC_PRIMARY:
 541                 if (sd->init_done)
 542                         break;
 543                 LIST_INIT(&sd->mem_event_cb_list);
 544                 rte_rwlock_init(&sd->mem_event_rwlock);
 545                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 546                                                 mlx5_mr_mem_event_cb, NULL);
 547                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 548                                            mlx5_mp_os_primary_handle);
 549                 if (ret)
 550                         goto out;
 551                 sd->init_done = true;
 552                 break;
 553         case RTE_PROC_SECONDARY:
 554                 if (ld->init_done)
 555                         break;
 556                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 557                                              mlx5_mp_os_secondary_handle);
 558                 if (ret)
 559                         goto out;
 560                 ++sd->secondary_cnt;
 561                 ld->init_done = true;
 562                 break;
 563         default:
 564                 break;
 565         }
 566 out:
 567         rte_spinlock_unlock(&sd->lock);
 568         return ret;
 569 }
 570
 571 /**
 572  * Create the Tx queue DevX/Verbs object.
 573  *
 574  * @param dev
 575  *   Pointer to Ethernet device.
 576  * @param idx
 577  *   Queue index in DPDK Tx queue array.
 578  *
 579  * @return
 580  *   0 on success, a negative errno value otherwise and rte_errno is set.
 581  */
 582 static int
 583 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 584 {
 585         struct mlx5_priv *priv = dev->data->dev_private;
 586         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 587         struct mlx5_txq_ctrl *txq_ctrl =
 588                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 589
 590         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 591                 return mlx5_txq_devx_obj_new(dev, idx);
 592 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 593         if (!priv->config.dv_esw_en)
 594                 return mlx5_txq_devx_obj_new(dev, idx);
 595 #endif
 596         return mlx5_txq_ibv_obj_new(dev, idx);
 597 }
 598
 599 /**
 600  * Release an Tx DevX/verbs queue object.
 601  *
 602  * @param txq_obj
 603  *   DevX/Verbs Tx queue object.
 604  */
 605 static void
 606 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 607 {
 608         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 609                 mlx5_txq_devx_obj_release(txq_obj);
 610                 return;
 611         }
 612 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 613         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 614                 mlx5_txq_devx_obj_release(txq_obj);
 615                 return;
 616         }
 617 #endif
 618         mlx5_txq_ibv_obj_release(txq_obj);
 619 }
 620
 621 /**
 622  * DV flow counter mode detect and config.
 623  *
 624  * @param dev
 625  *   Pointer to rte_eth_dev structure.
 626  *
 627  */
 628 static void
 629 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 630 {
 631 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 632         struct mlx5_priv *priv = dev->data->dev_private;
 633         struct mlx5_dev_ctx_shared *sh = priv->sh;
 634         bool fallback;
 635
 636 #ifndef HAVE_IBV_DEVX_ASYNC
 637         fallback = true;
 638 #else
 639         fallback = false;
 640         if (!priv->config.devx || !priv->config.dv_flow_en ||
 641             !priv->config.hca_attr.flow_counters_dump ||
 642             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 643             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 644                 fallback = true;
 645 #endif
 646         if (fallback)
 647                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 648                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 649                         priv->config.hca_attr.flow_counters_dump,
 650                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 651         /* Initialize fallback mode only on the port initializes sh. */
 652         if (sh->refcnt == 1)
 653                 sh->cmng.counter_fallback = fallback;
 654         else if (fallback != sh->cmng.counter_fallback)
 655                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 656                         "with others:%d.", PORT_ID(priv), fallback);
 657 #endif
 658 }
 659
 660 static void
 661 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 662 {
 663         struct mlx5_priv *priv = dev->data->dev_private;
 664         void *ctx = priv->sh->ctx;
 665
 666         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 667         if (!priv->q_counters) {
 668                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 669                 struct ibv_wq *wq;
 670
 671                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 672                         "by DevX - fall-back to use the kernel driver global "
 673                         "queue counter.", dev->data->port_id);
 674                 /* Create WQ by kernel and query its queue counter ID. */
 675                 if (cq) {
 676                         wq = mlx5_glue->create_wq(ctx,
 677                                                   &(struct ibv_wq_init_attr){
 678                                                     .wq_type = IBV_WQT_RQ,
 679                                                     .max_wr = 1,
 680                                                     .max_sge = 1,
 681                                                     .pd = priv->sh->pd,
 682                                                     .cq = cq,
 683                                                 });
 684                         if (wq) {
 685                                 /* Counter is assigned only on RDY state. */
 686                                 int ret = mlx5_glue->modify_wq(wq,
 687                                                  &(struct ibv_wq_attr){
 688                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 689                                                  .wq_state = IBV_WQS_RDY,
 690                                                 });
 691
 692                                 if (ret == 0)
 693                                         mlx5_devx_cmd_wq_query(wq,
 694                                                          &priv->counter_set_id);
 695                                 claim_zero(mlx5_glue->destroy_wq(wq));
 696                         }
 697                         claim_zero(mlx5_glue->destroy_cq(cq));
 698                 }
 699         } else {
 700                 priv->counter_set_id = priv->q_counters->id;
 701         }
 702         if (priv->counter_set_id == 0)
 703                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 704                         "available.", dev->data->port_id);
 705 }
 706
 707 /**
 708  * Check if representor spawn info match devargs.
 709  *
 710  * @param spawn
 711  *   Verbs device parameters (name, port, switch_info) to spawn.
 712  * @param eth_da
 713  *   Device devargs to probe.
 714  *
 715  * @return
 716  *   Match result.
 717  */
 718 static bool
 719 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 720                        struct rte_eth_devargs *eth_da)
 721 {
 722         struct mlx5_switch_info *switch_info = &spawn->info;
 723         unsigned int p, f;
 724         uint16_t id;
 725         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 726                                                       eth_da->type);
 727
 728         switch (eth_da->type) {
 729         case RTE_ETH_REPRESENTOR_SF:
 730                 if (!(spawn->info.port_name == -1 &&
 731                       switch_info->name_type ==
 732                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 733                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 734                         rte_errno = EBUSY;
 735                         return false;
 736                 }
 737                 break;
 738         case RTE_ETH_REPRESENTOR_VF:
 739                 /* Allows HPF representor index -1 as exception. */
 740                 if (!(spawn->info.port_name == -1 &&
 741                       switch_info->name_type ==
 742                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 743                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 744                         rte_errno = EBUSY;
 745                         return false;
 746                 }
 747                 break;
 748         case RTE_ETH_REPRESENTOR_NONE:
 749                 rte_errno = EBUSY;
 750                 return false;
 751         default:
 752                 rte_errno = ENOTSUP;
 753                 DRV_LOG(ERR, "unsupported representor type");
 754                 return false;
 755         }
 756         /* Check representor ID: */
 757         for (p = 0; p < eth_da->nb_ports; ++p) {
 758                 if (spawn->pf_bond < 0) {
 759                         /* For non-LAG mode, allow and ignore pf. */
 760                         switch_info->pf_num = eth_da->ports[p];
 761                         repr_id = mlx5_representor_id_encode(switch_info,
 762                                                              eth_da->type);
 763                 }
 764                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 765                         id = MLX5_REPRESENTOR_ID
 766                                 (eth_da->ports[p], eth_da->type,
 767                                  eth_da->representor_ports[f]);
 768                         if (repr_id == id)
 769                                 return true;
 770                 }
 771         }
 772         rte_errno = EBUSY;
 773         return false;
 774 }
 775
 776
 777 /**
 778  * Spawn an Ethernet device from Verbs information.
 779  *
 780  * @param dpdk_dev
 781  *   Backing DPDK device.
 782  * @param spawn
 783  *   Verbs device parameters (name, port, switch_info) to spawn.
 784  * @param config
 785  *   Device configuration parameters.
 786  * @param config
 787  *   Device arguments.
 788  *
 789  * @return
 790  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 791  *   is set. The following errors are defined:
 792  *
 793  *   EBUSY: device is not supposed to be spawned.
 794  *   EEXIST: device is already spawned
 795  */
 796 static struct rte_eth_dev *
 797 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 798                struct mlx5_dev_spawn_data *spawn,
 799                struct mlx5_dev_config *config,
 800                struct rte_eth_devargs *eth_da)
 801 {
 802         const struct mlx5_switch_info *switch_info = &spawn->info;
 803         struct mlx5_dev_ctx_shared *sh = NULL;
 804         struct ibv_port_attr port_attr;
 805         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 806         struct rte_eth_dev *eth_dev = NULL;
 807         struct mlx5_priv *priv = NULL;
 808         int err = 0;
 809         unsigned int hw_padding = 0;
 810         unsigned int mps;
 811         unsigned int tunnel_en = 0;
 812         unsigned int mpls_en = 0;
 813         unsigned int swp = 0;
 814         unsigned int mprq = 0;
 815         unsigned int mprq_min_stride_size_n = 0;
 816         unsigned int mprq_max_stride_size_n = 0;
 817         unsigned int mprq_min_stride_num_n = 0;
 818         unsigned int mprq_max_stride_num_n = 0;
 819         struct rte_ether_addr mac;
 820         char name[RTE_ETH_NAME_MAX_LEN];
 821         int own_domain_id = 0;
 822         uint16_t port_id;
 823 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 824         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 825 #endif
 826
 827         /* Determine if this port representor is supposed to be spawned. */
 828         if (switch_info->representor && dpdk_dev->devargs &&
 829             !mlx5_representor_match(spawn, eth_da))
 830                 return NULL;
 831         /* Build device name. */
 832         if (spawn->pf_bond < 0) {
 833                 /* Single device. */
 834                 if (!switch_info->representor)
 835                         strlcpy(name, dpdk_dev->name, sizeof(name));
 836                 else
 837                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 838                                  dpdk_dev->name,
 839                                  switch_info->name_type ==
 840                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 841                                  switch_info->port_name);
 842         } else {
 843                 /* Bonding device. */
 844                 if (!switch_info->representor) {
 845                         err = snprintf(name, sizeof(name), "%s_%s",
 846                                  dpdk_dev->name,
 847                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 848                 } else {
 849                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 850                                 dpdk_dev->name,
 851                                 mlx5_os_get_dev_device_name(spawn->phys_dev),
 852                                 switch_info->ctrl_num,
 853                                 switch_info->pf_num,
 854                                 switch_info->name_type ==
 855                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 856                                 switch_info->port_name);
 857                 }
 858         }
 859         if (err >= (int)sizeof(name))
 860                 DRV_LOG(WARNING, "device name overflow %s", name);
 861         /* check if the device is already spawned */
 862         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 863                 rte_errno = EEXIST;
 864                 return NULL;
 865         }
 866         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 867         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 868                 struct mlx5_mp_id mp_id;
 869
 870                 eth_dev = rte_eth_dev_attach_secondary(name);
 871                 if (eth_dev == NULL) {
 872                         DRV_LOG(ERR, "can not attach rte ethdev");
 873                         rte_errno = ENOMEM;
 874                         return NULL;
 875                 }
 876                 eth_dev->device = dpdk_dev;
 877                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 878                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 879                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 880                 err = mlx5_proc_priv_init(eth_dev);
 881                 if (err)
 882                         return NULL;
 883                 mp_id.port_id = eth_dev->data->port_id;
 884                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 885                 /* Receive command fd from primary process */
 886                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 887                 if (err < 0)
 888                         goto err_secondary;
 889                 /* Remap UAR for Tx queues. */
 890                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 891                 if (err)
 892                         goto err_secondary;
 893                 /*
 894                  * Ethdev pointer is still required as input since
 895                  * the primary device is not accessible from the
 896                  * secondary process.
 897                  */
 898                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 899                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 900                 return eth_dev;
 901 err_secondary:
 902                 mlx5_dev_close(eth_dev);
 903                 return NULL;
 904         }
 905         /*
 906          * Some parameters ("tx_db_nc" in particularly) are needed in
 907          * advance to create dv/verbs device context. We proceed the
 908          * devargs here to get ones, and later proceed devargs again
 909          * to override some hardware settings.
 910          */
 911         err = mlx5_args(config, dpdk_dev->devargs);
 912         if (err) {
 913                 err = rte_errno;
 914                 DRV_LOG(ERR, "failed to process device arguments: %s",
 915                         strerror(rte_errno));
 916                 goto error;
 917         }
 918         if (config->dv_miss_info) {
 919                 if (switch_info->master || switch_info->representor)
 920                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 921         }
 922         mlx5_malloc_mem_select(config->sys_mem_en);
 923         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 924         if (!sh)
 925                 return NULL;
 926         config->devx = sh->devx;
 927 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 928         config->dest_tir = 1;
 929 #endif
 930 #ifdef HAVE_IBV_MLX5_MOD_SWP
 931         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 932 #endif
 933         /*
 934          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 935          * as all ConnectX-5 devices.
 936          */
 937 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 938         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 939 #endif
 940 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 941         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 942 #endif
 943         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 944         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 945                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 946                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 947                         mps = MLX5_MPW_ENHANCED;
 948                 } else {
 949                         DRV_LOG(DEBUG, "MPW is supported");
 950                         mps = MLX5_MPW;
 951                 }
 952         } else {
 953                 DRV_LOG(DEBUG, "MPW isn't supported");
 954                 mps = MLX5_MPW_DISABLED;
 955         }
 956 #ifdef HAVE_IBV_MLX5_MOD_SWP
 957         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 958                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 959         DRV_LOG(DEBUG, "SWP support: %u", swp);
 960 #endif
 961         config->swp = !!swp;
 962 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 963         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 964                 struct mlx5dv_striding_rq_caps mprq_caps =
 965                         dv_attr.striding_rq_caps;
 966
 967                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 968                         mprq_caps.min_single_stride_log_num_of_bytes);
 969                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 970                         mprq_caps.max_single_stride_log_num_of_bytes);
 971                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 972                         mprq_caps.min_single_wqe_log_num_of_strides);
 973                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 974                         mprq_caps.max_single_wqe_log_num_of_strides);
 975                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 976                         mprq_caps.supported_qpts);
 977                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 978                 mprq = 1;
 979                 mprq_min_stride_size_n =
 980                         mprq_caps.min_single_stride_log_num_of_bytes;
 981                 mprq_max_stride_size_n =
 982                         mprq_caps.max_single_stride_log_num_of_bytes;
 983                 mprq_min_stride_num_n =
 984                         mprq_caps.min_single_wqe_log_num_of_strides;
 985                 mprq_max_stride_num_n =
 986                         mprq_caps.max_single_wqe_log_num_of_strides;
 987         }
 988 #endif
 989         /* Rx CQE compression is enabled by default. */
 990         config->cqe_comp = 1;
 991 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 992         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 993                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 994                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 995                              (dv_attr.tunnel_offloads_caps &
 996                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 997                              (dv_attr.tunnel_offloads_caps &
 998                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 999         }
1000         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1001                 tunnel_en ? "" : "not ");
1002 #else
1003         DRV_LOG(WARNING,
1004                 "tunnel offloading disabled due to old OFED/rdma-core version");
1005 #endif
1006         config->tunnel_en = tunnel_en;
1007 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1008         mpls_en = ((dv_attr.tunnel_offloads_caps &
1009                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1010                    (dv_attr.tunnel_offloads_caps &
1011                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1012         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1013                 mpls_en ? "" : "not ");
1014 #else
1015         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1016                 " old OFED/rdma-core version or firmware configuration");
1017 #endif
1018         config->mpls_en = mpls_en;
1019         /* Check port status. */
1020         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1021         if (err) {
1022                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1023                 goto error;
1024         }
1025         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1026                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1027                 err = EINVAL;
1028                 goto error;
1029         }
1030         if (port_attr.state != IBV_PORT_ACTIVE)
1031                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1032                         mlx5_glue->port_state_str(port_attr.state),
1033                         port_attr.state);
1034         /* Allocate private eth device data. */
1035         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1036                            sizeof(*priv),
1037                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1038         if (priv == NULL) {
1039                 DRV_LOG(ERR, "priv allocation failure");
1040                 err = ENOMEM;
1041                 goto error;
1042         }
1043         priv->sh = sh;
1044         priv->dev_port = spawn->phys_port;
1045         priv->pci_dev = spawn->pci_dev;
1046         priv->mtu = RTE_ETHER_MTU;
1047         /* Some internal functions rely on Netlink sockets, open them now. */
1048         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1049         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1050         priv->representor = !!switch_info->representor;
1051         priv->master = !!switch_info->master;
1052         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1053         priv->vport_meta_tag = 0;
1054         priv->vport_meta_mask = 0;
1055         priv->pf_bond = spawn->pf_bond;
1056 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1057         /*
1058          * The DevX port query API is implemented. E-Switch may use
1059          * either vport or reg_c[0] metadata register to match on
1060          * vport index. The engaged part of metadata register is
1061          * defined by mask.
1062          */
1063         if (switch_info->representor || switch_info->master) {
1064                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1065                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1066                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1067                                                  &devx_port);
1068                 if (err) {
1069                         DRV_LOG(WARNING,
1070                                 "can't query devx port %d on device %s",
1071                                 spawn->phys_port,
1072                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1073                         devx_port.comp_mask = 0;
1074                 }
1075         }
1076         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1077                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1078                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1079                 if (!priv->vport_meta_mask) {
1080                         DRV_LOG(ERR, "vport zero mask for port %d"
1081                                      " on bonding device %s",
1082                                      spawn->phys_port,
1083                                      mlx5_os_get_dev_device_name
1084                                                         (spawn->phys_dev));
1085                         err = ENOTSUP;
1086                         goto error;
1087                 }
1088                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1089                         DRV_LOG(ERR, "invalid vport tag for port %d"
1090                                      " on bonding device %s",
1091                                      spawn->phys_port,
1092                                      mlx5_os_get_dev_device_name
1093                                                         (spawn->phys_dev));
1094                         err = ENOTSUP;
1095                         goto error;
1096                 }
1097         }
1098         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1099                 priv->vport_id = devx_port.vport_num;
1100         } else if (spawn->pf_bond >= 0) {
1101                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1102                              " on bonding device %s",
1103                              spawn->phys_port,
1104                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1105                 err = ENOTSUP;
1106                 goto error;
1107         } else {
1108                 /* Suppose vport index in compatible way. */
1109                 priv->vport_id = switch_info->representor ?
1110                                  switch_info->port_name + 1 : -1;
1111         }
1112 #else
1113         /*
1114          * Kernel/rdma_core support single E-Switch per PF configurations
1115          * only and vport_id field contains the vport index for
1116          * associated VF, which is deduced from representor port name.
1117          * For example, let's have the IB device port 10, it has
1118          * attached network device eth0, which has port name attribute
1119          * pf0vf2, we can deduce the VF number as 2, and set vport index
1120          * as 3 (2+1). This assigning schema should be changed if the
1121          * multiple E-Switch instances per PF configurations or/and PCI
1122          * subfunctions are added.
1123          */
1124         priv->vport_id = switch_info->representor ?
1125                          switch_info->port_name + 1 : -1;
1126 #endif
1127         priv->representor_id = mlx5_representor_id_encode(switch_info,
1128                                                           eth_da->type);
1129         /*
1130          * Look for sibling devices in order to reuse their switch domain
1131          * if any, otherwise allocate one.
1132          */
1133         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1134                 const struct mlx5_priv *opriv =
1135                         rte_eth_devices[port_id].data->dev_private;
1136
1137                 if (!opriv ||
1138                     opriv->sh != priv->sh ||
1139                         opriv->domain_id ==
1140                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1141                         continue;
1142                 priv->domain_id = opriv->domain_id;
1143                 break;
1144         }
1145         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1146                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1147                 if (err) {
1148                         err = rte_errno;
1149                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1150                                 strerror(rte_errno));
1151                         goto error;
1152                 }
1153                 own_domain_id = 1;
1154         }
1155         /* Override some values set by hardware configuration. */
1156         mlx5_args(config, dpdk_dev->devargs);
1157         err = mlx5_dev_check_sibling_config(priv, config);
1158         if (err)
1159                 goto error;
1160         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1161                             IBV_DEVICE_RAW_IP_CSUM);
1162         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1163                 (config->hw_csum ? "" : "not "));
1164 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1165         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1166         DRV_LOG(DEBUG, "counters are not supported");
1167 #endif
1168 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1169         if (config->dv_flow_en) {
1170                 DRV_LOG(WARNING, "DV flow is not supported");
1171                 config->dv_flow_en = 0;
1172         }
1173 #endif
1174         config->ind_table_max_size =
1175                 sh->device_attr.max_rwq_indirection_table_size;
1176         /*
1177          * Remove this check once DPDK supports larger/variable
1178          * indirection tables.
1179          */
1180         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1181                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1182         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1183                 config->ind_table_max_size);
1184         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1185                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1186         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1187                 (config->hw_vlan_strip ? "" : "not "));
1188         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1189                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1190 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1191         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1192 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1193         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1194                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1195 #endif
1196         if (config->hw_padding && !hw_padding) {
1197                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1198                 config->hw_padding = 0;
1199         } else if (config->hw_padding) {
1200                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1201         }
1202         config->tso = (sh->device_attr.max_tso > 0 &&
1203                       (sh->device_attr.tso_supported_qpts &
1204                        (1 << IBV_QPT_RAW_PACKET)));
1205         if (config->tso)
1206                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1207         /*
1208          * MPW is disabled by default, while the Enhanced MPW is enabled
1209          * by default.
1210          */
1211         if (config->mps == MLX5_ARG_UNSET)
1212                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1213                                                           MLX5_MPW_DISABLED;
1214         else
1215                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1216         DRV_LOG(INFO, "%sMPS is %s",
1217                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1218                 config->mps == MLX5_MPW ? "legacy " : "",
1219                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1220         if (config->devx) {
1221                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1222                 if (err) {
1223                         err = -err;
1224                         goto error;
1225                 }
1226                 /* Check relax ordering support. */
1227                 if (!haswell_broadwell_cpu) {
1228                         sh->cmng.relaxed_ordering_write =
1229                                 config->hca_attr.relaxed_ordering_write;
1230                         sh->cmng.relaxed_ordering_read =
1231                                 config->hca_attr.relaxed_ordering_read;
1232                 } else {
1233                         sh->cmng.relaxed_ordering_read = 0;
1234                         sh->cmng.relaxed_ordering_write = 0;
1235                 }
1236                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1237                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1238                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1239                 /* Check for LRO support. */
1240                 if (config->dest_tir && config->hca_attr.lro_cap &&
1241                     config->dv_flow_en) {
1242                         /* TBD check tunnel lro caps. */
1243                         config->lro.supported = config->hca_attr.lro_cap;
1244                         DRV_LOG(DEBUG, "Device supports LRO");
1245                         /*
1246                          * If LRO timeout is not configured by application,
1247                          * use the minimal supported value.
1248                          */
1249                         if (!config->lro.timeout)
1250                                 config->lro.timeout =
1251                                 config->hca_attr.lro_timer_supported_periods[0];
1252                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1253                                 config->lro.timeout);
1254                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1255                                 "required for coalescing is %d bytes",
1256                                 config->hca_attr.lro_min_mss_size);
1257                 }
1258 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1259                 if (config->hca_attr.qos.sup &&
1260                     config->hca_attr.qos.flow_meter_old &&
1261                     config->dv_flow_en) {
1262                         uint8_t reg_c_mask =
1263                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1264                         /*
1265                          * Meter needs two REG_C's for color match and pre-sfx
1266                          * flow match. Here get the REG_C for color match.
1267                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1268                          */
1269                         reg_c_mask &= 0xfc;
1270                         if (__builtin_popcount(reg_c_mask) < 1) {
1271                                 priv->mtr_en = 0;
1272                                 DRV_LOG(WARNING, "No available register for"
1273                                         " meter.");
1274                         } else {
1275                                 /*
1276                                  * The meter color register is used by the
1277                                  * flow-hit feature as well.
1278                                  * The flow-hit feature must use REG_C_3
1279                                  * Prefer REG_C_3 if it is available.
1280                                  */
1281                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1282                                         priv->mtr_color_reg = REG_C_3;
1283                                 else
1284                                         priv->mtr_color_reg = ffs(reg_c_mask)
1285                                                               - 1 + REG_C_0;
1286                                 priv->mtr_en = 1;
1287                                 priv->mtr_reg_share =
1288                                       config->hca_attr.qos.flow_meter;
1289                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1290                                         priv->mtr_color_reg);
1291                         }
1292                 }
1293 #endif
1294 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1295                 if (config->hca_attr.flow_hit_aso &&
1296                     priv->mtr_color_reg == REG_C_3) {
1297                         sh->flow_hit_aso_en = 1;
1298                         err = mlx5_flow_aso_age_mng_init(sh);
1299                         if (err) {
1300                                 err = -err;
1301                                 goto error;
1302                         }
1303                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1304                 }
1305 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1306 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1307                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1308                     config->dv_flow_en) {
1309                         priv->sampler_en = 1;
1310                         DRV_LOG(DEBUG, "Sampler enabled!");
1311                 } else {
1312                         priv->sampler_en = 0;
1313                         if (!config->hca_attr.log_max_ft_sampler_num)
1314                                 DRV_LOG(WARNING,
1315                                         "No available register for sampler.");
1316                         else
1317                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1318                 }
1319 #endif
1320         }
1321         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1322             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1323                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1324                 config->cqe_comp = 0;
1325         }
1326         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1327             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1328                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1329                                  " format isn't supported.");
1330                 config->cqe_comp = 0;
1331         }
1332         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1333             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1334                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1335                                  " format isn't supported.");
1336                 config->cqe_comp = 0;
1337         }
1338         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1339                         config->cqe_comp ? "" : "not ");
1340         if (config->tx_pp) {
1341                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1342                         config->hca_attr.dev_freq_khz);
1343                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1344                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1345                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1346                         config->hca_attr.cross_channel ? "" : "not ");
1347                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1348                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1349                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1350                         config->hca_attr.non_wire_sq ? "" : "not ");
1351                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1352                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1353                         config->hca_attr.log_max_static_sq_wq);
1354                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1355                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1356                 if (!config->devx) {
1357                         DRV_LOG(ERR, "DevX is required for packet pacing");
1358                         err = ENODEV;
1359                         goto error;
1360                 }
1361                 if (!config->hca_attr.qos.packet_pacing) {
1362                         DRV_LOG(ERR, "Packet pacing is not supported");
1363                         err = ENODEV;
1364                         goto error;
1365                 }
1366                 if (!config->hca_attr.cross_channel) {
1367                         DRV_LOG(ERR, "Cross channel operations are"
1368                                      " required for packet pacing");
1369                         err = ENODEV;
1370                         goto error;
1371                 }
1372                 if (!config->hca_attr.wqe_index_ignore) {
1373                         DRV_LOG(ERR, "WQE index ignore feature is"
1374                                      " required for packet pacing");
1375                         err = ENODEV;
1376                         goto error;
1377                 }
1378                 if (!config->hca_attr.non_wire_sq) {
1379                         DRV_LOG(ERR, "Non-wire SQ feature is"
1380                                      " required for packet pacing");
1381                         err = ENODEV;
1382                         goto error;
1383                 }
1384                 if (!config->hca_attr.log_max_static_sq_wq) {
1385                         DRV_LOG(ERR, "Static WQE SQ feature is"
1386                                      " required for packet pacing");
1387                         err = ENODEV;
1388                         goto error;
1389                 }
1390                 if (!config->hca_attr.qos.wqe_rate_pp) {
1391                         DRV_LOG(ERR, "WQE rate mode is required"
1392                                      " for packet pacing");
1393                         err = ENODEV;
1394                         goto error;
1395                 }
1396 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1397                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1398                              " can't create queues for packet pacing");
1399                 err = ENODEV;
1400                 goto error;
1401 #endif
1402         }
1403         if (config->devx) {
1404                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1405
1406                 err = config->hca_attr.access_register_user ?
1407                         mlx5_devx_cmd_register_read
1408                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1409                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1410                 if (!err) {
1411                         uint32_t ts_mode;
1412
1413                         /* MTUTC register is read successfully. */
1414                         ts_mode = MLX5_GET(register_mtutc, reg,
1415                                            time_stamp_mode);
1416                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1417                                 config->rt_timestamp = 1;
1418                 } else {
1419                         /* Kernel does not support register reading. */
1420                         if (config->hca_attr.dev_freq_khz ==
1421                                                  (NS_PER_S / MS_PER_S))
1422                                 config->rt_timestamp = 1;
1423                 }
1424         }
1425         /*
1426          * If HW has bug working with tunnel packet decapsulation and
1427          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1428          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1429          */
1430         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1431                 config->hw_fcs_strip = 0;
1432         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1433                 (config->hw_fcs_strip ? "" : "not "));
1434         if (config->mprq.enabled && mprq) {
1435                 if (config->mprq.stride_num_n &&
1436                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1437                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1438                         config->mprq.stride_num_n =
1439                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1440                                                 mprq_min_stride_num_n),
1441                                         mprq_max_stride_num_n);
1442                         DRV_LOG(WARNING,
1443                                 "the number of strides"
1444                                 " for Multi-Packet RQ is out of range,"
1445                                 " setting default value (%u)",
1446                                 1 << config->mprq.stride_num_n);
1447                 }
1448                 if (config->mprq.stride_size_n &&
1449                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1450                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1451                         config->mprq.stride_size_n =
1452                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1453                                                 mprq_min_stride_size_n),
1454                                         mprq_max_stride_size_n);
1455                         DRV_LOG(WARNING,
1456                                 "the size of a stride"
1457                                 " for Multi-Packet RQ is out of range,"
1458                                 " setting default value (%u)",
1459                                 1 << config->mprq.stride_size_n);
1460                 }
1461                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1462                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1463         } else if (config->mprq.enabled && !mprq) {
1464                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1465                 config->mprq.enabled = 0;
1466         }
1467         if (config->max_dump_files_num == 0)
1468                 config->max_dump_files_num = 128;
1469         eth_dev = rte_eth_dev_allocate(name);
1470         if (eth_dev == NULL) {
1471                 DRV_LOG(ERR, "can not allocate rte ethdev");
1472                 err = ENOMEM;
1473                 goto error;
1474         }
1475         if (priv->representor) {
1476                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1477                 eth_dev->data->representor_id = priv->representor_id;
1478         }
1479         priv->mp_id.port_id = eth_dev->data->port_id;
1480         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1481         /*
1482          * Store associated network device interface index. This index
1483          * is permanent throughout the lifetime of device. So, we may store
1484          * the ifindex here and use the cached value further.
1485          */
1486         MLX5_ASSERT(spawn->ifindex);
1487         priv->if_index = spawn->ifindex;
1488         eth_dev->data->dev_private = priv;
1489         priv->dev_data = eth_dev->data;
1490         eth_dev->data->mac_addrs = priv->mac;
1491         eth_dev->device = dpdk_dev;
1492         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1493         /* Configure the first MAC address by default. */
1494         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1495                 DRV_LOG(ERR,
1496                         "port %u cannot get MAC address, is mlx5_en"
1497                         " loaded? (errno: %s)",
1498                         eth_dev->data->port_id, strerror(rte_errno));
1499                 err = ENODEV;
1500                 goto error;
1501         }
1502         DRV_LOG(INFO,
1503                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1504                 eth_dev->data->port_id,
1505                 mac.addr_bytes[0], mac.addr_bytes[1],
1506                 mac.addr_bytes[2], mac.addr_bytes[3],
1507                 mac.addr_bytes[4], mac.addr_bytes[5]);
1508 #ifdef RTE_LIBRTE_MLX5_DEBUG
1509         {
1510                 char ifname[MLX5_NAMESIZE];
1511
1512                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1513                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1514                                 eth_dev->data->port_id, ifname);
1515                 else
1516                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1517                                 eth_dev->data->port_id);
1518         }
1519 #endif
1520         /* Get actual MTU if possible. */
1521         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1522         if (err) {
1523                 err = rte_errno;
1524                 goto error;
1525         }
1526         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1527                 priv->mtu);
1528         /* Initialize burst functions to prevent crashes before link-up. */
1529         eth_dev->rx_pkt_burst = removed_rx_burst;
1530         eth_dev->tx_pkt_burst = removed_tx_burst;
1531         eth_dev->dev_ops = &mlx5_dev_ops;
1532         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1533         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1534         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1535         /* Register MAC address. */
1536         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1537         if (config->vf && config->vf_nl_en)
1538                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1539                                       mlx5_ifindex(eth_dev),
1540                                       eth_dev->data->mac_addrs,
1541                                       MLX5_MAX_MAC_ADDRESSES);
1542         priv->flows = 0;
1543         priv->ctrl_flows = 0;
1544         rte_spinlock_init(&priv->flow_list_lock);
1545         TAILQ_INIT(&priv->flow_meters);
1546         TAILQ_INIT(&priv->flow_meter_profiles);
1547         /* Hint libmlx5 to use PMD allocator for data plane resources */
1548         mlx5_glue->dv_set_context_attr(sh->ctx,
1549                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1550                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1551                                 .alloc = &mlx5_alloc_verbs_buf,
1552                                 .free = &mlx5_free_verbs_buf,
1553                                 .data = sh,
1554                         }));
1555         /* Bring Ethernet device up. */
1556         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1557                 eth_dev->data->port_id);
1558         mlx5_set_link_up(eth_dev);
1559         /*
1560          * Even though the interrupt handler is not installed yet,
1561          * interrupts will still trigger on the async_fd from
1562          * Verbs context returned by ibv_open_device().
1563          */
1564         mlx5_link_update(eth_dev, 0);
1565 #ifdef HAVE_MLX5DV_DR_ESWITCH
1566         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1567               (switch_info->representor || switch_info->master)))
1568                 config->dv_esw_en = 0;
1569 #else
1570         config->dv_esw_en = 0;
1571 #endif
1572         /* Detect minimal data bytes to inline. */
1573         mlx5_set_min_inline(spawn, config);
1574         /* Store device configuration on private structure. */
1575         priv->config = *config;
1576         /* Create context for virtual machine VLAN workaround. */
1577         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1578         if (config->dv_flow_en) {
1579                 err = mlx5_alloc_shared_dr(priv);
1580                 if (err)
1581                         goto error;
1582         }
1583         if (config->devx && config->dv_flow_en && config->dest_tir) {
1584                 priv->obj_ops = devx_obj_ops;
1585                 priv->obj_ops.drop_action_create =
1586                                                 ibv_obj_ops.drop_action_create;
1587                 priv->obj_ops.drop_action_destroy =
1588                                                 ibv_obj_ops.drop_action_destroy;
1589 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1590                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1591 #else
1592                 if (config->dv_esw_en)
1593                         priv->obj_ops.txq_obj_modify =
1594                                                 ibv_obj_ops.txq_obj_modify;
1595 #endif
1596                 /* Use specific wrappers for Tx object. */
1597                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1598                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1599                 mlx5_queue_counter_id_prepare(eth_dev);
1600
1601         } else {
1602                 priv->obj_ops = ibv_obj_ops;
1603         }
1604         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1605         if (!priv->drop_queue.hrxq)
1606                 goto error;
1607         /* Supported Verbs flow priority number detection. */
1608         err = mlx5_flow_discover_priorities(eth_dev);
1609         if (err < 0) {
1610                 err = -err;
1611                 goto error;
1612         }
1613         priv->config.flow_prio = err;
1614         if (!priv->config.dv_esw_en &&
1615             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1616                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1617                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1618                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1619         }
1620         mlx5_set_metadata_mask(eth_dev);
1621         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1622             !priv->sh->dv_regc0_mask) {
1623                 DRV_LOG(ERR, "metadata mode %u is not supported "
1624                              "(no metadata reg_c[0] is available)",
1625                              priv->config.dv_xmeta_en);
1626                         err = ENOTSUP;
1627                         goto error;
1628         }
1629         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1630                              mlx5_hrxq_create_cb,
1631                              mlx5_hrxq_match_cb,
1632                              mlx5_hrxq_remove_cb);
1633         /* Query availability of metadata reg_c's. */
1634         err = mlx5_flow_discover_mreg_c(eth_dev);
1635         if (err < 0) {
1636                 err = -err;
1637                 goto error;
1638         }
1639         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1640                 DRV_LOG(DEBUG,
1641                         "port %u extensive metadata register is not supported",
1642                         eth_dev->data->port_id);
1643                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1644                         DRV_LOG(ERR, "metadata mode %u is not supported "
1645                                      "(no metadata registers available)",
1646                                      priv->config.dv_xmeta_en);
1647                         err = ENOTSUP;
1648                         goto error;
1649                 }
1650         }
1651         if (priv->config.dv_flow_en &&
1652             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1653             mlx5_flow_ext_mreg_supported(eth_dev) &&
1654             priv->sh->dv_regc0_mask) {
1655                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1656                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1657                                                       0, 0,
1658                                                       flow_dv_mreg_create_cb,
1659                                                       flow_dv_mreg_match_cb,
1660                                                       flow_dv_mreg_remove_cb);
1661                 if (!priv->mreg_cp_tbl) {
1662                         err = ENOMEM;
1663                         goto error;
1664                 }
1665                 priv->mreg_cp_tbl->ctx = eth_dev;
1666         }
1667         rte_spinlock_init(&priv->shared_act_sl);
1668         mlx5_flow_counter_mode_config(eth_dev);
1669         if (priv->config.dv_flow_en)
1670                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1671         return eth_dev;
1672 error:
1673         if (priv) {
1674                 if (priv->mreg_cp_tbl)
1675                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1676                 if (priv->sh)
1677                         mlx5_os_free_shared_dr(priv);
1678                 if (priv->nl_socket_route >= 0)
1679                         close(priv->nl_socket_route);
1680                 if (priv->nl_socket_rdma >= 0)
1681                         close(priv->nl_socket_rdma);
1682                 if (priv->vmwa_context)
1683                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1684                 if (eth_dev && priv->drop_queue.hrxq)
1685                         mlx5_drop_action_destroy(eth_dev);
1686                 if (own_domain_id)
1687                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1688                 mlx5_cache_list_destroy(&priv->hrxqs);
1689                 mlx5_free(priv);
1690                 if (eth_dev != NULL)
1691                         eth_dev->data->dev_private = NULL;
1692         }
1693         if (eth_dev != NULL) {
1694                 /* mac_addrs must not be freed alone because part of
1695                  * dev_private
1696                  **/
1697                 eth_dev->data->mac_addrs = NULL;
1698                 rte_eth_dev_release_port(eth_dev);
1699         }
1700         if (sh)
1701                 mlx5_free_shared_dev_ctx(sh);
1702         MLX5_ASSERT(err > 0);
1703         rte_errno = err;
1704         return NULL;
1705 }
1706
1707 /**
1708  * Comparison callback to sort device data.
1709  *
1710  * This is meant to be used with qsort().
1711  *
1712  * @param a[in]
1713  *   Pointer to pointer to first data object.
1714  * @param b[in]
1715  *   Pointer to pointer to second data object.
1716  *
1717  * @return
1718  *   0 if both objects are equal, less than 0 if the first argument is less
1719  *   than the second, greater than 0 otherwise.
1720  */
1721 static int
1722 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1723 {
1724         const struct mlx5_switch_info *si_a =
1725                 &((const struct mlx5_dev_spawn_data *)a)->info;
1726         const struct mlx5_switch_info *si_b =
1727                 &((const struct mlx5_dev_spawn_data *)b)->info;
1728         int ret;
1729
1730         /* Master device first. */
1731         ret = si_b->master - si_a->master;
1732         if (ret)
1733                 return ret;
1734         /* Then representor devices. */
1735         ret = si_b->representor - si_a->representor;
1736         if (ret)
1737                 return ret;
1738         /* Unidentified devices come last in no specific order. */
1739         if (!si_a->representor)
1740                 return 0;
1741         /* Order representors by name. */
1742         return si_a->port_name - si_b->port_name;
1743 }
1744
1745 /**
1746  * Match PCI information for possible slaves of bonding device.
1747  *
1748  * @param[in] ibv_dev
1749  *   Pointer to Infiniband device structure.
1750  * @param[in] pci_dev
1751  *   Pointer to primary PCI address structure to match.
1752  * @param[in] nl_rdma
1753  *   Netlink RDMA group socket handle.
1754  * @param[in] owner
1755  *   Rerepsentor owner PF index.
1756  * @param[out] bond_info
1757  *   Pointer to bonding information.
1758  *
1759  * @return
1760  *   negative value if no bonding device found, otherwise
1761  *   positive index of slave PF in bonding.
1762  */
1763 static int
1764 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1765                            const struct rte_pci_addr *pci_dev,
1766                            int nl_rdma, uint16_t owner,
1767                            struct mlx5_bond_info *bond_info)
1768 {
1769         char ifname[IF_NAMESIZE + 1];
1770         unsigned int ifindex;
1771         unsigned int np, i;
1772         FILE *bond_file = NULL, *file;
1773         int pf = -1;
1774         int ret;
1775
1776         /*
1777          * Try to get master device name. If something goes
1778          * wrong suppose the lack of kernel support and no
1779          * bonding devices.
1780          */
1781         memset(bond_info, 0, sizeof(*bond_info));
1782         if (nl_rdma < 0)
1783                 return -1;
1784         if (!strstr(ibv_dev->name, "bond"))
1785                 return -1;
1786         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1787         if (!np)
1788                 return -1;
1789         /*
1790          * The Master device might not be on the predefined
1791          * port (not on port index 1, it is not garanted),
1792          * we have to scan all Infiniband device port and
1793          * find master.
1794          */
1795         for (i = 1; i <= np; ++i) {
1796                 /* Check whether Infiniband port is populated. */
1797                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1798                 if (!ifindex)
1799                         continue;
1800                 if (!if_indextoname(ifindex, ifname))
1801                         continue;
1802                 /* Try to read bonding slave names from sysfs. */
1803                 MKSTR(slaves,
1804                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1805                 bond_file = fopen(slaves, "r");
1806                 if (bond_file)
1807                         break;
1808         }
1809         if (!bond_file)
1810                 return -1;
1811         /* Use safe format to check maximal buffer length. */
1812         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1813         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1814                 char tmp_str[IF_NAMESIZE + 32];
1815                 struct rte_pci_addr pci_addr;
1816                 struct mlx5_switch_info info;
1817
1818                 /* Process slave interface names in the loop. */
1819                 snprintf(tmp_str, sizeof(tmp_str),
1820                          "/sys/class/net/%s", ifname);
1821                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1822                         DRV_LOG(WARNING, "can not get PCI address"
1823                                          " for netdev \"%s\"", ifname);
1824                         continue;
1825                 }
1826                 /* Slave interface PCI address match found. */
1827                 snprintf(tmp_str, sizeof(tmp_str),
1828                          "/sys/class/net/%s/phys_port_name", ifname);
1829                 file = fopen(tmp_str, "rb");
1830                 if (!file)
1831                         break;
1832                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1833                 if (fscanf(file, "%32s", tmp_str) == 1)
1834                         mlx5_translate_port_name(tmp_str, &info);
1835                 fclose(file);
1836                 /* Only process PF ports. */
1837                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1838                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1839                         continue;
1840                 /* Check max bonding member. */
1841                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1842                         DRV_LOG(WARNING, "bonding index out of range, "
1843                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1844                                 tmp_str);
1845                         break;
1846                 }
1847                 /* Match PCI address. */
1848                 if (pci_dev->domain == pci_addr.domain &&
1849                     pci_dev->bus == pci_addr.bus &&
1850                     pci_dev->devid == pci_addr.devid &&
1851                     pci_dev->function + owner == pci_addr.function)
1852                         pf = info.port_name;
1853                 /* Get ifindex. */
1854                 snprintf(tmp_str, sizeof(tmp_str),
1855                          "/sys/class/net/%s/ifindex", ifname);
1856                 file = fopen(tmp_str, "rb");
1857                 if (!file)
1858                         break;
1859                 ret = fscanf(file, "%u", &ifindex);
1860                 fclose(file);
1861                 if (ret != 1)
1862                         break;
1863                 /* Save bonding info. */
1864                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1865                         sizeof(bond_info->ports[0].ifname));
1866                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1867                 bond_info->ports[info.port_name].ifindex = ifindex;
1868                 bond_info->n_port++;
1869         }
1870         if (pf >= 0) {
1871                 /* Get bond interface info */
1872                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1873                                            bond_info->ifname);
1874                 if (ret)
1875                         DRV_LOG(ERR, "unable to get bond info: %s",
1876                                 strerror(rte_errno));
1877                 else
1878                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1879                                 ifindex, bond_info->ifindex, bond_info->ifname);
1880         }
1881         return pf;
1882 }
1883
1884 /**
1885  * Register a PCI device within bonding.
1886  *
1887  * This function spawns Ethernet devices out of a given PCI device and
1888  * bonding owner PF index.
1889  *
1890  * @param[in] pci_dev
1891  *   PCI device information.
1892  * @param[in] req_eth_da
1893  *   Requested ethdev device argument.
1894  * @param[in] owner_id
1895  *   Requested owner PF port ID within bonding device, default to 0.
1896  *
1897  * @return
1898  *   0 on success, a negative errno value otherwise and rte_errno is set.
1899  */
1900 static int
1901 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
1902                      struct rte_eth_devargs *req_eth_da,
1903                      uint16_t owner_id)
1904 {
1905         struct ibv_device **ibv_list;
1906         /*
1907          * Number of found IB Devices matching with requested PCI BDF.
1908          * nd != 1 means there are multiple IB devices over the same
1909          * PCI device and we have representors and master.
1910          */
1911         unsigned int nd = 0;
1912         /*
1913          * Number of found IB device Ports. nd = 1 and np = 1..n means
1914          * we have the single multiport IB device, and there may be
1915          * representors attached to some of found ports.
1916          */
1917         unsigned int np = 0;
1918         /*
1919          * Number of DPDK ethernet devices to Spawn - either over
1920          * multiple IB devices or multiple ports of single IB device.
1921          * Actually this is the number of iterations to spawn.
1922          */
1923         unsigned int ns = 0;
1924         /*
1925          * Bonding device
1926          *   < 0 - no bonding device (single one)
1927          *  >= 0 - bonding device (value is slave PF index)
1928          */
1929         int bd = -1;
1930         struct mlx5_dev_spawn_data *list = NULL;
1931         struct mlx5_dev_config dev_config;
1932         unsigned int dev_config_vf;
1933         struct rte_eth_devargs eth_da = *req_eth_da;
1934         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1935         struct mlx5_bond_info bond_info;
1936         int ret = -1;
1937
1938         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1939                 mlx5_pmd_socket_init();
1940         ret = mlx5_init_once();
1941         if (ret) {
1942                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1943                         strerror(rte_errno));
1944                 return -rte_errno;
1945         }
1946         errno = 0;
1947         ibv_list = mlx5_glue->get_device_list(&ret);
1948         if (!ibv_list) {
1949                 rte_errno = errno ? errno : ENOSYS;
1950                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1951                 return -rte_errno;
1952         }
1953         /*
1954          * First scan the list of all Infiniband devices to find
1955          * matching ones, gathering into the list.
1956          */
1957         struct ibv_device *ibv_match[ret + 1];
1958         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1959         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1960         unsigned int i;
1961
1962         while (ret-- > 0) {
1963                 struct rte_pci_addr pci_addr;
1964
1965                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1966                 bd = mlx5_device_bond_pci_match
1967                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
1968                                  &bond_info);
1969                 if (bd >= 0) {
1970                         /*
1971                          * Bonding device detected. Only one match is allowed,
1972                          * the bonding is supported over multi-port IB device,
1973                          * there should be no matches on representor PCI
1974                          * functions or non VF LAG bonding devices with
1975                          * specified address.
1976                          */
1977                         if (nd) {
1978                                 DRV_LOG(ERR,
1979                                         "multiple PCI match on bonding device"
1980                                         "\"%s\" found", ibv_list[ret]->name);
1981                                 rte_errno = ENOENT;
1982                                 ret = -rte_errno;
1983                                 goto exit;
1984                         }
1985                         /* Amend owner pci address if owner PF ID specified. */
1986                         if (eth_da.nb_representor_ports)
1987                                 owner_pci.function += owner_id;
1988                         DRV_LOG(INFO, "PCI information matches for"
1989                                       " slave %d bonding device \"%s\"",
1990                                       bd, ibv_list[ret]->name);
1991                         ibv_match[nd++] = ibv_list[ret];
1992                         break;
1993                 } else {
1994                         /* Bonding device not found. */
1995                         if (mlx5_dev_to_pci_addr
1996                                 (ibv_list[ret]->ibdev_path, &pci_addr))
1997                                 continue;
1998                         if (owner_pci.domain != pci_addr.domain ||
1999                             owner_pci.bus != pci_addr.bus ||
2000                             owner_pci.devid != pci_addr.devid ||
2001                             owner_pci.function != pci_addr.function)
2002                                 continue;
2003                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2004                                 ibv_list[ret]->name);
2005                         ibv_match[nd++] = ibv_list[ret];
2006                 }
2007         }
2008         ibv_match[nd] = NULL;
2009         if (!nd) {
2010                 /* No device matches, just complain and bail out. */
2011                 DRV_LOG(WARNING,
2012                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2013                         " are kernel drivers loaded?",
2014                         owner_pci.domain, owner_pci.bus,
2015                         owner_pci.devid, owner_pci.function);
2016                 rte_errno = ENOENT;
2017                 ret = -rte_errno;
2018                 goto exit;
2019         }
2020         if (nd == 1) {
2021                 /*
2022                  * Found single matching device may have multiple ports.
2023                  * Each port may be representor, we have to check the port
2024                  * number and check the representors existence.
2025                  */
2026                 if (nl_rdma >= 0)
2027                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2028                 if (!np)
2029                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2030                                          " ports number", ibv_match[0]->name);
2031                 if (bd >= 0 && !np) {
2032                         DRV_LOG(ERR, "can not get ports"
2033                                      " for bonding device");
2034                         rte_errno = ENOENT;
2035                         ret = -rte_errno;
2036                         goto exit;
2037                 }
2038         }
2039 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2040         if (bd >= 0) {
2041                 /*
2042                  * This may happen if there is VF LAG kernel support and
2043                  * application is compiled with older rdma_core library.
2044                  */
2045                 DRV_LOG(ERR,
2046                         "No kernel/verbs support for VF LAG bonding found.");
2047                 rte_errno = ENOTSUP;
2048                 ret = -rte_errno;
2049                 goto exit;
2050         }
2051 #endif
2052         /*
2053          * Now we can determine the maximal
2054          * amount of devices to be spawned.
2055          */
2056         list = mlx5_malloc(MLX5_MEM_ZERO,
2057                            sizeof(struct mlx5_dev_spawn_data) *
2058                            (np ? np : nd),
2059                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2060         if (!list) {
2061                 DRV_LOG(ERR, "spawn data array allocation failure");
2062                 rte_errno = ENOMEM;
2063                 ret = -rte_errno;
2064                 goto exit;
2065         }
2066         if (bd >= 0 || np > 1) {
2067                 /*
2068                  * Single IB device with multiple ports found,
2069                  * it may be E-Switch master device and representors.
2070                  * We have to perform identification through the ports.
2071                  */
2072                 MLX5_ASSERT(nl_rdma >= 0);
2073                 MLX5_ASSERT(ns == 0);
2074                 MLX5_ASSERT(nd == 1);
2075                 MLX5_ASSERT(np);
2076                 for (i = 1; i <= np; ++i) {
2077                         list[ns].bond_info = &bond_info;
2078                         list[ns].max_port = np;
2079                         list[ns].phys_port = i;
2080                         list[ns].phys_dev = ibv_match[0];
2081                         list[ns].eth_dev = NULL;
2082                         list[ns].pci_dev = pci_dev;
2083                         list[ns].pf_bond = bd;
2084                         list[ns].ifindex = mlx5_nl_ifindex
2085                                 (nl_rdma,
2086                                 mlx5_os_get_dev_device_name
2087                                                 (list[ns].phys_dev), i);
2088                         if (!list[ns].ifindex) {
2089                                 /*
2090                                  * No network interface index found for the
2091                                  * specified port, it means there is no
2092                                  * representor on this port. It's OK,
2093                                  * there can be disabled ports, for example
2094                                  * if sriov_numvfs < sriov_totalvfs.
2095                                  */
2096                                 continue;
2097                         }
2098                         ret = -1;
2099                         if (nl_route >= 0)
2100                                 ret = mlx5_nl_switch_info
2101                                                (nl_route,
2102                                                 list[ns].ifindex,
2103                                                 &list[ns].info);
2104                         if (ret || (!list[ns].info.representor &&
2105                                     !list[ns].info.master)) {
2106                                 /*
2107                                  * We failed to recognize representors with
2108                                  * Netlink, let's try to perform the task
2109                                  * with sysfs.
2110                                  */
2111                                 ret =  mlx5_sysfs_switch_info
2112                                                 (list[ns].ifindex,
2113                                                  &list[ns].info);
2114                         }
2115 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2116                         if (!ret && bd >= 0) {
2117                                 switch (list[ns].info.name_type) {
2118                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2119                                         if (list[ns].info.port_name == bd)
2120                                                 ns++;
2121                                         break;
2122                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2123                                         /* Fallthrough */
2124                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2125                                         /* Fallthrough */
2126                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2127                                         if (list[ns].info.pf_num == bd)
2128                                                 ns++;
2129                                         break;
2130                                 default:
2131                                         break;
2132                                 }
2133                                 continue;
2134                         }
2135 #endif
2136                         if (!ret && (list[ns].info.representor ^
2137                                      list[ns].info.master))
2138                                 ns++;
2139                 }
2140                 if (!ns) {
2141                         DRV_LOG(ERR,
2142                                 "unable to recognize master/representors"
2143                                 " on the IB device with multiple ports");
2144                         rte_errno = ENOENT;
2145                         ret = -rte_errno;
2146                         goto exit;
2147                 }
2148         } else {
2149                 /*
2150                  * The existence of several matching entries (nd > 1) means
2151                  * port representors have been instantiated. No existing Verbs
2152                  * call nor sysfs entries can tell them apart, this can only
2153                  * be done through Netlink calls assuming kernel drivers are
2154                  * recent enough to support them.
2155                  *
2156                  * In the event of identification failure through Netlink,
2157                  * try again through sysfs, then:
2158                  *
2159                  * 1. A single IB device matches (nd == 1) with single
2160                  *    port (np=0/1) and is not a representor, assume
2161                  *    no switch support.
2162                  *
2163                  * 2. Otherwise no safe assumptions can be made;
2164                  *    complain louder and bail out.
2165                  */
2166                 for (i = 0; i != nd; ++i) {
2167                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2168                         list[ns].bond_info = NULL;
2169                         list[ns].max_port = 1;
2170                         list[ns].phys_port = 1;
2171                         list[ns].phys_dev = ibv_match[i];
2172                         list[ns].eth_dev = NULL;
2173                         list[ns].pci_dev = pci_dev;
2174                         list[ns].pf_bond = -1;
2175                         list[ns].ifindex = 0;
2176                         if (nl_rdma >= 0)
2177                                 list[ns].ifindex = mlx5_nl_ifindex
2178                                 (nl_rdma,
2179                                 mlx5_os_get_dev_device_name
2180                                                 (list[ns].phys_dev), 1);
2181                         if (!list[ns].ifindex) {
2182                                 char ifname[IF_NAMESIZE];
2183
2184                                 /*
2185                                  * Netlink failed, it may happen with old
2186                                  * ib_core kernel driver (before 4.16).
2187                                  * We can assume there is old driver because
2188                                  * here we are processing single ports IB
2189                                  * devices. Let's try sysfs to retrieve
2190                                  * the ifindex. The method works for
2191                                  * master device only.
2192                                  */
2193                                 if (nd > 1) {
2194                                         /*
2195                                          * Multiple devices found, assume
2196                                          * representors, can not distinguish
2197                                          * master/representor and retrieve
2198                                          * ifindex via sysfs.
2199                                          */
2200                                         continue;
2201                                 }
2202                                 ret = mlx5_get_ifname_sysfs
2203                                         (ibv_match[i]->ibdev_path, ifname);
2204                                 if (!ret)
2205                                         list[ns].ifindex =
2206                                                 if_nametoindex(ifname);
2207                                 if (!list[ns].ifindex) {
2208                                         /*
2209                                          * No network interface index found
2210                                          * for the specified device, it means
2211                                          * there it is neither representor
2212                                          * nor master.
2213                                          */
2214                                         continue;
2215                                 }
2216                         }
2217                         ret = -1;
2218                         if (nl_route >= 0)
2219                                 ret = mlx5_nl_switch_info
2220                                                (nl_route,
2221                                                 list[ns].ifindex,
2222                                                 &list[ns].info);
2223                         if (ret || (!list[ns].info.representor &&
2224                                     !list[ns].info.master)) {
2225                                 /*
2226                                  * We failed to recognize representors with
2227                                  * Netlink, let's try to perform the task
2228                                  * with sysfs.
2229                                  */
2230                                 ret =  mlx5_sysfs_switch_info
2231                                                 (list[ns].ifindex,
2232                                                  &list[ns].info);
2233                         }
2234                         if (!ret && (list[ns].info.representor ^
2235                                      list[ns].info.master)) {
2236                                 ns++;
2237                         } else if ((nd == 1) &&
2238                                    !list[ns].info.representor &&
2239                                    !list[ns].info.master) {
2240                                 /*
2241                                  * Single IB device with
2242                                  * one physical port and
2243                                  * attached network device.
2244                                  * May be SRIOV is not enabled
2245                                  * or there is no representors.
2246                                  */
2247                                 DRV_LOG(INFO, "no E-Switch support detected");
2248                                 ns++;
2249                                 break;
2250                         }
2251                 }
2252                 if (!ns) {
2253                         DRV_LOG(ERR,
2254                                 "unable to recognize master/representors"
2255                                 " on the multiple IB devices");
2256                         rte_errno = ENOENT;
2257                         ret = -rte_errno;
2258                         goto exit;
2259                 }
2260         }
2261         MLX5_ASSERT(ns);
2262         /*
2263          * Sort list to probe devices in natural order for users convenience
2264          * (i.e. master first, then representors from lowest to highest ID).
2265          */
2266         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2267         /* Device specific configuration. */
2268         switch (pci_dev->id.device_id) {
2269         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2270         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2271         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2272         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2273         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2274         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2275         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2276                 dev_config_vf = 1;
2277                 break;
2278         default:
2279                 dev_config_vf = 0;
2280                 break;
2281         }
2282         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2283                 /* Set devargs default values. */
2284                 if (eth_da.nb_mh_controllers == 0) {
2285                         eth_da.nb_mh_controllers = 1;
2286                         eth_da.mh_controllers[0] = 0;
2287                 }
2288                 if (eth_da.nb_ports == 0 && ns > 0) {
2289                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2290                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2291                                         pci_dev->device.devargs->args);
2292                         eth_da.nb_ports = 1;
2293                         eth_da.ports[0] = list[0].info.pf_num;
2294                 }
2295                 if (eth_da.nb_representor_ports == 0) {
2296                         eth_da.nb_representor_ports = 1;
2297                         eth_da.representor_ports[0] = 0;
2298                 }
2299         }
2300         for (i = 0; i != ns; ++i) {
2301                 uint32_t restore;
2302
2303                 /* Default configuration. */
2304                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2305                 dev_config.vf = dev_config_vf;
2306                 dev_config.mps = MLX5_ARG_UNSET;
2307                 dev_config.dbnc = MLX5_ARG_UNSET;
2308                 dev_config.rx_vec_en = 1;
2309                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2310                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2311                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2312                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2313                 dev_config.vf_nl_en = 1;
2314                 dev_config.mr_ext_memseg_en = 1;
2315                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2316                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2317                 dev_config.dv_esw_en = 1;
2318                 dev_config.dv_flow_en = 1;
2319                 dev_config.decap_en = 1;
2320                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2321                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2322                                                  &list[i],
2323                                                  &dev_config,
2324                                                  &eth_da);
2325                 if (!list[i].eth_dev) {
2326                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2327                                 break;
2328                         /* Device is disabled or already spawned. Ignore it. */
2329                         continue;
2330                 }
2331                 restore = list[i].eth_dev->data->dev_flags;
2332                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2333                 /* Restore non-PCI flags cleared by the above call. */
2334                 list[i].eth_dev->data->dev_flags |= restore;
2335                 rte_eth_dev_probing_finish(list[i].eth_dev);
2336         }
2337         if (i != ns) {
2338                 DRV_LOG(ERR,
2339                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2340                         " encountering an error: %s",
2341                         owner_pci.domain, owner_pci.bus,
2342                         owner_pci.devid, owner_pci.function,
2343                         strerror(rte_errno));
2344                 ret = -rte_errno;
2345                 /* Roll back. */
2346                 while (i--) {
2347                         if (!list[i].eth_dev)
2348                                 continue;
2349                         mlx5_dev_close(list[i].eth_dev);
2350                         /* mac_addrs must not be freed because in dev_private */
2351                         list[i].eth_dev->data->mac_addrs = NULL;
2352                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2353                 }
2354                 /* Restore original error. */
2355                 rte_errno = -ret;
2356         } else {
2357                 ret = 0;
2358         }
2359 exit:
2360         /*
2361          * Do the routine cleanup:
2362          * - close opened Netlink sockets
2363          * - free allocated spawn data array
2364          * - free the Infiniband device list
2365          */
2366         if (nl_rdma >= 0)
2367                 close(nl_rdma);
2368         if (nl_route >= 0)
2369                 close(nl_route);
2370         if (list)
2371                 mlx5_free(list);
2372         MLX5_ASSERT(ibv_list);
2373         mlx5_glue->free_device_list(ibv_list);
2374         return ret;
2375 }
2376
2377 /**
2378  * DPDK callback to register a PCI device.
2379  *
2380  * This function spawns Ethernet devices out of a given PCI device.
2381  *
2382  * @param[in] pci_drv
2383  *   PCI driver structure (mlx5_driver).
2384  * @param[in] pci_dev
2385  *   PCI device information.
2386  *
2387  * @return
2388  *   0 on success, a negative errno value otherwise and rte_errno is set.
2389  */
2390 int
2391 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2392                   struct rte_pci_device *pci_dev)
2393 {
2394         struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
2395         int ret = 0;
2396         uint16_t p;
2397
2398         if (pci_dev->device.devargs) {
2399                 /* Parse representor information from device argument. */
2400                 if (pci_dev->device.devargs->cls_str)
2401                         ret = rte_eth_devargs_parse
2402                                 (pci_dev->device.devargs->cls_str, &eth_da);
2403                 if (ret) {
2404                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2405                                 pci_dev->device.devargs->cls_str);
2406                         return -rte_errno;
2407                 }
2408                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
2409                         /* Support legacy device argument */
2410                         ret = rte_eth_devargs_parse
2411                                 (pci_dev->device.devargs->args, &eth_da);
2412                         if (ret) {
2413                                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2414                                         pci_dev->device.devargs->args);
2415                                 return -rte_errno;
2416                         }
2417                 }
2418         }
2419
2420         if (eth_da.nb_ports > 0) {
2421                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2422                 for (p = 0; p < eth_da.nb_ports; p++)
2423                         ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
2424                                                    eth_da.ports[p]);
2425         } else {
2426                 ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
2427         }
2428         return ret;
2429 }
2430
2431 static int
2432 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2433 {
2434         char *env;
2435         int value;
2436
2437         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2438         /* Get environment variable to store. */
2439         env = getenv(MLX5_SHUT_UP_BF);
2440         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2441         if (config->dbnc == MLX5_ARG_UNSET)
2442                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2443         else
2444                 setenv(MLX5_SHUT_UP_BF,
2445                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2446         return value;
2447 }
2448
2449 static void
2450 mlx5_restore_doorbell_mapping_env(int value)
2451 {
2452         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2453         /* Restore the original environment variable state. */
2454         if (value == MLX5_ARG_UNSET)
2455                 unsetenv(MLX5_SHUT_UP_BF);
2456         else
2457                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2458 }
2459
2460 /**
2461  * Extract pdn of PD object using DV API.
2462  *
2463  * @param[in] pd
2464  *   Pointer to the verbs PD object.
2465  * @param[out] pdn
2466  *   Pointer to the PD object number variable.
2467  *
2468  * @return
2469  *   0 on success, error value otherwise.
2470  */
2471 int
2472 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2473 {
2474 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2475         struct mlx5dv_obj obj;
2476         struct mlx5dv_pd pd_info;
2477         int ret = 0;
2478
2479         obj.pd.in = pd;
2480         obj.pd.out = &pd_info;
2481         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2482         if (ret) {
2483                 DRV_LOG(DEBUG, "Fail to get PD object info");
2484                 return ret;
2485         }
2486         *pdn = pd_info.pdn;
2487         return 0;
2488 #else
2489         (void)pd;
2490         (void)pdn;
2491         return -ENOTSUP;
2492 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2493 }
2494
2495 /**
2496  * Function API to open IB device.
2497  *
2498  * This function calls the Linux glue APIs to open a device.
2499  *
2500  * @param[in] spawn
2501  *   Pointer to the IB device attributes (name, port, etc).
2502  * @param[out] config
2503  *   Pointer to device configuration structure.
2504  * @param[out] sh
2505  *   Pointer to shared context structure.
2506  *
2507  * @return
2508  *   0 on success, a positive error value otherwise.
2509  */
2510 int
2511 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2512                      const struct mlx5_dev_config *config,
2513                      struct mlx5_dev_ctx_shared *sh)
2514 {
2515         int dbmap_env;
2516         int err = 0;
2517
2518         sh->numa_node = spawn->pci_dev->device.numa_node;
2519         pthread_mutex_init(&sh->txpp.mutex, NULL);
2520         /*
2521          * Configure environment variable "MLX5_BF_SHUT_UP"
2522          * before the device creation. The rdma_core library
2523          * checks the variable at device creation and
2524          * stores the result internally.
2525          */
2526         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2527         /* Try to open IB device with DV first, then usual Verbs. */
2528         errno = 0;
2529         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2530         if (sh->ctx) {
2531                 sh->devx = 1;
2532                 DRV_LOG(DEBUG, "DevX is supported");
2533                 /* The device is created, no need for environment. */
2534                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2535         } else {
2536                 /* The environment variable is still configured. */
2537                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2538                 err = errno ? errno : ENODEV;
2539                 /*
2540                  * The environment variable is not needed anymore,
2541                  * all device creation attempts are completed.
2542                  */
2543                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2544                 if (!sh->ctx)
2545                         return err;
2546                 DRV_LOG(DEBUG, "DevX is NOT supported");
2547                 err = 0;
2548         }
2549         if (!err && sh->ctx) {
2550                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2551                 mlx5_glue->dv_set_context_attr(sh->ctx,
2552                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2553                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2554                                 .alloc = &mlx5_alloc_verbs_buf,
2555                                 .free = &mlx5_free_verbs_buf,
2556                                 .data = sh,
2557                         }));
2558         }
2559         return err;
2560 }
2561
2562 /**
2563  * Install shared asynchronous device events handler.
2564  * This function is implemented to support event sharing
2565  * between multiple ports of single IB device.
2566  *
2567  * @param sh
2568  *   Pointer to mlx5_dev_ctx_shared object.
2569  */
2570 void
2571 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2572 {
2573         int ret;
2574         int flags;
2575
2576         sh->intr_handle.fd = -1;
2577         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2578         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2579                     F_SETFL, flags | O_NONBLOCK);
2580         if (ret) {
2581                 DRV_LOG(INFO, "failed to change file descriptor async event"
2582                         " queue");
2583         } else {
2584                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2585                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2586                 if (rte_intr_callback_register(&sh->intr_handle,
2587                                         mlx5_dev_interrupt_handler, sh)) {
2588                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2589                         sh->intr_handle.fd = -1;
2590                 }
2591         }
2592         if (sh->devx) {
2593 #ifdef HAVE_IBV_DEVX_ASYNC
2594                 sh->intr_handle_devx.fd = -1;
2595                 sh->devx_comp =
2596                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2597                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2598                 if (!devx_comp) {
2599                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2600                         return;
2601                 }
2602                 flags = fcntl(devx_comp->fd, F_GETFL);
2603                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2604                 if (ret) {
2605                         DRV_LOG(INFO, "failed to change file descriptor"
2606                                 " devx comp");
2607                         return;
2608                 }
2609                 sh->intr_handle_devx.fd = devx_comp->fd;
2610                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2611                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2612                                         mlx5_dev_interrupt_handler_devx, sh)) {
2613                         DRV_LOG(INFO, "Fail to install the devx shared"
2614                                 " interrupt.");
2615                         sh->intr_handle_devx.fd = -1;
2616                 }
2617 #endif /* HAVE_IBV_DEVX_ASYNC */
2618         }
2619 }
2620
2621 /**
2622  * Uninstall shared asynchronous device events handler.
2623  * This function is implemented to support event sharing
2624  * between multiple ports of single IB device.
2625  *
2626  * @param dev
2627  *   Pointer to mlx5_dev_ctx_shared object.
2628  */
2629 void
2630 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2631 {
2632         if (sh->intr_handle.fd >= 0)
2633                 mlx5_intr_callback_unregister(&sh->intr_handle,
2634                                               mlx5_dev_interrupt_handler, sh);
2635 #ifdef HAVE_IBV_DEVX_ASYNC
2636         if (sh->intr_handle_devx.fd >= 0)
2637                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2638                                   mlx5_dev_interrupt_handler_devx, sh);
2639         if (sh->devx_comp)
2640                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2641 #endif
2642 }
2643
2644 /**
2645  * Read statistics by a named counter.
2646  *
2647  * @param[in] priv
2648  *   Pointer to the private device data structure.
2649  * @param[in] ctr_name
2650  *   Pointer to the name of the statistic counter to read
2651  * @param[out] stat
2652  *   Pointer to read statistic value.
2653  * @return
2654  *   0 on success and stat is valud, 1 if failed to read the value
2655  *   rte_errno is set.
2656  *
2657  */
2658 int
2659 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2660                       uint64_t *stat)
2661 {
2662         int fd;
2663
2664         if (priv->sh) {
2665                 if (priv->q_counters != NULL &&
2666                     strcmp(ctr_name, "out_of_buffer") == 0)
2667                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2668                                                            0, (uint32_t *)stat);
2669                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2670                       priv->sh->ibdev_path,
2671                       priv->dev_port,
2672                       ctr_name);
2673                 fd = open(path, O_RDONLY);
2674                 /*
2675                  * in switchdev the file location is not per port
2676                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2677                  */
2678                 if (fd == -1) {
2679                         MKSTR(path1, "%s/hw_counters/%s",
2680                               priv->sh->ibdev_path,
2681                               ctr_name);
2682                         fd = open(path1, O_RDONLY);
2683                 }
2684                 if (fd != -1) {
2685                         char buf[21] = {'\0'};
2686                         ssize_t n = read(fd, buf, sizeof(buf));
2687
2688                         close(fd);
2689                         if (n != -1) {
2690                                 *stat = strtoull(buf, NULL, 10);
2691                                 return 0;
2692                         }
2693                 }
2694         }
2695         *stat = 0;
2696         return 1;
2697 }
2698
2699 /**
2700  * Set the reg_mr and dereg_mr call backs
2701  *
2702  * @param reg_mr_cb[out]
2703  *   Pointer to reg_mr func
2704  * @param dereg_mr_cb[out]
2705  *   Pointer to dereg_mr func
2706  *
2707  */
2708 void
2709 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2710                       mlx5_dereg_mr_t *dereg_mr_cb)
2711 {
2712         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2713         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2714 }
2715
2716 /**
2717  * Remove a MAC address from device
2718  *
2719  * @param dev
2720  *   Pointer to Ethernet device structure.
2721  * @param index
2722  *   MAC address index.
2723  */
2724 void
2725 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2726 {
2727         struct mlx5_priv *priv = dev->data->dev_private;
2728         const int vf = priv->config.vf;
2729
2730         if (vf)
2731                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2732                                         mlx5_ifindex(dev), priv->mac_own,
2733                                         &dev->data->mac_addrs[index], index);
2734 }
2735
2736 /**
2737  * Adds a MAC address to the device
2738  *
2739  * @param dev
2740  *   Pointer to Ethernet device structure.
2741  * @param mac_addr
2742  *   MAC address to register.
2743  * @param index
2744  *   MAC address index.
2745  *
2746  * @return
2747  *   0 on success, a negative errno value otherwise
2748  */
2749 int
2750 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2751                      uint32_t index)
2752 {
2753         struct mlx5_priv *priv = dev->data->dev_private;
2754         const int vf = priv->config.vf;
2755         int ret = 0;
2756
2757         if (vf)
2758                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2759                                            mlx5_ifindex(dev), priv->mac_own,
2760                                            mac, index);
2761         return ret;
2762 }
2763
2764 /**
2765  * Modify a VF MAC address
2766  *
2767  * @param priv
2768  *   Pointer to device private data.
2769  * @param mac_addr
2770  *   MAC address to modify into.
2771  * @param iface_idx
2772  *   Net device interface index
2773  * @param vf_index
2774  *   VF index
2775  *
2776  * @return
2777  *   0 on success, a negative errno value otherwise
2778  */
2779 int
2780 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2781                            unsigned int iface_idx,
2782                            struct rte_ether_addr *mac_addr,
2783                            int vf_index)
2784 {
2785         return mlx5_nl_vf_mac_addr_modify
2786                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2787 }
2788
2789 /**
2790  * Set device promiscuous mode
2791  *
2792  * @param dev
2793  *   Pointer to Ethernet device structure.
2794  * @param enable
2795  *   0 - promiscuous is disabled, otherwise - enabled
2796  *
2797  * @return
2798  *   0 on success, a negative error value otherwise
2799  */
2800 int
2801 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2802 {
2803         struct mlx5_priv *priv = dev->data->dev_private;
2804
2805         return mlx5_nl_promisc(priv->nl_socket_route,
2806                                mlx5_ifindex(dev), !!enable);
2807 }
2808
2809 /**
2810  * Set device promiscuous mode
2811  *
2812  * @param dev
2813  *   Pointer to Ethernet device structure.
2814  * @param enable
2815  *   0 - all multicase is disabled, otherwise - enabled
2816  *
2817  * @return
2818  *   0 on success, a negative error value otherwise
2819  */
2820 int
2821 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2822 {
2823         struct mlx5_priv *priv = dev->data->dev_private;
2824
2825         return mlx5_nl_allmulti(priv->nl_socket_route,
2826                                 mlx5_ifindex(dev), !!enable);
2827 }
2828
2829 /**
2830  * Flush device MAC addresses
2831  *
2832  * @param dev
2833  *   Pointer to Ethernet device structure.
2834  *
2835  */
2836 void
2837 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2838 {
2839         struct mlx5_priv *priv = dev->data->dev_private;
2840
2841         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2842                                dev->data->mac_addrs,
2843                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2844 }