drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48
  49 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  50
  51 #ifndef HAVE_IBV_MLX5_MOD_MPW
  52 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  53 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  54 #endif
  55
  56 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  57 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  58 #endif
  59
  60 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  61
  62 /* Spinlock for mlx5_shared_data allocation. */
  63 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  64
  65 /* Process local data for secondary processes. */
  66 static struct mlx5_local_data mlx5_local_data;
  67
  68 /**
  69  * Set the completion channel file descriptor interrupt as non-blocking.
  70  *
  71  * @param[in] rxq_obj
  72  *   Pointer to RQ channel object, which includes the channel fd
  73  *
  74  * @param[out] fd
  75  *   The file descriptor (representing the intetrrupt) used in this channel.
  76  *
  77  * @return
  78  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  79  */
  80 int
  81 mlx5_os_set_nonblock_channel_fd(int fd)
  82 {
  83         int flags;
  84
  85         flags = fcntl(fd, F_GETFL);
  86         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  87 }
  88
  89 /**
  90  * Get mlx5 device attributes. The glue function query_device_ex() is called
  91  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  92  * device attributes from the glue out parameter.
  93  *
  94  * @param dev
  95  *   Pointer to ibv context.
  96  *
  97  * @param device_attr
  98  *   Pointer to mlx5 device attributes.
  99  *
 100  * @return
 101  *   0 on success, non zero error number otherwise
 102  */
 103 int
 104 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 105 {
 106         int err;
 107         struct ibv_device_attr_ex attr_ex;
 108         memset(device_attr, 0, sizeof(*device_attr));
 109         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 110         if (err)
 111                 return err;
 112
 113         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 114         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 115         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 116         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 117         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 118         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 119         device_attr->max_rwq_indirection_table_size =
 120                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 121         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 122         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 123
 124         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 125         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 126         if (err)
 127                 return err;
 128
 129         device_attr->flags = dv_attr.flags;
 130         device_attr->comp_mask = dv_attr.comp_mask;
 131 #ifdef HAVE_IBV_MLX5_MOD_SWP
 132         device_attr->sw_parsing_offloads =
 133                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 134 #endif
 135         device_attr->min_single_stride_log_num_of_bytes =
 136                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 137         device_attr->max_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 139         device_attr->min_single_wqe_log_num_of_strides =
 140                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 141         device_attr->max_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 143         device_attr->stride_supported_qpts =
 144                 dv_attr.striding_rq_caps.supported_qpts;
 145 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 146         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 147 #endif
 148
 149         return err;
 150 }
 151
 152 /**
 153  * Verbs callback to allocate a memory. This function should allocate the space
 154  * according to the size provided residing inside a huge page.
 155  * Please note that all allocation must respect the alignment from libmlx5
 156  * (i.e. currently rte_mem_page_size()).
 157  *
 158  * @param[in] size
 159  *   The size in bytes of the memory to allocate.
 160  * @param[in] data
 161  *   A pointer to the callback data.
 162  *
 163  * @return
 164  *   Allocated buffer, NULL otherwise and rte_errno is set.
 165  */
 166 static void *
 167 mlx5_alloc_verbs_buf(size_t size, void *data)
 168 {
 169         struct mlx5_priv *priv = data;
 170         void *ret;
 171         unsigned int socket = SOCKET_ID_ANY;
 172         size_t alignment = rte_mem_page_size();
 173         if (alignment == (size_t)-1) {
 174                 DRV_LOG(ERR, "Failed to get mem page size");
 175                 rte_errno = ENOMEM;
 176                 return NULL;
 177         }
 178
 179         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 180                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 181
 182                 socket = ctrl->socket;
 183         } else if (priv->verbs_alloc_ctx.type ==
 184                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 185                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 186
 187                 socket = ctrl->socket;
 188         }
 189         MLX5_ASSERT(data != NULL);
 190         ret = mlx5_malloc(0, size, alignment, socket);
 191         if (!ret && size)
 192                 rte_errno = ENOMEM;
 193         return ret;
 194 }
 195
 196 /**
 197  * Verbs callback to free a memory.
 198  *
 199  * @param[in] ptr
 200  *   A pointer to the memory to free.
 201  * @param[in] data
 202  *   A pointer to the callback data.
 203  */
 204 static void
 205 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 206 {
 207         MLX5_ASSERT(data != NULL);
 208         mlx5_free(ptr);
 209 }
 210
 211 /**
 212  * Initialize DR related data within private structure.
 213  * Routine checks the reference counter and does actual
 214  * resources creation/initialization only if counter is zero.
 215  *
 216  * @param[in] priv
 217  *   Pointer to the private device data structure.
 218  *
 219  * @return
 220  *   Zero on success, positive error code otherwise.
 221  */
 222 static int
 223 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 224 {
 225         struct mlx5_dev_ctx_shared *sh = priv->sh;
 226         char s[MLX5_HLIST_NAMESIZE];
 227         int err = 0;
 228
 229         if (!sh->flow_tbls)
 230                 err = mlx5_alloc_table_hash_list(priv);
 231         else
 232                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 233                         (void *)sh->flow_tbls);
 234         if (err)
 235                 return err;
 236         /* Create tags hash list table. */
 237         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 238         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 239         if (!sh->tag_table) {
 240                 DRV_LOG(ERR, "tags with hash creation failed.");
 241                 err = ENOMEM;
 242                 goto error;
 243         }
 244 #ifdef HAVE_MLX5DV_DR
 245         void *domain;
 246
 247         if (sh->dv_refcnt) {
 248                 /* Shared DV/DR structures is already initialized. */
 249                 sh->dv_refcnt++;
 250                 priv->dr_shared = 1;
 251                 return 0;
 252         }
 253         /* Reference counter is zero, we should initialize structures. */
 254         domain = mlx5_glue->dr_create_domain(sh->ctx,
 255                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 256         if (!domain) {
 257                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 258                 err = errno;
 259                 goto error;
 260         }
 261         sh->rx_domain = domain;
 262         domain = mlx5_glue->dr_create_domain(sh->ctx,
 263                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 264         if (!domain) {
 265                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 266                 err = errno;
 267                 goto error;
 268         }
 269         pthread_mutex_init(&sh->dv_mutex, NULL);
 270         sh->tx_domain = domain;
 271 #ifdef HAVE_MLX5DV_DR_ESWITCH
 272         if (priv->config.dv_esw_en) {
 273                 domain  = mlx5_glue->dr_create_domain
 274                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 275                 if (!domain) {
 276                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 277                         err = errno;
 278                         goto error;
 279                 }
 280                 sh->fdb_domain = domain;
 281                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 282         }
 283 #endif
 284         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 285                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 286                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 287                 if (sh->fdb_domain)
 288                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 289         }
 290         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 291 #endif /* HAVE_MLX5DV_DR */
 292         sh->dv_refcnt++;
 293         priv->dr_shared = 1;
 294         return 0;
 295 error:
 296         /* Rollback the created objects. */
 297         if (sh->rx_domain) {
 298                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 299                 sh->rx_domain = NULL;
 300         }
 301         if (sh->tx_domain) {
 302                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 303                 sh->tx_domain = NULL;
 304         }
 305         if (sh->fdb_domain) {
 306                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 307                 sh->fdb_domain = NULL;
 308         }
 309         if (sh->esw_drop_action) {
 310                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 311                 sh->esw_drop_action = NULL;
 312         }
 313         if (sh->pop_vlan_action) {
 314                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 315                 sh->pop_vlan_action = NULL;
 316         }
 317         if (sh->tag_table) {
 318                 /* tags should be destroyed with flow before. */
 319                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 320                 sh->tag_table = NULL;
 321         }
 322         mlx5_free_table_hash_list(priv);
 323         return err;
 324 }
 325
 326 /**
 327  * Destroy DR related data within private structure.
 328  *
 329  * @param[in] priv
 330  *   Pointer to the private device data structure.
 331  */
 332 void
 333 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 334 {
 335         struct mlx5_dev_ctx_shared *sh;
 336
 337         if (!priv->dr_shared)
 338                 return;
 339         priv->dr_shared = 0;
 340         sh = priv->sh;
 341         MLX5_ASSERT(sh);
 342 #ifdef HAVE_MLX5DV_DR
 343         MLX5_ASSERT(sh->dv_refcnt);
 344         if (sh->dv_refcnt && --sh->dv_refcnt)
 345                 return;
 346         if (sh->rx_domain) {
 347                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 348                 sh->rx_domain = NULL;
 349         }
 350         if (sh->tx_domain) {
 351                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 352                 sh->tx_domain = NULL;
 353         }
 354 #ifdef HAVE_MLX5DV_DR_ESWITCH
 355         if (sh->fdb_domain) {
 356                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 357                 sh->fdb_domain = NULL;
 358         }
 359         if (sh->esw_drop_action) {
 360                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 361                 sh->esw_drop_action = NULL;
 362         }
 363 #endif
 364         if (sh->pop_vlan_action) {
 365                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 366                 sh->pop_vlan_action = NULL;
 367         }
 368         pthread_mutex_destroy(&sh->dv_mutex);
 369 #endif /* HAVE_MLX5DV_DR */
 370         if (sh->tag_table) {
 371                 /* tags should be destroyed with flow before. */
 372                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 373                 sh->tag_table = NULL;
 374         }
 375         mlx5_free_table_hash_list(priv);
 376 }
 377
 378 /**
 379  * Initialize shared data between primary and secondary process.
 380  *
 381  * A memzone is reserved by primary process and secondary processes attach to
 382  * the memzone.
 383  *
 384  * @return
 385  *   0 on success, a negative errno value otherwise and rte_errno is set.
 386  */
 387 static int
 388 mlx5_init_shared_data(void)
 389 {
 390         const struct rte_memzone *mz;
 391         int ret = 0;
 392
 393         rte_spinlock_lock(&mlx5_shared_data_lock);
 394         if (mlx5_shared_data == NULL) {
 395                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 396                         /* Allocate shared memory. */
 397                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 398                                                  sizeof(*mlx5_shared_data),
 399                                                  SOCKET_ID_ANY, 0);
 400                         if (mz == NULL) {
 401                                 DRV_LOG(ERR,
 402                                         "Cannot allocate mlx5 shared data");
 403                                 ret = -rte_errno;
 404                                 goto error;
 405                         }
 406                         mlx5_shared_data = mz->addr;
 407                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 408                         rte_spinlock_init(&mlx5_shared_data->lock);
 409                 } else {
 410                         /* Lookup allocated shared memory. */
 411                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 412                         if (mz == NULL) {
 413                                 DRV_LOG(ERR,
 414                                         "Cannot attach mlx5 shared data");
 415                                 ret = -rte_errno;
 416                                 goto error;
 417                         }
 418                         mlx5_shared_data = mz->addr;
 419                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 420                 }
 421         }
 422 error:
 423         rte_spinlock_unlock(&mlx5_shared_data_lock);
 424         return ret;
 425 }
 426
 427 /**
 428  * PMD global initialization.
 429  *
 430  * Independent from individual device, this function initializes global
 431  * per-PMD data structures distinguishing primary and secondary processes.
 432  * Hence, each initialization is called once per a process.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 static int
 438 mlx5_init_once(void)
 439 {
 440         struct mlx5_shared_data *sd;
 441         struct mlx5_local_data *ld = &mlx5_local_data;
 442         int ret = 0;
 443
 444         if (mlx5_init_shared_data())
 445                 return -rte_errno;
 446         sd = mlx5_shared_data;
 447         MLX5_ASSERT(sd);
 448         rte_spinlock_lock(&sd->lock);
 449         switch (rte_eal_process_type()) {
 450         case RTE_PROC_PRIMARY:
 451                 if (sd->init_done)
 452                         break;
 453                 LIST_INIT(&sd->mem_event_cb_list);
 454                 rte_rwlock_init(&sd->mem_event_rwlock);
 455                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 456                                                 mlx5_mr_mem_event_cb, NULL);
 457                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 458                                            mlx5_mp_os_primary_handle);
 459                 if (ret)
 460                         goto out;
 461                 sd->init_done = true;
 462                 break;
 463         case RTE_PROC_SECONDARY:
 464                 if (ld->init_done)
 465                         break;
 466                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 467                                              mlx5_mp_os_secondary_handle);
 468                 if (ret)
 469                         goto out;
 470                 ++sd->secondary_cnt;
 471                 ld->init_done = true;
 472                 break;
 473         default:
 474                 break;
 475         }
 476 out:
 477         rte_spinlock_unlock(&sd->lock);
 478         return ret;
 479 }
 480
 481 /**
 482  * Spawn an Ethernet device from Verbs information.
 483  *
 484  * @param dpdk_dev
 485  *   Backing DPDK device.
 486  * @param spawn
 487  *   Verbs device parameters (name, port, switch_info) to spawn.
 488  * @param config
 489  *   Device configuration parameters.
 490  *
 491  * @return
 492  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 493  *   is set. The following errors are defined:
 494  *
 495  *   EBUSY: device is not supposed to be spawned.
 496  *   EEXIST: device is already spawned
 497  */
 498 static struct rte_eth_dev *
 499 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 500                struct mlx5_dev_spawn_data *spawn,
 501                struct mlx5_dev_config *config)
 502 {
 503         const struct mlx5_switch_info *switch_info = &spawn->info;
 504         struct mlx5_dev_ctx_shared *sh = NULL;
 505         struct ibv_port_attr port_attr;
 506         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 507         struct rte_eth_dev *eth_dev = NULL;
 508         struct mlx5_priv *priv = NULL;
 509         int err = 0;
 510         unsigned int hw_padding = 0;
 511         unsigned int mps;
 512         unsigned int cqe_comp;
 513         unsigned int cqe_pad = 0;
 514         unsigned int tunnel_en = 0;
 515         unsigned int mpls_en = 0;
 516         unsigned int swp = 0;
 517         unsigned int mprq = 0;
 518         unsigned int mprq_min_stride_size_n = 0;
 519         unsigned int mprq_max_stride_size_n = 0;
 520         unsigned int mprq_min_stride_num_n = 0;
 521         unsigned int mprq_max_stride_num_n = 0;
 522         struct rte_ether_addr mac;
 523         char name[RTE_ETH_NAME_MAX_LEN];
 524         int own_domain_id = 0;
 525         uint16_t port_id;
 526         unsigned int i;
 527 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 528         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 529 #endif
 530
 531         /* Determine if this port representor is supposed to be spawned. */
 532         if (switch_info->representor && dpdk_dev->devargs) {
 533                 struct rte_eth_devargs eth_da;
 534
 535                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 536                 if (err) {
 537                         rte_errno = -err;
 538                         DRV_LOG(ERR, "failed to process device arguments: %s",
 539                                 strerror(rte_errno));
 540                         return NULL;
 541                 }
 542                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 543                         if (eth_da.representor_ports[i] ==
 544                             (uint16_t)switch_info->port_name)
 545                                 break;
 546                 if (i == eth_da.nb_representor_ports) {
 547                         rte_errno = EBUSY;
 548                         return NULL;
 549                 }
 550         }
 551         /* Build device name. */
 552         if (spawn->pf_bond <  0) {
 553                 /* Single device. */
 554                 if (!switch_info->representor)
 555                         strlcpy(name, dpdk_dev->name, sizeof(name));
 556                 else
 557                         snprintf(name, sizeof(name), "%s_representor_%u",
 558                                  dpdk_dev->name, switch_info->port_name);
 559         } else {
 560                 /* Bonding device. */
 561                 if (!switch_info->representor)
 562                         snprintf(name, sizeof(name), "%s_%s",
 563                                  dpdk_dev->name,
 564                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 565                 else
 566                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 567                                  dpdk_dev->name,
 568                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 569                                  switch_info->port_name);
 570         }
 571         /* check if the device is already spawned */
 572         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 573                 rte_errno = EEXIST;
 574                 return NULL;
 575         }
 576         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 577         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 578                 struct mlx5_mp_id mp_id;
 579
 580                 eth_dev = rte_eth_dev_attach_secondary(name);
 581                 if (eth_dev == NULL) {
 582                         DRV_LOG(ERR, "can not attach rte ethdev");
 583                         rte_errno = ENOMEM;
 584                         return NULL;
 585                 }
 586                 eth_dev->device = dpdk_dev;
 587                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 588                 err = mlx5_proc_priv_init(eth_dev);
 589                 if (err)
 590                         return NULL;
 591                 mp_id.port_id = eth_dev->data->port_id;
 592                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 593                 /* Receive command fd from primary process */
 594                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 595                 if (err < 0)
 596                         goto err_secondary;
 597                 /* Remap UAR for Tx queues. */
 598                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 599                 if (err)
 600                         goto err_secondary;
 601                 /*
 602                  * Ethdev pointer is still required as input since
 603                  * the primary device is not accessible from the
 604                  * secondary process.
 605                  */
 606                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 607                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 608                 return eth_dev;
 609 err_secondary:
 610                 mlx5_dev_close(eth_dev);
 611                 return NULL;
 612         }
 613         /*
 614          * Some parameters ("tx_db_nc" in particularly) are needed in
 615          * advance to create dv/verbs device context. We proceed the
 616          * devargs here to get ones, and later proceed devargs again
 617          * to override some hardware settings.
 618          */
 619         err = mlx5_args(config, dpdk_dev->devargs);
 620         if (err) {
 621                 err = rte_errno;
 622                 DRV_LOG(ERR, "failed to process device arguments: %s",
 623                         strerror(rte_errno));
 624                 goto error;
 625         }
 626         mlx5_malloc_mem_select(config->sys_mem_en);
 627         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 628         if (!sh)
 629                 return NULL;
 630         config->devx = sh->devx;
 631 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 632         config->dest_tir = 1;
 633 #endif
 634 #ifdef HAVE_IBV_MLX5_MOD_SWP
 635         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 636 #endif
 637         /*
 638          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 639          * as all ConnectX-5 devices.
 640          */
 641 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 642         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 643 #endif
 644 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 645         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 646 #endif
 647         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 648         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 649                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 650                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 651                         mps = MLX5_MPW_ENHANCED;
 652                 } else {
 653                         DRV_LOG(DEBUG, "MPW is supported");
 654                         mps = MLX5_MPW;
 655                 }
 656         } else {
 657                 DRV_LOG(DEBUG, "MPW isn't supported");
 658                 mps = MLX5_MPW_DISABLED;
 659         }
 660 #ifdef HAVE_IBV_MLX5_MOD_SWP
 661         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 662                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 663         DRV_LOG(DEBUG, "SWP support: %u", swp);
 664 #endif
 665         config->swp = !!swp;
 666 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 667         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 668                 struct mlx5dv_striding_rq_caps mprq_caps =
 669                         dv_attr.striding_rq_caps;
 670
 671                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 672                         mprq_caps.min_single_stride_log_num_of_bytes);
 673                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 674                         mprq_caps.max_single_stride_log_num_of_bytes);
 675                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 676                         mprq_caps.min_single_wqe_log_num_of_strides);
 677                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 678                         mprq_caps.max_single_wqe_log_num_of_strides);
 679                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 680                         mprq_caps.supported_qpts);
 681                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 682                 mprq = 1;
 683                 mprq_min_stride_size_n =
 684                         mprq_caps.min_single_stride_log_num_of_bytes;
 685                 mprq_max_stride_size_n =
 686                         mprq_caps.max_single_stride_log_num_of_bytes;
 687                 mprq_min_stride_num_n =
 688                         mprq_caps.min_single_wqe_log_num_of_strides;
 689                 mprq_max_stride_num_n =
 690                         mprq_caps.max_single_wqe_log_num_of_strides;
 691         }
 692 #endif
 693         if (RTE_CACHE_LINE_SIZE == 128 &&
 694             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 695                 cqe_comp = 0;
 696         else
 697                 cqe_comp = 1;
 698         config->cqe_comp = cqe_comp;
 699 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 700         /* Whether device supports 128B Rx CQE padding. */
 701         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 702                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 703 #endif
 704 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 705         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 706                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 707                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 708                              (dv_attr.tunnel_offloads_caps &
 709                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 710                              (dv_attr.tunnel_offloads_caps &
 711                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 712         }
 713         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 714                 tunnel_en ? "" : "not ");
 715 #else
 716         DRV_LOG(WARNING,
 717                 "tunnel offloading disabled due to old OFED/rdma-core version");
 718 #endif
 719         config->tunnel_en = tunnel_en;
 720 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 721         mpls_en = ((dv_attr.tunnel_offloads_caps &
 722                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 723                    (dv_attr.tunnel_offloads_caps &
 724                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 725         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 726                 mpls_en ? "" : "not ");
 727 #else
 728         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 729                 " old OFED/rdma-core version or firmware configuration");
 730 #endif
 731         config->mpls_en = mpls_en;
 732         /* Check port status. */
 733         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 734         if (err) {
 735                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 736                 goto error;
 737         }
 738         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 739                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 740                 err = EINVAL;
 741                 goto error;
 742         }
 743         if (port_attr.state != IBV_PORT_ACTIVE)
 744                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 745                         mlx5_glue->port_state_str(port_attr.state),
 746                         port_attr.state);
 747         /* Allocate private eth device data. */
 748         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 749                            sizeof(*priv),
 750                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 751         if (priv == NULL) {
 752                 DRV_LOG(ERR, "priv allocation failure");
 753                 err = ENOMEM;
 754                 goto error;
 755         }
 756         priv->sh = sh;
 757         priv->dev_port = spawn->phys_port;
 758         priv->pci_dev = spawn->pci_dev;
 759         priv->mtu = RTE_ETHER_MTU;
 760         priv->mp_id.port_id = port_id;
 761         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 762         /* Some internal functions rely on Netlink sockets, open them now. */
 763         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 764         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 765         priv->representor = !!switch_info->representor;
 766         priv->master = !!switch_info->master;
 767         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 768         priv->vport_meta_tag = 0;
 769         priv->vport_meta_mask = 0;
 770         priv->pf_bond = spawn->pf_bond;
 771 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 772         /*
 773          * The DevX port query API is implemented. E-Switch may use
 774          * either vport or reg_c[0] metadata register to match on
 775          * vport index. The engaged part of metadata register is
 776          * defined by mask.
 777          */
 778         if (switch_info->representor || switch_info->master) {
 779                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 780                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 781                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 782                                                  &devx_port);
 783                 if (err) {
 784                         DRV_LOG(WARNING,
 785                                 "can't query devx port %d on device %s",
 786                                 spawn->phys_port,
 787                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 788                         devx_port.comp_mask = 0;
 789                 }
 790         }
 791         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 792                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 793                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 794                 if (!priv->vport_meta_mask) {
 795                         DRV_LOG(ERR, "vport zero mask for port %d"
 796                                      " on bonding device %s",
 797                                      spawn->phys_port,
 798                                      mlx5_os_get_dev_device_name
 799                                                         (spawn->phys_dev));
 800                         err = ENOTSUP;
 801                         goto error;
 802                 }
 803                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 804                         DRV_LOG(ERR, "invalid vport tag for port %d"
 805                                      " on bonding device %s",
 806                                      spawn->phys_port,
 807                                      mlx5_os_get_dev_device_name
 808                                                         (spawn->phys_dev));
 809                         err = ENOTSUP;
 810                         goto error;
 811                 }
 812         }
 813         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 814                 priv->vport_id = devx_port.vport_num;
 815         } else if (spawn->pf_bond >= 0) {
 816                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 817                              " on bonding device %s",
 818                              spawn->phys_port,
 819                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 820                 err = ENOTSUP;
 821                 goto error;
 822         } else {
 823                 /* Suppose vport index in compatible way. */
 824                 priv->vport_id = switch_info->representor ?
 825                                  switch_info->port_name + 1 : -1;
 826         }
 827 #else
 828         /*
 829          * Kernel/rdma_core support single E-Switch per PF configurations
 830          * only and vport_id field contains the vport index for
 831          * associated VF, which is deduced from representor port name.
 832          * For example, let's have the IB device port 10, it has
 833          * attached network device eth0, which has port name attribute
 834          * pf0vf2, we can deduce the VF number as 2, and set vport index
 835          * as 3 (2+1). This assigning schema should be changed if the
 836          * multiple E-Switch instances per PF configurations or/and PCI
 837          * subfunctions are added.
 838          */
 839         priv->vport_id = switch_info->representor ?
 840                          switch_info->port_name + 1 : -1;
 841 #endif
 842         /* representor_id field keeps the unmodified VF index. */
 843         priv->representor_id = switch_info->representor ?
 844                                switch_info->port_name : -1;
 845         /*
 846          * Look for sibling devices in order to reuse their switch domain
 847          * if any, otherwise allocate one.
 848          */
 849         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 850                 const struct mlx5_priv *opriv =
 851                         rte_eth_devices[port_id].data->dev_private;
 852
 853                 if (!opriv ||
 854                     opriv->sh != priv->sh ||
 855                         opriv->domain_id ==
 856                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 857                         continue;
 858                 priv->domain_id = opriv->domain_id;
 859                 break;
 860         }
 861         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 862                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 863                 if (err) {
 864                         err = rte_errno;
 865                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 866                                 strerror(rte_errno));
 867                         goto error;
 868                 }
 869                 own_domain_id = 1;
 870         }
 871         /* Override some values set by hardware configuration. */
 872         mlx5_args(config, dpdk_dev->devargs);
 873         err = mlx5_dev_check_sibling_config(priv, config);
 874         if (err)
 875                 goto error;
 876         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 877                             IBV_DEVICE_RAW_IP_CSUM);
 878         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 879                 (config->hw_csum ? "" : "not "));
 880 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 881         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 882         DRV_LOG(DEBUG, "counters are not supported");
 883 #endif
 884 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 885         if (config->dv_flow_en) {
 886                 DRV_LOG(WARNING, "DV flow is not supported");
 887                 config->dv_flow_en = 0;
 888         }
 889 #endif
 890         config->ind_table_max_size =
 891                 sh->device_attr.max_rwq_indirection_table_size;
 892         /*
 893          * Remove this check once DPDK supports larger/variable
 894          * indirection tables.
 895          */
 896         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
 897                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
 898         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 899                 config->ind_table_max_size);
 900         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
 901                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 902         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
 903                 (config->hw_vlan_strip ? "" : "not "));
 904         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
 905                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
 906 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 907         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
 908 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 909         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
 910                         IBV_DEVICE_PCI_WRITE_END_PADDING);
 911 #endif
 912         if (config->hw_padding && !hw_padding) {
 913                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 914                 config->hw_padding = 0;
 915         } else if (config->hw_padding) {
 916                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
 917         }
 918         config->tso = (sh->device_attr.max_tso > 0 &&
 919                       (sh->device_attr.tso_supported_qpts &
 920                        (1 << IBV_QPT_RAW_PACKET)));
 921         if (config->tso)
 922                 config->tso_max_payload_sz = sh->device_attr.max_tso;
 923         /*
 924          * MPW is disabled by default, while the Enhanced MPW is enabled
 925          * by default.
 926          */
 927         if (config->mps == MLX5_ARG_UNSET)
 928                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
 929                                                           MLX5_MPW_DISABLED;
 930         else
 931                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
 932         DRV_LOG(INFO, "%sMPS is %s",
 933                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
 934                 config->mps == MLX5_MPW ? "legacy " : "",
 935                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
 936         if (config->cqe_comp && !cqe_comp) {
 937                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
 938                 config->cqe_comp = 0;
 939         }
 940         if (config->cqe_pad && !cqe_pad) {
 941                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
 942                 config->cqe_pad = 0;
 943         } else if (config->cqe_pad) {
 944                 DRV_LOG(INFO, "Rx CQE padding is enabled");
 945         }
 946         if (config->devx) {
 947                 priv->counter_fallback = 0;
 948                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
 949                 if (err) {
 950                         err = -err;
 951                         goto error;
 952                 }
 953                 if (!config->hca_attr.flow_counters_dump)
 954                         priv->counter_fallback = 1;
 955 #ifndef HAVE_IBV_DEVX_ASYNC
 956                 priv->counter_fallback = 1;
 957 #endif
 958                 if (priv->counter_fallback)
 959                         DRV_LOG(INFO, "Use fall-back DV counter management");
 960                 /* Check for LRO support. */
 961                 if (config->dest_tir && config->hca_attr.lro_cap &&
 962                     config->dv_flow_en) {
 963                         /* TBD check tunnel lro caps. */
 964                         config->lro.supported = config->hca_attr.lro_cap;
 965                         DRV_LOG(DEBUG, "Device supports LRO");
 966                         /*
 967                          * If LRO timeout is not configured by application,
 968                          * use the minimal supported value.
 969                          */
 970                         if (!config->lro.timeout)
 971                                 config->lro.timeout =
 972                                 config->hca_attr.lro_timer_supported_periods[0];
 973                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
 974                                 config->lro.timeout);
 975                 }
 976 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
 977                 if (config->hca_attr.qos.sup &&
 978                     config->hca_attr.qos.srtcm_sup &&
 979                     config->dv_flow_en) {
 980                         uint8_t reg_c_mask =
 981                                 config->hca_attr.qos.flow_meter_reg_c_ids;
 982                         /*
 983                          * Meter needs two REG_C's for color match and pre-sfx
 984                          * flow match. Here get the REG_C for color match.
 985                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
 986                          */
 987                         reg_c_mask &= 0xfc;
 988                         if (__builtin_popcount(reg_c_mask) < 1) {
 989                                 priv->mtr_en = 0;
 990                                 DRV_LOG(WARNING, "No available register for"
 991                                         " meter.");
 992                         } else {
 993                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
 994                                                       REG_C_0;
 995                                 priv->mtr_en = 1;
 996                                 priv->mtr_reg_share =
 997                                       config->hca_attr.qos.flow_meter_reg_share;
 998                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
 999                                         priv->mtr_color_reg);
1000                         }
1001                 }
1002 #endif
1003         }
1004         if (config->tx_pp) {
1005                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1006                         config->hca_attr.dev_freq_khz);
1007                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1008                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1009                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1010                         config->hca_attr.cross_channel ? "" : "not ");
1011                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1012                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1013                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1014                         config->hca_attr.non_wire_sq ? "" : "not ");
1015                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1016                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1017                         config->hca_attr.log_max_static_sq_wq);
1018                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1019                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1020                 if (!config->devx) {
1021                         DRV_LOG(ERR, "DevX is required for packet pacing");
1022                         err = ENODEV;
1023                         goto error;
1024                 }
1025                 if (!config->hca_attr.qos.packet_pacing) {
1026                         DRV_LOG(ERR, "Packet pacing is not supported");
1027                         err = ENODEV;
1028                         goto error;
1029                 }
1030                 if (!config->hca_attr.cross_channel) {
1031                         DRV_LOG(ERR, "Cross channel operations are"
1032                                      " required for packet pacing");
1033                         err = ENODEV;
1034                         goto error;
1035                 }
1036                 if (!config->hca_attr.wqe_index_ignore) {
1037                         DRV_LOG(ERR, "WQE index ignore feature is"
1038                                      " required for packet pacing");
1039                         err = ENODEV;
1040                         goto error;
1041                 }
1042                 if (!config->hca_attr.non_wire_sq) {
1043                         DRV_LOG(ERR, "Non-wire SQ feature is"
1044                                      " required for packet pacing");
1045                         err = ENODEV;
1046                         goto error;
1047                 }
1048                 if (!config->hca_attr.log_max_static_sq_wq) {
1049                         DRV_LOG(ERR, "Static WQE SQ feature is"
1050                                      " required for packet pacing");
1051                         err = ENODEV;
1052                         goto error;
1053                 }
1054                 if (!config->hca_attr.qos.wqe_rate_pp) {
1055                         DRV_LOG(ERR, "WQE rate mode is required"
1056                                      " for packet pacing");
1057                         err = ENODEV;
1058                         goto error;
1059                 }
1060 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1061                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1062                              " can't create queues for packet pacing");
1063                 err = ENODEV;
1064                 goto error;
1065 #endif
1066         }
1067         if (config->devx) {
1068                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1069
1070                 err = mlx5_devx_cmd_register_read
1071                         (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1072                         reg, MLX5_ST_SZ_DW(register_mtutc));
1073                 if (!err) {
1074                         uint32_t ts_mode;
1075
1076                         /* MTUTC register is read successfully. */
1077                         ts_mode = MLX5_GET(register_mtutc, reg,
1078                                            time_stamp_mode);
1079                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1080                                 config->rt_timestamp = 1;
1081                 } else {
1082                         /* Kernel does not support register reading. */
1083                         if (config->hca_attr.dev_freq_khz ==
1084                                                  (NS_PER_S / MS_PER_S))
1085                                 config->rt_timestamp = 1;
1086                 }
1087         }
1088         /*
1089          * If HW has bug working with tunnel packet decapsulation and
1090          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1091          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1092          */
1093         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1094                 config->hw_fcs_strip = 0;
1095         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1096                 (config->hw_fcs_strip ? "" : "not "));
1097         if (config->mprq.enabled && mprq) {
1098                 if (config->mprq.stride_num_n &&
1099                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1100                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1101                         config->mprq.stride_num_n =
1102                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1103                                                 mprq_min_stride_num_n),
1104                                         mprq_max_stride_num_n);
1105                         DRV_LOG(WARNING,
1106                                 "the number of strides"
1107                                 " for Multi-Packet RQ is out of range,"
1108                                 " setting default value (%u)",
1109                                 1 << config->mprq.stride_num_n);
1110                 }
1111                 if (config->mprq.stride_size_n &&
1112                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1113                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1114                         config->mprq.stride_size_n =
1115                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1116                                                 mprq_min_stride_size_n),
1117                                         mprq_max_stride_size_n);
1118                         DRV_LOG(WARNING,
1119                                 "the size of a stride"
1120                                 " for Multi-Packet RQ is out of range,"
1121                                 " setting default value (%u)",
1122                                 1 << config->mprq.stride_size_n);
1123                 }
1124                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1125                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1126         } else if (config->mprq.enabled && !mprq) {
1127                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1128                 config->mprq.enabled = 0;
1129         }
1130         if (config->max_dump_files_num == 0)
1131                 config->max_dump_files_num = 128;
1132         eth_dev = rte_eth_dev_allocate(name);
1133         if (eth_dev == NULL) {
1134                 DRV_LOG(ERR, "can not allocate rte ethdev");
1135                 err = ENOMEM;
1136                 goto error;
1137         }
1138         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1139         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1140         if (priv->representor) {
1141                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1142                 eth_dev->data->representor_id = priv->representor_id;
1143         }
1144         /*
1145          * Store associated network device interface index. This index
1146          * is permanent throughout the lifetime of device. So, we may store
1147          * the ifindex here and use the cached value further.
1148          */
1149         MLX5_ASSERT(spawn->ifindex);
1150         priv->if_index = spawn->ifindex;
1151         eth_dev->data->dev_private = priv;
1152         priv->dev_data = eth_dev->data;
1153         eth_dev->data->mac_addrs = priv->mac;
1154         eth_dev->device = dpdk_dev;
1155         /* Configure the first MAC address by default. */
1156         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1157                 DRV_LOG(ERR,
1158                         "port %u cannot get MAC address, is mlx5_en"
1159                         " loaded? (errno: %s)",
1160                         eth_dev->data->port_id, strerror(rte_errno));
1161                 err = ENODEV;
1162                 goto error;
1163         }
1164         DRV_LOG(INFO,
1165                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1166                 eth_dev->data->port_id,
1167                 mac.addr_bytes[0], mac.addr_bytes[1],
1168                 mac.addr_bytes[2], mac.addr_bytes[3],
1169                 mac.addr_bytes[4], mac.addr_bytes[5]);
1170 #ifdef RTE_LIBRTE_MLX5_DEBUG
1171         {
1172                 char ifname[IF_NAMESIZE];
1173
1174                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1175                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1176                                 eth_dev->data->port_id, ifname);
1177                 else
1178                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1179                                 eth_dev->data->port_id);
1180         }
1181 #endif
1182         /* Get actual MTU if possible. */
1183         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1184         if (err) {
1185                 err = rte_errno;
1186                 goto error;
1187         }
1188         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1189                 priv->mtu);
1190         /* Initialize burst functions to prevent crashes before link-up. */
1191         eth_dev->rx_pkt_burst = removed_rx_burst;
1192         eth_dev->tx_pkt_burst = removed_tx_burst;
1193         eth_dev->dev_ops = &mlx5_os_dev_ops;
1194         /* Register MAC address. */
1195         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1196         if (config->vf && config->vf_nl_en)
1197                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1198                                       mlx5_ifindex(eth_dev),
1199                                       eth_dev->data->mac_addrs,
1200                                       MLX5_MAX_MAC_ADDRESSES);
1201         priv->flows = 0;
1202         priv->ctrl_flows = 0;
1203         TAILQ_INIT(&priv->flow_meters);
1204         TAILQ_INIT(&priv->flow_meter_profiles);
1205         /* Hint libmlx5 to use PMD allocator for data plane resources */
1206         mlx5_glue->dv_set_context_attr(sh->ctx,
1207                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1208                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1209                                 .alloc = &mlx5_alloc_verbs_buf,
1210                                 .free = &mlx5_free_verbs_buf,
1211                                 .data = priv,
1212                         }));
1213         /* Bring Ethernet device up. */
1214         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1215                 eth_dev->data->port_id);
1216         mlx5_set_link_up(eth_dev);
1217         /*
1218          * Even though the interrupt handler is not installed yet,
1219          * interrupts will still trigger on the async_fd from
1220          * Verbs context returned by ibv_open_device().
1221          */
1222         mlx5_link_update(eth_dev, 0);
1223 #ifdef HAVE_MLX5DV_DR_ESWITCH
1224         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1225               (switch_info->representor || switch_info->master)))
1226                 config->dv_esw_en = 0;
1227 #else
1228         config->dv_esw_en = 0;
1229 #endif
1230         /* Detect minimal data bytes to inline. */
1231         mlx5_set_min_inline(spawn, config);
1232         /* Store device configuration on private structure. */
1233         priv->config = *config;
1234         /* Create context for virtual machine VLAN workaround. */
1235         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1236         if (config->dv_flow_en) {
1237                 err = mlx5_alloc_shared_dr(priv);
1238                 if (err)
1239                         goto error;
1240                 /*
1241                  * RSS id is shared with meter flow id. Meter flow id can only
1242                  * use the 24 MSB of the register.
1243                  */
1244                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1245                                      MLX5_MTR_COLOR_BITS);
1246                 if (!priv->qrss_id_pool) {
1247                         DRV_LOG(ERR, "can't create flow id pool");
1248                         err = ENOMEM;
1249                         goto error;
1250                 }
1251         }
1252         /* Supported Verbs flow priority number detection. */
1253         err = mlx5_flow_discover_priorities(eth_dev);
1254         if (err < 0) {
1255                 err = -err;
1256                 goto error;
1257         }
1258         priv->config.flow_prio = err;
1259         if (!priv->config.dv_esw_en &&
1260             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1261                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1262                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1263                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1264         }
1265         mlx5_set_metadata_mask(eth_dev);
1266         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1267             !priv->sh->dv_regc0_mask) {
1268                 DRV_LOG(ERR, "metadata mode %u is not supported "
1269                              "(no metadata reg_c[0] is available)",
1270                              priv->config.dv_xmeta_en);
1271                         err = ENOTSUP;
1272                         goto error;
1273         }
1274         /*
1275          * Allocate the buffer for flow creating, just once.
1276          * The allocation must be done before any flow creating.
1277          */
1278         mlx5_flow_alloc_intermediate(eth_dev);
1279         /* Query availability of metadata reg_c's. */
1280         err = mlx5_flow_discover_mreg_c(eth_dev);
1281         if (err < 0) {
1282                 err = -err;
1283                 goto error;
1284         }
1285         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1286                 DRV_LOG(DEBUG,
1287                         "port %u extensive metadata register is not supported",
1288                         eth_dev->data->port_id);
1289                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1290                         DRV_LOG(ERR, "metadata mode %u is not supported "
1291                                      "(no metadata registers available)",
1292                                      priv->config.dv_xmeta_en);
1293                         err = ENOTSUP;
1294                         goto error;
1295                 }
1296         }
1297         if (priv->config.dv_flow_en &&
1298             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1299             mlx5_flow_ext_mreg_supported(eth_dev) &&
1300             priv->sh->dv_regc0_mask) {
1301                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1302                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1303                 if (!priv->mreg_cp_tbl) {
1304                         err = ENOMEM;
1305                         goto error;
1306                 }
1307         }
1308         return eth_dev;
1309 error:
1310         if (priv) {
1311                 if (priv->mreg_cp_tbl)
1312                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1313                 if (priv->sh)
1314                         mlx5_os_free_shared_dr(priv);
1315                 if (priv->nl_socket_route >= 0)
1316                         close(priv->nl_socket_route);
1317                 if (priv->nl_socket_rdma >= 0)
1318                         close(priv->nl_socket_rdma);
1319                 if (priv->vmwa_context)
1320                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1321                 if (priv->qrss_id_pool)
1322                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1323                 if (own_domain_id)
1324                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1325                 mlx5_free(priv);
1326                 if (eth_dev != NULL)
1327                         eth_dev->data->dev_private = NULL;
1328         }
1329         if (eth_dev != NULL) {
1330                 /* mac_addrs must not be freed alone because part of
1331                  * dev_private
1332                  **/
1333                 eth_dev->data->mac_addrs = NULL;
1334                 rte_eth_dev_release_port(eth_dev);
1335         }
1336         if (sh)
1337                 mlx5_free_shared_dev_ctx(sh);
1338         MLX5_ASSERT(err > 0);
1339         rte_errno = err;
1340         return NULL;
1341 }
1342
1343 /**
1344  * Comparison callback to sort device data.
1345  *
1346  * This is meant to be used with qsort().
1347  *
1348  * @param a[in]
1349  *   Pointer to pointer to first data object.
1350  * @param b[in]
1351  *   Pointer to pointer to second data object.
1352  *
1353  * @return
1354  *   0 if both objects are equal, less than 0 if the first argument is less
1355  *   than the second, greater than 0 otherwise.
1356  */
1357 static int
1358 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1359 {
1360         const struct mlx5_switch_info *si_a =
1361                 &((const struct mlx5_dev_spawn_data *)a)->info;
1362         const struct mlx5_switch_info *si_b =
1363                 &((const struct mlx5_dev_spawn_data *)b)->info;
1364         int ret;
1365
1366         /* Master device first. */
1367         ret = si_b->master - si_a->master;
1368         if (ret)
1369                 return ret;
1370         /* Then representor devices. */
1371         ret = si_b->representor - si_a->representor;
1372         if (ret)
1373                 return ret;
1374         /* Unidentified devices come last in no specific order. */
1375         if (!si_a->representor)
1376                 return 0;
1377         /* Order representors by name. */
1378         return si_a->port_name - si_b->port_name;
1379 }
1380
1381 /**
1382  * Match PCI information for possible slaves of bonding device.
1383  *
1384  * @param[in] ibv_dev
1385  *   Pointer to Infiniband device structure.
1386  * @param[in] pci_dev
1387  *   Pointer to PCI device structure to match PCI address.
1388  * @param[in] nl_rdma
1389  *   Netlink RDMA group socket handle.
1390  *
1391  * @return
1392  *   negative value if no bonding device found, otherwise
1393  *   positive index of slave PF in bonding.
1394  */
1395 static int
1396 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1397                            const struct rte_pci_device *pci_dev,
1398                            int nl_rdma)
1399 {
1400         char ifname[IF_NAMESIZE + 1];
1401         unsigned int ifindex;
1402         unsigned int np, i;
1403         FILE *file = NULL;
1404         int pf = -1;
1405
1406         /*
1407          * Try to get master device name. If something goes
1408          * wrong suppose the lack of kernel support and no
1409          * bonding devices.
1410          */
1411         if (nl_rdma < 0)
1412                 return -1;
1413         if (!strstr(ibv_dev->name, "bond"))
1414                 return -1;
1415         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1416         if (!np)
1417                 return -1;
1418         /*
1419          * The Master device might not be on the predefined
1420          * port (not on port index 1, it is not garanted),
1421          * we have to scan all Infiniband device port and
1422          * find master.
1423          */
1424         for (i = 1; i <= np; ++i) {
1425                 /* Check whether Infiniband port is populated. */
1426                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1427                 if (!ifindex)
1428                         continue;
1429                 if (!if_indextoname(ifindex, ifname))
1430                         continue;
1431                 /* Try to read bonding slave names from sysfs. */
1432                 MKSTR(slaves,
1433                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1434                 file = fopen(slaves, "r");
1435                 if (file)
1436                         break;
1437         }
1438         if (!file)
1439                 return -1;
1440         /* Use safe format to check maximal buffer length. */
1441         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1442         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1443                 char tmp_str[IF_NAMESIZE + 32];
1444                 struct rte_pci_addr pci_addr;
1445                 struct mlx5_switch_info info;
1446
1447                 /* Process slave interface names in the loop. */
1448                 snprintf(tmp_str, sizeof(tmp_str),
1449                          "/sys/class/net/%s", ifname);
1450                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1451                         DRV_LOG(WARNING, "can not get PCI address"
1452                                          " for netdev \"%s\"", ifname);
1453                         continue;
1454                 }
1455                 if (pci_dev->addr.domain != pci_addr.domain ||
1456                     pci_dev->addr.bus != pci_addr.bus ||
1457                     pci_dev->addr.devid != pci_addr.devid ||
1458                     pci_dev->addr.function != pci_addr.function)
1459                         continue;
1460                 /* Slave interface PCI address match found. */
1461                 fclose(file);
1462                 snprintf(tmp_str, sizeof(tmp_str),
1463                          "/sys/class/net/%s/phys_port_name", ifname);
1464                 file = fopen(tmp_str, "rb");
1465                 if (!file)
1466                         break;
1467                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1468                 if (fscanf(file, "%32s", tmp_str) == 1)
1469                         mlx5_translate_port_name(tmp_str, &info);
1470                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1471                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1472                         pf = info.port_name;
1473                 break;
1474         }
1475         if (file)
1476                 fclose(file);
1477         return pf;
1478 }
1479
1480 /**
1481  * DPDK callback to register a PCI device.
1482  *
1483  * This function spawns Ethernet devices out of a given PCI device.
1484  *
1485  * @param[in] pci_drv
1486  *   PCI driver structure (mlx5_driver).
1487  * @param[in] pci_dev
1488  *   PCI device information.
1489  *
1490  * @return
1491  *   0 on success, a negative errno value otherwise and rte_errno is set.
1492  */
1493 int
1494 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1495                   struct rte_pci_device *pci_dev)
1496 {
1497         struct ibv_device **ibv_list;
1498         /*
1499          * Number of found IB Devices matching with requested PCI BDF.
1500          * nd != 1 means there are multiple IB devices over the same
1501          * PCI device and we have representors and master.
1502          */
1503         unsigned int nd = 0;
1504         /*
1505          * Number of found IB device Ports. nd = 1 and np = 1..n means
1506          * we have the single multiport IB device, and there may be
1507          * representors attached to some of found ports.
1508          */
1509         unsigned int np = 0;
1510         /*
1511          * Number of DPDK ethernet devices to Spawn - either over
1512          * multiple IB devices or multiple ports of single IB device.
1513          * Actually this is the number of iterations to spawn.
1514          */
1515         unsigned int ns = 0;
1516         /*
1517          * Bonding device
1518          *   < 0 - no bonding device (single one)
1519          *  >= 0 - bonding device (value is slave PF index)
1520          */
1521         int bd = -1;
1522         struct mlx5_dev_spawn_data *list = NULL;
1523         struct mlx5_dev_config dev_config;
1524         unsigned int dev_config_vf;
1525         int ret;
1526
1527         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1528                 mlx5_pmd_socket_init();
1529         ret = mlx5_init_once();
1530         if (ret) {
1531                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1532                         strerror(rte_errno));
1533                 return -rte_errno;
1534         }
1535         errno = 0;
1536         ibv_list = mlx5_glue->get_device_list(&ret);
1537         if (!ibv_list) {
1538                 rte_errno = errno ? errno : ENOSYS;
1539                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1540                 return -rte_errno;
1541         }
1542         /*
1543          * First scan the list of all Infiniband devices to find
1544          * matching ones, gathering into the list.
1545          */
1546         struct ibv_device *ibv_match[ret + 1];
1547         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1548         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1549         unsigned int i;
1550
1551         while (ret-- > 0) {
1552                 struct rte_pci_addr pci_addr;
1553
1554                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1555                 bd = mlx5_device_bond_pci_match
1556                                 (ibv_list[ret], pci_dev, nl_rdma);
1557                 if (bd >= 0) {
1558                         /*
1559                          * Bonding device detected. Only one match is allowed,
1560                          * the bonding is supported over multi-port IB device,
1561                          * there should be no matches on representor PCI
1562                          * functions or non VF LAG bonding devices with
1563                          * specified address.
1564                          */
1565                         if (nd) {
1566                                 DRV_LOG(ERR,
1567                                         "multiple PCI match on bonding device"
1568                                         "\"%s\" found", ibv_list[ret]->name);
1569                                 rte_errno = ENOENT;
1570                                 ret = -rte_errno;
1571                                 goto exit;
1572                         }
1573                         DRV_LOG(INFO, "PCI information matches for"
1574                                       " slave %d bonding device \"%s\"",
1575                                       bd, ibv_list[ret]->name);
1576                         ibv_match[nd++] = ibv_list[ret];
1577                         break;
1578                 }
1579                 if (mlx5_dev_to_pci_addr
1580                         (ibv_list[ret]->ibdev_path, &pci_addr))
1581                         continue;
1582                 if (pci_dev->addr.domain != pci_addr.domain ||
1583                     pci_dev->addr.bus != pci_addr.bus ||
1584                     pci_dev->addr.devid != pci_addr.devid ||
1585                     pci_dev->addr.function != pci_addr.function)
1586                         continue;
1587                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1588                         ibv_list[ret]->name);
1589                 ibv_match[nd++] = ibv_list[ret];
1590         }
1591         ibv_match[nd] = NULL;
1592         if (!nd) {
1593                 /* No device matches, just complain and bail out. */
1594                 DRV_LOG(WARNING,
1595                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1596                         " are kernel drivers loaded?",
1597                         pci_dev->addr.domain, pci_dev->addr.bus,
1598                         pci_dev->addr.devid, pci_dev->addr.function);
1599                 rte_errno = ENOENT;
1600                 ret = -rte_errno;
1601                 goto exit;
1602         }
1603         if (nd == 1) {
1604                 /*
1605                  * Found single matching device may have multiple ports.
1606                  * Each port may be representor, we have to check the port
1607                  * number and check the representors existence.
1608                  */
1609                 if (nl_rdma >= 0)
1610                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1611                 if (!np)
1612                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1613                                          " ports number", ibv_match[0]->name);
1614                 if (bd >= 0 && !np) {
1615                         DRV_LOG(ERR, "can not get ports"
1616                                      " for bonding device");
1617                         rte_errno = ENOENT;
1618                         ret = -rte_errno;
1619                         goto exit;
1620                 }
1621         }
1622 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1623         if (bd >= 0) {
1624                 /*
1625                  * This may happen if there is VF LAG kernel support and
1626                  * application is compiled with older rdma_core library.
1627                  */
1628                 DRV_LOG(ERR,
1629                         "No kernel/verbs support for VF LAG bonding found.");
1630                 rte_errno = ENOTSUP;
1631                 ret = -rte_errno;
1632                 goto exit;
1633         }
1634 #endif
1635         /*
1636          * Now we can determine the maximal
1637          * amount of devices to be spawned.
1638          */
1639         list = mlx5_malloc(MLX5_MEM_ZERO,
1640                            sizeof(struct mlx5_dev_spawn_data) *
1641                            (np ? np : nd),
1642                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1643         if (!list) {
1644                 DRV_LOG(ERR, "spawn data array allocation failure");
1645                 rte_errno = ENOMEM;
1646                 ret = -rte_errno;
1647                 goto exit;
1648         }
1649         if (bd >= 0 || np > 1) {
1650                 /*
1651                  * Single IB device with multiple ports found,
1652                  * it may be E-Switch master device and representors.
1653                  * We have to perform identification through the ports.
1654                  */
1655                 MLX5_ASSERT(nl_rdma >= 0);
1656                 MLX5_ASSERT(ns == 0);
1657                 MLX5_ASSERT(nd == 1);
1658                 MLX5_ASSERT(np);
1659                 for (i = 1; i <= np; ++i) {
1660                         list[ns].max_port = np;
1661                         list[ns].phys_port = i;
1662                         list[ns].phys_dev = ibv_match[0];
1663                         list[ns].eth_dev = NULL;
1664                         list[ns].pci_dev = pci_dev;
1665                         list[ns].pf_bond = bd;
1666                         list[ns].ifindex = mlx5_nl_ifindex
1667                                 (nl_rdma,
1668                                 mlx5_os_get_dev_device_name
1669                                                 (list[ns].phys_dev), i);
1670                         if (!list[ns].ifindex) {
1671                                 /*
1672                                  * No network interface index found for the
1673                                  * specified port, it means there is no
1674                                  * representor on this port. It's OK,
1675                                  * there can be disabled ports, for example
1676                                  * if sriov_numvfs < sriov_totalvfs.
1677                                  */
1678                                 continue;
1679                         }
1680                         ret = -1;
1681                         if (nl_route >= 0)
1682                                 ret = mlx5_nl_switch_info
1683                                                (nl_route,
1684                                                 list[ns].ifindex,
1685                                                 &list[ns].info);
1686                         if (ret || (!list[ns].info.representor &&
1687                                     !list[ns].info.master)) {
1688                                 /*
1689                                  * We failed to recognize representors with
1690                                  * Netlink, let's try to perform the task
1691                                  * with sysfs.
1692                                  */
1693                                 ret =  mlx5_sysfs_switch_info
1694                                                 (list[ns].ifindex,
1695                                                  &list[ns].info);
1696                         }
1697                         if (!ret && bd >= 0) {
1698                                 switch (list[ns].info.name_type) {
1699                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1700                                         if (list[ns].info.port_name == bd)
1701                                                 ns++;
1702                                         break;
1703                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1704                                         /* Fallthrough */
1705                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1706                                         if (list[ns].info.pf_num == bd)
1707                                                 ns++;
1708                                         break;
1709                                 default:
1710                                         break;
1711                                 }
1712                                 continue;
1713                         }
1714                         if (!ret && (list[ns].info.representor ^
1715                                      list[ns].info.master))
1716                                 ns++;
1717                 }
1718                 if (!ns) {
1719                         DRV_LOG(ERR,
1720                                 "unable to recognize master/representors"
1721                                 " on the IB device with multiple ports");
1722                         rte_errno = ENOENT;
1723                         ret = -rte_errno;
1724                         goto exit;
1725                 }
1726         } else {
1727                 /*
1728                  * The existence of several matching entries (nd > 1) means
1729                  * port representors have been instantiated. No existing Verbs
1730                  * call nor sysfs entries can tell them apart, this can only
1731                  * be done through Netlink calls assuming kernel drivers are
1732                  * recent enough to support them.
1733                  *
1734                  * In the event of identification failure through Netlink,
1735                  * try again through sysfs, then:
1736                  *
1737                  * 1. A single IB device matches (nd == 1) with single
1738                  *    port (np=0/1) and is not a representor, assume
1739                  *    no switch support.
1740                  *
1741                  * 2. Otherwise no safe assumptions can be made;
1742                  *    complain louder and bail out.
1743                  */
1744                 for (i = 0; i != nd; ++i) {
1745                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1746                         list[ns].max_port = 1;
1747                         list[ns].phys_port = 1;
1748                         list[ns].phys_dev = ibv_match[i];
1749                         list[ns].eth_dev = NULL;
1750                         list[ns].pci_dev = pci_dev;
1751                         list[ns].pf_bond = -1;
1752                         list[ns].ifindex = 0;
1753                         if (nl_rdma >= 0)
1754                                 list[ns].ifindex = mlx5_nl_ifindex
1755                                 (nl_rdma,
1756                                 mlx5_os_get_dev_device_name
1757                                                 (list[ns].phys_dev), 1);
1758                         if (!list[ns].ifindex) {
1759                                 char ifname[IF_NAMESIZE];
1760
1761                                 /*
1762                                  * Netlink failed, it may happen with old
1763                                  * ib_core kernel driver (before 4.16).
1764                                  * We can assume there is old driver because
1765                                  * here we are processing single ports IB
1766                                  * devices. Let's try sysfs to retrieve
1767                                  * the ifindex. The method works for
1768                                  * master device only.
1769                                  */
1770                                 if (nd > 1) {
1771                                         /*
1772                                          * Multiple devices found, assume
1773                                          * representors, can not distinguish
1774                                          * master/representor and retrieve
1775                                          * ifindex via sysfs.
1776                                          */
1777                                         continue;
1778                                 }
1779                                 ret = mlx5_get_ifname_sysfs
1780                                         (ibv_match[i]->ibdev_path, ifname);
1781                                 if (!ret)
1782                                         list[ns].ifindex =
1783                                                 if_nametoindex(ifname);
1784                                 if (!list[ns].ifindex) {
1785                                         /*
1786                                          * No network interface index found
1787                                          * for the specified device, it means
1788                                          * there it is neither representor
1789                                          * nor master.
1790                                          */
1791                                         continue;
1792                                 }
1793                         }
1794                         ret = -1;
1795                         if (nl_route >= 0)
1796                                 ret = mlx5_nl_switch_info
1797                                                (nl_route,
1798                                                 list[ns].ifindex,
1799                                                 &list[ns].info);
1800                         if (ret || (!list[ns].info.representor &&
1801                                     !list[ns].info.master)) {
1802                                 /*
1803                                  * We failed to recognize representors with
1804                                  * Netlink, let's try to perform the task
1805                                  * with sysfs.
1806                                  */
1807                                 ret =  mlx5_sysfs_switch_info
1808                                                 (list[ns].ifindex,
1809                                                  &list[ns].info);
1810                         }
1811                         if (!ret && (list[ns].info.representor ^
1812                                      list[ns].info.master)) {
1813                                 ns++;
1814                         } else if ((nd == 1) &&
1815                                    !list[ns].info.representor &&
1816                                    !list[ns].info.master) {
1817                                 /*
1818                                  * Single IB device with
1819                                  * one physical port and
1820                                  * attached network device.
1821                                  * May be SRIOV is not enabled
1822                                  * or there is no representors.
1823                                  */
1824                                 DRV_LOG(INFO, "no E-Switch support detected");
1825                                 ns++;
1826                                 break;
1827                         }
1828                 }
1829                 if (!ns) {
1830                         DRV_LOG(ERR,
1831                                 "unable to recognize master/representors"
1832                                 " on the multiple IB devices");
1833                         rte_errno = ENOENT;
1834                         ret = -rte_errno;
1835                         goto exit;
1836                 }
1837         }
1838         MLX5_ASSERT(ns);
1839         /*
1840          * Sort list to probe devices in natural order for users convenience
1841          * (i.e. master first, then representors from lowest to highest ID).
1842          */
1843         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1844         /* Device specific configuration. */
1845         switch (pci_dev->id.device_id) {
1846         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1847         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1848         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1849         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1850         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1851         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1852         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1853                 dev_config_vf = 1;
1854                 break;
1855         default:
1856                 dev_config_vf = 0;
1857                 break;
1858         }
1859         for (i = 0; i != ns; ++i) {
1860                 uint32_t restore;
1861
1862                 /* Default configuration. */
1863                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1864                 dev_config.vf = dev_config_vf;
1865                 dev_config.mps = MLX5_ARG_UNSET;
1866                 dev_config.dbnc = MLX5_ARG_UNSET;
1867                 dev_config.rx_vec_en = 1;
1868                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1869                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1870                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1871                 dev_config.txqs_inline = MLX5_ARG_UNSET;
1872                 dev_config.vf_nl_en = 1;
1873                 dev_config.mr_ext_memseg_en = 1;
1874                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1875                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1876                 dev_config.dv_esw_en = 1;
1877                 dev_config.dv_flow_en = 1;
1878                 dev_config.decap_en = 1;
1879                 dev_config.log_hp_size = MLX5_ARG_UNSET;
1880                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1881                                                  &list[i],
1882                                                  &dev_config);
1883                 if (!list[i].eth_dev) {
1884                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1885                                 break;
1886                         /* Device is disabled or already spawned. Ignore it. */
1887                         continue;
1888                 }
1889                 restore = list[i].eth_dev->data->dev_flags;
1890                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1891                 /* Restore non-PCI flags cleared by the above call. */
1892                 list[i].eth_dev->data->dev_flags |= restore;
1893                 rte_eth_dev_probing_finish(list[i].eth_dev);
1894         }
1895         if (i != ns) {
1896                 DRV_LOG(ERR,
1897                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1898                         " encountering an error: %s",
1899                         pci_dev->addr.domain, pci_dev->addr.bus,
1900                         pci_dev->addr.devid, pci_dev->addr.function,
1901                         strerror(rte_errno));
1902                 ret = -rte_errno;
1903                 /* Roll back. */
1904                 while (i--) {
1905                         if (!list[i].eth_dev)
1906                                 continue;
1907                         mlx5_dev_close(list[i].eth_dev);
1908                         /* mac_addrs must not be freed because in dev_private */
1909                         list[i].eth_dev->data->mac_addrs = NULL;
1910                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1911                 }
1912                 /* Restore original error. */
1913                 rte_errno = -ret;
1914         } else {
1915                 ret = 0;
1916         }
1917 exit:
1918         /*
1919          * Do the routine cleanup:
1920          * - close opened Netlink sockets
1921          * - free allocated spawn data array
1922          * - free the Infiniband device list
1923          */
1924         if (nl_rdma >= 0)
1925                 close(nl_rdma);
1926         if (nl_route >= 0)
1927                 close(nl_route);
1928         if (list)
1929                 mlx5_free(list);
1930         MLX5_ASSERT(ibv_list);
1931         mlx5_glue->free_device_list(ibv_list);
1932         return ret;
1933 }
1934
1935 static int
1936 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1937 {
1938         char *env;
1939         int value;
1940
1941         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1942         /* Get environment variable to store. */
1943         env = getenv(MLX5_SHUT_UP_BF);
1944         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1945         if (config->dbnc == MLX5_ARG_UNSET)
1946                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1947         else
1948                 setenv(MLX5_SHUT_UP_BF,
1949                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1950         return value;
1951 }
1952
1953 static void
1954 mlx5_restore_doorbell_mapping_env(int value)
1955 {
1956         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1957         /* Restore the original environment variable state. */
1958         if (value == MLX5_ARG_UNSET)
1959                 unsetenv(MLX5_SHUT_UP_BF);
1960         else
1961                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1962 }
1963
1964 /**
1965  * Extract pdn of PD object using DV API.
1966  *
1967  * @param[in] pd
1968  *   Pointer to the verbs PD object.
1969  * @param[out] pdn
1970  *   Pointer to the PD object number variable.
1971  *
1972  * @return
1973  *   0 on success, error value otherwise.
1974  */
1975 int
1976 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1977 {
1978 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1979         struct mlx5dv_obj obj;
1980         struct mlx5dv_pd pd_info;
1981         int ret = 0;
1982
1983         obj.pd.in = pd;
1984         obj.pd.out = &pd_info;
1985         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1986         if (ret) {
1987                 DRV_LOG(DEBUG, "Fail to get PD object info");
1988                 return ret;
1989         }
1990         *pdn = pd_info.pdn;
1991         return 0;
1992 #else
1993         (void)pd;
1994         (void)pdn;
1995         return -ENOTSUP;
1996 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
1997 }
1998
1999 /**
2000  * Function API to open IB device.
2001  *
2002  * This function calls the Linux glue APIs to open a device.
2003  *
2004  * @param[in] spawn
2005  *   Pointer to the IB device attributes (name, port, etc).
2006  * @param[out] config
2007  *   Pointer to device configuration structure.
2008  * @param[out] sh
2009  *   Pointer to shared context structure.
2010  *
2011  * @return
2012  *   0 on success, a positive error value otherwise.
2013  */
2014 int
2015 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2016                      const struct mlx5_dev_config *config,
2017                      struct mlx5_dev_ctx_shared *sh)
2018 {
2019         int dbmap_env;
2020         int err = 0;
2021
2022         sh->numa_node = spawn->pci_dev->device.numa_node;
2023         pthread_mutex_init(&sh->txpp.mutex, NULL);
2024         /*
2025          * Configure environment variable "MLX5_BF_SHUT_UP"
2026          * before the device creation. The rdma_core library
2027          * checks the variable at device creation and
2028          * stores the result internally.
2029          */
2030         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2031         /* Try to open IB device with DV first, then usual Verbs. */
2032         errno = 0;
2033         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2034         if (sh->ctx) {
2035                 sh->devx = 1;
2036                 DRV_LOG(DEBUG, "DevX is supported");
2037                 /* The device is created, no need for environment. */
2038                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2039         } else {
2040                 /* The environment variable is still configured. */
2041                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2042                 err = errno ? errno : ENODEV;
2043                 /*
2044                  * The environment variable is not needed anymore,
2045                  * all device creation attempts are completed.
2046                  */
2047                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2048                 if (!sh->ctx)
2049                         return err;
2050                 DRV_LOG(DEBUG, "DevX is NOT supported");
2051                 err = 0;
2052         }
2053         return err;
2054 }
2055
2056 /**
2057  * Install shared asynchronous device events handler.
2058  * This function is implemented to support event sharing
2059  * between multiple ports of single IB device.
2060  *
2061  * @param sh
2062  *   Pointer to mlx5_dev_ctx_shared object.
2063  */
2064 void
2065 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2066 {
2067         int ret;
2068         int flags;
2069
2070         sh->intr_handle.fd = -1;
2071         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2072         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2073                     F_SETFL, flags | O_NONBLOCK);
2074         if (ret) {
2075                 DRV_LOG(INFO, "failed to change file descriptor async event"
2076                         " queue");
2077         } else {
2078                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2079                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2080                 if (rte_intr_callback_register(&sh->intr_handle,
2081                                         mlx5_dev_interrupt_handler, sh)) {
2082                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2083                         sh->intr_handle.fd = -1;
2084                 }
2085         }
2086         if (sh->devx) {
2087 #ifdef HAVE_IBV_DEVX_ASYNC
2088                 sh->intr_handle_devx.fd = -1;
2089                 sh->devx_comp =
2090                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2091                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2092                 if (!devx_comp) {
2093                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2094                         return;
2095                 }
2096                 flags = fcntl(devx_comp->fd, F_GETFL);
2097                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2098                 if (ret) {
2099                         DRV_LOG(INFO, "failed to change file descriptor"
2100                                 " devx comp");
2101                         return;
2102                 }
2103                 sh->intr_handle_devx.fd = devx_comp->fd;
2104                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2105                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2106                                         mlx5_dev_interrupt_handler_devx, sh)) {
2107                         DRV_LOG(INFO, "Fail to install the devx shared"
2108                                 " interrupt.");
2109                         sh->intr_handle_devx.fd = -1;
2110                 }
2111 #endif /* HAVE_IBV_DEVX_ASYNC */
2112         }
2113 }
2114
2115 /**
2116  * Uninstall shared asynchronous device events handler.
2117  * This function is implemented to support event sharing
2118  * between multiple ports of single IB device.
2119  *
2120  * @param dev
2121  *   Pointer to mlx5_dev_ctx_shared object.
2122  */
2123 void
2124 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2125 {
2126         if (sh->intr_handle.fd >= 0)
2127                 mlx5_intr_callback_unregister(&sh->intr_handle,
2128                                               mlx5_dev_interrupt_handler, sh);
2129 #ifdef HAVE_IBV_DEVX_ASYNC
2130         if (sh->intr_handle_devx.fd >= 0)
2131                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2132                                   mlx5_dev_interrupt_handler_devx, sh);
2133         if (sh->devx_comp)
2134                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2135 #endif
2136 }
2137
2138 /**
2139  * Read statistics by a named counter.
2140  *
2141  * @param[in] priv
2142  *   Pointer to the private device data structure.
2143  * @param[in] ctr_name
2144  *   Pointer to the name of the statistic counter to read
2145  * @param[out] stat
2146  *   Pointer to read statistic value.
2147  * @return
2148  *   0 on success and stat is valud, 1 if failed to read the value
2149  *   rte_errno is set.
2150  *
2151  */
2152 int
2153 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2154                       uint64_t *stat)
2155 {
2156         int fd;
2157
2158         if (priv->sh) {
2159                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2160                       priv->sh->ibdev_path,
2161                       priv->dev_port,
2162                       ctr_name);
2163                 fd = open(path, O_RDONLY);
2164                 /*
2165                  * in switchdev the file location is not per port
2166                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2167                  */
2168                 if (fd == -1) {
2169                         MKSTR(path1, "%s/hw_counters/%s",
2170                               priv->sh->ibdev_path,
2171                               ctr_name);
2172                         fd = open(path1, O_RDONLY);
2173                 }
2174                 if (fd != -1) {
2175                         char buf[21] = {'\0'};
2176                         ssize_t n = read(fd, buf, sizeof(buf));
2177
2178                         close(fd);
2179                         if (n != -1) {
2180                                 *stat = strtoull(buf, NULL, 10);
2181                                 return 0;
2182                         }
2183                 }
2184         }
2185         *stat = 0;
2186         return 1;
2187 }
2188
2189 /**
2190  * Set the reg_mr and dereg_mr call backs
2191  *
2192  * @param reg_mr_cb[out]
2193  *   Pointer to reg_mr func
2194  * @param dereg_mr_cb[out]
2195  *   Pointer to dereg_mr func
2196  *
2197  */
2198 void
2199 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2200                       mlx5_dereg_mr_t *dereg_mr_cb)
2201 {
2202         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2203         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2204 }
2205
2206 /**
2207  * Remove a MAC address from device
2208  *
2209  * @param dev
2210  *   Pointer to Ethernet device structure.
2211  * @param index
2212  *   MAC address index.
2213  */
2214 void
2215 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2216 {
2217         struct mlx5_priv *priv = dev->data->dev_private;
2218         const int vf = priv->config.vf;
2219
2220         if (vf)
2221                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2222                                         mlx5_ifindex(dev), priv->mac_own,
2223                                         &dev->data->mac_addrs[index], index);
2224 }
2225
2226 /**
2227  * Adds a MAC address to the device
2228  *
2229  * @param dev
2230  *   Pointer to Ethernet device structure.
2231  * @param mac_addr
2232  *   MAC address to register.
2233  * @param index
2234  *   MAC address index.
2235  *
2236  * @return
2237  *   0 on success, a negative errno value otherwise
2238  */
2239 int
2240 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2241                      uint32_t index)
2242 {
2243         struct mlx5_priv *priv = dev->data->dev_private;
2244         const int vf = priv->config.vf;
2245         int ret = 0;
2246
2247         if (vf)
2248                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2249                                            mlx5_ifindex(dev), priv->mac_own,
2250                                            mac, index);
2251         return ret;
2252 }
2253
2254 /**
2255  * Modify a VF MAC address
2256  *
2257  * @param priv
2258  *   Pointer to device private data.
2259  * @param mac_addr
2260  *   MAC address to modify into.
2261  * @param iface_idx
2262  *   Net device interface index
2263  * @param vf_index
2264  *   VF index
2265  *
2266  * @return
2267  *   0 on success, a negative errno value otherwise
2268  */
2269 int
2270 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2271                            unsigned int iface_idx,
2272                            struct rte_ether_addr *mac_addr,
2273                            int vf_index)
2274 {
2275         return mlx5_nl_vf_mac_addr_modify
2276                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2277 }
2278
2279 /**
2280  * Set device promiscuous mode
2281  *
2282  * @param dev
2283  *   Pointer to Ethernet device structure.
2284  * @param enable
2285  *   0 - promiscuous is disabled, otherwise - enabled
2286  *
2287  * @return
2288  *   0 on success, a negative error value otherwise
2289  */
2290 int
2291 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2292 {
2293         struct mlx5_priv *priv = dev->data->dev_private;
2294
2295         return mlx5_nl_promisc(priv->nl_socket_route,
2296                                mlx5_ifindex(dev), !!enable);
2297 }
2298
2299 /**
2300  * Set device promiscuous mode
2301  *
2302  * @param dev
2303  *   Pointer to Ethernet device structure.
2304  * @param enable
2305  *   0 - all multicase is disabled, otherwise - enabled
2306  *
2307  * @return
2308  *   0 on success, a negative error value otherwise
2309  */
2310 int
2311 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2312 {
2313         struct mlx5_priv *priv = dev->data->dev_private;
2314
2315         return mlx5_nl_allmulti(priv->nl_socket_route,
2316                                 mlx5_ifindex(dev), !!enable);
2317 }
2318
2319 const struct eth_dev_ops mlx5_os_dev_ops = {
2320         .dev_configure = mlx5_dev_configure,
2321         .dev_start = mlx5_dev_start,
2322         .dev_stop = mlx5_dev_stop,
2323         .dev_set_link_down = mlx5_set_link_down,
2324         .dev_set_link_up = mlx5_set_link_up,
2325         .dev_close = mlx5_dev_close,
2326         .promiscuous_enable = mlx5_promiscuous_enable,
2327         .promiscuous_disable = mlx5_promiscuous_disable,
2328         .allmulticast_enable = mlx5_allmulticast_enable,
2329         .allmulticast_disable = mlx5_allmulticast_disable,
2330         .link_update = mlx5_link_update,
2331         .stats_get = mlx5_stats_get,
2332         .stats_reset = mlx5_stats_reset,
2333         .xstats_get = mlx5_xstats_get,
2334         .xstats_reset = mlx5_xstats_reset,
2335         .xstats_get_names = mlx5_xstats_get_names,
2336         .fw_version_get = mlx5_fw_version_get,
2337         .dev_infos_get = mlx5_dev_infos_get,
2338         .read_clock = mlx5_txpp_read_clock,
2339         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2340         .vlan_filter_set = mlx5_vlan_filter_set,
2341         .rx_queue_setup = mlx5_rx_queue_setup,
2342         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2343         .tx_queue_setup = mlx5_tx_queue_setup,
2344         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2345         .rx_queue_release = mlx5_rx_queue_release,
2346         .tx_queue_release = mlx5_tx_queue_release,
2347         .rx_queue_start = mlx5_rx_queue_start,
2348         .rx_queue_stop = mlx5_rx_queue_stop,
2349         .tx_queue_start = mlx5_tx_queue_start,
2350         .tx_queue_stop = mlx5_tx_queue_stop,
2351         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2352         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2353         .mac_addr_remove = mlx5_mac_addr_remove,
2354         .mac_addr_add = mlx5_mac_addr_add,
2355         .mac_addr_set = mlx5_mac_addr_set,
2356         .set_mc_addr_list = mlx5_set_mc_addr_list,
2357         .mtu_set = mlx5_dev_set_mtu,
2358         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2359         .vlan_offload_set = mlx5_vlan_offload_set,
2360         .reta_update = mlx5_dev_rss_reta_update,
2361         .reta_query = mlx5_dev_rss_reta_query,
2362         .rss_hash_update = mlx5_rss_hash_update,
2363         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2364         .filter_ctrl = mlx5_dev_filter_ctrl,
2365         .rx_descriptor_status = mlx5_rx_descriptor_status,
2366         .tx_descriptor_status = mlx5_tx_descriptor_status,
2367         .rxq_info_get = mlx5_rxq_info_get,
2368         .txq_info_get = mlx5_txq_info_get,
2369         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2370         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2371         .rx_queue_count = mlx5_rx_queue_count,
2372         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2373         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2374         .is_removed = mlx5_is_removed,
2375         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2376         .get_module_info = mlx5_get_module_info,
2377         .get_module_eeprom = mlx5_get_module_eeprom,
2378         .hairpin_cap_get = mlx5_hairpin_cap_get,
2379         .mtr_ops_get = mlx5_flow_meter_ops_get,
2380 };
2381
2382 /* Available operations from secondary process. */
2383 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2384         .stats_get = mlx5_stats_get,
2385         .stats_reset = mlx5_stats_reset,
2386         .xstats_get = mlx5_xstats_get,
2387         .xstats_reset = mlx5_xstats_reset,
2388         .xstats_get_names = mlx5_xstats_get_names,
2389         .fw_version_get = mlx5_fw_version_get,
2390         .dev_infos_get = mlx5_dev_infos_get,
2391         .read_clock = mlx5_txpp_read_clock,
2392         .rx_queue_start = mlx5_rx_queue_start,
2393         .rx_queue_stop = mlx5_rx_queue_stop,
2394         .tx_queue_start = mlx5_tx_queue_start,
2395         .tx_queue_stop = mlx5_tx_queue_stop,
2396         .rx_descriptor_status = mlx5_rx_descriptor_status,
2397         .tx_descriptor_status = mlx5_tx_descriptor_status,
2398         .rxq_info_get = mlx5_rxq_info_get,
2399         .txq_info_get = mlx5_txq_info_get,
2400         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2401         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2402         .get_module_info = mlx5_get_module_info,
2403         .get_module_eeprom = mlx5_get_module_eeprom,
2404 };
2405
2406 /* Available operations in flow isolated mode. */
2407 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2408         .dev_configure = mlx5_dev_configure,
2409         .dev_start = mlx5_dev_start,
2410         .dev_stop = mlx5_dev_stop,
2411         .dev_set_link_down = mlx5_set_link_down,
2412         .dev_set_link_up = mlx5_set_link_up,
2413         .dev_close = mlx5_dev_close,
2414         .promiscuous_enable = mlx5_promiscuous_enable,
2415         .promiscuous_disable = mlx5_promiscuous_disable,
2416         .allmulticast_enable = mlx5_allmulticast_enable,
2417         .allmulticast_disable = mlx5_allmulticast_disable,
2418         .link_update = mlx5_link_update,
2419         .stats_get = mlx5_stats_get,
2420         .stats_reset = mlx5_stats_reset,
2421         .xstats_get = mlx5_xstats_get,
2422         .xstats_reset = mlx5_xstats_reset,
2423         .xstats_get_names = mlx5_xstats_get_names,
2424         .fw_version_get = mlx5_fw_version_get,
2425         .dev_infos_get = mlx5_dev_infos_get,
2426         .read_clock = mlx5_txpp_read_clock,
2427         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2428         .vlan_filter_set = mlx5_vlan_filter_set,
2429         .rx_queue_setup = mlx5_rx_queue_setup,
2430         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2431         .tx_queue_setup = mlx5_tx_queue_setup,
2432         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2433         .rx_queue_release = mlx5_rx_queue_release,
2434         .tx_queue_release = mlx5_tx_queue_release,
2435         .rx_queue_start = mlx5_rx_queue_start,
2436         .rx_queue_stop = mlx5_rx_queue_stop,
2437         .tx_queue_start = mlx5_tx_queue_start,
2438         .tx_queue_stop = mlx5_tx_queue_stop,
2439         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2440         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2441         .mac_addr_remove = mlx5_mac_addr_remove,
2442         .mac_addr_add = mlx5_mac_addr_add,
2443         .mac_addr_set = mlx5_mac_addr_set,
2444         .set_mc_addr_list = mlx5_set_mc_addr_list,
2445         .mtu_set = mlx5_dev_set_mtu,
2446         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2447         .vlan_offload_set = mlx5_vlan_offload_set,
2448         .filter_ctrl = mlx5_dev_filter_ctrl,
2449         .rx_descriptor_status = mlx5_rx_descriptor_status,
2450         .tx_descriptor_status = mlx5_tx_descriptor_status,
2451         .rxq_info_get = mlx5_rxq_info_get,
2452         .txq_info_get = mlx5_txq_info_get,
2453         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2454         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2455         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2456         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2457         .is_removed = mlx5_is_removed,
2458         .get_module_info = mlx5_get_module_info,
2459         .get_module_eeprom = mlx5_get_module_eeprom,
2460         .hairpin_cap_get = mlx5_hairpin_cap_get,
2461         .mtr_ops_get = mlx5_flow_meter_ops_get,
2462 };