1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
49 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
51 #ifndef HAVE_IBV_MLX5_MOD_MPW
52 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
53 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
56 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
57 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
60 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
62 /* Spinlock for mlx5_shared_data allocation. */
63 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* Process local data for secondary processes. */
66 static struct mlx5_local_data mlx5_local_data;
69 * Get mlx5 device attributes. The glue function query_device_ex() is called
70 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
71 * device attributes from the glue out parameter.
74 * Pointer to ibv context.
77 * Pointer to mlx5 device attributes.
80 * 0 on success, non zero error number otherwise
83 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
86 struct ibv_device_attr_ex attr_ex;
87 memset(device_attr, 0, sizeof(*device_attr));
88 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
92 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
93 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
94 device_attr->max_sge = attr_ex.orig_attr.max_sge;
95 device_attr->max_cq = attr_ex.orig_attr.max_cq;
96 device_attr->max_qp = attr_ex.orig_attr.max_qp;
97 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
98 device_attr->max_rwq_indirection_table_size =
99 attr_ex.rss_caps.max_rwq_indirection_table_size;
100 device_attr->max_tso = attr_ex.tso_caps.max_tso;
101 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
103 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
104 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
108 device_attr->flags = dv_attr.flags;
109 device_attr->comp_mask = dv_attr.comp_mask;
110 #ifdef HAVE_IBV_MLX5_MOD_SWP
111 device_attr->sw_parsing_offloads =
112 dv_attr.sw_parsing_caps.sw_parsing_offloads;
114 device_attr->min_single_stride_log_num_of_bytes =
115 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
116 device_attr->max_single_stride_log_num_of_bytes =
117 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
118 device_attr->min_single_wqe_log_num_of_strides =
119 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
120 device_attr->max_single_wqe_log_num_of_strides =
121 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
122 device_attr->stride_supported_qpts =
123 dv_attr.striding_rq_caps.supported_qpts;
124 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
125 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
132 * Verbs callback to allocate a memory. This function should allocate the space
133 * according to the size provided residing inside a huge page.
134 * Please note that all allocation must respect the alignment from libmlx5
135 * (i.e. currently rte_mem_page_size()).
138 * The size in bytes of the memory to allocate.
140 * A pointer to the callback data.
143 * Allocated buffer, NULL otherwise and rte_errno is set.
146 mlx5_alloc_verbs_buf(size_t size, void *data)
148 struct mlx5_priv *priv = data;
150 unsigned int socket = SOCKET_ID_ANY;
151 size_t alignment = rte_mem_page_size();
152 if (alignment == (size_t)-1) {
153 DRV_LOG(ERR, "Failed to get mem page size");
158 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
159 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
161 socket = ctrl->socket;
162 } else if (priv->verbs_alloc_ctx.type ==
163 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
164 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
166 socket = ctrl->socket;
168 MLX5_ASSERT(data != NULL);
169 ret = mlx5_malloc(0, size, alignment, socket);
176 * Verbs callback to free a memory.
179 * A pointer to the memory to free.
181 * A pointer to the callback data.
184 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
186 MLX5_ASSERT(data != NULL);
191 * Initialize DR related data within private structure.
192 * Routine checks the reference counter and does actual
193 * resources creation/initialization only if counter is zero.
196 * Pointer to the private device data structure.
199 * Zero on success, positive error code otherwise.
202 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
204 struct mlx5_dev_ctx_shared *sh = priv->sh;
205 char s[MLX5_HLIST_NAMESIZE];
209 err = mlx5_alloc_table_hash_list(priv);
211 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
212 (void *)sh->flow_tbls);
215 /* Create tags hash list table. */
216 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
217 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
218 if (!sh->tag_table) {
219 DRV_LOG(ERR, "tags with hash creation failed.");
223 #ifdef HAVE_MLX5DV_DR
227 /* Shared DV/DR structures is already initialized. */
232 /* Reference counter is zero, we should initialize structures. */
233 domain = mlx5_glue->dr_create_domain(sh->ctx,
234 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
236 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
240 sh->rx_domain = domain;
241 domain = mlx5_glue->dr_create_domain(sh->ctx,
242 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
244 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
248 pthread_mutex_init(&sh->dv_mutex, NULL);
249 sh->tx_domain = domain;
250 #ifdef HAVE_MLX5DV_DR_ESWITCH
251 if (priv->config.dv_esw_en) {
252 domain = mlx5_glue->dr_create_domain
253 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
255 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
259 sh->fdb_domain = domain;
260 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
263 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
264 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
265 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
267 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
269 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
270 #endif /* HAVE_MLX5DV_DR */
275 /* Rollback the created objects. */
277 mlx5_glue->dr_destroy_domain(sh->rx_domain);
278 sh->rx_domain = NULL;
281 mlx5_glue->dr_destroy_domain(sh->tx_domain);
282 sh->tx_domain = NULL;
284 if (sh->fdb_domain) {
285 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
286 sh->fdb_domain = NULL;
288 if (sh->esw_drop_action) {
289 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
290 sh->esw_drop_action = NULL;
292 if (sh->pop_vlan_action) {
293 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
294 sh->pop_vlan_action = NULL;
297 /* tags should be destroyed with flow before. */
298 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
299 sh->tag_table = NULL;
301 mlx5_free_table_hash_list(priv);
306 * Destroy DR related data within private structure.
309 * Pointer to the private device data structure.
312 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
314 struct mlx5_dev_ctx_shared *sh;
316 if (!priv->dr_shared)
321 #ifdef HAVE_MLX5DV_DR
322 MLX5_ASSERT(sh->dv_refcnt);
323 if (sh->dv_refcnt && --sh->dv_refcnt)
326 mlx5_glue->dr_destroy_domain(sh->rx_domain);
327 sh->rx_domain = NULL;
330 mlx5_glue->dr_destroy_domain(sh->tx_domain);
331 sh->tx_domain = NULL;
333 #ifdef HAVE_MLX5DV_DR_ESWITCH
334 if (sh->fdb_domain) {
335 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
336 sh->fdb_domain = NULL;
338 if (sh->esw_drop_action) {
339 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
340 sh->esw_drop_action = NULL;
343 if (sh->pop_vlan_action) {
344 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
345 sh->pop_vlan_action = NULL;
347 pthread_mutex_destroy(&sh->dv_mutex);
348 #endif /* HAVE_MLX5DV_DR */
350 /* tags should be destroyed with flow before. */
351 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
352 sh->tag_table = NULL;
354 mlx5_free_table_hash_list(priv);
358 * Initialize shared data between primary and secondary process.
360 * A memzone is reserved by primary process and secondary processes attach to
364 * 0 on success, a negative errno value otherwise and rte_errno is set.
367 mlx5_init_shared_data(void)
369 const struct rte_memzone *mz;
372 rte_spinlock_lock(&mlx5_shared_data_lock);
373 if (mlx5_shared_data == NULL) {
374 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
375 /* Allocate shared memory. */
376 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
377 sizeof(*mlx5_shared_data),
381 "Cannot allocate mlx5 shared data");
385 mlx5_shared_data = mz->addr;
386 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
387 rte_spinlock_init(&mlx5_shared_data->lock);
389 /* Lookup allocated shared memory. */
390 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
393 "Cannot attach mlx5 shared data");
397 mlx5_shared_data = mz->addr;
398 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
402 rte_spinlock_unlock(&mlx5_shared_data_lock);
407 * PMD global initialization.
409 * Independent from individual device, this function initializes global
410 * per-PMD data structures distinguishing primary and secondary processes.
411 * Hence, each initialization is called once per a process.
414 * 0 on success, a negative errno value otherwise and rte_errno is set.
419 struct mlx5_shared_data *sd;
420 struct mlx5_local_data *ld = &mlx5_local_data;
423 if (mlx5_init_shared_data())
425 sd = mlx5_shared_data;
427 rte_spinlock_lock(&sd->lock);
428 switch (rte_eal_process_type()) {
429 case RTE_PROC_PRIMARY:
432 LIST_INIT(&sd->mem_event_cb_list);
433 rte_rwlock_init(&sd->mem_event_rwlock);
434 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
435 mlx5_mr_mem_event_cb, NULL);
436 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
437 mlx5_mp_os_primary_handle);
440 sd->init_done = true;
442 case RTE_PROC_SECONDARY:
445 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
446 mlx5_mp_os_secondary_handle);
450 ld->init_done = true;
456 rte_spinlock_unlock(&sd->lock);
461 * Spawn an Ethernet device from Verbs information.
464 * Backing DPDK device.
466 * Verbs device parameters (name, port, switch_info) to spawn.
468 * Device configuration parameters.
471 * A valid Ethernet device object on success, NULL otherwise and rte_errno
472 * is set. The following errors are defined:
474 * EBUSY: device is not supposed to be spawned.
475 * EEXIST: device is already spawned
477 static struct rte_eth_dev *
478 mlx5_dev_spawn(struct rte_device *dpdk_dev,
479 struct mlx5_dev_spawn_data *spawn,
480 struct mlx5_dev_config config)
482 const struct mlx5_switch_info *switch_info = &spawn->info;
483 struct mlx5_dev_ctx_shared *sh = NULL;
484 struct ibv_port_attr port_attr;
485 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
486 struct rte_eth_dev *eth_dev = NULL;
487 struct mlx5_priv *priv = NULL;
489 unsigned int hw_padding = 0;
491 unsigned int cqe_comp;
492 unsigned int cqe_pad = 0;
493 unsigned int tunnel_en = 0;
494 unsigned int mpls_en = 0;
495 unsigned int swp = 0;
496 unsigned int mprq = 0;
497 unsigned int mprq_min_stride_size_n = 0;
498 unsigned int mprq_max_stride_size_n = 0;
499 unsigned int mprq_min_stride_num_n = 0;
500 unsigned int mprq_max_stride_num_n = 0;
501 struct rte_ether_addr mac;
502 char name[RTE_ETH_NAME_MAX_LEN];
503 int own_domain_id = 0;
506 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
507 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
510 /* Determine if this port representor is supposed to be spawned. */
511 if (switch_info->representor && dpdk_dev->devargs) {
512 struct rte_eth_devargs eth_da;
514 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
517 DRV_LOG(ERR, "failed to process device arguments: %s",
518 strerror(rte_errno));
521 for (i = 0; i < eth_da.nb_representor_ports; ++i)
522 if (eth_da.representor_ports[i] ==
523 (uint16_t)switch_info->port_name)
525 if (i == eth_da.nb_representor_ports) {
530 /* Build device name. */
531 if (spawn->pf_bond < 0) {
533 if (!switch_info->representor)
534 strlcpy(name, dpdk_dev->name, sizeof(name));
536 snprintf(name, sizeof(name), "%s_representor_%u",
537 dpdk_dev->name, switch_info->port_name);
539 /* Bonding device. */
540 if (!switch_info->representor)
541 snprintf(name, sizeof(name), "%s_%s",
543 mlx5_os_get_dev_device_name(spawn->phys_dev));
545 snprintf(name, sizeof(name), "%s_%s_representor_%u",
547 mlx5_os_get_dev_device_name(spawn->phys_dev),
548 switch_info->port_name);
550 /* check if the device is already spawned */
551 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
555 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
556 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
557 struct mlx5_mp_id mp_id;
559 eth_dev = rte_eth_dev_attach_secondary(name);
560 if (eth_dev == NULL) {
561 DRV_LOG(ERR, "can not attach rte ethdev");
565 eth_dev->device = dpdk_dev;
566 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
567 err = mlx5_proc_priv_init(eth_dev);
570 mp_id.port_id = eth_dev->data->port_id;
571 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
572 /* Receive command fd from primary process */
573 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
576 /* Remap UAR for Tx queues. */
577 err = mlx5_tx_uar_init_secondary(eth_dev, err);
581 * Ethdev pointer is still required as input since
582 * the primary device is not accessible from the
585 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
586 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
589 mlx5_dev_close(eth_dev);
593 * Some parameters ("tx_db_nc" in particularly) are needed in
594 * advance to create dv/verbs device context. We proceed the
595 * devargs here to get ones, and later proceed devargs again
596 * to override some hardware settings.
598 err = mlx5_args(&config, dpdk_dev->devargs);
601 DRV_LOG(ERR, "failed to process device arguments: %s",
602 strerror(rte_errno));
605 mlx5_malloc_mem_select(config.sys_mem_en);
606 sh = mlx5_alloc_shared_dev_ctx(spawn, &config);
609 config.devx = sh->devx;
610 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
613 #ifdef HAVE_IBV_MLX5_MOD_SWP
614 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
617 * Multi-packet send is supported by ConnectX-4 Lx PF as well
618 * as all ConnectX-5 devices.
620 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
621 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
623 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
624 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
626 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
627 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
628 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
629 DRV_LOG(DEBUG, "enhanced MPW is supported");
630 mps = MLX5_MPW_ENHANCED;
632 DRV_LOG(DEBUG, "MPW is supported");
636 DRV_LOG(DEBUG, "MPW isn't supported");
637 mps = MLX5_MPW_DISABLED;
639 #ifdef HAVE_IBV_MLX5_MOD_SWP
640 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
641 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
642 DRV_LOG(DEBUG, "SWP support: %u", swp);
645 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
646 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
647 struct mlx5dv_striding_rq_caps mprq_caps =
648 dv_attr.striding_rq_caps;
650 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
651 mprq_caps.min_single_stride_log_num_of_bytes);
652 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
653 mprq_caps.max_single_stride_log_num_of_bytes);
654 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
655 mprq_caps.min_single_wqe_log_num_of_strides);
656 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
657 mprq_caps.max_single_wqe_log_num_of_strides);
658 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
659 mprq_caps.supported_qpts);
660 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
662 mprq_min_stride_size_n =
663 mprq_caps.min_single_stride_log_num_of_bytes;
664 mprq_max_stride_size_n =
665 mprq_caps.max_single_stride_log_num_of_bytes;
666 mprq_min_stride_num_n =
667 mprq_caps.min_single_wqe_log_num_of_strides;
668 mprq_max_stride_num_n =
669 mprq_caps.max_single_wqe_log_num_of_strides;
672 if (RTE_CACHE_LINE_SIZE == 128 &&
673 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
677 config.cqe_comp = cqe_comp;
678 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
679 /* Whether device supports 128B Rx CQE padding. */
680 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
681 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
683 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
684 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
685 tunnel_en = ((dv_attr.tunnel_offloads_caps &
686 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
687 (dv_attr.tunnel_offloads_caps &
688 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
689 (dv_attr.tunnel_offloads_caps &
690 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
692 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
693 tunnel_en ? "" : "not ");
696 "tunnel offloading disabled due to old OFED/rdma-core version");
698 config.tunnel_en = tunnel_en;
699 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
700 mpls_en = ((dv_attr.tunnel_offloads_caps &
701 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
702 (dv_attr.tunnel_offloads_caps &
703 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
704 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
705 mpls_en ? "" : "not ");
707 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
708 " old OFED/rdma-core version or firmware configuration");
710 config.mpls_en = mpls_en;
711 /* Check port status. */
712 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
714 DRV_LOG(ERR, "port query failed: %s", strerror(err));
717 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
718 DRV_LOG(ERR, "port is not configured in Ethernet mode");
722 if (port_attr.state != IBV_PORT_ACTIVE)
723 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
724 mlx5_glue->port_state_str(port_attr.state),
726 /* Allocate private eth device data. */
727 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
729 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
731 DRV_LOG(ERR, "priv allocation failure");
736 priv->dev_port = spawn->phys_port;
737 priv->pci_dev = spawn->pci_dev;
738 priv->mtu = RTE_ETHER_MTU;
739 priv->mp_id.port_id = port_id;
740 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
741 /* Some internal functions rely on Netlink sockets, open them now. */
742 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
743 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
744 priv->representor = !!switch_info->representor;
745 priv->master = !!switch_info->master;
746 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
747 priv->vport_meta_tag = 0;
748 priv->vport_meta_mask = 0;
749 priv->pf_bond = spawn->pf_bond;
750 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
752 * The DevX port query API is implemented. E-Switch may use
753 * either vport or reg_c[0] metadata register to match on
754 * vport index. The engaged part of metadata register is
757 if (switch_info->representor || switch_info->master) {
758 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
759 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
760 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
764 "can't query devx port %d on device %s",
766 mlx5_os_get_dev_device_name(spawn->phys_dev));
767 devx_port.comp_mask = 0;
770 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
771 priv->vport_meta_tag = devx_port.reg_c_0.value;
772 priv->vport_meta_mask = devx_port.reg_c_0.mask;
773 if (!priv->vport_meta_mask) {
774 DRV_LOG(ERR, "vport zero mask for port %d"
775 " on bonding device %s",
777 mlx5_os_get_dev_device_name
782 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
783 DRV_LOG(ERR, "invalid vport tag for port %d"
784 " on bonding device %s",
786 mlx5_os_get_dev_device_name
792 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
793 priv->vport_id = devx_port.vport_num;
794 } else if (spawn->pf_bond >= 0) {
795 DRV_LOG(ERR, "can't deduce vport index for port %d"
796 " on bonding device %s",
798 mlx5_os_get_dev_device_name(spawn->phys_dev));
802 /* Suppose vport index in compatible way. */
803 priv->vport_id = switch_info->representor ?
804 switch_info->port_name + 1 : -1;
808 * Kernel/rdma_core support single E-Switch per PF configurations
809 * only and vport_id field contains the vport index for
810 * associated VF, which is deduced from representor port name.
811 * For example, let's have the IB device port 10, it has
812 * attached network device eth0, which has port name attribute
813 * pf0vf2, we can deduce the VF number as 2, and set vport index
814 * as 3 (2+1). This assigning schema should be changed if the
815 * multiple E-Switch instances per PF configurations or/and PCI
816 * subfunctions are added.
818 priv->vport_id = switch_info->representor ?
819 switch_info->port_name + 1 : -1;
821 /* representor_id field keeps the unmodified VF index. */
822 priv->representor_id = switch_info->representor ?
823 switch_info->port_name : -1;
825 * Look for sibling devices in order to reuse their switch domain
826 * if any, otherwise allocate one.
828 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
829 const struct mlx5_priv *opriv =
830 rte_eth_devices[port_id].data->dev_private;
833 opriv->sh != priv->sh ||
835 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
837 priv->domain_id = opriv->domain_id;
840 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
841 err = rte_eth_switch_domain_alloc(&priv->domain_id);
844 DRV_LOG(ERR, "unable to allocate switch domain: %s",
845 strerror(rte_errno));
850 /* Override some values set by hardware configuration. */
851 mlx5_args(&config, dpdk_dev->devargs);
852 err = mlx5_dev_check_sibling_config(priv, &config);
855 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
856 IBV_DEVICE_RAW_IP_CSUM);
857 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
858 (config.hw_csum ? "" : "not "));
859 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
860 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
861 DRV_LOG(DEBUG, "counters are not supported");
863 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
864 if (config.dv_flow_en) {
865 DRV_LOG(WARNING, "DV flow is not supported");
866 config.dv_flow_en = 0;
869 config.ind_table_max_size =
870 sh->device_attr.max_rwq_indirection_table_size;
872 * Remove this check once DPDK supports larger/variable
873 * indirection tables.
875 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
876 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
877 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
878 config.ind_table_max_size);
879 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
880 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
881 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
882 (config.hw_vlan_strip ? "" : "not "));
883 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
884 IBV_RAW_PACKET_CAP_SCATTER_FCS);
885 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
886 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
887 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
888 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
889 IBV_DEVICE_PCI_WRITE_END_PADDING);
891 if (config.hw_padding && !hw_padding) {
892 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
893 config.hw_padding = 0;
894 } else if (config.hw_padding) {
895 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
897 config.tso = (sh->device_attr.max_tso > 0 &&
898 (sh->device_attr.tso_supported_qpts &
899 (1 << IBV_QPT_RAW_PACKET)));
901 config.tso_max_payload_sz = sh->device_attr.max_tso;
903 * MPW is disabled by default, while the Enhanced MPW is enabled
906 if (config.mps == MLX5_ARG_UNSET)
907 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
910 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
911 DRV_LOG(INFO, "%sMPS is %s",
912 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
913 config.mps == MLX5_MPW ? "legacy " : "",
914 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
915 if (config.cqe_comp && !cqe_comp) {
916 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
919 if (config.cqe_pad && !cqe_pad) {
920 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
922 } else if (config.cqe_pad) {
923 DRV_LOG(INFO, "Rx CQE padding is enabled");
926 priv->counter_fallback = 0;
927 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
932 if (!config.hca_attr.flow_counters_dump)
933 priv->counter_fallback = 1;
934 #ifndef HAVE_IBV_DEVX_ASYNC
935 priv->counter_fallback = 1;
937 if (priv->counter_fallback)
938 DRV_LOG(INFO, "Use fall-back DV counter management");
939 /* Check for LRO support. */
940 if (config.dest_tir && config.hca_attr.lro_cap &&
942 /* TBD check tunnel lro caps. */
943 config.lro.supported = config.hca_attr.lro_cap;
944 DRV_LOG(DEBUG, "Device supports LRO");
946 * If LRO timeout is not configured by application,
947 * use the minimal supported value.
949 if (!config.lro.timeout)
951 config.hca_attr.lro_timer_supported_periods[0];
952 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
955 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
956 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
959 config.hca_attr.qos.flow_meter_reg_c_ids;
961 * Meter needs two REG_C's for color match and pre-sfx
962 * flow match. Here get the REG_C for color match.
963 * REG_C_0 and REG_C_1 is reserved for metadata feature.
966 if (__builtin_popcount(reg_c_mask) < 1) {
968 DRV_LOG(WARNING, "No available register for"
971 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
974 priv->mtr_reg_share =
975 config.hca_attr.qos.flow_meter_reg_share;
976 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
977 priv->mtr_color_reg);
983 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
984 config.hca_attr.dev_freq_khz);
985 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
986 config.hca_attr.qos.packet_pacing ? "" : "not ");
987 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
988 config.hca_attr.cross_channel ? "" : "not ");
989 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
990 config.hca_attr.wqe_index_ignore ? "" : "not ");
991 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
992 config.hca_attr.non_wire_sq ? "" : "not ");
993 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
994 config.hca_attr.log_max_static_sq_wq ? "" : "not ",
995 config.hca_attr.log_max_static_sq_wq);
996 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
997 config.hca_attr.qos.wqe_rate_pp ? "" : "not ");
999 DRV_LOG(ERR, "DevX is required for packet pacing");
1003 if (!config.hca_attr.qos.packet_pacing) {
1004 DRV_LOG(ERR, "Packet pacing is not supported");
1008 if (!config.hca_attr.cross_channel) {
1009 DRV_LOG(ERR, "Cross channel operations are"
1010 " required for packet pacing");
1014 if (!config.hca_attr.wqe_index_ignore) {
1015 DRV_LOG(ERR, "WQE index ignore feature is"
1016 " required for packet pacing");
1020 if (!config.hca_attr.non_wire_sq) {
1021 DRV_LOG(ERR, "Non-wire SQ feature is"
1022 " required for packet pacing");
1026 if (!config.hca_attr.log_max_static_sq_wq) {
1027 DRV_LOG(ERR, "Static WQE SQ feature is"
1028 " required for packet pacing");
1032 if (!config.hca_attr.qos.wqe_rate_pp) {
1033 DRV_LOG(ERR, "WQE rate mode is required"
1034 " for packet pacing");
1038 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1039 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1040 " can't create queues for packet pacing");
1046 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1048 err = mlx5_devx_cmd_register_read
1049 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1050 reg, MLX5_ST_SZ_DW(register_mtutc));
1054 /* MTUTC register is read successfully. */
1055 ts_mode = MLX5_GET(register_mtutc, reg,
1057 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1058 config.rt_timestamp = 1;
1060 /* Kernel does not support register reading. */
1061 if (config.hca_attr.dev_freq_khz ==
1062 (NS_PER_S / MS_PER_S))
1063 config.rt_timestamp = 1;
1067 * If HW has bug working with tunnel packet decapsulation and
1068 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1069 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1071 if (config.hca_attr.scatter_fcs_w_decap_disable && config.decap_en)
1072 config.hw_fcs_strip = 0;
1073 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1074 (config.hw_fcs_strip ? "" : "not "));
1075 if (config.mprq.enabled && mprq) {
1076 if (config.mprq.stride_num_n &&
1077 (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1078 config.mprq.stride_num_n < mprq_min_stride_num_n)) {
1079 config.mprq.stride_num_n =
1080 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1081 mprq_min_stride_num_n),
1082 mprq_max_stride_num_n);
1084 "the number of strides"
1085 " for Multi-Packet RQ is out of range,"
1086 " setting default value (%u)",
1087 1 << config.mprq.stride_num_n);
1089 if (config.mprq.stride_size_n &&
1090 (config.mprq.stride_size_n > mprq_max_stride_size_n ||
1091 config.mprq.stride_size_n < mprq_min_stride_size_n)) {
1092 config.mprq.stride_size_n =
1093 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1094 mprq_min_stride_size_n),
1095 mprq_max_stride_size_n);
1097 "the size of a stride"
1098 " for Multi-Packet RQ is out of range,"
1099 " setting default value (%u)",
1100 1 << config.mprq.stride_size_n);
1102 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1103 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1104 } else if (config.mprq.enabled && !mprq) {
1105 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1106 config.mprq.enabled = 0;
1108 if (config.max_dump_files_num == 0)
1109 config.max_dump_files_num = 128;
1110 eth_dev = rte_eth_dev_allocate(name);
1111 if (eth_dev == NULL) {
1112 DRV_LOG(ERR, "can not allocate rte ethdev");
1116 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1117 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1118 if (priv->representor) {
1119 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1120 eth_dev->data->representor_id = priv->representor_id;
1123 * Store associated network device interface index. This index
1124 * is permanent throughout the lifetime of device. So, we may store
1125 * the ifindex here and use the cached value further.
1127 MLX5_ASSERT(spawn->ifindex);
1128 priv->if_index = spawn->ifindex;
1129 eth_dev->data->dev_private = priv;
1130 priv->dev_data = eth_dev->data;
1131 eth_dev->data->mac_addrs = priv->mac;
1132 eth_dev->device = dpdk_dev;
1133 /* Configure the first MAC address by default. */
1134 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1136 "port %u cannot get MAC address, is mlx5_en"
1137 " loaded? (errno: %s)",
1138 eth_dev->data->port_id, strerror(rte_errno));
1143 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1144 eth_dev->data->port_id,
1145 mac.addr_bytes[0], mac.addr_bytes[1],
1146 mac.addr_bytes[2], mac.addr_bytes[3],
1147 mac.addr_bytes[4], mac.addr_bytes[5]);
1148 #ifdef RTE_LIBRTE_MLX5_DEBUG
1150 char ifname[IF_NAMESIZE];
1152 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1153 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1154 eth_dev->data->port_id, ifname);
1156 DRV_LOG(DEBUG, "port %u ifname is unknown",
1157 eth_dev->data->port_id);
1160 /* Get actual MTU if possible. */
1161 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1166 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1168 /* Initialize burst functions to prevent crashes before link-up. */
1169 eth_dev->rx_pkt_burst = removed_rx_burst;
1170 eth_dev->tx_pkt_burst = removed_tx_burst;
1171 eth_dev->dev_ops = &mlx5_os_dev_ops;
1172 /* Register MAC address. */
1173 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1174 if (config.vf && config.vf_nl_en)
1175 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1176 mlx5_ifindex(eth_dev),
1177 eth_dev->data->mac_addrs,
1178 MLX5_MAX_MAC_ADDRESSES);
1180 priv->ctrl_flows = 0;
1181 TAILQ_INIT(&priv->flow_meters);
1182 TAILQ_INIT(&priv->flow_meter_profiles);
1183 /* Hint libmlx5 to use PMD allocator for data plane resources */
1184 mlx5_glue->dv_set_context_attr(sh->ctx,
1185 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1186 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1187 .alloc = &mlx5_alloc_verbs_buf,
1188 .free = &mlx5_free_verbs_buf,
1191 /* Bring Ethernet device up. */
1192 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1193 eth_dev->data->port_id);
1194 mlx5_set_link_up(eth_dev);
1196 * Even though the interrupt handler is not installed yet,
1197 * interrupts will still trigger on the async_fd from
1198 * Verbs context returned by ibv_open_device().
1200 mlx5_link_update(eth_dev, 0);
1201 #ifdef HAVE_MLX5DV_DR_ESWITCH
1202 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1203 (switch_info->representor || switch_info->master)))
1204 config.dv_esw_en = 0;
1206 config.dv_esw_en = 0;
1208 /* Detect minimal data bytes to inline. */
1209 mlx5_set_min_inline(spawn, &config);
1210 /* Store device configuration on private structure. */
1211 priv->config = config;
1212 /* Create context for virtual machine VLAN workaround. */
1213 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1214 if (config.dv_flow_en) {
1215 err = mlx5_alloc_shared_dr(priv);
1219 * RSS id is shared with meter flow id. Meter flow id can only
1220 * use the 24 MSB of the register.
1222 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1223 MLX5_MTR_COLOR_BITS);
1224 if (!priv->qrss_id_pool) {
1225 DRV_LOG(ERR, "can't create flow id pool");
1230 /* Supported Verbs flow priority number detection. */
1231 err = mlx5_flow_discover_priorities(eth_dev);
1236 priv->config.flow_prio = err;
1237 if (!priv->config.dv_esw_en &&
1238 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1239 DRV_LOG(WARNING, "metadata mode %u is not supported "
1240 "(no E-Switch)", priv->config.dv_xmeta_en);
1241 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1243 mlx5_set_metadata_mask(eth_dev);
1244 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1245 !priv->sh->dv_regc0_mask) {
1246 DRV_LOG(ERR, "metadata mode %u is not supported "
1247 "(no metadata reg_c[0] is available)",
1248 priv->config.dv_xmeta_en);
1253 * Allocate the buffer for flow creating, just once.
1254 * The allocation must be done before any flow creating.
1256 mlx5_flow_alloc_intermediate(eth_dev);
1257 /* Query availability of metadata reg_c's. */
1258 err = mlx5_flow_discover_mreg_c(eth_dev);
1263 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1265 "port %u extensive metadata register is not supported",
1266 eth_dev->data->port_id);
1267 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1268 DRV_LOG(ERR, "metadata mode %u is not supported "
1269 "(no metadata registers available)",
1270 priv->config.dv_xmeta_en);
1275 if (priv->config.dv_flow_en &&
1276 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1277 mlx5_flow_ext_mreg_supported(eth_dev) &&
1278 priv->sh->dv_regc0_mask) {
1279 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1280 MLX5_FLOW_MREG_HTABLE_SZ);
1281 if (!priv->mreg_cp_tbl) {
1289 if (priv->mreg_cp_tbl)
1290 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1292 mlx5_os_free_shared_dr(priv);
1293 if (priv->nl_socket_route >= 0)
1294 close(priv->nl_socket_route);
1295 if (priv->nl_socket_rdma >= 0)
1296 close(priv->nl_socket_rdma);
1297 if (priv->vmwa_context)
1298 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1299 if (priv->qrss_id_pool)
1300 mlx5_flow_id_pool_release(priv->qrss_id_pool);
1302 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1304 if (eth_dev != NULL)
1305 eth_dev->data->dev_private = NULL;
1307 if (eth_dev != NULL) {
1308 /* mac_addrs must not be freed alone because part of
1311 eth_dev->data->mac_addrs = NULL;
1312 rte_eth_dev_release_port(eth_dev);
1315 mlx5_free_shared_dev_ctx(sh);
1316 MLX5_ASSERT(err > 0);
1322 * Comparison callback to sort device data.
1324 * This is meant to be used with qsort().
1327 * Pointer to pointer to first data object.
1329 * Pointer to pointer to second data object.
1332 * 0 if both objects are equal, less than 0 if the first argument is less
1333 * than the second, greater than 0 otherwise.
1336 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1338 const struct mlx5_switch_info *si_a =
1339 &((const struct mlx5_dev_spawn_data *)a)->info;
1340 const struct mlx5_switch_info *si_b =
1341 &((const struct mlx5_dev_spawn_data *)b)->info;
1344 /* Master device first. */
1345 ret = si_b->master - si_a->master;
1348 /* Then representor devices. */
1349 ret = si_b->representor - si_a->representor;
1352 /* Unidentified devices come last in no specific order. */
1353 if (!si_a->representor)
1355 /* Order representors by name. */
1356 return si_a->port_name - si_b->port_name;
1360 * Match PCI information for possible slaves of bonding device.
1362 * @param[in] ibv_dev
1363 * Pointer to Infiniband device structure.
1364 * @param[in] pci_dev
1365 * Pointer to PCI device structure to match PCI address.
1366 * @param[in] nl_rdma
1367 * Netlink RDMA group socket handle.
1370 * negative value if no bonding device found, otherwise
1371 * positive index of slave PF in bonding.
1374 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1375 const struct rte_pci_device *pci_dev,
1378 char ifname[IF_NAMESIZE + 1];
1379 unsigned int ifindex;
1385 * Try to get master device name. If something goes
1386 * wrong suppose the lack of kernel support and no
1391 if (!strstr(ibv_dev->name, "bond"))
1393 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1397 * The Master device might not be on the predefined
1398 * port (not on port index 1, it is not garanted),
1399 * we have to scan all Infiniband device port and
1402 for (i = 1; i <= np; ++i) {
1403 /* Check whether Infiniband port is populated. */
1404 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1407 if (!if_indextoname(ifindex, ifname))
1409 /* Try to read bonding slave names from sysfs. */
1411 "/sys/class/net/%s/master/bonding/slaves", ifname);
1412 file = fopen(slaves, "r");
1418 /* Use safe format to check maximal buffer length. */
1419 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1420 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1421 char tmp_str[IF_NAMESIZE + 32];
1422 struct rte_pci_addr pci_addr;
1423 struct mlx5_switch_info info;
1425 /* Process slave interface names in the loop. */
1426 snprintf(tmp_str, sizeof(tmp_str),
1427 "/sys/class/net/%s", ifname);
1428 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1429 DRV_LOG(WARNING, "can not get PCI address"
1430 " for netdev \"%s\"", ifname);
1433 if (pci_dev->addr.domain != pci_addr.domain ||
1434 pci_dev->addr.bus != pci_addr.bus ||
1435 pci_dev->addr.devid != pci_addr.devid ||
1436 pci_dev->addr.function != pci_addr.function)
1438 /* Slave interface PCI address match found. */
1440 snprintf(tmp_str, sizeof(tmp_str),
1441 "/sys/class/net/%s/phys_port_name", ifname);
1442 file = fopen(tmp_str, "rb");
1445 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1446 if (fscanf(file, "%32s", tmp_str) == 1)
1447 mlx5_translate_port_name(tmp_str, &info);
1448 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1449 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1450 pf = info.port_name;
1459 * DPDK callback to register a PCI device.
1461 * This function spawns Ethernet devices out of a given PCI device.
1463 * @param[in] pci_drv
1464 * PCI driver structure (mlx5_driver).
1465 * @param[in] pci_dev
1466 * PCI device information.
1469 * 0 on success, a negative errno value otherwise and rte_errno is set.
1472 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1473 struct rte_pci_device *pci_dev)
1475 struct ibv_device **ibv_list;
1477 * Number of found IB Devices matching with requested PCI BDF.
1478 * nd != 1 means there are multiple IB devices over the same
1479 * PCI device and we have representors and master.
1481 unsigned int nd = 0;
1483 * Number of found IB device Ports. nd = 1 and np = 1..n means
1484 * we have the single multiport IB device, and there may be
1485 * representors attached to some of found ports.
1487 unsigned int np = 0;
1489 * Number of DPDK ethernet devices to Spawn - either over
1490 * multiple IB devices or multiple ports of single IB device.
1491 * Actually this is the number of iterations to spawn.
1493 unsigned int ns = 0;
1496 * < 0 - no bonding device (single one)
1497 * >= 0 - bonding device (value is slave PF index)
1500 struct mlx5_dev_spawn_data *list = NULL;
1501 struct mlx5_dev_config dev_config;
1504 if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
1505 DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
1509 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1510 mlx5_pmd_socket_init();
1511 ret = mlx5_init_once();
1513 DRV_LOG(ERR, "unable to init PMD global data: %s",
1514 strerror(rte_errno));
1517 MLX5_ASSERT(pci_drv == &mlx5_driver);
1519 ibv_list = mlx5_glue->get_device_list(&ret);
1521 rte_errno = errno ? errno : ENOSYS;
1522 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1526 * First scan the list of all Infiniband devices to find
1527 * matching ones, gathering into the list.
1529 struct ibv_device *ibv_match[ret + 1];
1530 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1531 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1535 struct rte_pci_addr pci_addr;
1537 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1538 bd = mlx5_device_bond_pci_match
1539 (ibv_list[ret], pci_dev, nl_rdma);
1542 * Bonding device detected. Only one match is allowed,
1543 * the bonding is supported over multi-port IB device,
1544 * there should be no matches on representor PCI
1545 * functions or non VF LAG bonding devices with
1546 * specified address.
1550 "multiple PCI match on bonding device"
1551 "\"%s\" found", ibv_list[ret]->name);
1556 DRV_LOG(INFO, "PCI information matches for"
1557 " slave %d bonding device \"%s\"",
1558 bd, ibv_list[ret]->name);
1559 ibv_match[nd++] = ibv_list[ret];
1562 if (mlx5_dev_to_pci_addr
1563 (ibv_list[ret]->ibdev_path, &pci_addr))
1565 if (pci_dev->addr.domain != pci_addr.domain ||
1566 pci_dev->addr.bus != pci_addr.bus ||
1567 pci_dev->addr.devid != pci_addr.devid ||
1568 pci_dev->addr.function != pci_addr.function)
1570 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1571 ibv_list[ret]->name);
1572 ibv_match[nd++] = ibv_list[ret];
1574 ibv_match[nd] = NULL;
1576 /* No device matches, just complain and bail out. */
1578 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1579 " are kernel drivers loaded?",
1580 pci_dev->addr.domain, pci_dev->addr.bus,
1581 pci_dev->addr.devid, pci_dev->addr.function);
1588 * Found single matching device may have multiple ports.
1589 * Each port may be representor, we have to check the port
1590 * number and check the representors existence.
1593 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1595 DRV_LOG(WARNING, "can not get IB device \"%s\""
1596 " ports number", ibv_match[0]->name);
1597 if (bd >= 0 && !np) {
1598 DRV_LOG(ERR, "can not get ports"
1599 " for bonding device");
1605 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1608 * This may happen if there is VF LAG kernel support and
1609 * application is compiled with older rdma_core library.
1612 "No kernel/verbs support for VF LAG bonding found.");
1613 rte_errno = ENOTSUP;
1619 * Now we can determine the maximal
1620 * amount of devices to be spawned.
1622 list = mlx5_malloc(MLX5_MEM_ZERO,
1623 sizeof(struct mlx5_dev_spawn_data) *
1625 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1627 DRV_LOG(ERR, "spawn data array allocation failure");
1632 if (bd >= 0 || np > 1) {
1634 * Single IB device with multiple ports found,
1635 * it may be E-Switch master device and representors.
1636 * We have to perform identification through the ports.
1638 MLX5_ASSERT(nl_rdma >= 0);
1639 MLX5_ASSERT(ns == 0);
1640 MLX5_ASSERT(nd == 1);
1642 for (i = 1; i <= np; ++i) {
1643 list[ns].max_port = np;
1644 list[ns].phys_port = i;
1645 list[ns].phys_dev = ibv_match[0];
1646 list[ns].eth_dev = NULL;
1647 list[ns].pci_dev = pci_dev;
1648 list[ns].pf_bond = bd;
1649 list[ns].ifindex = mlx5_nl_ifindex
1651 mlx5_os_get_dev_device_name
1652 (list[ns].phys_dev), i);
1653 if (!list[ns].ifindex) {
1655 * No network interface index found for the
1656 * specified port, it means there is no
1657 * representor on this port. It's OK,
1658 * there can be disabled ports, for example
1659 * if sriov_numvfs < sriov_totalvfs.
1665 ret = mlx5_nl_switch_info
1669 if (ret || (!list[ns].info.representor &&
1670 !list[ns].info.master)) {
1672 * We failed to recognize representors with
1673 * Netlink, let's try to perform the task
1676 ret = mlx5_sysfs_switch_info
1680 if (!ret && bd >= 0) {
1681 switch (list[ns].info.name_type) {
1682 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1683 if (list[ns].info.port_name == bd)
1686 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1688 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1689 if (list[ns].info.pf_num == bd)
1697 if (!ret && (list[ns].info.representor ^
1698 list[ns].info.master))
1703 "unable to recognize master/representors"
1704 " on the IB device with multiple ports");
1711 * The existence of several matching entries (nd > 1) means
1712 * port representors have been instantiated. No existing Verbs
1713 * call nor sysfs entries can tell them apart, this can only
1714 * be done through Netlink calls assuming kernel drivers are
1715 * recent enough to support them.
1717 * In the event of identification failure through Netlink,
1718 * try again through sysfs, then:
1720 * 1. A single IB device matches (nd == 1) with single
1721 * port (np=0/1) and is not a representor, assume
1722 * no switch support.
1724 * 2. Otherwise no safe assumptions can be made;
1725 * complain louder and bail out.
1727 for (i = 0; i != nd; ++i) {
1728 memset(&list[ns].info, 0, sizeof(list[ns].info));
1729 list[ns].max_port = 1;
1730 list[ns].phys_port = 1;
1731 list[ns].phys_dev = ibv_match[i];
1732 list[ns].eth_dev = NULL;
1733 list[ns].pci_dev = pci_dev;
1734 list[ns].pf_bond = -1;
1735 list[ns].ifindex = 0;
1737 list[ns].ifindex = mlx5_nl_ifindex
1739 mlx5_os_get_dev_device_name
1740 (list[ns].phys_dev), 1);
1741 if (!list[ns].ifindex) {
1742 char ifname[IF_NAMESIZE];
1745 * Netlink failed, it may happen with old
1746 * ib_core kernel driver (before 4.16).
1747 * We can assume there is old driver because
1748 * here we are processing single ports IB
1749 * devices. Let's try sysfs to retrieve
1750 * the ifindex. The method works for
1751 * master device only.
1755 * Multiple devices found, assume
1756 * representors, can not distinguish
1757 * master/representor and retrieve
1758 * ifindex via sysfs.
1762 ret = mlx5_get_ifname_sysfs
1763 (ibv_match[i]->ibdev_path, ifname);
1766 if_nametoindex(ifname);
1767 if (!list[ns].ifindex) {
1769 * No network interface index found
1770 * for the specified device, it means
1771 * there it is neither representor
1779 ret = mlx5_nl_switch_info
1783 if (ret || (!list[ns].info.representor &&
1784 !list[ns].info.master)) {
1786 * We failed to recognize representors with
1787 * Netlink, let's try to perform the task
1790 ret = mlx5_sysfs_switch_info
1794 if (!ret && (list[ns].info.representor ^
1795 list[ns].info.master)) {
1797 } else if ((nd == 1) &&
1798 !list[ns].info.representor &&
1799 !list[ns].info.master) {
1801 * Single IB device with
1802 * one physical port and
1803 * attached network device.
1804 * May be SRIOV is not enabled
1805 * or there is no representors.
1807 DRV_LOG(INFO, "no E-Switch support detected");
1814 "unable to recognize master/representors"
1815 " on the multiple IB devices");
1823 * Sort list to probe devices in natural order for users convenience
1824 * (i.e. master first, then representors from lowest to highest ID).
1826 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1827 /* Default configuration. */
1828 dev_config = (struct mlx5_dev_config){
1830 .mps = MLX5_ARG_UNSET,
1831 .dbnc = MLX5_ARG_UNSET,
1833 .txq_inline_max = MLX5_ARG_UNSET,
1834 .txq_inline_min = MLX5_ARG_UNSET,
1835 .txq_inline_mpw = MLX5_ARG_UNSET,
1836 .txqs_inline = MLX5_ARG_UNSET,
1838 .mr_ext_memseg_en = 1,
1840 .enabled = 0, /* Disabled by default. */
1843 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1844 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1849 .log_hp_size = MLX5_ARG_UNSET,
1851 /* Device specific configuration. */
1852 switch (pci_dev->id.device_id) {
1853 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1854 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1855 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1856 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1857 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1858 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1859 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1865 for (i = 0; i != ns; ++i) {
1868 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1871 if (!list[i].eth_dev) {
1872 if (rte_errno != EBUSY && rte_errno != EEXIST)
1874 /* Device is disabled or already spawned. Ignore it. */
1877 restore = list[i].eth_dev->data->dev_flags;
1878 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1879 /* Restore non-PCI flags cleared by the above call. */
1880 list[i].eth_dev->data->dev_flags |= restore;
1881 rte_eth_dev_probing_finish(list[i].eth_dev);
1885 "probe of PCI device " PCI_PRI_FMT " aborted after"
1886 " encountering an error: %s",
1887 pci_dev->addr.domain, pci_dev->addr.bus,
1888 pci_dev->addr.devid, pci_dev->addr.function,
1889 strerror(rte_errno));
1893 if (!list[i].eth_dev)
1895 mlx5_dev_close(list[i].eth_dev);
1896 /* mac_addrs must not be freed because in dev_private */
1897 list[i].eth_dev->data->mac_addrs = NULL;
1898 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1900 /* Restore original error. */
1907 * Do the routine cleanup:
1908 * - close opened Netlink sockets
1909 * - free allocated spawn data array
1910 * - free the Infiniband device list
1918 MLX5_ASSERT(ibv_list);
1919 mlx5_glue->free_device_list(ibv_list);
1924 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1929 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1930 /* Get environment variable to store. */
1931 env = getenv(MLX5_SHUT_UP_BF);
1932 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1933 if (config->dbnc == MLX5_ARG_UNSET)
1934 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1936 setenv(MLX5_SHUT_UP_BF,
1937 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1942 mlx5_restore_doorbell_mapping_env(int value)
1944 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1945 /* Restore the original environment variable state. */
1946 if (value == MLX5_ARG_UNSET)
1947 unsetenv(MLX5_SHUT_UP_BF);
1949 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1953 * Extract pdn of PD object using DV API.
1956 * Pointer to the verbs PD object.
1958 * Pointer to the PD object number variable.
1961 * 0 on success, error value otherwise.
1964 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1966 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1967 struct mlx5dv_obj obj;
1968 struct mlx5dv_pd pd_info;
1972 obj.pd.out = &pd_info;
1973 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1975 DRV_LOG(DEBUG, "Fail to get PD object info");
1984 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
1988 * Function API to open IB device.
1990 * This function calls the Linux glue APIs to open a device.
1993 * Pointer to the IB device attributes (name, port, etc).
1994 * @param[out] config
1995 * Pointer to device configuration structure.
1997 * Pointer to shared context structure.
2000 * 0 on success, a positive error value otherwise.
2003 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2004 const struct mlx5_dev_config *config,
2005 struct mlx5_dev_ctx_shared *sh)
2010 sh->numa_node = spawn->pci_dev->device.numa_node;
2011 pthread_mutex_init(&sh->txpp.mutex, NULL);
2013 * Configure environment variable "MLX5_BF_SHUT_UP"
2014 * before the device creation. The rdma_core library
2015 * checks the variable at device creation and
2016 * stores the result internally.
2018 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2019 /* Try to open IB device with DV first, then usual Verbs. */
2021 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2024 DRV_LOG(DEBUG, "DevX is supported");
2025 /* The device is created, no need for environment. */
2026 mlx5_restore_doorbell_mapping_env(dbmap_env);
2028 /* The environment variable is still configured. */
2029 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2030 err = errno ? errno : ENODEV;
2032 * The environment variable is not needed anymore,
2033 * all device creation attempts are completed.
2035 mlx5_restore_doorbell_mapping_env(dbmap_env);
2038 DRV_LOG(DEBUG, "DevX is NOT supported");
2045 * Install shared asynchronous device events handler.
2046 * This function is implemented to support event sharing
2047 * between multiple ports of single IB device.
2050 * Pointer to mlx5_dev_ctx_shared object.
2053 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2058 sh->intr_handle.fd = -1;
2059 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2060 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2061 F_SETFL, flags | O_NONBLOCK);
2063 DRV_LOG(INFO, "failed to change file descriptor async event"
2066 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2067 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2068 if (rte_intr_callback_register(&sh->intr_handle,
2069 mlx5_dev_interrupt_handler, sh)) {
2070 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2071 sh->intr_handle.fd = -1;
2075 #ifdef HAVE_IBV_DEVX_ASYNC
2076 sh->intr_handle_devx.fd = -1;
2078 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2079 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2081 DRV_LOG(INFO, "failed to allocate devx_comp.");
2084 flags = fcntl(devx_comp->fd, F_GETFL);
2085 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2087 DRV_LOG(INFO, "failed to change file descriptor"
2091 sh->intr_handle_devx.fd = devx_comp->fd;
2092 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2093 if (rte_intr_callback_register(&sh->intr_handle_devx,
2094 mlx5_dev_interrupt_handler_devx, sh)) {
2095 DRV_LOG(INFO, "Fail to install the devx shared"
2097 sh->intr_handle_devx.fd = -1;
2099 #endif /* HAVE_IBV_DEVX_ASYNC */
2104 * Uninstall shared asynchronous device events handler.
2105 * This function is implemented to support event sharing
2106 * between multiple ports of single IB device.
2109 * Pointer to mlx5_dev_ctx_shared object.
2112 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2114 if (sh->intr_handle.fd >= 0)
2115 mlx5_intr_callback_unregister(&sh->intr_handle,
2116 mlx5_dev_interrupt_handler, sh);
2117 #ifdef HAVE_IBV_DEVX_ASYNC
2118 if (sh->intr_handle_devx.fd >= 0)
2119 rte_intr_callback_unregister(&sh->intr_handle_devx,
2120 mlx5_dev_interrupt_handler_devx, sh);
2122 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2127 * Read statistics by a named counter.
2130 * Pointer to the private device data structure.
2131 * @param[in] ctr_name
2132 * Pointer to the name of the statistic counter to read
2134 * Pointer to read statistic value.
2136 * 0 on success and stat is valud, 1 if failed to read the value
2141 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2147 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2148 priv->sh->ibdev_path,
2151 fd = open(path, O_RDONLY);
2153 char buf[21] = {'\0'};
2154 ssize_t n = read(fd, buf, sizeof(buf));
2158 *stat = strtoull(buf, NULL, 10);
2168 * Set the reg_mr and dereg_mr call backs
2170 * @param reg_mr_cb[out]
2171 * Pointer to reg_mr func
2172 * @param dereg_mr_cb[out]
2173 * Pointer to dereg_mr func
2177 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2178 mlx5_dereg_mr_t *dereg_mr_cb)
2180 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2181 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2185 * Remove a MAC address from device
2188 * Pointer to Ethernet device structure.
2190 * MAC address index.
2193 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2195 struct mlx5_priv *priv = dev->data->dev_private;
2196 const int vf = priv->config.vf;
2199 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2200 mlx5_ifindex(dev), priv->mac_own,
2201 &dev->data->mac_addrs[index], index);
2205 * Adds a MAC address to the device
2208 * Pointer to Ethernet device structure.
2210 * MAC address to register.
2212 * MAC address index.
2215 * 0 on success, a negative errno value otherwise
2218 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2221 struct mlx5_priv *priv = dev->data->dev_private;
2222 const int vf = priv->config.vf;
2226 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2227 mlx5_ifindex(dev), priv->mac_own,
2233 * Modify a VF MAC address
2236 * Pointer to device private data.
2238 * MAC address to modify into.
2240 * Net device interface index
2245 * 0 on success, a negative errno value otherwise
2248 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2249 unsigned int iface_idx,
2250 struct rte_ether_addr *mac_addr,
2253 return mlx5_nl_vf_mac_addr_modify
2254 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2258 * Set device promiscuous mode
2261 * Pointer to Ethernet device structure.
2263 * 0 - promiscuous is disabled, otherwise - enabled
2266 * 0 on success, a negative error value otherwise
2269 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2271 struct mlx5_priv *priv = dev->data->dev_private;
2273 return mlx5_nl_promisc(priv->nl_socket_route,
2274 mlx5_ifindex(dev), !!enable);
2278 * Set device promiscuous mode
2281 * Pointer to Ethernet device structure.
2283 * 0 - all multicase is disabled, otherwise - enabled
2286 * 0 on success, a negative error value otherwise
2289 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2291 struct mlx5_priv *priv = dev->data->dev_private;
2293 return mlx5_nl_allmulti(priv->nl_socket_route,
2294 mlx5_ifindex(dev), !!enable);
2297 const struct eth_dev_ops mlx5_os_dev_ops = {
2298 .dev_configure = mlx5_dev_configure,
2299 .dev_start = mlx5_dev_start,
2300 .dev_stop = mlx5_dev_stop,
2301 .dev_set_link_down = mlx5_set_link_down,
2302 .dev_set_link_up = mlx5_set_link_up,
2303 .dev_close = mlx5_dev_close,
2304 .promiscuous_enable = mlx5_promiscuous_enable,
2305 .promiscuous_disable = mlx5_promiscuous_disable,
2306 .allmulticast_enable = mlx5_allmulticast_enable,
2307 .allmulticast_disable = mlx5_allmulticast_disable,
2308 .link_update = mlx5_link_update,
2309 .stats_get = mlx5_stats_get,
2310 .stats_reset = mlx5_stats_reset,
2311 .xstats_get = mlx5_xstats_get,
2312 .xstats_reset = mlx5_xstats_reset,
2313 .xstats_get_names = mlx5_xstats_get_names,
2314 .fw_version_get = mlx5_fw_version_get,
2315 .dev_infos_get = mlx5_dev_infos_get,
2316 .read_clock = mlx5_txpp_read_clock,
2317 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2318 .vlan_filter_set = mlx5_vlan_filter_set,
2319 .rx_queue_setup = mlx5_rx_queue_setup,
2320 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2321 .tx_queue_setup = mlx5_tx_queue_setup,
2322 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2323 .rx_queue_release = mlx5_rx_queue_release,
2324 .tx_queue_release = mlx5_tx_queue_release,
2325 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2326 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2327 .mac_addr_remove = mlx5_mac_addr_remove,
2328 .mac_addr_add = mlx5_mac_addr_add,
2329 .mac_addr_set = mlx5_mac_addr_set,
2330 .set_mc_addr_list = mlx5_set_mc_addr_list,
2331 .mtu_set = mlx5_dev_set_mtu,
2332 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2333 .vlan_offload_set = mlx5_vlan_offload_set,
2334 .reta_update = mlx5_dev_rss_reta_update,
2335 .reta_query = mlx5_dev_rss_reta_query,
2336 .rss_hash_update = mlx5_rss_hash_update,
2337 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2338 .filter_ctrl = mlx5_dev_filter_ctrl,
2339 .rx_descriptor_status = mlx5_rx_descriptor_status,
2340 .tx_descriptor_status = mlx5_tx_descriptor_status,
2341 .rxq_info_get = mlx5_rxq_info_get,
2342 .txq_info_get = mlx5_txq_info_get,
2343 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2344 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2345 .rx_queue_count = mlx5_rx_queue_count,
2346 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2347 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2348 .is_removed = mlx5_is_removed,
2349 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2350 .get_module_info = mlx5_get_module_info,
2351 .get_module_eeprom = mlx5_get_module_eeprom,
2352 .hairpin_cap_get = mlx5_hairpin_cap_get,
2353 .mtr_ops_get = mlx5_flow_meter_ops_get,
2356 /* Available operations from secondary process. */
2357 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2358 .stats_get = mlx5_stats_get,
2359 .stats_reset = mlx5_stats_reset,
2360 .xstats_get = mlx5_xstats_get,
2361 .xstats_reset = mlx5_xstats_reset,
2362 .xstats_get_names = mlx5_xstats_get_names,
2363 .fw_version_get = mlx5_fw_version_get,
2364 .dev_infos_get = mlx5_dev_infos_get,
2365 .read_clock = mlx5_txpp_read_clock,
2366 .rx_descriptor_status = mlx5_rx_descriptor_status,
2367 .tx_descriptor_status = mlx5_tx_descriptor_status,
2368 .rxq_info_get = mlx5_rxq_info_get,
2369 .txq_info_get = mlx5_txq_info_get,
2370 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2371 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2372 .get_module_info = mlx5_get_module_info,
2373 .get_module_eeprom = mlx5_get_module_eeprom,
2376 /* Available operations in flow isolated mode. */
2377 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2378 .dev_configure = mlx5_dev_configure,
2379 .dev_start = mlx5_dev_start,
2380 .dev_stop = mlx5_dev_stop,
2381 .dev_set_link_down = mlx5_set_link_down,
2382 .dev_set_link_up = mlx5_set_link_up,
2383 .dev_close = mlx5_dev_close,
2384 .promiscuous_enable = mlx5_promiscuous_enable,
2385 .promiscuous_disable = mlx5_promiscuous_disable,
2386 .allmulticast_enable = mlx5_allmulticast_enable,
2387 .allmulticast_disable = mlx5_allmulticast_disable,
2388 .link_update = mlx5_link_update,
2389 .stats_get = mlx5_stats_get,
2390 .stats_reset = mlx5_stats_reset,
2391 .xstats_get = mlx5_xstats_get,
2392 .xstats_reset = mlx5_xstats_reset,
2393 .xstats_get_names = mlx5_xstats_get_names,
2394 .fw_version_get = mlx5_fw_version_get,
2395 .dev_infos_get = mlx5_dev_infos_get,
2396 .read_clock = mlx5_txpp_read_clock,
2397 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2398 .vlan_filter_set = mlx5_vlan_filter_set,
2399 .rx_queue_setup = mlx5_rx_queue_setup,
2400 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2401 .tx_queue_setup = mlx5_tx_queue_setup,
2402 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2403 .rx_queue_release = mlx5_rx_queue_release,
2404 .tx_queue_release = mlx5_tx_queue_release,
2405 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2406 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2407 .mac_addr_remove = mlx5_mac_addr_remove,
2408 .mac_addr_add = mlx5_mac_addr_add,
2409 .mac_addr_set = mlx5_mac_addr_set,
2410 .set_mc_addr_list = mlx5_set_mc_addr_list,
2411 .mtu_set = mlx5_dev_set_mtu,
2412 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2413 .vlan_offload_set = mlx5_vlan_offload_set,
2414 .filter_ctrl = mlx5_dev_filter_ctrl,
2415 .rx_descriptor_status = mlx5_rx_descriptor_status,
2416 .tx_descriptor_status = mlx5_tx_descriptor_status,
2417 .rxq_info_get = mlx5_rxq_info_get,
2418 .txq_info_get = mlx5_txq_info_get,
2419 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2420 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2421 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2422 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2423 .is_removed = mlx5_is_removed,
2424 .get_module_info = mlx5_get_module_info,
2425 .get_module_eeprom = mlx5_get_module_eeprom,
2426 .hairpin_cap_get = mlx5_hairpin_cap_get,
2427 .mtr_ops_get = mlx5_flow_meter_ops_get,