drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to force doorbell register mapping
 100  * to non-cahed region eliminating the extra write memory barrier.
 101  */
 102 #define MLX5_TX_DB_NC "tx_db_nc"
 103
 104 /*
 105  * Device parameter to include 2 dsegs in the title WQEBB.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 109
 110 /*
 111  * Device parameter to limit the size of inlining packet.
 112  * Deprecated, ignored.
 113  */
 114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 115
 116 /*
 117  * Device parameter to enable hardware Tx vector.
 118  * Deprecated, ignored (no vectorized Tx routines anymore).
 119  */
 120 #define MLX5_TX_VEC_EN "tx_vec_en"
 121
 122 /* Device parameter to enable hardware Rx vector. */
 123 #define MLX5_RX_VEC_EN "rx_vec_en"
 124
 125 /* Allow L3 VXLAN flow creation. */
 126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 127
 128 /* Activate DV E-Switch flow steering. */
 129 #define MLX5_DV_ESW_EN "dv_esw_en"
 130
 131 /* Activate DV flow steering. */
 132 #define MLX5_DV_FLOW_EN "dv_flow_en"
 133
 134 /* Enable extensive flow metadata support. */
 135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 136
 137 /* Activate Netlink support in VF mode. */
 138 #define MLX5_VF_NL_EN "vf_nl_en"
 139
 140 /* Enable extending memsegs when creating a MR. */
 141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 142
 143 /* Select port representors to instantiate. */
 144 #define MLX5_REPRESENTOR "representor"
 145
 146 /* Device parameter to configure the maximum number of dump files per queue. */
 147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 148
 149 /* Configure timeout of LRO session (in microseconds). */
 150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 151
 152 #ifndef HAVE_IBV_MLX5_MOD_MPW
 153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 155 #endif
 156
 157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 159 #endif
 160
 161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 162
 163 /* Shared memory between primary and secondary processes. */
 164 struct mlx5_shared_data *mlx5_shared_data;
 165
 166 /* Spinlock for mlx5_shared_data allocation. */
 167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 168
 169 /* Process local data for secondary processes. */
 170 static struct mlx5_local_data mlx5_local_data;
 171
 172 /** Driver-specific log messages type. */
 173 int mlx5_logtype;
 174
 175 /** Data associated with devices to spawn. */
 176 struct mlx5_dev_spawn_data {
 177         uint32_t ifindex; /**< Network interface index. */
 178         uint32_t max_port; /**< IB device maximal port index. */
 179         uint32_t ibv_port; /**< IB device physical port index. */
 180         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 181         struct mlx5_switch_info info; /**< Switch information. */
 182         struct ibv_device *ibv_dev; /**< Associated IB device. */
 183         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 184         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 185 };
 186
 187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 189
 190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 192
 193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
 194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
 195
 196 /**
 197  * Allocate ID pool structure.
 198  *
 199  * @return
 200  *   Pointer to pool object, NULL value otherwise.
 201  */
 202 struct mlx5_flow_id_pool *
 203 mlx5_flow_id_pool_alloc(void)
 204 {
 205         struct mlx5_flow_id_pool *pool;
 206         void *mem;
 207
 208         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 209                            RTE_CACHE_LINE_SIZE);
 210         if (!pool) {
 211                 DRV_LOG(ERR, "can't allocate id pool");
 212                 rte_errno  = ENOMEM;
 213                 return NULL;
 214         }
 215         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 216                           RTE_CACHE_LINE_SIZE);
 217         if (!mem) {
 218                 DRV_LOG(ERR, "can't allocate mem for id pool");
 219                 rte_errno  = ENOMEM;
 220                 goto error;
 221         }
 222         pool->free_arr = mem;
 223         pool->curr = pool->free_arr;
 224         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 225         pool->base_index = 0;
 226         return pool;
 227 error:
 228         rte_free(pool);
 229         return NULL;
 230 }
 231
 232 /**
 233  * Release ID pool structure.
 234  *
 235  * @param[in] pool
 236  *   Pointer to flow id pool object to free.
 237  */
 238 void
 239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 240 {
 241         rte_free(pool->free_arr);
 242         rte_free(pool);
 243 }
 244
 245 /**
 246  * Generate ID.
 247  *
 248  * @param[in] pool
 249  *   Pointer to flow id pool.
 250  * @param[out] id
 251  *   The generated ID.
 252  *
 253  * @return
 254  *   0 on success, error value otherwise.
 255  */
 256 uint32_t
 257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 258 {
 259         if (pool->curr == pool->free_arr) {
 260                 if (pool->base_index == UINT32_MAX) {
 261                         rte_errno  = ENOMEM;
 262                         DRV_LOG(ERR, "no free id");
 263                         return -rte_errno;
 264                 }
 265                 *id = ++pool->base_index;
 266                 return 0;
 267         }
 268         *id = *(--pool->curr);
 269         return 0;
 270 }
 271
 272 /**
 273  * Release ID.
 274  *
 275  * @param[in] pool
 276  *   Pointer to flow id pool.
 277  * @param[out] id
 278  *   The generated ID.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 uint32_t
 284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 285 {
 286         uint32_t size;
 287         uint32_t size2;
 288         void *mem;
 289
 290         if (pool->curr == pool->last) {
 291                 size = pool->curr - pool->free_arr;
 292                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 293                 assert(size2 > size);
 294                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 295                 if (!mem) {
 296                         DRV_LOG(ERR, "can't allocate mem for id pool");
 297                         rte_errno  = ENOMEM;
 298                         return -rte_errno;
 299                 }
 300                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 301                 rte_free(pool->free_arr);
 302                 pool->free_arr = mem;
 303                 pool->curr = pool->free_arr + size;
 304                 pool->last = pool->free_arr + size2;
 305         }
 306         *pool->curr = id;
 307         pool->curr++;
 308         return 0;
 309 }
 310
 311 /**
 312  * Initialize the counters management structure.
 313  *
 314  * @param[in] sh
 315  *   Pointer to mlx5_ibv_shared object to free
 316  */
 317 static void
 318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 319 {
 320         uint8_t i;
 321
 322         TAILQ_INIT(&sh->cmng.flow_counters);
 323         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 324                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 325 }
 326
 327 /**
 328  * Destroy all the resources allocated for a counter memory management.
 329  *
 330  * @param[in] mng
 331  *   Pointer to the memory management structure.
 332  */
 333 static void
 334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 335 {
 336         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 337
 338         LIST_REMOVE(mng, next);
 339         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 340         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 341         rte_free(mem);
 342 }
 343
 344 /**
 345  * Close and release all the resources of the counters management.
 346  *
 347  * @param[in] sh
 348  *   Pointer to mlx5_ibv_shared object to free.
 349  */
 350 static void
 351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 352 {
 353         struct mlx5_counter_stats_mem_mng *mng;
 354         uint8_t i;
 355         int j;
 356         int retries = 1024;
 357
 358         rte_errno = 0;
 359         while (--retries) {
 360                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 361                 if (rte_errno != EINPROGRESS)
 362                         break;
 363                 rte_pause();
 364         }
 365         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 366                 struct mlx5_flow_counter_pool *pool;
 367                 uint32_t batch = !!(i % 2);
 368
 369                 if (!sh->cmng.ccont[i].pools)
 370                         continue;
 371                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 372                 while (pool) {
 373                         if (batch) {
 374                                 if (pool->min_dcs)
 375                                         claim_zero
 376                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 377                         }
 378                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 379                                 if (pool->counters_raw[j].action)
 380                                         claim_zero
 381                                         (mlx5_glue->destroy_flow_action
 382                                                (pool->counters_raw[j].action));
 383                                 if (!batch && pool->counters_raw[j].dcs)
 384                                         claim_zero(mlx5_devx_cmd_destroy
 385                                                   (pool->counters_raw[j].dcs));
 386                         }
 387                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 388                                      next);
 389                         rte_free(pool);
 390                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 391                 }
 392                 rte_free(sh->cmng.ccont[i].pools);
 393         }
 394         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 395         while (mng) {
 396                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 397                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 398         }
 399         memset(&sh->cmng, 0, sizeof(sh->cmng));
 400 }
 401
 402 /**
 403  * Extract pdn of PD object using DV API.
 404  *
 405  * @param[in] pd
 406  *   Pointer to the verbs PD object.
 407  * @param[out] pdn
 408  *   Pointer to the PD object number variable.
 409  *
 410  * @return
 411  *   0 on success, error value otherwise.
 412  */
 413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 414 static int
 415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 416 {
 417         struct mlx5dv_obj obj;
 418         struct mlx5dv_pd pd_info;
 419         int ret = 0;
 420
 421         obj.pd.in = pd;
 422         obj.pd.out = &pd_info;
 423         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 424         if (ret) {
 425                 DRV_LOG(DEBUG, "Fail to get PD object info");
 426                 return ret;
 427         }
 428         *pdn = pd_info.pdn;
 429         return 0;
 430 }
 431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 432
 433 static int
 434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
 435 {
 436         char *env;
 437         int value;
 438
 439         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 440         /* Get environment variable to store. */
 441         env = getenv(MLX5_SHUT_UP_BF);
 442         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
 443         if (config->dbnc == MLX5_ARG_UNSET)
 444                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
 445         else
 446                 setenv(MLX5_SHUT_UP_BF, config->dbnc ? "1" : "0", 1);
 447         return value;
 448 }
 449
 450 static void
 451 mlx5_restore_doorbell_mapping_env(const struct mlx5_dev_config *config,
 452                                   int value)
 453 {
 454         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 455         if (config->dbnc == MLX5_ARG_UNSET)
 456                 return;
 457         /* Restore the original environment variable state. */
 458         if (value == MLX5_ARG_UNSET)
 459                 unsetenv(MLX5_SHUT_UP_BF);
 460         else
 461                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
 462 }
 463
 464 /**
 465  * Allocate shared IB device context. If there is multiport device the
 466  * master and representors will share this context, if there is single
 467  * port dedicated IB device, the context will be used by only given
 468  * port due to unification.
 469  *
 470  * Routine first searches the context for the specified IB device name,
 471  * if found the shared context assumed and reference counter is incremented.
 472  * If no context found the new one is created and initialized with specified
 473  * IB device context and parameters.
 474  *
 475  * @param[in] spawn
 476  *   Pointer to the IB device attributes (name, port, etc).
 477  * @param[in] config
 478  *   Pointer to device configuration structure.
 479  *
 480  * @return
 481  *   Pointer to mlx5_ibv_shared object on success,
 482  *   otherwise NULL and rte_errno is set.
 483  */
 484 static struct mlx5_ibv_shared *
 485 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 486                         const struct mlx5_dev_config *config)
 487 {
 488         struct mlx5_ibv_shared *sh;
 489         int dbmap_env;
 490         int err = 0;
 491         uint32_t i;
 492 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 493         struct mlx5_devx_tis_attr tis_attr = { 0 };
 494 #endif
 495
 496         assert(spawn);
 497         /* Secondary process should not create the shared context. */
 498         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 499         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 500         /* Search for IB context by device name. */
 501         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 502                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 503                         sh->refcnt++;
 504                         goto exit;
 505                 }
 506         }
 507         /* No device found, we have to create new shared context. */
 508         assert(spawn->max_port);
 509         sh = rte_zmalloc("ethdev shared ib context",
 510                          sizeof(struct mlx5_ibv_shared) +
 511                          spawn->max_port *
 512                          sizeof(struct mlx5_ibv_shared_port),
 513                          RTE_CACHE_LINE_SIZE);
 514         if (!sh) {
 515                 DRV_LOG(ERR, "shared context allocation failure");
 516                 rte_errno  = ENOMEM;
 517                 goto exit;
 518         }
 519         /*
 520          * Configure environment variable "MLX5_BF_SHUT_UP"
 521          * before the device creation. The rdma_core library
 522          * checks the variable at device creation and
 523          * stores the result internally.
 524          */
 525         dbmap_env = mlx5_config_doorbell_mapping_env(config);
 526         /* Try to open IB device with DV first, then usual Verbs. */
 527         errno = 0;
 528         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 529         if (sh->ctx) {
 530                 sh->devx = 1;
 531                 DRV_LOG(DEBUG, "DevX is supported");
 532                 /* The device is created, no need for environment. */
 533                 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
 534         } else {
 535                 /* The environment variable is still configured. */
 536                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 537                 err = errno ? errno : ENODEV;
 538                 /*
 539                  * The environment variable is not needed anymore,
 540                  * all device creation attempts are completed.
 541                  */
 542                 mlx5_restore_doorbell_mapping_env(config, dbmap_env);
 543                 if (!sh->ctx) {
 544                         goto error;
 545                 }
 546                 DRV_LOG(DEBUG, "DevX is NOT supported");
 547         }
 548         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 549         if (err) {
 550                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 551                 goto error;
 552         }
 553         sh->refcnt = 1;
 554         sh->max_port = spawn->max_port;
 555         strncpy(sh->ibdev_name, sh->ctx->device->name,
 556                 sizeof(sh->ibdev_name));
 557         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 558                 sizeof(sh->ibdev_path));
 559         pthread_mutex_init(&sh->intr_mutex, NULL);
 560         /*
 561          * Setting port_id to max unallowed value means
 562          * there is no interrupt subhandler installed for
 563          * the given port index i.
 564          */
 565         for (i = 0; i < sh->max_port; i++) {
 566                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 567                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 568         }
 569         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 570         if (sh->pd == NULL) {
 571                 DRV_LOG(ERR, "PD allocation failure");
 572                 err = ENOMEM;
 573                 goto error;
 574         }
 575 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 576         if (sh->devx) {
 577                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 578                 if (err) {
 579                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 580                         goto error;
 581                 }
 582                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 583                 if (!sh->td) {
 584                         DRV_LOG(ERR, "TD allocation failure");
 585                         err = ENOMEM;
 586                         goto error;
 587                 }
 588                 tis_attr.transport_domain = sh->td->id;
 589                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 590                 if (!sh->tis) {
 591                         DRV_LOG(ERR, "TIS allocation failure");
 592                         err = ENOMEM;
 593                         goto error;
 594                 }
 595         }
 596         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 597         if (!sh->flow_id_pool) {
 598                 DRV_LOG(ERR, "can't create flow id pool");
 599                 err = ENOMEM;
 600                 goto error;
 601         }
 602 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 603         /*
 604          * Once the device is added to the list of memory event
 605          * callback, its global MR cache table cannot be expanded
 606          * on the fly because of deadlock. If it overflows, lookup
 607          * should be done by searching MR list linearly, which is slow.
 608          *
 609          * At this point the device is not added to the memory
 610          * event list yet, context is just being created.
 611          */
 612         err = mlx5_mr_btree_init(&sh->mr.cache,
 613                                  MLX5_MR_BTREE_CACHE_N * 2,
 614                                  spawn->pci_dev->device.numa_node);
 615         if (err) {
 616                 err = rte_errno;
 617                 goto error;
 618         }
 619         mlx5_flow_counters_mng_init(sh);
 620         /* Add device to memory callback list. */
 621         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 622         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 623                          sh, mem_event_cb);
 624         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 625         /* Add context to the global device list. */
 626         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 627 exit:
 628         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 629         return sh;
 630 error:
 631         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 632         assert(sh);
 633         if (sh->tis)
 634                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 635         if (sh->td)
 636                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 637         if (sh->pd)
 638                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 639         if (sh->ctx)
 640                 claim_zero(mlx5_glue->close_device(sh->ctx));
 641         if (sh->flow_id_pool)
 642                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 643         rte_free(sh);
 644         assert(err > 0);
 645         rte_errno = err;
 646         return NULL;
 647 }
 648
 649 /**
 650  * Free shared IB device context. Decrement counter and if zero free
 651  * all allocated resources and close handles.
 652  *
 653  * @param[in] sh
 654  *   Pointer to mlx5_ibv_shared object to free
 655  */
 656 static void
 657 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 658 {
 659         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 660 #ifndef NDEBUG
 661         /* Check the object presence in the list. */
 662         struct mlx5_ibv_shared *lctx;
 663
 664         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 665                 if (lctx == sh)
 666                         break;
 667         assert(lctx);
 668         if (lctx != sh) {
 669                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 670                 goto exit;
 671         }
 672 #endif
 673         assert(sh);
 674         assert(sh->refcnt);
 675         /* Secondary process should not free the shared context. */
 676         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 677         if (--sh->refcnt)
 678                 goto exit;
 679         /* Release created Memory Regions. */
 680         mlx5_mr_release(sh);
 681         /* Remove from memory callback device list. */
 682         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 683         LIST_REMOVE(sh, mem_event_cb);
 684         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 685         /* Remove context from the global device list. */
 686         LIST_REMOVE(sh, next);
 687         /*
 688          *  Ensure there is no async event handler installed.
 689          *  Only primary process handles async device events.
 690          **/
 691         mlx5_flow_counters_mng_close(sh);
 692         assert(!sh->intr_cnt);
 693         if (sh->intr_cnt)
 694                 mlx5_intr_callback_unregister
 695                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 696 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 697         if (sh->devx_intr_cnt) {
 698                 if (sh->intr_handle_devx.fd)
 699                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 700                                           mlx5_dev_interrupt_handler_devx, sh);
 701                 if (sh->devx_comp)
 702                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 703         }
 704 #endif
 705         pthread_mutex_destroy(&sh->intr_mutex);
 706         if (sh->pd)
 707                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 708         if (sh->tis)
 709                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 710         if (sh->td)
 711                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 712         if (sh->ctx)
 713                 claim_zero(mlx5_glue->close_device(sh->ctx));
 714         if (sh->flow_id_pool)
 715                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 716         rte_free(sh);
 717 exit:
 718         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 719 }
 720
 721 /**
 722  * Initialize DR related data within private structure.
 723  * Routine checks the reference counter and does actual
 724  * resources creation/initialization only if counter is zero.
 725  *
 726  * @param[in] priv
 727  *   Pointer to the private device data structure.
 728  *
 729  * @return
 730  *   Zero on success, positive error code otherwise.
 731  */
 732 static int
 733 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 734 {
 735 #ifdef HAVE_MLX5DV_DR
 736         struct mlx5_ibv_shared *sh = priv->sh;
 737         int err = 0;
 738         void *domain;
 739         char s[MLX5_HLIST_NAMESIZE];
 740
 741         assert(sh);
 742         if (sh->dv_refcnt) {
 743                 /* Shared DV/DR structures is already initialized. */
 744                 sh->dv_refcnt++;
 745                 priv->dr_shared = 1;
 746                 return 0;
 747         }
 748         /* Reference counter is zero, we should initialize structures. */
 749         domain = mlx5_glue->dr_create_domain(sh->ctx,
 750                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 751         if (!domain) {
 752                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 753                 err = errno;
 754                 goto error;
 755         }
 756         sh->rx_domain = domain;
 757         domain = mlx5_glue->dr_create_domain(sh->ctx,
 758                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 759         if (!domain) {
 760                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 761                 err = errno;
 762                 goto error;
 763         }
 764         pthread_mutex_init(&sh->dv_mutex, NULL);
 765         sh->tx_domain = domain;
 766 #ifdef HAVE_MLX5DV_DR_ESWITCH
 767         if (priv->config.dv_esw_en) {
 768                 domain  = mlx5_glue->dr_create_domain
 769                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 770                 if (!domain) {
 771                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 772                         err = errno;
 773                         goto error;
 774                 }
 775                 sh->fdb_domain = domain;
 776                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 777         }
 778 #endif
 779         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
 780         sh->flow_tbls = mlx5_hlist_create(s,
 781                                           MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
 782         if (!sh->flow_tbls) {
 783                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
 784                 err = -ENOMEM;
 785                 goto error;
 786         }
 787         /* create tags hash list table. */
 788         snprintf(s, sizeof(s), "%s_tags", priv->sh->ibdev_name);
 789         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 790         if (!sh->flow_tbls) {
 791                 DRV_LOG(ERR, "tags with hash creation failed.\n");
 792                 err = -ENOMEM;
 793                 goto error;
 794         }
 795         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 796         sh->dv_refcnt++;
 797         priv->dr_shared = 1;
 798         return 0;
 799
 800 error:
 801        /* Rollback the created objects. */
 802         if (sh->rx_domain) {
 803                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 804                 sh->rx_domain = NULL;
 805         }
 806         if (sh->tx_domain) {
 807                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 808                 sh->tx_domain = NULL;
 809         }
 810         if (sh->fdb_domain) {
 811                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 812                 sh->fdb_domain = NULL;
 813         }
 814         if (sh->flow_tbls) {
 815                 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 816                 sh->flow_tbls = NULL;
 817         }
 818         if (sh->esw_drop_action) {
 819                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 820                 sh->esw_drop_action = NULL;
 821         }
 822         if (sh->pop_vlan_action) {
 823                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 824                 sh->pop_vlan_action = NULL;
 825         }
 826         return err;
 827 #else
 828         (void)priv;
 829         return 0;
 830 #endif
 831 }
 832
 833 /**
 834  * Destroy DR related data within private structure.
 835  *
 836  * @param[in] priv
 837  *   Pointer to the private device data structure.
 838  */
 839 static void
 840 mlx5_free_shared_dr(struct mlx5_priv *priv)
 841 {
 842 #ifdef HAVE_MLX5DV_DR
 843         struct mlx5_ibv_shared *sh;
 844
 845         if (!priv->dr_shared)
 846                 return;
 847         priv->dr_shared = 0;
 848         sh = priv->sh;
 849         assert(sh);
 850         assert(sh->dv_refcnt);
 851         if (sh->dv_refcnt && --sh->dv_refcnt)
 852                 return;
 853         if (sh->flow_tbls) {
 854                 /* flow table entries should be handled properly before. */
 855                 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 856                 sh->flow_tbls = NULL;
 857         }
 858         if (sh->tag_table) {
 859                 /* tags should be destroyed with flow before. */
 860                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 861                 sh->tag_table = NULL;
 862         }
 863         if (sh->rx_domain) {
 864                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 865                 sh->rx_domain = NULL;
 866         }
 867         if (sh->tx_domain) {
 868                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 869                 sh->tx_domain = NULL;
 870         }
 871 #ifdef HAVE_MLX5DV_DR_ESWITCH
 872         if (sh->fdb_domain) {
 873                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 874                 sh->fdb_domain = NULL;
 875         }
 876         if (sh->esw_drop_action) {
 877                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 878                 sh->esw_drop_action = NULL;
 879         }
 880 #endif
 881         if (sh->pop_vlan_action) {
 882                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 883                 sh->pop_vlan_action = NULL;
 884         }
 885         pthread_mutex_destroy(&sh->dv_mutex);
 886 #else
 887         (void)priv;
 888 #endif
 889 }
 890
 891 /**
 892  * Initialize shared data between primary and secondary process.
 893  *
 894  * A memzone is reserved by primary process and secondary processes attach to
 895  * the memzone.
 896  *
 897  * @return
 898  *   0 on success, a negative errno value otherwise and rte_errno is set.
 899  */
 900 static int
 901 mlx5_init_shared_data(void)
 902 {
 903         const struct rte_memzone *mz;
 904         int ret = 0;
 905
 906         rte_spinlock_lock(&mlx5_shared_data_lock);
 907         if (mlx5_shared_data == NULL) {
 908                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 909                         /* Allocate shared memory. */
 910                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 911                                                  sizeof(*mlx5_shared_data),
 912                                                  SOCKET_ID_ANY, 0);
 913                         if (mz == NULL) {
 914                                 DRV_LOG(ERR,
 915                                         "Cannot allocate mlx5 shared data");
 916                                 ret = -rte_errno;
 917                                 goto error;
 918                         }
 919                         mlx5_shared_data = mz->addr;
 920                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 921                         rte_spinlock_init(&mlx5_shared_data->lock);
 922                 } else {
 923                         /* Lookup allocated shared memory. */
 924                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 925                         if (mz == NULL) {
 926                                 DRV_LOG(ERR,
 927                                         "Cannot attach mlx5 shared data");
 928                                 ret = -rte_errno;
 929                                 goto error;
 930                         }
 931                         mlx5_shared_data = mz->addr;
 932                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 933                 }
 934         }
 935 error:
 936         rte_spinlock_unlock(&mlx5_shared_data_lock);
 937         return ret;
 938 }
 939
 940 /**
 941  * Retrieve integer value from environment variable.
 942  *
 943  * @param[in] name
 944  *   Environment variable name.
 945  *
 946  * @return
 947  *   Integer value, 0 if the variable is not set.
 948  */
 949 int
 950 mlx5_getenv_int(const char *name)
 951 {
 952         const char *val = getenv(name);
 953
 954         if (val == NULL)
 955                 return 0;
 956         return atoi(val);
 957 }
 958
 959 /**
 960  * Verbs callback to allocate a memory. This function should allocate the space
 961  * according to the size provided residing inside a huge page.
 962  * Please note that all allocation must respect the alignment from libmlx5
 963  * (i.e. currently sysconf(_SC_PAGESIZE)).
 964  *
 965  * @param[in] size
 966  *   The size in bytes of the memory to allocate.
 967  * @param[in] data
 968  *   A pointer to the callback data.
 969  *
 970  * @return
 971  *   Allocated buffer, NULL otherwise and rte_errno is set.
 972  */
 973 static void *
 974 mlx5_alloc_verbs_buf(size_t size, void *data)
 975 {
 976         struct mlx5_priv *priv = data;
 977         void *ret;
 978         size_t alignment = sysconf(_SC_PAGESIZE);
 979         unsigned int socket = SOCKET_ID_ANY;
 980
 981         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 982                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 983
 984                 socket = ctrl->socket;
 985         } else if (priv->verbs_alloc_ctx.type ==
 986                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 987                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 988
 989                 socket = ctrl->socket;
 990         }
 991         assert(data != NULL);
 992         ret = rte_malloc_socket(__func__, size, alignment, socket);
 993         if (!ret && size)
 994                 rte_errno = ENOMEM;
 995         return ret;
 996 }
 997
 998 /**
 999  * Verbs callback to free a memory.
1000  *
1001  * @param[in] ptr
1002  *   A pointer to the memory to free.
1003  * @param[in] data
1004  *   A pointer to the callback data.
1005  */
1006 static void
1007 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1008 {
1009         assert(data != NULL);
1010         rte_free(ptr);
1011 }
1012
1013 /**
1014  * DPDK callback to add udp tunnel port
1015  *
1016  * @param[in] dev
1017  *   A pointer to eth_dev
1018  * @param[in] udp_tunnel
1019  *   A pointer to udp tunnel
1020  *
1021  * @return
1022  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1023  */
1024 int
1025 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1026                          struct rte_eth_udp_tunnel *udp_tunnel)
1027 {
1028         assert(udp_tunnel != NULL);
1029         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1030             udp_tunnel->udp_port == 4789)
1031                 return 0;
1032         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1033             udp_tunnel->udp_port == 4790)
1034                 return 0;
1035         return -ENOTSUP;
1036 }
1037
1038 /**
1039  * Initialize process private data structure.
1040  *
1041  * @param dev
1042  *   Pointer to Ethernet device structure.
1043  *
1044  * @return
1045  *   0 on success, a negative errno value otherwise and rte_errno is set.
1046  */
1047 int
1048 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1049 {
1050         struct mlx5_priv *priv = dev->data->dev_private;
1051         struct mlx5_proc_priv *ppriv;
1052         size_t ppriv_size;
1053
1054         /*
1055          * UAR register table follows the process private structure. BlueFlame
1056          * registers for Tx queues are stored in the table.
1057          */
1058         ppriv_size =
1059                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1060         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1061                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1062         if (!ppriv) {
1063                 rte_errno = ENOMEM;
1064                 return -rte_errno;
1065         }
1066         ppriv->uar_table_sz = ppriv_size;
1067         dev->process_private = ppriv;
1068         return 0;
1069 }
1070
1071 /**
1072  * Un-initialize process private data structure.
1073  *
1074  * @param dev
1075  *   Pointer to Ethernet device structure.
1076  */
1077 static void
1078 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1079 {
1080         if (!dev->process_private)
1081                 return;
1082         rte_free(dev->process_private);
1083         dev->process_private = NULL;
1084 }
1085
1086 /**
1087  * DPDK callback to close the device.
1088  *
1089  * Destroy all queues and objects, free memory.
1090  *
1091  * @param dev
1092  *   Pointer to Ethernet device structure.
1093  */
1094 static void
1095 mlx5_dev_close(struct rte_eth_dev *dev)
1096 {
1097         struct mlx5_priv *priv = dev->data->dev_private;
1098         unsigned int i;
1099         int ret;
1100
1101         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1102                 dev->data->port_id,
1103                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1104         /* In case mlx5_dev_stop() has not been called. */
1105         mlx5_dev_interrupt_handler_uninstall(dev);
1106         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1107         mlx5_traffic_disable(dev);
1108         mlx5_flow_flush(dev, NULL);
1109         mlx5_flow_meter_flush(dev, NULL);
1110         /* Prevent crashes when queues are still in use. */
1111         dev->rx_pkt_burst = removed_rx_burst;
1112         dev->tx_pkt_burst = removed_tx_burst;
1113         rte_wmb();
1114         /* Disable datapath on secondary process. */
1115         mlx5_mp_req_stop_rxtx(dev);
1116         if (priv->rxqs != NULL) {
1117                 /* XXX race condition if mlx5_rx_burst() is still running. */
1118                 usleep(1000);
1119                 for (i = 0; (i != priv->rxqs_n); ++i)
1120                         mlx5_rxq_release(dev, i);
1121                 priv->rxqs_n = 0;
1122                 priv->rxqs = NULL;
1123         }
1124         if (priv->txqs != NULL) {
1125                 /* XXX race condition if mlx5_tx_burst() is still running. */
1126                 usleep(1000);
1127                 for (i = 0; (i != priv->txqs_n); ++i)
1128                         mlx5_txq_release(dev, i);
1129                 priv->txqs_n = 0;
1130                 priv->txqs = NULL;
1131         }
1132         mlx5_proc_priv_uninit(dev);
1133         if (priv->mreg_cp_tbl)
1134                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1135         mlx5_mprq_free_mp(dev);
1136         mlx5_free_shared_dr(priv);
1137         if (priv->rss_conf.rss_key != NULL)
1138                 rte_free(priv->rss_conf.rss_key);
1139         if (priv->reta_idx != NULL)
1140                 rte_free(priv->reta_idx);
1141         if (priv->config.vf)
1142                 mlx5_nl_mac_addr_flush(dev);
1143         if (priv->nl_socket_route >= 0)
1144                 close(priv->nl_socket_route);
1145         if (priv->nl_socket_rdma >= 0)
1146                 close(priv->nl_socket_rdma);
1147         if (priv->vmwa_context)
1148                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1149         if (priv->sh) {
1150                 /*
1151                  * Free the shared context in last turn, because the cleanup
1152                  * routines above may use some shared fields, like
1153                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1154                  * ifindex if Netlink fails.
1155                  */
1156                 mlx5_free_shared_ibctx(priv->sh);
1157                 priv->sh = NULL;
1158         }
1159         ret = mlx5_hrxq_verify(dev);
1160         if (ret)
1161                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1162                         dev->data->port_id);
1163         ret = mlx5_ind_table_obj_verify(dev);
1164         if (ret)
1165                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1166                         dev->data->port_id);
1167         ret = mlx5_rxq_obj_verify(dev);
1168         if (ret)
1169                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1170                         dev->data->port_id);
1171         ret = mlx5_rxq_verify(dev);
1172         if (ret)
1173                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1174                         dev->data->port_id);
1175         ret = mlx5_txq_obj_verify(dev);
1176         if (ret)
1177                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1178                         dev->data->port_id);
1179         ret = mlx5_txq_verify(dev);
1180         if (ret)
1181                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1182                         dev->data->port_id);
1183         ret = mlx5_flow_verify(dev);
1184         if (ret)
1185                 DRV_LOG(WARNING, "port %u some flows still remain",
1186                         dev->data->port_id);
1187         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1188                 unsigned int c = 0;
1189                 uint16_t port_id;
1190
1191                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1192                         struct mlx5_priv *opriv =
1193                                 rte_eth_devices[port_id].data->dev_private;
1194
1195                         if (!opriv ||
1196                             opriv->domain_id != priv->domain_id ||
1197                             &rte_eth_devices[port_id] == dev)
1198                                 continue;
1199                         ++c;
1200                         break;
1201                 }
1202                 if (!c)
1203                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1204         }
1205         memset(priv, 0, sizeof(*priv));
1206         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1207         /*
1208          * Reset mac_addrs to NULL such that it is not freed as part of
1209          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1210          * it is freed when dev_private is freed.
1211          */
1212         dev->data->mac_addrs = NULL;
1213 }
1214
1215 const struct eth_dev_ops mlx5_dev_ops = {
1216         .dev_configure = mlx5_dev_configure,
1217         .dev_start = mlx5_dev_start,
1218         .dev_stop = mlx5_dev_stop,
1219         .dev_set_link_down = mlx5_set_link_down,
1220         .dev_set_link_up = mlx5_set_link_up,
1221         .dev_close = mlx5_dev_close,
1222         .promiscuous_enable = mlx5_promiscuous_enable,
1223         .promiscuous_disable = mlx5_promiscuous_disable,
1224         .allmulticast_enable = mlx5_allmulticast_enable,
1225         .allmulticast_disable = mlx5_allmulticast_disable,
1226         .link_update = mlx5_link_update,
1227         .stats_get = mlx5_stats_get,
1228         .stats_reset = mlx5_stats_reset,
1229         .xstats_get = mlx5_xstats_get,
1230         .xstats_reset = mlx5_xstats_reset,
1231         .xstats_get_names = mlx5_xstats_get_names,
1232         .fw_version_get = mlx5_fw_version_get,
1233         .dev_infos_get = mlx5_dev_infos_get,
1234         .read_clock = mlx5_read_clock,
1235         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1236         .vlan_filter_set = mlx5_vlan_filter_set,
1237         .rx_queue_setup = mlx5_rx_queue_setup,
1238         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1239         .tx_queue_setup = mlx5_tx_queue_setup,
1240         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1241         .rx_queue_release = mlx5_rx_queue_release,
1242         .tx_queue_release = mlx5_tx_queue_release,
1243         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1244         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1245         .mac_addr_remove = mlx5_mac_addr_remove,
1246         .mac_addr_add = mlx5_mac_addr_add,
1247         .mac_addr_set = mlx5_mac_addr_set,
1248         .set_mc_addr_list = mlx5_set_mc_addr_list,
1249         .mtu_set = mlx5_dev_set_mtu,
1250         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1251         .vlan_offload_set = mlx5_vlan_offload_set,
1252         .reta_update = mlx5_dev_rss_reta_update,
1253         .reta_query = mlx5_dev_rss_reta_query,
1254         .rss_hash_update = mlx5_rss_hash_update,
1255         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1256         .filter_ctrl = mlx5_dev_filter_ctrl,
1257         .rx_descriptor_status = mlx5_rx_descriptor_status,
1258         .tx_descriptor_status = mlx5_tx_descriptor_status,
1259         .rx_queue_count = mlx5_rx_queue_count,
1260         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1261         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1262         .is_removed = mlx5_is_removed,
1263         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1264         .get_module_info = mlx5_get_module_info,
1265         .get_module_eeprom = mlx5_get_module_eeprom,
1266         .hairpin_cap_get = mlx5_hairpin_cap_get,
1267         .mtr_ops_get = mlx5_flow_meter_ops_get,
1268 };
1269
1270 /* Available operations from secondary process. */
1271 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1272         .stats_get = mlx5_stats_get,
1273         .stats_reset = mlx5_stats_reset,
1274         .xstats_get = mlx5_xstats_get,
1275         .xstats_reset = mlx5_xstats_reset,
1276         .xstats_get_names = mlx5_xstats_get_names,
1277         .fw_version_get = mlx5_fw_version_get,
1278         .dev_infos_get = mlx5_dev_infos_get,
1279         .rx_descriptor_status = mlx5_rx_descriptor_status,
1280         .tx_descriptor_status = mlx5_tx_descriptor_status,
1281         .get_module_info = mlx5_get_module_info,
1282         .get_module_eeprom = mlx5_get_module_eeprom,
1283 };
1284
1285 /* Available operations in flow isolated mode. */
1286 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1287         .dev_configure = mlx5_dev_configure,
1288         .dev_start = mlx5_dev_start,
1289         .dev_stop = mlx5_dev_stop,
1290         .dev_set_link_down = mlx5_set_link_down,
1291         .dev_set_link_up = mlx5_set_link_up,
1292         .dev_close = mlx5_dev_close,
1293         .promiscuous_enable = mlx5_promiscuous_enable,
1294         .promiscuous_disable = mlx5_promiscuous_disable,
1295         .allmulticast_enable = mlx5_allmulticast_enable,
1296         .allmulticast_disable = mlx5_allmulticast_disable,
1297         .link_update = mlx5_link_update,
1298         .stats_get = mlx5_stats_get,
1299         .stats_reset = mlx5_stats_reset,
1300         .xstats_get = mlx5_xstats_get,
1301         .xstats_reset = mlx5_xstats_reset,
1302         .xstats_get_names = mlx5_xstats_get_names,
1303         .fw_version_get = mlx5_fw_version_get,
1304         .dev_infos_get = mlx5_dev_infos_get,
1305         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1306         .vlan_filter_set = mlx5_vlan_filter_set,
1307         .rx_queue_setup = mlx5_rx_queue_setup,
1308         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1309         .tx_queue_setup = mlx5_tx_queue_setup,
1310         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1311         .rx_queue_release = mlx5_rx_queue_release,
1312         .tx_queue_release = mlx5_tx_queue_release,
1313         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1314         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1315         .mac_addr_remove = mlx5_mac_addr_remove,
1316         .mac_addr_add = mlx5_mac_addr_add,
1317         .mac_addr_set = mlx5_mac_addr_set,
1318         .set_mc_addr_list = mlx5_set_mc_addr_list,
1319         .mtu_set = mlx5_dev_set_mtu,
1320         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1321         .vlan_offload_set = mlx5_vlan_offload_set,
1322         .filter_ctrl = mlx5_dev_filter_ctrl,
1323         .rx_descriptor_status = mlx5_rx_descriptor_status,
1324         .tx_descriptor_status = mlx5_tx_descriptor_status,
1325         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1326         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1327         .is_removed = mlx5_is_removed,
1328         .get_module_info = mlx5_get_module_info,
1329         .get_module_eeprom = mlx5_get_module_eeprom,
1330         .hairpin_cap_get = mlx5_hairpin_cap_get,
1331         .mtr_ops_get = mlx5_flow_meter_ops_get,
1332 };
1333
1334 /**
1335  * Verify and store value for device argument.
1336  *
1337  * @param[in] key
1338  *   Key argument to verify.
1339  * @param[in] val
1340  *   Value associated with key.
1341  * @param opaque
1342  *   User data.
1343  *
1344  * @return
1345  *   0 on success, a negative errno value otherwise and rte_errno is set.
1346  */
1347 static int
1348 mlx5_args_check(const char *key, const char *val, void *opaque)
1349 {
1350         struct mlx5_dev_config *config = opaque;
1351         unsigned long tmp;
1352
1353         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1354         if (!strcmp(MLX5_REPRESENTOR, key))
1355                 return 0;
1356         errno = 0;
1357         tmp = strtoul(val, NULL, 0);
1358         if (errno) {
1359                 rte_errno = errno;
1360                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1361                 return -rte_errno;
1362         }
1363         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1364                 config->cqe_comp = !!tmp;
1365         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1366                 config->cqe_pad = !!tmp;
1367         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1368                 config->hw_padding = !!tmp;
1369         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1370                 config->mprq.enabled = !!tmp;
1371         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1372                 config->mprq.stride_num_n = tmp;
1373         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1374                 config->mprq.max_memcpy_len = tmp;
1375         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1376                 config->mprq.min_rxqs_num = tmp;
1377         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1378                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1379                                  " converted to txq_inline_max", key);
1380                 config->txq_inline_max = tmp;
1381         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1382                 config->txq_inline_max = tmp;
1383         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1384                 config->txq_inline_min = tmp;
1385         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1386                 config->txq_inline_mpw = tmp;
1387         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1388                 config->txqs_inline = tmp;
1389         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1390                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1391         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1392                 config->mps = !!tmp;
1393         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1394                 config->dbnc = !!tmp;
1395         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1396                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1397         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1398                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1399                                  " converted to txq_inline_mpw", key);
1400                 config->txq_inline_mpw = tmp;
1401         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1402                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1403         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1404                 config->rx_vec_en = !!tmp;
1405         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1406                 config->l3_vxlan_en = !!tmp;
1407         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1408                 config->vf_nl_en = !!tmp;
1409         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1410                 config->dv_esw_en = !!tmp;
1411         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1412                 config->dv_flow_en = !!tmp;
1413         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1414                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1415                     tmp != MLX5_XMETA_MODE_META16 &&
1416                     tmp != MLX5_XMETA_MODE_META32) {
1417                         DRV_LOG(WARNING, "invalid extensive "
1418                                          "metadata parameter");
1419                         rte_errno = EINVAL;
1420                         return -rte_errno;
1421                 }
1422                 config->dv_xmeta_en = tmp;
1423         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1424                 config->mr_ext_memseg_en = !!tmp;
1425         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1426                 config->max_dump_files_num = tmp;
1427         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1428                 config->lro.timeout = tmp;
1429         } else {
1430                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1431                 rte_errno = EINVAL;
1432                 return -rte_errno;
1433         }
1434         return 0;
1435 }
1436
1437 /**
1438  * Parse device parameters.
1439  *
1440  * @param config
1441  *   Pointer to device configuration structure.
1442  * @param devargs
1443  *   Device arguments structure.
1444  *
1445  * @return
1446  *   0 on success, a negative errno value otherwise and rte_errno is set.
1447  */
1448 static int
1449 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1450 {
1451         const char **params = (const char *[]){
1452                 MLX5_RXQ_CQE_COMP_EN,
1453                 MLX5_RXQ_CQE_PAD_EN,
1454                 MLX5_RXQ_PKT_PAD_EN,
1455                 MLX5_RX_MPRQ_EN,
1456                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1457                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1458                 MLX5_RXQS_MIN_MPRQ,
1459                 MLX5_TXQ_INLINE,
1460                 MLX5_TXQ_INLINE_MIN,
1461                 MLX5_TXQ_INLINE_MAX,
1462                 MLX5_TXQ_INLINE_MPW,
1463                 MLX5_TXQS_MIN_INLINE,
1464                 MLX5_TXQS_MAX_VEC,
1465                 MLX5_TXQ_MPW_EN,
1466                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1467                 MLX5_TXQ_MAX_INLINE_LEN,
1468                 MLX5_TX_DB_NC,
1469                 MLX5_TX_VEC_EN,
1470                 MLX5_RX_VEC_EN,
1471                 MLX5_L3_VXLAN_EN,
1472                 MLX5_VF_NL_EN,
1473                 MLX5_DV_ESW_EN,
1474                 MLX5_DV_FLOW_EN,
1475                 MLX5_DV_XMETA_EN,
1476                 MLX5_MR_EXT_MEMSEG_EN,
1477                 MLX5_REPRESENTOR,
1478                 MLX5_MAX_DUMP_FILES_NUM,
1479                 MLX5_LRO_TIMEOUT_USEC,
1480                 NULL,
1481         };
1482         struct rte_kvargs *kvlist;
1483         int ret = 0;
1484         int i;
1485
1486         if (devargs == NULL)
1487                 return 0;
1488         /* Following UGLY cast is done to pass checkpatch. */
1489         kvlist = rte_kvargs_parse(devargs->args, params);
1490         if (kvlist == NULL) {
1491                 rte_errno = EINVAL;
1492                 return -rte_errno;
1493         }
1494         /* Process parameters. */
1495         for (i = 0; (params[i] != NULL); ++i) {
1496                 if (rte_kvargs_count(kvlist, params[i])) {
1497                         ret = rte_kvargs_process(kvlist, params[i],
1498                                                  mlx5_args_check, config);
1499                         if (ret) {
1500                                 rte_errno = EINVAL;
1501                                 rte_kvargs_free(kvlist);
1502                                 return -rte_errno;
1503                         }
1504                 }
1505         }
1506         rte_kvargs_free(kvlist);
1507         return 0;
1508 }
1509
1510 static struct rte_pci_driver mlx5_driver;
1511
1512 /**
1513  * PMD global initialization.
1514  *
1515  * Independent from individual device, this function initializes global
1516  * per-PMD data structures distinguishing primary and secondary processes.
1517  * Hence, each initialization is called once per a process.
1518  *
1519  * @return
1520  *   0 on success, a negative errno value otherwise and rte_errno is set.
1521  */
1522 static int
1523 mlx5_init_once(void)
1524 {
1525         struct mlx5_shared_data *sd;
1526         struct mlx5_local_data *ld = &mlx5_local_data;
1527         int ret = 0;
1528
1529         if (mlx5_init_shared_data())
1530                 return -rte_errno;
1531         sd = mlx5_shared_data;
1532         assert(sd);
1533         rte_spinlock_lock(&sd->lock);
1534         switch (rte_eal_process_type()) {
1535         case RTE_PROC_PRIMARY:
1536                 if (sd->init_done)
1537                         break;
1538                 LIST_INIT(&sd->mem_event_cb_list);
1539                 rte_rwlock_init(&sd->mem_event_rwlock);
1540                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1541                                                 mlx5_mr_mem_event_cb, NULL);
1542                 ret = mlx5_mp_init_primary();
1543                 if (ret)
1544                         goto out;
1545                 sd->init_done = true;
1546                 break;
1547         case RTE_PROC_SECONDARY:
1548                 if (ld->init_done)
1549                         break;
1550                 ret = mlx5_mp_init_secondary();
1551                 if (ret)
1552                         goto out;
1553                 ++sd->secondary_cnt;
1554                 ld->init_done = true;
1555                 break;
1556         default:
1557                 break;
1558         }
1559 out:
1560         rte_spinlock_unlock(&sd->lock);
1561         return ret;
1562 }
1563
1564 /**
1565  * Configures the minimal amount of data to inline into WQE
1566  * while sending packets.
1567  *
1568  * - the txq_inline_min has the maximal priority, if this
1569  *   key is specified in devargs
1570  * - if DevX is enabled the inline mode is queried from the
1571  *   device (HCA attributes and NIC vport context if needed).
1572  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1573  *   and none (0 bytes) for other NICs
1574  *
1575  * @param spawn
1576  *   Verbs device parameters (name, port, switch_info) to spawn.
1577  * @param config
1578  *   Device configuration parameters.
1579  */
1580 static void
1581 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1582                     struct mlx5_dev_config *config)
1583 {
1584         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1585                 /* Application defines size of inlined data explicitly. */
1586                 switch (spawn->pci_dev->id.device_id) {
1587                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1588                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1589                         if (config->txq_inline_min <
1590                                        (int)MLX5_INLINE_HSIZE_L2) {
1591                                 DRV_LOG(DEBUG,
1592                                         "txq_inline_mix aligned to minimal"
1593                                         " ConnectX-4 required value %d",
1594                                         (int)MLX5_INLINE_HSIZE_L2);
1595                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1596                         }
1597                         break;
1598                 }
1599                 goto exit;
1600         }
1601         if (config->hca_attr.eth_net_offloads) {
1602                 /* We have DevX enabled, inline mode queried successfully. */
1603                 switch (config->hca_attr.wqe_inline_mode) {
1604                 case MLX5_CAP_INLINE_MODE_L2:
1605                         /* outer L2 header must be inlined. */
1606                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1607                         goto exit;
1608                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1609                         /* No inline data are required by NIC. */
1610                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1611                         config->hw_vlan_insert =
1612                                 config->hca_attr.wqe_vlan_insert;
1613                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1614                         goto exit;
1615                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1616                         /* inline mode is defined by NIC vport context. */
1617                         if (!config->hca_attr.eth_virt)
1618                                 break;
1619                         switch (config->hca_attr.vport_inline_mode) {
1620                         case MLX5_INLINE_MODE_NONE:
1621                                 config->txq_inline_min =
1622                                         MLX5_INLINE_HSIZE_NONE;
1623                                 goto exit;
1624                         case MLX5_INLINE_MODE_L2:
1625                                 config->txq_inline_min =
1626                                         MLX5_INLINE_HSIZE_L2;
1627                                 goto exit;
1628                         case MLX5_INLINE_MODE_IP:
1629                                 config->txq_inline_min =
1630                                         MLX5_INLINE_HSIZE_L3;
1631                                 goto exit;
1632                         case MLX5_INLINE_MODE_TCP_UDP:
1633                                 config->txq_inline_min =
1634                                         MLX5_INLINE_HSIZE_L4;
1635                                 goto exit;
1636                         case MLX5_INLINE_MODE_INNER_L2:
1637                                 config->txq_inline_min =
1638                                         MLX5_INLINE_HSIZE_INNER_L2;
1639                                 goto exit;
1640                         case MLX5_INLINE_MODE_INNER_IP:
1641                                 config->txq_inline_min =
1642                                         MLX5_INLINE_HSIZE_INNER_L3;
1643                                 goto exit;
1644                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1645                                 config->txq_inline_min =
1646                                         MLX5_INLINE_HSIZE_INNER_L4;
1647                                 goto exit;
1648                         }
1649                 }
1650         }
1651         /*
1652          * We get here if we are unable to deduce
1653          * inline data size with DevX. Try PCI ID
1654          * to determine old NICs.
1655          */
1656         switch (spawn->pci_dev->id.device_id) {
1657         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1658         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1659         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1660         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1661                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1662                 config->hw_vlan_insert = 0;
1663                 break;
1664         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1665         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1666         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1667         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1668                 /*
1669                  * These NICs support VLAN insertion from WQE and
1670                  * report the wqe_vlan_insert flag. But there is the bug
1671                  * and PFC control may be broken, so disable feature.
1672                  */
1673                 config->hw_vlan_insert = 0;
1674                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1675                 break;
1676         default:
1677                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1678                 break;
1679         }
1680 exit:
1681         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1682 }
1683
1684 /**
1685  * Configures the metadata mask fields in the shared context.
1686  *
1687  * @param [in] dev
1688  *   Pointer to Ethernet device.
1689  */
1690 static void
1691 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1692 {
1693         struct mlx5_priv *priv = dev->data->dev_private;
1694         struct mlx5_ibv_shared *sh = priv->sh;
1695         uint32_t meta, mark, reg_c0;
1696
1697         reg_c0 = ~priv->vport_meta_mask;
1698         switch (priv->config.dv_xmeta_en) {
1699         case MLX5_XMETA_MODE_LEGACY:
1700                 meta = UINT32_MAX;
1701                 mark = MLX5_FLOW_MARK_MASK;
1702                 break;
1703         case MLX5_XMETA_MODE_META16:
1704                 meta = reg_c0 >> rte_bsf32(reg_c0);
1705                 mark = MLX5_FLOW_MARK_MASK;
1706                 break;
1707         case MLX5_XMETA_MODE_META32:
1708                 meta = UINT32_MAX;
1709                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1710                 break;
1711         default:
1712                 meta = 0;
1713                 mark = 0;
1714                 assert(false);
1715                 break;
1716         }
1717         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1718                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1719                                  sh->dv_mark_mask, mark);
1720         else
1721                 sh->dv_mark_mask = mark;
1722         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1723                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1724                                  sh->dv_meta_mask, meta);
1725         else
1726                 sh->dv_meta_mask = meta;
1727         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1728                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1729                                  sh->dv_meta_mask, reg_c0);
1730         else
1731                 sh->dv_regc0_mask = reg_c0;
1732         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1733         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1734         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1735         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1736 }
1737
1738 /**
1739  * Allocate page of door-bells and register it using DevX API.
1740  *
1741  * @param [in] dev
1742  *   Pointer to Ethernet device.
1743  *
1744  * @return
1745  *   Pointer to new page on success, NULL otherwise.
1746  */
1747 static struct mlx5_devx_dbr_page *
1748 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1749 {
1750         struct mlx5_priv *priv = dev->data->dev_private;
1751         struct mlx5_devx_dbr_page *page;
1752
1753         /* Allocate space for door-bell page and management data. */
1754         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1755                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1756         if (!page) {
1757                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1758                         dev->data->port_id);
1759                 return NULL;
1760         }
1761         /* Register allocated memory. */
1762         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1763                                               MLX5_DBR_PAGE_SIZE, 0);
1764         if (!page->umem) {
1765                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1766                         dev->data->port_id);
1767                 rte_free(page);
1768                 return NULL;
1769         }
1770         return page;
1771 }
1772
1773 /**
1774  * Find the next available door-bell, allocate new page if needed.
1775  *
1776  * @param [in] dev
1777  *   Pointer to Ethernet device.
1778  * @param [out] dbr_page
1779  *   Door-bell page containing the page data.
1780  *
1781  * @return
1782  *   Door-bell address offset on success, a negative error value otherwise.
1783  */
1784 int64_t
1785 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1786 {
1787         struct mlx5_priv *priv = dev->data->dev_private;
1788         struct mlx5_devx_dbr_page *page = NULL;
1789         uint32_t i, j;
1790
1791         LIST_FOREACH(page, &priv->dbrpgs, next)
1792                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1793                         break;
1794         if (!page) { /* No page with free door-bell exists. */
1795                 page = mlx5_alloc_dbr_page(dev);
1796                 if (!page) /* Failed to allocate new page. */
1797                         return (-1);
1798                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1799         }
1800         /* Loop to find bitmap part with clear bit. */
1801         for (i = 0;
1802              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1803              i++)
1804                 ; /* Empty. */
1805         /* Find the first clear bit. */
1806         j = rte_bsf64(~page->dbr_bitmap[i]);
1807         assert(i < (MLX5_DBR_PER_PAGE / 64));
1808         page->dbr_bitmap[i] |= (1 << j);
1809         page->dbr_count++;
1810         *dbr_page = page;
1811         return (((i * 64) + j) * sizeof(uint64_t));
1812 }
1813
1814 /**
1815  * Release a door-bell record.
1816  *
1817  * @param [in] dev
1818  *   Pointer to Ethernet device.
1819  * @param [in] umem_id
1820  *   UMEM ID of page containing the door-bell record to release.
1821  * @param [in] offset
1822  *   Offset of door-bell record in page.
1823  *
1824  * @return
1825  *   0 on success, a negative error value otherwise.
1826  */
1827 int32_t
1828 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1829 {
1830         struct mlx5_priv *priv = dev->data->dev_private;
1831         struct mlx5_devx_dbr_page *page = NULL;
1832         int ret = 0;
1833
1834         LIST_FOREACH(page, &priv->dbrpgs, next)
1835                 /* Find the page this address belongs to. */
1836                 if (page->umem->umem_id == umem_id)
1837                         break;
1838         if (!page)
1839                 return -EINVAL;
1840         page->dbr_count--;
1841         if (!page->dbr_count) {
1842                 /* Page not used, free it and remove from list. */
1843                 LIST_REMOVE(page, next);
1844                 if (page->umem)
1845                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1846                 rte_free(page);
1847         } else {
1848                 /* Mark in bitmap that this door-bell is not in use. */
1849                 offset /= MLX5_DBR_SIZE;
1850                 int i = offset / 64;
1851                 int j = offset % 64;
1852
1853                 page->dbr_bitmap[i] &= ~(1 << j);
1854         }
1855         return ret;
1856 }
1857
1858 /**
1859  * Check sibling device configurations.
1860  *
1861  * Sibling devices sharing the Infiniband device context
1862  * should have compatible configurations. This regards
1863  * representors and bonding slaves.
1864  *
1865  * @param priv
1866  *   Private device descriptor.
1867  * @param config
1868  *   Configuration of the device is going to be created.
1869  *
1870  * @return
1871  *   0 on success, EINVAL otherwise
1872  */
1873 static int
1874 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1875                               struct mlx5_dev_config *config)
1876 {
1877         struct mlx5_ibv_shared *sh = priv->sh;
1878         struct mlx5_dev_config *sh_conf = NULL;
1879         uint16_t port_id;
1880
1881         assert(sh);
1882         /* Nothing to compare for the single/first device. */
1883         if (sh->refcnt == 1)
1884                 return 0;
1885         /* Find the device with shared context. */
1886         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1887                 struct mlx5_priv *opriv =
1888                         rte_eth_devices[port_id].data->dev_private;
1889
1890                 if (opriv && opriv != priv && opriv->sh == sh) {
1891                         sh_conf = &opriv->config;
1892                         break;
1893                 }
1894         }
1895         if (!sh_conf)
1896                 return 0;
1897         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1898                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1899                              " for shared %s context", sh->ibdev_name);
1900                 rte_errno = EINVAL;
1901                 return rte_errno;
1902         }
1903         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1904                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1905                              " for shared %s context", sh->ibdev_name);
1906                 rte_errno = EINVAL;
1907                 return rte_errno;
1908         }
1909         return 0;
1910 }
1911 /**
1912  * Spawn an Ethernet device from Verbs information.
1913  *
1914  * @param dpdk_dev
1915  *   Backing DPDK device.
1916  * @param spawn
1917  *   Verbs device parameters (name, port, switch_info) to spawn.
1918  * @param config
1919  *   Device configuration parameters.
1920  *
1921  * @return
1922  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1923  *   is set. The following errors are defined:
1924  *
1925  *   EBUSY: device is not supposed to be spawned.
1926  *   EEXIST: device is already spawned
1927  */
1928 static struct rte_eth_dev *
1929 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1930                struct mlx5_dev_spawn_data *spawn,
1931                struct mlx5_dev_config config)
1932 {
1933         const struct mlx5_switch_info *switch_info = &spawn->info;
1934         struct mlx5_ibv_shared *sh = NULL;
1935         struct ibv_port_attr port_attr;
1936         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1937         struct rte_eth_dev *eth_dev = NULL;
1938         struct mlx5_priv *priv = NULL;
1939         int err = 0;
1940         unsigned int hw_padding = 0;
1941         unsigned int mps;
1942         unsigned int cqe_comp;
1943         unsigned int cqe_pad = 0;
1944         unsigned int tunnel_en = 0;
1945         unsigned int mpls_en = 0;
1946         unsigned int swp = 0;
1947         unsigned int mprq = 0;
1948         unsigned int mprq_min_stride_size_n = 0;
1949         unsigned int mprq_max_stride_size_n = 0;
1950         unsigned int mprq_min_stride_num_n = 0;
1951         unsigned int mprq_max_stride_num_n = 0;
1952         struct rte_ether_addr mac;
1953         char name[RTE_ETH_NAME_MAX_LEN];
1954         int own_domain_id = 0;
1955         uint16_t port_id;
1956         unsigned int i;
1957 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1958         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
1959 #endif
1960
1961         /* Determine if this port representor is supposed to be spawned. */
1962         if (switch_info->representor && dpdk_dev->devargs) {
1963                 struct rte_eth_devargs eth_da;
1964
1965                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1966                 if (err) {
1967                         rte_errno = -err;
1968                         DRV_LOG(ERR, "failed to process device arguments: %s",
1969                                 strerror(rte_errno));
1970                         return NULL;
1971                 }
1972                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1973                         if (eth_da.representor_ports[i] ==
1974                             (uint16_t)switch_info->port_name)
1975                                 break;
1976                 if (i == eth_da.nb_representor_ports) {
1977                         rte_errno = EBUSY;
1978                         return NULL;
1979                 }
1980         }
1981         /* Build device name. */
1982         if (spawn->pf_bond <  0) {
1983                 /* Single device. */
1984                 if (!switch_info->representor)
1985                         strlcpy(name, dpdk_dev->name, sizeof(name));
1986                 else
1987                         snprintf(name, sizeof(name), "%s_representor_%u",
1988                                  dpdk_dev->name, switch_info->port_name);
1989         } else {
1990                 /* Bonding device. */
1991                 if (!switch_info->representor)
1992                         snprintf(name, sizeof(name), "%s_%s",
1993                                  dpdk_dev->name, spawn->ibv_dev->name);
1994                 else
1995                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1996                                  dpdk_dev->name, spawn->ibv_dev->name,
1997                                  switch_info->port_name);
1998         }
1999         /* check if the device is already spawned */
2000         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2001                 rte_errno = EEXIST;
2002                 return NULL;
2003         }
2004         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2005         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2006                 eth_dev = rte_eth_dev_attach_secondary(name);
2007                 if (eth_dev == NULL) {
2008                         DRV_LOG(ERR, "can not attach rte ethdev");
2009                         rte_errno = ENOMEM;
2010                         return NULL;
2011                 }
2012                 eth_dev->device = dpdk_dev;
2013                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2014                 err = mlx5_proc_priv_init(eth_dev);
2015                 if (err)
2016                         return NULL;
2017                 /* Receive command fd from primary process */
2018                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2019                 if (err < 0)
2020                         return NULL;
2021                 /* Remap UAR for Tx queues. */
2022                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2023                 if (err)
2024                         return NULL;
2025                 /*
2026                  * Ethdev pointer is still required as input since
2027                  * the primary device is not accessible from the
2028                  * secondary process.
2029                  */
2030                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2031                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2032                 return eth_dev;
2033         }
2034         /*
2035          * Some parameters ("tx_db_nc" in particularly) are needed in
2036          * advance to create dv/verbs device context. We proceed the
2037          * devargs here to get ones, and later proceed devargs again
2038          * to override some hardware settings.
2039          */
2040         err = mlx5_args(&config, dpdk_dev->devargs);
2041         if (err) {
2042                 err = rte_errno;
2043                 DRV_LOG(ERR, "failed to process device arguments: %s",
2044                         strerror(rte_errno));
2045                 goto error;
2046         }
2047         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2048         if (!sh)
2049                 return NULL;
2050         config.devx = sh->devx;
2051 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2052         config.dest_tir = 1;
2053 #endif
2054 #ifdef HAVE_IBV_MLX5_MOD_SWP
2055         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2056 #endif
2057         /*
2058          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2059          * as all ConnectX-5 devices.
2060          */
2061 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2062         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2063 #endif
2064 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2065         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2066 #endif
2067         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2068         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2069                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2070                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2071                         mps = MLX5_MPW_ENHANCED;
2072                 } else {
2073                         DRV_LOG(DEBUG, "MPW is supported");
2074                         mps = MLX5_MPW;
2075                 }
2076         } else {
2077                 DRV_LOG(DEBUG, "MPW isn't supported");
2078                 mps = MLX5_MPW_DISABLED;
2079         }
2080 #ifdef HAVE_IBV_MLX5_MOD_SWP
2081         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2082                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2083         DRV_LOG(DEBUG, "SWP support: %u", swp);
2084 #endif
2085         config.swp = !!swp;
2086 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2087         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2088                 struct mlx5dv_striding_rq_caps mprq_caps =
2089                         dv_attr.striding_rq_caps;
2090
2091                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2092                         mprq_caps.min_single_stride_log_num_of_bytes);
2093                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2094                         mprq_caps.max_single_stride_log_num_of_bytes);
2095                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2096                         mprq_caps.min_single_wqe_log_num_of_strides);
2097                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2098                         mprq_caps.max_single_wqe_log_num_of_strides);
2099                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2100                         mprq_caps.supported_qpts);
2101                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2102                 mprq = 1;
2103                 mprq_min_stride_size_n =
2104                         mprq_caps.min_single_stride_log_num_of_bytes;
2105                 mprq_max_stride_size_n =
2106                         mprq_caps.max_single_stride_log_num_of_bytes;
2107                 mprq_min_stride_num_n =
2108                         mprq_caps.min_single_wqe_log_num_of_strides;
2109                 mprq_max_stride_num_n =
2110                         mprq_caps.max_single_wqe_log_num_of_strides;
2111                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2112                                                    mprq_min_stride_num_n);
2113         }
2114 #endif
2115         if (RTE_CACHE_LINE_SIZE == 128 &&
2116             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2117                 cqe_comp = 0;
2118         else
2119                 cqe_comp = 1;
2120         config.cqe_comp = cqe_comp;
2121 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2122         /* Whether device supports 128B Rx CQE padding. */
2123         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2124                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2125 #endif
2126 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2127         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2128                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2129                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2130                              (dv_attr.tunnel_offloads_caps &
2131                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2132         }
2133         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2134                 tunnel_en ? "" : "not ");
2135 #else
2136         DRV_LOG(WARNING,
2137                 "tunnel offloading disabled due to old OFED/rdma-core version");
2138 #endif
2139         config.tunnel_en = tunnel_en;
2140 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2141         mpls_en = ((dv_attr.tunnel_offloads_caps &
2142                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2143                    (dv_attr.tunnel_offloads_caps &
2144                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2145         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2146                 mpls_en ? "" : "not ");
2147 #else
2148         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2149                 " old OFED/rdma-core version or firmware configuration");
2150 #endif
2151         config.mpls_en = mpls_en;
2152         /* Check port status. */
2153         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2154         if (err) {
2155                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2156                 goto error;
2157         }
2158         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2159                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2160                 err = EINVAL;
2161                 goto error;
2162         }
2163         if (port_attr.state != IBV_PORT_ACTIVE)
2164                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2165                         mlx5_glue->port_state_str(port_attr.state),
2166                         port_attr.state);
2167         /* Allocate private eth device data. */
2168         priv = rte_zmalloc("ethdev private structure",
2169                            sizeof(*priv),
2170                            RTE_CACHE_LINE_SIZE);
2171         if (priv == NULL) {
2172                 DRV_LOG(ERR, "priv allocation failure");
2173                 err = ENOMEM;
2174                 goto error;
2175         }
2176         priv->sh = sh;
2177         priv->ibv_port = spawn->ibv_port;
2178         priv->pci_dev = spawn->pci_dev;
2179         priv->mtu = RTE_ETHER_MTU;
2180 #ifndef RTE_ARCH_64
2181         /* Initialize UAR access locks for 32bit implementations. */
2182         rte_spinlock_init(&priv->uar_lock_cq);
2183         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2184                 rte_spinlock_init(&priv->uar_lock[i]);
2185 #endif
2186         /* Some internal functions rely on Netlink sockets, open them now. */
2187         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2188         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2189         priv->nl_sn = 0;
2190         priv->representor = !!switch_info->representor;
2191         priv->master = !!switch_info->master;
2192         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2193         priv->vport_meta_tag = 0;
2194         priv->vport_meta_mask = 0;
2195         priv->pf_bond = spawn->pf_bond;
2196 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2197         /*
2198          * The DevX port query API is implemented. E-Switch may use
2199          * either vport or reg_c[0] metadata register to match on
2200          * vport index. The engaged part of metadata register is
2201          * defined by mask.
2202          */
2203         if (switch_info->representor || switch_info->master) {
2204                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2205                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2206                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2207                                                  &devx_port);
2208                 if (err) {
2209                         DRV_LOG(WARNING,
2210                                 "can't query devx port %d on device %s",
2211                                 spawn->ibv_port, spawn->ibv_dev->name);
2212                         devx_port.comp_mask = 0;
2213                 }
2214         }
2215         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2216                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2217                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2218                 if (!priv->vport_meta_mask) {
2219                         DRV_LOG(ERR, "vport zero mask for port %d"
2220                                      " on bonding device %s",
2221                                      spawn->ibv_port, spawn->ibv_dev->name);
2222                         err = ENOTSUP;
2223                         goto error;
2224                 }
2225                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2226                         DRV_LOG(ERR, "invalid vport tag for port %d"
2227                                      " on bonding device %s",
2228                                      spawn->ibv_port, spawn->ibv_dev->name);
2229                         err = ENOTSUP;
2230                         goto error;
2231                 }
2232         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2233                 priv->vport_id = devx_port.vport_num;
2234         } else if (spawn->pf_bond >= 0) {
2235                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2236                              " on bonding device %s",
2237                              spawn->ibv_port, spawn->ibv_dev->name);
2238                 err = ENOTSUP;
2239                 goto error;
2240         } else {
2241                 /* Suppose vport index in compatible way. */
2242                 priv->vport_id = switch_info->representor ?
2243                                  switch_info->port_name + 1 : -1;
2244         }
2245 #else
2246         /*
2247          * Kernel/rdma_core support single E-Switch per PF configurations
2248          * only and vport_id field contains the vport index for
2249          * associated VF, which is deduced from representor port name.
2250          * For example, let's have the IB device port 10, it has
2251          * attached network device eth0, which has port name attribute
2252          * pf0vf2, we can deduce the VF number as 2, and set vport index
2253          * as 3 (2+1). This assigning schema should be changed if the
2254          * multiple E-Switch instances per PF configurations or/and PCI
2255          * subfunctions are added.
2256          */
2257         priv->vport_id = switch_info->representor ?
2258                          switch_info->port_name + 1 : -1;
2259 #endif
2260         /* representor_id field keeps the unmodified VF index. */
2261         priv->representor_id = switch_info->representor ?
2262                                switch_info->port_name : -1;
2263         /*
2264          * Look for sibling devices in order to reuse their switch domain
2265          * if any, otherwise allocate one.
2266          */
2267         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2268                 const struct mlx5_priv *opriv =
2269                         rte_eth_devices[port_id].data->dev_private;
2270
2271                 if (!opriv ||
2272                     opriv->sh != priv->sh ||
2273                         opriv->domain_id ==
2274                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2275                         continue;
2276                 priv->domain_id = opriv->domain_id;
2277                 break;
2278         }
2279         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2280                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2281                 if (err) {
2282                         err = rte_errno;
2283                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2284                                 strerror(rte_errno));
2285                         goto error;
2286                 }
2287                 own_domain_id = 1;
2288         }
2289         /* Override some values set by hardware configuration. */
2290         mlx5_args(&config, dpdk_dev->devargs);
2291         err = mlx5_dev_check_sibling_config(priv, &config);
2292         if (err)
2293                 goto error;
2294         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2295                             IBV_DEVICE_RAW_IP_CSUM);
2296         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2297                 (config.hw_csum ? "" : "not "));
2298 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2299         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2300         DRV_LOG(DEBUG, "counters are not supported");
2301 #endif
2302 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2303         if (config.dv_flow_en) {
2304                 DRV_LOG(WARNING, "DV flow is not supported");
2305                 config.dv_flow_en = 0;
2306         }
2307 #endif
2308         config.ind_table_max_size =
2309                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2310         /*
2311          * Remove this check once DPDK supports larger/variable
2312          * indirection tables.
2313          */
2314         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2315                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2316         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2317                 config.ind_table_max_size);
2318         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2319                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2320         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2321                 (config.hw_vlan_strip ? "" : "not "));
2322         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2323                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2324         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2325                 (config.hw_fcs_strip ? "" : "not "));
2326 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2327         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2328 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2329         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2330                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2331 #endif
2332         if (config.hw_padding && !hw_padding) {
2333                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2334                 config.hw_padding = 0;
2335         } else if (config.hw_padding) {
2336                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2337         }
2338         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2339                       (sh->device_attr.tso_caps.supported_qpts &
2340                        (1 << IBV_QPT_RAW_PACKET)));
2341         if (config.tso)
2342                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2343         /*
2344          * MPW is disabled by default, while the Enhanced MPW is enabled
2345          * by default.
2346          */
2347         if (config.mps == MLX5_ARG_UNSET)
2348                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2349                                                           MLX5_MPW_DISABLED;
2350         else
2351                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2352         DRV_LOG(INFO, "%sMPS is %s",
2353                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2354                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2355         if (config.cqe_comp && !cqe_comp) {
2356                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2357                 config.cqe_comp = 0;
2358         }
2359         if (config.cqe_pad && !cqe_pad) {
2360                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2361                 config.cqe_pad = 0;
2362         } else if (config.cqe_pad) {
2363                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2364         }
2365         if (config.devx) {
2366                 priv->counter_fallback = 0;
2367                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2368                 if (err) {
2369                         err = -err;
2370                         goto error;
2371                 }
2372                 if (!config.hca_attr.flow_counters_dump)
2373                         priv->counter_fallback = 1;
2374 #ifndef HAVE_IBV_DEVX_ASYNC
2375                 priv->counter_fallback = 1;
2376 #endif
2377                 if (priv->counter_fallback)
2378                         DRV_LOG(INFO, "Use fall-back DV counter management");
2379                 /* Check for LRO support. */
2380                 if (config.dest_tir && config.hca_attr.lro_cap &&
2381                     config.dv_flow_en) {
2382                         /* TBD check tunnel lro caps. */
2383                         config.lro.supported = config.hca_attr.lro_cap;
2384                         DRV_LOG(DEBUG, "Device supports LRO");
2385                         /*
2386                          * If LRO timeout is not configured by application,
2387                          * use the minimal supported value.
2388                          */
2389                         if (!config.lro.timeout)
2390                                 config.lro.timeout =
2391                                 config.hca_attr.lro_timer_supported_periods[0];
2392                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2393                                 config.lro.timeout);
2394                 }
2395 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2396                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2397                     config.dv_flow_en) {
2398                         uint8_t reg_c_mask =
2399                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2400                         /*
2401                          * Meter needs two REG_C's for color match and pre-sfx
2402                          * flow match. Here get the REG_C for color match.
2403                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2404                          */
2405                         reg_c_mask &= 0xfc;
2406                         if (__builtin_popcount(reg_c_mask) < 1) {
2407                                 priv->mtr_en = 0;
2408                                 DRV_LOG(WARNING, "No available register for"
2409                                         " meter.");
2410                         } else {
2411                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2412                                                       REG_C_0;
2413                                 priv->mtr_en = 1;
2414                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2415                                         priv->mtr_color_reg);
2416                         }
2417                 }
2418 #endif
2419         }
2420         if (config.mprq.enabled && mprq) {
2421                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2422                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2423                         config.mprq.stride_num_n =
2424                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2425                                         mprq_min_stride_num_n);
2426                         DRV_LOG(WARNING,
2427                                 "the number of strides"
2428                                 " for Multi-Packet RQ is out of range,"
2429                                 " setting default value (%u)",
2430                                 1 << config.mprq.stride_num_n);
2431                 }
2432                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2433                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2434         } else if (config.mprq.enabled && !mprq) {
2435                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2436                 config.mprq.enabled = 0;
2437         }
2438         if (config.max_dump_files_num == 0)
2439                 config.max_dump_files_num = 128;
2440         eth_dev = rte_eth_dev_allocate(name);
2441         if (eth_dev == NULL) {
2442                 DRV_LOG(ERR, "can not allocate rte ethdev");
2443                 err = ENOMEM;
2444                 goto error;
2445         }
2446         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2447         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2448         if (priv->representor) {
2449                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2450                 eth_dev->data->representor_id = priv->representor_id;
2451         }
2452         /*
2453          * Store associated network device interface index. This index
2454          * is permanent throughout the lifetime of device. So, we may store
2455          * the ifindex here and use the cached value further.
2456          */
2457         assert(spawn->ifindex);
2458         priv->if_index = spawn->ifindex;
2459         eth_dev->data->dev_private = priv;
2460         priv->dev_data = eth_dev->data;
2461         eth_dev->data->mac_addrs = priv->mac;
2462         eth_dev->device = dpdk_dev;
2463         /* Configure the first MAC address by default. */
2464         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2465                 DRV_LOG(ERR,
2466                         "port %u cannot get MAC address, is mlx5_en"
2467                         " loaded? (errno: %s)",
2468                         eth_dev->data->port_id, strerror(rte_errno));
2469                 err = ENODEV;
2470                 goto error;
2471         }
2472         DRV_LOG(INFO,
2473                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2474                 eth_dev->data->port_id,
2475                 mac.addr_bytes[0], mac.addr_bytes[1],
2476                 mac.addr_bytes[2], mac.addr_bytes[3],
2477                 mac.addr_bytes[4], mac.addr_bytes[5]);
2478 #ifndef NDEBUG
2479         {
2480                 char ifname[IF_NAMESIZE];
2481
2482                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2483                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2484                                 eth_dev->data->port_id, ifname);
2485                 else
2486                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2487                                 eth_dev->data->port_id);
2488         }
2489 #endif
2490         /* Get actual MTU if possible. */
2491         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2492         if (err) {
2493                 err = rte_errno;
2494                 goto error;
2495         }
2496         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2497                 priv->mtu);
2498         /* Initialize burst functions to prevent crashes before link-up. */
2499         eth_dev->rx_pkt_burst = removed_rx_burst;
2500         eth_dev->tx_pkt_burst = removed_tx_burst;
2501         eth_dev->dev_ops = &mlx5_dev_ops;
2502         /* Register MAC address. */
2503         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2504         if (config.vf && config.vf_nl_en)
2505                 mlx5_nl_mac_addr_sync(eth_dev);
2506         TAILQ_INIT(&priv->flows);
2507         TAILQ_INIT(&priv->ctrl_flows);
2508         TAILQ_INIT(&priv->flow_meters);
2509         TAILQ_INIT(&priv->flow_meter_profiles);
2510         /* Hint libmlx5 to use PMD allocator for data plane resources */
2511         struct mlx5dv_ctx_allocators alctr = {
2512                 .alloc = &mlx5_alloc_verbs_buf,
2513                 .free = &mlx5_free_verbs_buf,
2514                 .data = priv,
2515         };
2516         mlx5_glue->dv_set_context_attr(sh->ctx,
2517                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2518                                        (void *)((uintptr_t)&alctr));
2519         /* Bring Ethernet device up. */
2520         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2521                 eth_dev->data->port_id);
2522         mlx5_set_link_up(eth_dev);
2523         /*
2524          * Even though the interrupt handler is not installed yet,
2525          * interrupts will still trigger on the async_fd from
2526          * Verbs context returned by ibv_open_device().
2527          */
2528         mlx5_link_update(eth_dev, 0);
2529 #ifdef HAVE_MLX5DV_DR_ESWITCH
2530         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2531               (switch_info->representor || switch_info->master)))
2532                 config.dv_esw_en = 0;
2533 #else
2534         config.dv_esw_en = 0;
2535 #endif
2536         /* Detect minimal data bytes to inline. */
2537         mlx5_set_min_inline(spawn, &config);
2538         /* Store device configuration on private structure. */
2539         priv->config = config;
2540         /* Create context for virtual machine VLAN workaround. */
2541         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2542         if (config.dv_flow_en) {
2543                 err = mlx5_alloc_shared_dr(priv);
2544                 if (err)
2545                         goto error;
2546                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2547                 if (!priv->qrss_id_pool) {
2548                         DRV_LOG(ERR, "can't create flow id pool");
2549                         err = ENOMEM;
2550                         goto error;
2551                 }
2552         }
2553         /* Supported Verbs flow priority number detection. */
2554         err = mlx5_flow_discover_priorities(eth_dev);
2555         if (err < 0) {
2556                 err = -err;
2557                 goto error;
2558         }
2559         priv->config.flow_prio = err;
2560         if (!priv->config.dv_esw_en &&
2561             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2562                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2563                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2564                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2565         }
2566         mlx5_set_metadata_mask(eth_dev);
2567         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2568             !priv->sh->dv_regc0_mask) {
2569                 DRV_LOG(ERR, "metadata mode %u is not supported "
2570                              "(no metadata reg_c[0] is available)",
2571                              priv->config.dv_xmeta_en);
2572                         err = ENOTSUP;
2573                         goto error;
2574         }
2575         /* Query availibility of metadata reg_c's. */
2576         err = mlx5_flow_discover_mreg_c(eth_dev);
2577         if (err < 0) {
2578                 err = -err;
2579                 goto error;
2580         }
2581         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2582                 DRV_LOG(DEBUG,
2583                         "port %u extensive metadata register is not supported",
2584                         eth_dev->data->port_id);
2585                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2586                         DRV_LOG(ERR, "metadata mode %u is not supported "
2587                                      "(no metadata registers available)",
2588                                      priv->config.dv_xmeta_en);
2589                         err = ENOTSUP;
2590                         goto error;
2591                 }
2592         }
2593         if (priv->config.dv_flow_en &&
2594             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2595             mlx5_flow_ext_mreg_supported(eth_dev) &&
2596             priv->sh->dv_regc0_mask) {
2597                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2598                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2599                 if (!priv->mreg_cp_tbl) {
2600                         err = ENOMEM;
2601                         goto error;
2602                 }
2603         }
2604         return eth_dev;
2605 error:
2606         if (priv) {
2607                 if (priv->mreg_cp_tbl)
2608                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2609                 if (priv->sh)
2610                         mlx5_free_shared_dr(priv);
2611                 if (priv->nl_socket_route >= 0)
2612                         close(priv->nl_socket_route);
2613                 if (priv->nl_socket_rdma >= 0)
2614                         close(priv->nl_socket_rdma);
2615                 if (priv->vmwa_context)
2616                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2617                 if (priv->qrss_id_pool)
2618                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2619                 if (own_domain_id)
2620                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2621                 rte_free(priv);
2622                 if (eth_dev != NULL)
2623                         eth_dev->data->dev_private = NULL;
2624         }
2625         if (eth_dev != NULL) {
2626                 /* mac_addrs must not be freed alone because part of dev_private */
2627                 eth_dev->data->mac_addrs = NULL;
2628                 rte_eth_dev_release_port(eth_dev);
2629         }
2630         if (sh)
2631                 mlx5_free_shared_ibctx(sh);
2632         assert(err > 0);
2633         rte_errno = err;
2634         return NULL;
2635 }
2636
2637 /**
2638  * Comparison callback to sort device data.
2639  *
2640  * This is meant to be used with qsort().
2641  *
2642  * @param a[in]
2643  *   Pointer to pointer to first data object.
2644  * @param b[in]
2645  *   Pointer to pointer to second data object.
2646  *
2647  * @return
2648  *   0 if both objects are equal, less than 0 if the first argument is less
2649  *   than the second, greater than 0 otherwise.
2650  */
2651 static int
2652 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2653 {
2654         const struct mlx5_switch_info *si_a =
2655                 &((const struct mlx5_dev_spawn_data *)a)->info;
2656         const struct mlx5_switch_info *si_b =
2657                 &((const struct mlx5_dev_spawn_data *)b)->info;
2658         int ret;
2659
2660         /* Master device first. */
2661         ret = si_b->master - si_a->master;
2662         if (ret)
2663                 return ret;
2664         /* Then representor devices. */
2665         ret = si_b->representor - si_a->representor;
2666         if (ret)
2667                 return ret;
2668         /* Unidentified devices come last in no specific order. */
2669         if (!si_a->representor)
2670                 return 0;
2671         /* Order representors by name. */
2672         return si_a->port_name - si_b->port_name;
2673 }
2674
2675 /**
2676  * Match PCI information for possible slaves of bonding device.
2677  *
2678  * @param[in] ibv_dev
2679  *   Pointer to Infiniband device structure.
2680  * @param[in] pci_dev
2681  *   Pointer to PCI device structure to match PCI address.
2682  * @param[in] nl_rdma
2683  *   Netlink RDMA group socket handle.
2684  *
2685  * @return
2686  *   negative value if no bonding device found, otherwise
2687  *   positive index of slave PF in bonding.
2688  */
2689 static int
2690 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2691                            const struct rte_pci_device *pci_dev,
2692                            int nl_rdma)
2693 {
2694         char ifname[IF_NAMESIZE + 1];
2695         unsigned int ifindex;
2696         unsigned int np, i;
2697         FILE *file = NULL;
2698         int pf = -1;
2699
2700         /*
2701          * Try to get master device name. If something goes
2702          * wrong suppose the lack of kernel support and no
2703          * bonding devices.
2704          */
2705         if (nl_rdma < 0)
2706                 return -1;
2707         if (!strstr(ibv_dev->name, "bond"))
2708                 return -1;
2709         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2710         if (!np)
2711                 return -1;
2712         /*
2713          * The Master device might not be on the predefined
2714          * port (not on port index 1, it is not garanted),
2715          * we have to scan all Infiniband device port and
2716          * find master.
2717          */
2718         for (i = 1; i <= np; ++i) {
2719                 /* Check whether Infiniband port is populated. */
2720                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2721                 if (!ifindex)
2722                         continue;
2723                 if (!if_indextoname(ifindex, ifname))
2724                         continue;
2725                 /* Try to read bonding slave names from sysfs. */
2726                 MKSTR(slaves,
2727                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2728                 file = fopen(slaves, "r");
2729                 if (file)
2730                         break;
2731         }
2732         if (!file)
2733                 return -1;
2734         /* Use safe format to check maximal buffer length. */
2735         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2736         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2737                 char tmp_str[IF_NAMESIZE + 32];
2738                 struct rte_pci_addr pci_addr;
2739                 struct mlx5_switch_info info;
2740
2741                 /* Process slave interface names in the loop. */
2742                 snprintf(tmp_str, sizeof(tmp_str),
2743                          "/sys/class/net/%s", ifname);
2744                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2745                         DRV_LOG(WARNING, "can not get PCI address"
2746                                          " for netdev \"%s\"", ifname);
2747                         continue;
2748                 }
2749                 if (pci_dev->addr.domain != pci_addr.domain ||
2750                     pci_dev->addr.bus != pci_addr.bus ||
2751                     pci_dev->addr.devid != pci_addr.devid ||
2752                     pci_dev->addr.function != pci_addr.function)
2753                         continue;
2754                 /* Slave interface PCI address match found. */
2755                 fclose(file);
2756                 snprintf(tmp_str, sizeof(tmp_str),
2757                          "/sys/class/net/%s/phys_port_name", ifname);
2758                 file = fopen(tmp_str, "rb");
2759                 if (!file)
2760                         break;
2761                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2762                 if (fscanf(file, "%32s", tmp_str) == 1)
2763                         mlx5_translate_port_name(tmp_str, &info);
2764                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2765                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2766                         pf = info.port_name;
2767                 break;
2768         }
2769         if (file)
2770                 fclose(file);
2771         return pf;
2772 }
2773
2774 /**
2775  * DPDK callback to register a PCI device.
2776  *
2777  * This function spawns Ethernet devices out of a given PCI device.
2778  *
2779  * @param[in] pci_drv
2780  *   PCI driver structure (mlx5_driver).
2781  * @param[in] pci_dev
2782  *   PCI device information.
2783  *
2784  * @return
2785  *   0 on success, a negative errno value otherwise and rte_errno is set.
2786  */
2787 static int
2788 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2789                struct rte_pci_device *pci_dev)
2790 {
2791         struct ibv_device **ibv_list;
2792         /*
2793          * Number of found IB Devices matching with requested PCI BDF.
2794          * nd != 1 means there are multiple IB devices over the same
2795          * PCI device and we have representors and master.
2796          */
2797         unsigned int nd = 0;
2798         /*
2799          * Number of found IB device Ports. nd = 1 and np = 1..n means
2800          * we have the single multiport IB device, and there may be
2801          * representors attached to some of found ports.
2802          */
2803         unsigned int np = 0;
2804         /*
2805          * Number of DPDK ethernet devices to Spawn - either over
2806          * multiple IB devices or multiple ports of single IB device.
2807          * Actually this is the number of iterations to spawn.
2808          */
2809         unsigned int ns = 0;
2810         /*
2811          * Bonding device
2812          *   < 0 - no bonding device (single one)
2813          *  >= 0 - bonding device (value is slave PF index)
2814          */
2815         int bd = -1;
2816         struct mlx5_dev_spawn_data *list = NULL;
2817         struct mlx5_dev_config dev_config;
2818         int ret;
2819
2820         ret = mlx5_init_once();
2821         if (ret) {
2822                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2823                         strerror(rte_errno));
2824                 return -rte_errno;
2825         }
2826         assert(pci_drv == &mlx5_driver);
2827         errno = 0;
2828         ibv_list = mlx5_glue->get_device_list(&ret);
2829         if (!ibv_list) {
2830                 rte_errno = errno ? errno : ENOSYS;
2831                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2832                 return -rte_errno;
2833         }
2834         /*
2835          * First scan the list of all Infiniband devices to find
2836          * matching ones, gathering into the list.
2837          */
2838         struct ibv_device *ibv_match[ret + 1];
2839         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2840         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2841         unsigned int i;
2842
2843         while (ret-- > 0) {
2844                 struct rte_pci_addr pci_addr;
2845
2846                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2847                 bd = mlx5_device_bond_pci_match
2848                                 (ibv_list[ret], pci_dev, nl_rdma);
2849                 if (bd >= 0) {
2850                         /*
2851                          * Bonding device detected. Only one match is allowed,
2852                          * the bonding is supported over multi-port IB device,
2853                          * there should be no matches on representor PCI
2854                          * functions or non VF LAG bonding devices with
2855                          * specified address.
2856                          */
2857                         if (nd) {
2858                                 DRV_LOG(ERR,
2859                                         "multiple PCI match on bonding device"
2860                                         "\"%s\" found", ibv_list[ret]->name);
2861                                 rte_errno = ENOENT;
2862                                 ret = -rte_errno;
2863                                 goto exit;
2864                         }
2865                         DRV_LOG(INFO, "PCI information matches for"
2866                                       " slave %d bonding device \"%s\"",
2867                                       bd, ibv_list[ret]->name);
2868                         ibv_match[nd++] = ibv_list[ret];
2869                         break;
2870                 }
2871                 if (mlx5_dev_to_pci_addr
2872                         (ibv_list[ret]->ibdev_path, &pci_addr))
2873                         continue;
2874                 if (pci_dev->addr.domain != pci_addr.domain ||
2875                     pci_dev->addr.bus != pci_addr.bus ||
2876                     pci_dev->addr.devid != pci_addr.devid ||
2877                     pci_dev->addr.function != pci_addr.function)
2878                         continue;
2879                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2880                         ibv_list[ret]->name);
2881                 ibv_match[nd++] = ibv_list[ret];
2882         }
2883         ibv_match[nd] = NULL;
2884         if (!nd) {
2885                 /* No device matches, just complain and bail out. */
2886                 DRV_LOG(WARNING,
2887                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2888                         " are kernel drivers loaded?",
2889                         pci_dev->addr.domain, pci_dev->addr.bus,
2890                         pci_dev->addr.devid, pci_dev->addr.function);
2891                 rte_errno = ENOENT;
2892                 ret = -rte_errno;
2893                 goto exit;
2894         }
2895         if (nd == 1) {
2896                 /*
2897                  * Found single matching device may have multiple ports.
2898                  * Each port may be representor, we have to check the port
2899                  * number and check the representors existence.
2900                  */
2901                 if (nl_rdma >= 0)
2902                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2903                 if (!np)
2904                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2905                                          " ports number", ibv_match[0]->name);
2906                 if (bd >= 0 && !np) {
2907                         DRV_LOG(ERR, "can not get ports"
2908                                      " for bonding device");
2909                         rte_errno = ENOENT;
2910                         ret = -rte_errno;
2911                         goto exit;
2912                 }
2913         }
2914 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2915         if (bd >= 0) {
2916                 /*
2917                  * This may happen if there is VF LAG kernel support and
2918                  * application is compiled with older rdma_core library.
2919                  */
2920                 DRV_LOG(ERR,
2921                         "No kernel/verbs support for VF LAG bonding found.");
2922                 rte_errno = ENOTSUP;
2923                 ret = -rte_errno;
2924                 goto exit;
2925         }
2926 #endif
2927         /*
2928          * Now we can determine the maximal
2929          * amount of devices to be spawned.
2930          */
2931         list = rte_zmalloc("device spawn data",
2932                          sizeof(struct mlx5_dev_spawn_data) *
2933                          (np ? np : nd),
2934                          RTE_CACHE_LINE_SIZE);
2935         if (!list) {
2936                 DRV_LOG(ERR, "spawn data array allocation failure");
2937                 rte_errno = ENOMEM;
2938                 ret = -rte_errno;
2939                 goto exit;
2940         }
2941         if (bd >= 0 || np > 1) {
2942                 /*
2943                  * Single IB device with multiple ports found,
2944                  * it may be E-Switch master device and representors.
2945                  * We have to perform identification trough the ports.
2946                  */
2947                 assert(nl_rdma >= 0);
2948                 assert(ns == 0);
2949                 assert(nd == 1);
2950                 assert(np);
2951                 for (i = 1; i <= np; ++i) {
2952                         list[ns].max_port = np;
2953                         list[ns].ibv_port = i;
2954                         list[ns].ibv_dev = ibv_match[0];
2955                         list[ns].eth_dev = NULL;
2956                         list[ns].pci_dev = pci_dev;
2957                         list[ns].pf_bond = bd;
2958                         list[ns].ifindex = mlx5_nl_ifindex
2959                                         (nl_rdma, list[ns].ibv_dev->name, i);
2960                         if (!list[ns].ifindex) {
2961                                 /*
2962                                  * No network interface index found for the
2963                                  * specified port, it means there is no
2964                                  * representor on this port. It's OK,
2965                                  * there can be disabled ports, for example
2966                                  * if sriov_numvfs < sriov_totalvfs.
2967                                  */
2968                                 continue;
2969                         }
2970                         ret = -1;
2971                         if (nl_route >= 0)
2972                                 ret = mlx5_nl_switch_info
2973                                                (nl_route,
2974                                                 list[ns].ifindex,
2975                                                 &list[ns].info);
2976                         if (ret || (!list[ns].info.representor &&
2977                                     !list[ns].info.master)) {
2978                                 /*
2979                                  * We failed to recognize representors with
2980                                  * Netlink, let's try to perform the task
2981                                  * with sysfs.
2982                                  */
2983                                 ret =  mlx5_sysfs_switch_info
2984                                                 (list[ns].ifindex,
2985                                                  &list[ns].info);
2986                         }
2987                         if (!ret && bd >= 0) {
2988                                 switch (list[ns].info.name_type) {
2989                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2990                                         if (list[ns].info.port_name == bd)
2991                                                 ns++;
2992                                         break;
2993                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2994                                         if (list[ns].info.pf_num == bd)
2995                                                 ns++;
2996                                         break;
2997                                 default:
2998                                         break;
2999                                 }
3000                                 continue;
3001                         }
3002                         if (!ret && (list[ns].info.representor ^
3003                                      list[ns].info.master))
3004                                 ns++;
3005                 }
3006                 if (!ns) {
3007                         DRV_LOG(ERR,
3008                                 "unable to recognize master/representors"
3009                                 " on the IB device with multiple ports");
3010                         rte_errno = ENOENT;
3011                         ret = -rte_errno;
3012                         goto exit;
3013                 }
3014         } else {
3015                 /*
3016                  * The existence of several matching entries (nd > 1) means
3017                  * port representors have been instantiated. No existing Verbs
3018                  * call nor sysfs entries can tell them apart, this can only
3019                  * be done through Netlink calls assuming kernel drivers are
3020                  * recent enough to support them.
3021                  *
3022                  * In the event of identification failure through Netlink,
3023                  * try again through sysfs, then:
3024                  *
3025                  * 1. A single IB device matches (nd == 1) with single
3026                  *    port (np=0/1) and is not a representor, assume
3027                  *    no switch support.
3028                  *
3029                  * 2. Otherwise no safe assumptions can be made;
3030                  *    complain louder and bail out.
3031                  */
3032                 np = 1;
3033                 for (i = 0; i != nd; ++i) {
3034                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3035                         list[ns].max_port = 1;
3036                         list[ns].ibv_port = 1;
3037                         list[ns].ibv_dev = ibv_match[i];
3038                         list[ns].eth_dev = NULL;
3039                         list[ns].pci_dev = pci_dev;
3040                         list[ns].pf_bond = -1;
3041                         list[ns].ifindex = 0;
3042                         if (nl_rdma >= 0)
3043                                 list[ns].ifindex = mlx5_nl_ifindex
3044                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3045                         if (!list[ns].ifindex) {
3046                                 char ifname[IF_NAMESIZE];
3047
3048                                 /*
3049                                  * Netlink failed, it may happen with old
3050                                  * ib_core kernel driver (before 4.16).
3051                                  * We can assume there is old driver because
3052                                  * here we are processing single ports IB
3053                                  * devices. Let's try sysfs to retrieve
3054                                  * the ifindex. The method works for
3055                                  * master device only.
3056                                  */
3057                                 if (nd > 1) {
3058                                         /*
3059                                          * Multiple devices found, assume
3060                                          * representors, can not distinguish
3061                                          * master/representor and retrieve
3062                                          * ifindex via sysfs.
3063                                          */
3064                                         continue;
3065                                 }
3066                                 ret = mlx5_get_master_ifname
3067                                         (ibv_match[i]->ibdev_path, &ifname);
3068                                 if (!ret)
3069                                         list[ns].ifindex =
3070                                                 if_nametoindex(ifname);
3071                                 if (!list[ns].ifindex) {
3072                                         /*
3073                                          * No network interface index found
3074                                          * for the specified device, it means
3075                                          * there it is neither representor
3076                                          * nor master.
3077                                          */
3078                                         continue;
3079                                 }
3080                         }
3081                         ret = -1;
3082                         if (nl_route >= 0)
3083                                 ret = mlx5_nl_switch_info
3084                                                (nl_route,
3085                                                 list[ns].ifindex,
3086                                                 &list[ns].info);
3087                         if (ret || (!list[ns].info.representor &&
3088                                     !list[ns].info.master)) {
3089                                 /*
3090                                  * We failed to recognize representors with
3091                                  * Netlink, let's try to perform the task
3092                                  * with sysfs.
3093                                  */
3094                                 ret =  mlx5_sysfs_switch_info
3095                                                 (list[ns].ifindex,
3096                                                  &list[ns].info);
3097                         }
3098                         if (!ret && (list[ns].info.representor ^
3099                                      list[ns].info.master)) {
3100                                 ns++;
3101                         } else if ((nd == 1) &&
3102                                    !list[ns].info.representor &&
3103                                    !list[ns].info.master) {
3104                                 /*
3105                                  * Single IB device with
3106                                  * one physical port and
3107                                  * attached network device.
3108                                  * May be SRIOV is not enabled
3109                                  * or there is no representors.
3110                                  */
3111                                 DRV_LOG(INFO, "no E-Switch support detected");
3112                                 ns++;
3113                                 break;
3114                         }
3115                 }
3116                 if (!ns) {
3117                         DRV_LOG(ERR,
3118                                 "unable to recognize master/representors"
3119                                 " on the multiple IB devices");
3120                         rte_errno = ENOENT;
3121                         ret = -rte_errno;
3122                         goto exit;
3123                 }
3124         }
3125         assert(ns);
3126         /*
3127          * Sort list to probe devices in natural order for users convenience
3128          * (i.e. master first, then representors from lowest to highest ID).
3129          */
3130         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3131         /* Default configuration. */
3132         dev_config = (struct mlx5_dev_config){
3133                 .hw_padding = 0,
3134                 .mps = MLX5_ARG_UNSET,
3135                 .dbnc = MLX5_ARG_UNSET,
3136                 .rx_vec_en = 1,
3137                 .txq_inline_max = MLX5_ARG_UNSET,
3138                 .txq_inline_min = MLX5_ARG_UNSET,
3139                 .txq_inline_mpw = MLX5_ARG_UNSET,
3140                 .txqs_inline = MLX5_ARG_UNSET,
3141                 .vf_nl_en = 1,
3142                 .mr_ext_memseg_en = 1,
3143                 .mprq = {
3144                         .enabled = 0, /* Disabled by default. */
3145                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3146                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3147                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3148                 },
3149                 .dv_esw_en = 1,
3150         };
3151         /* Device specific configuration. */
3152         switch (pci_dev->id.device_id) {
3153         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3154         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3155         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3156         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3157         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3158         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3159         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3160                 dev_config.vf = 1;
3161                 break;
3162         default:
3163                 break;
3164         }
3165         for (i = 0; i != ns; ++i) {
3166                 uint32_t restore;
3167
3168                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3169                                                  &list[i],
3170                                                  dev_config);
3171                 if (!list[i].eth_dev) {
3172                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3173                                 break;
3174                         /* Device is disabled or already spawned. Ignore it. */
3175                         continue;
3176                 }
3177                 restore = list[i].eth_dev->data->dev_flags;
3178                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3179                 /* Restore non-PCI flags cleared by the above call. */
3180                 list[i].eth_dev->data->dev_flags |= restore;
3181                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3182                 rte_eth_dev_probing_finish(list[i].eth_dev);
3183         }
3184         if (i != ns) {
3185                 DRV_LOG(ERR,
3186                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3187                         " encountering an error: %s",
3188                         pci_dev->addr.domain, pci_dev->addr.bus,
3189                         pci_dev->addr.devid, pci_dev->addr.function,
3190                         strerror(rte_errno));
3191                 ret = -rte_errno;
3192                 /* Roll back. */
3193                 while (i--) {
3194                         if (!list[i].eth_dev)
3195                                 continue;
3196                         mlx5_dev_close(list[i].eth_dev);
3197                         /* mac_addrs must not be freed because in dev_private */
3198                         list[i].eth_dev->data->mac_addrs = NULL;
3199                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3200                 }
3201                 /* Restore original error. */
3202                 rte_errno = -ret;
3203         } else {
3204                 ret = 0;
3205         }
3206 exit:
3207         /*
3208          * Do the routine cleanup:
3209          * - close opened Netlink sockets
3210          * - free allocated spawn data array
3211          * - free the Infiniband device list
3212          */
3213         if (nl_rdma >= 0)
3214                 close(nl_rdma);
3215         if (nl_route >= 0)
3216                 close(nl_route);
3217         if (list)
3218                 rte_free(list);
3219         assert(ibv_list);
3220         mlx5_glue->free_device_list(ibv_list);
3221         return ret;
3222 }
3223
3224 /**
3225  * Look for the ethernet device belonging to mlx5 driver.
3226  *
3227  * @param[in] port_id
3228  *   port_id to start looking for device.
3229  * @param[in] pci_dev
3230  *   Pointer to the hint PCI device. When device is being probed
3231  *   the its siblings (master and preceding representors might
3232  *   not have assigned driver yet (because the mlx5_pci_probe()
3233  *   is not completed yet, for this case match on hint PCI
3234  *   device may be used to detect sibling device.
3235  *
3236  * @return
3237  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3238  */
3239 uint16_t
3240 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3241 {
3242         while (port_id < RTE_MAX_ETHPORTS) {
3243                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3244
3245                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3246                     dev->device &&
3247                     (dev->device == &pci_dev->device ||
3248                      (dev->device->driver &&
3249                      dev->device->driver->name &&
3250                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3251                         break;
3252                 port_id++;
3253         }
3254         if (port_id >= RTE_MAX_ETHPORTS)
3255                 return RTE_MAX_ETHPORTS;
3256         return port_id;
3257 }
3258
3259 /**
3260  * DPDK callback to remove a PCI device.
3261  *
3262  * This function removes all Ethernet devices belong to a given PCI device.
3263  *
3264  * @param[in] pci_dev
3265  *   Pointer to the PCI device.
3266  *
3267  * @return
3268  *   0 on success, the function cannot fail.
3269  */
3270 static int
3271 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3272 {
3273         uint16_t port_id;
3274
3275         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3276                 rte_eth_dev_close(port_id);
3277         return 0;
3278 }
3279
3280 static const struct rte_pci_id mlx5_pci_id_map[] = {
3281         {
3282                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3283                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3284         },
3285         {
3286                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3287                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3288         },
3289         {
3290                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3291                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3292         },
3293         {
3294                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3295                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3296         },
3297         {
3298                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3299                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3300         },
3301         {
3302                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3303                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3304         },
3305         {
3306                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3307                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3308         },
3309         {
3310                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3311                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3312         },
3313         {
3314                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3315                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3316         },
3317         {
3318                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3319                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3320         },
3321         {
3322                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3323                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3324         },
3325         {
3326                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3327                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3328         },
3329         {
3330                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3331                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3332         },
3333         {
3334                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3335                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3336         },
3337         {
3338                 .vendor_id = 0
3339         }
3340 };
3341
3342 static struct rte_pci_driver mlx5_driver = {
3343         .driver = {
3344                 .name = MLX5_DRIVER_NAME
3345         },
3346         .id_table = mlx5_pci_id_map,
3347         .probe = mlx5_pci_probe,
3348         .remove = mlx5_pci_remove,
3349         .dma_map = mlx5_dma_map,
3350         .dma_unmap = mlx5_dma_unmap,
3351         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3352                      RTE_PCI_DRV_PROBE_AGAIN,
3353 };
3354
3355 #ifdef RTE_IBVERBS_LINK_DLOPEN
3356
3357 /**
3358  * Suffix RTE_EAL_PMD_PATH with "-glue".
3359  *
3360  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3361  * suffixing its last component.
3362  *
3363  * @param buf[out]
3364  *   Output buffer, should be large enough otherwise NULL is returned.
3365  * @param size
3366  *   Size of @p out.
3367  *
3368  * @return
3369  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3370  */
3371 static char *
3372 mlx5_glue_path(char *buf, size_t size)
3373 {
3374         static const char *const bad[] = { "/", ".", "..", NULL };
3375         const char *path = RTE_EAL_PMD_PATH;
3376         size_t len = strlen(path);
3377         size_t off;
3378         int i;
3379
3380         while (len && path[len - 1] == '/')
3381                 --len;
3382         for (off = len; off && path[off - 1] != '/'; --off)
3383                 ;
3384         for (i = 0; bad[i]; ++i)
3385                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3386                         goto error;
3387         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3388         if (i == -1 || (size_t)i >= size)
3389                 goto error;
3390         return buf;
3391 error:
3392         DRV_LOG(ERR,
3393                 "unable to append \"-glue\" to last component of"
3394                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3395                 " please re-configure DPDK");
3396         return NULL;
3397 }
3398
3399 /**
3400  * Initialization routine for run-time dependency on rdma-core.
3401  */
3402 static int
3403 mlx5_glue_init(void)
3404 {
3405         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3406         const char *path[] = {
3407                 /*
3408                  * A basic security check is necessary before trusting
3409                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3410                  */
3411                 (geteuid() == getuid() && getegid() == getgid() ?
3412                  getenv("MLX5_GLUE_PATH") : NULL),
3413                 /*
3414                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3415                  * variant, otherwise let dlopen() look up libraries on its
3416                  * own.
3417                  */
3418                 (*RTE_EAL_PMD_PATH ?
3419                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3420         };
3421         unsigned int i = 0;
3422         void *handle = NULL;
3423         void **sym;
3424         const char *dlmsg;
3425
3426         while (!handle && i != RTE_DIM(path)) {
3427                 const char *end;
3428                 size_t len;
3429                 int ret;
3430
3431                 if (!path[i]) {
3432                         ++i;
3433                         continue;
3434                 }
3435                 end = strpbrk(path[i], ":;");
3436                 if (!end)
3437                         end = path[i] + strlen(path[i]);
3438                 len = end - path[i];
3439                 ret = 0;
3440                 do {
3441                         char name[ret + 1];
3442
3443                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3444                                        (int)len, path[i],
3445                                        (!len || *(end - 1) == '/') ? "" : "/");
3446                         if (ret == -1)
3447                                 break;
3448                         if (sizeof(name) != (size_t)ret + 1)
3449                                 continue;
3450                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3451                                 name);
3452                         handle = dlopen(name, RTLD_LAZY);
3453                         break;
3454                 } while (1);
3455                 path[i] = end + 1;
3456                 if (!*end)
3457                         ++i;
3458         }
3459         if (!handle) {
3460                 rte_errno = EINVAL;
3461                 dlmsg = dlerror();
3462                 if (dlmsg)
3463                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3464                 goto glue_error;
3465         }
3466         sym = dlsym(handle, "mlx5_glue");
3467         if (!sym || !*sym) {
3468                 rte_errno = EINVAL;
3469                 dlmsg = dlerror();
3470                 if (dlmsg)
3471                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3472                 goto glue_error;
3473         }
3474         mlx5_glue = *sym;
3475         return 0;
3476 glue_error:
3477         if (handle)
3478                 dlclose(handle);
3479         DRV_LOG(WARNING,
3480                 "cannot initialize PMD due to missing run-time dependency on"
3481                 " rdma-core libraries (libibverbs, libmlx5)");
3482         return -rte_errno;
3483 }
3484
3485 #endif
3486
3487 /**
3488  * Driver initialization routine.
3489  */
3490 RTE_INIT(rte_mlx5_pmd_init)
3491 {
3492         /* Initialize driver log type. */
3493         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3494         if (mlx5_logtype >= 0)
3495                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3496
3497         /* Build the static tables for Verbs conversion. */
3498         mlx5_set_ptype_table();
3499         mlx5_set_cksum_table();
3500         mlx5_set_swp_types_table();
3501         /*
3502          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3503          * huge pages. Calling ibv_fork_init() during init allows
3504          * applications to use fork() safely for purposes other than
3505          * using this PMD, which is not supported in forked processes.
3506          */
3507         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3508         /* Match the size of Rx completion entry to the size of a cacheline. */
3509         if (RTE_CACHE_LINE_SIZE == 128)
3510                 setenv("MLX5_CQE_SIZE", "128", 0);
3511         /*
3512          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3513          * cleanup all the Verbs resources even when the device was removed.
3514          */
3515         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3516 #ifdef RTE_IBVERBS_LINK_DLOPEN
3517         if (mlx5_glue_init())
3518                 return;
3519         assert(mlx5_glue);
3520 #endif
3521 #ifndef NDEBUG
3522         /* Glue structure must not contain any NULL pointers. */
3523         {
3524                 unsigned int i;
3525
3526                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3527                         assert(((const void *const *)mlx5_glue)[i]);
3528         }
3529 #endif
3530         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3531                 DRV_LOG(ERR,
3532                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3533                         mlx5_glue->version, MLX5_GLUE_VERSION);
3534                 return;
3535         }
3536         mlx5_glue->fork_init();
3537         rte_pci_register(&mlx5_driver);
3538 }
3539
3540 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3541 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3542 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");