drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to force doorbell register mapping
 100  * to non-cahed region eliminating the extra write memory barrier.
 101  */
 102 #define MLX5_TX_DB_NC "tx_db_nc"
 103
 104 /*
 105  * Device parameter to include 2 dsegs in the title WQEBB.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 109
 110 /*
 111  * Device parameter to limit the size of inlining packet.
 112  * Deprecated, ignored.
 113  */
 114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 115
 116 /*
 117  * Device parameter to enable hardware Tx vector.
 118  * Deprecated, ignored (no vectorized Tx routines anymore).
 119  */
 120 #define MLX5_TX_VEC_EN "tx_vec_en"
 121
 122 /* Device parameter to enable hardware Rx vector. */
 123 #define MLX5_RX_VEC_EN "rx_vec_en"
 124
 125 /* Allow L3 VXLAN flow creation. */
 126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 127
 128 /* Activate DV E-Switch flow steering. */
 129 #define MLX5_DV_ESW_EN "dv_esw_en"
 130
 131 /* Activate DV flow steering. */
 132 #define MLX5_DV_FLOW_EN "dv_flow_en"
 133
 134 /* Enable extensive flow metadata support. */
 135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 136
 137 /* Activate Netlink support in VF mode. */
 138 #define MLX5_VF_NL_EN "vf_nl_en"
 139
 140 /* Enable extending memsegs when creating a MR. */
 141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 142
 143 /* Select port representors to instantiate. */
 144 #define MLX5_REPRESENTOR "representor"
 145
 146 /* Device parameter to configure the maximum number of dump files per queue. */
 147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 148
 149 /* Configure timeout of LRO session (in microseconds). */
 150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 151
 152 #ifndef HAVE_IBV_MLX5_MOD_MPW
 153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 155 #endif
 156
 157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 159 #endif
 160
 161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 162
 163 /* Shared memory between primary and secondary processes. */
 164 struct mlx5_shared_data *mlx5_shared_data;
 165
 166 /* Spinlock for mlx5_shared_data allocation. */
 167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 168
 169 /* Process local data for secondary processes. */
 170 static struct mlx5_local_data mlx5_local_data;
 171
 172 /** Driver-specific log messages type. */
 173 int mlx5_logtype;
 174
 175 /** Data associated with devices to spawn. */
 176 struct mlx5_dev_spawn_data {
 177         uint32_t ifindex; /**< Network interface index. */
 178         uint32_t max_port; /**< IB device maximal port index. */
 179         uint32_t ibv_port; /**< IB device physical port index. */
 180         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 181         struct mlx5_switch_info info; /**< Switch information. */
 182         struct ibv_device *ibv_dev; /**< Associated IB device. */
 183         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 184         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 185 };
 186
 187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 189
 190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 192
 193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
 194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
 195
 196 /**
 197  * Allocate ID pool structure.
 198  *
 199  * @return
 200  *   Pointer to pool object, NULL value otherwise.
 201  */
 202 struct mlx5_flow_id_pool *
 203 mlx5_flow_id_pool_alloc(void)
 204 {
 205         struct mlx5_flow_id_pool *pool;
 206         void *mem;
 207
 208         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 209                            RTE_CACHE_LINE_SIZE);
 210         if (!pool) {
 211                 DRV_LOG(ERR, "can't allocate id pool");
 212                 rte_errno  = ENOMEM;
 213                 return NULL;
 214         }
 215         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 216                           RTE_CACHE_LINE_SIZE);
 217         if (!mem) {
 218                 DRV_LOG(ERR, "can't allocate mem for id pool");
 219                 rte_errno  = ENOMEM;
 220                 goto error;
 221         }
 222         pool->free_arr = mem;
 223         pool->curr = pool->free_arr;
 224         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 225         pool->base_index = 0;
 226         return pool;
 227 error:
 228         rte_free(pool);
 229         return NULL;
 230 }
 231
 232 /**
 233  * Release ID pool structure.
 234  *
 235  * @param[in] pool
 236  *   Pointer to flow id pool object to free.
 237  */
 238 void
 239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 240 {
 241         rte_free(pool->free_arr);
 242         rte_free(pool);
 243 }
 244
 245 /**
 246  * Generate ID.
 247  *
 248  * @param[in] pool
 249  *   Pointer to flow id pool.
 250  * @param[out] id
 251  *   The generated ID.
 252  *
 253  * @return
 254  *   0 on success, error value otherwise.
 255  */
 256 uint32_t
 257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 258 {
 259         if (pool->curr == pool->free_arr) {
 260                 if (pool->base_index == UINT32_MAX) {
 261                         rte_errno  = ENOMEM;
 262                         DRV_LOG(ERR, "no free id");
 263                         return -rte_errno;
 264                 }
 265                 *id = ++pool->base_index;
 266                 return 0;
 267         }
 268         *id = *(--pool->curr);
 269         return 0;
 270 }
 271
 272 /**
 273  * Release ID.
 274  *
 275  * @param[in] pool
 276  *   Pointer to flow id pool.
 277  * @param[out] id
 278  *   The generated ID.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 uint32_t
 284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 285 {
 286         uint32_t size;
 287         uint32_t size2;
 288         void *mem;
 289
 290         if (pool->curr == pool->last) {
 291                 size = pool->curr - pool->free_arr;
 292                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 293                 assert(size2 > size);
 294                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 295                 if (!mem) {
 296                         DRV_LOG(ERR, "can't allocate mem for id pool");
 297                         rte_errno  = ENOMEM;
 298                         return -rte_errno;
 299                 }
 300                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 301                 rte_free(pool->free_arr);
 302                 pool->free_arr = mem;
 303                 pool->curr = pool->free_arr + size;
 304                 pool->last = pool->free_arr + size2;
 305         }
 306         *pool->curr = id;
 307         pool->curr++;
 308         return 0;
 309 }
 310
 311 /**
 312  * Initialize the counters management structure.
 313  *
 314  * @param[in] sh
 315  *   Pointer to mlx5_ibv_shared object to free
 316  */
 317 static void
 318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 319 {
 320         uint8_t i;
 321
 322         TAILQ_INIT(&sh->cmng.flow_counters);
 323         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 324                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 325 }
 326
 327 /**
 328  * Destroy all the resources allocated for a counter memory management.
 329  *
 330  * @param[in] mng
 331  *   Pointer to the memory management structure.
 332  */
 333 static void
 334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 335 {
 336         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 337
 338         LIST_REMOVE(mng, next);
 339         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 340         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 341         rte_free(mem);
 342 }
 343
 344 /**
 345  * Close and release all the resources of the counters management.
 346  *
 347  * @param[in] sh
 348  *   Pointer to mlx5_ibv_shared object to free.
 349  */
 350 static void
 351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 352 {
 353         struct mlx5_counter_stats_mem_mng *mng;
 354         uint8_t i;
 355         int j;
 356         int retries = 1024;
 357
 358         rte_errno = 0;
 359         while (--retries) {
 360                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 361                 if (rte_errno != EINPROGRESS)
 362                         break;
 363                 rte_pause();
 364         }
 365         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 366                 struct mlx5_flow_counter_pool *pool;
 367                 uint32_t batch = !!(i % 2);
 368
 369                 if (!sh->cmng.ccont[i].pools)
 370                         continue;
 371                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 372                 while (pool) {
 373                         if (batch) {
 374                                 if (pool->min_dcs)
 375                                         claim_zero
 376                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 377                         }
 378                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 379                                 if (pool->counters_raw[j].action)
 380                                         claim_zero
 381                                         (mlx5_glue->destroy_flow_action
 382                                                (pool->counters_raw[j].action));
 383                                 if (!batch && pool->counters_raw[j].dcs)
 384                                         claim_zero(mlx5_devx_cmd_destroy
 385                                                   (pool->counters_raw[j].dcs));
 386                         }
 387                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 388                                      next);
 389                         rte_free(pool);
 390                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 391                 }
 392                 rte_free(sh->cmng.ccont[i].pools);
 393         }
 394         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 395         while (mng) {
 396                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 397                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 398         }
 399         memset(&sh->cmng, 0, sizeof(sh->cmng));
 400 }
 401
 402 /**
 403  * Extract pdn of PD object using DV API.
 404  *
 405  * @param[in] pd
 406  *   Pointer to the verbs PD object.
 407  * @param[out] pdn
 408  *   Pointer to the PD object number variable.
 409  *
 410  * @return
 411  *   0 on success, error value otherwise.
 412  */
 413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 414 static int
 415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 416 {
 417         struct mlx5dv_obj obj;
 418         struct mlx5dv_pd pd_info;
 419         int ret = 0;
 420
 421         obj.pd.in = pd;
 422         obj.pd.out = &pd_info;
 423         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 424         if (ret) {
 425                 DRV_LOG(DEBUG, "Fail to get PD object info");
 426                 return ret;
 427         }
 428         *pdn = pd_info.pdn;
 429         return 0;
 430 }
 431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 432
 433 static int
 434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
 435 {
 436         char *env;
 437         int value;
 438
 439         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 440         /* Get environment variable to store. */
 441         env = getenv(MLX5_SHUT_UP_BF);
 442         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
 443         if (config->dbnc == MLX5_ARG_UNSET)
 444                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
 445         else
 446                 setenv(MLX5_SHUT_UP_BF,
 447                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
 448         return value;
 449 }
 450
 451 static void
 452 mlx5_restore_doorbell_mapping_env(int value)
 453 {
 454         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 455         /* Restore the original environment variable state. */
 456         if (value == MLX5_ARG_UNSET)
 457                 unsetenv(MLX5_SHUT_UP_BF);
 458         else
 459                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
 460 }
 461
 462 /**
 463  * Allocate shared IB device context. If there is multiport device the
 464  * master and representors will share this context, if there is single
 465  * port dedicated IB device, the context will be used by only given
 466  * port due to unification.
 467  *
 468  * Routine first searches the context for the specified IB device name,
 469  * if found the shared context assumed and reference counter is incremented.
 470  * If no context found the new one is created and initialized with specified
 471  * IB device context and parameters.
 472  *
 473  * @param[in] spawn
 474  *   Pointer to the IB device attributes (name, port, etc).
 475  * @param[in] config
 476  *   Pointer to device configuration structure.
 477  *
 478  * @return
 479  *   Pointer to mlx5_ibv_shared object on success,
 480  *   otherwise NULL and rte_errno is set.
 481  */
 482 static struct mlx5_ibv_shared *
 483 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 484                         const struct mlx5_dev_config *config)
 485 {
 486         struct mlx5_ibv_shared *sh;
 487         int dbmap_env;
 488         int err = 0;
 489         uint32_t i;
 490 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 491         struct mlx5_devx_tis_attr tis_attr = { 0 };
 492 #endif
 493
 494         assert(spawn);
 495         /* Secondary process should not create the shared context. */
 496         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 497         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 498         /* Search for IB context by device name. */
 499         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 500                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 501                         sh->refcnt++;
 502                         goto exit;
 503                 }
 504         }
 505         /* No device found, we have to create new shared context. */
 506         assert(spawn->max_port);
 507         sh = rte_zmalloc("ethdev shared ib context",
 508                          sizeof(struct mlx5_ibv_shared) +
 509                          spawn->max_port *
 510                          sizeof(struct mlx5_ibv_shared_port),
 511                          RTE_CACHE_LINE_SIZE);
 512         if (!sh) {
 513                 DRV_LOG(ERR, "shared context allocation failure");
 514                 rte_errno  = ENOMEM;
 515                 goto exit;
 516         }
 517         /*
 518          * Configure environment variable "MLX5_BF_SHUT_UP"
 519          * before the device creation. The rdma_core library
 520          * checks the variable at device creation and
 521          * stores the result internally.
 522          */
 523         dbmap_env = mlx5_config_doorbell_mapping_env(config);
 524         /* Try to open IB device with DV first, then usual Verbs. */
 525         errno = 0;
 526         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 527         if (sh->ctx) {
 528                 sh->devx = 1;
 529                 DRV_LOG(DEBUG, "DevX is supported");
 530                 /* The device is created, no need for environment. */
 531                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 532         } else {
 533                 /* The environment variable is still configured. */
 534                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 535                 err = errno ? errno : ENODEV;
 536                 /*
 537                  * The environment variable is not needed anymore,
 538                  * all device creation attempts are completed.
 539                  */
 540                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 541                 if (!sh->ctx)
 542                         goto error;
 543                 DRV_LOG(DEBUG, "DevX is NOT supported");
 544         }
 545         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 546         if (err) {
 547                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 548                 goto error;
 549         }
 550         sh->refcnt = 1;
 551         sh->max_port = spawn->max_port;
 552         strncpy(sh->ibdev_name, sh->ctx->device->name,
 553                 sizeof(sh->ibdev_name));
 554         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 555                 sizeof(sh->ibdev_path));
 556         pthread_mutex_init(&sh->intr_mutex, NULL);
 557         /*
 558          * Setting port_id to max unallowed value means
 559          * there is no interrupt subhandler installed for
 560          * the given port index i.
 561          */
 562         for (i = 0; i < sh->max_port; i++) {
 563                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 564                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 565         }
 566         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 567         if (sh->pd == NULL) {
 568                 DRV_LOG(ERR, "PD allocation failure");
 569                 err = ENOMEM;
 570                 goto error;
 571         }
 572 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 573         if (sh->devx) {
 574                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 575                 if (err) {
 576                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 577                         goto error;
 578                 }
 579                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 580                 if (!sh->td) {
 581                         DRV_LOG(ERR, "TD allocation failure");
 582                         err = ENOMEM;
 583                         goto error;
 584                 }
 585                 tis_attr.transport_domain = sh->td->id;
 586                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 587                 if (!sh->tis) {
 588                         DRV_LOG(ERR, "TIS allocation failure");
 589                         err = ENOMEM;
 590                         goto error;
 591                 }
 592         }
 593         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 594         if (!sh->flow_id_pool) {
 595                 DRV_LOG(ERR, "can't create flow id pool");
 596                 err = ENOMEM;
 597                 goto error;
 598         }
 599 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 600         /*
 601          * Once the device is added to the list of memory event
 602          * callback, its global MR cache table cannot be expanded
 603          * on the fly because of deadlock. If it overflows, lookup
 604          * should be done by searching MR list linearly, which is slow.
 605          *
 606          * At this point the device is not added to the memory
 607          * event list yet, context is just being created.
 608          */
 609         err = mlx5_mr_btree_init(&sh->mr.cache,
 610                                  MLX5_MR_BTREE_CACHE_N * 2,
 611                                  spawn->pci_dev->device.numa_node);
 612         if (err) {
 613                 err = rte_errno;
 614                 goto error;
 615         }
 616         mlx5_flow_counters_mng_init(sh);
 617         /* Add device to memory callback list. */
 618         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 619         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 620                          sh, mem_event_cb);
 621         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 622         /* Add context to the global device list. */
 623         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 624 exit:
 625         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 626         return sh;
 627 error:
 628         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 629         assert(sh);
 630         if (sh->tis)
 631                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 632         if (sh->td)
 633                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 634         if (sh->pd)
 635                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 636         if (sh->ctx)
 637                 claim_zero(mlx5_glue->close_device(sh->ctx));
 638         if (sh->flow_id_pool)
 639                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 640         rte_free(sh);
 641         assert(err > 0);
 642         rte_errno = err;
 643         return NULL;
 644 }
 645
 646 /**
 647  * Free shared IB device context. Decrement counter and if zero free
 648  * all allocated resources and close handles.
 649  *
 650  * @param[in] sh
 651  *   Pointer to mlx5_ibv_shared object to free
 652  */
 653 static void
 654 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 655 {
 656         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 657 #ifndef NDEBUG
 658         /* Check the object presence in the list. */
 659         struct mlx5_ibv_shared *lctx;
 660
 661         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 662                 if (lctx == sh)
 663                         break;
 664         assert(lctx);
 665         if (lctx != sh) {
 666                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 667                 goto exit;
 668         }
 669 #endif
 670         assert(sh);
 671         assert(sh->refcnt);
 672         /* Secondary process should not free the shared context. */
 673         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 674         if (--sh->refcnt)
 675                 goto exit;
 676         /* Release created Memory Regions. */
 677         mlx5_mr_release(sh);
 678         /* Remove from memory callback device list. */
 679         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 680         LIST_REMOVE(sh, mem_event_cb);
 681         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 682         /* Remove context from the global device list. */
 683         LIST_REMOVE(sh, next);
 684         /*
 685          *  Ensure there is no async event handler installed.
 686          *  Only primary process handles async device events.
 687          **/
 688         mlx5_flow_counters_mng_close(sh);
 689         assert(!sh->intr_cnt);
 690         if (sh->intr_cnt)
 691                 mlx5_intr_callback_unregister
 692                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 693 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 694         if (sh->devx_intr_cnt) {
 695                 if (sh->intr_handle_devx.fd)
 696                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 697                                           mlx5_dev_interrupt_handler_devx, sh);
 698                 if (sh->devx_comp)
 699                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 700         }
 701 #endif
 702         pthread_mutex_destroy(&sh->intr_mutex);
 703         if (sh->pd)
 704                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 705         if (sh->tis)
 706                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 707         if (sh->td)
 708                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 709         if (sh->ctx)
 710                 claim_zero(mlx5_glue->close_device(sh->ctx));
 711         if (sh->flow_id_pool)
 712                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 713         rte_free(sh);
 714 exit:
 715         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 716 }
 717
 718 /**
 719  * Destroy table hash list and all the root entries per domain.
 720  *
 721  * @param[in] priv
 722  *   Pointer to the private device data structure.
 723  */
 724 static void
 725 mlx5_free_table_hash_list(struct mlx5_priv *priv)
 726 {
 727         struct mlx5_ibv_shared *sh = priv->sh;
 728         struct mlx5_flow_tbl_data_entry *tbl_data;
 729         union mlx5_flow_tbl_key table_key = {
 730                 {
 731                         .table_id = 0,
 732                         .reserved = 0,
 733                         .domain = 0,
 734                         .direction = 0,
 735                 }
 736         };
 737         struct mlx5_hlist_entry *pos;
 738
 739         if (!sh->flow_tbls)
 740                 return;
 741         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 742         if (pos) {
 743                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 744                                         entry);
 745                 assert(tbl_data);
 746                 mlx5_hlist_remove(sh->flow_tbls, pos);
 747                 rte_free(tbl_data);
 748         }
 749         table_key.direction = 1;
 750         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 751         if (pos) {
 752                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 753                                         entry);
 754                 assert(tbl_data);
 755                 mlx5_hlist_remove(sh->flow_tbls, pos);
 756                 rte_free(tbl_data);
 757         }
 758         table_key.direction = 0;
 759         table_key.domain = 1;
 760         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 761         if (pos) {
 762                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 763                                         entry);
 764                 assert(tbl_data);
 765                 mlx5_hlist_remove(sh->flow_tbls, pos);
 766                 rte_free(tbl_data);
 767         }
 768         mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 769 }
 770
 771 /**
 772  * Initialize flow table hash list and create the root tables entry
 773  * for each domain.
 774  *
 775  * @param[in] priv
 776  *   Pointer to the private device data structure.
 777  *
 778  * @return
 779  *   Zero on success, positive error code otherwise.
 780  */
 781 static int
 782 mlx5_alloc_table_hash_list(struct mlx5_priv *priv)
 783 {
 784         struct mlx5_ibv_shared *sh = priv->sh;
 785         char s[MLX5_HLIST_NAMESIZE];
 786         int err = 0;
 787
 788         assert(sh);
 789         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
 790         sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
 791         if (!sh->flow_tbls) {
 792                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
 793                 err = ENOMEM;
 794                 return err;
 795         }
 796 #ifndef HAVE_MLX5DV_DR
 797         /*
 798          * In case we have not DR support, the zero tables should be created
 799          * because DV expect to see them even if they cannot be created by
 800          * RDMA-CORE.
 801          */
 802         union mlx5_flow_tbl_key table_key = {
 803                 {
 804                         .table_id = 0,
 805                         .reserved = 0,
 806                         .domain = 0,
 807                         .direction = 0,
 808                 }
 809         };
 810         struct mlx5_flow_tbl_data_entry *tbl_data = rte_zmalloc(NULL,
 811                                                           sizeof(*tbl_data), 0);
 812
 813         if (!tbl_data) {
 814                 err = ENOMEM;
 815                 goto error;
 816         }
 817         tbl_data->entry.key = table_key.v64;
 818         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 819         if (err)
 820                 goto error;
 821         rte_atomic32_init(&tbl_data->tbl.refcnt);
 822         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 823         table_key.direction = 1;
 824         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 825         if (!tbl_data) {
 826                 err = ENOMEM;
 827                 goto error;
 828         }
 829         tbl_data->entry.key = table_key.v64;
 830         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 831         if (err)
 832                 goto error;
 833         rte_atomic32_init(&tbl_data->tbl.refcnt);
 834         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 835         table_key.direction = 0;
 836         table_key.domain = 1;
 837         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 838         if (!tbl_data) {
 839                 err = ENOMEM;
 840                 goto error;
 841         }
 842         tbl_data->entry.key = table_key.v64;
 843         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 844         if (err)
 845                 goto error;
 846         rte_atomic32_init(&tbl_data->tbl.refcnt);
 847         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 848         return err;
 849 error:
 850         mlx5_free_table_hash_list(priv);
 851 #endif /* HAVE_MLX5DV_DR */
 852         return err;
 853 }
 854
 855 /**
 856  * Initialize DR related data within private structure.
 857  * Routine checks the reference counter and does actual
 858  * resources creation/initialization only if counter is zero.
 859  *
 860  * @param[in] priv
 861  *   Pointer to the private device data structure.
 862  *
 863  * @return
 864  *   Zero on success, positive error code otherwise.
 865  */
 866 static int
 867 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 868 {
 869         int err = mlx5_alloc_table_hash_list(priv);
 870
 871         if (err)
 872                 return err;
 873 #ifdef HAVE_MLX5DV_DR
 874         struct mlx5_ibv_shared *sh = priv->sh;
 875         char s[MLX5_HLIST_NAMESIZE];
 876         void *domain;
 877
 878         if (sh->dv_refcnt) {
 879                 /* Shared DV/DR structures is already initialized. */
 880                 sh->dv_refcnt++;
 881                 priv->dr_shared = 1;
 882                 return 0;
 883         }
 884         /* Reference counter is zero, we should initialize structures. */
 885         domain = mlx5_glue->dr_create_domain(sh->ctx,
 886                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 887         if (!domain) {
 888                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 889                 err = errno;
 890                 goto error;
 891         }
 892         sh->rx_domain = domain;
 893         domain = mlx5_glue->dr_create_domain(sh->ctx,
 894                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 895         if (!domain) {
 896                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 897                 err = errno;
 898                 goto error;
 899         }
 900         pthread_mutex_init(&sh->dv_mutex, NULL);
 901         sh->tx_domain = domain;
 902 #ifdef HAVE_MLX5DV_DR_ESWITCH
 903         if (priv->config.dv_esw_en) {
 904                 domain  = mlx5_glue->dr_create_domain
 905                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 906                 if (!domain) {
 907                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 908                         err = errno;
 909                         goto error;
 910                 }
 911                 sh->fdb_domain = domain;
 912                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 913         }
 914 #endif
 915         /* create tags hash list table. */
 916         snprintf(s, sizeof(s), "%s_tags", priv->sh->ibdev_name);
 917         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 918         if (!sh->flow_tbls) {
 919                 DRV_LOG(ERR, "tags with hash creation failed.\n");
 920                 goto error;
 921         }
 922         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 923         sh->dv_refcnt++;
 924         priv->dr_shared = 1;
 925         return 0;
 926
 927 error:
 928        /* Rollback the created objects. */
 929         if (sh->rx_domain) {
 930                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 931                 sh->rx_domain = NULL;
 932         }
 933         if (sh->tx_domain) {
 934                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 935                 sh->tx_domain = NULL;
 936         }
 937         if (sh->fdb_domain) {
 938                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 939                 sh->fdb_domain = NULL;
 940         }
 941         if (sh->esw_drop_action) {
 942                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 943                 sh->esw_drop_action = NULL;
 944         }
 945         if (sh->pop_vlan_action) {
 946                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 947                 sh->pop_vlan_action = NULL;
 948         }
 949         mlx5_free_table_hash_list(priv);
 950 #endif
 951         return err;
 952 }
 953
 954 /**
 955  * Destroy DR related data within private structure.
 956  *
 957  * @param[in] priv
 958  *   Pointer to the private device data structure.
 959  */
 960 static void
 961 mlx5_free_shared_dr(struct mlx5_priv *priv)
 962 {
 963 #ifdef HAVE_MLX5DV_DR
 964         struct mlx5_ibv_shared *sh;
 965
 966         if (!priv->dr_shared)
 967                 return;
 968         priv->dr_shared = 0;
 969         sh = priv->sh;
 970         assert(sh);
 971         assert(sh->dv_refcnt);
 972         if (sh->dv_refcnt && --sh->dv_refcnt)
 973                 return;
 974         if (sh->rx_domain) {
 975                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 976                 sh->rx_domain = NULL;
 977         }
 978         if (sh->tx_domain) {
 979                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 980                 sh->tx_domain = NULL;
 981         }
 982 #ifdef HAVE_MLX5DV_DR_ESWITCH
 983         if (sh->fdb_domain) {
 984                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 985                 sh->fdb_domain = NULL;
 986         }
 987         if (sh->esw_drop_action) {
 988                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 989                 sh->esw_drop_action = NULL;
 990         }
 991 #endif
 992         if (sh->tag_table) {
 993                 /* tags should be destroyed with flow before. */
 994                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 995                 sh->tag_table = NULL;
 996         }
 997         if (sh->pop_vlan_action) {
 998                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 999                 sh->pop_vlan_action = NULL;
1000         }
1001         pthread_mutex_destroy(&sh->dv_mutex);
1002 #endif /* HAVE_MLX5DV_DR */
1003         mlx5_free_table_hash_list(priv);
1004 }
1005
1006 /**
1007  * Initialize shared data between primary and secondary process.
1008  *
1009  * A memzone is reserved by primary process and secondary processes attach to
1010  * the memzone.
1011  *
1012  * @return
1013  *   0 on success, a negative errno value otherwise and rte_errno is set.
1014  */
1015 static int
1016 mlx5_init_shared_data(void)
1017 {
1018         const struct rte_memzone *mz;
1019         int ret = 0;
1020
1021         rte_spinlock_lock(&mlx5_shared_data_lock);
1022         if (mlx5_shared_data == NULL) {
1023                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1024                         /* Allocate shared memory. */
1025                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
1026                                                  sizeof(*mlx5_shared_data),
1027                                                  SOCKET_ID_ANY, 0);
1028                         if (mz == NULL) {
1029                                 DRV_LOG(ERR,
1030                                         "Cannot allocate mlx5 shared data");
1031                                 ret = -rte_errno;
1032                                 goto error;
1033                         }
1034                         mlx5_shared_data = mz->addr;
1035                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
1036                         rte_spinlock_init(&mlx5_shared_data->lock);
1037                 } else {
1038                         /* Lookup allocated shared memory. */
1039                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
1040                         if (mz == NULL) {
1041                                 DRV_LOG(ERR,
1042                                         "Cannot attach mlx5 shared data");
1043                                 ret = -rte_errno;
1044                                 goto error;
1045                         }
1046                         mlx5_shared_data = mz->addr;
1047                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
1048                 }
1049         }
1050 error:
1051         rte_spinlock_unlock(&mlx5_shared_data_lock);
1052         return ret;
1053 }
1054
1055 /**
1056  * Retrieve integer value from environment variable.
1057  *
1058  * @param[in] name
1059  *   Environment variable name.
1060  *
1061  * @return
1062  *   Integer value, 0 if the variable is not set.
1063  */
1064 int
1065 mlx5_getenv_int(const char *name)
1066 {
1067         const char *val = getenv(name);
1068
1069         if (val == NULL)
1070                 return 0;
1071         return atoi(val);
1072 }
1073
1074 /**
1075  * Verbs callback to allocate a memory. This function should allocate the space
1076  * according to the size provided residing inside a huge page.
1077  * Please note that all allocation must respect the alignment from libmlx5
1078  * (i.e. currently sysconf(_SC_PAGESIZE)).
1079  *
1080  * @param[in] size
1081  *   The size in bytes of the memory to allocate.
1082  * @param[in] data
1083  *   A pointer to the callback data.
1084  *
1085  * @return
1086  *   Allocated buffer, NULL otherwise and rte_errno is set.
1087  */
1088 static void *
1089 mlx5_alloc_verbs_buf(size_t size, void *data)
1090 {
1091         struct mlx5_priv *priv = data;
1092         void *ret;
1093         size_t alignment = sysconf(_SC_PAGESIZE);
1094         unsigned int socket = SOCKET_ID_ANY;
1095
1096         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
1097                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1098
1099                 socket = ctrl->socket;
1100         } else if (priv->verbs_alloc_ctx.type ==
1101                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
1102                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1103
1104                 socket = ctrl->socket;
1105         }
1106         assert(data != NULL);
1107         ret = rte_malloc_socket(__func__, size, alignment, socket);
1108         if (!ret && size)
1109                 rte_errno = ENOMEM;
1110         return ret;
1111 }
1112
1113 /**
1114  * Verbs callback to free a memory.
1115  *
1116  * @param[in] ptr
1117  *   A pointer to the memory to free.
1118  * @param[in] data
1119  *   A pointer to the callback data.
1120  */
1121 static void
1122 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1123 {
1124         assert(data != NULL);
1125         rte_free(ptr);
1126 }
1127
1128 /**
1129  * DPDK callback to add udp tunnel port
1130  *
1131  * @param[in] dev
1132  *   A pointer to eth_dev
1133  * @param[in] udp_tunnel
1134  *   A pointer to udp tunnel
1135  *
1136  * @return
1137  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1138  */
1139 int
1140 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1141                          struct rte_eth_udp_tunnel *udp_tunnel)
1142 {
1143         assert(udp_tunnel != NULL);
1144         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1145             udp_tunnel->udp_port == 4789)
1146                 return 0;
1147         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1148             udp_tunnel->udp_port == 4790)
1149                 return 0;
1150         return -ENOTSUP;
1151 }
1152
1153 /**
1154  * Initialize process private data structure.
1155  *
1156  * @param dev
1157  *   Pointer to Ethernet device structure.
1158  *
1159  * @return
1160  *   0 on success, a negative errno value otherwise and rte_errno is set.
1161  */
1162 int
1163 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1164 {
1165         struct mlx5_priv *priv = dev->data->dev_private;
1166         struct mlx5_proc_priv *ppriv;
1167         size_t ppriv_size;
1168
1169         /*
1170          * UAR register table follows the process private structure. BlueFlame
1171          * registers for Tx queues are stored in the table.
1172          */
1173         ppriv_size =
1174                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1175         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1176                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1177         if (!ppriv) {
1178                 rte_errno = ENOMEM;
1179                 return -rte_errno;
1180         }
1181         ppriv->uar_table_sz = ppriv_size;
1182         dev->process_private = ppriv;
1183         return 0;
1184 }
1185
1186 /**
1187  * Un-initialize process private data structure.
1188  *
1189  * @param dev
1190  *   Pointer to Ethernet device structure.
1191  */
1192 static void
1193 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1194 {
1195         if (!dev->process_private)
1196                 return;
1197         rte_free(dev->process_private);
1198         dev->process_private = NULL;
1199 }
1200
1201 /**
1202  * DPDK callback to close the device.
1203  *
1204  * Destroy all queues and objects, free memory.
1205  *
1206  * @param dev
1207  *   Pointer to Ethernet device structure.
1208  */
1209 static void
1210 mlx5_dev_close(struct rte_eth_dev *dev)
1211 {
1212         struct mlx5_priv *priv = dev->data->dev_private;
1213         unsigned int i;
1214         int ret;
1215
1216         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1217                 dev->data->port_id,
1218                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1219         /* In case mlx5_dev_stop() has not been called. */
1220         mlx5_dev_interrupt_handler_uninstall(dev);
1221         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1222         mlx5_traffic_disable(dev);
1223         mlx5_flow_flush(dev, NULL);
1224         mlx5_flow_meter_flush(dev, NULL);
1225         /* Prevent crashes when queues are still in use. */
1226         dev->rx_pkt_burst = removed_rx_burst;
1227         dev->tx_pkt_burst = removed_tx_burst;
1228         rte_wmb();
1229         /* Disable datapath on secondary process. */
1230         mlx5_mp_req_stop_rxtx(dev);
1231         if (priv->rxqs != NULL) {
1232                 /* XXX race condition if mlx5_rx_burst() is still running. */
1233                 usleep(1000);
1234                 for (i = 0; (i != priv->rxqs_n); ++i)
1235                         mlx5_rxq_release(dev, i);
1236                 priv->rxqs_n = 0;
1237                 priv->rxqs = NULL;
1238         }
1239         if (priv->txqs != NULL) {
1240                 /* XXX race condition if mlx5_tx_burst() is still running. */
1241                 usleep(1000);
1242                 for (i = 0; (i != priv->txqs_n); ++i)
1243                         mlx5_txq_release(dev, i);
1244                 priv->txqs_n = 0;
1245                 priv->txqs = NULL;
1246         }
1247         mlx5_proc_priv_uninit(dev);
1248         if (priv->mreg_cp_tbl)
1249                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1250         mlx5_mprq_free_mp(dev);
1251         mlx5_free_shared_dr(priv);
1252         if (priv->rss_conf.rss_key != NULL)
1253                 rte_free(priv->rss_conf.rss_key);
1254         if (priv->reta_idx != NULL)
1255                 rte_free(priv->reta_idx);
1256         if (priv->config.vf)
1257                 mlx5_nl_mac_addr_flush(dev);
1258         if (priv->nl_socket_route >= 0)
1259                 close(priv->nl_socket_route);
1260         if (priv->nl_socket_rdma >= 0)
1261                 close(priv->nl_socket_rdma);
1262         if (priv->vmwa_context)
1263                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1264         if (priv->sh) {
1265                 /*
1266                  * Free the shared context in last turn, because the cleanup
1267                  * routines above may use some shared fields, like
1268                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1269                  * ifindex if Netlink fails.
1270                  */
1271                 mlx5_free_shared_ibctx(priv->sh);
1272                 priv->sh = NULL;
1273         }
1274         ret = mlx5_hrxq_verify(dev);
1275         if (ret)
1276                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1277                         dev->data->port_id);
1278         ret = mlx5_ind_table_obj_verify(dev);
1279         if (ret)
1280                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1281                         dev->data->port_id);
1282         ret = mlx5_rxq_obj_verify(dev);
1283         if (ret)
1284                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1285                         dev->data->port_id);
1286         ret = mlx5_rxq_verify(dev);
1287         if (ret)
1288                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1289                         dev->data->port_id);
1290         ret = mlx5_txq_obj_verify(dev);
1291         if (ret)
1292                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1293                         dev->data->port_id);
1294         ret = mlx5_txq_verify(dev);
1295         if (ret)
1296                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1297                         dev->data->port_id);
1298         ret = mlx5_flow_verify(dev);
1299         if (ret)
1300                 DRV_LOG(WARNING, "port %u some flows still remain",
1301                         dev->data->port_id);
1302         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1303                 unsigned int c = 0;
1304                 uint16_t port_id;
1305
1306                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1307                         struct mlx5_priv *opriv =
1308                                 rte_eth_devices[port_id].data->dev_private;
1309
1310                         if (!opriv ||
1311                             opriv->domain_id != priv->domain_id ||
1312                             &rte_eth_devices[port_id] == dev)
1313                                 continue;
1314                         ++c;
1315                         break;
1316                 }
1317                 if (!c)
1318                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1319         }
1320         memset(priv, 0, sizeof(*priv));
1321         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1322         /*
1323          * Reset mac_addrs to NULL such that it is not freed as part of
1324          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1325          * it is freed when dev_private is freed.
1326          */
1327         dev->data->mac_addrs = NULL;
1328 }
1329
1330 const struct eth_dev_ops mlx5_dev_ops = {
1331         .dev_configure = mlx5_dev_configure,
1332         .dev_start = mlx5_dev_start,
1333         .dev_stop = mlx5_dev_stop,
1334         .dev_set_link_down = mlx5_set_link_down,
1335         .dev_set_link_up = mlx5_set_link_up,
1336         .dev_close = mlx5_dev_close,
1337         .promiscuous_enable = mlx5_promiscuous_enable,
1338         .promiscuous_disable = mlx5_promiscuous_disable,
1339         .allmulticast_enable = mlx5_allmulticast_enable,
1340         .allmulticast_disable = mlx5_allmulticast_disable,
1341         .link_update = mlx5_link_update,
1342         .stats_get = mlx5_stats_get,
1343         .stats_reset = mlx5_stats_reset,
1344         .xstats_get = mlx5_xstats_get,
1345         .xstats_reset = mlx5_xstats_reset,
1346         .xstats_get_names = mlx5_xstats_get_names,
1347         .fw_version_get = mlx5_fw_version_get,
1348         .dev_infos_get = mlx5_dev_infos_get,
1349         .read_clock = mlx5_read_clock,
1350         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1351         .vlan_filter_set = mlx5_vlan_filter_set,
1352         .rx_queue_setup = mlx5_rx_queue_setup,
1353         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1354         .tx_queue_setup = mlx5_tx_queue_setup,
1355         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1356         .rx_queue_release = mlx5_rx_queue_release,
1357         .tx_queue_release = mlx5_tx_queue_release,
1358         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1359         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1360         .mac_addr_remove = mlx5_mac_addr_remove,
1361         .mac_addr_add = mlx5_mac_addr_add,
1362         .mac_addr_set = mlx5_mac_addr_set,
1363         .set_mc_addr_list = mlx5_set_mc_addr_list,
1364         .mtu_set = mlx5_dev_set_mtu,
1365         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1366         .vlan_offload_set = mlx5_vlan_offload_set,
1367         .reta_update = mlx5_dev_rss_reta_update,
1368         .reta_query = mlx5_dev_rss_reta_query,
1369         .rss_hash_update = mlx5_rss_hash_update,
1370         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1371         .filter_ctrl = mlx5_dev_filter_ctrl,
1372         .rx_descriptor_status = mlx5_rx_descriptor_status,
1373         .tx_descriptor_status = mlx5_tx_descriptor_status,
1374         .rx_queue_count = mlx5_rx_queue_count,
1375         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1376         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1377         .is_removed = mlx5_is_removed,
1378         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1379         .get_module_info = mlx5_get_module_info,
1380         .get_module_eeprom = mlx5_get_module_eeprom,
1381         .hairpin_cap_get = mlx5_hairpin_cap_get,
1382         .mtr_ops_get = mlx5_flow_meter_ops_get,
1383 };
1384
1385 /* Available operations from secondary process. */
1386 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1387         .stats_get = mlx5_stats_get,
1388         .stats_reset = mlx5_stats_reset,
1389         .xstats_get = mlx5_xstats_get,
1390         .xstats_reset = mlx5_xstats_reset,
1391         .xstats_get_names = mlx5_xstats_get_names,
1392         .fw_version_get = mlx5_fw_version_get,
1393         .dev_infos_get = mlx5_dev_infos_get,
1394         .rx_descriptor_status = mlx5_rx_descriptor_status,
1395         .tx_descriptor_status = mlx5_tx_descriptor_status,
1396         .get_module_info = mlx5_get_module_info,
1397         .get_module_eeprom = mlx5_get_module_eeprom,
1398 };
1399
1400 /* Available operations in flow isolated mode. */
1401 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1402         .dev_configure = mlx5_dev_configure,
1403         .dev_start = mlx5_dev_start,
1404         .dev_stop = mlx5_dev_stop,
1405         .dev_set_link_down = mlx5_set_link_down,
1406         .dev_set_link_up = mlx5_set_link_up,
1407         .dev_close = mlx5_dev_close,
1408         .promiscuous_enable = mlx5_promiscuous_enable,
1409         .promiscuous_disable = mlx5_promiscuous_disable,
1410         .allmulticast_enable = mlx5_allmulticast_enable,
1411         .allmulticast_disable = mlx5_allmulticast_disable,
1412         .link_update = mlx5_link_update,
1413         .stats_get = mlx5_stats_get,
1414         .stats_reset = mlx5_stats_reset,
1415         .xstats_get = mlx5_xstats_get,
1416         .xstats_reset = mlx5_xstats_reset,
1417         .xstats_get_names = mlx5_xstats_get_names,
1418         .fw_version_get = mlx5_fw_version_get,
1419         .dev_infos_get = mlx5_dev_infos_get,
1420         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1421         .vlan_filter_set = mlx5_vlan_filter_set,
1422         .rx_queue_setup = mlx5_rx_queue_setup,
1423         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1424         .tx_queue_setup = mlx5_tx_queue_setup,
1425         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1426         .rx_queue_release = mlx5_rx_queue_release,
1427         .tx_queue_release = mlx5_tx_queue_release,
1428         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1429         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1430         .mac_addr_remove = mlx5_mac_addr_remove,
1431         .mac_addr_add = mlx5_mac_addr_add,
1432         .mac_addr_set = mlx5_mac_addr_set,
1433         .set_mc_addr_list = mlx5_set_mc_addr_list,
1434         .mtu_set = mlx5_dev_set_mtu,
1435         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1436         .vlan_offload_set = mlx5_vlan_offload_set,
1437         .filter_ctrl = mlx5_dev_filter_ctrl,
1438         .rx_descriptor_status = mlx5_rx_descriptor_status,
1439         .tx_descriptor_status = mlx5_tx_descriptor_status,
1440         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1441         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1442         .is_removed = mlx5_is_removed,
1443         .get_module_info = mlx5_get_module_info,
1444         .get_module_eeprom = mlx5_get_module_eeprom,
1445         .hairpin_cap_get = mlx5_hairpin_cap_get,
1446         .mtr_ops_get = mlx5_flow_meter_ops_get,
1447 };
1448
1449 /**
1450  * Verify and store value for device argument.
1451  *
1452  * @param[in] key
1453  *   Key argument to verify.
1454  * @param[in] val
1455  *   Value associated with key.
1456  * @param opaque
1457  *   User data.
1458  *
1459  * @return
1460  *   0 on success, a negative errno value otherwise and rte_errno is set.
1461  */
1462 static int
1463 mlx5_args_check(const char *key, const char *val, void *opaque)
1464 {
1465         struct mlx5_dev_config *config = opaque;
1466         unsigned long tmp;
1467
1468         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1469         if (!strcmp(MLX5_REPRESENTOR, key))
1470                 return 0;
1471         errno = 0;
1472         tmp = strtoul(val, NULL, 0);
1473         if (errno) {
1474                 rte_errno = errno;
1475                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1476                 return -rte_errno;
1477         }
1478         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1479                 config->cqe_comp = !!tmp;
1480         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1481                 config->cqe_pad = !!tmp;
1482         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1483                 config->hw_padding = !!tmp;
1484         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1485                 config->mprq.enabled = !!tmp;
1486         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1487                 config->mprq.stride_num_n = tmp;
1488         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1489                 config->mprq.max_memcpy_len = tmp;
1490         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1491                 config->mprq.min_rxqs_num = tmp;
1492         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1493                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1494                                  " converted to txq_inline_max", key);
1495                 config->txq_inline_max = tmp;
1496         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1497                 config->txq_inline_max = tmp;
1498         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1499                 config->txq_inline_min = tmp;
1500         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1501                 config->txq_inline_mpw = tmp;
1502         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1503                 config->txqs_inline = tmp;
1504         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1505                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1506         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1507                 config->mps = !!tmp;
1508         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1509                 if (tmp != MLX5_TXDB_CACHED &&
1510                     tmp != MLX5_TXDB_NCACHED &&
1511                     tmp != MLX5_TXDB_HEURISTIC) {
1512                         DRV_LOG(ERR, "invalid Tx doorbell "
1513                                      "mapping parameter");
1514                         rte_errno = EINVAL;
1515                         return -rte_errno;
1516                 }
1517                 config->dbnc = tmp;
1518         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1519                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1520         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1521                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1522                                  " converted to txq_inline_mpw", key);
1523                 config->txq_inline_mpw = tmp;
1524         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1525                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1526         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1527                 config->rx_vec_en = !!tmp;
1528         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1529                 config->l3_vxlan_en = !!tmp;
1530         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1531                 config->vf_nl_en = !!tmp;
1532         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1533                 config->dv_esw_en = !!tmp;
1534         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1535                 config->dv_flow_en = !!tmp;
1536         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1537                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1538                     tmp != MLX5_XMETA_MODE_META16 &&
1539                     tmp != MLX5_XMETA_MODE_META32) {
1540                         DRV_LOG(ERR, "invalid extensive "
1541                                      "metadata parameter");
1542                         rte_errno = EINVAL;
1543                         return -rte_errno;
1544                 }
1545                 config->dv_xmeta_en = tmp;
1546         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1547                 config->mr_ext_memseg_en = !!tmp;
1548         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1549                 config->max_dump_files_num = tmp;
1550         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1551                 config->lro.timeout = tmp;
1552         } else {
1553                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1554                 rte_errno = EINVAL;
1555                 return -rte_errno;
1556         }
1557         return 0;
1558 }
1559
1560 /**
1561  * Parse device parameters.
1562  *
1563  * @param config
1564  *   Pointer to device configuration structure.
1565  * @param devargs
1566  *   Device arguments structure.
1567  *
1568  * @return
1569  *   0 on success, a negative errno value otherwise and rte_errno is set.
1570  */
1571 static int
1572 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1573 {
1574         const char **params = (const char *[]){
1575                 MLX5_RXQ_CQE_COMP_EN,
1576                 MLX5_RXQ_CQE_PAD_EN,
1577                 MLX5_RXQ_PKT_PAD_EN,
1578                 MLX5_RX_MPRQ_EN,
1579                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1580                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1581                 MLX5_RXQS_MIN_MPRQ,
1582                 MLX5_TXQ_INLINE,
1583                 MLX5_TXQ_INLINE_MIN,
1584                 MLX5_TXQ_INLINE_MAX,
1585                 MLX5_TXQ_INLINE_MPW,
1586                 MLX5_TXQS_MIN_INLINE,
1587                 MLX5_TXQS_MAX_VEC,
1588                 MLX5_TXQ_MPW_EN,
1589                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1590                 MLX5_TXQ_MAX_INLINE_LEN,
1591                 MLX5_TX_DB_NC,
1592                 MLX5_TX_VEC_EN,
1593                 MLX5_RX_VEC_EN,
1594                 MLX5_L3_VXLAN_EN,
1595                 MLX5_VF_NL_EN,
1596                 MLX5_DV_ESW_EN,
1597                 MLX5_DV_FLOW_EN,
1598                 MLX5_DV_XMETA_EN,
1599                 MLX5_MR_EXT_MEMSEG_EN,
1600                 MLX5_REPRESENTOR,
1601                 MLX5_MAX_DUMP_FILES_NUM,
1602                 MLX5_LRO_TIMEOUT_USEC,
1603                 NULL,
1604         };
1605         struct rte_kvargs *kvlist;
1606         int ret = 0;
1607         int i;
1608
1609         if (devargs == NULL)
1610                 return 0;
1611         /* Following UGLY cast is done to pass checkpatch. */
1612         kvlist = rte_kvargs_parse(devargs->args, params);
1613         if (kvlist == NULL) {
1614                 rte_errno = EINVAL;
1615                 return -rte_errno;
1616         }
1617         /* Process parameters. */
1618         for (i = 0; (params[i] != NULL); ++i) {
1619                 if (rte_kvargs_count(kvlist, params[i])) {
1620                         ret = rte_kvargs_process(kvlist, params[i],
1621                                                  mlx5_args_check, config);
1622                         if (ret) {
1623                                 rte_errno = EINVAL;
1624                                 rte_kvargs_free(kvlist);
1625                                 return -rte_errno;
1626                         }
1627                 }
1628         }
1629         rte_kvargs_free(kvlist);
1630         return 0;
1631 }
1632
1633 static struct rte_pci_driver mlx5_driver;
1634
1635 /**
1636  * PMD global initialization.
1637  *
1638  * Independent from individual device, this function initializes global
1639  * per-PMD data structures distinguishing primary and secondary processes.
1640  * Hence, each initialization is called once per a process.
1641  *
1642  * @return
1643  *   0 on success, a negative errno value otherwise and rte_errno is set.
1644  */
1645 static int
1646 mlx5_init_once(void)
1647 {
1648         struct mlx5_shared_data *sd;
1649         struct mlx5_local_data *ld = &mlx5_local_data;
1650         int ret = 0;
1651
1652         if (mlx5_init_shared_data())
1653                 return -rte_errno;
1654         sd = mlx5_shared_data;
1655         assert(sd);
1656         rte_spinlock_lock(&sd->lock);
1657         switch (rte_eal_process_type()) {
1658         case RTE_PROC_PRIMARY:
1659                 if (sd->init_done)
1660                         break;
1661                 LIST_INIT(&sd->mem_event_cb_list);
1662                 rte_rwlock_init(&sd->mem_event_rwlock);
1663                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1664                                                 mlx5_mr_mem_event_cb, NULL);
1665                 ret = mlx5_mp_init_primary();
1666                 if (ret)
1667                         goto out;
1668                 sd->init_done = true;
1669                 break;
1670         case RTE_PROC_SECONDARY:
1671                 if (ld->init_done)
1672                         break;
1673                 ret = mlx5_mp_init_secondary();
1674                 if (ret)
1675                         goto out;
1676                 ++sd->secondary_cnt;
1677                 ld->init_done = true;
1678                 break;
1679         default:
1680                 break;
1681         }
1682 out:
1683         rte_spinlock_unlock(&sd->lock);
1684         return ret;
1685 }
1686
1687 /**
1688  * Configures the minimal amount of data to inline into WQE
1689  * while sending packets.
1690  *
1691  * - the txq_inline_min has the maximal priority, if this
1692  *   key is specified in devargs
1693  * - if DevX is enabled the inline mode is queried from the
1694  *   device (HCA attributes and NIC vport context if needed).
1695  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1696  *   and none (0 bytes) for other NICs
1697  *
1698  * @param spawn
1699  *   Verbs device parameters (name, port, switch_info) to spawn.
1700  * @param config
1701  *   Device configuration parameters.
1702  */
1703 static void
1704 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1705                     struct mlx5_dev_config *config)
1706 {
1707         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1708                 /* Application defines size of inlined data explicitly. */
1709                 switch (spawn->pci_dev->id.device_id) {
1710                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1711                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1712                         if (config->txq_inline_min <
1713                                        (int)MLX5_INLINE_HSIZE_L2) {
1714                                 DRV_LOG(DEBUG,
1715                                         "txq_inline_mix aligned to minimal"
1716                                         " ConnectX-4 required value %d",
1717                                         (int)MLX5_INLINE_HSIZE_L2);
1718                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1719                         }
1720                         break;
1721                 }
1722                 goto exit;
1723         }
1724         if (config->hca_attr.eth_net_offloads) {
1725                 /* We have DevX enabled, inline mode queried successfully. */
1726                 switch (config->hca_attr.wqe_inline_mode) {
1727                 case MLX5_CAP_INLINE_MODE_L2:
1728                         /* outer L2 header must be inlined. */
1729                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1730                         goto exit;
1731                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1732                         /* No inline data are required by NIC. */
1733                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1734                         config->hw_vlan_insert =
1735                                 config->hca_attr.wqe_vlan_insert;
1736                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1737                         goto exit;
1738                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1739                         /* inline mode is defined by NIC vport context. */
1740                         if (!config->hca_attr.eth_virt)
1741                                 break;
1742                         switch (config->hca_attr.vport_inline_mode) {
1743                         case MLX5_INLINE_MODE_NONE:
1744                                 config->txq_inline_min =
1745                                         MLX5_INLINE_HSIZE_NONE;
1746                                 goto exit;
1747                         case MLX5_INLINE_MODE_L2:
1748                                 config->txq_inline_min =
1749                                         MLX5_INLINE_HSIZE_L2;
1750                                 goto exit;
1751                         case MLX5_INLINE_MODE_IP:
1752                                 config->txq_inline_min =
1753                                         MLX5_INLINE_HSIZE_L3;
1754                                 goto exit;
1755                         case MLX5_INLINE_MODE_TCP_UDP:
1756                                 config->txq_inline_min =
1757                                         MLX5_INLINE_HSIZE_L4;
1758                                 goto exit;
1759                         case MLX5_INLINE_MODE_INNER_L2:
1760                                 config->txq_inline_min =
1761                                         MLX5_INLINE_HSIZE_INNER_L2;
1762                                 goto exit;
1763                         case MLX5_INLINE_MODE_INNER_IP:
1764                                 config->txq_inline_min =
1765                                         MLX5_INLINE_HSIZE_INNER_L3;
1766                                 goto exit;
1767                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1768                                 config->txq_inline_min =
1769                                         MLX5_INLINE_HSIZE_INNER_L4;
1770                                 goto exit;
1771                         }
1772                 }
1773         }
1774         /*
1775          * We get here if we are unable to deduce
1776          * inline data size with DevX. Try PCI ID
1777          * to determine old NICs.
1778          */
1779         switch (spawn->pci_dev->id.device_id) {
1780         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1781         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1782         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1783         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1784                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1785                 config->hw_vlan_insert = 0;
1786                 break;
1787         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1788         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1789         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1790         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1791                 /*
1792                  * These NICs support VLAN insertion from WQE and
1793                  * report the wqe_vlan_insert flag. But there is the bug
1794                  * and PFC control may be broken, so disable feature.
1795                  */
1796                 config->hw_vlan_insert = 0;
1797                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1798                 break;
1799         default:
1800                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1801                 break;
1802         }
1803 exit:
1804         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1805 }
1806
1807 /**
1808  * Configures the metadata mask fields in the shared context.
1809  *
1810  * @param [in] dev
1811  *   Pointer to Ethernet device.
1812  */
1813 static void
1814 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1815 {
1816         struct mlx5_priv *priv = dev->data->dev_private;
1817         struct mlx5_ibv_shared *sh = priv->sh;
1818         uint32_t meta, mark, reg_c0;
1819
1820         reg_c0 = ~priv->vport_meta_mask;
1821         switch (priv->config.dv_xmeta_en) {
1822         case MLX5_XMETA_MODE_LEGACY:
1823                 meta = UINT32_MAX;
1824                 mark = MLX5_FLOW_MARK_MASK;
1825                 break;
1826         case MLX5_XMETA_MODE_META16:
1827                 meta = reg_c0 >> rte_bsf32(reg_c0);
1828                 mark = MLX5_FLOW_MARK_MASK;
1829                 break;
1830         case MLX5_XMETA_MODE_META32:
1831                 meta = UINT32_MAX;
1832                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1833                 break;
1834         default:
1835                 meta = 0;
1836                 mark = 0;
1837                 assert(false);
1838                 break;
1839         }
1840         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1841                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1842                                  sh->dv_mark_mask, mark);
1843         else
1844                 sh->dv_mark_mask = mark;
1845         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1846                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1847                                  sh->dv_meta_mask, meta);
1848         else
1849                 sh->dv_meta_mask = meta;
1850         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1851                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1852                                  sh->dv_meta_mask, reg_c0);
1853         else
1854                 sh->dv_regc0_mask = reg_c0;
1855         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1856         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1857         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1858         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1859 }
1860
1861 /**
1862  * Allocate page of door-bells and register it using DevX API.
1863  *
1864  * @param [in] dev
1865  *   Pointer to Ethernet device.
1866  *
1867  * @return
1868  *   Pointer to new page on success, NULL otherwise.
1869  */
1870 static struct mlx5_devx_dbr_page *
1871 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1872 {
1873         struct mlx5_priv *priv = dev->data->dev_private;
1874         struct mlx5_devx_dbr_page *page;
1875
1876         /* Allocate space for door-bell page and management data. */
1877         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1878                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1879         if (!page) {
1880                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1881                         dev->data->port_id);
1882                 return NULL;
1883         }
1884         /* Register allocated memory. */
1885         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1886                                               MLX5_DBR_PAGE_SIZE, 0);
1887         if (!page->umem) {
1888                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1889                         dev->data->port_id);
1890                 rte_free(page);
1891                 return NULL;
1892         }
1893         return page;
1894 }
1895
1896 /**
1897  * Find the next available door-bell, allocate new page if needed.
1898  *
1899  * @param [in] dev
1900  *   Pointer to Ethernet device.
1901  * @param [out] dbr_page
1902  *   Door-bell page containing the page data.
1903  *
1904  * @return
1905  *   Door-bell address offset on success, a negative error value otherwise.
1906  */
1907 int64_t
1908 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1909 {
1910         struct mlx5_priv *priv = dev->data->dev_private;
1911         struct mlx5_devx_dbr_page *page = NULL;
1912         uint32_t i, j;
1913
1914         LIST_FOREACH(page, &priv->dbrpgs, next)
1915                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1916                         break;
1917         if (!page) { /* No page with free door-bell exists. */
1918                 page = mlx5_alloc_dbr_page(dev);
1919                 if (!page) /* Failed to allocate new page. */
1920                         return (-1);
1921                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1922         }
1923         /* Loop to find bitmap part with clear bit. */
1924         for (i = 0;
1925              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1926              i++)
1927                 ; /* Empty. */
1928         /* Find the first clear bit. */
1929         j = rte_bsf64(~page->dbr_bitmap[i]);
1930         assert(i < (MLX5_DBR_PER_PAGE / 64));
1931         page->dbr_bitmap[i] |= (1 << j);
1932         page->dbr_count++;
1933         *dbr_page = page;
1934         return (((i * 64) + j) * sizeof(uint64_t));
1935 }
1936
1937 /**
1938  * Release a door-bell record.
1939  *
1940  * @param [in] dev
1941  *   Pointer to Ethernet device.
1942  * @param [in] umem_id
1943  *   UMEM ID of page containing the door-bell record to release.
1944  * @param [in] offset
1945  *   Offset of door-bell record in page.
1946  *
1947  * @return
1948  *   0 on success, a negative error value otherwise.
1949  */
1950 int32_t
1951 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1952 {
1953         struct mlx5_priv *priv = dev->data->dev_private;
1954         struct mlx5_devx_dbr_page *page = NULL;
1955         int ret = 0;
1956
1957         LIST_FOREACH(page, &priv->dbrpgs, next)
1958                 /* Find the page this address belongs to. */
1959                 if (page->umem->umem_id == umem_id)
1960                         break;
1961         if (!page)
1962                 return -EINVAL;
1963         page->dbr_count--;
1964         if (!page->dbr_count) {
1965                 /* Page not used, free it and remove from list. */
1966                 LIST_REMOVE(page, next);
1967                 if (page->umem)
1968                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1969                 rte_free(page);
1970         } else {
1971                 /* Mark in bitmap that this door-bell is not in use. */
1972                 offset /= MLX5_DBR_SIZE;
1973                 int i = offset / 64;
1974                 int j = offset % 64;
1975
1976                 page->dbr_bitmap[i] &= ~(1 << j);
1977         }
1978         return ret;
1979 }
1980
1981 /**
1982  * Check sibling device configurations.
1983  *
1984  * Sibling devices sharing the Infiniband device context
1985  * should have compatible configurations. This regards
1986  * representors and bonding slaves.
1987  *
1988  * @param priv
1989  *   Private device descriptor.
1990  * @param config
1991  *   Configuration of the device is going to be created.
1992  *
1993  * @return
1994  *   0 on success, EINVAL otherwise
1995  */
1996 static int
1997 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1998                               struct mlx5_dev_config *config)
1999 {
2000         struct mlx5_ibv_shared *sh = priv->sh;
2001         struct mlx5_dev_config *sh_conf = NULL;
2002         uint16_t port_id;
2003
2004         assert(sh);
2005         /* Nothing to compare for the single/first device. */
2006         if (sh->refcnt == 1)
2007                 return 0;
2008         /* Find the device with shared context. */
2009         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2010                 struct mlx5_priv *opriv =
2011                         rte_eth_devices[port_id].data->dev_private;
2012
2013                 if (opriv && opriv != priv && opriv->sh == sh) {
2014                         sh_conf = &opriv->config;
2015                         break;
2016                 }
2017         }
2018         if (!sh_conf)
2019                 return 0;
2020         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
2021                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
2022                              " for shared %s context", sh->ibdev_name);
2023                 rte_errno = EINVAL;
2024                 return rte_errno;
2025         }
2026         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
2027                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
2028                              " for shared %s context", sh->ibdev_name);
2029                 rte_errno = EINVAL;
2030                 return rte_errno;
2031         }
2032         return 0;
2033 }
2034 /**
2035  * Spawn an Ethernet device from Verbs information.
2036  *
2037  * @param dpdk_dev
2038  *   Backing DPDK device.
2039  * @param spawn
2040  *   Verbs device parameters (name, port, switch_info) to spawn.
2041  * @param config
2042  *   Device configuration parameters.
2043  *
2044  * @return
2045  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
2046  *   is set. The following errors are defined:
2047  *
2048  *   EBUSY: device is not supposed to be spawned.
2049  *   EEXIST: device is already spawned
2050  */
2051 static struct rte_eth_dev *
2052 mlx5_dev_spawn(struct rte_device *dpdk_dev,
2053                struct mlx5_dev_spawn_data *spawn,
2054                struct mlx5_dev_config config)
2055 {
2056         const struct mlx5_switch_info *switch_info = &spawn->info;
2057         struct mlx5_ibv_shared *sh = NULL;
2058         struct ibv_port_attr port_attr;
2059         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
2060         struct rte_eth_dev *eth_dev = NULL;
2061         struct mlx5_priv *priv = NULL;
2062         int err = 0;
2063         unsigned int hw_padding = 0;
2064         unsigned int mps;
2065         unsigned int cqe_comp;
2066         unsigned int cqe_pad = 0;
2067         unsigned int tunnel_en = 0;
2068         unsigned int mpls_en = 0;
2069         unsigned int swp = 0;
2070         unsigned int mprq = 0;
2071         unsigned int mprq_min_stride_size_n = 0;
2072         unsigned int mprq_max_stride_size_n = 0;
2073         unsigned int mprq_min_stride_num_n = 0;
2074         unsigned int mprq_max_stride_num_n = 0;
2075         struct rte_ether_addr mac;
2076         char name[RTE_ETH_NAME_MAX_LEN];
2077         int own_domain_id = 0;
2078         uint16_t port_id;
2079         unsigned int i;
2080 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2081         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
2082 #endif
2083
2084         /* Determine if this port representor is supposed to be spawned. */
2085         if (switch_info->representor && dpdk_dev->devargs) {
2086                 struct rte_eth_devargs eth_da;
2087
2088                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
2089                 if (err) {
2090                         rte_errno = -err;
2091                         DRV_LOG(ERR, "failed to process device arguments: %s",
2092                                 strerror(rte_errno));
2093                         return NULL;
2094                 }
2095                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
2096                         if (eth_da.representor_ports[i] ==
2097                             (uint16_t)switch_info->port_name)
2098                                 break;
2099                 if (i == eth_da.nb_representor_ports) {
2100                         rte_errno = EBUSY;
2101                         return NULL;
2102                 }
2103         }
2104         /* Build device name. */
2105         if (spawn->pf_bond <  0) {
2106                 /* Single device. */
2107                 if (!switch_info->representor)
2108                         strlcpy(name, dpdk_dev->name, sizeof(name));
2109                 else
2110                         snprintf(name, sizeof(name), "%s_representor_%u",
2111                                  dpdk_dev->name, switch_info->port_name);
2112         } else {
2113                 /* Bonding device. */
2114                 if (!switch_info->representor)
2115                         snprintf(name, sizeof(name), "%s_%s",
2116                                  dpdk_dev->name, spawn->ibv_dev->name);
2117                 else
2118                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
2119                                  dpdk_dev->name, spawn->ibv_dev->name,
2120                                  switch_info->port_name);
2121         }
2122         /* check if the device is already spawned */
2123         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2124                 rte_errno = EEXIST;
2125                 return NULL;
2126         }
2127         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2128         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2129                 eth_dev = rte_eth_dev_attach_secondary(name);
2130                 if (eth_dev == NULL) {
2131                         DRV_LOG(ERR, "can not attach rte ethdev");
2132                         rte_errno = ENOMEM;
2133                         return NULL;
2134                 }
2135                 eth_dev->device = dpdk_dev;
2136                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2137                 err = mlx5_proc_priv_init(eth_dev);
2138                 if (err)
2139                         return NULL;
2140                 /* Receive command fd from primary process */
2141                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2142                 if (err < 0)
2143                         return NULL;
2144                 /* Remap UAR for Tx queues. */
2145                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2146                 if (err)
2147                         return NULL;
2148                 /*
2149                  * Ethdev pointer is still required as input since
2150                  * the primary device is not accessible from the
2151                  * secondary process.
2152                  */
2153                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2154                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2155                 return eth_dev;
2156         }
2157         /*
2158          * Some parameters ("tx_db_nc" in particularly) are needed in
2159          * advance to create dv/verbs device context. We proceed the
2160          * devargs here to get ones, and later proceed devargs again
2161          * to override some hardware settings.
2162          */
2163         err = mlx5_args(&config, dpdk_dev->devargs);
2164         if (err) {
2165                 err = rte_errno;
2166                 DRV_LOG(ERR, "failed to process device arguments: %s",
2167                         strerror(rte_errno));
2168                 goto error;
2169         }
2170         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2171         if (!sh)
2172                 return NULL;
2173         config.devx = sh->devx;
2174 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2175         config.dest_tir = 1;
2176 #endif
2177 #ifdef HAVE_IBV_MLX5_MOD_SWP
2178         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2179 #endif
2180         /*
2181          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2182          * as all ConnectX-5 devices.
2183          */
2184 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2185         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2186 #endif
2187 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2188         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2189 #endif
2190         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2191         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2192                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2193                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2194                         mps = MLX5_MPW_ENHANCED;
2195                 } else {
2196                         DRV_LOG(DEBUG, "MPW is supported");
2197                         mps = MLX5_MPW;
2198                 }
2199         } else {
2200                 DRV_LOG(DEBUG, "MPW isn't supported");
2201                 mps = MLX5_MPW_DISABLED;
2202         }
2203 #ifdef HAVE_IBV_MLX5_MOD_SWP
2204         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2205                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2206         DRV_LOG(DEBUG, "SWP support: %u", swp);
2207 #endif
2208         config.swp = !!swp;
2209 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2210         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2211                 struct mlx5dv_striding_rq_caps mprq_caps =
2212                         dv_attr.striding_rq_caps;
2213
2214                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2215                         mprq_caps.min_single_stride_log_num_of_bytes);
2216                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2217                         mprq_caps.max_single_stride_log_num_of_bytes);
2218                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2219                         mprq_caps.min_single_wqe_log_num_of_strides);
2220                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2221                         mprq_caps.max_single_wqe_log_num_of_strides);
2222                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2223                         mprq_caps.supported_qpts);
2224                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2225                 mprq = 1;
2226                 mprq_min_stride_size_n =
2227                         mprq_caps.min_single_stride_log_num_of_bytes;
2228                 mprq_max_stride_size_n =
2229                         mprq_caps.max_single_stride_log_num_of_bytes;
2230                 mprq_min_stride_num_n =
2231                         mprq_caps.min_single_wqe_log_num_of_strides;
2232                 mprq_max_stride_num_n =
2233                         mprq_caps.max_single_wqe_log_num_of_strides;
2234                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2235                                                    mprq_min_stride_num_n);
2236         }
2237 #endif
2238         if (RTE_CACHE_LINE_SIZE == 128 &&
2239             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2240                 cqe_comp = 0;
2241         else
2242                 cqe_comp = 1;
2243         config.cqe_comp = cqe_comp;
2244 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2245         /* Whether device supports 128B Rx CQE padding. */
2246         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2247                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2248 #endif
2249 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2250         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2251                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2252                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2253                              (dv_attr.tunnel_offloads_caps &
2254                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2255         }
2256         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2257                 tunnel_en ? "" : "not ");
2258 #else
2259         DRV_LOG(WARNING,
2260                 "tunnel offloading disabled due to old OFED/rdma-core version");
2261 #endif
2262         config.tunnel_en = tunnel_en;
2263 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2264         mpls_en = ((dv_attr.tunnel_offloads_caps &
2265                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2266                    (dv_attr.tunnel_offloads_caps &
2267                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2268         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2269                 mpls_en ? "" : "not ");
2270 #else
2271         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2272                 " old OFED/rdma-core version or firmware configuration");
2273 #endif
2274         config.mpls_en = mpls_en;
2275         /* Check port status. */
2276         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2277         if (err) {
2278                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2279                 goto error;
2280         }
2281         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2282                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2283                 err = EINVAL;
2284                 goto error;
2285         }
2286         if (port_attr.state != IBV_PORT_ACTIVE)
2287                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2288                         mlx5_glue->port_state_str(port_attr.state),
2289                         port_attr.state);
2290         /* Allocate private eth device data. */
2291         priv = rte_zmalloc("ethdev private structure",
2292                            sizeof(*priv),
2293                            RTE_CACHE_LINE_SIZE);
2294         if (priv == NULL) {
2295                 DRV_LOG(ERR, "priv allocation failure");
2296                 err = ENOMEM;
2297                 goto error;
2298         }
2299         priv->sh = sh;
2300         priv->ibv_port = spawn->ibv_port;
2301         priv->pci_dev = spawn->pci_dev;
2302         priv->mtu = RTE_ETHER_MTU;
2303 #ifndef RTE_ARCH_64
2304         /* Initialize UAR access locks for 32bit implementations. */
2305         rte_spinlock_init(&priv->uar_lock_cq);
2306         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2307                 rte_spinlock_init(&priv->uar_lock[i]);
2308 #endif
2309         /* Some internal functions rely on Netlink sockets, open them now. */
2310         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2311         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2312         priv->nl_sn = 0;
2313         priv->representor = !!switch_info->representor;
2314         priv->master = !!switch_info->master;
2315         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2316         priv->vport_meta_tag = 0;
2317         priv->vport_meta_mask = 0;
2318         priv->pf_bond = spawn->pf_bond;
2319 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2320         /*
2321          * The DevX port query API is implemented. E-Switch may use
2322          * either vport or reg_c[0] metadata register to match on
2323          * vport index. The engaged part of metadata register is
2324          * defined by mask.
2325          */
2326         if (switch_info->representor || switch_info->master) {
2327                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2328                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2329                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2330                                                  &devx_port);
2331                 if (err) {
2332                         DRV_LOG(WARNING,
2333                                 "can't query devx port %d on device %s",
2334                                 spawn->ibv_port, spawn->ibv_dev->name);
2335                         devx_port.comp_mask = 0;
2336                 }
2337         }
2338         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2339                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2340                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2341                 if (!priv->vport_meta_mask) {
2342                         DRV_LOG(ERR, "vport zero mask for port %d"
2343                                      " on bonding device %s",
2344                                      spawn->ibv_port, spawn->ibv_dev->name);
2345                         err = ENOTSUP;
2346                         goto error;
2347                 }
2348                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2349                         DRV_LOG(ERR, "invalid vport tag for port %d"
2350                                      " on bonding device %s",
2351                                      spawn->ibv_port, spawn->ibv_dev->name);
2352                         err = ENOTSUP;
2353                         goto error;
2354                 }
2355         }
2356         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2357                 priv->vport_id = devx_port.vport_num;
2358         } else if (spawn->pf_bond >= 0) {
2359                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2360                              " on bonding device %s",
2361                              spawn->ibv_port, spawn->ibv_dev->name);
2362                 err = ENOTSUP;
2363                 goto error;
2364         } else {
2365                 /* Suppose vport index in compatible way. */
2366                 priv->vport_id = switch_info->representor ?
2367                                  switch_info->port_name + 1 : -1;
2368         }
2369 #else
2370         /*
2371          * Kernel/rdma_core support single E-Switch per PF configurations
2372          * only and vport_id field contains the vport index for
2373          * associated VF, which is deduced from representor port name.
2374          * For example, let's have the IB device port 10, it has
2375          * attached network device eth0, which has port name attribute
2376          * pf0vf2, we can deduce the VF number as 2, and set vport index
2377          * as 3 (2+1). This assigning schema should be changed if the
2378          * multiple E-Switch instances per PF configurations or/and PCI
2379          * subfunctions are added.
2380          */
2381         priv->vport_id = switch_info->representor ?
2382                          switch_info->port_name + 1 : -1;
2383 #endif
2384         /* representor_id field keeps the unmodified VF index. */
2385         priv->representor_id = switch_info->representor ?
2386                                switch_info->port_name : -1;
2387         /*
2388          * Look for sibling devices in order to reuse their switch domain
2389          * if any, otherwise allocate one.
2390          */
2391         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2392                 const struct mlx5_priv *opriv =
2393                         rte_eth_devices[port_id].data->dev_private;
2394
2395                 if (!opriv ||
2396                     opriv->sh != priv->sh ||
2397                         opriv->domain_id ==
2398                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2399                         continue;
2400                 priv->domain_id = opriv->domain_id;
2401                 break;
2402         }
2403         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2404                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2405                 if (err) {
2406                         err = rte_errno;
2407                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2408                                 strerror(rte_errno));
2409                         goto error;
2410                 }
2411                 own_domain_id = 1;
2412         }
2413         /* Override some values set by hardware configuration. */
2414         mlx5_args(&config, dpdk_dev->devargs);
2415         err = mlx5_dev_check_sibling_config(priv, &config);
2416         if (err)
2417                 goto error;
2418         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2419                             IBV_DEVICE_RAW_IP_CSUM);
2420         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2421                 (config.hw_csum ? "" : "not "));
2422 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2423         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2424         DRV_LOG(DEBUG, "counters are not supported");
2425 #endif
2426 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2427         if (config.dv_flow_en) {
2428                 DRV_LOG(WARNING, "DV flow is not supported");
2429                 config.dv_flow_en = 0;
2430         }
2431 #endif
2432         config.ind_table_max_size =
2433                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2434         /*
2435          * Remove this check once DPDK supports larger/variable
2436          * indirection tables.
2437          */
2438         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2439                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2440         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2441                 config.ind_table_max_size);
2442         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2443                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2444         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2445                 (config.hw_vlan_strip ? "" : "not "));
2446         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2447                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2448         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2449                 (config.hw_fcs_strip ? "" : "not "));
2450 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2451         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2452 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2453         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2454                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2455 #endif
2456         if (config.hw_padding && !hw_padding) {
2457                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2458                 config.hw_padding = 0;
2459         } else if (config.hw_padding) {
2460                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2461         }
2462         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2463                       (sh->device_attr.tso_caps.supported_qpts &
2464                        (1 << IBV_QPT_RAW_PACKET)));
2465         if (config.tso)
2466                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2467         /*
2468          * MPW is disabled by default, while the Enhanced MPW is enabled
2469          * by default.
2470          */
2471         if (config.mps == MLX5_ARG_UNSET)
2472                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2473                                                           MLX5_MPW_DISABLED;
2474         else
2475                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2476         DRV_LOG(INFO, "%sMPS is %s",
2477                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2478                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2479         if (config.cqe_comp && !cqe_comp) {
2480                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2481                 config.cqe_comp = 0;
2482         }
2483         if (config.cqe_pad && !cqe_pad) {
2484                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2485                 config.cqe_pad = 0;
2486         } else if (config.cqe_pad) {
2487                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2488         }
2489         if (config.devx) {
2490                 priv->counter_fallback = 0;
2491                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2492                 if (err) {
2493                         err = -err;
2494                         goto error;
2495                 }
2496                 if (!config.hca_attr.flow_counters_dump)
2497                         priv->counter_fallback = 1;
2498 #ifndef HAVE_IBV_DEVX_ASYNC
2499                 priv->counter_fallback = 1;
2500 #endif
2501                 if (priv->counter_fallback)
2502                         DRV_LOG(INFO, "Use fall-back DV counter management");
2503                 /* Check for LRO support. */
2504                 if (config.dest_tir && config.hca_attr.lro_cap &&
2505                     config.dv_flow_en) {
2506                         /* TBD check tunnel lro caps. */
2507                         config.lro.supported = config.hca_attr.lro_cap;
2508                         DRV_LOG(DEBUG, "Device supports LRO");
2509                         /*
2510                          * If LRO timeout is not configured by application,
2511                          * use the minimal supported value.
2512                          */
2513                         if (!config.lro.timeout)
2514                                 config.lro.timeout =
2515                                 config.hca_attr.lro_timer_supported_periods[0];
2516                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2517                                 config.lro.timeout);
2518                 }
2519 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2520                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2521                     config.dv_flow_en) {
2522                         uint8_t reg_c_mask =
2523                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2524                         /*
2525                          * Meter needs two REG_C's for color match and pre-sfx
2526                          * flow match. Here get the REG_C for color match.
2527                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2528                          */
2529                         reg_c_mask &= 0xfc;
2530                         if (__builtin_popcount(reg_c_mask) < 1) {
2531                                 priv->mtr_en = 0;
2532                                 DRV_LOG(WARNING, "No available register for"
2533                                         " meter.");
2534                         } else {
2535                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2536                                                       REG_C_0;
2537                                 priv->mtr_en = 1;
2538                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2539                                         priv->mtr_color_reg);
2540                         }
2541                 }
2542 #endif
2543         }
2544         if (config.mprq.enabled && mprq) {
2545                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2546                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2547                         config.mprq.stride_num_n =
2548                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2549                                         mprq_min_stride_num_n);
2550                         DRV_LOG(WARNING,
2551                                 "the number of strides"
2552                                 " for Multi-Packet RQ is out of range,"
2553                                 " setting default value (%u)",
2554                                 1 << config.mprq.stride_num_n);
2555                 }
2556                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2557                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2558         } else if (config.mprq.enabled && !mprq) {
2559                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2560                 config.mprq.enabled = 0;
2561         }
2562         if (config.max_dump_files_num == 0)
2563                 config.max_dump_files_num = 128;
2564         eth_dev = rte_eth_dev_allocate(name);
2565         if (eth_dev == NULL) {
2566                 DRV_LOG(ERR, "can not allocate rte ethdev");
2567                 err = ENOMEM;
2568                 goto error;
2569         }
2570         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2571         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2572         if (priv->representor) {
2573                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2574                 eth_dev->data->representor_id = priv->representor_id;
2575         }
2576         /*
2577          * Store associated network device interface index. This index
2578          * is permanent throughout the lifetime of device. So, we may store
2579          * the ifindex here and use the cached value further.
2580          */
2581         assert(spawn->ifindex);
2582         priv->if_index = spawn->ifindex;
2583         eth_dev->data->dev_private = priv;
2584         priv->dev_data = eth_dev->data;
2585         eth_dev->data->mac_addrs = priv->mac;
2586         eth_dev->device = dpdk_dev;
2587         /* Configure the first MAC address by default. */
2588         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2589                 DRV_LOG(ERR,
2590                         "port %u cannot get MAC address, is mlx5_en"
2591                         " loaded? (errno: %s)",
2592                         eth_dev->data->port_id, strerror(rte_errno));
2593                 err = ENODEV;
2594                 goto error;
2595         }
2596         DRV_LOG(INFO,
2597                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2598                 eth_dev->data->port_id,
2599                 mac.addr_bytes[0], mac.addr_bytes[1],
2600                 mac.addr_bytes[2], mac.addr_bytes[3],
2601                 mac.addr_bytes[4], mac.addr_bytes[5]);
2602 #ifndef NDEBUG
2603         {
2604                 char ifname[IF_NAMESIZE];
2605
2606                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2607                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2608                                 eth_dev->data->port_id, ifname);
2609                 else
2610                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2611                                 eth_dev->data->port_id);
2612         }
2613 #endif
2614         /* Get actual MTU if possible. */
2615         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2616         if (err) {
2617                 err = rte_errno;
2618                 goto error;
2619         }
2620         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2621                 priv->mtu);
2622         /* Initialize burst functions to prevent crashes before link-up. */
2623         eth_dev->rx_pkt_burst = removed_rx_burst;
2624         eth_dev->tx_pkt_burst = removed_tx_burst;
2625         eth_dev->dev_ops = &mlx5_dev_ops;
2626         /* Register MAC address. */
2627         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2628         if (config.vf && config.vf_nl_en)
2629                 mlx5_nl_mac_addr_sync(eth_dev);
2630         TAILQ_INIT(&priv->flows);
2631         TAILQ_INIT(&priv->ctrl_flows);
2632         TAILQ_INIT(&priv->flow_meters);
2633         TAILQ_INIT(&priv->flow_meter_profiles);
2634         /* Hint libmlx5 to use PMD allocator for data plane resources */
2635         struct mlx5dv_ctx_allocators alctr = {
2636                 .alloc = &mlx5_alloc_verbs_buf,
2637                 .free = &mlx5_free_verbs_buf,
2638                 .data = priv,
2639         };
2640         mlx5_glue->dv_set_context_attr(sh->ctx,
2641                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2642                                        (void *)((uintptr_t)&alctr));
2643         /* Bring Ethernet device up. */
2644         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2645                 eth_dev->data->port_id);
2646         mlx5_set_link_up(eth_dev);
2647         /*
2648          * Even though the interrupt handler is not installed yet,
2649          * interrupts will still trigger on the async_fd from
2650          * Verbs context returned by ibv_open_device().
2651          */
2652         mlx5_link_update(eth_dev, 0);
2653 #ifdef HAVE_MLX5DV_DR_ESWITCH
2654         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2655               (switch_info->representor || switch_info->master)))
2656                 config.dv_esw_en = 0;
2657 #else
2658         config.dv_esw_en = 0;
2659 #endif
2660         /* Detect minimal data bytes to inline. */
2661         mlx5_set_min_inline(spawn, &config);
2662         /* Store device configuration on private structure. */
2663         priv->config = config;
2664         /* Create context for virtual machine VLAN workaround. */
2665         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2666         if (config.dv_flow_en) {
2667                 err = mlx5_alloc_shared_dr(priv);
2668                 if (err)
2669                         goto error;
2670                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2671                 if (!priv->qrss_id_pool) {
2672                         DRV_LOG(ERR, "can't create flow id pool");
2673                         err = ENOMEM;
2674                         goto error;
2675                 }
2676         }
2677         /* Supported Verbs flow priority number detection. */
2678         err = mlx5_flow_discover_priorities(eth_dev);
2679         if (err < 0) {
2680                 err = -err;
2681                 goto error;
2682         }
2683         priv->config.flow_prio = err;
2684         if (!priv->config.dv_esw_en &&
2685             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2686                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2687                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2688                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2689         }
2690         mlx5_set_metadata_mask(eth_dev);
2691         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2692             !priv->sh->dv_regc0_mask) {
2693                 DRV_LOG(ERR, "metadata mode %u is not supported "
2694                              "(no metadata reg_c[0] is available)",
2695                              priv->config.dv_xmeta_en);
2696                         err = ENOTSUP;
2697                         goto error;
2698         }
2699         /* Query availibility of metadata reg_c's. */
2700         err = mlx5_flow_discover_mreg_c(eth_dev);
2701         if (err < 0) {
2702                 err = -err;
2703                 goto error;
2704         }
2705         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2706                 DRV_LOG(DEBUG,
2707                         "port %u extensive metadata register is not supported",
2708                         eth_dev->data->port_id);
2709                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2710                         DRV_LOG(ERR, "metadata mode %u is not supported "
2711                                      "(no metadata registers available)",
2712                                      priv->config.dv_xmeta_en);
2713                         err = ENOTSUP;
2714                         goto error;
2715                 }
2716         }
2717         if (priv->config.dv_flow_en &&
2718             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2719             mlx5_flow_ext_mreg_supported(eth_dev) &&
2720             priv->sh->dv_regc0_mask) {
2721                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2722                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2723                 if (!priv->mreg_cp_tbl) {
2724                         err = ENOMEM;
2725                         goto error;
2726                 }
2727         }
2728         return eth_dev;
2729 error:
2730         if (priv) {
2731                 if (priv->mreg_cp_tbl)
2732                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2733                 if (priv->sh)
2734                         mlx5_free_shared_dr(priv);
2735                 if (priv->nl_socket_route >= 0)
2736                         close(priv->nl_socket_route);
2737                 if (priv->nl_socket_rdma >= 0)
2738                         close(priv->nl_socket_rdma);
2739                 if (priv->vmwa_context)
2740                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2741                 if (priv->qrss_id_pool)
2742                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2743                 if (own_domain_id)
2744                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2745                 rte_free(priv);
2746                 if (eth_dev != NULL)
2747                         eth_dev->data->dev_private = NULL;
2748         }
2749         if (eth_dev != NULL) {
2750                 /* mac_addrs must not be freed alone because part of dev_private */
2751                 eth_dev->data->mac_addrs = NULL;
2752                 rte_eth_dev_release_port(eth_dev);
2753         }
2754         if (sh)
2755                 mlx5_free_shared_ibctx(sh);
2756         assert(err > 0);
2757         rte_errno = err;
2758         return NULL;
2759 }
2760
2761 /**
2762  * Comparison callback to sort device data.
2763  *
2764  * This is meant to be used with qsort().
2765  *
2766  * @param a[in]
2767  *   Pointer to pointer to first data object.
2768  * @param b[in]
2769  *   Pointer to pointer to second data object.
2770  *
2771  * @return
2772  *   0 if both objects are equal, less than 0 if the first argument is less
2773  *   than the second, greater than 0 otherwise.
2774  */
2775 static int
2776 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2777 {
2778         const struct mlx5_switch_info *si_a =
2779                 &((const struct mlx5_dev_spawn_data *)a)->info;
2780         const struct mlx5_switch_info *si_b =
2781                 &((const struct mlx5_dev_spawn_data *)b)->info;
2782         int ret;
2783
2784         /* Master device first. */
2785         ret = si_b->master - si_a->master;
2786         if (ret)
2787                 return ret;
2788         /* Then representor devices. */
2789         ret = si_b->representor - si_a->representor;
2790         if (ret)
2791                 return ret;
2792         /* Unidentified devices come last in no specific order. */
2793         if (!si_a->representor)
2794                 return 0;
2795         /* Order representors by name. */
2796         return si_a->port_name - si_b->port_name;
2797 }
2798
2799 /**
2800  * Match PCI information for possible slaves of bonding device.
2801  *
2802  * @param[in] ibv_dev
2803  *   Pointer to Infiniband device structure.
2804  * @param[in] pci_dev
2805  *   Pointer to PCI device structure to match PCI address.
2806  * @param[in] nl_rdma
2807  *   Netlink RDMA group socket handle.
2808  *
2809  * @return
2810  *   negative value if no bonding device found, otherwise
2811  *   positive index of slave PF in bonding.
2812  */
2813 static int
2814 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2815                            const struct rte_pci_device *pci_dev,
2816                            int nl_rdma)
2817 {
2818         char ifname[IF_NAMESIZE + 1];
2819         unsigned int ifindex;
2820         unsigned int np, i;
2821         FILE *file = NULL;
2822         int pf = -1;
2823
2824         /*
2825          * Try to get master device name. If something goes
2826          * wrong suppose the lack of kernel support and no
2827          * bonding devices.
2828          */
2829         if (nl_rdma < 0)
2830                 return -1;
2831         if (!strstr(ibv_dev->name, "bond"))
2832                 return -1;
2833         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2834         if (!np)
2835                 return -1;
2836         /*
2837          * The Master device might not be on the predefined
2838          * port (not on port index 1, it is not garanted),
2839          * we have to scan all Infiniband device port and
2840          * find master.
2841          */
2842         for (i = 1; i <= np; ++i) {
2843                 /* Check whether Infiniband port is populated. */
2844                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2845                 if (!ifindex)
2846                         continue;
2847                 if (!if_indextoname(ifindex, ifname))
2848                         continue;
2849                 /* Try to read bonding slave names from sysfs. */
2850                 MKSTR(slaves,
2851                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2852                 file = fopen(slaves, "r");
2853                 if (file)
2854                         break;
2855         }
2856         if (!file)
2857                 return -1;
2858         /* Use safe format to check maximal buffer length. */
2859         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2860         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2861                 char tmp_str[IF_NAMESIZE + 32];
2862                 struct rte_pci_addr pci_addr;
2863                 struct mlx5_switch_info info;
2864
2865                 /* Process slave interface names in the loop. */
2866                 snprintf(tmp_str, sizeof(tmp_str),
2867                          "/sys/class/net/%s", ifname);
2868                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2869                         DRV_LOG(WARNING, "can not get PCI address"
2870                                          " for netdev \"%s\"", ifname);
2871                         continue;
2872                 }
2873                 if (pci_dev->addr.domain != pci_addr.domain ||
2874                     pci_dev->addr.bus != pci_addr.bus ||
2875                     pci_dev->addr.devid != pci_addr.devid ||
2876                     pci_dev->addr.function != pci_addr.function)
2877                         continue;
2878                 /* Slave interface PCI address match found. */
2879                 fclose(file);
2880                 snprintf(tmp_str, sizeof(tmp_str),
2881                          "/sys/class/net/%s/phys_port_name", ifname);
2882                 file = fopen(tmp_str, "rb");
2883                 if (!file)
2884                         break;
2885                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2886                 if (fscanf(file, "%32s", tmp_str) == 1)
2887                         mlx5_translate_port_name(tmp_str, &info);
2888                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2889                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2890                         pf = info.port_name;
2891                 break;
2892         }
2893         if (file)
2894                 fclose(file);
2895         return pf;
2896 }
2897
2898 /**
2899  * DPDK callback to register a PCI device.
2900  *
2901  * This function spawns Ethernet devices out of a given PCI device.
2902  *
2903  * @param[in] pci_drv
2904  *   PCI driver structure (mlx5_driver).
2905  * @param[in] pci_dev
2906  *   PCI device information.
2907  *
2908  * @return
2909  *   0 on success, a negative errno value otherwise and rte_errno is set.
2910  */
2911 static int
2912 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2913                struct rte_pci_device *pci_dev)
2914 {
2915         struct ibv_device **ibv_list;
2916         /*
2917          * Number of found IB Devices matching with requested PCI BDF.
2918          * nd != 1 means there are multiple IB devices over the same
2919          * PCI device and we have representors and master.
2920          */
2921         unsigned int nd = 0;
2922         /*
2923          * Number of found IB device Ports. nd = 1 and np = 1..n means
2924          * we have the single multiport IB device, and there may be
2925          * representors attached to some of found ports.
2926          */
2927         unsigned int np = 0;
2928         /*
2929          * Number of DPDK ethernet devices to Spawn - either over
2930          * multiple IB devices or multiple ports of single IB device.
2931          * Actually this is the number of iterations to spawn.
2932          */
2933         unsigned int ns = 0;
2934         /*
2935          * Bonding device
2936          *   < 0 - no bonding device (single one)
2937          *  >= 0 - bonding device (value is slave PF index)
2938          */
2939         int bd = -1;
2940         struct mlx5_dev_spawn_data *list = NULL;
2941         struct mlx5_dev_config dev_config;
2942         int ret;
2943
2944         ret = mlx5_init_once();
2945         if (ret) {
2946                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2947                         strerror(rte_errno));
2948                 return -rte_errno;
2949         }
2950         assert(pci_drv == &mlx5_driver);
2951         errno = 0;
2952         ibv_list = mlx5_glue->get_device_list(&ret);
2953         if (!ibv_list) {
2954                 rte_errno = errno ? errno : ENOSYS;
2955                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2956                 return -rte_errno;
2957         }
2958         /*
2959          * First scan the list of all Infiniband devices to find
2960          * matching ones, gathering into the list.
2961          */
2962         struct ibv_device *ibv_match[ret + 1];
2963         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2964         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2965         unsigned int i;
2966
2967         while (ret-- > 0) {
2968                 struct rte_pci_addr pci_addr;
2969
2970                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2971                 bd = mlx5_device_bond_pci_match
2972                                 (ibv_list[ret], pci_dev, nl_rdma);
2973                 if (bd >= 0) {
2974                         /*
2975                          * Bonding device detected. Only one match is allowed,
2976                          * the bonding is supported over multi-port IB device,
2977                          * there should be no matches on representor PCI
2978                          * functions or non VF LAG bonding devices with
2979                          * specified address.
2980                          */
2981                         if (nd) {
2982                                 DRV_LOG(ERR,
2983                                         "multiple PCI match on bonding device"
2984                                         "\"%s\" found", ibv_list[ret]->name);
2985                                 rte_errno = ENOENT;
2986                                 ret = -rte_errno;
2987                                 goto exit;
2988                         }
2989                         DRV_LOG(INFO, "PCI information matches for"
2990                                       " slave %d bonding device \"%s\"",
2991                                       bd, ibv_list[ret]->name);
2992                         ibv_match[nd++] = ibv_list[ret];
2993                         break;
2994                 }
2995                 if (mlx5_dev_to_pci_addr
2996                         (ibv_list[ret]->ibdev_path, &pci_addr))
2997                         continue;
2998                 if (pci_dev->addr.domain != pci_addr.domain ||
2999                     pci_dev->addr.bus != pci_addr.bus ||
3000                     pci_dev->addr.devid != pci_addr.devid ||
3001                     pci_dev->addr.function != pci_addr.function)
3002                         continue;
3003                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
3004                         ibv_list[ret]->name);
3005                 ibv_match[nd++] = ibv_list[ret];
3006         }
3007         ibv_match[nd] = NULL;
3008         if (!nd) {
3009                 /* No device matches, just complain and bail out. */
3010                 DRV_LOG(WARNING,
3011                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
3012                         " are kernel drivers loaded?",
3013                         pci_dev->addr.domain, pci_dev->addr.bus,
3014                         pci_dev->addr.devid, pci_dev->addr.function);
3015                 rte_errno = ENOENT;
3016                 ret = -rte_errno;
3017                 goto exit;
3018         }
3019         if (nd == 1) {
3020                 /*
3021                  * Found single matching device may have multiple ports.
3022                  * Each port may be representor, we have to check the port
3023                  * number and check the representors existence.
3024                  */
3025                 if (nl_rdma >= 0)
3026                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
3027                 if (!np)
3028                         DRV_LOG(WARNING, "can not get IB device \"%s\""
3029                                          " ports number", ibv_match[0]->name);
3030                 if (bd >= 0 && !np) {
3031                         DRV_LOG(ERR, "can not get ports"
3032                                      " for bonding device");
3033                         rte_errno = ENOENT;
3034                         ret = -rte_errno;
3035                         goto exit;
3036                 }
3037         }
3038 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
3039         if (bd >= 0) {
3040                 /*
3041                  * This may happen if there is VF LAG kernel support and
3042                  * application is compiled with older rdma_core library.
3043                  */
3044                 DRV_LOG(ERR,
3045                         "No kernel/verbs support for VF LAG bonding found.");
3046                 rte_errno = ENOTSUP;
3047                 ret = -rte_errno;
3048                 goto exit;
3049         }
3050 #endif
3051         /*
3052          * Now we can determine the maximal
3053          * amount of devices to be spawned.
3054          */
3055         list = rte_zmalloc("device spawn data",
3056                          sizeof(struct mlx5_dev_spawn_data) *
3057                          (np ? np : nd),
3058                          RTE_CACHE_LINE_SIZE);
3059         if (!list) {
3060                 DRV_LOG(ERR, "spawn data array allocation failure");
3061                 rte_errno = ENOMEM;
3062                 ret = -rte_errno;
3063                 goto exit;
3064         }
3065         if (bd >= 0 || np > 1) {
3066                 /*
3067                  * Single IB device with multiple ports found,
3068                  * it may be E-Switch master device and representors.
3069                  * We have to perform identification trough the ports.
3070                  */
3071                 assert(nl_rdma >= 0);
3072                 assert(ns == 0);
3073                 assert(nd == 1);
3074                 assert(np);
3075                 for (i = 1; i <= np; ++i) {
3076                         list[ns].max_port = np;
3077                         list[ns].ibv_port = i;
3078                         list[ns].ibv_dev = ibv_match[0];
3079                         list[ns].eth_dev = NULL;
3080                         list[ns].pci_dev = pci_dev;
3081                         list[ns].pf_bond = bd;
3082                         list[ns].ifindex = mlx5_nl_ifindex
3083                                         (nl_rdma, list[ns].ibv_dev->name, i);
3084                         if (!list[ns].ifindex) {
3085                                 /*
3086                                  * No network interface index found for the
3087                                  * specified port, it means there is no
3088                                  * representor on this port. It's OK,
3089                                  * there can be disabled ports, for example
3090                                  * if sriov_numvfs < sriov_totalvfs.
3091                                  */
3092                                 continue;
3093                         }
3094                         ret = -1;
3095                         if (nl_route >= 0)
3096                                 ret = mlx5_nl_switch_info
3097                                                (nl_route,
3098                                                 list[ns].ifindex,
3099                                                 &list[ns].info);
3100                         if (ret || (!list[ns].info.representor &&
3101                                     !list[ns].info.master)) {
3102                                 /*
3103                                  * We failed to recognize representors with
3104                                  * Netlink, let's try to perform the task
3105                                  * with sysfs.
3106                                  */
3107                                 ret =  mlx5_sysfs_switch_info
3108                                                 (list[ns].ifindex,
3109                                                  &list[ns].info);
3110                         }
3111                         if (!ret && bd >= 0) {
3112                                 switch (list[ns].info.name_type) {
3113                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
3114                                         if (list[ns].info.port_name == bd)
3115                                                 ns++;
3116                                         break;
3117                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
3118                                         if (list[ns].info.pf_num == bd)
3119                                                 ns++;
3120                                         break;
3121                                 default:
3122                                         break;
3123                                 }
3124                                 continue;
3125                         }
3126                         if (!ret && (list[ns].info.representor ^
3127                                      list[ns].info.master))
3128                                 ns++;
3129                 }
3130                 if (!ns) {
3131                         DRV_LOG(ERR,
3132                                 "unable to recognize master/representors"
3133                                 " on the IB device with multiple ports");
3134                         rte_errno = ENOENT;
3135                         ret = -rte_errno;
3136                         goto exit;
3137                 }
3138         } else {
3139                 /*
3140                  * The existence of several matching entries (nd > 1) means
3141                  * port representors have been instantiated. No existing Verbs
3142                  * call nor sysfs entries can tell them apart, this can only
3143                  * be done through Netlink calls assuming kernel drivers are
3144                  * recent enough to support them.
3145                  *
3146                  * In the event of identification failure through Netlink,
3147                  * try again through sysfs, then:
3148                  *
3149                  * 1. A single IB device matches (nd == 1) with single
3150                  *    port (np=0/1) and is not a representor, assume
3151                  *    no switch support.
3152                  *
3153                  * 2. Otherwise no safe assumptions can be made;
3154                  *    complain louder and bail out.
3155                  */
3156                 np = 1;
3157                 for (i = 0; i != nd; ++i) {
3158                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3159                         list[ns].max_port = 1;
3160                         list[ns].ibv_port = 1;
3161                         list[ns].ibv_dev = ibv_match[i];
3162                         list[ns].eth_dev = NULL;
3163                         list[ns].pci_dev = pci_dev;
3164                         list[ns].pf_bond = -1;
3165                         list[ns].ifindex = 0;
3166                         if (nl_rdma >= 0)
3167                                 list[ns].ifindex = mlx5_nl_ifindex
3168                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3169                         if (!list[ns].ifindex) {
3170                                 char ifname[IF_NAMESIZE];
3171
3172                                 /*
3173                                  * Netlink failed, it may happen with old
3174                                  * ib_core kernel driver (before 4.16).
3175                                  * We can assume there is old driver because
3176                                  * here we are processing single ports IB
3177                                  * devices. Let's try sysfs to retrieve
3178                                  * the ifindex. The method works for
3179                                  * master device only.
3180                                  */
3181                                 if (nd > 1) {
3182                                         /*
3183                                          * Multiple devices found, assume
3184                                          * representors, can not distinguish
3185                                          * master/representor and retrieve
3186                                          * ifindex via sysfs.
3187                                          */
3188                                         continue;
3189                                 }
3190                                 ret = mlx5_get_master_ifname
3191                                         (ibv_match[i]->ibdev_path, &ifname);
3192                                 if (!ret)
3193                                         list[ns].ifindex =
3194                                                 if_nametoindex(ifname);
3195                                 if (!list[ns].ifindex) {
3196                                         /*
3197                                          * No network interface index found
3198                                          * for the specified device, it means
3199                                          * there it is neither representor
3200                                          * nor master.
3201                                          */
3202                                         continue;
3203                                 }
3204                         }
3205                         ret = -1;
3206                         if (nl_route >= 0)
3207                                 ret = mlx5_nl_switch_info
3208                                                (nl_route,
3209                                                 list[ns].ifindex,
3210                                                 &list[ns].info);
3211                         if (ret || (!list[ns].info.representor &&
3212                                     !list[ns].info.master)) {
3213                                 /*
3214                                  * We failed to recognize representors with
3215                                  * Netlink, let's try to perform the task
3216                                  * with sysfs.
3217                                  */
3218                                 ret =  mlx5_sysfs_switch_info
3219                                                 (list[ns].ifindex,
3220                                                  &list[ns].info);
3221                         }
3222                         if (!ret && (list[ns].info.representor ^
3223                                      list[ns].info.master)) {
3224                                 ns++;
3225                         } else if ((nd == 1) &&
3226                                    !list[ns].info.representor &&
3227                                    !list[ns].info.master) {
3228                                 /*
3229                                  * Single IB device with
3230                                  * one physical port and
3231                                  * attached network device.
3232                                  * May be SRIOV is not enabled
3233                                  * or there is no representors.
3234                                  */
3235                                 DRV_LOG(INFO, "no E-Switch support detected");
3236                                 ns++;
3237                                 break;
3238                         }
3239                 }
3240                 if (!ns) {
3241                         DRV_LOG(ERR,
3242                                 "unable to recognize master/representors"
3243                                 " on the multiple IB devices");
3244                         rte_errno = ENOENT;
3245                         ret = -rte_errno;
3246                         goto exit;
3247                 }
3248         }
3249         assert(ns);
3250         /*
3251          * Sort list to probe devices in natural order for users convenience
3252          * (i.e. master first, then representors from lowest to highest ID).
3253          */
3254         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3255         /* Default configuration. */
3256         dev_config = (struct mlx5_dev_config){
3257                 .hw_padding = 0,
3258                 .mps = MLX5_ARG_UNSET,
3259                 .dbnc = MLX5_ARG_UNSET,
3260                 .rx_vec_en = 1,
3261                 .txq_inline_max = MLX5_ARG_UNSET,
3262                 .txq_inline_min = MLX5_ARG_UNSET,
3263                 .txq_inline_mpw = MLX5_ARG_UNSET,
3264                 .txqs_inline = MLX5_ARG_UNSET,
3265                 .vf_nl_en = 1,
3266                 .mr_ext_memseg_en = 1,
3267                 .mprq = {
3268                         .enabled = 0, /* Disabled by default. */
3269                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3270                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3271                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3272                 },
3273                 .dv_esw_en = 1,
3274                 .dv_flow_en = 1,
3275         };
3276         /* Device specific configuration. */
3277         switch (pci_dev->id.device_id) {
3278         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3279         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3280         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3281         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3282         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3283         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3284         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3285                 dev_config.vf = 1;
3286                 break;
3287         default:
3288                 break;
3289         }
3290         for (i = 0; i != ns; ++i) {
3291                 uint32_t restore;
3292
3293                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3294                                                  &list[i],
3295                                                  dev_config);
3296                 if (!list[i].eth_dev) {
3297                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3298                                 break;
3299                         /* Device is disabled or already spawned. Ignore it. */
3300                         continue;
3301                 }
3302                 restore = list[i].eth_dev->data->dev_flags;
3303                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3304                 /* Restore non-PCI flags cleared by the above call. */
3305                 list[i].eth_dev->data->dev_flags |= restore;
3306                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3307                 rte_eth_dev_probing_finish(list[i].eth_dev);
3308         }
3309         if (i != ns) {
3310                 DRV_LOG(ERR,
3311                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3312                         " encountering an error: %s",
3313                         pci_dev->addr.domain, pci_dev->addr.bus,
3314                         pci_dev->addr.devid, pci_dev->addr.function,
3315                         strerror(rte_errno));
3316                 ret = -rte_errno;
3317                 /* Roll back. */
3318                 while (i--) {
3319                         if (!list[i].eth_dev)
3320                                 continue;
3321                         mlx5_dev_close(list[i].eth_dev);
3322                         /* mac_addrs must not be freed because in dev_private */
3323                         list[i].eth_dev->data->mac_addrs = NULL;
3324                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3325                 }
3326                 /* Restore original error. */
3327                 rte_errno = -ret;
3328         } else {
3329                 ret = 0;
3330         }
3331 exit:
3332         /*
3333          * Do the routine cleanup:
3334          * - close opened Netlink sockets
3335          * - free allocated spawn data array
3336          * - free the Infiniband device list
3337          */
3338         if (nl_rdma >= 0)
3339                 close(nl_rdma);
3340         if (nl_route >= 0)
3341                 close(nl_route);
3342         if (list)
3343                 rte_free(list);
3344         assert(ibv_list);
3345         mlx5_glue->free_device_list(ibv_list);
3346         return ret;
3347 }
3348
3349 /**
3350  * Look for the ethernet device belonging to mlx5 driver.
3351  *
3352  * @param[in] port_id
3353  *   port_id to start looking for device.
3354  * @param[in] pci_dev
3355  *   Pointer to the hint PCI device. When device is being probed
3356  *   the its siblings (master and preceding representors might
3357  *   not have assigned driver yet (because the mlx5_pci_probe()
3358  *   is not completed yet, for this case match on hint PCI
3359  *   device may be used to detect sibling device.
3360  *
3361  * @return
3362  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3363  */
3364 uint16_t
3365 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3366 {
3367         while (port_id < RTE_MAX_ETHPORTS) {
3368                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3369
3370                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3371                     dev->device &&
3372                     (dev->device == &pci_dev->device ||
3373                      (dev->device->driver &&
3374                      dev->device->driver->name &&
3375                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3376                         break;
3377                 port_id++;
3378         }
3379         if (port_id >= RTE_MAX_ETHPORTS)
3380                 return RTE_MAX_ETHPORTS;
3381         return port_id;
3382 }
3383
3384 /**
3385  * DPDK callback to remove a PCI device.
3386  *
3387  * This function removes all Ethernet devices belong to a given PCI device.
3388  *
3389  * @param[in] pci_dev
3390  *   Pointer to the PCI device.
3391  *
3392  * @return
3393  *   0 on success, the function cannot fail.
3394  */
3395 static int
3396 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3397 {
3398         uint16_t port_id;
3399
3400         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3401                 rte_eth_dev_close(port_id);
3402         return 0;
3403 }
3404
3405 static const struct rte_pci_id mlx5_pci_id_map[] = {
3406         {
3407                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3408                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3409         },
3410         {
3411                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3412                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3413         },
3414         {
3415                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3416                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3417         },
3418         {
3419                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3420                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3421         },
3422         {
3423                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3424                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3425         },
3426         {
3427                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3428                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3429         },
3430         {
3431                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3432                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3433         },
3434         {
3435                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3436                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3437         },
3438         {
3439                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3440                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3441         },
3442         {
3443                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3444                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3445         },
3446         {
3447                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3448                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3449         },
3450         {
3451                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3452                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3453         },
3454         {
3455                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3456                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3457         },
3458         {
3459                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3460                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3461         },
3462         {
3463                 .vendor_id = 0
3464         }
3465 };
3466
3467 static struct rte_pci_driver mlx5_driver = {
3468         .driver = {
3469                 .name = MLX5_DRIVER_NAME
3470         },
3471         .id_table = mlx5_pci_id_map,
3472         .probe = mlx5_pci_probe,
3473         .remove = mlx5_pci_remove,
3474         .dma_map = mlx5_dma_map,
3475         .dma_unmap = mlx5_dma_unmap,
3476         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3477                      RTE_PCI_DRV_PROBE_AGAIN,
3478 };
3479
3480 #ifdef RTE_IBVERBS_LINK_DLOPEN
3481
3482 /**
3483  * Suffix RTE_EAL_PMD_PATH with "-glue".
3484  *
3485  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3486  * suffixing its last component.
3487  *
3488  * @param buf[out]
3489  *   Output buffer, should be large enough otherwise NULL is returned.
3490  * @param size
3491  *   Size of @p out.
3492  *
3493  * @return
3494  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3495  */
3496 static char *
3497 mlx5_glue_path(char *buf, size_t size)
3498 {
3499         static const char *const bad[] = { "/", ".", "..", NULL };
3500         const char *path = RTE_EAL_PMD_PATH;
3501         size_t len = strlen(path);
3502         size_t off;
3503         int i;
3504
3505         while (len && path[len - 1] == '/')
3506                 --len;
3507         for (off = len; off && path[off - 1] != '/'; --off)
3508                 ;
3509         for (i = 0; bad[i]; ++i)
3510                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3511                         goto error;
3512         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3513         if (i == -1 || (size_t)i >= size)
3514                 goto error;
3515         return buf;
3516 error:
3517         DRV_LOG(ERR,
3518                 "unable to append \"-glue\" to last component of"
3519                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3520                 " please re-configure DPDK");
3521         return NULL;
3522 }
3523
3524 /**
3525  * Initialization routine for run-time dependency on rdma-core.
3526  */
3527 static int
3528 mlx5_glue_init(void)
3529 {
3530         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3531         const char *path[] = {
3532                 /*
3533                  * A basic security check is necessary before trusting
3534                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3535                  */
3536                 (geteuid() == getuid() && getegid() == getgid() ?
3537                  getenv("MLX5_GLUE_PATH") : NULL),
3538                 /*
3539                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3540                  * variant, otherwise let dlopen() look up libraries on its
3541                  * own.
3542                  */
3543                 (*RTE_EAL_PMD_PATH ?
3544                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3545         };
3546         unsigned int i = 0;
3547         void *handle = NULL;
3548         void **sym;
3549         const char *dlmsg;
3550
3551         while (!handle && i != RTE_DIM(path)) {
3552                 const char *end;
3553                 size_t len;
3554                 int ret;
3555
3556                 if (!path[i]) {
3557                         ++i;
3558                         continue;
3559                 }
3560                 end = strpbrk(path[i], ":;");
3561                 if (!end)
3562                         end = path[i] + strlen(path[i]);
3563                 len = end - path[i];
3564                 ret = 0;
3565                 do {
3566                         char name[ret + 1];
3567
3568                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3569                                        (int)len, path[i],
3570                                        (!len || *(end - 1) == '/') ? "" : "/");
3571                         if (ret == -1)
3572                                 break;
3573                         if (sizeof(name) != (size_t)ret + 1)
3574                                 continue;
3575                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3576                                 name);
3577                         handle = dlopen(name, RTLD_LAZY);
3578                         break;
3579                 } while (1);
3580                 path[i] = end + 1;
3581                 if (!*end)
3582                         ++i;
3583         }
3584         if (!handle) {
3585                 rte_errno = EINVAL;
3586                 dlmsg = dlerror();
3587                 if (dlmsg)
3588                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3589                 goto glue_error;
3590         }
3591         sym = dlsym(handle, "mlx5_glue");
3592         if (!sym || !*sym) {
3593                 rte_errno = EINVAL;
3594                 dlmsg = dlerror();
3595                 if (dlmsg)
3596                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3597                 goto glue_error;
3598         }
3599         mlx5_glue = *sym;
3600         return 0;
3601 glue_error:
3602         if (handle)
3603                 dlclose(handle);
3604         DRV_LOG(WARNING,
3605                 "cannot initialize PMD due to missing run-time dependency on"
3606                 " rdma-core libraries (libibverbs, libmlx5)");
3607         return -rte_errno;
3608 }
3609
3610 #endif
3611
3612 /**
3613  * Driver initialization routine.
3614  */
3615 RTE_INIT(rte_mlx5_pmd_init)
3616 {
3617         /* Initialize driver log type. */
3618         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3619         if (mlx5_logtype >= 0)
3620                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3621
3622         /* Build the static tables for Verbs conversion. */
3623         mlx5_set_ptype_table();
3624         mlx5_set_cksum_table();
3625         mlx5_set_swp_types_table();
3626         /*
3627          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3628          * huge pages. Calling ibv_fork_init() during init allows
3629          * applications to use fork() safely for purposes other than
3630          * using this PMD, which is not supported in forked processes.
3631          */
3632         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3633         /* Match the size of Rx completion entry to the size of a cacheline. */
3634         if (RTE_CACHE_LINE_SIZE == 128)
3635                 setenv("MLX5_CQE_SIZE", "128", 0);
3636         /*
3637          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3638          * cleanup all the Verbs resources even when the device was removed.
3639          */
3640         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3641 #ifdef RTE_IBVERBS_LINK_DLOPEN
3642         if (mlx5_glue_init())
3643                 return;
3644         assert(mlx5_glue);
3645 #endif
3646 #ifndef NDEBUG
3647         /* Glue structure must not contain any NULL pointers. */
3648         {
3649                 unsigned int i;
3650
3651                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3652                         assert(((const void *const *)mlx5_glue)[i]);
3653         }
3654 #endif
3655         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3656                 DRV_LOG(ERR,
3657                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3658                         mlx5_glue->version, MLX5_GLUE_VERSION);
3659                 return;
3660         }
3661         mlx5_glue->fork_init();
3662         rte_pci_register(&mlx5_driver);
3663 }
3664
3665 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3666 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3667 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");