drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to force doorbell register mapping
 100  * to non-cahed region eliminating the extra write memory barrier.
 101  */
 102 #define MLX5_TX_DB_NC "tx_db_nc"
 103
 104 /*
 105  * Device parameter to include 2 dsegs in the title WQEBB.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 109
 110 /*
 111  * Device parameter to limit the size of inlining packet.
 112  * Deprecated, ignored.
 113  */
 114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 115
 116 /*
 117  * Device parameter to enable hardware Tx vector.
 118  * Deprecated, ignored (no vectorized Tx routines anymore).
 119  */
 120 #define MLX5_TX_VEC_EN "tx_vec_en"
 121
 122 /* Device parameter to enable hardware Rx vector. */
 123 #define MLX5_RX_VEC_EN "rx_vec_en"
 124
 125 /* Allow L3 VXLAN flow creation. */
 126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 127
 128 /* Activate DV E-Switch flow steering. */
 129 #define MLX5_DV_ESW_EN "dv_esw_en"
 130
 131 /* Activate DV flow steering. */
 132 #define MLX5_DV_FLOW_EN "dv_flow_en"
 133
 134 /* Enable extensive flow metadata support. */
 135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 136
 137 /* Activate Netlink support in VF mode. */
 138 #define MLX5_VF_NL_EN "vf_nl_en"
 139
 140 /* Enable extending memsegs when creating a MR. */
 141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 142
 143 /* Select port representors to instantiate. */
 144 #define MLX5_REPRESENTOR "representor"
 145
 146 /* Device parameter to configure the maximum number of dump files per queue. */
 147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 148
 149 /* Configure timeout of LRO session (in microseconds). */
 150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 151
 152 #ifndef HAVE_IBV_MLX5_MOD_MPW
 153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 155 #endif
 156
 157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 159 #endif
 160
 161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 162
 163 /* Shared memory between primary and secondary processes. */
 164 struct mlx5_shared_data *mlx5_shared_data;
 165
 166 /* Spinlock for mlx5_shared_data allocation. */
 167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 168
 169 /* Process local data for secondary processes. */
 170 static struct mlx5_local_data mlx5_local_data;
 171
 172 /** Driver-specific log messages type. */
 173 int mlx5_logtype;
 174
 175 /** Data associated with devices to spawn. */
 176 struct mlx5_dev_spawn_data {
 177         uint32_t ifindex; /**< Network interface index. */
 178         uint32_t max_port; /**< IB device maximal port index. */
 179         uint32_t ibv_port; /**< IB device physical port index. */
 180         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 181         struct mlx5_switch_info info; /**< Switch information. */
 182         struct ibv_device *ibv_dev; /**< Associated IB device. */
 183         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 184         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 185 };
 186
 187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 189
 190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 192
 193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
 194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
 195
 196 /**
 197  * Allocate ID pool structure.
 198  *
 199  * @return
 200  *   Pointer to pool object, NULL value otherwise.
 201  */
 202 struct mlx5_flow_id_pool *
 203 mlx5_flow_id_pool_alloc(void)
 204 {
 205         struct mlx5_flow_id_pool *pool;
 206         void *mem;
 207
 208         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 209                            RTE_CACHE_LINE_SIZE);
 210         if (!pool) {
 211                 DRV_LOG(ERR, "can't allocate id pool");
 212                 rte_errno  = ENOMEM;
 213                 return NULL;
 214         }
 215         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 216                           RTE_CACHE_LINE_SIZE);
 217         if (!mem) {
 218                 DRV_LOG(ERR, "can't allocate mem for id pool");
 219                 rte_errno  = ENOMEM;
 220                 goto error;
 221         }
 222         pool->free_arr = mem;
 223         pool->curr = pool->free_arr;
 224         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 225         pool->base_index = 0;
 226         return pool;
 227 error:
 228         rte_free(pool);
 229         return NULL;
 230 }
 231
 232 /**
 233  * Release ID pool structure.
 234  *
 235  * @param[in] pool
 236  *   Pointer to flow id pool object to free.
 237  */
 238 void
 239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 240 {
 241         rte_free(pool->free_arr);
 242         rte_free(pool);
 243 }
 244
 245 /**
 246  * Generate ID.
 247  *
 248  * @param[in] pool
 249  *   Pointer to flow id pool.
 250  * @param[out] id
 251  *   The generated ID.
 252  *
 253  * @return
 254  *   0 on success, error value otherwise.
 255  */
 256 uint32_t
 257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 258 {
 259         if (pool->curr == pool->free_arr) {
 260                 if (pool->base_index == UINT32_MAX) {
 261                         rte_errno  = ENOMEM;
 262                         DRV_LOG(ERR, "no free id");
 263                         return -rte_errno;
 264                 }
 265                 *id = ++pool->base_index;
 266                 return 0;
 267         }
 268         *id = *(--pool->curr);
 269         return 0;
 270 }
 271
 272 /**
 273  * Release ID.
 274  *
 275  * @param[in] pool
 276  *   Pointer to flow id pool.
 277  * @param[out] id
 278  *   The generated ID.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 uint32_t
 284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 285 {
 286         uint32_t size;
 287         uint32_t size2;
 288         void *mem;
 289
 290         if (pool->curr == pool->last) {
 291                 size = pool->curr - pool->free_arr;
 292                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 293                 assert(size2 > size);
 294                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 295                 if (!mem) {
 296                         DRV_LOG(ERR, "can't allocate mem for id pool");
 297                         rte_errno  = ENOMEM;
 298                         return -rte_errno;
 299                 }
 300                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 301                 rte_free(pool->free_arr);
 302                 pool->free_arr = mem;
 303                 pool->curr = pool->free_arr + size;
 304                 pool->last = pool->free_arr + size2;
 305         }
 306         *pool->curr = id;
 307         pool->curr++;
 308         return 0;
 309 }
 310
 311 /**
 312  * Initialize the counters management structure.
 313  *
 314  * @param[in] sh
 315  *   Pointer to mlx5_ibv_shared object to free
 316  */
 317 static void
 318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 319 {
 320         uint8_t i;
 321
 322         TAILQ_INIT(&sh->cmng.flow_counters);
 323         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 324                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 325 }
 326
 327 /**
 328  * Destroy all the resources allocated for a counter memory management.
 329  *
 330  * @param[in] mng
 331  *   Pointer to the memory management structure.
 332  */
 333 static void
 334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 335 {
 336         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 337
 338         LIST_REMOVE(mng, next);
 339         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 340         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 341         rte_free(mem);
 342 }
 343
 344 /**
 345  * Close and release all the resources of the counters management.
 346  *
 347  * @param[in] sh
 348  *   Pointer to mlx5_ibv_shared object to free.
 349  */
 350 static void
 351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 352 {
 353         struct mlx5_counter_stats_mem_mng *mng;
 354         uint8_t i;
 355         int j;
 356         int retries = 1024;
 357
 358         rte_errno = 0;
 359         while (--retries) {
 360                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 361                 if (rte_errno != EINPROGRESS)
 362                         break;
 363                 rte_pause();
 364         }
 365         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 366                 struct mlx5_flow_counter_pool *pool;
 367                 uint32_t batch = !!(i % 2);
 368
 369                 if (!sh->cmng.ccont[i].pools)
 370                         continue;
 371                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 372                 while (pool) {
 373                         if (batch) {
 374                                 if (pool->min_dcs)
 375                                         claim_zero
 376                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 377                         }
 378                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 379                                 if (pool->counters_raw[j].action)
 380                                         claim_zero
 381                                         (mlx5_glue->destroy_flow_action
 382                                                (pool->counters_raw[j].action));
 383                                 if (!batch && pool->counters_raw[j].dcs)
 384                                         claim_zero(mlx5_devx_cmd_destroy
 385                                                   (pool->counters_raw[j].dcs));
 386                         }
 387                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 388                                      next);
 389                         rte_free(pool);
 390                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 391                 }
 392                 rte_free(sh->cmng.ccont[i].pools);
 393         }
 394         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 395         while (mng) {
 396                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 397                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 398         }
 399         memset(&sh->cmng, 0, sizeof(sh->cmng));
 400 }
 401
 402 /**
 403  * Extract pdn of PD object using DV API.
 404  *
 405  * @param[in] pd
 406  *   Pointer to the verbs PD object.
 407  * @param[out] pdn
 408  *   Pointer to the PD object number variable.
 409  *
 410  * @return
 411  *   0 on success, error value otherwise.
 412  */
 413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 414 static int
 415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 416 {
 417         struct mlx5dv_obj obj;
 418         struct mlx5dv_pd pd_info;
 419         int ret = 0;
 420
 421         obj.pd.in = pd;
 422         obj.pd.out = &pd_info;
 423         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 424         if (ret) {
 425                 DRV_LOG(DEBUG, "Fail to get PD object info");
 426                 return ret;
 427         }
 428         *pdn = pd_info.pdn;
 429         return 0;
 430 }
 431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 432
 433 static int
 434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
 435 {
 436         char *env;
 437         int value;
 438
 439         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 440         /* Get environment variable to store. */
 441         env = getenv(MLX5_SHUT_UP_BF);
 442         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
 443         if (config->dbnc == MLX5_ARG_UNSET)
 444                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
 445         else
 446                 setenv(MLX5_SHUT_UP_BF,
 447                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
 448         return value;
 449 }
 450
 451 static void
 452 mlx5_restore_doorbell_mapping_env(int value)
 453 {
 454         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 455         /* Restore the original environment variable state. */
 456         if (value == MLX5_ARG_UNSET)
 457                 unsetenv(MLX5_SHUT_UP_BF);
 458         else
 459                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
 460 }
 461
 462 /**
 463  * Allocate shared IB device context. If there is multiport device the
 464  * master and representors will share this context, if there is single
 465  * port dedicated IB device, the context will be used by only given
 466  * port due to unification.
 467  *
 468  * Routine first searches the context for the specified IB device name,
 469  * if found the shared context assumed and reference counter is incremented.
 470  * If no context found the new one is created and initialized with specified
 471  * IB device context and parameters.
 472  *
 473  * @param[in] spawn
 474  *   Pointer to the IB device attributes (name, port, etc).
 475  * @param[in] config
 476  *   Pointer to device configuration structure.
 477  *
 478  * @return
 479  *   Pointer to mlx5_ibv_shared object on success,
 480  *   otherwise NULL and rte_errno is set.
 481  */
 482 static struct mlx5_ibv_shared *
 483 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 484                         const struct mlx5_dev_config *config)
 485 {
 486         struct mlx5_ibv_shared *sh;
 487         int dbmap_env;
 488         int err = 0;
 489         uint32_t i;
 490 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 491         struct mlx5_devx_tis_attr tis_attr = { 0 };
 492 #endif
 493
 494         assert(spawn);
 495         /* Secondary process should not create the shared context. */
 496         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 497         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 498         /* Search for IB context by device name. */
 499         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 500                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 501                         sh->refcnt++;
 502                         goto exit;
 503                 }
 504         }
 505         /* No device found, we have to create new shared context. */
 506         assert(spawn->max_port);
 507         sh = rte_zmalloc("ethdev shared ib context",
 508                          sizeof(struct mlx5_ibv_shared) +
 509                          spawn->max_port *
 510                          sizeof(struct mlx5_ibv_shared_port),
 511                          RTE_CACHE_LINE_SIZE);
 512         if (!sh) {
 513                 DRV_LOG(ERR, "shared context allocation failure");
 514                 rte_errno  = ENOMEM;
 515                 goto exit;
 516         }
 517         /*
 518          * Configure environment variable "MLX5_BF_SHUT_UP"
 519          * before the device creation. The rdma_core library
 520          * checks the variable at device creation and
 521          * stores the result internally.
 522          */
 523         dbmap_env = mlx5_config_doorbell_mapping_env(config);
 524         /* Try to open IB device with DV first, then usual Verbs. */
 525         errno = 0;
 526         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 527         if (sh->ctx) {
 528                 sh->devx = 1;
 529                 DRV_LOG(DEBUG, "DevX is supported");
 530                 /* The device is created, no need for environment. */
 531                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 532         } else {
 533                 /* The environment variable is still configured. */
 534                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 535                 err = errno ? errno : ENODEV;
 536                 /*
 537                  * The environment variable is not needed anymore,
 538                  * all device creation attempts are completed.
 539                  */
 540                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 541                 if (!sh->ctx)
 542                         goto error;
 543                 DRV_LOG(DEBUG, "DevX is NOT supported");
 544         }
 545         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 546         if (err) {
 547                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 548                 goto error;
 549         }
 550         sh->refcnt = 1;
 551         sh->max_port = spawn->max_port;
 552         strncpy(sh->ibdev_name, sh->ctx->device->name,
 553                 sizeof(sh->ibdev_name));
 554         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 555                 sizeof(sh->ibdev_path));
 556         pthread_mutex_init(&sh->intr_mutex, NULL);
 557         /*
 558          * Setting port_id to max unallowed value means
 559          * there is no interrupt subhandler installed for
 560          * the given port index i.
 561          */
 562         for (i = 0; i < sh->max_port; i++) {
 563                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 564                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 565         }
 566         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 567         if (sh->pd == NULL) {
 568                 DRV_LOG(ERR, "PD allocation failure");
 569                 err = ENOMEM;
 570                 goto error;
 571         }
 572 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 573         if (sh->devx) {
 574                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 575                 if (err) {
 576                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 577                         goto error;
 578                 }
 579                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 580                 if (!sh->td) {
 581                         DRV_LOG(ERR, "TD allocation failure");
 582                         err = ENOMEM;
 583                         goto error;
 584                 }
 585                 tis_attr.transport_domain = sh->td->id;
 586                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 587                 if (!sh->tis) {
 588                         DRV_LOG(ERR, "TIS allocation failure");
 589                         err = ENOMEM;
 590                         goto error;
 591                 }
 592         }
 593         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 594         if (!sh->flow_id_pool) {
 595                 DRV_LOG(ERR, "can't create flow id pool");
 596                 err = ENOMEM;
 597                 goto error;
 598         }
 599 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 600         /*
 601          * Once the device is added to the list of memory event
 602          * callback, its global MR cache table cannot be expanded
 603          * on the fly because of deadlock. If it overflows, lookup
 604          * should be done by searching MR list linearly, which is slow.
 605          *
 606          * At this point the device is not added to the memory
 607          * event list yet, context is just being created.
 608          */
 609         err = mlx5_mr_btree_init(&sh->mr.cache,
 610                                  MLX5_MR_BTREE_CACHE_N * 2,
 611                                  spawn->pci_dev->device.numa_node);
 612         if (err) {
 613                 err = rte_errno;
 614                 goto error;
 615         }
 616         mlx5_flow_counters_mng_init(sh);
 617         /* Add device to memory callback list. */
 618         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 619         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 620                          sh, mem_event_cb);
 621         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 622         /* Add context to the global device list. */
 623         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 624 exit:
 625         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 626         return sh;
 627 error:
 628         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 629         assert(sh);
 630         if (sh->tis)
 631                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 632         if (sh->td)
 633                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 634         if (sh->pd)
 635                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 636         if (sh->ctx)
 637                 claim_zero(mlx5_glue->close_device(sh->ctx));
 638         if (sh->flow_id_pool)
 639                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 640         rte_free(sh);
 641         assert(err > 0);
 642         rte_errno = err;
 643         return NULL;
 644 }
 645
 646 /**
 647  * Free shared IB device context. Decrement counter and if zero free
 648  * all allocated resources and close handles.
 649  *
 650  * @param[in] sh
 651  *   Pointer to mlx5_ibv_shared object to free
 652  */
 653 static void
 654 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 655 {
 656         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 657 #ifndef NDEBUG
 658         /* Check the object presence in the list. */
 659         struct mlx5_ibv_shared *lctx;
 660
 661         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 662                 if (lctx == sh)
 663                         break;
 664         assert(lctx);
 665         if (lctx != sh) {
 666                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 667                 goto exit;
 668         }
 669 #endif
 670         assert(sh);
 671         assert(sh->refcnt);
 672         /* Secondary process should not free the shared context. */
 673         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 674         if (--sh->refcnt)
 675                 goto exit;
 676         /* Release created Memory Regions. */
 677         mlx5_mr_release(sh);
 678         /* Remove from memory callback device list. */
 679         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 680         LIST_REMOVE(sh, mem_event_cb);
 681         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 682         /* Remove context from the global device list. */
 683         LIST_REMOVE(sh, next);
 684         /*
 685          *  Ensure there is no async event handler installed.
 686          *  Only primary process handles async device events.
 687          **/
 688         mlx5_flow_counters_mng_close(sh);
 689         assert(!sh->intr_cnt);
 690         if (sh->intr_cnt)
 691                 mlx5_intr_callback_unregister
 692                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 693 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 694         if (sh->devx_intr_cnt) {
 695                 if (sh->intr_handle_devx.fd)
 696                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 697                                           mlx5_dev_interrupt_handler_devx, sh);
 698                 if (sh->devx_comp)
 699                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 700         }
 701 #endif
 702         pthread_mutex_destroy(&sh->intr_mutex);
 703         if (sh->pd)
 704                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 705         if (sh->tis)
 706                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 707         if (sh->td)
 708                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 709         if (sh->ctx)
 710                 claim_zero(mlx5_glue->close_device(sh->ctx));
 711         if (sh->flow_id_pool)
 712                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 713         rte_free(sh);
 714 exit:
 715         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 716 }
 717
 718 /**
 719  * Destroy table hash list and all the root entries per domain.
 720  *
 721  * @param[in] priv
 722  *   Pointer to the private device data structure.
 723  */
 724 static void
 725 mlx5_free_table_hash_list(struct mlx5_priv *priv)
 726 {
 727         struct mlx5_ibv_shared *sh = priv->sh;
 728         struct mlx5_flow_tbl_data_entry *tbl_data;
 729         union mlx5_flow_tbl_key table_key = {
 730                 {
 731                         .table_id = 0,
 732                         .reserved = 0,
 733                         .domain = 0,
 734                         .direction = 0,
 735                 }
 736         };
 737         struct mlx5_hlist_entry *pos;
 738
 739         if (!sh->flow_tbls)
 740                 return;
 741         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 742         if (pos) {
 743                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 744                                         entry);
 745                 assert(tbl_data);
 746                 mlx5_hlist_remove(sh->flow_tbls, pos);
 747                 rte_free(tbl_data);
 748         }
 749         table_key.direction = 1;
 750         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 751         if (pos) {
 752                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 753                                         entry);
 754                 assert(tbl_data);
 755                 mlx5_hlist_remove(sh->flow_tbls, pos);
 756                 rte_free(tbl_data);
 757         }
 758         table_key.direction = 0;
 759         table_key.domain = 1;
 760         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 761         if (pos) {
 762                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 763                                         entry);
 764                 assert(tbl_data);
 765                 mlx5_hlist_remove(sh->flow_tbls, pos);
 766                 rte_free(tbl_data);
 767         }
 768         mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 769 }
 770
 771 /**
 772  * Initialize flow table hash list and create the root tables entry
 773  * for each domain.
 774  *
 775  * @param[in] priv
 776  *   Pointer to the private device data structure.
 777  *
 778  * @return
 779  *   Zero on success, positive error code otherwise.
 780  */
 781 static int
 782 mlx5_alloc_table_hash_list(struct mlx5_priv *priv)
 783 {
 784         struct mlx5_ibv_shared *sh = priv->sh;
 785         char s[MLX5_HLIST_NAMESIZE];
 786         int err = 0;
 787
 788         assert(sh);
 789         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
 790         sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
 791         if (!sh->flow_tbls) {
 792                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
 793                 err = ENOMEM;
 794                 return err;
 795         }
 796 #ifndef HAVE_MLX5DV_DR
 797         /*
 798          * In case we have not DR support, the zero tables should be created
 799          * because DV expect to see them even if they cannot be created by
 800          * RDMA-CORE.
 801          */
 802         union mlx5_flow_tbl_key table_key = {
 803                 {
 804                         .table_id = 0,
 805                         .reserved = 0,
 806                         .domain = 0,
 807                         .direction = 0,
 808                 }
 809         };
 810         struct mlx5_flow_tbl_data_entry *tbl_data = rte_zmalloc(NULL,
 811                                                           sizeof(*tbl_data), 0);
 812
 813         if (!tbl_data) {
 814                 err = ENOMEM;
 815                 goto error;
 816         }
 817         tbl_data->entry.key = table_key.v64;
 818         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 819         if (err)
 820                 goto error;
 821         rte_atomic32_init(&tbl_data->tbl.refcnt);
 822         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 823         table_key.direction = 1;
 824         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 825         if (!tbl_data) {
 826                 err = ENOMEM;
 827                 goto error;
 828         }
 829         tbl_data->entry.key = table_key.v64;
 830         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 831         if (err)
 832                 goto error;
 833         rte_atomic32_init(&tbl_data->tbl.refcnt);
 834         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 835         table_key.direction = 0;
 836         table_key.domain = 1;
 837         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 838         if (!tbl_data) {
 839                 err = ENOMEM;
 840                 goto error;
 841         }
 842         tbl_data->entry.key = table_key.v64;
 843         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 844         if (err)
 845                 goto error;
 846         rte_atomic32_init(&tbl_data->tbl.refcnt);
 847         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 848         return err;
 849 error:
 850         mlx5_free_table_hash_list(priv);
 851 #endif /* HAVE_MLX5DV_DR */
 852         return err;
 853 }
 854
 855 /**
 856  * Initialize DR related data within private structure.
 857  * Routine checks the reference counter and does actual
 858  * resources creation/initialization only if counter is zero.
 859  *
 860  * @param[in] priv
 861  *   Pointer to the private device data structure.
 862  *
 863  * @return
 864  *   Zero on success, positive error code otherwise.
 865  */
 866 static int
 867 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 868 {
 869         struct mlx5_ibv_shared *sh = priv->sh;
 870         char s[MLX5_HLIST_NAMESIZE];
 871         int err = mlx5_alloc_table_hash_list(priv);
 872
 873         if (err)
 874                 return err;
 875         /* Create tags hash list table. */
 876         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 877         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 878         if (!sh->tag_table) {
 879                 DRV_LOG(ERR, "tags with hash creation failed.\n");
 880                 err = ENOMEM;
 881                 goto error;
 882         }
 883 #ifdef HAVE_MLX5DV_DR
 884         void *domain;
 885
 886         if (sh->dv_refcnt) {
 887                 /* Shared DV/DR structures is already initialized. */
 888                 sh->dv_refcnt++;
 889                 priv->dr_shared = 1;
 890                 return 0;
 891         }
 892         /* Reference counter is zero, we should initialize structures. */
 893         domain = mlx5_glue->dr_create_domain(sh->ctx,
 894                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 895         if (!domain) {
 896                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 897                 err = errno;
 898                 goto error;
 899         }
 900         sh->rx_domain = domain;
 901         domain = mlx5_glue->dr_create_domain(sh->ctx,
 902                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 903         if (!domain) {
 904                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 905                 err = errno;
 906                 goto error;
 907         }
 908         pthread_mutex_init(&sh->dv_mutex, NULL);
 909         sh->tx_domain = domain;
 910 #ifdef HAVE_MLX5DV_DR_ESWITCH
 911         if (priv->config.dv_esw_en) {
 912                 domain  = mlx5_glue->dr_create_domain
 913                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 914                 if (!domain) {
 915                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 916                         err = errno;
 917                         goto error;
 918                 }
 919                 sh->fdb_domain = domain;
 920                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 921         }
 922 #endif
 923         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 924 #endif /* HAVE_MLX5DV_DR */
 925         sh->dv_refcnt++;
 926         priv->dr_shared = 1;
 927         return 0;
 928 error:
 929         /* Rollback the created objects. */
 930         if (sh->rx_domain) {
 931                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 932                 sh->rx_domain = NULL;
 933         }
 934         if (sh->tx_domain) {
 935                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 936                 sh->tx_domain = NULL;
 937         }
 938         if (sh->fdb_domain) {
 939                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 940                 sh->fdb_domain = NULL;
 941         }
 942         if (sh->esw_drop_action) {
 943                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 944                 sh->esw_drop_action = NULL;
 945         }
 946         if (sh->pop_vlan_action) {
 947                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 948                 sh->pop_vlan_action = NULL;
 949         }
 950         if (sh->tag_table) {
 951                 /* tags should be destroyed with flow before. */
 952                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 953                 sh->tag_table = NULL;
 954         }
 955         mlx5_free_table_hash_list(priv);
 956         return err;
 957 }
 958
 959 /**
 960  * Destroy DR related data within private structure.
 961  *
 962  * @param[in] priv
 963  *   Pointer to the private device data structure.
 964  */
 965 static void
 966 mlx5_free_shared_dr(struct mlx5_priv *priv)
 967 {
 968         struct mlx5_ibv_shared *sh;
 969
 970         if (!priv->dr_shared)
 971                 return;
 972         priv->dr_shared = 0;
 973         sh = priv->sh;
 974         assert(sh);
 975 #ifdef HAVE_MLX5DV_DR
 976         assert(sh->dv_refcnt);
 977         if (sh->dv_refcnt && --sh->dv_refcnt)
 978                 return;
 979         if (sh->rx_domain) {
 980                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 981                 sh->rx_domain = NULL;
 982         }
 983         if (sh->tx_domain) {
 984                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 985                 sh->tx_domain = NULL;
 986         }
 987 #ifdef HAVE_MLX5DV_DR_ESWITCH
 988         if (sh->fdb_domain) {
 989                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 990                 sh->fdb_domain = NULL;
 991         }
 992         if (sh->esw_drop_action) {
 993                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 994                 sh->esw_drop_action = NULL;
 995         }
 996 #endif
 997         if (sh->pop_vlan_action) {
 998                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 999                 sh->pop_vlan_action = NULL;
1000         }
1001         pthread_mutex_destroy(&sh->dv_mutex);
1002 #endif /* HAVE_MLX5DV_DR */
1003         if (sh->tag_table) {
1004                 /* tags should be destroyed with flow before. */
1005                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
1006                 sh->tag_table = NULL;
1007         }
1008         mlx5_free_table_hash_list(priv);
1009 }
1010
1011 /**
1012  * Initialize shared data between primary and secondary process.
1013  *
1014  * A memzone is reserved by primary process and secondary processes attach to
1015  * the memzone.
1016  *
1017  * @return
1018  *   0 on success, a negative errno value otherwise and rte_errno is set.
1019  */
1020 static int
1021 mlx5_init_shared_data(void)
1022 {
1023         const struct rte_memzone *mz;
1024         int ret = 0;
1025
1026         rte_spinlock_lock(&mlx5_shared_data_lock);
1027         if (mlx5_shared_data == NULL) {
1028                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1029                         /* Allocate shared memory. */
1030                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
1031                                                  sizeof(*mlx5_shared_data),
1032                                                  SOCKET_ID_ANY, 0);
1033                         if (mz == NULL) {
1034                                 DRV_LOG(ERR,
1035                                         "Cannot allocate mlx5 shared data");
1036                                 ret = -rte_errno;
1037                                 goto error;
1038                         }
1039                         mlx5_shared_data = mz->addr;
1040                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
1041                         rte_spinlock_init(&mlx5_shared_data->lock);
1042                 } else {
1043                         /* Lookup allocated shared memory. */
1044                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
1045                         if (mz == NULL) {
1046                                 DRV_LOG(ERR,
1047                                         "Cannot attach mlx5 shared data");
1048                                 ret = -rte_errno;
1049                                 goto error;
1050                         }
1051                         mlx5_shared_data = mz->addr;
1052                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
1053                 }
1054         }
1055 error:
1056         rte_spinlock_unlock(&mlx5_shared_data_lock);
1057         return ret;
1058 }
1059
1060 /**
1061  * Retrieve integer value from environment variable.
1062  *
1063  * @param[in] name
1064  *   Environment variable name.
1065  *
1066  * @return
1067  *   Integer value, 0 if the variable is not set.
1068  */
1069 int
1070 mlx5_getenv_int(const char *name)
1071 {
1072         const char *val = getenv(name);
1073
1074         if (val == NULL)
1075                 return 0;
1076         return atoi(val);
1077 }
1078
1079 /**
1080  * Verbs callback to allocate a memory. This function should allocate the space
1081  * according to the size provided residing inside a huge page.
1082  * Please note that all allocation must respect the alignment from libmlx5
1083  * (i.e. currently sysconf(_SC_PAGESIZE)).
1084  *
1085  * @param[in] size
1086  *   The size in bytes of the memory to allocate.
1087  * @param[in] data
1088  *   A pointer to the callback data.
1089  *
1090  * @return
1091  *   Allocated buffer, NULL otherwise and rte_errno is set.
1092  */
1093 static void *
1094 mlx5_alloc_verbs_buf(size_t size, void *data)
1095 {
1096         struct mlx5_priv *priv = data;
1097         void *ret;
1098         size_t alignment = sysconf(_SC_PAGESIZE);
1099         unsigned int socket = SOCKET_ID_ANY;
1100
1101         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
1102                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1103
1104                 socket = ctrl->socket;
1105         } else if (priv->verbs_alloc_ctx.type ==
1106                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
1107                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1108
1109                 socket = ctrl->socket;
1110         }
1111         assert(data != NULL);
1112         ret = rte_malloc_socket(__func__, size, alignment, socket);
1113         if (!ret && size)
1114                 rte_errno = ENOMEM;
1115         return ret;
1116 }
1117
1118 /**
1119  * Verbs callback to free a memory.
1120  *
1121  * @param[in] ptr
1122  *   A pointer to the memory to free.
1123  * @param[in] data
1124  *   A pointer to the callback data.
1125  */
1126 static void
1127 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1128 {
1129         assert(data != NULL);
1130         rte_free(ptr);
1131 }
1132
1133 /**
1134  * DPDK callback to add udp tunnel port
1135  *
1136  * @param[in] dev
1137  *   A pointer to eth_dev
1138  * @param[in] udp_tunnel
1139  *   A pointer to udp tunnel
1140  *
1141  * @return
1142  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1143  */
1144 int
1145 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1146                          struct rte_eth_udp_tunnel *udp_tunnel)
1147 {
1148         assert(udp_tunnel != NULL);
1149         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1150             udp_tunnel->udp_port == 4789)
1151                 return 0;
1152         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1153             udp_tunnel->udp_port == 4790)
1154                 return 0;
1155         return -ENOTSUP;
1156 }
1157
1158 /**
1159  * Initialize process private data structure.
1160  *
1161  * @param dev
1162  *   Pointer to Ethernet device structure.
1163  *
1164  * @return
1165  *   0 on success, a negative errno value otherwise and rte_errno is set.
1166  */
1167 int
1168 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1169 {
1170         struct mlx5_priv *priv = dev->data->dev_private;
1171         struct mlx5_proc_priv *ppriv;
1172         size_t ppriv_size;
1173
1174         /*
1175          * UAR register table follows the process private structure. BlueFlame
1176          * registers for Tx queues are stored in the table.
1177          */
1178         ppriv_size =
1179                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1180         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1181                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1182         if (!ppriv) {
1183                 rte_errno = ENOMEM;
1184                 return -rte_errno;
1185         }
1186         ppriv->uar_table_sz = ppriv_size;
1187         dev->process_private = ppriv;
1188         return 0;
1189 }
1190
1191 /**
1192  * Un-initialize process private data structure.
1193  *
1194  * @param dev
1195  *   Pointer to Ethernet device structure.
1196  */
1197 static void
1198 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1199 {
1200         if (!dev->process_private)
1201                 return;
1202         rte_free(dev->process_private);
1203         dev->process_private = NULL;
1204 }
1205
1206 /**
1207  * DPDK callback to close the device.
1208  *
1209  * Destroy all queues and objects, free memory.
1210  *
1211  * @param dev
1212  *   Pointer to Ethernet device structure.
1213  */
1214 static void
1215 mlx5_dev_close(struct rte_eth_dev *dev)
1216 {
1217         struct mlx5_priv *priv = dev->data->dev_private;
1218         unsigned int i;
1219         int ret;
1220
1221         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1222                 dev->data->port_id,
1223                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1224         /* In case mlx5_dev_stop() has not been called. */
1225         mlx5_dev_interrupt_handler_uninstall(dev);
1226         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1227         mlx5_traffic_disable(dev);
1228         mlx5_flow_flush(dev, NULL);
1229         mlx5_flow_meter_flush(dev, NULL);
1230         /* Prevent crashes when queues are still in use. */
1231         dev->rx_pkt_burst = removed_rx_burst;
1232         dev->tx_pkt_burst = removed_tx_burst;
1233         rte_wmb();
1234         /* Disable datapath on secondary process. */
1235         mlx5_mp_req_stop_rxtx(dev);
1236         if (priv->rxqs != NULL) {
1237                 /* XXX race condition if mlx5_rx_burst() is still running. */
1238                 usleep(1000);
1239                 for (i = 0; (i != priv->rxqs_n); ++i)
1240                         mlx5_rxq_release(dev, i);
1241                 priv->rxqs_n = 0;
1242                 priv->rxqs = NULL;
1243         }
1244         if (priv->txqs != NULL) {
1245                 /* XXX race condition if mlx5_tx_burst() is still running. */
1246                 usleep(1000);
1247                 for (i = 0; (i != priv->txqs_n); ++i)
1248                         mlx5_txq_release(dev, i);
1249                 priv->txqs_n = 0;
1250                 priv->txqs = NULL;
1251         }
1252         mlx5_proc_priv_uninit(dev);
1253         if (priv->mreg_cp_tbl)
1254                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1255         mlx5_mprq_free_mp(dev);
1256         mlx5_free_shared_dr(priv);
1257         if (priv->rss_conf.rss_key != NULL)
1258                 rte_free(priv->rss_conf.rss_key);
1259         if (priv->reta_idx != NULL)
1260                 rte_free(priv->reta_idx);
1261         if (priv->config.vf)
1262                 mlx5_nl_mac_addr_flush(dev);
1263         if (priv->nl_socket_route >= 0)
1264                 close(priv->nl_socket_route);
1265         if (priv->nl_socket_rdma >= 0)
1266                 close(priv->nl_socket_rdma);
1267         if (priv->vmwa_context)
1268                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1269         if (priv->sh) {
1270                 /*
1271                  * Free the shared context in last turn, because the cleanup
1272                  * routines above may use some shared fields, like
1273                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1274                  * ifindex if Netlink fails.
1275                  */
1276                 mlx5_free_shared_ibctx(priv->sh);
1277                 priv->sh = NULL;
1278         }
1279         ret = mlx5_hrxq_verify(dev);
1280         if (ret)
1281                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1282                         dev->data->port_id);
1283         ret = mlx5_ind_table_obj_verify(dev);
1284         if (ret)
1285                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1286                         dev->data->port_id);
1287         ret = mlx5_rxq_obj_verify(dev);
1288         if (ret)
1289                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1290                         dev->data->port_id);
1291         ret = mlx5_rxq_verify(dev);
1292         if (ret)
1293                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1294                         dev->data->port_id);
1295         ret = mlx5_txq_obj_verify(dev);
1296         if (ret)
1297                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1298                         dev->data->port_id);
1299         ret = mlx5_txq_verify(dev);
1300         if (ret)
1301                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1302                         dev->data->port_id);
1303         ret = mlx5_flow_verify(dev);
1304         if (ret)
1305                 DRV_LOG(WARNING, "port %u some flows still remain",
1306                         dev->data->port_id);
1307         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1308                 unsigned int c = 0;
1309                 uint16_t port_id;
1310
1311                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1312                         struct mlx5_priv *opriv =
1313                                 rte_eth_devices[port_id].data->dev_private;
1314
1315                         if (!opriv ||
1316                             opriv->domain_id != priv->domain_id ||
1317                             &rte_eth_devices[port_id] == dev)
1318                                 continue;
1319                         ++c;
1320                         break;
1321                 }
1322                 if (!c)
1323                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1324         }
1325         memset(priv, 0, sizeof(*priv));
1326         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1327         /*
1328          * Reset mac_addrs to NULL such that it is not freed as part of
1329          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1330          * it is freed when dev_private is freed.
1331          */
1332         dev->data->mac_addrs = NULL;
1333 }
1334
1335 const struct eth_dev_ops mlx5_dev_ops = {
1336         .dev_configure = mlx5_dev_configure,
1337         .dev_start = mlx5_dev_start,
1338         .dev_stop = mlx5_dev_stop,
1339         .dev_set_link_down = mlx5_set_link_down,
1340         .dev_set_link_up = mlx5_set_link_up,
1341         .dev_close = mlx5_dev_close,
1342         .promiscuous_enable = mlx5_promiscuous_enable,
1343         .promiscuous_disable = mlx5_promiscuous_disable,
1344         .allmulticast_enable = mlx5_allmulticast_enable,
1345         .allmulticast_disable = mlx5_allmulticast_disable,
1346         .link_update = mlx5_link_update,
1347         .stats_get = mlx5_stats_get,
1348         .stats_reset = mlx5_stats_reset,
1349         .xstats_get = mlx5_xstats_get,
1350         .xstats_reset = mlx5_xstats_reset,
1351         .xstats_get_names = mlx5_xstats_get_names,
1352         .fw_version_get = mlx5_fw_version_get,
1353         .dev_infos_get = mlx5_dev_infos_get,
1354         .read_clock = mlx5_read_clock,
1355         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1356         .vlan_filter_set = mlx5_vlan_filter_set,
1357         .rx_queue_setup = mlx5_rx_queue_setup,
1358         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1359         .tx_queue_setup = mlx5_tx_queue_setup,
1360         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1361         .rx_queue_release = mlx5_rx_queue_release,
1362         .tx_queue_release = mlx5_tx_queue_release,
1363         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1364         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1365         .mac_addr_remove = mlx5_mac_addr_remove,
1366         .mac_addr_add = mlx5_mac_addr_add,
1367         .mac_addr_set = mlx5_mac_addr_set,
1368         .set_mc_addr_list = mlx5_set_mc_addr_list,
1369         .mtu_set = mlx5_dev_set_mtu,
1370         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1371         .vlan_offload_set = mlx5_vlan_offload_set,
1372         .reta_update = mlx5_dev_rss_reta_update,
1373         .reta_query = mlx5_dev_rss_reta_query,
1374         .rss_hash_update = mlx5_rss_hash_update,
1375         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1376         .filter_ctrl = mlx5_dev_filter_ctrl,
1377         .rx_descriptor_status = mlx5_rx_descriptor_status,
1378         .tx_descriptor_status = mlx5_tx_descriptor_status,
1379         .rx_queue_count = mlx5_rx_queue_count,
1380         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1381         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1382         .is_removed = mlx5_is_removed,
1383         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1384         .get_module_info = mlx5_get_module_info,
1385         .get_module_eeprom = mlx5_get_module_eeprom,
1386         .hairpin_cap_get = mlx5_hairpin_cap_get,
1387         .mtr_ops_get = mlx5_flow_meter_ops_get,
1388 };
1389
1390 /* Available operations from secondary process. */
1391 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1392         .stats_get = mlx5_stats_get,
1393         .stats_reset = mlx5_stats_reset,
1394         .xstats_get = mlx5_xstats_get,
1395         .xstats_reset = mlx5_xstats_reset,
1396         .xstats_get_names = mlx5_xstats_get_names,
1397         .fw_version_get = mlx5_fw_version_get,
1398         .dev_infos_get = mlx5_dev_infos_get,
1399         .rx_descriptor_status = mlx5_rx_descriptor_status,
1400         .tx_descriptor_status = mlx5_tx_descriptor_status,
1401         .get_module_info = mlx5_get_module_info,
1402         .get_module_eeprom = mlx5_get_module_eeprom,
1403 };
1404
1405 /* Available operations in flow isolated mode. */
1406 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1407         .dev_configure = mlx5_dev_configure,
1408         .dev_start = mlx5_dev_start,
1409         .dev_stop = mlx5_dev_stop,
1410         .dev_set_link_down = mlx5_set_link_down,
1411         .dev_set_link_up = mlx5_set_link_up,
1412         .dev_close = mlx5_dev_close,
1413         .promiscuous_enable = mlx5_promiscuous_enable,
1414         .promiscuous_disable = mlx5_promiscuous_disable,
1415         .allmulticast_enable = mlx5_allmulticast_enable,
1416         .allmulticast_disable = mlx5_allmulticast_disable,
1417         .link_update = mlx5_link_update,
1418         .stats_get = mlx5_stats_get,
1419         .stats_reset = mlx5_stats_reset,
1420         .xstats_get = mlx5_xstats_get,
1421         .xstats_reset = mlx5_xstats_reset,
1422         .xstats_get_names = mlx5_xstats_get_names,
1423         .fw_version_get = mlx5_fw_version_get,
1424         .dev_infos_get = mlx5_dev_infos_get,
1425         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1426         .vlan_filter_set = mlx5_vlan_filter_set,
1427         .rx_queue_setup = mlx5_rx_queue_setup,
1428         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1429         .tx_queue_setup = mlx5_tx_queue_setup,
1430         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1431         .rx_queue_release = mlx5_rx_queue_release,
1432         .tx_queue_release = mlx5_tx_queue_release,
1433         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1434         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1435         .mac_addr_remove = mlx5_mac_addr_remove,
1436         .mac_addr_add = mlx5_mac_addr_add,
1437         .mac_addr_set = mlx5_mac_addr_set,
1438         .set_mc_addr_list = mlx5_set_mc_addr_list,
1439         .mtu_set = mlx5_dev_set_mtu,
1440         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1441         .vlan_offload_set = mlx5_vlan_offload_set,
1442         .filter_ctrl = mlx5_dev_filter_ctrl,
1443         .rx_descriptor_status = mlx5_rx_descriptor_status,
1444         .tx_descriptor_status = mlx5_tx_descriptor_status,
1445         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1446         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1447         .is_removed = mlx5_is_removed,
1448         .get_module_info = mlx5_get_module_info,
1449         .get_module_eeprom = mlx5_get_module_eeprom,
1450         .hairpin_cap_get = mlx5_hairpin_cap_get,
1451         .mtr_ops_get = mlx5_flow_meter_ops_get,
1452 };
1453
1454 /**
1455  * Verify and store value for device argument.
1456  *
1457  * @param[in] key
1458  *   Key argument to verify.
1459  * @param[in] val
1460  *   Value associated with key.
1461  * @param opaque
1462  *   User data.
1463  *
1464  * @return
1465  *   0 on success, a negative errno value otherwise and rte_errno is set.
1466  */
1467 static int
1468 mlx5_args_check(const char *key, const char *val, void *opaque)
1469 {
1470         struct mlx5_dev_config *config = opaque;
1471         unsigned long tmp;
1472
1473         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1474         if (!strcmp(MLX5_REPRESENTOR, key))
1475                 return 0;
1476         errno = 0;
1477         tmp = strtoul(val, NULL, 0);
1478         if (errno) {
1479                 rte_errno = errno;
1480                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1481                 return -rte_errno;
1482         }
1483         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1484                 config->cqe_comp = !!tmp;
1485         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1486                 config->cqe_pad = !!tmp;
1487         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1488                 config->hw_padding = !!tmp;
1489         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1490                 config->mprq.enabled = !!tmp;
1491         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1492                 config->mprq.stride_num_n = tmp;
1493         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1494                 config->mprq.max_memcpy_len = tmp;
1495         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1496                 config->mprq.min_rxqs_num = tmp;
1497         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1498                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1499                                  " converted to txq_inline_max", key);
1500                 config->txq_inline_max = tmp;
1501         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1502                 config->txq_inline_max = tmp;
1503         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1504                 config->txq_inline_min = tmp;
1505         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1506                 config->txq_inline_mpw = tmp;
1507         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1508                 config->txqs_inline = tmp;
1509         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1510                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1511         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1512                 config->mps = !!tmp;
1513         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1514                 if (tmp != MLX5_TXDB_CACHED &&
1515                     tmp != MLX5_TXDB_NCACHED &&
1516                     tmp != MLX5_TXDB_HEURISTIC) {
1517                         DRV_LOG(ERR, "invalid Tx doorbell "
1518                                      "mapping parameter");
1519                         rte_errno = EINVAL;
1520                         return -rte_errno;
1521                 }
1522                 config->dbnc = tmp;
1523         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1524                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1525         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1526                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1527                                  " converted to txq_inline_mpw", key);
1528                 config->txq_inline_mpw = tmp;
1529         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1530                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1531         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1532                 config->rx_vec_en = !!tmp;
1533         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1534                 config->l3_vxlan_en = !!tmp;
1535         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1536                 config->vf_nl_en = !!tmp;
1537         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1538                 config->dv_esw_en = !!tmp;
1539         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1540                 config->dv_flow_en = !!tmp;
1541         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1542                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1543                     tmp != MLX5_XMETA_MODE_META16 &&
1544                     tmp != MLX5_XMETA_MODE_META32) {
1545                         DRV_LOG(ERR, "invalid extensive "
1546                                      "metadata parameter");
1547                         rte_errno = EINVAL;
1548                         return -rte_errno;
1549                 }
1550                 config->dv_xmeta_en = tmp;
1551         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1552                 config->mr_ext_memseg_en = !!tmp;
1553         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1554                 config->max_dump_files_num = tmp;
1555         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1556                 config->lro.timeout = tmp;
1557         } else {
1558                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1559                 rte_errno = EINVAL;
1560                 return -rte_errno;
1561         }
1562         return 0;
1563 }
1564
1565 /**
1566  * Parse device parameters.
1567  *
1568  * @param config
1569  *   Pointer to device configuration structure.
1570  * @param devargs
1571  *   Device arguments structure.
1572  *
1573  * @return
1574  *   0 on success, a negative errno value otherwise and rte_errno is set.
1575  */
1576 static int
1577 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1578 {
1579         const char **params = (const char *[]){
1580                 MLX5_RXQ_CQE_COMP_EN,
1581                 MLX5_RXQ_CQE_PAD_EN,
1582                 MLX5_RXQ_PKT_PAD_EN,
1583                 MLX5_RX_MPRQ_EN,
1584                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1585                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1586                 MLX5_RXQS_MIN_MPRQ,
1587                 MLX5_TXQ_INLINE,
1588                 MLX5_TXQ_INLINE_MIN,
1589                 MLX5_TXQ_INLINE_MAX,
1590                 MLX5_TXQ_INLINE_MPW,
1591                 MLX5_TXQS_MIN_INLINE,
1592                 MLX5_TXQS_MAX_VEC,
1593                 MLX5_TXQ_MPW_EN,
1594                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1595                 MLX5_TXQ_MAX_INLINE_LEN,
1596                 MLX5_TX_DB_NC,
1597                 MLX5_TX_VEC_EN,
1598                 MLX5_RX_VEC_EN,
1599                 MLX5_L3_VXLAN_EN,
1600                 MLX5_VF_NL_EN,
1601                 MLX5_DV_ESW_EN,
1602                 MLX5_DV_FLOW_EN,
1603                 MLX5_DV_XMETA_EN,
1604                 MLX5_MR_EXT_MEMSEG_EN,
1605                 MLX5_REPRESENTOR,
1606                 MLX5_MAX_DUMP_FILES_NUM,
1607                 MLX5_LRO_TIMEOUT_USEC,
1608                 NULL,
1609         };
1610         struct rte_kvargs *kvlist;
1611         int ret = 0;
1612         int i;
1613
1614         if (devargs == NULL)
1615                 return 0;
1616         /* Following UGLY cast is done to pass checkpatch. */
1617         kvlist = rte_kvargs_parse(devargs->args, params);
1618         if (kvlist == NULL) {
1619                 rte_errno = EINVAL;
1620                 return -rte_errno;
1621         }
1622         /* Process parameters. */
1623         for (i = 0; (params[i] != NULL); ++i) {
1624                 if (rte_kvargs_count(kvlist, params[i])) {
1625                         ret = rte_kvargs_process(kvlist, params[i],
1626                                                  mlx5_args_check, config);
1627                         if (ret) {
1628                                 rte_errno = EINVAL;
1629                                 rte_kvargs_free(kvlist);
1630                                 return -rte_errno;
1631                         }
1632                 }
1633         }
1634         rte_kvargs_free(kvlist);
1635         return 0;
1636 }
1637
1638 static struct rte_pci_driver mlx5_driver;
1639
1640 /**
1641  * PMD global initialization.
1642  *
1643  * Independent from individual device, this function initializes global
1644  * per-PMD data structures distinguishing primary and secondary processes.
1645  * Hence, each initialization is called once per a process.
1646  *
1647  * @return
1648  *   0 on success, a negative errno value otherwise and rte_errno is set.
1649  */
1650 static int
1651 mlx5_init_once(void)
1652 {
1653         struct mlx5_shared_data *sd;
1654         struct mlx5_local_data *ld = &mlx5_local_data;
1655         int ret = 0;
1656
1657         if (mlx5_init_shared_data())
1658                 return -rte_errno;
1659         sd = mlx5_shared_data;
1660         assert(sd);
1661         rte_spinlock_lock(&sd->lock);
1662         switch (rte_eal_process_type()) {
1663         case RTE_PROC_PRIMARY:
1664                 if (sd->init_done)
1665                         break;
1666                 LIST_INIT(&sd->mem_event_cb_list);
1667                 rte_rwlock_init(&sd->mem_event_rwlock);
1668                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1669                                                 mlx5_mr_mem_event_cb, NULL);
1670                 ret = mlx5_mp_init_primary();
1671                 if (ret)
1672                         goto out;
1673                 sd->init_done = true;
1674                 break;
1675         case RTE_PROC_SECONDARY:
1676                 if (ld->init_done)
1677                         break;
1678                 ret = mlx5_mp_init_secondary();
1679                 if (ret)
1680                         goto out;
1681                 ++sd->secondary_cnt;
1682                 ld->init_done = true;
1683                 break;
1684         default:
1685                 break;
1686         }
1687 out:
1688         rte_spinlock_unlock(&sd->lock);
1689         return ret;
1690 }
1691
1692 /**
1693  * Configures the minimal amount of data to inline into WQE
1694  * while sending packets.
1695  *
1696  * - the txq_inline_min has the maximal priority, if this
1697  *   key is specified in devargs
1698  * - if DevX is enabled the inline mode is queried from the
1699  *   device (HCA attributes and NIC vport context if needed).
1700  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1701  *   and none (0 bytes) for other NICs
1702  *
1703  * @param spawn
1704  *   Verbs device parameters (name, port, switch_info) to spawn.
1705  * @param config
1706  *   Device configuration parameters.
1707  */
1708 static void
1709 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1710                     struct mlx5_dev_config *config)
1711 {
1712         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1713                 /* Application defines size of inlined data explicitly. */
1714                 switch (spawn->pci_dev->id.device_id) {
1715                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1716                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1717                         if (config->txq_inline_min <
1718                                        (int)MLX5_INLINE_HSIZE_L2) {
1719                                 DRV_LOG(DEBUG,
1720                                         "txq_inline_mix aligned to minimal"
1721                                         " ConnectX-4 required value %d",
1722                                         (int)MLX5_INLINE_HSIZE_L2);
1723                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1724                         }
1725                         break;
1726                 }
1727                 goto exit;
1728         }
1729         if (config->hca_attr.eth_net_offloads) {
1730                 /* We have DevX enabled, inline mode queried successfully. */
1731                 switch (config->hca_attr.wqe_inline_mode) {
1732                 case MLX5_CAP_INLINE_MODE_L2:
1733                         /* outer L2 header must be inlined. */
1734                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1735                         goto exit;
1736                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1737                         /* No inline data are required by NIC. */
1738                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1739                         config->hw_vlan_insert =
1740                                 config->hca_attr.wqe_vlan_insert;
1741                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1742                         goto exit;
1743                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1744                         /* inline mode is defined by NIC vport context. */
1745                         if (!config->hca_attr.eth_virt)
1746                                 break;
1747                         switch (config->hca_attr.vport_inline_mode) {
1748                         case MLX5_INLINE_MODE_NONE:
1749                                 config->txq_inline_min =
1750                                         MLX5_INLINE_HSIZE_NONE;
1751                                 goto exit;
1752                         case MLX5_INLINE_MODE_L2:
1753                                 config->txq_inline_min =
1754                                         MLX5_INLINE_HSIZE_L2;
1755                                 goto exit;
1756                         case MLX5_INLINE_MODE_IP:
1757                                 config->txq_inline_min =
1758                                         MLX5_INLINE_HSIZE_L3;
1759                                 goto exit;
1760                         case MLX5_INLINE_MODE_TCP_UDP:
1761                                 config->txq_inline_min =
1762                                         MLX5_INLINE_HSIZE_L4;
1763                                 goto exit;
1764                         case MLX5_INLINE_MODE_INNER_L2:
1765                                 config->txq_inline_min =
1766                                         MLX5_INLINE_HSIZE_INNER_L2;
1767                                 goto exit;
1768                         case MLX5_INLINE_MODE_INNER_IP:
1769                                 config->txq_inline_min =
1770                                         MLX5_INLINE_HSIZE_INNER_L3;
1771                                 goto exit;
1772                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1773                                 config->txq_inline_min =
1774                                         MLX5_INLINE_HSIZE_INNER_L4;
1775                                 goto exit;
1776                         }
1777                 }
1778         }
1779         /*
1780          * We get here if we are unable to deduce
1781          * inline data size with DevX. Try PCI ID
1782          * to determine old NICs.
1783          */
1784         switch (spawn->pci_dev->id.device_id) {
1785         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1786         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1787         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1788         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1789                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1790                 config->hw_vlan_insert = 0;
1791                 break;
1792         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1793         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1794         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1795         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1796                 /*
1797                  * These NICs support VLAN insertion from WQE and
1798                  * report the wqe_vlan_insert flag. But there is the bug
1799                  * and PFC control may be broken, so disable feature.
1800                  */
1801                 config->hw_vlan_insert = 0;
1802                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1803                 break;
1804         default:
1805                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1806                 break;
1807         }
1808 exit:
1809         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1810 }
1811
1812 /**
1813  * Configures the metadata mask fields in the shared context.
1814  *
1815  * @param [in] dev
1816  *   Pointer to Ethernet device.
1817  */
1818 static void
1819 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1820 {
1821         struct mlx5_priv *priv = dev->data->dev_private;
1822         struct mlx5_ibv_shared *sh = priv->sh;
1823         uint32_t meta, mark, reg_c0;
1824
1825         reg_c0 = ~priv->vport_meta_mask;
1826         switch (priv->config.dv_xmeta_en) {
1827         case MLX5_XMETA_MODE_LEGACY:
1828                 meta = UINT32_MAX;
1829                 mark = MLX5_FLOW_MARK_MASK;
1830                 break;
1831         case MLX5_XMETA_MODE_META16:
1832                 meta = reg_c0 >> rte_bsf32(reg_c0);
1833                 mark = MLX5_FLOW_MARK_MASK;
1834                 break;
1835         case MLX5_XMETA_MODE_META32:
1836                 meta = UINT32_MAX;
1837                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1838                 break;
1839         default:
1840                 meta = 0;
1841                 mark = 0;
1842                 assert(false);
1843                 break;
1844         }
1845         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1846                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1847                                  sh->dv_mark_mask, mark);
1848         else
1849                 sh->dv_mark_mask = mark;
1850         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1851                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1852                                  sh->dv_meta_mask, meta);
1853         else
1854                 sh->dv_meta_mask = meta;
1855         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1856                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1857                                  sh->dv_meta_mask, reg_c0);
1858         else
1859                 sh->dv_regc0_mask = reg_c0;
1860         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1861         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1862         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1863         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1864 }
1865
1866 /**
1867  * Allocate page of door-bells and register it using DevX API.
1868  *
1869  * @param [in] dev
1870  *   Pointer to Ethernet device.
1871  *
1872  * @return
1873  *   Pointer to new page on success, NULL otherwise.
1874  */
1875 static struct mlx5_devx_dbr_page *
1876 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1877 {
1878         struct mlx5_priv *priv = dev->data->dev_private;
1879         struct mlx5_devx_dbr_page *page;
1880
1881         /* Allocate space for door-bell page and management data. */
1882         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1883                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1884         if (!page) {
1885                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1886                         dev->data->port_id);
1887                 return NULL;
1888         }
1889         /* Register allocated memory. */
1890         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1891                                               MLX5_DBR_PAGE_SIZE, 0);
1892         if (!page->umem) {
1893                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1894                         dev->data->port_id);
1895                 rte_free(page);
1896                 return NULL;
1897         }
1898         return page;
1899 }
1900
1901 /**
1902  * Find the next available door-bell, allocate new page if needed.
1903  *
1904  * @param [in] dev
1905  *   Pointer to Ethernet device.
1906  * @param [out] dbr_page
1907  *   Door-bell page containing the page data.
1908  *
1909  * @return
1910  *   Door-bell address offset on success, a negative error value otherwise.
1911  */
1912 int64_t
1913 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1914 {
1915         struct mlx5_priv *priv = dev->data->dev_private;
1916         struct mlx5_devx_dbr_page *page = NULL;
1917         uint32_t i, j;
1918
1919         LIST_FOREACH(page, &priv->dbrpgs, next)
1920                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1921                         break;
1922         if (!page) { /* No page with free door-bell exists. */
1923                 page = mlx5_alloc_dbr_page(dev);
1924                 if (!page) /* Failed to allocate new page. */
1925                         return (-1);
1926                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1927         }
1928         /* Loop to find bitmap part with clear bit. */
1929         for (i = 0;
1930              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1931              i++)
1932                 ; /* Empty. */
1933         /* Find the first clear bit. */
1934         j = rte_bsf64(~page->dbr_bitmap[i]);
1935         assert(i < (MLX5_DBR_PER_PAGE / 64));
1936         page->dbr_bitmap[i] |= (1 << j);
1937         page->dbr_count++;
1938         *dbr_page = page;
1939         return (((i * 64) + j) * sizeof(uint64_t));
1940 }
1941
1942 /**
1943  * Release a door-bell record.
1944  *
1945  * @param [in] dev
1946  *   Pointer to Ethernet device.
1947  * @param [in] umem_id
1948  *   UMEM ID of page containing the door-bell record to release.
1949  * @param [in] offset
1950  *   Offset of door-bell record in page.
1951  *
1952  * @return
1953  *   0 on success, a negative error value otherwise.
1954  */
1955 int32_t
1956 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1957 {
1958         struct mlx5_priv *priv = dev->data->dev_private;
1959         struct mlx5_devx_dbr_page *page = NULL;
1960         int ret = 0;
1961
1962         LIST_FOREACH(page, &priv->dbrpgs, next)
1963                 /* Find the page this address belongs to. */
1964                 if (page->umem->umem_id == umem_id)
1965                         break;
1966         if (!page)
1967                 return -EINVAL;
1968         page->dbr_count--;
1969         if (!page->dbr_count) {
1970                 /* Page not used, free it and remove from list. */
1971                 LIST_REMOVE(page, next);
1972                 if (page->umem)
1973                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1974                 rte_free(page);
1975         } else {
1976                 /* Mark in bitmap that this door-bell is not in use. */
1977                 offset /= MLX5_DBR_SIZE;
1978                 int i = offset / 64;
1979                 int j = offset % 64;
1980
1981                 page->dbr_bitmap[i] &= ~(1 << j);
1982         }
1983         return ret;
1984 }
1985
1986 /**
1987  * Check sibling device configurations.
1988  *
1989  * Sibling devices sharing the Infiniband device context
1990  * should have compatible configurations. This regards
1991  * representors and bonding slaves.
1992  *
1993  * @param priv
1994  *   Private device descriptor.
1995  * @param config
1996  *   Configuration of the device is going to be created.
1997  *
1998  * @return
1999  *   0 on success, EINVAL otherwise
2000  */
2001 static int
2002 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
2003                               struct mlx5_dev_config *config)
2004 {
2005         struct mlx5_ibv_shared *sh = priv->sh;
2006         struct mlx5_dev_config *sh_conf = NULL;
2007         uint16_t port_id;
2008
2009         assert(sh);
2010         /* Nothing to compare for the single/first device. */
2011         if (sh->refcnt == 1)
2012                 return 0;
2013         /* Find the device with shared context. */
2014         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2015                 struct mlx5_priv *opriv =
2016                         rte_eth_devices[port_id].data->dev_private;
2017
2018                 if (opriv && opriv != priv && opriv->sh == sh) {
2019                         sh_conf = &opriv->config;
2020                         break;
2021                 }
2022         }
2023         if (!sh_conf)
2024                 return 0;
2025         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
2026                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
2027                              " for shared %s context", sh->ibdev_name);
2028                 rte_errno = EINVAL;
2029                 return rte_errno;
2030         }
2031         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
2032                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
2033                              " for shared %s context", sh->ibdev_name);
2034                 rte_errno = EINVAL;
2035                 return rte_errno;
2036         }
2037         return 0;
2038 }
2039 /**
2040  * Spawn an Ethernet device from Verbs information.
2041  *
2042  * @param dpdk_dev
2043  *   Backing DPDK device.
2044  * @param spawn
2045  *   Verbs device parameters (name, port, switch_info) to spawn.
2046  * @param config
2047  *   Device configuration parameters.
2048  *
2049  * @return
2050  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
2051  *   is set. The following errors are defined:
2052  *
2053  *   EBUSY: device is not supposed to be spawned.
2054  *   EEXIST: device is already spawned
2055  */
2056 static struct rte_eth_dev *
2057 mlx5_dev_spawn(struct rte_device *dpdk_dev,
2058                struct mlx5_dev_spawn_data *spawn,
2059                struct mlx5_dev_config config)
2060 {
2061         const struct mlx5_switch_info *switch_info = &spawn->info;
2062         struct mlx5_ibv_shared *sh = NULL;
2063         struct ibv_port_attr port_attr;
2064         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
2065         struct rte_eth_dev *eth_dev = NULL;
2066         struct mlx5_priv *priv = NULL;
2067         int err = 0;
2068         unsigned int hw_padding = 0;
2069         unsigned int mps;
2070         unsigned int cqe_comp;
2071         unsigned int cqe_pad = 0;
2072         unsigned int tunnel_en = 0;
2073         unsigned int mpls_en = 0;
2074         unsigned int swp = 0;
2075         unsigned int mprq = 0;
2076         unsigned int mprq_min_stride_size_n = 0;
2077         unsigned int mprq_max_stride_size_n = 0;
2078         unsigned int mprq_min_stride_num_n = 0;
2079         unsigned int mprq_max_stride_num_n = 0;
2080         struct rte_ether_addr mac;
2081         char name[RTE_ETH_NAME_MAX_LEN];
2082         int own_domain_id = 0;
2083         uint16_t port_id;
2084         unsigned int i;
2085 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2086         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
2087 #endif
2088
2089         /* Determine if this port representor is supposed to be spawned. */
2090         if (switch_info->representor && dpdk_dev->devargs) {
2091                 struct rte_eth_devargs eth_da;
2092
2093                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
2094                 if (err) {
2095                         rte_errno = -err;
2096                         DRV_LOG(ERR, "failed to process device arguments: %s",
2097                                 strerror(rte_errno));
2098                         return NULL;
2099                 }
2100                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
2101                         if (eth_da.representor_ports[i] ==
2102                             (uint16_t)switch_info->port_name)
2103                                 break;
2104                 if (i == eth_da.nb_representor_ports) {
2105                         rte_errno = EBUSY;
2106                         return NULL;
2107                 }
2108         }
2109         /* Build device name. */
2110         if (spawn->pf_bond <  0) {
2111                 /* Single device. */
2112                 if (!switch_info->representor)
2113                         strlcpy(name, dpdk_dev->name, sizeof(name));
2114                 else
2115                         snprintf(name, sizeof(name), "%s_representor_%u",
2116                                  dpdk_dev->name, switch_info->port_name);
2117         } else {
2118                 /* Bonding device. */
2119                 if (!switch_info->representor)
2120                         snprintf(name, sizeof(name), "%s_%s",
2121                                  dpdk_dev->name, spawn->ibv_dev->name);
2122                 else
2123                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
2124                                  dpdk_dev->name, spawn->ibv_dev->name,
2125                                  switch_info->port_name);
2126         }
2127         /* check if the device is already spawned */
2128         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2129                 rte_errno = EEXIST;
2130                 return NULL;
2131         }
2132         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2133         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2134                 eth_dev = rte_eth_dev_attach_secondary(name);
2135                 if (eth_dev == NULL) {
2136                         DRV_LOG(ERR, "can not attach rte ethdev");
2137                         rte_errno = ENOMEM;
2138                         return NULL;
2139                 }
2140                 eth_dev->device = dpdk_dev;
2141                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2142                 err = mlx5_proc_priv_init(eth_dev);
2143                 if (err)
2144                         return NULL;
2145                 /* Receive command fd from primary process */
2146                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2147                 if (err < 0)
2148                         return NULL;
2149                 /* Remap UAR for Tx queues. */
2150                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2151                 if (err)
2152                         return NULL;
2153                 /*
2154                  * Ethdev pointer is still required as input since
2155                  * the primary device is not accessible from the
2156                  * secondary process.
2157                  */
2158                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2159                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2160                 return eth_dev;
2161         }
2162         /*
2163          * Some parameters ("tx_db_nc" in particularly) are needed in
2164          * advance to create dv/verbs device context. We proceed the
2165          * devargs here to get ones, and later proceed devargs again
2166          * to override some hardware settings.
2167          */
2168         err = mlx5_args(&config, dpdk_dev->devargs);
2169         if (err) {
2170                 err = rte_errno;
2171                 DRV_LOG(ERR, "failed to process device arguments: %s",
2172                         strerror(rte_errno));
2173                 goto error;
2174         }
2175         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2176         if (!sh)
2177                 return NULL;
2178         config.devx = sh->devx;
2179 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2180         config.dest_tir = 1;
2181 #endif
2182 #ifdef HAVE_IBV_MLX5_MOD_SWP
2183         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2184 #endif
2185         /*
2186          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2187          * as all ConnectX-5 devices.
2188          */
2189 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2190         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2191 #endif
2192 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2193         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2194 #endif
2195         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2196         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2197                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2198                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2199                         mps = MLX5_MPW_ENHANCED;
2200                 } else {
2201                         DRV_LOG(DEBUG, "MPW is supported");
2202                         mps = MLX5_MPW;
2203                 }
2204         } else {
2205                 DRV_LOG(DEBUG, "MPW isn't supported");
2206                 mps = MLX5_MPW_DISABLED;
2207         }
2208 #ifdef HAVE_IBV_MLX5_MOD_SWP
2209         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2210                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2211         DRV_LOG(DEBUG, "SWP support: %u", swp);
2212 #endif
2213         config.swp = !!swp;
2214 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2215         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2216                 struct mlx5dv_striding_rq_caps mprq_caps =
2217                         dv_attr.striding_rq_caps;
2218
2219                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2220                         mprq_caps.min_single_stride_log_num_of_bytes);
2221                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2222                         mprq_caps.max_single_stride_log_num_of_bytes);
2223                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2224                         mprq_caps.min_single_wqe_log_num_of_strides);
2225                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2226                         mprq_caps.max_single_wqe_log_num_of_strides);
2227                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2228                         mprq_caps.supported_qpts);
2229                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2230                 mprq = 1;
2231                 mprq_min_stride_size_n =
2232                         mprq_caps.min_single_stride_log_num_of_bytes;
2233                 mprq_max_stride_size_n =
2234                         mprq_caps.max_single_stride_log_num_of_bytes;
2235                 mprq_min_stride_num_n =
2236                         mprq_caps.min_single_wqe_log_num_of_strides;
2237                 mprq_max_stride_num_n =
2238                         mprq_caps.max_single_wqe_log_num_of_strides;
2239                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2240                                                    mprq_min_stride_num_n);
2241         }
2242 #endif
2243         if (RTE_CACHE_LINE_SIZE == 128 &&
2244             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2245                 cqe_comp = 0;
2246         else
2247                 cqe_comp = 1;
2248         config.cqe_comp = cqe_comp;
2249 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2250         /* Whether device supports 128B Rx CQE padding. */
2251         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2252                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2253 #endif
2254 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2255         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2256                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2257                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2258                              (dv_attr.tunnel_offloads_caps &
2259                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2260         }
2261         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2262                 tunnel_en ? "" : "not ");
2263 #else
2264         DRV_LOG(WARNING,
2265                 "tunnel offloading disabled due to old OFED/rdma-core version");
2266 #endif
2267         config.tunnel_en = tunnel_en;
2268 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2269         mpls_en = ((dv_attr.tunnel_offloads_caps &
2270                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2271                    (dv_attr.tunnel_offloads_caps &
2272                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2273         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2274                 mpls_en ? "" : "not ");
2275 #else
2276         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2277                 " old OFED/rdma-core version or firmware configuration");
2278 #endif
2279         config.mpls_en = mpls_en;
2280         /* Check port status. */
2281         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2282         if (err) {
2283                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2284                 goto error;
2285         }
2286         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2287                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2288                 err = EINVAL;
2289                 goto error;
2290         }
2291         if (port_attr.state != IBV_PORT_ACTIVE)
2292                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2293                         mlx5_glue->port_state_str(port_attr.state),
2294                         port_attr.state);
2295         /* Allocate private eth device data. */
2296         priv = rte_zmalloc("ethdev private structure",
2297                            sizeof(*priv),
2298                            RTE_CACHE_LINE_SIZE);
2299         if (priv == NULL) {
2300                 DRV_LOG(ERR, "priv allocation failure");
2301                 err = ENOMEM;
2302                 goto error;
2303         }
2304         priv->sh = sh;
2305         priv->ibv_port = spawn->ibv_port;
2306         priv->pci_dev = spawn->pci_dev;
2307         priv->mtu = RTE_ETHER_MTU;
2308 #ifndef RTE_ARCH_64
2309         /* Initialize UAR access locks for 32bit implementations. */
2310         rte_spinlock_init(&priv->uar_lock_cq);
2311         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2312                 rte_spinlock_init(&priv->uar_lock[i]);
2313 #endif
2314         /* Some internal functions rely on Netlink sockets, open them now. */
2315         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2316         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2317         priv->nl_sn = 0;
2318         priv->representor = !!switch_info->representor;
2319         priv->master = !!switch_info->master;
2320         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2321         priv->vport_meta_tag = 0;
2322         priv->vport_meta_mask = 0;
2323         priv->pf_bond = spawn->pf_bond;
2324 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2325         /*
2326          * The DevX port query API is implemented. E-Switch may use
2327          * either vport or reg_c[0] metadata register to match on
2328          * vport index. The engaged part of metadata register is
2329          * defined by mask.
2330          */
2331         if (switch_info->representor || switch_info->master) {
2332                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2333                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2334                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2335                                                  &devx_port);
2336                 if (err) {
2337                         DRV_LOG(WARNING,
2338                                 "can't query devx port %d on device %s",
2339                                 spawn->ibv_port, spawn->ibv_dev->name);
2340                         devx_port.comp_mask = 0;
2341                 }
2342         }
2343         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2344                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2345                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2346                 if (!priv->vport_meta_mask) {
2347                         DRV_LOG(ERR, "vport zero mask for port %d"
2348                                      " on bonding device %s",
2349                                      spawn->ibv_port, spawn->ibv_dev->name);
2350                         err = ENOTSUP;
2351                         goto error;
2352                 }
2353                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2354                         DRV_LOG(ERR, "invalid vport tag for port %d"
2355                                      " on bonding device %s",
2356                                      spawn->ibv_port, spawn->ibv_dev->name);
2357                         err = ENOTSUP;
2358                         goto error;
2359                 }
2360         }
2361         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2362                 priv->vport_id = devx_port.vport_num;
2363         } else if (spawn->pf_bond >= 0) {
2364                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2365                              " on bonding device %s",
2366                              spawn->ibv_port, spawn->ibv_dev->name);
2367                 err = ENOTSUP;
2368                 goto error;
2369         } else {
2370                 /* Suppose vport index in compatible way. */
2371                 priv->vport_id = switch_info->representor ?
2372                                  switch_info->port_name + 1 : -1;
2373         }
2374 #else
2375         /*
2376          * Kernel/rdma_core support single E-Switch per PF configurations
2377          * only and vport_id field contains the vport index for
2378          * associated VF, which is deduced from representor port name.
2379          * For example, let's have the IB device port 10, it has
2380          * attached network device eth0, which has port name attribute
2381          * pf0vf2, we can deduce the VF number as 2, and set vport index
2382          * as 3 (2+1). This assigning schema should be changed if the
2383          * multiple E-Switch instances per PF configurations or/and PCI
2384          * subfunctions are added.
2385          */
2386         priv->vport_id = switch_info->representor ?
2387                          switch_info->port_name + 1 : -1;
2388 #endif
2389         /* representor_id field keeps the unmodified VF index. */
2390         priv->representor_id = switch_info->representor ?
2391                                switch_info->port_name : -1;
2392         /*
2393          * Look for sibling devices in order to reuse their switch domain
2394          * if any, otherwise allocate one.
2395          */
2396         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2397                 const struct mlx5_priv *opriv =
2398                         rte_eth_devices[port_id].data->dev_private;
2399
2400                 if (!opriv ||
2401                     opriv->sh != priv->sh ||
2402                         opriv->domain_id ==
2403                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2404                         continue;
2405                 priv->domain_id = opriv->domain_id;
2406                 break;
2407         }
2408         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2409                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2410                 if (err) {
2411                         err = rte_errno;
2412                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2413                                 strerror(rte_errno));
2414                         goto error;
2415                 }
2416                 own_domain_id = 1;
2417         }
2418         /* Override some values set by hardware configuration. */
2419         mlx5_args(&config, dpdk_dev->devargs);
2420         err = mlx5_dev_check_sibling_config(priv, &config);
2421         if (err)
2422                 goto error;
2423         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2424                             IBV_DEVICE_RAW_IP_CSUM);
2425         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2426                 (config.hw_csum ? "" : "not "));
2427 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2428         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2429         DRV_LOG(DEBUG, "counters are not supported");
2430 #endif
2431 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
2432         if (config.dv_flow_en) {
2433                 DRV_LOG(WARNING, "DV flow is not supported");
2434                 config.dv_flow_en = 0;
2435         }
2436 #endif
2437         config.ind_table_max_size =
2438                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2439         /*
2440          * Remove this check once DPDK supports larger/variable
2441          * indirection tables.
2442          */
2443         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2444                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2445         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2446                 config.ind_table_max_size);
2447         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2448                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2449         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2450                 (config.hw_vlan_strip ? "" : "not "));
2451         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2452                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2453         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2454                 (config.hw_fcs_strip ? "" : "not "));
2455 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2456         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2457 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2458         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2459                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2460 #endif
2461         if (config.hw_padding && !hw_padding) {
2462                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2463                 config.hw_padding = 0;
2464         } else if (config.hw_padding) {
2465                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2466         }
2467         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2468                       (sh->device_attr.tso_caps.supported_qpts &
2469                        (1 << IBV_QPT_RAW_PACKET)));
2470         if (config.tso)
2471                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2472         /*
2473          * MPW is disabled by default, while the Enhanced MPW is enabled
2474          * by default.
2475          */
2476         if (config.mps == MLX5_ARG_UNSET)
2477                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2478                                                           MLX5_MPW_DISABLED;
2479         else
2480                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2481         DRV_LOG(INFO, "%sMPS is %s",
2482                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
2483                 config.mps == MLX5_MPW ? "legacy " : "",
2484                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2485         if (config.cqe_comp && !cqe_comp) {
2486                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2487                 config.cqe_comp = 0;
2488         }
2489         if (config.cqe_pad && !cqe_pad) {
2490                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2491                 config.cqe_pad = 0;
2492         } else if (config.cqe_pad) {
2493                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2494         }
2495         if (config.devx) {
2496                 priv->counter_fallback = 0;
2497                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2498                 if (err) {
2499                         err = -err;
2500                         goto error;
2501                 }
2502                 if (!config.hca_attr.flow_counters_dump)
2503                         priv->counter_fallback = 1;
2504 #ifndef HAVE_IBV_DEVX_ASYNC
2505                 priv->counter_fallback = 1;
2506 #endif
2507                 if (priv->counter_fallback)
2508                         DRV_LOG(INFO, "Use fall-back DV counter management");
2509                 /* Check for LRO support. */
2510                 if (config.dest_tir && config.hca_attr.lro_cap &&
2511                     config.dv_flow_en) {
2512                         /* TBD check tunnel lro caps. */
2513                         config.lro.supported = config.hca_attr.lro_cap;
2514                         DRV_LOG(DEBUG, "Device supports LRO");
2515                         /*
2516                          * If LRO timeout is not configured by application,
2517                          * use the minimal supported value.
2518                          */
2519                         if (!config.lro.timeout)
2520                                 config.lro.timeout =
2521                                 config.hca_attr.lro_timer_supported_periods[0];
2522                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2523                                 config.lro.timeout);
2524                 }
2525 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2526                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2527                     config.dv_flow_en) {
2528                         uint8_t reg_c_mask =
2529                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2530                         /*
2531                          * Meter needs two REG_C's for color match and pre-sfx
2532                          * flow match. Here get the REG_C for color match.
2533                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2534                          */
2535                         reg_c_mask &= 0xfc;
2536                         if (__builtin_popcount(reg_c_mask) < 1) {
2537                                 priv->mtr_en = 0;
2538                                 DRV_LOG(WARNING, "No available register for"
2539                                         " meter.");
2540                         } else {
2541                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2542                                                       REG_C_0;
2543                                 priv->mtr_en = 1;
2544                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2545                                         priv->mtr_color_reg);
2546                         }
2547                 }
2548 #endif
2549         }
2550         if (config.mprq.enabled && mprq) {
2551                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2552                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2553                         config.mprq.stride_num_n =
2554                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2555                                         mprq_min_stride_num_n);
2556                         DRV_LOG(WARNING,
2557                                 "the number of strides"
2558                                 " for Multi-Packet RQ is out of range,"
2559                                 " setting default value (%u)",
2560                                 1 << config.mprq.stride_num_n);
2561                 }
2562                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2563                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2564         } else if (config.mprq.enabled && !mprq) {
2565                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2566                 config.mprq.enabled = 0;
2567         }
2568         if (config.max_dump_files_num == 0)
2569                 config.max_dump_files_num = 128;
2570         eth_dev = rte_eth_dev_allocate(name);
2571         if (eth_dev == NULL) {
2572                 DRV_LOG(ERR, "can not allocate rte ethdev");
2573                 err = ENOMEM;
2574                 goto error;
2575         }
2576         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2577         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2578         if (priv->representor) {
2579                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2580                 eth_dev->data->representor_id = priv->representor_id;
2581         }
2582         /*
2583          * Store associated network device interface index. This index
2584          * is permanent throughout the lifetime of device. So, we may store
2585          * the ifindex here and use the cached value further.
2586          */
2587         assert(spawn->ifindex);
2588         priv->if_index = spawn->ifindex;
2589         eth_dev->data->dev_private = priv;
2590         priv->dev_data = eth_dev->data;
2591         eth_dev->data->mac_addrs = priv->mac;
2592         eth_dev->device = dpdk_dev;
2593         /* Configure the first MAC address by default. */
2594         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2595                 DRV_LOG(ERR,
2596                         "port %u cannot get MAC address, is mlx5_en"
2597                         " loaded? (errno: %s)",
2598                         eth_dev->data->port_id, strerror(rte_errno));
2599                 err = ENODEV;
2600                 goto error;
2601         }
2602         DRV_LOG(INFO,
2603                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2604                 eth_dev->data->port_id,
2605                 mac.addr_bytes[0], mac.addr_bytes[1],
2606                 mac.addr_bytes[2], mac.addr_bytes[3],
2607                 mac.addr_bytes[4], mac.addr_bytes[5]);
2608 #ifndef NDEBUG
2609         {
2610                 char ifname[IF_NAMESIZE];
2611
2612                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2613                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2614                                 eth_dev->data->port_id, ifname);
2615                 else
2616                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2617                                 eth_dev->data->port_id);
2618         }
2619 #endif
2620         /* Get actual MTU if possible. */
2621         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2622         if (err) {
2623                 err = rte_errno;
2624                 goto error;
2625         }
2626         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2627                 priv->mtu);
2628         /* Initialize burst functions to prevent crashes before link-up. */
2629         eth_dev->rx_pkt_burst = removed_rx_burst;
2630         eth_dev->tx_pkt_burst = removed_tx_burst;
2631         eth_dev->dev_ops = &mlx5_dev_ops;
2632         /* Register MAC address. */
2633         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2634         if (config.vf && config.vf_nl_en)
2635                 mlx5_nl_mac_addr_sync(eth_dev);
2636         TAILQ_INIT(&priv->flows);
2637         TAILQ_INIT(&priv->ctrl_flows);
2638         TAILQ_INIT(&priv->flow_meters);
2639         TAILQ_INIT(&priv->flow_meter_profiles);
2640         /* Hint libmlx5 to use PMD allocator for data plane resources */
2641         struct mlx5dv_ctx_allocators alctr = {
2642                 .alloc = &mlx5_alloc_verbs_buf,
2643                 .free = &mlx5_free_verbs_buf,
2644                 .data = priv,
2645         };
2646         mlx5_glue->dv_set_context_attr(sh->ctx,
2647                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2648                                        (void *)((uintptr_t)&alctr));
2649         /* Bring Ethernet device up. */
2650         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2651                 eth_dev->data->port_id);
2652         mlx5_set_link_up(eth_dev);
2653         /*
2654          * Even though the interrupt handler is not installed yet,
2655          * interrupts will still trigger on the async_fd from
2656          * Verbs context returned by ibv_open_device().
2657          */
2658         mlx5_link_update(eth_dev, 0);
2659 #ifdef HAVE_MLX5DV_DR_ESWITCH
2660         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2661               (switch_info->representor || switch_info->master)))
2662                 config.dv_esw_en = 0;
2663 #else
2664         config.dv_esw_en = 0;
2665 #endif
2666         /* Detect minimal data bytes to inline. */
2667         mlx5_set_min_inline(spawn, &config);
2668         /* Store device configuration on private structure. */
2669         priv->config = config;
2670         /* Create context for virtual machine VLAN workaround. */
2671         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2672         if (config.dv_flow_en) {
2673                 err = mlx5_alloc_shared_dr(priv);
2674                 if (err)
2675                         goto error;
2676                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2677                 if (!priv->qrss_id_pool) {
2678                         DRV_LOG(ERR, "can't create flow id pool");
2679                         err = ENOMEM;
2680                         goto error;
2681                 }
2682         }
2683         /* Supported Verbs flow priority number detection. */
2684         err = mlx5_flow_discover_priorities(eth_dev);
2685         if (err < 0) {
2686                 err = -err;
2687                 goto error;
2688         }
2689         priv->config.flow_prio = err;
2690         if (!priv->config.dv_esw_en &&
2691             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2692                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2693                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2694                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2695         }
2696         mlx5_set_metadata_mask(eth_dev);
2697         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2698             !priv->sh->dv_regc0_mask) {
2699                 DRV_LOG(ERR, "metadata mode %u is not supported "
2700                              "(no metadata reg_c[0] is available)",
2701                              priv->config.dv_xmeta_en);
2702                         err = ENOTSUP;
2703                         goto error;
2704         }
2705         /* Query availibility of metadata reg_c's. */
2706         err = mlx5_flow_discover_mreg_c(eth_dev);
2707         if (err < 0) {
2708                 err = -err;
2709                 goto error;
2710         }
2711         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2712                 DRV_LOG(DEBUG,
2713                         "port %u extensive metadata register is not supported",
2714                         eth_dev->data->port_id);
2715                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2716                         DRV_LOG(ERR, "metadata mode %u is not supported "
2717                                      "(no metadata registers available)",
2718                                      priv->config.dv_xmeta_en);
2719                         err = ENOTSUP;
2720                         goto error;
2721                 }
2722         }
2723         if (priv->config.dv_flow_en &&
2724             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2725             mlx5_flow_ext_mreg_supported(eth_dev) &&
2726             priv->sh->dv_regc0_mask) {
2727                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2728                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2729                 if (!priv->mreg_cp_tbl) {
2730                         err = ENOMEM;
2731                         goto error;
2732                 }
2733         }
2734         return eth_dev;
2735 error:
2736         if (priv) {
2737                 if (priv->mreg_cp_tbl)
2738                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2739                 if (priv->sh)
2740                         mlx5_free_shared_dr(priv);
2741                 if (priv->nl_socket_route >= 0)
2742                         close(priv->nl_socket_route);
2743                 if (priv->nl_socket_rdma >= 0)
2744                         close(priv->nl_socket_rdma);
2745                 if (priv->vmwa_context)
2746                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2747                 if (priv->qrss_id_pool)
2748                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2749                 if (own_domain_id)
2750                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2751                 rte_free(priv);
2752                 if (eth_dev != NULL)
2753                         eth_dev->data->dev_private = NULL;
2754         }
2755         if (eth_dev != NULL) {
2756                 /* mac_addrs must not be freed alone because part of dev_private */
2757                 eth_dev->data->mac_addrs = NULL;
2758                 rte_eth_dev_release_port(eth_dev);
2759         }
2760         if (sh)
2761                 mlx5_free_shared_ibctx(sh);
2762         assert(err > 0);
2763         rte_errno = err;
2764         return NULL;
2765 }
2766
2767 /**
2768  * Comparison callback to sort device data.
2769  *
2770  * This is meant to be used with qsort().
2771  *
2772  * @param a[in]
2773  *   Pointer to pointer to first data object.
2774  * @param b[in]
2775  *   Pointer to pointer to second data object.
2776  *
2777  * @return
2778  *   0 if both objects are equal, less than 0 if the first argument is less
2779  *   than the second, greater than 0 otherwise.
2780  */
2781 static int
2782 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2783 {
2784         const struct mlx5_switch_info *si_a =
2785                 &((const struct mlx5_dev_spawn_data *)a)->info;
2786         const struct mlx5_switch_info *si_b =
2787                 &((const struct mlx5_dev_spawn_data *)b)->info;
2788         int ret;
2789
2790         /* Master device first. */
2791         ret = si_b->master - si_a->master;
2792         if (ret)
2793                 return ret;
2794         /* Then representor devices. */
2795         ret = si_b->representor - si_a->representor;
2796         if (ret)
2797                 return ret;
2798         /* Unidentified devices come last in no specific order. */
2799         if (!si_a->representor)
2800                 return 0;
2801         /* Order representors by name. */
2802         return si_a->port_name - si_b->port_name;
2803 }
2804
2805 /**
2806  * Match PCI information for possible slaves of bonding device.
2807  *
2808  * @param[in] ibv_dev
2809  *   Pointer to Infiniband device structure.
2810  * @param[in] pci_dev
2811  *   Pointer to PCI device structure to match PCI address.
2812  * @param[in] nl_rdma
2813  *   Netlink RDMA group socket handle.
2814  *
2815  * @return
2816  *   negative value if no bonding device found, otherwise
2817  *   positive index of slave PF in bonding.
2818  */
2819 static int
2820 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2821                            const struct rte_pci_device *pci_dev,
2822                            int nl_rdma)
2823 {
2824         char ifname[IF_NAMESIZE + 1];
2825         unsigned int ifindex;
2826         unsigned int np, i;
2827         FILE *file = NULL;
2828         int pf = -1;
2829
2830         /*
2831          * Try to get master device name. If something goes
2832          * wrong suppose the lack of kernel support and no
2833          * bonding devices.
2834          */
2835         if (nl_rdma < 0)
2836                 return -1;
2837         if (!strstr(ibv_dev->name, "bond"))
2838                 return -1;
2839         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2840         if (!np)
2841                 return -1;
2842         /*
2843          * The Master device might not be on the predefined
2844          * port (not on port index 1, it is not garanted),
2845          * we have to scan all Infiniband device port and
2846          * find master.
2847          */
2848         for (i = 1; i <= np; ++i) {
2849                 /* Check whether Infiniband port is populated. */
2850                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2851                 if (!ifindex)
2852                         continue;
2853                 if (!if_indextoname(ifindex, ifname))
2854                         continue;
2855                 /* Try to read bonding slave names from sysfs. */
2856                 MKSTR(slaves,
2857                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2858                 file = fopen(slaves, "r");
2859                 if (file)
2860                         break;
2861         }
2862         if (!file)
2863                 return -1;
2864         /* Use safe format to check maximal buffer length. */
2865         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2866         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2867                 char tmp_str[IF_NAMESIZE + 32];
2868                 struct rte_pci_addr pci_addr;
2869                 struct mlx5_switch_info info;
2870
2871                 /* Process slave interface names in the loop. */
2872                 snprintf(tmp_str, sizeof(tmp_str),
2873                          "/sys/class/net/%s", ifname);
2874                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2875                         DRV_LOG(WARNING, "can not get PCI address"
2876                                          " for netdev \"%s\"", ifname);
2877                         continue;
2878                 }
2879                 if (pci_dev->addr.domain != pci_addr.domain ||
2880                     pci_dev->addr.bus != pci_addr.bus ||
2881                     pci_dev->addr.devid != pci_addr.devid ||
2882                     pci_dev->addr.function != pci_addr.function)
2883                         continue;
2884                 /* Slave interface PCI address match found. */
2885                 fclose(file);
2886                 snprintf(tmp_str, sizeof(tmp_str),
2887                          "/sys/class/net/%s/phys_port_name", ifname);
2888                 file = fopen(tmp_str, "rb");
2889                 if (!file)
2890                         break;
2891                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2892                 if (fscanf(file, "%32s", tmp_str) == 1)
2893                         mlx5_translate_port_name(tmp_str, &info);
2894                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2895                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2896                         pf = info.port_name;
2897                 break;
2898         }
2899         if (file)
2900                 fclose(file);
2901         return pf;
2902 }
2903
2904 /**
2905  * DPDK callback to register a PCI device.
2906  *
2907  * This function spawns Ethernet devices out of a given PCI device.
2908  *
2909  * @param[in] pci_drv
2910  *   PCI driver structure (mlx5_driver).
2911  * @param[in] pci_dev
2912  *   PCI device information.
2913  *
2914  * @return
2915  *   0 on success, a negative errno value otherwise and rte_errno is set.
2916  */
2917 static int
2918 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2919                struct rte_pci_device *pci_dev)
2920 {
2921         struct ibv_device **ibv_list;
2922         /*
2923          * Number of found IB Devices matching with requested PCI BDF.
2924          * nd != 1 means there are multiple IB devices over the same
2925          * PCI device and we have representors and master.
2926          */
2927         unsigned int nd = 0;
2928         /*
2929          * Number of found IB device Ports. nd = 1 and np = 1..n means
2930          * we have the single multiport IB device, and there may be
2931          * representors attached to some of found ports.
2932          */
2933         unsigned int np = 0;
2934         /*
2935          * Number of DPDK ethernet devices to Spawn - either over
2936          * multiple IB devices or multiple ports of single IB device.
2937          * Actually this is the number of iterations to spawn.
2938          */
2939         unsigned int ns = 0;
2940         /*
2941          * Bonding device
2942          *   < 0 - no bonding device (single one)
2943          *  >= 0 - bonding device (value is slave PF index)
2944          */
2945         int bd = -1;
2946         struct mlx5_dev_spawn_data *list = NULL;
2947         struct mlx5_dev_config dev_config;
2948         int ret;
2949
2950         ret = mlx5_init_once();
2951         if (ret) {
2952                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2953                         strerror(rte_errno));
2954                 return -rte_errno;
2955         }
2956         assert(pci_drv == &mlx5_driver);
2957         errno = 0;
2958         ibv_list = mlx5_glue->get_device_list(&ret);
2959         if (!ibv_list) {
2960                 rte_errno = errno ? errno : ENOSYS;
2961                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2962                 return -rte_errno;
2963         }
2964         /*
2965          * First scan the list of all Infiniband devices to find
2966          * matching ones, gathering into the list.
2967          */
2968         struct ibv_device *ibv_match[ret + 1];
2969         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2970         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2971         unsigned int i;
2972
2973         while (ret-- > 0) {
2974                 struct rte_pci_addr pci_addr;
2975
2976                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2977                 bd = mlx5_device_bond_pci_match
2978                                 (ibv_list[ret], pci_dev, nl_rdma);
2979                 if (bd >= 0) {
2980                         /*
2981                          * Bonding device detected. Only one match is allowed,
2982                          * the bonding is supported over multi-port IB device,
2983                          * there should be no matches on representor PCI
2984                          * functions or non VF LAG bonding devices with
2985                          * specified address.
2986                          */
2987                         if (nd) {
2988                                 DRV_LOG(ERR,
2989                                         "multiple PCI match on bonding device"
2990                                         "\"%s\" found", ibv_list[ret]->name);
2991                                 rte_errno = ENOENT;
2992                                 ret = -rte_errno;
2993                                 goto exit;
2994                         }
2995                         DRV_LOG(INFO, "PCI information matches for"
2996                                       " slave %d bonding device \"%s\"",
2997                                       bd, ibv_list[ret]->name);
2998                         ibv_match[nd++] = ibv_list[ret];
2999                         break;
3000                 }
3001                 if (mlx5_dev_to_pci_addr
3002                         (ibv_list[ret]->ibdev_path, &pci_addr))
3003                         continue;
3004                 if (pci_dev->addr.domain != pci_addr.domain ||
3005                     pci_dev->addr.bus != pci_addr.bus ||
3006                     pci_dev->addr.devid != pci_addr.devid ||
3007                     pci_dev->addr.function != pci_addr.function)
3008                         continue;
3009                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
3010                         ibv_list[ret]->name);
3011                 ibv_match[nd++] = ibv_list[ret];
3012         }
3013         ibv_match[nd] = NULL;
3014         if (!nd) {
3015                 /* No device matches, just complain and bail out. */
3016                 DRV_LOG(WARNING,
3017                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
3018                         " are kernel drivers loaded?",
3019                         pci_dev->addr.domain, pci_dev->addr.bus,
3020                         pci_dev->addr.devid, pci_dev->addr.function);
3021                 rte_errno = ENOENT;
3022                 ret = -rte_errno;
3023                 goto exit;
3024         }
3025         if (nd == 1) {
3026                 /*
3027                  * Found single matching device may have multiple ports.
3028                  * Each port may be representor, we have to check the port
3029                  * number and check the representors existence.
3030                  */
3031                 if (nl_rdma >= 0)
3032                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
3033                 if (!np)
3034                         DRV_LOG(WARNING, "can not get IB device \"%s\""
3035                                          " ports number", ibv_match[0]->name);
3036                 if (bd >= 0 && !np) {
3037                         DRV_LOG(ERR, "can not get ports"
3038                                      " for bonding device");
3039                         rte_errno = ENOENT;
3040                         ret = -rte_errno;
3041                         goto exit;
3042                 }
3043         }
3044 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
3045         if (bd >= 0) {
3046                 /*
3047                  * This may happen if there is VF LAG kernel support and
3048                  * application is compiled with older rdma_core library.
3049                  */
3050                 DRV_LOG(ERR,
3051                         "No kernel/verbs support for VF LAG bonding found.");
3052                 rte_errno = ENOTSUP;
3053                 ret = -rte_errno;
3054                 goto exit;
3055         }
3056 #endif
3057         /*
3058          * Now we can determine the maximal
3059          * amount of devices to be spawned.
3060          */
3061         list = rte_zmalloc("device spawn data",
3062                          sizeof(struct mlx5_dev_spawn_data) *
3063                          (np ? np : nd),
3064                          RTE_CACHE_LINE_SIZE);
3065         if (!list) {
3066                 DRV_LOG(ERR, "spawn data array allocation failure");
3067                 rte_errno = ENOMEM;
3068                 ret = -rte_errno;
3069                 goto exit;
3070         }
3071         if (bd >= 0 || np > 1) {
3072                 /*
3073                  * Single IB device with multiple ports found,
3074                  * it may be E-Switch master device and representors.
3075                  * We have to perform identification trough the ports.
3076                  */
3077                 assert(nl_rdma >= 0);
3078                 assert(ns == 0);
3079                 assert(nd == 1);
3080                 assert(np);
3081                 for (i = 1; i <= np; ++i) {
3082                         list[ns].max_port = np;
3083                         list[ns].ibv_port = i;
3084                         list[ns].ibv_dev = ibv_match[0];
3085                         list[ns].eth_dev = NULL;
3086                         list[ns].pci_dev = pci_dev;
3087                         list[ns].pf_bond = bd;
3088                         list[ns].ifindex = mlx5_nl_ifindex
3089                                         (nl_rdma, list[ns].ibv_dev->name, i);
3090                         if (!list[ns].ifindex) {
3091                                 /*
3092                                  * No network interface index found for the
3093                                  * specified port, it means there is no
3094                                  * representor on this port. It's OK,
3095                                  * there can be disabled ports, for example
3096                                  * if sriov_numvfs < sriov_totalvfs.
3097                                  */
3098                                 continue;
3099                         }
3100                         ret = -1;
3101                         if (nl_route >= 0)
3102                                 ret = mlx5_nl_switch_info
3103                                                (nl_route,
3104                                                 list[ns].ifindex,
3105                                                 &list[ns].info);
3106                         if (ret || (!list[ns].info.representor &&
3107                                     !list[ns].info.master)) {
3108                                 /*
3109                                  * We failed to recognize representors with
3110                                  * Netlink, let's try to perform the task
3111                                  * with sysfs.
3112                                  */
3113                                 ret =  mlx5_sysfs_switch_info
3114                                                 (list[ns].ifindex,
3115                                                  &list[ns].info);
3116                         }
3117                         if (!ret && bd >= 0) {
3118                                 switch (list[ns].info.name_type) {
3119                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
3120                                         if (list[ns].info.port_name == bd)
3121                                                 ns++;
3122                                         break;
3123                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
3124                                         if (list[ns].info.pf_num == bd)
3125                                                 ns++;
3126                                         break;
3127                                 default:
3128                                         break;
3129                                 }
3130                                 continue;
3131                         }
3132                         if (!ret && (list[ns].info.representor ^
3133                                      list[ns].info.master))
3134                                 ns++;
3135                 }
3136                 if (!ns) {
3137                         DRV_LOG(ERR,
3138                                 "unable to recognize master/representors"
3139                                 " on the IB device with multiple ports");
3140                         rte_errno = ENOENT;
3141                         ret = -rte_errno;
3142                         goto exit;
3143                 }
3144         } else {
3145                 /*
3146                  * The existence of several matching entries (nd > 1) means
3147                  * port representors have been instantiated. No existing Verbs
3148                  * call nor sysfs entries can tell them apart, this can only
3149                  * be done through Netlink calls assuming kernel drivers are
3150                  * recent enough to support them.
3151                  *
3152                  * In the event of identification failure through Netlink,
3153                  * try again through sysfs, then:
3154                  *
3155                  * 1. A single IB device matches (nd == 1) with single
3156                  *    port (np=0/1) and is not a representor, assume
3157                  *    no switch support.
3158                  *
3159                  * 2. Otherwise no safe assumptions can be made;
3160                  *    complain louder and bail out.
3161                  */
3162                 np = 1;
3163                 for (i = 0; i != nd; ++i) {
3164                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3165                         list[ns].max_port = 1;
3166                         list[ns].ibv_port = 1;
3167                         list[ns].ibv_dev = ibv_match[i];
3168                         list[ns].eth_dev = NULL;
3169                         list[ns].pci_dev = pci_dev;
3170                         list[ns].pf_bond = -1;
3171                         list[ns].ifindex = 0;
3172                         if (nl_rdma >= 0)
3173                                 list[ns].ifindex = mlx5_nl_ifindex
3174                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3175                         if (!list[ns].ifindex) {
3176                                 char ifname[IF_NAMESIZE];
3177
3178                                 /*
3179                                  * Netlink failed, it may happen with old
3180                                  * ib_core kernel driver (before 4.16).
3181                                  * We can assume there is old driver because
3182                                  * here we are processing single ports IB
3183                                  * devices. Let's try sysfs to retrieve
3184                                  * the ifindex. The method works for
3185                                  * master device only.
3186                                  */
3187                                 if (nd > 1) {
3188                                         /*
3189                                          * Multiple devices found, assume
3190                                          * representors, can not distinguish
3191                                          * master/representor and retrieve
3192                                          * ifindex via sysfs.
3193                                          */
3194                                         continue;
3195                                 }
3196                                 ret = mlx5_get_master_ifname
3197                                         (ibv_match[i]->ibdev_path, &ifname);
3198                                 if (!ret)
3199                                         list[ns].ifindex =
3200                                                 if_nametoindex(ifname);
3201                                 if (!list[ns].ifindex) {
3202                                         /*
3203                                          * No network interface index found
3204                                          * for the specified device, it means
3205                                          * there it is neither representor
3206                                          * nor master.
3207                                          */
3208                                         continue;
3209                                 }
3210                         }
3211                         ret = -1;
3212                         if (nl_route >= 0)
3213                                 ret = mlx5_nl_switch_info
3214                                                (nl_route,
3215                                                 list[ns].ifindex,
3216                                                 &list[ns].info);
3217                         if (ret || (!list[ns].info.representor &&
3218                                     !list[ns].info.master)) {
3219                                 /*
3220                                  * We failed to recognize representors with
3221                                  * Netlink, let's try to perform the task
3222                                  * with sysfs.
3223                                  */
3224                                 ret =  mlx5_sysfs_switch_info
3225                                                 (list[ns].ifindex,
3226                                                  &list[ns].info);
3227                         }
3228                         if (!ret && (list[ns].info.representor ^
3229                                      list[ns].info.master)) {
3230                                 ns++;
3231                         } else if ((nd == 1) &&
3232                                    !list[ns].info.representor &&
3233                                    !list[ns].info.master) {
3234                                 /*
3235                                  * Single IB device with
3236                                  * one physical port and
3237                                  * attached network device.
3238                                  * May be SRIOV is not enabled
3239                                  * or there is no representors.
3240                                  */
3241                                 DRV_LOG(INFO, "no E-Switch support detected");
3242                                 ns++;
3243                                 break;
3244                         }
3245                 }
3246                 if (!ns) {
3247                         DRV_LOG(ERR,
3248                                 "unable to recognize master/representors"
3249                                 " on the multiple IB devices");
3250                         rte_errno = ENOENT;
3251                         ret = -rte_errno;
3252                         goto exit;
3253                 }
3254         }
3255         assert(ns);
3256         /*
3257          * Sort list to probe devices in natural order for users convenience
3258          * (i.e. master first, then representors from lowest to highest ID).
3259          */
3260         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3261         /* Default configuration. */
3262         dev_config = (struct mlx5_dev_config){
3263                 .hw_padding = 0,
3264                 .mps = MLX5_ARG_UNSET,
3265                 .dbnc = MLX5_ARG_UNSET,
3266                 .rx_vec_en = 1,
3267                 .txq_inline_max = MLX5_ARG_UNSET,
3268                 .txq_inline_min = MLX5_ARG_UNSET,
3269                 .txq_inline_mpw = MLX5_ARG_UNSET,
3270                 .txqs_inline = MLX5_ARG_UNSET,
3271                 .vf_nl_en = 1,
3272                 .mr_ext_memseg_en = 1,
3273                 .mprq = {
3274                         .enabled = 0, /* Disabled by default. */
3275                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3276                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3277                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3278                 },
3279                 .dv_esw_en = 1,
3280                 .dv_flow_en = 1,
3281         };
3282         /* Device specific configuration. */
3283         switch (pci_dev->id.device_id) {
3284         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3285         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3286         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3287         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3288         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3289         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3290         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3291                 dev_config.vf = 1;
3292                 break;
3293         default:
3294                 break;
3295         }
3296         for (i = 0; i != ns; ++i) {
3297                 uint32_t restore;
3298
3299                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3300                                                  &list[i],
3301                                                  dev_config);
3302                 if (!list[i].eth_dev) {
3303                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3304                                 break;
3305                         /* Device is disabled or already spawned. Ignore it. */
3306                         continue;
3307                 }
3308                 restore = list[i].eth_dev->data->dev_flags;
3309                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3310                 /* Restore non-PCI flags cleared by the above call. */
3311                 list[i].eth_dev->data->dev_flags |= restore;
3312                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3313                 rte_eth_dev_probing_finish(list[i].eth_dev);
3314         }
3315         if (i != ns) {
3316                 DRV_LOG(ERR,
3317                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3318                         " encountering an error: %s",
3319                         pci_dev->addr.domain, pci_dev->addr.bus,
3320                         pci_dev->addr.devid, pci_dev->addr.function,
3321                         strerror(rte_errno));
3322                 ret = -rte_errno;
3323                 /* Roll back. */
3324                 while (i--) {
3325                         if (!list[i].eth_dev)
3326                                 continue;
3327                         mlx5_dev_close(list[i].eth_dev);
3328                         /* mac_addrs must not be freed because in dev_private */
3329                         list[i].eth_dev->data->mac_addrs = NULL;
3330                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3331                 }
3332                 /* Restore original error. */
3333                 rte_errno = -ret;
3334         } else {
3335                 ret = 0;
3336         }
3337 exit:
3338         /*
3339          * Do the routine cleanup:
3340          * - close opened Netlink sockets
3341          * - free allocated spawn data array
3342          * - free the Infiniband device list
3343          */
3344         if (nl_rdma >= 0)
3345                 close(nl_rdma);
3346         if (nl_route >= 0)
3347                 close(nl_route);
3348         if (list)
3349                 rte_free(list);
3350         assert(ibv_list);
3351         mlx5_glue->free_device_list(ibv_list);
3352         return ret;
3353 }
3354
3355 /**
3356  * Look for the ethernet device belonging to mlx5 driver.
3357  *
3358  * @param[in] port_id
3359  *   port_id to start looking for device.
3360  * @param[in] pci_dev
3361  *   Pointer to the hint PCI device. When device is being probed
3362  *   the its siblings (master and preceding representors might
3363  *   not have assigned driver yet (because the mlx5_pci_probe()
3364  *   is not completed yet, for this case match on hint PCI
3365  *   device may be used to detect sibling device.
3366  *
3367  * @return
3368  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3369  */
3370 uint16_t
3371 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3372 {
3373         while (port_id < RTE_MAX_ETHPORTS) {
3374                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3375
3376                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3377                     dev->device &&
3378                     (dev->device == &pci_dev->device ||
3379                      (dev->device->driver &&
3380                      dev->device->driver->name &&
3381                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3382                         break;
3383                 port_id++;
3384         }
3385         if (port_id >= RTE_MAX_ETHPORTS)
3386                 return RTE_MAX_ETHPORTS;
3387         return port_id;
3388 }
3389
3390 /**
3391  * DPDK callback to remove a PCI device.
3392  *
3393  * This function removes all Ethernet devices belong to a given PCI device.
3394  *
3395  * @param[in] pci_dev
3396  *   Pointer to the PCI device.
3397  *
3398  * @return
3399  *   0 on success, the function cannot fail.
3400  */
3401 static int
3402 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3403 {
3404         uint16_t port_id;
3405
3406         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3407                 rte_eth_dev_close(port_id);
3408         return 0;
3409 }
3410
3411 static const struct rte_pci_id mlx5_pci_id_map[] = {
3412         {
3413                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3414                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3415         },
3416         {
3417                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3418                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3419         },
3420         {
3421                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3422                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3423         },
3424         {
3425                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3426                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3427         },
3428         {
3429                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3430                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3431         },
3432         {
3433                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3434                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3435         },
3436         {
3437                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3438                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3439         },
3440         {
3441                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3442                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3443         },
3444         {
3445                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3446                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3447         },
3448         {
3449                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3450                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3451         },
3452         {
3453                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3454                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3455         },
3456         {
3457                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3458                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3459         },
3460         {
3461                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3462                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3463         },
3464         {
3465                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3466                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3467         },
3468         {
3469                 .vendor_id = 0
3470         }
3471 };
3472
3473 static struct rte_pci_driver mlx5_driver = {
3474         .driver = {
3475                 .name = MLX5_DRIVER_NAME
3476         },
3477         .id_table = mlx5_pci_id_map,
3478         .probe = mlx5_pci_probe,
3479         .remove = mlx5_pci_remove,
3480         .dma_map = mlx5_dma_map,
3481         .dma_unmap = mlx5_dma_unmap,
3482         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3483                      RTE_PCI_DRV_PROBE_AGAIN,
3484 };
3485
3486 #ifdef RTE_IBVERBS_LINK_DLOPEN
3487
3488 /**
3489  * Suffix RTE_EAL_PMD_PATH with "-glue".
3490  *
3491  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3492  * suffixing its last component.
3493  *
3494  * @param buf[out]
3495  *   Output buffer, should be large enough otherwise NULL is returned.
3496  * @param size
3497  *   Size of @p out.
3498  *
3499  * @return
3500  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3501  */
3502 static char *
3503 mlx5_glue_path(char *buf, size_t size)
3504 {
3505         static const char *const bad[] = { "/", ".", "..", NULL };
3506         const char *path = RTE_EAL_PMD_PATH;
3507         size_t len = strlen(path);
3508         size_t off;
3509         int i;
3510
3511         while (len && path[len - 1] == '/')
3512                 --len;
3513         for (off = len; off && path[off - 1] != '/'; --off)
3514                 ;
3515         for (i = 0; bad[i]; ++i)
3516                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3517                         goto error;
3518         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3519         if (i == -1 || (size_t)i >= size)
3520                 goto error;
3521         return buf;
3522 error:
3523         DRV_LOG(ERR,
3524                 "unable to append \"-glue\" to last component of"
3525                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3526                 " please re-configure DPDK");
3527         return NULL;
3528 }
3529
3530 /**
3531  * Initialization routine for run-time dependency on rdma-core.
3532  */
3533 static int
3534 mlx5_glue_init(void)
3535 {
3536         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3537         const char *path[] = {
3538                 /*
3539                  * A basic security check is necessary before trusting
3540                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3541                  */
3542                 (geteuid() == getuid() && getegid() == getgid() ?
3543                  getenv("MLX5_GLUE_PATH") : NULL),
3544                 /*
3545                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3546                  * variant, otherwise let dlopen() look up libraries on its
3547                  * own.
3548                  */
3549                 (*RTE_EAL_PMD_PATH ?
3550                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3551         };
3552         unsigned int i = 0;
3553         void *handle = NULL;
3554         void **sym;
3555         const char *dlmsg;
3556
3557         while (!handle && i != RTE_DIM(path)) {
3558                 const char *end;
3559                 size_t len;
3560                 int ret;
3561
3562                 if (!path[i]) {
3563                         ++i;
3564                         continue;
3565                 }
3566                 end = strpbrk(path[i], ":;");
3567                 if (!end)
3568                         end = path[i] + strlen(path[i]);
3569                 len = end - path[i];
3570                 ret = 0;
3571                 do {
3572                         char name[ret + 1];
3573
3574                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3575                                        (int)len, path[i],
3576                                        (!len || *(end - 1) == '/') ? "" : "/");
3577                         if (ret == -1)
3578                                 break;
3579                         if (sizeof(name) != (size_t)ret + 1)
3580                                 continue;
3581                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3582                                 name);
3583                         handle = dlopen(name, RTLD_LAZY);
3584                         break;
3585                 } while (1);
3586                 path[i] = end + 1;
3587                 if (!*end)
3588                         ++i;
3589         }
3590         if (!handle) {
3591                 rte_errno = EINVAL;
3592                 dlmsg = dlerror();
3593                 if (dlmsg)
3594                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3595                 goto glue_error;
3596         }
3597         sym = dlsym(handle, "mlx5_glue");
3598         if (!sym || !*sym) {
3599                 rte_errno = EINVAL;
3600                 dlmsg = dlerror();
3601                 if (dlmsg)
3602                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3603                 goto glue_error;
3604         }
3605         mlx5_glue = *sym;
3606         return 0;
3607 glue_error:
3608         if (handle)
3609                 dlclose(handle);
3610         DRV_LOG(WARNING,
3611                 "cannot initialize PMD due to missing run-time dependency on"
3612                 " rdma-core libraries (libibverbs, libmlx5)");
3613         return -rte_errno;
3614 }
3615
3616 #endif
3617
3618 /**
3619  * Driver initialization routine.
3620  */
3621 RTE_INIT(rte_mlx5_pmd_init)
3622 {
3623         /* Initialize driver log type. */
3624         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3625         if (mlx5_logtype >= 0)
3626                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3627
3628         /* Build the static tables for Verbs conversion. */
3629         mlx5_set_ptype_table();
3630         mlx5_set_cksum_table();
3631         mlx5_set_swp_types_table();
3632         /*
3633          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3634          * huge pages. Calling ibv_fork_init() during init allows
3635          * applications to use fork() safely for purposes other than
3636          * using this PMD, which is not supported in forked processes.
3637          */
3638         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3639         /* Match the size of Rx completion entry to the size of a cacheline. */
3640         if (RTE_CACHE_LINE_SIZE == 128)
3641                 setenv("MLX5_CQE_SIZE", "128", 0);
3642         /*
3643          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3644          * cleanup all the Verbs resources even when the device was removed.
3645          */
3646         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3647 #ifdef RTE_IBVERBS_LINK_DLOPEN
3648         if (mlx5_glue_init())
3649                 return;
3650         assert(mlx5_glue);
3651 #endif
3652 #ifndef NDEBUG
3653         /* Glue structure must not contain any NULL pointers. */
3654         {
3655                 unsigned int i;
3656
3657                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3658                         assert(((const void *const *)mlx5_glue)[i]);
3659         }
3660 #endif
3661         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3662                 DRV_LOG(ERR,
3663                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3664                         mlx5_glue->version, MLX5_GLUE_VERSION);
3665                 return;
3666         }
3667         mlx5_glue->fork_init();
3668         rte_pci_register(&mlx5_driver);
3669 }
3670
3671 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3672 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3673 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");