drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV flow steering. */
 105 #define MLX5_DV_FLOW_EN "dv_flow_en"
 106
 107 /* Activate Netlink support in VF mode. */
 108 #define MLX5_VF_NL_EN "vf_nl_en"
 109
 110 /* Enable extending memsegs when creating a MR. */
 111 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 112
 113 /* Select port representors to instantiate. */
 114 #define MLX5_REPRESENTOR "representor"
 115
 116 #ifndef HAVE_IBV_MLX5_MOD_MPW
 117 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 118 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 119 #endif
 120
 121 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 122 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 123 #endif
 124
 125 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 126
 127 /* Shared memory between primary and secondary processes. */
 128 struct mlx5_shared_data *mlx5_shared_data;
 129
 130 /* Spinlock for mlx5_shared_data allocation. */
 131 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 132
 133 /* Process local data for secondary processes. */
 134 static struct mlx5_local_data mlx5_local_data;
 135
 136 /** Driver-specific log messages type. */
 137 int mlx5_logtype;
 138
 139 /** Data associated with devices to spawn. */
 140 struct mlx5_dev_spawn_data {
 141         uint32_t ifindex; /**< Network interface index. */
 142         uint32_t max_port; /**< IB device maximal port index. */
 143         uint32_t ibv_port; /**< IB device physical port index. */
 144         struct mlx5_switch_info info; /**< Switch information. */
 145         struct ibv_device *ibv_dev; /**< Associated IB device. */
 146         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 147 };
 148
 149 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 150 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 151
 152 /**
 153  * Allocate shared IB device context. If there is multiport device the
 154  * master and representors will share this context, if there is single
 155  * port dedicated IB device, the context will be used by only given
 156  * port due to unification.
 157  *
 158  * Routine first searches the context for the specified IB device name,
 159  * if found the shared context assumed and reference counter is incremented.
 160  * If no context found the new one is created and initialized with specified
 161  * IB device context and parameters.
 162  *
 163  * @param[in] spawn
 164  *   Pointer to the IB device attributes (name, port, etc).
 165  *
 166  * @return
 167  *   Pointer to mlx5_ibv_shared object on success,
 168  *   otherwise NULL and rte_errno is set.
 169  */
 170 static struct mlx5_ibv_shared *
 171 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 172 {
 173         struct mlx5_ibv_shared *sh;
 174         int err = 0;
 175         uint32_t i;
 176
 177         assert(spawn);
 178         /* Secondary process should not create the shared context. */
 179         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 180         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 181         /* Search for IB context by device name. */
 182         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 183                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 184                         sh->refcnt++;
 185                         goto exit;
 186                 }
 187         }
 188         /* No device found, we have to create new shared context. */
 189         assert(spawn->max_port);
 190         sh = rte_zmalloc("ethdev shared ib context",
 191                          sizeof(struct mlx5_ibv_shared) +
 192                          spawn->max_port *
 193                          sizeof(struct mlx5_ibv_shared_port),
 194                          RTE_CACHE_LINE_SIZE);
 195         if (!sh) {
 196                 DRV_LOG(ERR, "shared context allocation failure");
 197                 rte_errno  = ENOMEM;
 198                 goto exit;
 199         }
 200         /* Try to open IB device with DV first, then usual Verbs. */
 201         errno = 0;
 202         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 203         if (sh->ctx) {
 204                 sh->devx = 1;
 205                 DRV_LOG(DEBUG, "DevX is supported");
 206         } else {
 207                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 208                 if (!sh->ctx) {
 209                         err = errno ? errno : ENODEV;
 210                         goto error;
 211                 }
 212                 DRV_LOG(DEBUG, "DevX is NOT supported");
 213         }
 214         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 215         if (err) {
 216                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 217                 goto error;
 218         }
 219         sh->refcnt = 1;
 220         sh->max_port = spawn->max_port;
 221         strncpy(sh->ibdev_name, sh->ctx->device->name,
 222                 sizeof(sh->ibdev_name));
 223         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 224                 sizeof(sh->ibdev_path));
 225         pthread_mutex_init(&sh->intr_mutex, NULL);
 226         /*
 227          * Setting port_id to max unallowed value means
 228          * there is no interrupt subhandler installed for
 229          * the given port index i.
 230          */
 231         for (i = 0; i < sh->max_port; i++)
 232                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 233         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 234         if (sh->pd == NULL) {
 235                 DRV_LOG(ERR, "PD allocation failure");
 236                 err = ENOMEM;
 237                 goto error;
 238         }
 239         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 240 exit:
 241         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 242         return sh;
 243 error:
 244         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 245         assert(sh);
 246         if (sh->pd)
 247                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 248         if (sh->ctx)
 249                 claim_zero(mlx5_glue->close_device(sh->ctx));
 250         rte_free(sh);
 251         assert(err > 0);
 252         rte_errno = err;
 253         return NULL;
 254 }
 255
 256 /**
 257  * Free shared IB device context. Decrement counter and if zero free
 258  * all allocated resources and close handles.
 259  *
 260  * @param[in] sh
 261  *   Pointer to mlx5_ibv_shared object to free
 262  */
 263 static void
 264 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 265 {
 266         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 267 #ifndef NDEBUG
 268         /* Check the object presence in the list. */
 269         struct mlx5_ibv_shared *lctx;
 270
 271         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 272                 if (lctx == sh)
 273                         break;
 274         assert(lctx);
 275         if (lctx != sh) {
 276                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 277                 goto exit;
 278         }
 279 #endif
 280         assert(sh);
 281         assert(sh->refcnt);
 282         /* Secondary process should not free the shared context. */
 283         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 284         if (--sh->refcnt)
 285                 goto exit;
 286         LIST_REMOVE(sh, next);
 287         /*
 288          *  Ensure there is no async event handler installed.
 289          *  Only primary process handles async device events.
 290          **/
 291         assert(!sh->intr_cnt);
 292         if (sh->intr_cnt)
 293                 rte_intr_callback_unregister
 294                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 295         pthread_mutex_destroy(&sh->intr_mutex);
 296         if (sh->pd)
 297                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 298         if (sh->ctx)
 299                 claim_zero(mlx5_glue->close_device(sh->ctx));
 300         rte_free(sh);
 301 exit:
 302         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 303 }
 304
 305 /**
 306  * Initialize DR related data within private structure.
 307  * Routine checks the reference counter and does actual
 308  * resources creation/initialization only if counter is zero.
 309  *
 310  * @param[in] priv
 311  *   Pointer to the private device data structure.
 312  *
 313  * @return
 314  *   Zero on success, positive error code otherwise.
 315  */
 316 static int
 317 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 318 {
 319 #ifdef HAVE_MLX5DV_DR
 320         struct mlx5_ibv_shared *sh = priv->sh;
 321         int err = 0;
 322         void *ns;
 323
 324         assert(sh);
 325         if (sh->dv_refcnt) {
 326                 /* Shared DV/DR structures is already initialized. */
 327                 sh->dv_refcnt++;
 328                 priv->dr_shared = 1;
 329                 return 0;
 330         }
 331         /* Reference counter is zero, we should initialize structures. */
 332         ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_INGRESS_BYPASS);
 333         if (!ns) {
 334                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_ns failed");
 335                 err = errno;
 336                 goto error;
 337         }
 338         sh->rx_ns = ns;
 339         ns = mlx5dv_dr_create_ns(sh->ctx, MLX5DV_DR_NS_DOMAIN_EGRESS_BYPASS);
 340         if (!ns) {
 341                 DRV_LOG(ERR, "egress mlx5dv_dr_create_ns failed");
 342                 err = errno;
 343                 goto error;
 344         }
 345         pthread_mutex_init(&sh->dv_mutex, NULL);
 346         sh->tx_ns = ns;
 347         sh->dv_refcnt++;
 348         priv->dr_shared = 1;
 349         return 0;
 350
 351 error:
 352        /* Rollback the created objects. */
 353         if (sh->rx_ns) {
 354                 mlx5dv_dr_destroy_ns(sh->rx_ns);
 355                 sh->rx_ns = NULL;
 356         }
 357         if (sh->tx_ns) {
 358                 mlx5dv_dr_destroy_ns(sh->tx_ns);
 359                 sh->tx_ns = NULL;
 360         }
 361         return err;
 362 #else
 363         (void)priv;
 364         return 0;
 365 #endif
 366 }
 367
 368 /**
 369  * Destroy DR related data within private structure.
 370  *
 371  * @param[in] priv
 372  *   Pointer to the private device data structure.
 373  */
 374 static void
 375 mlx5_free_shared_dr(struct mlx5_priv *priv)
 376 {
 377 #ifdef HAVE_MLX5DV_DR
 378         struct mlx5_ibv_shared *sh;
 379
 380         if (!priv->dr_shared)
 381                 return;
 382         priv->dr_shared = 0;
 383         sh = priv->sh;
 384         assert(sh);
 385         assert(sh->dv_refcnt);
 386         if (sh->dv_refcnt && --sh->dv_refcnt)
 387                 return;
 388         if (sh->rx_ns) {
 389                 mlx5dv_dr_destroy_ns(sh->rx_ns);
 390                 sh->rx_ns = NULL;
 391         }
 392         if (sh->tx_ns) {
 393                 mlx5dv_dr_destroy_ns(sh->tx_ns);
 394                 sh->tx_ns = NULL;
 395         }
 396         pthread_mutex_destroy(&sh->dv_mutex);
 397 #else
 398         (void)priv;
 399 #endif
 400 }
 401
 402 /**
 403  * Initialize shared data between primary and secondary process.
 404  *
 405  * A memzone is reserved by primary process and secondary processes attach to
 406  * the memzone.
 407  *
 408  * @return
 409  *   0 on success, a negative errno value otherwise and rte_errno is set.
 410  */
 411 static int
 412 mlx5_init_shared_data(void)
 413 {
 414         const struct rte_memzone *mz;
 415         int ret = 0;
 416
 417         rte_spinlock_lock(&mlx5_shared_data_lock);
 418         if (mlx5_shared_data == NULL) {
 419                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 420                         /* Allocate shared memory. */
 421                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 422                                                  sizeof(*mlx5_shared_data),
 423                                                  SOCKET_ID_ANY, 0);
 424                         if (mz == NULL) {
 425                                 DRV_LOG(ERR,
 426                                         "Cannot allocate mlx5 shared data\n");
 427                                 ret = -rte_errno;
 428                                 goto error;
 429                         }
 430                         mlx5_shared_data = mz->addr;
 431                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 432                         rte_spinlock_init(&mlx5_shared_data->lock);
 433                 } else {
 434                         /* Lookup allocated shared memory. */
 435                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 436                         if (mz == NULL) {
 437                                 DRV_LOG(ERR,
 438                                         "Cannot attach mlx5 shared data\n");
 439                                 ret = -rte_errno;
 440                                 goto error;
 441                         }
 442                         mlx5_shared_data = mz->addr;
 443                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 444                 }
 445         }
 446 error:
 447         rte_spinlock_unlock(&mlx5_shared_data_lock);
 448         return ret;
 449 }
 450
 451 /**
 452  * Uninitialize shared data between primary and secondary process.
 453  *
 454  * The pointer of secondary process is dereferenced and primary process frees
 455  * the memzone.
 456  */
 457 static void
 458 mlx5_uninit_shared_data(void)
 459 {
 460         const struct rte_memzone *mz;
 461
 462         rte_spinlock_lock(&mlx5_shared_data_lock);
 463         if (mlx5_shared_data) {
 464                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 465                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 466                         rte_memzone_free(mz);
 467                 } else {
 468                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 469                 }
 470                 mlx5_shared_data = NULL;
 471         }
 472         rte_spinlock_unlock(&mlx5_shared_data_lock);
 473 }
 474
 475 /**
 476  * Retrieve integer value from environment variable.
 477  *
 478  * @param[in] name
 479  *   Environment variable name.
 480  *
 481  * @return
 482  *   Integer value, 0 if the variable is not set.
 483  */
 484 int
 485 mlx5_getenv_int(const char *name)
 486 {
 487         const char *val = getenv(name);
 488
 489         if (val == NULL)
 490                 return 0;
 491         return atoi(val);
 492 }
 493
 494 /**
 495  * Verbs callback to allocate a memory. This function should allocate the space
 496  * according to the size provided residing inside a huge page.
 497  * Please note that all allocation must respect the alignment from libmlx5
 498  * (i.e. currently sysconf(_SC_PAGESIZE)).
 499  *
 500  * @param[in] size
 501  *   The size in bytes of the memory to allocate.
 502  * @param[in] data
 503  *   A pointer to the callback data.
 504  *
 505  * @return
 506  *   Allocated buffer, NULL otherwise and rte_errno is set.
 507  */
 508 static void *
 509 mlx5_alloc_verbs_buf(size_t size, void *data)
 510 {
 511         struct mlx5_priv *priv = data;
 512         void *ret;
 513         size_t alignment = sysconf(_SC_PAGESIZE);
 514         unsigned int socket = SOCKET_ID_ANY;
 515
 516         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 517                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 518
 519                 socket = ctrl->socket;
 520         } else if (priv->verbs_alloc_ctx.type ==
 521                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 522                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 523
 524                 socket = ctrl->socket;
 525         }
 526         assert(data != NULL);
 527         ret = rte_malloc_socket(__func__, size, alignment, socket);
 528         if (!ret && size)
 529                 rte_errno = ENOMEM;
 530         return ret;
 531 }
 532
 533 /**
 534  * Verbs callback to free a memory.
 535  *
 536  * @param[in] ptr
 537  *   A pointer to the memory to free.
 538  * @param[in] data
 539  *   A pointer to the callback data.
 540  */
 541 static void
 542 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 543 {
 544         assert(data != NULL);
 545         rte_free(ptr);
 546 }
 547
 548 /**
 549  * DPDK callback to close the device.
 550  *
 551  * Destroy all queues and objects, free memory.
 552  *
 553  * @param dev
 554  *   Pointer to Ethernet device structure.
 555  */
 556 static void
 557 mlx5_dev_close(struct rte_eth_dev *dev)
 558 {
 559         struct mlx5_priv *priv = dev->data->dev_private;
 560         unsigned int i;
 561         int ret;
 562
 563         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 564                 dev->data->port_id,
 565                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 566         /* In case mlx5_dev_stop() has not been called. */
 567         mlx5_dev_interrupt_handler_uninstall(dev);
 568         mlx5_traffic_disable(dev);
 569         mlx5_flow_flush(dev, NULL);
 570         /* Prevent crashes when queues are still in use. */
 571         dev->rx_pkt_burst = removed_rx_burst;
 572         dev->tx_pkt_burst = removed_tx_burst;
 573         rte_wmb();
 574         /* Disable datapath on secondary process. */
 575         mlx5_mp_req_stop_rxtx(dev);
 576         if (priv->rxqs != NULL) {
 577                 /* XXX race condition if mlx5_rx_burst() is still running. */
 578                 usleep(1000);
 579                 for (i = 0; (i != priv->rxqs_n); ++i)
 580                         mlx5_rxq_release(dev, i);
 581                 priv->rxqs_n = 0;
 582                 priv->rxqs = NULL;
 583         }
 584         if (priv->txqs != NULL) {
 585                 /* XXX race condition if mlx5_tx_burst() is still running. */
 586                 usleep(1000);
 587                 for (i = 0; (i != priv->txqs_n); ++i)
 588                         mlx5_txq_release(dev, i);
 589                 priv->txqs_n = 0;
 590                 priv->txqs = NULL;
 591         }
 592         mlx5_mprq_free_mp(dev);
 593         mlx5_mr_release(dev);
 594         assert(priv->sh);
 595         mlx5_free_shared_dr(priv);
 596         if (priv->sh)
 597                 mlx5_free_shared_ibctx(priv->sh);
 598         priv->sh = NULL;
 599         if (priv->rss_conf.rss_key != NULL)
 600                 rte_free(priv->rss_conf.rss_key);
 601         if (priv->reta_idx != NULL)
 602                 rte_free(priv->reta_idx);
 603         if (priv->config.vf)
 604                 mlx5_nl_mac_addr_flush(dev);
 605         if (priv->nl_socket_route >= 0)
 606                 close(priv->nl_socket_route);
 607         if (priv->nl_socket_rdma >= 0)
 608                 close(priv->nl_socket_rdma);
 609         if (priv->tcf_context)
 610                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 611         ret = mlx5_hrxq_ibv_verify(dev);
 612         if (ret)
 613                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 614                         dev->data->port_id);
 615         ret = mlx5_ind_table_ibv_verify(dev);
 616         if (ret)
 617                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 618                         dev->data->port_id);
 619         ret = mlx5_rxq_ibv_verify(dev);
 620         if (ret)
 621                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 622                         dev->data->port_id);
 623         ret = mlx5_rxq_verify(dev);
 624         if (ret)
 625                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 626                         dev->data->port_id);
 627         ret = mlx5_txq_ibv_verify(dev);
 628         if (ret)
 629                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 630                         dev->data->port_id);
 631         ret = mlx5_txq_verify(dev);
 632         if (ret)
 633                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 634                         dev->data->port_id);
 635         ret = mlx5_flow_verify(dev);
 636         if (ret)
 637                 DRV_LOG(WARNING, "port %u some flows still remain",
 638                         dev->data->port_id);
 639         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 640                 unsigned int c = 0;
 641                 uint16_t port_id;
 642
 643                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 644                         struct mlx5_priv *opriv =
 645                                 rte_eth_devices[port_id].data->dev_private;
 646
 647                         if (!opriv ||
 648                             opriv->domain_id != priv->domain_id ||
 649                             &rte_eth_devices[port_id] == dev)
 650                                 continue;
 651                         ++c;
 652                 }
 653                 if (!c)
 654                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 655         }
 656         memset(priv, 0, sizeof(*priv));
 657         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 658         /*
 659          * Reset mac_addrs to NULL such that it is not freed as part of
 660          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 661          * it is freed when dev_private is freed.
 662          */
 663         dev->data->mac_addrs = NULL;
 664 }
 665
 666 const struct eth_dev_ops mlx5_dev_ops = {
 667         .dev_configure = mlx5_dev_configure,
 668         .dev_start = mlx5_dev_start,
 669         .dev_stop = mlx5_dev_stop,
 670         .dev_set_link_down = mlx5_set_link_down,
 671         .dev_set_link_up = mlx5_set_link_up,
 672         .dev_close = mlx5_dev_close,
 673         .promiscuous_enable = mlx5_promiscuous_enable,
 674         .promiscuous_disable = mlx5_promiscuous_disable,
 675         .allmulticast_enable = mlx5_allmulticast_enable,
 676         .allmulticast_disable = mlx5_allmulticast_disable,
 677         .link_update = mlx5_link_update,
 678         .stats_get = mlx5_stats_get,
 679         .stats_reset = mlx5_stats_reset,
 680         .xstats_get = mlx5_xstats_get,
 681         .xstats_reset = mlx5_xstats_reset,
 682         .xstats_get_names = mlx5_xstats_get_names,
 683         .fw_version_get = mlx5_fw_version_get,
 684         .dev_infos_get = mlx5_dev_infos_get,
 685         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 686         .vlan_filter_set = mlx5_vlan_filter_set,
 687         .rx_queue_setup = mlx5_rx_queue_setup,
 688         .tx_queue_setup = mlx5_tx_queue_setup,
 689         .rx_queue_release = mlx5_rx_queue_release,
 690         .tx_queue_release = mlx5_tx_queue_release,
 691         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 692         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 693         .mac_addr_remove = mlx5_mac_addr_remove,
 694         .mac_addr_add = mlx5_mac_addr_add,
 695         .mac_addr_set = mlx5_mac_addr_set,
 696         .set_mc_addr_list = mlx5_set_mc_addr_list,
 697         .mtu_set = mlx5_dev_set_mtu,
 698         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 699         .vlan_offload_set = mlx5_vlan_offload_set,
 700         .reta_update = mlx5_dev_rss_reta_update,
 701         .reta_query = mlx5_dev_rss_reta_query,
 702         .rss_hash_update = mlx5_rss_hash_update,
 703         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 704         .filter_ctrl = mlx5_dev_filter_ctrl,
 705         .rx_descriptor_status = mlx5_rx_descriptor_status,
 706         .tx_descriptor_status = mlx5_tx_descriptor_status,
 707         .rx_queue_count = mlx5_rx_queue_count,
 708         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 709         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 710         .is_removed = mlx5_is_removed,
 711 };
 712
 713 /* Available operations from secondary process. */
 714 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 715         .stats_get = mlx5_stats_get,
 716         .stats_reset = mlx5_stats_reset,
 717         .xstats_get = mlx5_xstats_get,
 718         .xstats_reset = mlx5_xstats_reset,
 719         .xstats_get_names = mlx5_xstats_get_names,
 720         .fw_version_get = mlx5_fw_version_get,
 721         .dev_infos_get = mlx5_dev_infos_get,
 722         .rx_descriptor_status = mlx5_rx_descriptor_status,
 723         .tx_descriptor_status = mlx5_tx_descriptor_status,
 724 };
 725
 726 /* Available operations in flow isolated mode. */
 727 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 728         .dev_configure = mlx5_dev_configure,
 729         .dev_start = mlx5_dev_start,
 730         .dev_stop = mlx5_dev_stop,
 731         .dev_set_link_down = mlx5_set_link_down,
 732         .dev_set_link_up = mlx5_set_link_up,
 733         .dev_close = mlx5_dev_close,
 734         .promiscuous_enable = mlx5_promiscuous_enable,
 735         .promiscuous_disable = mlx5_promiscuous_disable,
 736         .allmulticast_enable = mlx5_allmulticast_enable,
 737         .allmulticast_disable = mlx5_allmulticast_disable,
 738         .link_update = mlx5_link_update,
 739         .stats_get = mlx5_stats_get,
 740         .stats_reset = mlx5_stats_reset,
 741         .xstats_get = mlx5_xstats_get,
 742         .xstats_reset = mlx5_xstats_reset,
 743         .xstats_get_names = mlx5_xstats_get_names,
 744         .fw_version_get = mlx5_fw_version_get,
 745         .dev_infos_get = mlx5_dev_infos_get,
 746         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 747         .vlan_filter_set = mlx5_vlan_filter_set,
 748         .rx_queue_setup = mlx5_rx_queue_setup,
 749         .tx_queue_setup = mlx5_tx_queue_setup,
 750         .rx_queue_release = mlx5_rx_queue_release,
 751         .tx_queue_release = mlx5_tx_queue_release,
 752         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 753         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 754         .mac_addr_remove = mlx5_mac_addr_remove,
 755         .mac_addr_add = mlx5_mac_addr_add,
 756         .mac_addr_set = mlx5_mac_addr_set,
 757         .set_mc_addr_list = mlx5_set_mc_addr_list,
 758         .mtu_set = mlx5_dev_set_mtu,
 759         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 760         .vlan_offload_set = mlx5_vlan_offload_set,
 761         .filter_ctrl = mlx5_dev_filter_ctrl,
 762         .rx_descriptor_status = mlx5_rx_descriptor_status,
 763         .tx_descriptor_status = mlx5_tx_descriptor_status,
 764         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 765         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 766         .is_removed = mlx5_is_removed,
 767 };
 768
 769 /**
 770  * Verify and store value for device argument.
 771  *
 772  * @param[in] key
 773  *   Key argument to verify.
 774  * @param[in] val
 775  *   Value associated with key.
 776  * @param opaque
 777  *   User data.
 778  *
 779  * @return
 780  *   0 on success, a negative errno value otherwise and rte_errno is set.
 781  */
 782 static int
 783 mlx5_args_check(const char *key, const char *val, void *opaque)
 784 {
 785         struct mlx5_dev_config *config = opaque;
 786         unsigned long tmp;
 787
 788         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 789         if (!strcmp(MLX5_REPRESENTOR, key))
 790                 return 0;
 791         errno = 0;
 792         tmp = strtoul(val, NULL, 0);
 793         if (errno) {
 794                 rte_errno = errno;
 795                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 796                 return -rte_errno;
 797         }
 798         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 799                 config->cqe_comp = !!tmp;
 800         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 801                 config->cqe_pad = !!tmp;
 802         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 803                 config->hw_padding = !!tmp;
 804         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 805                 config->mprq.enabled = !!tmp;
 806         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 807                 config->mprq.stride_num_n = tmp;
 808         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 809                 config->mprq.max_memcpy_len = tmp;
 810         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 811                 config->mprq.min_rxqs_num = tmp;
 812         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 813                 config->txq_inline = tmp;
 814         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 815                 config->txqs_inline = tmp;
 816         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 817                 config->txqs_vec = tmp;
 818         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 819                 config->mps = !!tmp;
 820         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 821                 config->mpw_hdr_dseg = !!tmp;
 822         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 823                 config->inline_max_packet_sz = tmp;
 824         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 825                 config->tx_vec_en = !!tmp;
 826         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 827                 config->rx_vec_en = !!tmp;
 828         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 829                 config->l3_vxlan_en = !!tmp;
 830         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 831                 config->vf_nl_en = !!tmp;
 832         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 833                 config->dv_flow_en = !!tmp;
 834         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
 835                 config->mr_ext_memseg_en = !!tmp;
 836         } else {
 837                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 838                 rte_errno = EINVAL;
 839                 return -rte_errno;
 840         }
 841         return 0;
 842 }
 843
 844 /**
 845  * Parse device parameters.
 846  *
 847  * @param config
 848  *   Pointer to device configuration structure.
 849  * @param devargs
 850  *   Device arguments structure.
 851  *
 852  * @return
 853  *   0 on success, a negative errno value otherwise and rte_errno is set.
 854  */
 855 static int
 856 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 857 {
 858         const char **params = (const char *[]){
 859                 MLX5_RXQ_CQE_COMP_EN,
 860                 MLX5_RXQ_CQE_PAD_EN,
 861                 MLX5_RXQ_PKT_PAD_EN,
 862                 MLX5_RX_MPRQ_EN,
 863                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 864                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 865                 MLX5_RXQS_MIN_MPRQ,
 866                 MLX5_TXQ_INLINE,
 867                 MLX5_TXQS_MIN_INLINE,
 868                 MLX5_TXQS_MAX_VEC,
 869                 MLX5_TXQ_MPW_EN,
 870                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 871                 MLX5_TXQ_MAX_INLINE_LEN,
 872                 MLX5_TX_VEC_EN,
 873                 MLX5_RX_VEC_EN,
 874                 MLX5_L3_VXLAN_EN,
 875                 MLX5_VF_NL_EN,
 876                 MLX5_DV_FLOW_EN,
 877                 MLX5_MR_EXT_MEMSEG_EN,
 878                 MLX5_REPRESENTOR,
 879                 NULL,
 880         };
 881         struct rte_kvargs *kvlist;
 882         int ret = 0;
 883         int i;
 884
 885         if (devargs == NULL)
 886                 return 0;
 887         /* Following UGLY cast is done to pass checkpatch. */
 888         kvlist = rte_kvargs_parse(devargs->args, params);
 889         if (kvlist == NULL)
 890                 return 0;
 891         /* Process parameters. */
 892         for (i = 0; (params[i] != NULL); ++i) {
 893                 if (rte_kvargs_count(kvlist, params[i])) {
 894                         ret = rte_kvargs_process(kvlist, params[i],
 895                                                  mlx5_args_check, config);
 896                         if (ret) {
 897                                 rte_errno = EINVAL;
 898                                 rte_kvargs_free(kvlist);
 899                                 return -rte_errno;
 900                         }
 901                 }
 902         }
 903         rte_kvargs_free(kvlist);
 904         return 0;
 905 }
 906
 907 static struct rte_pci_driver mlx5_driver;
 908
 909 static int
 910 find_lower_va_bound(const struct rte_memseg_list *msl,
 911                 const struct rte_memseg *ms, void *arg)
 912 {
 913         void **addr = arg;
 914
 915         if (msl->external)
 916                 return 0;
 917         if (*addr == NULL)
 918                 *addr = ms->addr;
 919         else
 920                 *addr = RTE_MIN(*addr, ms->addr);
 921
 922         return 0;
 923 }
 924
 925 /**
 926  * Reserve UAR address space for primary process.
 927  *
 928  * Process local resource is used by both primary and secondary to avoid
 929  * duplicate reservation. The space has to be available on both primary and
 930  * secondary process, TXQ UAR maps to this area using fixed mmap w/o double
 931  * check.
 932  *
 933  * @return
 934  *   0 on success, a negative errno value otherwise and rte_errno is set.
 935  */
 936 static int
 937 mlx5_uar_init_primary(void)
 938 {
 939         struct mlx5_shared_data *sd = mlx5_shared_data;
 940         void *addr = (void *)0;
 941
 942         if (sd->uar_base)
 943                 return 0;
 944         /* find out lower bound of hugepage segments */
 945         rte_memseg_walk(find_lower_va_bound, &addr);
 946         /* keep distance to hugepages to minimize potential conflicts. */
 947         addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
 948         /* anonymous mmap, no real memory consumption. */
 949         addr = mmap(addr, MLX5_UAR_SIZE,
 950                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 951         if (addr == MAP_FAILED) {
 952                 DRV_LOG(ERR,
 953                         "Failed to reserve UAR address space, please"
 954                         " adjust MLX5_UAR_SIZE or try --base-virtaddr");
 955                 rte_errno = ENOMEM;
 956                 return -rte_errno;
 957         }
 958         /* Accept either same addr or a new addr returned from mmap if target
 959          * range occupied.
 960          */
 961         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
 962         sd->uar_base = addr; /* for primary and secondary UAR re-mmap. */
 963         return 0;
 964 }
 965
 966 /**
 967  * Unmap UAR address space reserved for primary process.
 968  */
 969 static void
 970 mlx5_uar_uninit_primary(void)
 971 {
 972         struct mlx5_shared_data *sd = mlx5_shared_data;
 973
 974         if (!sd->uar_base)
 975                 return;
 976         munmap(sd->uar_base, MLX5_UAR_SIZE);
 977         sd->uar_base = NULL;
 978 }
 979
 980 /**
 981  * Reserve UAR address space for secondary process, align with primary process.
 982  *
 983  * @return
 984  *   0 on success, a negative errno value otherwise and rte_errno is set.
 985  */
 986 static int
 987 mlx5_uar_init_secondary(void)
 988 {
 989         struct mlx5_shared_data *sd = mlx5_shared_data;
 990         struct mlx5_local_data *ld = &mlx5_local_data;
 991         void *addr;
 992
 993         if (ld->uar_base) { /* Already reserved. */
 994                 assert(sd->uar_base == ld->uar_base);
 995                 return 0;
 996         }
 997         assert(sd->uar_base);
 998         /* anonymous mmap, no real memory consumption. */
 999         addr = mmap(sd->uar_base, MLX5_UAR_SIZE,
1000                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
1001         if (addr == MAP_FAILED) {
1002                 DRV_LOG(ERR, "UAR mmap failed: %p size: %llu",
1003                         sd->uar_base, MLX5_UAR_SIZE);
1004                 rte_errno = ENXIO;
1005                 return -rte_errno;
1006         }
1007         if (sd->uar_base != addr) {
1008                 DRV_LOG(ERR,
1009                         "UAR address %p size %llu occupied, please"
1010                         " adjust MLX5_UAR_OFFSET or try EAL parameter"
1011                         " --base-virtaddr",
1012                         sd->uar_base, MLX5_UAR_SIZE);
1013                 rte_errno = ENXIO;
1014                 return -rte_errno;
1015         }
1016         ld->uar_base = addr;
1017         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
1018         return 0;
1019 }
1020
1021 /**
1022  * Unmap UAR address space reserved for secondary process.
1023  */
1024 static void
1025 mlx5_uar_uninit_secondary(void)
1026 {
1027         struct mlx5_local_data *ld = &mlx5_local_data;
1028
1029         if (!ld->uar_base)
1030                 return;
1031         munmap(ld->uar_base, MLX5_UAR_SIZE);
1032         ld->uar_base = NULL;
1033 }
1034
1035 /**
1036  * PMD global initialization.
1037  *
1038  * Independent from individual device, this function initializes global
1039  * per-PMD data structures distinguishing primary and secondary processes.
1040  * Hence, each initialization is called once per a process.
1041  *
1042  * @return
1043  *   0 on success, a negative errno value otherwise and rte_errno is set.
1044  */
1045 static int
1046 mlx5_init_once(void)
1047 {
1048         struct mlx5_shared_data *sd;
1049         struct mlx5_local_data *ld = &mlx5_local_data;
1050         int ret;
1051
1052         if (mlx5_init_shared_data())
1053                 return -rte_errno;
1054         sd = mlx5_shared_data;
1055         assert(sd);
1056         rte_spinlock_lock(&sd->lock);
1057         switch (rte_eal_process_type()) {
1058         case RTE_PROC_PRIMARY:
1059                 if (sd->init_done)
1060                         break;
1061                 LIST_INIT(&sd->mem_event_cb_list);
1062                 rte_rwlock_init(&sd->mem_event_rwlock);
1063                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1064                                                 mlx5_mr_mem_event_cb, NULL);
1065                 mlx5_mp_init_primary();
1066                 ret = mlx5_uar_init_primary();
1067                 if (ret)
1068                         goto error;
1069                 sd->init_done = true;
1070                 break;
1071         case RTE_PROC_SECONDARY:
1072                 if (ld->init_done)
1073                         break;
1074                 mlx5_mp_init_secondary();
1075                 ret = mlx5_uar_init_secondary();
1076                 if (ret)
1077                         goto error;
1078                 ++sd->secondary_cnt;
1079                 ld->init_done = true;
1080                 break;
1081         default:
1082                 break;
1083         }
1084         rte_spinlock_unlock(&sd->lock);
1085         return 0;
1086 error:
1087         switch (rte_eal_process_type()) {
1088         case RTE_PROC_PRIMARY:
1089                 mlx5_uar_uninit_primary();
1090                 mlx5_mp_uninit_primary();
1091                 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB", NULL);
1092                 break;
1093         case RTE_PROC_SECONDARY:
1094                 mlx5_uar_uninit_secondary();
1095                 mlx5_mp_uninit_secondary();
1096                 break;
1097         default:
1098                 break;
1099         }
1100         rte_spinlock_unlock(&sd->lock);
1101         mlx5_uninit_shared_data();
1102         return -rte_errno;
1103 }
1104
1105 /**
1106  * Spawn an Ethernet device from Verbs information.
1107  *
1108  * @param dpdk_dev
1109  *   Backing DPDK device.
1110  * @param spawn
1111  *   Verbs device parameters (name, port, switch_info) to spawn.
1112  * @param config
1113  *   Device configuration parameters.
1114  *
1115  * @return
1116  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1117  *   is set. The following errors are defined:
1118  *
1119  *   EBUSY: device is not supposed to be spawned.
1120  *   EEXIST: device is already spawned
1121  */
1122 static struct rte_eth_dev *
1123 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1124                struct mlx5_dev_spawn_data *spawn,
1125                struct mlx5_dev_config config)
1126 {
1127         const struct mlx5_switch_info *switch_info = &spawn->info;
1128         struct mlx5_ibv_shared *sh = NULL;
1129         struct ibv_port_attr port_attr;
1130         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1131         struct rte_eth_dev *eth_dev = NULL;
1132         struct mlx5_priv *priv = NULL;
1133         int err = 0;
1134         unsigned int hw_padding = 0;
1135         unsigned int mps;
1136         unsigned int cqe_comp;
1137         unsigned int cqe_pad = 0;
1138         unsigned int tunnel_en = 0;
1139         unsigned int mpls_en = 0;
1140         unsigned int swp = 0;
1141         unsigned int mprq = 0;
1142         unsigned int mprq_min_stride_size_n = 0;
1143         unsigned int mprq_max_stride_size_n = 0;
1144         unsigned int mprq_min_stride_num_n = 0;
1145         unsigned int mprq_max_stride_num_n = 0;
1146         struct ether_addr mac;
1147         char name[RTE_ETH_NAME_MAX_LEN];
1148         int own_domain_id = 0;
1149         uint16_t port_id;
1150         unsigned int i;
1151
1152         /* Determine if this port representor is supposed to be spawned. */
1153         if (switch_info->representor && dpdk_dev->devargs) {
1154                 struct rte_eth_devargs eth_da;
1155
1156                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1157                 if (err) {
1158                         rte_errno = -err;
1159                         DRV_LOG(ERR, "failed to process device arguments: %s",
1160                                 strerror(rte_errno));
1161                         return NULL;
1162                 }
1163                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1164                         if (eth_da.representor_ports[i] ==
1165                             (uint16_t)switch_info->port_name)
1166                                 break;
1167                 if (i == eth_da.nb_representor_ports) {
1168                         rte_errno = EBUSY;
1169                         return NULL;
1170                 }
1171         }
1172         /* Build device name. */
1173         if (!switch_info->representor)
1174                 strlcpy(name, dpdk_dev->name, sizeof(name));
1175         else
1176                 snprintf(name, sizeof(name), "%s_representor_%u",
1177                          dpdk_dev->name, switch_info->port_name);
1178         /* check if the device is already spawned */
1179         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1180                 rte_errno = EEXIST;
1181                 return NULL;
1182         }
1183         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1184         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1185                 eth_dev = rte_eth_dev_attach_secondary(name);
1186                 if (eth_dev == NULL) {
1187                         DRV_LOG(ERR, "can not attach rte ethdev");
1188                         rte_errno = ENOMEM;
1189                         return NULL;
1190                 }
1191                 eth_dev->device = dpdk_dev;
1192                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1193                 /* Receive command fd from primary process */
1194                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1195                 if (err < 0)
1196                         return NULL;
1197                 /* Remap UAR for Tx queues. */
1198                 err = mlx5_tx_uar_remap(eth_dev, err);
1199                 if (err)
1200                         return NULL;
1201                 /*
1202                  * Ethdev pointer is still required as input since
1203                  * the primary device is not accessible from the
1204                  * secondary process.
1205                  */
1206                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1207                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1208                 return eth_dev;
1209         }
1210         sh = mlx5_alloc_shared_ibctx(spawn);
1211         if (!sh)
1212                 return NULL;
1213         config.devx = sh->devx;
1214 #ifdef HAVE_IBV_MLX5_MOD_SWP
1215         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1216 #endif
1217         /*
1218          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1219          * as all ConnectX-5 devices.
1220          */
1221 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1222         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1223 #endif
1224 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1225         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1226 #endif
1227         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1228         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1229                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1230                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1231                         mps = MLX5_MPW_ENHANCED;
1232                 } else {
1233                         DRV_LOG(DEBUG, "MPW is supported");
1234                         mps = MLX5_MPW;
1235                 }
1236         } else {
1237                 DRV_LOG(DEBUG, "MPW isn't supported");
1238                 mps = MLX5_MPW_DISABLED;
1239         }
1240 #ifdef HAVE_IBV_MLX5_MOD_SWP
1241         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1242                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1243         DRV_LOG(DEBUG, "SWP support: %u", swp);
1244 #endif
1245         config.swp = !!swp;
1246 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1247         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1248                 struct mlx5dv_striding_rq_caps mprq_caps =
1249                         dv_attr.striding_rq_caps;
1250
1251                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1252                         mprq_caps.min_single_stride_log_num_of_bytes);
1253                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1254                         mprq_caps.max_single_stride_log_num_of_bytes);
1255                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1256                         mprq_caps.min_single_wqe_log_num_of_strides);
1257                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1258                         mprq_caps.max_single_wqe_log_num_of_strides);
1259                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1260                         mprq_caps.supported_qpts);
1261                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1262                 mprq = 1;
1263                 mprq_min_stride_size_n =
1264                         mprq_caps.min_single_stride_log_num_of_bytes;
1265                 mprq_max_stride_size_n =
1266                         mprq_caps.max_single_stride_log_num_of_bytes;
1267                 mprq_min_stride_num_n =
1268                         mprq_caps.min_single_wqe_log_num_of_strides;
1269                 mprq_max_stride_num_n =
1270                         mprq_caps.max_single_wqe_log_num_of_strides;
1271                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1272                                                    mprq_min_stride_num_n);
1273         }
1274 #endif
1275         if (RTE_CACHE_LINE_SIZE == 128 &&
1276             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1277                 cqe_comp = 0;
1278         else
1279                 cqe_comp = 1;
1280         config.cqe_comp = cqe_comp;
1281 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1282         /* Whether device supports 128B Rx CQE padding. */
1283         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1284                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1285 #endif
1286 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1287         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1288                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1289                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1290                              (dv_attr.tunnel_offloads_caps &
1291                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1292         }
1293         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1294                 tunnel_en ? "" : "not ");
1295 #else
1296         DRV_LOG(WARNING,
1297                 "tunnel offloading disabled due to old OFED/rdma-core version");
1298 #endif
1299         config.tunnel_en = tunnel_en;
1300 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1301         mpls_en = ((dv_attr.tunnel_offloads_caps &
1302                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1303                    (dv_attr.tunnel_offloads_caps &
1304                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1305         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1306                 mpls_en ? "" : "not ");
1307 #else
1308         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1309                 " old OFED/rdma-core version or firmware configuration");
1310 #endif
1311         config.mpls_en = mpls_en;
1312         /* Check port status. */
1313         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1314         if (err) {
1315                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1316                 goto error;
1317         }
1318         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1319                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1320                 err = EINVAL;
1321                 goto error;
1322         }
1323         if (port_attr.state != IBV_PORT_ACTIVE)
1324                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1325                         mlx5_glue->port_state_str(port_attr.state),
1326                         port_attr.state);
1327         /* Allocate private eth device data. */
1328         priv = rte_zmalloc("ethdev private structure",
1329                            sizeof(*priv),
1330                            RTE_CACHE_LINE_SIZE);
1331         if (priv == NULL) {
1332                 DRV_LOG(ERR, "priv allocation failure");
1333                 err = ENOMEM;
1334                 goto error;
1335         }
1336         priv->sh = sh;
1337         priv->ibv_port = spawn->ibv_port;
1338         priv->mtu = ETHER_MTU;
1339 #ifndef RTE_ARCH_64
1340         /* Initialize UAR access locks for 32bit implementations. */
1341         rte_spinlock_init(&priv->uar_lock_cq);
1342         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1343                 rte_spinlock_init(&priv->uar_lock[i]);
1344 #endif
1345         /* Some internal functions rely on Netlink sockets, open them now. */
1346         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1347         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1348         priv->nl_sn = 0;
1349         priv->representor = !!switch_info->representor;
1350         priv->master = !!switch_info->master;
1351         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1352         /*
1353          * Currently we support single E-Switch per PF configurations
1354          * only and vport_id field contains the vport index for
1355          * associated VF, which is deduced from representor port name.
1356          * For example, let's have the IB device port 10, it has
1357          * attached network device eth0, which has port name attribute
1358          * pf0vf2, we can deduce the VF number as 2, and set vport index
1359          * as 3 (2+1). This assigning schema should be changed if the
1360          * multiple E-Switch instances per PF configurations or/and PCI
1361          * subfunctions are added.
1362          */
1363         priv->vport_id = switch_info->representor ?
1364                          switch_info->port_name + 1 : -1;
1365         /* representor_id field keeps the unmodified port/VF index. */
1366         priv->representor_id = switch_info->representor ?
1367                                switch_info->port_name : -1;
1368         /*
1369          * Look for sibling devices in order to reuse their switch domain
1370          * if any, otherwise allocate one.
1371          */
1372         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1373                 const struct mlx5_priv *opriv =
1374                         rte_eth_devices[port_id].data->dev_private;
1375
1376                 if (!opriv ||
1377                         opriv->domain_id ==
1378                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1379                         continue;
1380                 priv->domain_id = opriv->domain_id;
1381                 break;
1382         }
1383         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1384                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1385                 if (err) {
1386                         err = rte_errno;
1387                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1388                                 strerror(rte_errno));
1389                         goto error;
1390                 }
1391                 own_domain_id = 1;
1392         }
1393         err = mlx5_args(&config, dpdk_dev->devargs);
1394         if (err) {
1395                 err = rte_errno;
1396                 DRV_LOG(ERR, "failed to process device arguments: %s",
1397                         strerror(rte_errno));
1398                 goto error;
1399         }
1400         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1401                             IBV_DEVICE_RAW_IP_CSUM);
1402         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1403                 (config.hw_csum ? "" : "not "));
1404 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1405         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1406         DRV_LOG(DEBUG, "counters are not supported");
1407 #endif
1408 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1409         if (config.dv_flow_en) {
1410                 DRV_LOG(WARNING, "DV flow is not supported");
1411                 config.dv_flow_en = 0;
1412         }
1413 #endif
1414         config.ind_table_max_size =
1415                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1416         /*
1417          * Remove this check once DPDK supports larger/variable
1418          * indirection tables.
1419          */
1420         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1421                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1422         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1423                 config.ind_table_max_size);
1424         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1425                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1426         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1427                 (config.hw_vlan_strip ? "" : "not "));
1428         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1429                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1430         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1431                 (config.hw_fcs_strip ? "" : "not "));
1432 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1433         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1434 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1435         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1436                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1437 #endif
1438         if (config.hw_padding && !hw_padding) {
1439                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1440                 config.hw_padding = 0;
1441         } else if (config.hw_padding) {
1442                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1443         }
1444         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1445                       (sh->device_attr.tso_caps.supported_qpts &
1446                        (1 << IBV_QPT_RAW_PACKET)));
1447         if (config.tso)
1448                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1449         /*
1450          * MPW is disabled by default, while the Enhanced MPW is enabled
1451          * by default.
1452          */
1453         if (config.mps == MLX5_ARG_UNSET)
1454                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1455                                                           MLX5_MPW_DISABLED;
1456         else
1457                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1458         DRV_LOG(INFO, "%sMPS is %s",
1459                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1460                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1461         if (config.cqe_comp && !cqe_comp) {
1462                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1463                 config.cqe_comp = 0;
1464         }
1465         if (config.cqe_pad && !cqe_pad) {
1466                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1467                 config.cqe_pad = 0;
1468         } else if (config.cqe_pad) {
1469                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1470         }
1471         if (config.mprq.enabled && mprq) {
1472                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1473                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1474                         config.mprq.stride_num_n =
1475                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1476                                         mprq_min_stride_num_n);
1477                         DRV_LOG(WARNING,
1478                                 "the number of strides"
1479                                 " for Multi-Packet RQ is out of range,"
1480                                 " setting default value (%u)",
1481                                 1 << config.mprq.stride_num_n);
1482                 }
1483                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1484                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1485         } else if (config.mprq.enabled && !mprq) {
1486                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1487                 config.mprq.enabled = 0;
1488         }
1489         eth_dev = rte_eth_dev_allocate(name);
1490         if (eth_dev == NULL) {
1491                 DRV_LOG(ERR, "can not allocate rte ethdev");
1492                 err = ENOMEM;
1493                 goto error;
1494         }
1495         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1496         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1497         if (priv->representor) {
1498                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1499                 eth_dev->data->representor_id = priv->representor_id;
1500         }
1501         eth_dev->data->dev_private = priv;
1502         priv->dev_data = eth_dev->data;
1503         eth_dev->data->mac_addrs = priv->mac;
1504         eth_dev->device = dpdk_dev;
1505         /* Configure the first MAC address by default. */
1506         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1507                 DRV_LOG(ERR,
1508                         "port %u cannot get MAC address, is mlx5_en"
1509                         " loaded? (errno: %s)",
1510                         eth_dev->data->port_id, strerror(rte_errno));
1511                 err = ENODEV;
1512                 goto error;
1513         }
1514         DRV_LOG(INFO,
1515                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1516                 eth_dev->data->port_id,
1517                 mac.addr_bytes[0], mac.addr_bytes[1],
1518                 mac.addr_bytes[2], mac.addr_bytes[3],
1519                 mac.addr_bytes[4], mac.addr_bytes[5]);
1520 #ifndef NDEBUG
1521         {
1522                 char ifname[IF_NAMESIZE];
1523
1524                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1525                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1526                                 eth_dev->data->port_id, ifname);
1527                 else
1528                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1529                                 eth_dev->data->port_id);
1530         }
1531 #endif
1532         /* Get actual MTU if possible. */
1533         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1534         if (err) {
1535                 err = rte_errno;
1536                 goto error;
1537         }
1538         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1539                 priv->mtu);
1540         /* Initialize burst functions to prevent crashes before link-up. */
1541         eth_dev->rx_pkt_burst = removed_rx_burst;
1542         eth_dev->tx_pkt_burst = removed_tx_burst;
1543         eth_dev->dev_ops = &mlx5_dev_ops;
1544         /* Register MAC address. */
1545         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1546         if (config.vf && config.vf_nl_en)
1547                 mlx5_nl_mac_addr_sync(eth_dev);
1548         priv->tcf_context = mlx5_flow_tcf_context_create();
1549         if (!priv->tcf_context) {
1550                 err = -rte_errno;
1551                 DRV_LOG(WARNING,
1552                         "flow rules relying on switch offloads will not be"
1553                         " supported: cannot open libmnl socket: %s",
1554                         strerror(rte_errno));
1555         } else {
1556                 struct rte_flow_error error;
1557                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1558
1559                 if (!ifindex) {
1560                         err = -rte_errno;
1561                         error.message =
1562                                 "cannot retrieve network interface index";
1563                 } else {
1564                         err = mlx5_flow_tcf_init(priv->tcf_context,
1565                                                  ifindex, &error);
1566                 }
1567                 if (err) {
1568                         DRV_LOG(WARNING,
1569                                 "flow rules relying on switch offloads will"
1570                                 " not be supported: %s: %s",
1571                                 error.message, strerror(rte_errno));
1572                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1573                         priv->tcf_context = NULL;
1574                 }
1575         }
1576         if (config.dv_flow_en) {
1577                 err = mlx5_alloc_shared_dr(priv);
1578                 if (err)
1579                         goto error;
1580         }
1581         TAILQ_INIT(&priv->flows);
1582         TAILQ_INIT(&priv->ctrl_flows);
1583         /* Hint libmlx5 to use PMD allocator for data plane resources */
1584         struct mlx5dv_ctx_allocators alctr = {
1585                 .alloc = &mlx5_alloc_verbs_buf,
1586                 .free = &mlx5_free_verbs_buf,
1587                 .data = priv,
1588         };
1589         mlx5_glue->dv_set_context_attr(sh->ctx,
1590                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1591                                        (void *)((uintptr_t)&alctr));
1592         /* Bring Ethernet device up. */
1593         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1594                 eth_dev->data->port_id);
1595         mlx5_set_link_up(eth_dev);
1596         /*
1597          * Even though the interrupt handler is not installed yet,
1598          * interrupts will still trigger on the async_fd from
1599          * Verbs context returned by ibv_open_device().
1600          */
1601         mlx5_link_update(eth_dev, 0);
1602         /* Store device configuration on private structure. */
1603         priv->config = config;
1604         /* Supported Verbs flow priority number detection. */
1605         err = mlx5_flow_discover_priorities(eth_dev);
1606         if (err < 0) {
1607                 err = -err;
1608                 goto error;
1609         }
1610         priv->config.flow_prio = err;
1611         /*
1612          * Once the device is added to the list of memory event
1613          * callback, its global MR cache table cannot be expanded
1614          * on the fly because of deadlock. If it overflows, lookup
1615          * should be done by searching MR list linearly, which is slow.
1616          */
1617         err = mlx5_mr_btree_init(&priv->mr.cache,
1618                                  MLX5_MR_BTREE_CACHE_N * 2,
1619                                  eth_dev->device->numa_node);
1620         if (err) {
1621                 err = rte_errno;
1622                 goto error;
1623         }
1624         /* Add device to memory callback list. */
1625         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1626         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1627                          priv, mem_event_cb);
1628         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1629         return eth_dev;
1630 error:
1631         if (priv) {
1632                 if (priv->sh)
1633                         mlx5_free_shared_dr(priv);
1634                 if (priv->nl_socket_route >= 0)
1635                         close(priv->nl_socket_route);
1636                 if (priv->nl_socket_rdma >= 0)
1637                         close(priv->nl_socket_rdma);
1638                 if (priv->tcf_context)
1639                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1640                 if (own_domain_id)
1641                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1642                 rte_free(priv);
1643                 if (eth_dev != NULL)
1644                         eth_dev->data->dev_private = NULL;
1645         }
1646         if (eth_dev != NULL) {
1647                 /* mac_addrs must not be freed alone because part of dev_private */
1648                 eth_dev->data->mac_addrs = NULL;
1649                 rte_eth_dev_release_port(eth_dev);
1650         }
1651         if (sh)
1652                 mlx5_free_shared_ibctx(sh);
1653         assert(err > 0);
1654         rte_errno = err;
1655         return NULL;
1656 }
1657
1658 /**
1659  * Comparison callback to sort device data.
1660  *
1661  * This is meant to be used with qsort().
1662  *
1663  * @param a[in]
1664  *   Pointer to pointer to first data object.
1665  * @param b[in]
1666  *   Pointer to pointer to second data object.
1667  *
1668  * @return
1669  *   0 if both objects are equal, less than 0 if the first argument is less
1670  *   than the second, greater than 0 otherwise.
1671  */
1672 static int
1673 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1674 {
1675         const struct mlx5_switch_info *si_a =
1676                 &((const struct mlx5_dev_spawn_data *)a)->info;
1677         const struct mlx5_switch_info *si_b =
1678                 &((const struct mlx5_dev_spawn_data *)b)->info;
1679         int ret;
1680
1681         /* Master device first. */
1682         ret = si_b->master - si_a->master;
1683         if (ret)
1684                 return ret;
1685         /* Then representor devices. */
1686         ret = si_b->representor - si_a->representor;
1687         if (ret)
1688                 return ret;
1689         /* Unidentified devices come last in no specific order. */
1690         if (!si_a->representor)
1691                 return 0;
1692         /* Order representors by name. */
1693         return si_a->port_name - si_b->port_name;
1694 }
1695
1696 /**
1697  * DPDK callback to register a PCI device.
1698  *
1699  * This function spawns Ethernet devices out of a given PCI device.
1700  *
1701  * @param[in] pci_drv
1702  *   PCI driver structure (mlx5_driver).
1703  * @param[in] pci_dev
1704  *   PCI device information.
1705  *
1706  * @return
1707  *   0 on success, a negative errno value otherwise and rte_errno is set.
1708  */
1709 static int
1710 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1711                struct rte_pci_device *pci_dev)
1712 {
1713         struct ibv_device **ibv_list;
1714         /*
1715          * Number of found IB Devices matching with requested PCI BDF.
1716          * nd != 1 means there are multiple IB devices over the same
1717          * PCI device and we have representors and master.
1718          */
1719         unsigned int nd = 0;
1720         /*
1721          * Number of found IB device Ports. nd = 1 and np = 1..n means
1722          * we have the single multiport IB device, and there may be
1723          * representors attached to some of found ports.
1724          */
1725         unsigned int np = 0;
1726         /*
1727          * Number of DPDK ethernet devices to Spawn - either over
1728          * multiple IB devices or multiple ports of single IB device.
1729          * Actually this is the number of iterations to spawn.
1730          */
1731         unsigned int ns = 0;
1732         struct mlx5_dev_config dev_config;
1733         int ret;
1734
1735         ret = mlx5_init_once();
1736         if (ret) {
1737                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1738                         strerror(rte_errno));
1739                 return -rte_errno;
1740         }
1741         assert(pci_drv == &mlx5_driver);
1742         errno = 0;
1743         ibv_list = mlx5_glue->get_device_list(&ret);
1744         if (!ibv_list) {
1745                 rte_errno = errno ? errno : ENOSYS;
1746                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1747                 return -rte_errno;
1748         }
1749         /*
1750          * First scan the list of all Infiniband devices to find
1751          * matching ones, gathering into the list.
1752          */
1753         struct ibv_device *ibv_match[ret + 1];
1754         int nl_route = -1;
1755         int nl_rdma = -1;
1756         unsigned int i;
1757
1758         while (ret-- > 0) {
1759                 struct rte_pci_addr pci_addr;
1760
1761                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1762                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1763                         continue;
1764                 if (pci_dev->addr.domain != pci_addr.domain ||
1765                     pci_dev->addr.bus != pci_addr.bus ||
1766                     pci_dev->addr.devid != pci_addr.devid ||
1767                     pci_dev->addr.function != pci_addr.function)
1768                         continue;
1769                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1770                         ibv_list[ret]->name);
1771                 ibv_match[nd++] = ibv_list[ret];
1772         }
1773         ibv_match[nd] = NULL;
1774         if (!nd) {
1775                 /* No device matches, just complain and bail out. */
1776                 mlx5_glue->free_device_list(ibv_list);
1777                 DRV_LOG(WARNING,
1778                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1779                         " are kernel drivers loaded?",
1780                         pci_dev->addr.domain, pci_dev->addr.bus,
1781                         pci_dev->addr.devid, pci_dev->addr.function);
1782                 rte_errno = ENOENT;
1783                 ret = -rte_errno;
1784                 return ret;
1785         }
1786         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1787         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1788         if (nd == 1) {
1789                 /*
1790                  * Found single matching device may have multiple ports.
1791                  * Each port may be representor, we have to check the port
1792                  * number and check the representors existence.
1793                  */
1794                 if (nl_rdma >= 0)
1795                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1796                 if (!np)
1797                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1798                                          " ports number", ibv_match[0]->name);
1799         }
1800         /*
1801          * Now we can determine the maximal
1802          * amount of devices to be spawned.
1803          */
1804         struct mlx5_dev_spawn_data list[np ? np : nd];
1805
1806         if (np > 1) {
1807                 /*
1808                  * Single IB device with multiple ports found,
1809                  * it may be E-Switch master device and representors.
1810                  * We have to perform identification trough the ports.
1811                  */
1812                 assert(nl_rdma >= 0);
1813                 assert(ns == 0);
1814                 assert(nd == 1);
1815                 for (i = 1; i <= np; ++i) {
1816                         list[ns].max_port = np;
1817                         list[ns].ibv_port = i;
1818                         list[ns].ibv_dev = ibv_match[0];
1819                         list[ns].eth_dev = NULL;
1820                         list[ns].ifindex = mlx5_nl_ifindex
1821                                         (nl_rdma, list[ns].ibv_dev->name, i);
1822                         if (!list[ns].ifindex) {
1823                                 /*
1824                                  * No network interface index found for the
1825                                  * specified port, it means there is no
1826                                  * representor on this port. It's OK,
1827                                  * there can be disabled ports, for example
1828                                  * if sriov_numvfs < sriov_totalvfs.
1829                                  */
1830                                 continue;
1831                         }
1832                         ret = -1;
1833                         if (nl_route >= 0)
1834                                 ret = mlx5_nl_switch_info
1835                                                (nl_route,
1836                                                 list[ns].ifindex,
1837                                                 &list[ns].info);
1838                         if (ret || (!list[ns].info.representor &&
1839                                     !list[ns].info.master)) {
1840                                 /*
1841                                  * We failed to recognize representors with
1842                                  * Netlink, let's try to perform the task
1843                                  * with sysfs.
1844                                  */
1845                                 ret =  mlx5_sysfs_switch_info
1846                                                 (list[ns].ifindex,
1847                                                  &list[ns].info);
1848                         }
1849                         if (!ret && (list[ns].info.representor ^
1850                                      list[ns].info.master))
1851                                 ns++;
1852                 }
1853                 if (!ns) {
1854                         DRV_LOG(ERR,
1855                                 "unable to recognize master/representors"
1856                                 " on the IB device with multiple ports");
1857                         rte_errno = ENOENT;
1858                         ret = -rte_errno;
1859                         goto exit;
1860                 }
1861         } else {
1862                 /*
1863                  * The existence of several matching entries (nd > 1) means
1864                  * port representors have been instantiated. No existing Verbs
1865                  * call nor sysfs entries can tell them apart, this can only
1866                  * be done through Netlink calls assuming kernel drivers are
1867                  * recent enough to support them.
1868                  *
1869                  * In the event of identification failure through Netlink,
1870                  * try again through sysfs, then:
1871                  *
1872                  * 1. A single IB device matches (nd == 1) with single
1873                  *    port (np=0/1) and is not a representor, assume
1874                  *    no switch support.
1875                  *
1876                  * 2. Otherwise no safe assumptions can be made;
1877                  *    complain louder and bail out.
1878                  */
1879                 np = 1;
1880                 for (i = 0; i != nd; ++i) {
1881                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1882                         list[ns].max_port = 1;
1883                         list[ns].ibv_port = 1;
1884                         list[ns].ibv_dev = ibv_match[i];
1885                         list[ns].eth_dev = NULL;
1886                         list[ns].ifindex = 0;
1887                         if (nl_rdma >= 0)
1888                                 list[ns].ifindex = mlx5_nl_ifindex
1889                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1890                         if (!list[ns].ifindex) {
1891                                 char ifname[IF_NAMESIZE];
1892
1893                                 /*
1894                                  * Netlink failed, it may happen with old
1895                                  * ib_core kernel driver (before 4.16).
1896                                  * We can assume there is old driver because
1897                                  * here we are processing single ports IB
1898                                  * devices. Let's try sysfs to retrieve
1899                                  * the ifindex. The method works for
1900                                  * master device only.
1901                                  */
1902                                 if (nd > 1) {
1903                                         /*
1904                                          * Multiple devices found, assume
1905                                          * representors, can not distinguish
1906                                          * master/representor and retrieve
1907                                          * ifindex via sysfs.
1908                                          */
1909                                         continue;
1910                                 }
1911                                 ret = mlx5_get_master_ifname
1912                                         (ibv_match[i]->ibdev_path, &ifname);
1913                                 if (!ret)
1914                                         list[ns].ifindex =
1915                                                 if_nametoindex(ifname);
1916                                 if (!list[ns].ifindex) {
1917                                         /*
1918                                          * No network interface index found
1919                                          * for the specified device, it means
1920                                          * there it is neither representor
1921                                          * nor master.
1922                                          */
1923                                         continue;
1924                                 }
1925                         }
1926                         ret = -1;
1927                         if (nl_route >= 0)
1928                                 ret = mlx5_nl_switch_info
1929                                                (nl_route,
1930                                                 list[ns].ifindex,
1931                                                 &list[ns].info);
1932                         if (ret || (!list[ns].info.representor &&
1933                                     !list[ns].info.master)) {
1934                                 /*
1935                                  * We failed to recognize representors with
1936                                  * Netlink, let's try to perform the task
1937                                  * with sysfs.
1938                                  */
1939                                 ret =  mlx5_sysfs_switch_info
1940                                                 (list[ns].ifindex,
1941                                                  &list[ns].info);
1942                         }
1943                         if (!ret && (list[ns].info.representor ^
1944                                      list[ns].info.master)) {
1945                                 ns++;
1946                         } else if ((nd == 1) &&
1947                                    !list[ns].info.representor &&
1948                                    !list[ns].info.master) {
1949                                 /*
1950                                  * Single IB device with
1951                                  * one physical port and
1952                                  * attached network device.
1953                                  * May be SRIOV is not enabled
1954                                  * or there is no representors.
1955                                  */
1956                                 DRV_LOG(INFO, "no E-Switch support detected");
1957                                 ns++;
1958                                 break;
1959                         }
1960                 }
1961                 if (!ns) {
1962                         DRV_LOG(ERR,
1963                                 "unable to recognize master/representors"
1964                                 " on the multiple IB devices");
1965                         rte_errno = ENOENT;
1966                         ret = -rte_errno;
1967                         goto exit;
1968                 }
1969         }
1970         assert(ns);
1971         /*
1972          * Sort list to probe devices in natural order for users convenience
1973          * (i.e. master first, then representors from lowest to highest ID).
1974          */
1975         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1976         /* Default configuration. */
1977         dev_config = (struct mlx5_dev_config){
1978                 .hw_padding = 0,
1979                 .mps = MLX5_ARG_UNSET,
1980                 .tx_vec_en = 1,
1981                 .rx_vec_en = 1,
1982                 .txq_inline = MLX5_ARG_UNSET,
1983                 .txqs_inline = MLX5_ARG_UNSET,
1984                 .txqs_vec = MLX5_ARG_UNSET,
1985                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1986                 .vf_nl_en = 1,
1987                 .mr_ext_memseg_en = 1,
1988                 .mprq = {
1989                         .enabled = 0, /* Disabled by default. */
1990                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1991                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1992                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1993                 },
1994         };
1995         /* Device specific configuration. */
1996         switch (pci_dev->id.device_id) {
1997         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1998                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1999                 break;
2000         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2001         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2002         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2003         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2004                 dev_config.vf = 1;
2005                 break;
2006         default:
2007                 break;
2008         }
2009         /* Set architecture-dependent default value if unset. */
2010         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
2011                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
2012         for (i = 0; i != ns; ++i) {
2013                 uint32_t restore;
2014
2015                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2016                                                  &list[i],
2017                                                  dev_config);
2018                 if (!list[i].eth_dev) {
2019                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2020                                 break;
2021                         /* Device is disabled or already spawned. Ignore it. */
2022                         continue;
2023                 }
2024                 restore = list[i].eth_dev->data->dev_flags;
2025                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2026                 /* Restore non-PCI flags cleared by the above call. */
2027                 list[i].eth_dev->data->dev_flags |= restore;
2028                 rte_eth_dev_probing_finish(list[i].eth_dev);
2029         }
2030         if (i != ns) {
2031                 DRV_LOG(ERR,
2032                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2033                         " encountering an error: %s",
2034                         pci_dev->addr.domain, pci_dev->addr.bus,
2035                         pci_dev->addr.devid, pci_dev->addr.function,
2036                         strerror(rte_errno));
2037                 ret = -rte_errno;
2038                 /* Roll back. */
2039                 while (i--) {
2040                         if (!list[i].eth_dev)
2041                                 continue;
2042                         mlx5_dev_close(list[i].eth_dev);
2043                         /* mac_addrs must not be freed because in dev_private */
2044                         list[i].eth_dev->data->mac_addrs = NULL;
2045                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2046                 }
2047                 /* Restore original error. */
2048                 rte_errno = -ret;
2049         } else {
2050                 ret = 0;
2051         }
2052 exit:
2053         /*
2054          * Do the routine cleanup:
2055          * - close opened Netlink sockets
2056          * - free the Infiniband device list
2057          */
2058         if (nl_rdma >= 0)
2059                 close(nl_rdma);
2060         if (nl_route >= 0)
2061                 close(nl_route);
2062         assert(ibv_list);
2063         mlx5_glue->free_device_list(ibv_list);
2064         return ret;
2065 }
2066
2067 /**
2068  * DPDK callback to remove a PCI device.
2069  *
2070  * This function removes all Ethernet devices belong to a given PCI device.
2071  *
2072  * @param[in] pci_dev
2073  *   Pointer to the PCI device.
2074  *
2075  * @return
2076  *   0 on success, the function cannot fail.
2077  */
2078 static int
2079 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2080 {
2081         uint16_t port_id;
2082         struct rte_eth_dev *port;
2083
2084         for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
2085                 port = &rte_eth_devices[port_id];
2086                 if (port->state != RTE_ETH_DEV_UNUSED &&
2087                                 port->device == &pci_dev->device)
2088                         rte_eth_dev_close(port_id);
2089         }
2090         return 0;
2091 }
2092
2093 static const struct rte_pci_id mlx5_pci_id_map[] = {
2094         {
2095                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2096                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2097         },
2098         {
2099                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2100                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2101         },
2102         {
2103                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2104                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2105         },
2106         {
2107                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2108                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2109         },
2110         {
2111                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2112                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2113         },
2114         {
2115                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2116                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2117         },
2118         {
2119                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2120                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2121         },
2122         {
2123                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2124                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2125         },
2126         {
2127                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2128                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2129         },
2130         {
2131                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2132                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2133         },
2134         {
2135                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2136                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2137         },
2138         {
2139                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2140                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2141         },
2142         {
2143                 .vendor_id = 0
2144         }
2145 };
2146
2147 static struct rte_pci_driver mlx5_driver = {
2148         .driver = {
2149                 .name = MLX5_DRIVER_NAME
2150         },
2151         .id_table = mlx5_pci_id_map,
2152         .probe = mlx5_pci_probe,
2153         .remove = mlx5_pci_remove,
2154         .dma_map = mlx5_dma_map,
2155         .dma_unmap = mlx5_dma_unmap,
2156         .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2157                       RTE_PCI_DRV_PROBE_AGAIN),
2158 };
2159
2160 #ifdef RTE_IBVERBS_LINK_DLOPEN
2161
2162 /**
2163  * Suffix RTE_EAL_PMD_PATH with "-glue".
2164  *
2165  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2166  * suffixing its last component.
2167  *
2168  * @param buf[out]
2169  *   Output buffer, should be large enough otherwise NULL is returned.
2170  * @param size
2171  *   Size of @p out.
2172  *
2173  * @return
2174  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2175  */
2176 static char *
2177 mlx5_glue_path(char *buf, size_t size)
2178 {
2179         static const char *const bad[] = { "/", ".", "..", NULL };
2180         const char *path = RTE_EAL_PMD_PATH;
2181         size_t len = strlen(path);
2182         size_t off;
2183         int i;
2184
2185         while (len && path[len - 1] == '/')
2186                 --len;
2187         for (off = len; off && path[off - 1] != '/'; --off)
2188                 ;
2189         for (i = 0; bad[i]; ++i)
2190                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2191                         goto error;
2192         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2193         if (i == -1 || (size_t)i >= size)
2194                 goto error;
2195         return buf;
2196 error:
2197         DRV_LOG(ERR,
2198                 "unable to append \"-glue\" to last component of"
2199                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2200                 " please re-configure DPDK");
2201         return NULL;
2202 }
2203
2204 /**
2205  * Initialization routine for run-time dependency on rdma-core.
2206  */
2207 static int
2208 mlx5_glue_init(void)
2209 {
2210         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2211         const char *path[] = {
2212                 /*
2213                  * A basic security check is necessary before trusting
2214                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2215                  */
2216                 (geteuid() == getuid() && getegid() == getgid() ?
2217                  getenv("MLX5_GLUE_PATH") : NULL),
2218                 /*
2219                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2220                  * variant, otherwise let dlopen() look up libraries on its
2221                  * own.
2222                  */
2223                 (*RTE_EAL_PMD_PATH ?
2224                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2225         };
2226         unsigned int i = 0;
2227         void *handle = NULL;
2228         void **sym;
2229         const char *dlmsg;
2230
2231         while (!handle && i != RTE_DIM(path)) {
2232                 const char *end;
2233                 size_t len;
2234                 int ret;
2235
2236                 if (!path[i]) {
2237                         ++i;
2238                         continue;
2239                 }
2240                 end = strpbrk(path[i], ":;");
2241                 if (!end)
2242                         end = path[i] + strlen(path[i]);
2243                 len = end - path[i];
2244                 ret = 0;
2245                 do {
2246                         char name[ret + 1];
2247
2248                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2249                                        (int)len, path[i],
2250                                        (!len || *(end - 1) == '/') ? "" : "/");
2251                         if (ret == -1)
2252                                 break;
2253                         if (sizeof(name) != (size_t)ret + 1)
2254                                 continue;
2255                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2256                                 name);
2257                         handle = dlopen(name, RTLD_LAZY);
2258                         break;
2259                 } while (1);
2260                 path[i] = end + 1;
2261                 if (!*end)
2262                         ++i;
2263         }
2264         if (!handle) {
2265                 rte_errno = EINVAL;
2266                 dlmsg = dlerror();
2267                 if (dlmsg)
2268                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2269                 goto glue_error;
2270         }
2271         sym = dlsym(handle, "mlx5_glue");
2272         if (!sym || !*sym) {
2273                 rte_errno = EINVAL;
2274                 dlmsg = dlerror();
2275                 if (dlmsg)
2276                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2277                 goto glue_error;
2278         }
2279         mlx5_glue = *sym;
2280         return 0;
2281 glue_error:
2282         if (handle)
2283                 dlclose(handle);
2284         DRV_LOG(WARNING,
2285                 "cannot initialize PMD due to missing run-time dependency on"
2286                 " rdma-core libraries (libibverbs, libmlx5)");
2287         return -rte_errno;
2288 }
2289
2290 #endif
2291
2292 /**
2293  * Driver initialization routine.
2294  */
2295 RTE_INIT(rte_mlx5_pmd_init)
2296 {
2297         /* Initialize driver log type. */
2298         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2299         if (mlx5_logtype >= 0)
2300                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2301
2302         /* Build the static tables for Verbs conversion. */
2303         mlx5_set_ptype_table();
2304         mlx5_set_cksum_table();
2305         mlx5_set_swp_types_table();
2306         /*
2307          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2308          * huge pages. Calling ibv_fork_init() during init allows
2309          * applications to use fork() safely for purposes other than
2310          * using this PMD, which is not supported in forked processes.
2311          */
2312         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2313         /* Match the size of Rx completion entry to the size of a cacheline. */
2314         if (RTE_CACHE_LINE_SIZE == 128)
2315                 setenv("MLX5_CQE_SIZE", "128", 0);
2316         /*
2317          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2318          * cleanup all the Verbs resources even when the device was removed.
2319          */
2320         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2321 #ifdef RTE_IBVERBS_LINK_DLOPEN
2322         if (mlx5_glue_init())
2323                 return;
2324         assert(mlx5_glue);
2325 #endif
2326 #ifndef NDEBUG
2327         /* Glue structure must not contain any NULL pointers. */
2328         {
2329                 unsigned int i;
2330
2331                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2332                         assert(((const void *const *)mlx5_glue)[i]);
2333         }
2334 #endif
2335         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2336                 DRV_LOG(ERR,
2337                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2338                         mlx5_glue->version, MLX5_GLUE_VERSION);
2339                 return;
2340         }
2341         mlx5_glue->fork_init();
2342         rte_pci_register(&mlx5_driver);
2343 }
2344
2345 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2346 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2347 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");