drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40 #include <rte_alarm.h>
  41
  42 #include "mlx5.h"
  43 #include "mlx5_utils.h"
  44 #include "mlx5_rxtx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_defs.h"
  47 #include "mlx5_glue.h"
  48 #include "mlx5_mr.h"
  49 #include "mlx5_flow.h"
  50
  51 /* Device parameter to enable RX completion queue compression. */
  52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  53
  54 /* Device parameter to enable RX completion entry padding to 128B. */
  55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  56
  57 /* Device parameter to enable padding Rx packet to cacheline size. */
  58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  59
  60 /* Device parameter to enable Multi-Packet Rx queue. */
  61 #define MLX5_RX_MPRQ_EN "mprq_en"
  62
  63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  65
  66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  68
  69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  71
  72 /* Device parameter to configure inline send. Deprecated, ignored.*/
  73 #define MLX5_TXQ_INLINE "txq_inline"
  74
  75 /* Device parameter to limit packet size to inline with ordinary SEND. */
  76 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  77
  78 /* Device parameter to configure minimal data size to inline. */
  79 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  80
  81 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  82 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  83
  84 /*
  85  * Device parameter to configure the number of TX queues threshold for
  86  * enabling inline send.
  87  */
  88 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  89
  90 /*
  91  * Device parameter to configure the number of TX queues threshold for
  92  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  93  */
  94 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  95
  96 /* Device parameter to enable multi-packet send WQEs. */
  97 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  98
  99 /*
 100  * Device parameter to include 2 dsegs in the title WQEBB.
 101  * Deprecated, ignored.
 102  */
 103 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 104
 105 /*
 106  * Device parameter to limit the size of inlining packet.
 107  * Deprecated, ignored.
 108  */
 109 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 110
 111 /*
 112  * Device parameter to enable hardware Tx vector.
 113  * Deprecated, ignored (no vectorized Tx routines anymore).
 114  */
 115 #define MLX5_TX_VEC_EN "tx_vec_en"
 116
 117 /* Device parameter to enable hardware Rx vector. */
 118 #define MLX5_RX_VEC_EN "rx_vec_en"
 119
 120 /* Allow L3 VXLAN flow creation. */
 121 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 122
 123 /* Activate DV E-Switch flow steering. */
 124 #define MLX5_DV_ESW_EN "dv_esw_en"
 125
 126 /* Activate DV flow steering. */
 127 #define MLX5_DV_FLOW_EN "dv_flow_en"
 128
 129 /* Activate Netlink support in VF mode. */
 130 #define MLX5_VF_NL_EN "vf_nl_en"
 131
 132 /* Enable extending memsegs when creating a MR. */
 133 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 134
 135 /* Select port representors to instantiate. */
 136 #define MLX5_REPRESENTOR "representor"
 137
 138 /* Device parameter to configure the maximum number of dump files per queue. */
 139 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 140
 141 /* Configure timeout of LRO session (in microseconds). */
 142 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 143
 144 #ifndef HAVE_IBV_MLX5_MOD_MPW
 145 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 146 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 147 #endif
 148
 149 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 150 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 151 #endif
 152
 153 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 154
 155 /* Shared memory between primary and secondary processes. */
 156 struct mlx5_shared_data *mlx5_shared_data;
 157
 158 /* Spinlock for mlx5_shared_data allocation. */
 159 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 160
 161 /* Process local data for secondary processes. */
 162 static struct mlx5_local_data mlx5_local_data;
 163
 164 /** Driver-specific log messages type. */
 165 int mlx5_logtype;
 166
 167 /** Data associated with devices to spawn. */
 168 struct mlx5_dev_spawn_data {
 169         uint32_t ifindex; /**< Network interface index. */
 170         uint32_t max_port; /**< IB device maximal port index. */
 171         uint32_t ibv_port; /**< IB device physical port index. */
 172         struct mlx5_switch_info info; /**< Switch information. */
 173         struct ibv_device *ibv_dev; /**< Associated IB device. */
 174         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 175         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 176 };
 177
 178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 180
 181 /**
 182  * Initialize the counters management structure.
 183  *
 184  * @param[in] sh
 185  *   Pointer to mlx5_ibv_shared object to free
 186  */
 187 static void
 188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 189 {
 190         uint8_t i;
 191
 192         TAILQ_INIT(&sh->cmng.flow_counters);
 193         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 194                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 195 }
 196
 197 /**
 198  * Destroy all the resources allocated for a counter memory management.
 199  *
 200  * @param[in] mng
 201  *   Pointer to the memory management structure.
 202  */
 203 static void
 204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 205 {
 206         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 207
 208         LIST_REMOVE(mng, next);
 209         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 210         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 211         rte_free(mem);
 212 }
 213
 214 /**
 215  * Close and release all the resources of the counters management.
 216  *
 217  * @param[in] sh
 218  *   Pointer to mlx5_ibv_shared object to free.
 219  */
 220 static void
 221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 222 {
 223         struct mlx5_counter_stats_mem_mng *mng;
 224         uint8_t i;
 225         int j;
 226         int retries = 1024;
 227
 228         rte_errno = 0;
 229         while (--retries) {
 230                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 231                 if (rte_errno != EINPROGRESS)
 232                         break;
 233                 rte_pause();
 234         }
 235         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 236                 struct mlx5_flow_counter_pool *pool;
 237                 uint32_t batch = !!(i % 2);
 238
 239                 if (!sh->cmng.ccont[i].pools)
 240                         continue;
 241                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 242                 while (pool) {
 243                         if (batch) {
 244                                 if (pool->min_dcs)
 245                                         claim_zero
 246                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 247                         }
 248                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 249                                 if (pool->counters_raw[j].action)
 250                                         claim_zero
 251                                         (mlx5_glue->destroy_flow_action
 252                                                (pool->counters_raw[j].action));
 253                                 if (!batch && pool->counters_raw[j].dcs)
 254                                         claim_zero(mlx5_devx_cmd_destroy
 255                                                   (pool->counters_raw[j].dcs));
 256                         }
 257                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 258                                      next);
 259                         rte_free(pool);
 260                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 261                 }
 262                 rte_free(sh->cmng.ccont[i].pools);
 263         }
 264         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 265         while (mng) {
 266                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 267                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 268         }
 269         memset(&sh->cmng, 0, sizeof(sh->cmng));
 270 }
 271
 272 /**
 273  * Allocate shared IB device context. If there is multiport device the
 274  * master and representors will share this context, if there is single
 275  * port dedicated IB device, the context will be used by only given
 276  * port due to unification.
 277  *
 278  * Routine first searches the context for the specified IB device name,
 279  * if found the shared context assumed and reference counter is incremented.
 280  * If no context found the new one is created and initialized with specified
 281  * IB device context and parameters.
 282  *
 283  * @param[in] spawn
 284  *   Pointer to the IB device attributes (name, port, etc).
 285  *
 286  * @return
 287  *   Pointer to mlx5_ibv_shared object on success,
 288  *   otherwise NULL and rte_errno is set.
 289  */
 290 static struct mlx5_ibv_shared *
 291 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 292 {
 293         struct mlx5_ibv_shared *sh;
 294         int err = 0;
 295         uint32_t i;
 296
 297         assert(spawn);
 298         /* Secondary process should not create the shared context. */
 299         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 300         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 301         /* Search for IB context by device name. */
 302         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 303                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 304                         sh->refcnt++;
 305                         goto exit;
 306                 }
 307         }
 308         /* No device found, we have to create new shared context. */
 309         assert(spawn->max_port);
 310         sh = rte_zmalloc("ethdev shared ib context",
 311                          sizeof(struct mlx5_ibv_shared) +
 312                          spawn->max_port *
 313                          sizeof(struct mlx5_ibv_shared_port),
 314                          RTE_CACHE_LINE_SIZE);
 315         if (!sh) {
 316                 DRV_LOG(ERR, "shared context allocation failure");
 317                 rte_errno  = ENOMEM;
 318                 goto exit;
 319         }
 320         /* Try to open IB device with DV first, then usual Verbs. */
 321         errno = 0;
 322         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 323         if (sh->ctx) {
 324                 sh->devx = 1;
 325                 DRV_LOG(DEBUG, "DevX is supported");
 326         } else {
 327                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 328                 if (!sh->ctx) {
 329                         err = errno ? errno : ENODEV;
 330                         goto error;
 331                 }
 332                 DRV_LOG(DEBUG, "DevX is NOT supported");
 333         }
 334         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 335         if (err) {
 336                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 337                 goto error;
 338         }
 339         sh->refcnt = 1;
 340         sh->max_port = spawn->max_port;
 341         strncpy(sh->ibdev_name, sh->ctx->device->name,
 342                 sizeof(sh->ibdev_name));
 343         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 344                 sizeof(sh->ibdev_path));
 345         sh->pci_dev = spawn->pci_dev;
 346         pthread_mutex_init(&sh->intr_mutex, NULL);
 347         /*
 348          * Setting port_id to max unallowed value means
 349          * there is no interrupt subhandler installed for
 350          * the given port index i.
 351          */
 352         for (i = 0; i < sh->max_port; i++)
 353                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 354         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 355         if (sh->pd == NULL) {
 356                 DRV_LOG(ERR, "PD allocation failure");
 357                 err = ENOMEM;
 358                 goto error;
 359         }
 360         /*
 361          * Once the device is added to the list of memory event
 362          * callback, its global MR cache table cannot be expanded
 363          * on the fly because of deadlock. If it overflows, lookup
 364          * should be done by searching MR list linearly, which is slow.
 365          *
 366          * At this point the device is not added to the memory
 367          * event list yet, context is just being created.
 368          */
 369         err = mlx5_mr_btree_init(&sh->mr.cache,
 370                                  MLX5_MR_BTREE_CACHE_N * 2,
 371                                  sh->pci_dev->device.numa_node);
 372         if (err) {
 373                 err = rte_errno;
 374                 goto error;
 375         }
 376         mlx5_flow_counters_mng_init(sh);
 377         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 378 exit:
 379         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 380         return sh;
 381 error:
 382         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 383         assert(sh);
 384         if (sh->pd)
 385                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 386         if (sh->ctx)
 387                 claim_zero(mlx5_glue->close_device(sh->ctx));
 388         rte_free(sh);
 389         assert(err > 0);
 390         rte_errno = err;
 391         return NULL;
 392 }
 393
 394 /**
 395  * Free shared IB device context. Decrement counter and if zero free
 396  * all allocated resources and close handles.
 397  *
 398  * @param[in] sh
 399  *   Pointer to mlx5_ibv_shared object to free
 400  */
 401 static void
 402 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 403 {
 404         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 405 #ifndef NDEBUG
 406         /* Check the object presence in the list. */
 407         struct mlx5_ibv_shared *lctx;
 408
 409         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 410                 if (lctx == sh)
 411                         break;
 412         assert(lctx);
 413         if (lctx != sh) {
 414                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 415                 goto exit;
 416         }
 417 #endif
 418         assert(sh);
 419         assert(sh->refcnt);
 420         /* Secondary process should not free the shared context. */
 421         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 422         if (--sh->refcnt)
 423                 goto exit;
 424         /* Release created Memory Regions. */
 425         mlx5_mr_release(sh);
 426         LIST_REMOVE(sh, next);
 427         /*
 428          *  Ensure there is no async event handler installed.
 429          *  Only primary process handles async device events.
 430          **/
 431         mlx5_flow_counters_mng_close(sh);
 432         assert(!sh->intr_cnt);
 433         if (sh->intr_cnt)
 434                 mlx5_intr_callback_unregister
 435                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 436         pthread_mutex_destroy(&sh->intr_mutex);
 437         if (sh->pd)
 438                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 439         if (sh->ctx)
 440                 claim_zero(mlx5_glue->close_device(sh->ctx));
 441         rte_free(sh);
 442 exit:
 443         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 444 }
 445
 446 /**
 447  * Initialize DR related data within private structure.
 448  * Routine checks the reference counter and does actual
 449  * resources creation/initialization only if counter is zero.
 450  *
 451  * @param[in] priv
 452  *   Pointer to the private device data structure.
 453  *
 454  * @return
 455  *   Zero on success, positive error code otherwise.
 456  */
 457 static int
 458 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 459 {
 460 #ifdef HAVE_MLX5DV_DR
 461         struct mlx5_ibv_shared *sh = priv->sh;
 462         int err = 0;
 463         void *domain;
 464
 465         assert(sh);
 466         if (sh->dv_refcnt) {
 467                 /* Shared DV/DR structures is already initialized. */
 468                 sh->dv_refcnt++;
 469                 priv->dr_shared = 1;
 470                 return 0;
 471         }
 472         /* Reference counter is zero, we should initialize structures. */
 473         domain = mlx5_glue->dr_create_domain(sh->ctx,
 474                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 475         if (!domain) {
 476                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 477                 err = errno;
 478                 goto error;
 479         }
 480         sh->rx_domain = domain;
 481         domain = mlx5_glue->dr_create_domain(sh->ctx,
 482                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 483         if (!domain) {
 484                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 485                 err = errno;
 486                 goto error;
 487         }
 488         pthread_mutex_init(&sh->dv_mutex, NULL);
 489         sh->tx_domain = domain;
 490 #ifdef HAVE_MLX5DV_DR_ESWITCH
 491         if (priv->config.dv_esw_en) {
 492                 domain  = mlx5_glue->dr_create_domain
 493                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 494                 if (!domain) {
 495                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 496                         err = errno;
 497                         goto error;
 498                 }
 499                 sh->fdb_domain = domain;
 500                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 501         }
 502 #endif
 503         sh->dv_refcnt++;
 504         priv->dr_shared = 1;
 505         return 0;
 506
 507 error:
 508        /* Rollback the created objects. */
 509         if (sh->rx_domain) {
 510                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 511                 sh->rx_domain = NULL;
 512         }
 513         if (sh->tx_domain) {
 514                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 515                 sh->tx_domain = NULL;
 516         }
 517         if (sh->fdb_domain) {
 518                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 519                 sh->fdb_domain = NULL;
 520         }
 521         if (sh->esw_drop_action) {
 522                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 523                 sh->esw_drop_action = NULL;
 524         }
 525         return err;
 526 #else
 527         (void)priv;
 528         return 0;
 529 #endif
 530 }
 531
 532 /**
 533  * Destroy DR related data within private structure.
 534  *
 535  * @param[in] priv
 536  *   Pointer to the private device data structure.
 537  */
 538 static void
 539 mlx5_free_shared_dr(struct mlx5_priv *priv)
 540 {
 541 #ifdef HAVE_MLX5DV_DR
 542         struct mlx5_ibv_shared *sh;
 543
 544         if (!priv->dr_shared)
 545                 return;
 546         priv->dr_shared = 0;
 547         sh = priv->sh;
 548         assert(sh);
 549         assert(sh->dv_refcnt);
 550         if (sh->dv_refcnt && --sh->dv_refcnt)
 551                 return;
 552         if (sh->rx_domain) {
 553                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 554                 sh->rx_domain = NULL;
 555         }
 556         if (sh->tx_domain) {
 557                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 558                 sh->tx_domain = NULL;
 559         }
 560 #ifdef HAVE_MLX5DV_DR_ESWITCH
 561         if (sh->fdb_domain) {
 562                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 563                 sh->fdb_domain = NULL;
 564         }
 565         if (sh->esw_drop_action) {
 566                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 567                 sh->esw_drop_action = NULL;
 568         }
 569 #endif
 570         pthread_mutex_destroy(&sh->dv_mutex);
 571 #else
 572         (void)priv;
 573 #endif
 574 }
 575
 576 /**
 577  * Initialize shared data between primary and secondary process.
 578  *
 579  * A memzone is reserved by primary process and secondary processes attach to
 580  * the memzone.
 581  *
 582  * @return
 583  *   0 on success, a negative errno value otherwise and rte_errno is set.
 584  */
 585 static int
 586 mlx5_init_shared_data(void)
 587 {
 588         const struct rte_memzone *mz;
 589         int ret = 0;
 590
 591         rte_spinlock_lock(&mlx5_shared_data_lock);
 592         if (mlx5_shared_data == NULL) {
 593                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 594                         /* Allocate shared memory. */
 595                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 596                                                  sizeof(*mlx5_shared_data),
 597                                                  SOCKET_ID_ANY, 0);
 598                         if (mz == NULL) {
 599                                 DRV_LOG(ERR,
 600                                         "Cannot allocate mlx5 shared data\n");
 601                                 ret = -rte_errno;
 602                                 goto error;
 603                         }
 604                         mlx5_shared_data = mz->addr;
 605                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 606                         rte_spinlock_init(&mlx5_shared_data->lock);
 607                 } else {
 608                         /* Lookup allocated shared memory. */
 609                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 610                         if (mz == NULL) {
 611                                 DRV_LOG(ERR,
 612                                         "Cannot attach mlx5 shared data\n");
 613                                 ret = -rte_errno;
 614                                 goto error;
 615                         }
 616                         mlx5_shared_data = mz->addr;
 617                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 618                 }
 619         }
 620 error:
 621         rte_spinlock_unlock(&mlx5_shared_data_lock);
 622         return ret;
 623 }
 624
 625 /**
 626  * Retrieve integer value from environment variable.
 627  *
 628  * @param[in] name
 629  *   Environment variable name.
 630  *
 631  * @return
 632  *   Integer value, 0 if the variable is not set.
 633  */
 634 int
 635 mlx5_getenv_int(const char *name)
 636 {
 637         const char *val = getenv(name);
 638
 639         if (val == NULL)
 640                 return 0;
 641         return atoi(val);
 642 }
 643
 644 /**
 645  * Verbs callback to allocate a memory. This function should allocate the space
 646  * according to the size provided residing inside a huge page.
 647  * Please note that all allocation must respect the alignment from libmlx5
 648  * (i.e. currently sysconf(_SC_PAGESIZE)).
 649  *
 650  * @param[in] size
 651  *   The size in bytes of the memory to allocate.
 652  * @param[in] data
 653  *   A pointer to the callback data.
 654  *
 655  * @return
 656  *   Allocated buffer, NULL otherwise and rte_errno is set.
 657  */
 658 static void *
 659 mlx5_alloc_verbs_buf(size_t size, void *data)
 660 {
 661         struct mlx5_priv *priv = data;
 662         void *ret;
 663         size_t alignment = sysconf(_SC_PAGESIZE);
 664         unsigned int socket = SOCKET_ID_ANY;
 665
 666         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 667                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 668
 669                 socket = ctrl->socket;
 670         } else if (priv->verbs_alloc_ctx.type ==
 671                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 672                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 673
 674                 socket = ctrl->socket;
 675         }
 676         assert(data != NULL);
 677         ret = rte_malloc_socket(__func__, size, alignment, socket);
 678         if (!ret && size)
 679                 rte_errno = ENOMEM;
 680         return ret;
 681 }
 682
 683 /**
 684  * Verbs callback to free a memory.
 685  *
 686  * @param[in] ptr
 687  *   A pointer to the memory to free.
 688  * @param[in] data
 689  *   A pointer to the callback data.
 690  */
 691 static void
 692 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 693 {
 694         assert(data != NULL);
 695         rte_free(ptr);
 696 }
 697
 698 /**
 699  * Initialize process private data structure.
 700  *
 701  * @param dev
 702  *   Pointer to Ethernet device structure.
 703  *
 704  * @return
 705  *   0 on success, a negative errno value otherwise and rte_errno is set.
 706  */
 707 int
 708 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 709 {
 710         struct mlx5_priv *priv = dev->data->dev_private;
 711         struct mlx5_proc_priv *ppriv;
 712         size_t ppriv_size;
 713
 714         /*
 715          * UAR register table follows the process private structure. BlueFlame
 716          * registers for Tx queues are stored in the table.
 717          */
 718         ppriv_size =
 719                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 720         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 721                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 722         if (!ppriv) {
 723                 rte_errno = ENOMEM;
 724                 return -rte_errno;
 725         }
 726         ppriv->uar_table_sz = ppriv_size;
 727         dev->process_private = ppriv;
 728         return 0;
 729 }
 730
 731 /**
 732  * Un-initialize process private data structure.
 733  *
 734  * @param dev
 735  *   Pointer to Ethernet device structure.
 736  */
 737 static void
 738 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 739 {
 740         if (!dev->process_private)
 741                 return;
 742         rte_free(dev->process_private);
 743         dev->process_private = NULL;
 744 }
 745
 746 /**
 747  * DPDK callback to close the device.
 748  *
 749  * Destroy all queues and objects, free memory.
 750  *
 751  * @param dev
 752  *   Pointer to Ethernet device structure.
 753  */
 754 static void
 755 mlx5_dev_close(struct rte_eth_dev *dev)
 756 {
 757         struct mlx5_priv *priv = dev->data->dev_private;
 758         unsigned int i;
 759         int ret;
 760
 761         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 762                 dev->data->port_id,
 763                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 764         /* In case mlx5_dev_stop() has not been called. */
 765         mlx5_dev_interrupt_handler_uninstall(dev);
 766         mlx5_traffic_disable(dev);
 767         mlx5_flow_flush(dev, NULL);
 768         /* Prevent crashes when queues are still in use. */
 769         dev->rx_pkt_burst = removed_rx_burst;
 770         dev->tx_pkt_burst = removed_tx_burst;
 771         rte_wmb();
 772         /* Disable datapath on secondary process. */
 773         mlx5_mp_req_stop_rxtx(dev);
 774         if (priv->rxqs != NULL) {
 775                 /* XXX race condition if mlx5_rx_burst() is still running. */
 776                 usleep(1000);
 777                 for (i = 0; (i != priv->rxqs_n); ++i)
 778                         mlx5_rxq_release(dev, i);
 779                 priv->rxqs_n = 0;
 780                 priv->rxqs = NULL;
 781         }
 782         if (priv->txqs != NULL) {
 783                 /* XXX race condition if mlx5_tx_burst() is still running. */
 784                 usleep(1000);
 785                 for (i = 0; (i != priv->txqs_n); ++i)
 786                         mlx5_txq_release(dev, i);
 787                 priv->txqs_n = 0;
 788                 priv->txqs = NULL;
 789         }
 790         mlx5_proc_priv_uninit(dev);
 791         mlx5_mprq_free_mp(dev);
 792         /* Remove from memory callback device list. */
 793         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 794         assert(priv->sh);
 795         LIST_REMOVE(priv->sh, mem_event_cb);
 796         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 797         mlx5_free_shared_dr(priv);
 798         if (priv->rss_conf.rss_key != NULL)
 799                 rte_free(priv->rss_conf.rss_key);
 800         if (priv->reta_idx != NULL)
 801                 rte_free(priv->reta_idx);
 802         if (priv->config.vf)
 803                 mlx5_nl_mac_addr_flush(dev);
 804         if (priv->nl_socket_route >= 0)
 805                 close(priv->nl_socket_route);
 806         if (priv->nl_socket_rdma >= 0)
 807                 close(priv->nl_socket_rdma);
 808         if (priv->sh) {
 809                 /*
 810                  * Free the shared context in last turn, because the cleanup
 811                  * routines above may use some shared fields, like
 812                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 813                  * ifindex if Netlink fails.
 814                  */
 815                 mlx5_free_shared_ibctx(priv->sh);
 816                 priv->sh = NULL;
 817         }
 818         ret = mlx5_hrxq_ibv_verify(dev);
 819         if (ret)
 820                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 821                         dev->data->port_id);
 822         ret = mlx5_ind_table_ibv_verify(dev);
 823         if (ret)
 824                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 825                         dev->data->port_id);
 826         ret = mlx5_rxq_obj_verify(dev);
 827         if (ret)
 828                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
 829                         dev->data->port_id);
 830         ret = mlx5_rxq_verify(dev);
 831         if (ret)
 832                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 833                         dev->data->port_id);
 834         ret = mlx5_txq_ibv_verify(dev);
 835         if (ret)
 836                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 837                         dev->data->port_id);
 838         ret = mlx5_txq_verify(dev);
 839         if (ret)
 840                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 841                         dev->data->port_id);
 842         ret = mlx5_flow_verify(dev);
 843         if (ret)
 844                 DRV_LOG(WARNING, "port %u some flows still remain",
 845                         dev->data->port_id);
 846         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 847                 unsigned int c = 0;
 848                 uint16_t port_id;
 849
 850                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 851                         struct mlx5_priv *opriv =
 852                                 rte_eth_devices[port_id].data->dev_private;
 853
 854                         if (!opriv ||
 855                             opriv->domain_id != priv->domain_id ||
 856                             &rte_eth_devices[port_id] == dev)
 857                                 continue;
 858                         ++c;
 859                 }
 860                 if (!c)
 861                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 862         }
 863         memset(priv, 0, sizeof(*priv));
 864         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 865         /*
 866          * Reset mac_addrs to NULL such that it is not freed as part of
 867          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 868          * it is freed when dev_private is freed.
 869          */
 870         dev->data->mac_addrs = NULL;
 871 }
 872
 873 const struct eth_dev_ops mlx5_dev_ops = {
 874         .dev_configure = mlx5_dev_configure,
 875         .dev_start = mlx5_dev_start,
 876         .dev_stop = mlx5_dev_stop,
 877         .dev_set_link_down = mlx5_set_link_down,
 878         .dev_set_link_up = mlx5_set_link_up,
 879         .dev_close = mlx5_dev_close,
 880         .promiscuous_enable = mlx5_promiscuous_enable,
 881         .promiscuous_disable = mlx5_promiscuous_disable,
 882         .allmulticast_enable = mlx5_allmulticast_enable,
 883         .allmulticast_disable = mlx5_allmulticast_disable,
 884         .link_update = mlx5_link_update,
 885         .stats_get = mlx5_stats_get,
 886         .stats_reset = mlx5_stats_reset,
 887         .xstats_get = mlx5_xstats_get,
 888         .xstats_reset = mlx5_xstats_reset,
 889         .xstats_get_names = mlx5_xstats_get_names,
 890         .fw_version_get = mlx5_fw_version_get,
 891         .dev_infos_get = mlx5_dev_infos_get,
 892         .read_clock = mlx5_read_clock,
 893         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 894         .vlan_filter_set = mlx5_vlan_filter_set,
 895         .rx_queue_setup = mlx5_rx_queue_setup,
 896         .tx_queue_setup = mlx5_tx_queue_setup,
 897         .rx_queue_release = mlx5_rx_queue_release,
 898         .tx_queue_release = mlx5_tx_queue_release,
 899         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 900         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 901         .mac_addr_remove = mlx5_mac_addr_remove,
 902         .mac_addr_add = mlx5_mac_addr_add,
 903         .mac_addr_set = mlx5_mac_addr_set,
 904         .set_mc_addr_list = mlx5_set_mc_addr_list,
 905         .mtu_set = mlx5_dev_set_mtu,
 906         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 907         .vlan_offload_set = mlx5_vlan_offload_set,
 908         .reta_update = mlx5_dev_rss_reta_update,
 909         .reta_query = mlx5_dev_rss_reta_query,
 910         .rss_hash_update = mlx5_rss_hash_update,
 911         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 912         .filter_ctrl = mlx5_dev_filter_ctrl,
 913         .rx_descriptor_status = mlx5_rx_descriptor_status,
 914         .tx_descriptor_status = mlx5_tx_descriptor_status,
 915         .rx_queue_count = mlx5_rx_queue_count,
 916         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 917         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 918         .is_removed = mlx5_is_removed,
 919 };
 920
 921 /* Available operations from secondary process. */
 922 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 923         .stats_get = mlx5_stats_get,
 924         .stats_reset = mlx5_stats_reset,
 925         .xstats_get = mlx5_xstats_get,
 926         .xstats_reset = mlx5_xstats_reset,
 927         .xstats_get_names = mlx5_xstats_get_names,
 928         .fw_version_get = mlx5_fw_version_get,
 929         .dev_infos_get = mlx5_dev_infos_get,
 930         .rx_descriptor_status = mlx5_rx_descriptor_status,
 931         .tx_descriptor_status = mlx5_tx_descriptor_status,
 932 };
 933
 934 /* Available operations in flow isolated mode. */
 935 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 936         .dev_configure = mlx5_dev_configure,
 937         .dev_start = mlx5_dev_start,
 938         .dev_stop = mlx5_dev_stop,
 939         .dev_set_link_down = mlx5_set_link_down,
 940         .dev_set_link_up = mlx5_set_link_up,
 941         .dev_close = mlx5_dev_close,
 942         .promiscuous_enable = mlx5_promiscuous_enable,
 943         .promiscuous_disable = mlx5_promiscuous_disable,
 944         .allmulticast_enable = mlx5_allmulticast_enable,
 945         .allmulticast_disable = mlx5_allmulticast_disable,
 946         .link_update = mlx5_link_update,
 947         .stats_get = mlx5_stats_get,
 948         .stats_reset = mlx5_stats_reset,
 949         .xstats_get = mlx5_xstats_get,
 950         .xstats_reset = mlx5_xstats_reset,
 951         .xstats_get_names = mlx5_xstats_get_names,
 952         .fw_version_get = mlx5_fw_version_get,
 953         .dev_infos_get = mlx5_dev_infos_get,
 954         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 955         .vlan_filter_set = mlx5_vlan_filter_set,
 956         .rx_queue_setup = mlx5_rx_queue_setup,
 957         .tx_queue_setup = mlx5_tx_queue_setup,
 958         .rx_queue_release = mlx5_rx_queue_release,
 959         .tx_queue_release = mlx5_tx_queue_release,
 960         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 961         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 962         .mac_addr_remove = mlx5_mac_addr_remove,
 963         .mac_addr_add = mlx5_mac_addr_add,
 964         .mac_addr_set = mlx5_mac_addr_set,
 965         .set_mc_addr_list = mlx5_set_mc_addr_list,
 966         .mtu_set = mlx5_dev_set_mtu,
 967         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 968         .vlan_offload_set = mlx5_vlan_offload_set,
 969         .filter_ctrl = mlx5_dev_filter_ctrl,
 970         .rx_descriptor_status = mlx5_rx_descriptor_status,
 971         .tx_descriptor_status = mlx5_tx_descriptor_status,
 972         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 973         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 974         .is_removed = mlx5_is_removed,
 975 };
 976
 977 /**
 978  * Verify and store value for device argument.
 979  *
 980  * @param[in] key
 981  *   Key argument to verify.
 982  * @param[in] val
 983  *   Value associated with key.
 984  * @param opaque
 985  *   User data.
 986  *
 987  * @return
 988  *   0 on success, a negative errno value otherwise and rte_errno is set.
 989  */
 990 static int
 991 mlx5_args_check(const char *key, const char *val, void *opaque)
 992 {
 993         struct mlx5_dev_config *config = opaque;
 994         unsigned long tmp;
 995
 996         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 997         if (!strcmp(MLX5_REPRESENTOR, key))
 998                 return 0;
 999         errno = 0;
1000         tmp = strtoul(val, NULL, 0);
1001         if (errno) {
1002                 rte_errno = errno;
1003                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1004                 return -rte_errno;
1005         }
1006         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1007                 config->cqe_comp = !!tmp;
1008         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1009                 config->cqe_pad = !!tmp;
1010         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1011                 config->hw_padding = !!tmp;
1012         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1013                 config->mprq.enabled = !!tmp;
1014         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1015                 config->mprq.stride_num_n = tmp;
1016         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1017                 config->mprq.max_memcpy_len = tmp;
1018         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1019                 config->mprq.min_rxqs_num = tmp;
1020         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1021                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1022                                  " converted to txq_inline_max", key);
1023                 config->txq_inline_max = tmp;
1024         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1025                 config->txq_inline_max = tmp;
1026         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1027                 config->txq_inline_min = tmp;
1028         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1029                 config->txq_inline_mpw = tmp;
1030         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1031                 config->txqs_inline = tmp;
1032         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1033                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1034         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1035                 config->mps = !!tmp;
1036         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1037                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1038         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1039                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1040                                  " converted to txq_inline_mpw", key);
1041                 config->txq_inline_mpw = tmp;
1042         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1043                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1044         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1045                 config->rx_vec_en = !!tmp;
1046         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1047                 config->l3_vxlan_en = !!tmp;
1048         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1049                 config->vf_nl_en = !!tmp;
1050         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1051                 config->dv_esw_en = !!tmp;
1052         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1053                 config->dv_flow_en = !!tmp;
1054         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1055                 config->mr_ext_memseg_en = !!tmp;
1056         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1057                 config->max_dump_files_num = tmp;
1058         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1059                 config->lro.timeout = tmp;
1060         } else {
1061                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1062                 rte_errno = EINVAL;
1063                 return -rte_errno;
1064         }
1065         return 0;
1066 }
1067
1068 /**
1069  * Parse device parameters.
1070  *
1071  * @param config
1072  *   Pointer to device configuration structure.
1073  * @param devargs
1074  *   Device arguments structure.
1075  *
1076  * @return
1077  *   0 on success, a negative errno value otherwise and rte_errno is set.
1078  */
1079 static int
1080 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1081 {
1082         const char **params = (const char *[]){
1083                 MLX5_RXQ_CQE_COMP_EN,
1084                 MLX5_RXQ_CQE_PAD_EN,
1085                 MLX5_RXQ_PKT_PAD_EN,
1086                 MLX5_RX_MPRQ_EN,
1087                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1088                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1089                 MLX5_RXQS_MIN_MPRQ,
1090                 MLX5_TXQ_INLINE,
1091                 MLX5_TXQ_INLINE_MIN,
1092                 MLX5_TXQ_INLINE_MAX,
1093                 MLX5_TXQ_INLINE_MPW,
1094                 MLX5_TXQS_MIN_INLINE,
1095                 MLX5_TXQS_MAX_VEC,
1096                 MLX5_TXQ_MPW_EN,
1097                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1098                 MLX5_TXQ_MAX_INLINE_LEN,
1099                 MLX5_TX_VEC_EN,
1100                 MLX5_RX_VEC_EN,
1101                 MLX5_L3_VXLAN_EN,
1102                 MLX5_VF_NL_EN,
1103                 MLX5_DV_ESW_EN,
1104                 MLX5_DV_FLOW_EN,
1105                 MLX5_MR_EXT_MEMSEG_EN,
1106                 MLX5_REPRESENTOR,
1107                 MLX5_MAX_DUMP_FILES_NUM,
1108                 MLX5_LRO_TIMEOUT_USEC,
1109                 NULL,
1110         };
1111         struct rte_kvargs *kvlist;
1112         int ret = 0;
1113         int i;
1114
1115         if (devargs == NULL)
1116                 return 0;
1117         /* Following UGLY cast is done to pass checkpatch. */
1118         kvlist = rte_kvargs_parse(devargs->args, params);
1119         if (kvlist == NULL) {
1120                 rte_errno = EINVAL;
1121                 return -rte_errno;
1122         }
1123         /* Process parameters. */
1124         for (i = 0; (params[i] != NULL); ++i) {
1125                 if (rte_kvargs_count(kvlist, params[i])) {
1126                         ret = rte_kvargs_process(kvlist, params[i],
1127                                                  mlx5_args_check, config);
1128                         if (ret) {
1129                                 rte_errno = EINVAL;
1130                                 rte_kvargs_free(kvlist);
1131                                 return -rte_errno;
1132                         }
1133                 }
1134         }
1135         rte_kvargs_free(kvlist);
1136         return 0;
1137 }
1138
1139 static struct rte_pci_driver mlx5_driver;
1140
1141 /**
1142  * PMD global initialization.
1143  *
1144  * Independent from individual device, this function initializes global
1145  * per-PMD data structures distinguishing primary and secondary processes.
1146  * Hence, each initialization is called once per a process.
1147  *
1148  * @return
1149  *   0 on success, a negative errno value otherwise and rte_errno is set.
1150  */
1151 static int
1152 mlx5_init_once(void)
1153 {
1154         struct mlx5_shared_data *sd;
1155         struct mlx5_local_data *ld = &mlx5_local_data;
1156         int ret = 0;
1157
1158         if (mlx5_init_shared_data())
1159                 return -rte_errno;
1160         sd = mlx5_shared_data;
1161         assert(sd);
1162         rte_spinlock_lock(&sd->lock);
1163         switch (rte_eal_process_type()) {
1164         case RTE_PROC_PRIMARY:
1165                 if (sd->init_done)
1166                         break;
1167                 LIST_INIT(&sd->mem_event_cb_list);
1168                 rte_rwlock_init(&sd->mem_event_rwlock);
1169                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1170                                                 mlx5_mr_mem_event_cb, NULL);
1171                 ret = mlx5_mp_init_primary();
1172                 if (ret)
1173                         goto out;
1174                 sd->init_done = true;
1175                 break;
1176         case RTE_PROC_SECONDARY:
1177                 if (ld->init_done)
1178                         break;
1179                 ret = mlx5_mp_init_secondary();
1180                 if (ret)
1181                         goto out;
1182                 ++sd->secondary_cnt;
1183                 ld->init_done = true;
1184                 break;
1185         default:
1186                 break;
1187         }
1188 out:
1189         rte_spinlock_unlock(&sd->lock);
1190         return ret;
1191 }
1192
1193 /**
1194  * Configures the minimal amount of data to inline into WQE
1195  * while sending packets.
1196  *
1197  * - the txq_inline_min has the maximal priority, if this
1198  *   key is specified in devargs
1199  * - if DevX is enabled the inline mode is queried from the
1200  *   device (HCA attributes and NIC vport context if needed).
1201  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1202  *   and none (0 bytes) for other NICs
1203  *
1204  * @param spawn
1205  *   Verbs device parameters (name, port, switch_info) to spawn.
1206  * @param config
1207  *   Device configuration parameters.
1208  */
1209 static void
1210 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1211                     struct mlx5_dev_config *config)
1212 {
1213         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1214                 /* Application defines size of inlined data explicitly. */
1215                 switch (spawn->pci_dev->id.device_id) {
1216                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1217                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1218                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1219                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1220                         if (config->txq_inline_min <
1221                                        (int)MLX5_INLINE_HSIZE_L2) {
1222                                 DRV_LOG(DEBUG,
1223                                         "txq_inline_mix aligned to minimal"
1224                                         " ConnectX-4 required value %d",
1225                                         (int)MLX5_INLINE_HSIZE_L2);
1226                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1227                         }
1228                         break;
1229                 }
1230                 goto exit;
1231         }
1232         if (config->hca_attr.eth_net_offloads) {
1233                 /* We have DevX enabled, inline mode queried successfully. */
1234                 switch (config->hca_attr.wqe_inline_mode) {
1235                 case MLX5_CAP_INLINE_MODE_L2:
1236                         /* outer L2 header must be inlined. */
1237                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1238                         goto exit;
1239                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1240                         /* No inline data are required by NIC. */
1241                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1242                         config->hw_vlan_insert =
1243                                 config->hca_attr.wqe_vlan_insert;
1244                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1245                         goto exit;
1246                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1247                         /* inline mode is defined by NIC vport context. */
1248                         if (!config->hca_attr.eth_virt)
1249                                 break;
1250                         switch (config->hca_attr.vport_inline_mode) {
1251                         case MLX5_INLINE_MODE_NONE:
1252                                 config->txq_inline_min =
1253                                         MLX5_INLINE_HSIZE_NONE;
1254                                 goto exit;
1255                         case MLX5_INLINE_MODE_L2:
1256                                 config->txq_inline_min =
1257                                         MLX5_INLINE_HSIZE_L2;
1258                                 goto exit;
1259                         case MLX5_INLINE_MODE_IP:
1260                                 config->txq_inline_min =
1261                                         MLX5_INLINE_HSIZE_L3;
1262                                 goto exit;
1263                         case MLX5_INLINE_MODE_TCP_UDP:
1264                                 config->txq_inline_min =
1265                                         MLX5_INLINE_HSIZE_L4;
1266                                 goto exit;
1267                         case MLX5_INLINE_MODE_INNER_L2:
1268                                 config->txq_inline_min =
1269                                         MLX5_INLINE_HSIZE_INNER_L2;
1270                                 goto exit;
1271                         case MLX5_INLINE_MODE_INNER_IP:
1272                                 config->txq_inline_min =
1273                                         MLX5_INLINE_HSIZE_INNER_L3;
1274                                 goto exit;
1275                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1276                                 config->txq_inline_min =
1277                                         MLX5_INLINE_HSIZE_INNER_L4;
1278                                 goto exit;
1279                         }
1280                 }
1281         }
1282         /*
1283          * We get here if we are unable to deduce
1284          * inline data size with DevX. Try PCI ID
1285          * to determine old NICs.
1286          */
1287         switch (spawn->pci_dev->id.device_id) {
1288         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1289         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1290         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1291         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1292                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1293                 config->hw_vlan_insert = 0;
1294                 break;
1295         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1296         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1297         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1298         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1299                 /*
1300                  * These NICs support VLAN insertion from WQE and
1301                  * report the wqe_vlan_insert flag. But there is the bug
1302                  * and PFC control may be broken, so disable feature.
1303                  */
1304                 config->hw_vlan_insert = 0;
1305                 break;
1306         default:
1307                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1308                 break;
1309         }
1310 exit:
1311         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1312 }
1313
1314 /**
1315  * Allocate page of door-bells and register it using DevX API.
1316  *
1317  * @param [in] dev
1318  *   Pointer to Ethernet device.
1319  *
1320  * @return
1321  *   Pointer to new page on success, NULL otherwise.
1322  */
1323 static struct mlx5_devx_dbr_page *
1324 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1325 {
1326         struct mlx5_priv *priv = dev->data->dev_private;
1327         struct mlx5_devx_dbr_page *page;
1328
1329         /* Allocate space for door-bell page and management data. */
1330         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1331                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1332         if (!page) {
1333                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1334                         dev->data->port_id);
1335                 return NULL;
1336         }
1337         /* Register allocated memory. */
1338         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1339                                               MLX5_DBR_PAGE_SIZE, 0);
1340         if (!page->umem) {
1341                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1342                         dev->data->port_id);
1343                 rte_free(page);
1344                 return NULL;
1345         }
1346         return page;
1347 }
1348
1349 /**
1350  * Find the next available door-bell, allocate new page if needed.
1351  *
1352  * @param [in] dev
1353  *   Pointer to Ethernet device.
1354  * @param [out] dbr_page
1355  *   Door-bell page containing the page data.
1356  *
1357  * @return
1358  *   Door-bell address offset on success, a negative error value otherwise.
1359  */
1360 int64_t
1361 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1362 {
1363         struct mlx5_priv *priv = dev->data->dev_private;
1364         struct mlx5_devx_dbr_page *page = NULL;
1365         uint32_t i, j;
1366
1367         LIST_FOREACH(page, &priv->dbrpgs, next)
1368                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1369                         break;
1370         if (!page) { /* No page with free door-bell exists. */
1371                 page = mlx5_alloc_dbr_page(dev);
1372                 if (!page) /* Failed to allocate new page. */
1373                         return (-1);
1374                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1375         }
1376         /* Loop to find bitmap part with clear bit. */
1377         for (i = 0;
1378              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1379              i++)
1380                 ; /* Empty. */
1381         /* Find the first clear bit. */
1382         j = rte_bsf64(~page->dbr_bitmap[i]);
1383         assert(i < (MLX5_DBR_PER_PAGE / 64));
1384         page->dbr_bitmap[i] |= (1 << j);
1385         page->dbr_count++;
1386         *dbr_page = page;
1387         return (((i * 64) + j) * sizeof(uint64_t));
1388 }
1389
1390 /**
1391  * Release a door-bell record.
1392  *
1393  * @param [in] dev
1394  *   Pointer to Ethernet device.
1395  * @param [in] umem_id
1396  *   UMEM ID of page containing the door-bell record to release.
1397  * @param [in] offset
1398  *   Offset of door-bell record in page.
1399  *
1400  * @return
1401  *   0 on success, a negative error value otherwise.
1402  */
1403 int32_t
1404 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1405 {
1406         struct mlx5_priv *priv = dev->data->dev_private;
1407         struct mlx5_devx_dbr_page *page = NULL;
1408         int ret = 0;
1409
1410         LIST_FOREACH(page, &priv->dbrpgs, next)
1411                 /* Find the page this address belongs to. */
1412                 if (page->umem->umem_id == umem_id)
1413                         break;
1414         if (!page)
1415                 return -EINVAL;
1416         page->dbr_count--;
1417         if (!page->dbr_count) {
1418                 /* Page not used, free it and remove from list. */
1419                 LIST_REMOVE(page, next);
1420                 if (page->umem)
1421                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1422                 rte_free(page);
1423         } else {
1424                 /* Mark in bitmap that this door-bell is not in use. */
1425                 int i = offset / 64;
1426                 int j = offset % 64;
1427
1428                 page->dbr_bitmap[i] &= ~(1 << j);
1429         }
1430         return ret;
1431 }
1432
1433 /**
1434  * Spawn an Ethernet device from Verbs information.
1435  *
1436  * @param dpdk_dev
1437  *   Backing DPDK device.
1438  * @param spawn
1439  *   Verbs device parameters (name, port, switch_info) to spawn.
1440  * @param config
1441  *   Device configuration parameters.
1442  *
1443  * @return
1444  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1445  *   is set. The following errors are defined:
1446  *
1447  *   EBUSY: device is not supposed to be spawned.
1448  *   EEXIST: device is already spawned
1449  */
1450 static struct rte_eth_dev *
1451 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1452                struct mlx5_dev_spawn_data *spawn,
1453                struct mlx5_dev_config config)
1454 {
1455         const struct mlx5_switch_info *switch_info = &spawn->info;
1456         struct mlx5_ibv_shared *sh = NULL;
1457         struct ibv_port_attr port_attr;
1458         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1459         struct rte_eth_dev *eth_dev = NULL;
1460         struct mlx5_priv *priv = NULL;
1461         int err = 0;
1462         unsigned int hw_padding = 0;
1463         unsigned int mps;
1464         unsigned int cqe_comp;
1465         unsigned int cqe_pad = 0;
1466         unsigned int tunnel_en = 0;
1467         unsigned int mpls_en = 0;
1468         unsigned int swp = 0;
1469         unsigned int mprq = 0;
1470         unsigned int mprq_min_stride_size_n = 0;
1471         unsigned int mprq_max_stride_size_n = 0;
1472         unsigned int mprq_min_stride_num_n = 0;
1473         unsigned int mprq_max_stride_num_n = 0;
1474         struct rte_ether_addr mac;
1475         char name[RTE_ETH_NAME_MAX_LEN];
1476         int own_domain_id = 0;
1477         uint16_t port_id;
1478         unsigned int i;
1479
1480         /* Determine if this port representor is supposed to be spawned. */
1481         if (switch_info->representor && dpdk_dev->devargs) {
1482                 struct rte_eth_devargs eth_da;
1483
1484                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1485                 if (err) {
1486                         rte_errno = -err;
1487                         DRV_LOG(ERR, "failed to process device arguments: %s",
1488                                 strerror(rte_errno));
1489                         return NULL;
1490                 }
1491                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1492                         if (eth_da.representor_ports[i] ==
1493                             (uint16_t)switch_info->port_name)
1494                                 break;
1495                 if (i == eth_da.nb_representor_ports) {
1496                         rte_errno = EBUSY;
1497                         return NULL;
1498                 }
1499         }
1500         /* Build device name. */
1501         if (!switch_info->representor)
1502                 strlcpy(name, dpdk_dev->name, sizeof(name));
1503         else
1504                 snprintf(name, sizeof(name), "%s_representor_%u",
1505                          dpdk_dev->name, switch_info->port_name);
1506         /* check if the device is already spawned */
1507         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1508                 rte_errno = EEXIST;
1509                 return NULL;
1510         }
1511         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1512         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1513                 eth_dev = rte_eth_dev_attach_secondary(name);
1514                 if (eth_dev == NULL) {
1515                         DRV_LOG(ERR, "can not attach rte ethdev");
1516                         rte_errno = ENOMEM;
1517                         return NULL;
1518                 }
1519                 eth_dev->device = dpdk_dev;
1520                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1521                 err = mlx5_proc_priv_init(eth_dev);
1522                 if (err)
1523                         return NULL;
1524                 /* Receive command fd from primary process */
1525                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1526                 if (err < 0)
1527                         return NULL;
1528                 /* Remap UAR for Tx queues. */
1529                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1530                 if (err)
1531                         return NULL;
1532                 /*
1533                  * Ethdev pointer is still required as input since
1534                  * the primary device is not accessible from the
1535                  * secondary process.
1536                  */
1537                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1538                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1539                 return eth_dev;
1540         }
1541         sh = mlx5_alloc_shared_ibctx(spawn);
1542         if (!sh)
1543                 return NULL;
1544         config.devx = sh->devx;
1545 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1546         config.dest_tir = 1;
1547 #endif
1548 #ifdef HAVE_IBV_MLX5_MOD_SWP
1549         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1550 #endif
1551         /*
1552          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1553          * as all ConnectX-5 devices.
1554          */
1555 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1556         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1557 #endif
1558 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1559         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1560 #endif
1561         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1562         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1563                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1564                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1565                         mps = MLX5_MPW_ENHANCED;
1566                 } else {
1567                         DRV_LOG(DEBUG, "MPW is supported");
1568                         mps = MLX5_MPW;
1569                 }
1570         } else {
1571                 DRV_LOG(DEBUG, "MPW isn't supported");
1572                 mps = MLX5_MPW_DISABLED;
1573         }
1574 #ifdef HAVE_IBV_MLX5_MOD_SWP
1575         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1576                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1577         DRV_LOG(DEBUG, "SWP support: %u", swp);
1578 #endif
1579         config.swp = !!swp;
1580 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1581         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1582                 struct mlx5dv_striding_rq_caps mprq_caps =
1583                         dv_attr.striding_rq_caps;
1584
1585                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1586                         mprq_caps.min_single_stride_log_num_of_bytes);
1587                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1588                         mprq_caps.max_single_stride_log_num_of_bytes);
1589                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1590                         mprq_caps.min_single_wqe_log_num_of_strides);
1591                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1592                         mprq_caps.max_single_wqe_log_num_of_strides);
1593                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1594                         mprq_caps.supported_qpts);
1595                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1596                 mprq = 1;
1597                 mprq_min_stride_size_n =
1598                         mprq_caps.min_single_stride_log_num_of_bytes;
1599                 mprq_max_stride_size_n =
1600                         mprq_caps.max_single_stride_log_num_of_bytes;
1601                 mprq_min_stride_num_n =
1602                         mprq_caps.min_single_wqe_log_num_of_strides;
1603                 mprq_max_stride_num_n =
1604                         mprq_caps.max_single_wqe_log_num_of_strides;
1605                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1606                                                    mprq_min_stride_num_n);
1607         }
1608 #endif
1609         if (RTE_CACHE_LINE_SIZE == 128 &&
1610             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1611                 cqe_comp = 0;
1612         else
1613                 cqe_comp = 1;
1614         config.cqe_comp = cqe_comp;
1615 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1616         /* Whether device supports 128B Rx CQE padding. */
1617         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1618                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1619 #endif
1620 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1621         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1622                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1623                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1624                              (dv_attr.tunnel_offloads_caps &
1625                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1626         }
1627         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1628                 tunnel_en ? "" : "not ");
1629 #else
1630         DRV_LOG(WARNING,
1631                 "tunnel offloading disabled due to old OFED/rdma-core version");
1632 #endif
1633         config.tunnel_en = tunnel_en;
1634 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1635         mpls_en = ((dv_attr.tunnel_offloads_caps &
1636                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1637                    (dv_attr.tunnel_offloads_caps &
1638                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1639         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1640                 mpls_en ? "" : "not ");
1641 #else
1642         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1643                 " old OFED/rdma-core version or firmware configuration");
1644 #endif
1645         config.mpls_en = mpls_en;
1646         /* Check port status. */
1647         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1648         if (err) {
1649                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1650                 goto error;
1651         }
1652         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1653                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1654                 err = EINVAL;
1655                 goto error;
1656         }
1657         if (port_attr.state != IBV_PORT_ACTIVE)
1658                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1659                         mlx5_glue->port_state_str(port_attr.state),
1660                         port_attr.state);
1661         /* Allocate private eth device data. */
1662         priv = rte_zmalloc("ethdev private structure",
1663                            sizeof(*priv),
1664                            RTE_CACHE_LINE_SIZE);
1665         if (priv == NULL) {
1666                 DRV_LOG(ERR, "priv allocation failure");
1667                 err = ENOMEM;
1668                 goto error;
1669         }
1670         priv->sh = sh;
1671         priv->ibv_port = spawn->ibv_port;
1672         priv->mtu = RTE_ETHER_MTU;
1673 #ifndef RTE_ARCH_64
1674         /* Initialize UAR access locks for 32bit implementations. */
1675         rte_spinlock_init(&priv->uar_lock_cq);
1676         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1677                 rte_spinlock_init(&priv->uar_lock[i]);
1678 #endif
1679         /* Some internal functions rely on Netlink sockets, open them now. */
1680         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1681         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1682         priv->nl_sn = 0;
1683         priv->representor = !!switch_info->representor;
1684         priv->master = !!switch_info->master;
1685         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1686         /*
1687          * Currently we support single E-Switch per PF configurations
1688          * only and vport_id field contains the vport index for
1689          * associated VF, which is deduced from representor port name.
1690          * For example, let's have the IB device port 10, it has
1691          * attached network device eth0, which has port name attribute
1692          * pf0vf2, we can deduce the VF number as 2, and set vport index
1693          * as 3 (2+1). This assigning schema should be changed if the
1694          * multiple E-Switch instances per PF configurations or/and PCI
1695          * subfunctions are added.
1696          */
1697         priv->vport_id = switch_info->representor ?
1698                          switch_info->port_name + 1 : -1;
1699         /* representor_id field keeps the unmodified port/VF index. */
1700         priv->representor_id = switch_info->representor ?
1701                                switch_info->port_name : -1;
1702         /*
1703          * Look for sibling devices in order to reuse their switch domain
1704          * if any, otherwise allocate one.
1705          */
1706         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1707                 const struct mlx5_priv *opriv =
1708                         rte_eth_devices[port_id].data->dev_private;
1709
1710                 if (!opriv ||
1711                         opriv->domain_id ==
1712                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1713                         continue;
1714                 priv->domain_id = opriv->domain_id;
1715                 break;
1716         }
1717         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1718                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1719                 if (err) {
1720                         err = rte_errno;
1721                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1722                                 strerror(rte_errno));
1723                         goto error;
1724                 }
1725                 own_domain_id = 1;
1726         }
1727         err = mlx5_args(&config, dpdk_dev->devargs);
1728         if (err) {
1729                 err = rte_errno;
1730                 DRV_LOG(ERR, "failed to process device arguments: %s",
1731                         strerror(rte_errno));
1732                 goto error;
1733         }
1734         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1735                             IBV_DEVICE_RAW_IP_CSUM);
1736         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1737                 (config.hw_csum ? "" : "not "));
1738 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1739         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1740         DRV_LOG(DEBUG, "counters are not supported");
1741 #endif
1742 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1743         if (config.dv_flow_en) {
1744                 DRV_LOG(WARNING, "DV flow is not supported");
1745                 config.dv_flow_en = 0;
1746         }
1747 #endif
1748         config.ind_table_max_size =
1749                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1750         /*
1751          * Remove this check once DPDK supports larger/variable
1752          * indirection tables.
1753          */
1754         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1755                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1756         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1757                 config.ind_table_max_size);
1758         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1759                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1760         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1761                 (config.hw_vlan_strip ? "" : "not "));
1762         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1763                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1764         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1765                 (config.hw_fcs_strip ? "" : "not "));
1766 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1767         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1768 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1769         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1770                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1771 #endif
1772         if (config.hw_padding && !hw_padding) {
1773                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1774                 config.hw_padding = 0;
1775         } else if (config.hw_padding) {
1776                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1777         }
1778         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1779                       (sh->device_attr.tso_caps.supported_qpts &
1780                        (1 << IBV_QPT_RAW_PACKET)));
1781         if (config.tso)
1782                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1783         /*
1784          * MPW is disabled by default, while the Enhanced MPW is enabled
1785          * by default.
1786          */
1787         if (config.mps == MLX5_ARG_UNSET)
1788                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1789                                                           MLX5_MPW_DISABLED;
1790         else
1791                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1792         DRV_LOG(INFO, "%sMPS is %s",
1793                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1794                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1795         if (config.cqe_comp && !cqe_comp) {
1796                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1797                 config.cqe_comp = 0;
1798         }
1799         if (config.cqe_pad && !cqe_pad) {
1800                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1801                 config.cqe_pad = 0;
1802         } else if (config.cqe_pad) {
1803                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1804         }
1805         if (config.devx) {
1806                 priv->counter_fallback = 0;
1807                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1808                 if (err) {
1809                         err = -err;
1810                         goto error;
1811                 }
1812                 if (!config.hca_attr.flow_counters_dump)
1813                         priv->counter_fallback = 1;
1814 #ifndef HAVE_IBV_DEVX_ASYNC
1815                 priv->counter_fallback = 1;
1816 #endif
1817                 if (priv->counter_fallback)
1818                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1819                 /* Check for LRO support. */
1820                 if (config.dest_tir && mprq && config.hca_attr.lro_cap) {
1821                         /* TBD check tunnel lro caps. */
1822                         config.lro.supported = config.hca_attr.lro_cap;
1823                         DRV_LOG(DEBUG, "Device supports LRO");
1824                         /*
1825                          * If LRO timeout is not configured by application,
1826                          * use the minimal supported value.
1827                          */
1828                         if (!config.lro.timeout)
1829                                 config.lro.timeout =
1830                                 config.hca_attr.lro_timer_supported_periods[0];
1831                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1832                                 config.lro.timeout);
1833                         config.mprq.enabled = 1;
1834                         DRV_LOG(DEBUG, "Enable MPRQ for LRO use");
1835                 }
1836         }
1837         if (config.mprq.enabled && mprq) {
1838                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1839                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1840                         config.mprq.stride_num_n =
1841                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1842                                         mprq_min_stride_num_n);
1843                         DRV_LOG(WARNING,
1844                                 "the number of strides"
1845                                 " for Multi-Packet RQ is out of range,"
1846                                 " setting default value (%u)",
1847                                 1 << config.mprq.stride_num_n);
1848                 }
1849                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1850                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1851         } else if (config.mprq.enabled && !mprq) {
1852                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1853                 config.mprq.enabled = 0;
1854         }
1855         if (config.max_dump_files_num == 0)
1856                 config.max_dump_files_num = 128;
1857         eth_dev = rte_eth_dev_allocate(name);
1858         if (eth_dev == NULL) {
1859                 DRV_LOG(ERR, "can not allocate rte ethdev");
1860                 err = ENOMEM;
1861                 goto error;
1862         }
1863         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1864         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1865         if (priv->representor) {
1866                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1867                 eth_dev->data->representor_id = priv->representor_id;
1868         }
1869         /*
1870          * Store associated network device interface index. This index
1871          * is permanent throughout the lifetime of device. So, we may store
1872          * the ifindex here and use the cached value further.
1873          */
1874         assert(spawn->ifindex);
1875         priv->if_index = spawn->ifindex;
1876         eth_dev->data->dev_private = priv;
1877         priv->dev_data = eth_dev->data;
1878         eth_dev->data->mac_addrs = priv->mac;
1879         eth_dev->device = dpdk_dev;
1880         /* Configure the first MAC address by default. */
1881         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1882                 DRV_LOG(ERR,
1883                         "port %u cannot get MAC address, is mlx5_en"
1884                         " loaded? (errno: %s)",
1885                         eth_dev->data->port_id, strerror(rte_errno));
1886                 err = ENODEV;
1887                 goto error;
1888         }
1889         DRV_LOG(INFO,
1890                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1891                 eth_dev->data->port_id,
1892                 mac.addr_bytes[0], mac.addr_bytes[1],
1893                 mac.addr_bytes[2], mac.addr_bytes[3],
1894                 mac.addr_bytes[4], mac.addr_bytes[5]);
1895 #ifndef NDEBUG
1896         {
1897                 char ifname[IF_NAMESIZE];
1898
1899                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1900                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1901                                 eth_dev->data->port_id, ifname);
1902                 else
1903                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1904                                 eth_dev->data->port_id);
1905         }
1906 #endif
1907         /* Get actual MTU if possible. */
1908         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1909         if (err) {
1910                 err = rte_errno;
1911                 goto error;
1912         }
1913         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1914                 priv->mtu);
1915         /* Initialize burst functions to prevent crashes before link-up. */
1916         eth_dev->rx_pkt_burst = removed_rx_burst;
1917         eth_dev->tx_pkt_burst = removed_tx_burst;
1918         eth_dev->dev_ops = &mlx5_dev_ops;
1919         /* Register MAC address. */
1920         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1921         if (config.vf && config.vf_nl_en)
1922                 mlx5_nl_mac_addr_sync(eth_dev);
1923         TAILQ_INIT(&priv->flows);
1924         TAILQ_INIT(&priv->ctrl_flows);
1925         /* Hint libmlx5 to use PMD allocator for data plane resources */
1926         struct mlx5dv_ctx_allocators alctr = {
1927                 .alloc = &mlx5_alloc_verbs_buf,
1928                 .free = &mlx5_free_verbs_buf,
1929                 .data = priv,
1930         };
1931         mlx5_glue->dv_set_context_attr(sh->ctx,
1932                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1933                                        (void *)((uintptr_t)&alctr));
1934         /* Bring Ethernet device up. */
1935         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1936                 eth_dev->data->port_id);
1937         mlx5_set_link_up(eth_dev);
1938         /*
1939          * Even though the interrupt handler is not installed yet,
1940          * interrupts will still trigger on the async_fd from
1941          * Verbs context returned by ibv_open_device().
1942          */
1943         mlx5_link_update(eth_dev, 0);
1944 #ifdef HAVE_MLX5DV_DR_ESWITCH
1945         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1946               (switch_info->representor || switch_info->master)))
1947                 config.dv_esw_en = 0;
1948 #else
1949         config.dv_esw_en = 0;
1950 #endif
1951         /* Detect minimal data bytes to inline. */
1952         mlx5_set_min_inline(spawn, &config);
1953         /* Store device configuration on private structure. */
1954         priv->config = config;
1955         if (config.dv_flow_en) {
1956                 err = mlx5_alloc_shared_dr(priv);
1957                 if (err)
1958                         goto error;
1959         }
1960         /* Supported Verbs flow priority number detection. */
1961         err = mlx5_flow_discover_priorities(eth_dev);
1962         if (err < 0) {
1963                 err = -err;
1964                 goto error;
1965         }
1966         priv->config.flow_prio = err;
1967         /* Add device to memory callback list. */
1968         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1969         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1970                          sh, mem_event_cb);
1971         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1972         return eth_dev;
1973 error:
1974         if (priv) {
1975                 if (priv->sh)
1976                         mlx5_free_shared_dr(priv);
1977                 if (priv->nl_socket_route >= 0)
1978                         close(priv->nl_socket_route);
1979                 if (priv->nl_socket_rdma >= 0)
1980                         close(priv->nl_socket_rdma);
1981                 if (own_domain_id)
1982                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1983                 rte_free(priv);
1984                 if (eth_dev != NULL)
1985                         eth_dev->data->dev_private = NULL;
1986         }
1987         if (eth_dev != NULL) {
1988                 /* mac_addrs must not be freed alone because part of dev_private */
1989                 eth_dev->data->mac_addrs = NULL;
1990                 rte_eth_dev_release_port(eth_dev);
1991         }
1992         if (sh)
1993                 mlx5_free_shared_ibctx(sh);
1994         assert(err > 0);
1995         rte_errno = err;
1996         return NULL;
1997 }
1998
1999 /**
2000  * Comparison callback to sort device data.
2001  *
2002  * This is meant to be used with qsort().
2003  *
2004  * @param a[in]
2005  *   Pointer to pointer to first data object.
2006  * @param b[in]
2007  *   Pointer to pointer to second data object.
2008  *
2009  * @return
2010  *   0 if both objects are equal, less than 0 if the first argument is less
2011  *   than the second, greater than 0 otherwise.
2012  */
2013 static int
2014 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2015 {
2016         const struct mlx5_switch_info *si_a =
2017                 &((const struct mlx5_dev_spawn_data *)a)->info;
2018         const struct mlx5_switch_info *si_b =
2019                 &((const struct mlx5_dev_spawn_data *)b)->info;
2020         int ret;
2021
2022         /* Master device first. */
2023         ret = si_b->master - si_a->master;
2024         if (ret)
2025                 return ret;
2026         /* Then representor devices. */
2027         ret = si_b->representor - si_a->representor;
2028         if (ret)
2029                 return ret;
2030         /* Unidentified devices come last in no specific order. */
2031         if (!si_a->representor)
2032                 return 0;
2033         /* Order representors by name. */
2034         return si_a->port_name - si_b->port_name;
2035 }
2036
2037 /**
2038  * DPDK callback to register a PCI device.
2039  *
2040  * This function spawns Ethernet devices out of a given PCI device.
2041  *
2042  * @param[in] pci_drv
2043  *   PCI driver structure (mlx5_driver).
2044  * @param[in] pci_dev
2045  *   PCI device information.
2046  *
2047  * @return
2048  *   0 on success, a negative errno value otherwise and rte_errno is set.
2049  */
2050 static int
2051 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2052                struct rte_pci_device *pci_dev)
2053 {
2054         struct ibv_device **ibv_list;
2055         /*
2056          * Number of found IB Devices matching with requested PCI BDF.
2057          * nd != 1 means there are multiple IB devices over the same
2058          * PCI device and we have representors and master.
2059          */
2060         unsigned int nd = 0;
2061         /*
2062          * Number of found IB device Ports. nd = 1 and np = 1..n means
2063          * we have the single multiport IB device, and there may be
2064          * representors attached to some of found ports.
2065          */
2066         unsigned int np = 0;
2067         /*
2068          * Number of DPDK ethernet devices to Spawn - either over
2069          * multiple IB devices or multiple ports of single IB device.
2070          * Actually this is the number of iterations to spawn.
2071          */
2072         unsigned int ns = 0;
2073         struct mlx5_dev_config dev_config;
2074         int ret;
2075
2076         ret = mlx5_init_once();
2077         if (ret) {
2078                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2079                         strerror(rte_errno));
2080                 return -rte_errno;
2081         }
2082         assert(pci_drv == &mlx5_driver);
2083         errno = 0;
2084         ibv_list = mlx5_glue->get_device_list(&ret);
2085         if (!ibv_list) {
2086                 rte_errno = errno ? errno : ENOSYS;
2087                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2088                 return -rte_errno;
2089         }
2090         /*
2091          * First scan the list of all Infiniband devices to find
2092          * matching ones, gathering into the list.
2093          */
2094         struct ibv_device *ibv_match[ret + 1];
2095         int nl_route = -1;
2096         int nl_rdma = -1;
2097         unsigned int i;
2098
2099         while (ret-- > 0) {
2100                 struct rte_pci_addr pci_addr;
2101
2102                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2103                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2104                         continue;
2105                 if (pci_dev->addr.domain != pci_addr.domain ||
2106                     pci_dev->addr.bus != pci_addr.bus ||
2107                     pci_dev->addr.devid != pci_addr.devid ||
2108                     pci_dev->addr.function != pci_addr.function)
2109                         continue;
2110                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2111                         ibv_list[ret]->name);
2112                 ibv_match[nd++] = ibv_list[ret];
2113         }
2114         ibv_match[nd] = NULL;
2115         if (!nd) {
2116                 /* No device matches, just complain and bail out. */
2117                 mlx5_glue->free_device_list(ibv_list);
2118                 DRV_LOG(WARNING,
2119                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2120                         " are kernel drivers loaded?",
2121                         pci_dev->addr.domain, pci_dev->addr.bus,
2122                         pci_dev->addr.devid, pci_dev->addr.function);
2123                 rte_errno = ENOENT;
2124                 ret = -rte_errno;
2125                 return ret;
2126         }
2127         nl_route = mlx5_nl_init(NETLINK_ROUTE);
2128         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2129         if (nd == 1) {
2130                 /*
2131                  * Found single matching device may have multiple ports.
2132                  * Each port may be representor, we have to check the port
2133                  * number and check the representors existence.
2134                  */
2135                 if (nl_rdma >= 0)
2136                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2137                 if (!np)
2138                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2139                                          " ports number", ibv_match[0]->name);
2140         }
2141         /*
2142          * Now we can determine the maximal
2143          * amount of devices to be spawned.
2144          */
2145         struct mlx5_dev_spawn_data list[np ? np : nd];
2146
2147         if (np > 1) {
2148                 /*
2149                  * Single IB device with multiple ports found,
2150                  * it may be E-Switch master device and representors.
2151                  * We have to perform identification trough the ports.
2152                  */
2153                 assert(nl_rdma >= 0);
2154                 assert(ns == 0);
2155                 assert(nd == 1);
2156                 for (i = 1; i <= np; ++i) {
2157                         list[ns].max_port = np;
2158                         list[ns].ibv_port = i;
2159                         list[ns].ibv_dev = ibv_match[0];
2160                         list[ns].eth_dev = NULL;
2161                         list[ns].pci_dev = pci_dev;
2162                         list[ns].ifindex = mlx5_nl_ifindex
2163                                         (nl_rdma, list[ns].ibv_dev->name, i);
2164                         if (!list[ns].ifindex) {
2165                                 /*
2166                                  * No network interface index found for the
2167                                  * specified port, it means there is no
2168                                  * representor on this port. It's OK,
2169                                  * there can be disabled ports, for example
2170                                  * if sriov_numvfs < sriov_totalvfs.
2171                                  */
2172                                 continue;
2173                         }
2174                         ret = -1;
2175                         if (nl_route >= 0)
2176                                 ret = mlx5_nl_switch_info
2177                                                (nl_route,
2178                                                 list[ns].ifindex,
2179                                                 &list[ns].info);
2180                         if (ret || (!list[ns].info.representor &&
2181                                     !list[ns].info.master)) {
2182                                 /*
2183                                  * We failed to recognize representors with
2184                                  * Netlink, let's try to perform the task
2185                                  * with sysfs.
2186                                  */
2187                                 ret =  mlx5_sysfs_switch_info
2188                                                 (list[ns].ifindex,
2189                                                  &list[ns].info);
2190                         }
2191                         if (!ret && (list[ns].info.representor ^
2192                                      list[ns].info.master))
2193                                 ns++;
2194                 }
2195                 if (!ns) {
2196                         DRV_LOG(ERR,
2197                                 "unable to recognize master/representors"
2198                                 " on the IB device with multiple ports");
2199                         rte_errno = ENOENT;
2200                         ret = -rte_errno;
2201                         goto exit;
2202                 }
2203         } else {
2204                 /*
2205                  * The existence of several matching entries (nd > 1) means
2206                  * port representors have been instantiated. No existing Verbs
2207                  * call nor sysfs entries can tell them apart, this can only
2208                  * be done through Netlink calls assuming kernel drivers are
2209                  * recent enough to support them.
2210                  *
2211                  * In the event of identification failure through Netlink,
2212                  * try again through sysfs, then:
2213                  *
2214                  * 1. A single IB device matches (nd == 1) with single
2215                  *    port (np=0/1) and is not a representor, assume
2216                  *    no switch support.
2217                  *
2218                  * 2. Otherwise no safe assumptions can be made;
2219                  *    complain louder and bail out.
2220                  */
2221                 np = 1;
2222                 for (i = 0; i != nd; ++i) {
2223                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2224                         list[ns].max_port = 1;
2225                         list[ns].ibv_port = 1;
2226                         list[ns].ibv_dev = ibv_match[i];
2227                         list[ns].eth_dev = NULL;
2228                         list[ns].pci_dev = pci_dev;
2229                         list[ns].ifindex = 0;
2230                         if (nl_rdma >= 0)
2231                                 list[ns].ifindex = mlx5_nl_ifindex
2232                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2233                         if (!list[ns].ifindex) {
2234                                 char ifname[IF_NAMESIZE];
2235
2236                                 /*
2237                                  * Netlink failed, it may happen with old
2238                                  * ib_core kernel driver (before 4.16).
2239                                  * We can assume there is old driver because
2240                                  * here we are processing single ports IB
2241                                  * devices. Let's try sysfs to retrieve
2242                                  * the ifindex. The method works for
2243                                  * master device only.
2244                                  */
2245                                 if (nd > 1) {
2246                                         /*
2247                                          * Multiple devices found, assume
2248                                          * representors, can not distinguish
2249                                          * master/representor and retrieve
2250                                          * ifindex via sysfs.
2251                                          */
2252                                         continue;
2253                                 }
2254                                 ret = mlx5_get_master_ifname
2255                                         (ibv_match[i]->ibdev_path, &ifname);
2256                                 if (!ret)
2257                                         list[ns].ifindex =
2258                                                 if_nametoindex(ifname);
2259                                 if (!list[ns].ifindex) {
2260                                         /*
2261                                          * No network interface index found
2262                                          * for the specified device, it means
2263                                          * there it is neither representor
2264                                          * nor master.
2265                                          */
2266                                         continue;
2267                                 }
2268                         }
2269                         ret = -1;
2270                         if (nl_route >= 0)
2271                                 ret = mlx5_nl_switch_info
2272                                                (nl_route,
2273                                                 list[ns].ifindex,
2274                                                 &list[ns].info);
2275                         if (ret || (!list[ns].info.representor &&
2276                                     !list[ns].info.master)) {
2277                                 /*
2278                                  * We failed to recognize representors with
2279                                  * Netlink, let's try to perform the task
2280                                  * with sysfs.
2281                                  */
2282                                 ret =  mlx5_sysfs_switch_info
2283                                                 (list[ns].ifindex,
2284                                                  &list[ns].info);
2285                         }
2286                         if (!ret && (list[ns].info.representor ^
2287                                      list[ns].info.master)) {
2288                                 ns++;
2289                         } else if ((nd == 1) &&
2290                                    !list[ns].info.representor &&
2291                                    !list[ns].info.master) {
2292                                 /*
2293                                  * Single IB device with
2294                                  * one physical port and
2295                                  * attached network device.
2296                                  * May be SRIOV is not enabled
2297                                  * or there is no representors.
2298                                  */
2299                                 DRV_LOG(INFO, "no E-Switch support detected");
2300                                 ns++;
2301                                 break;
2302                         }
2303                 }
2304                 if (!ns) {
2305                         DRV_LOG(ERR,
2306                                 "unable to recognize master/representors"
2307                                 " on the multiple IB devices");
2308                         rte_errno = ENOENT;
2309                         ret = -rte_errno;
2310                         goto exit;
2311                 }
2312         }
2313         assert(ns);
2314         /*
2315          * Sort list to probe devices in natural order for users convenience
2316          * (i.e. master first, then representors from lowest to highest ID).
2317          */
2318         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2319         /* Default configuration. */
2320         dev_config = (struct mlx5_dev_config){
2321                 .hw_padding = 0,
2322                 .mps = MLX5_ARG_UNSET,
2323                 .rx_vec_en = 1,
2324                 .txq_inline_max = MLX5_ARG_UNSET,
2325                 .txq_inline_min = MLX5_ARG_UNSET,
2326                 .txq_inline_mpw = MLX5_ARG_UNSET,
2327                 .txqs_inline = MLX5_ARG_UNSET,
2328                 .vf_nl_en = 1,
2329                 .mr_ext_memseg_en = 1,
2330                 .mprq = {
2331                         .enabled = 0, /* Disabled by default. */
2332                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2333                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2334                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2335                 },
2336                 .dv_esw_en = 1,
2337         };
2338         /* Device specific configuration. */
2339         switch (pci_dev->id.device_id) {
2340         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2341         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2342         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2343         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2344                 dev_config.vf = 1;
2345                 break;
2346         default:
2347                 break;
2348         }
2349         for (i = 0; i != ns; ++i) {
2350                 uint32_t restore;
2351
2352                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2353                                                  &list[i],
2354                                                  dev_config);
2355                 if (!list[i].eth_dev) {
2356                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2357                                 break;
2358                         /* Device is disabled or already spawned. Ignore it. */
2359                         continue;
2360                 }
2361                 restore = list[i].eth_dev->data->dev_flags;
2362                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2363                 /* Restore non-PCI flags cleared by the above call. */
2364                 list[i].eth_dev->data->dev_flags |= restore;
2365                 rte_eth_dev_probing_finish(list[i].eth_dev);
2366         }
2367         if (i != ns) {
2368                 DRV_LOG(ERR,
2369                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2370                         " encountering an error: %s",
2371                         pci_dev->addr.domain, pci_dev->addr.bus,
2372                         pci_dev->addr.devid, pci_dev->addr.function,
2373                         strerror(rte_errno));
2374                 ret = -rte_errno;
2375                 /* Roll back. */
2376                 while (i--) {
2377                         if (!list[i].eth_dev)
2378                                 continue;
2379                         mlx5_dev_close(list[i].eth_dev);
2380                         /* mac_addrs must not be freed because in dev_private */
2381                         list[i].eth_dev->data->mac_addrs = NULL;
2382                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2383                 }
2384                 /* Restore original error. */
2385                 rte_errno = -ret;
2386         } else {
2387                 ret = 0;
2388         }
2389 exit:
2390         /*
2391          * Do the routine cleanup:
2392          * - close opened Netlink sockets
2393          * - free the Infiniband device list
2394          */
2395         if (nl_rdma >= 0)
2396                 close(nl_rdma);
2397         if (nl_route >= 0)
2398                 close(nl_route);
2399         assert(ibv_list);
2400         mlx5_glue->free_device_list(ibv_list);
2401         return ret;
2402 }
2403
2404 /**
2405  * DPDK callback to remove a PCI device.
2406  *
2407  * This function removes all Ethernet devices belong to a given PCI device.
2408  *
2409  * @param[in] pci_dev
2410  *   Pointer to the PCI device.
2411  *
2412  * @return
2413  *   0 on success, the function cannot fail.
2414  */
2415 static int
2416 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2417 {
2418         uint16_t port_id;
2419
2420         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2421                 rte_eth_dev_close(port_id);
2422         return 0;
2423 }
2424
2425 static const struct rte_pci_id mlx5_pci_id_map[] = {
2426         {
2427                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2428                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2429         },
2430         {
2431                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2432                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2433         },
2434         {
2435                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2436                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2437         },
2438         {
2439                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2440                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2441         },
2442         {
2443                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2444                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2445         },
2446         {
2447                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2448                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2449         },
2450         {
2451                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2452                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2453         },
2454         {
2455                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2456                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2457         },
2458         {
2459                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2460                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2461         },
2462         {
2463                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2464                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2465         },
2466         {
2467                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2468                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2469         },
2470         {
2471                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2472                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2473         },
2474         {
2475                 .vendor_id = 0
2476         }
2477 };
2478
2479 static struct rte_pci_driver mlx5_driver = {
2480         .driver = {
2481                 .name = MLX5_DRIVER_NAME
2482         },
2483         .id_table = mlx5_pci_id_map,
2484         .probe = mlx5_pci_probe,
2485         .remove = mlx5_pci_remove,
2486         .dma_map = mlx5_dma_map,
2487         .dma_unmap = mlx5_dma_unmap,
2488         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2489                      RTE_PCI_DRV_PROBE_AGAIN,
2490 };
2491
2492 #ifdef RTE_IBVERBS_LINK_DLOPEN
2493
2494 /**
2495  * Suffix RTE_EAL_PMD_PATH with "-glue".
2496  *
2497  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2498  * suffixing its last component.
2499  *
2500  * @param buf[out]
2501  *   Output buffer, should be large enough otherwise NULL is returned.
2502  * @param size
2503  *   Size of @p out.
2504  *
2505  * @return
2506  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2507  */
2508 static char *
2509 mlx5_glue_path(char *buf, size_t size)
2510 {
2511         static const char *const bad[] = { "/", ".", "..", NULL };
2512         const char *path = RTE_EAL_PMD_PATH;
2513         size_t len = strlen(path);
2514         size_t off;
2515         int i;
2516
2517         while (len && path[len - 1] == '/')
2518                 --len;
2519         for (off = len; off && path[off - 1] != '/'; --off)
2520                 ;
2521         for (i = 0; bad[i]; ++i)
2522                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2523                         goto error;
2524         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2525         if (i == -1 || (size_t)i >= size)
2526                 goto error;
2527         return buf;
2528 error:
2529         DRV_LOG(ERR,
2530                 "unable to append \"-glue\" to last component of"
2531                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2532                 " please re-configure DPDK");
2533         return NULL;
2534 }
2535
2536 /**
2537  * Initialization routine for run-time dependency on rdma-core.
2538  */
2539 static int
2540 mlx5_glue_init(void)
2541 {
2542         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2543         const char *path[] = {
2544                 /*
2545                  * A basic security check is necessary before trusting
2546                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2547                  */
2548                 (geteuid() == getuid() && getegid() == getgid() ?
2549                  getenv("MLX5_GLUE_PATH") : NULL),
2550                 /*
2551                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2552                  * variant, otherwise let dlopen() look up libraries on its
2553                  * own.
2554                  */
2555                 (*RTE_EAL_PMD_PATH ?
2556                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2557         };
2558         unsigned int i = 0;
2559         void *handle = NULL;
2560         void **sym;
2561         const char *dlmsg;
2562
2563         while (!handle && i != RTE_DIM(path)) {
2564                 const char *end;
2565                 size_t len;
2566                 int ret;
2567
2568                 if (!path[i]) {
2569                         ++i;
2570                         continue;
2571                 }
2572                 end = strpbrk(path[i], ":;");
2573                 if (!end)
2574                         end = path[i] + strlen(path[i]);
2575                 len = end - path[i];
2576                 ret = 0;
2577                 do {
2578                         char name[ret + 1];
2579
2580                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2581                                        (int)len, path[i],
2582                                        (!len || *(end - 1) == '/') ? "" : "/");
2583                         if (ret == -1)
2584                                 break;
2585                         if (sizeof(name) != (size_t)ret + 1)
2586                                 continue;
2587                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2588                                 name);
2589                         handle = dlopen(name, RTLD_LAZY);
2590                         break;
2591                 } while (1);
2592                 path[i] = end + 1;
2593                 if (!*end)
2594                         ++i;
2595         }
2596         if (!handle) {
2597                 rte_errno = EINVAL;
2598                 dlmsg = dlerror();
2599                 if (dlmsg)
2600                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2601                 goto glue_error;
2602         }
2603         sym = dlsym(handle, "mlx5_glue");
2604         if (!sym || !*sym) {
2605                 rte_errno = EINVAL;
2606                 dlmsg = dlerror();
2607                 if (dlmsg)
2608                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2609                 goto glue_error;
2610         }
2611         mlx5_glue = *sym;
2612         return 0;
2613 glue_error:
2614         if (handle)
2615                 dlclose(handle);
2616         DRV_LOG(WARNING,
2617                 "cannot initialize PMD due to missing run-time dependency on"
2618                 " rdma-core libraries (libibverbs, libmlx5)");
2619         return -rte_errno;
2620 }
2621
2622 #endif
2623
2624 /**
2625  * Driver initialization routine.
2626  */
2627 RTE_INIT(rte_mlx5_pmd_init)
2628 {
2629         /* Initialize driver log type. */
2630         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2631         if (mlx5_logtype >= 0)
2632                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2633
2634         /* Build the static tables for Verbs conversion. */
2635         mlx5_set_ptype_table();
2636         mlx5_set_cksum_table();
2637         mlx5_set_swp_types_table();
2638         /*
2639          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2640          * huge pages. Calling ibv_fork_init() during init allows
2641          * applications to use fork() safely for purposes other than
2642          * using this PMD, which is not supported in forked processes.
2643          */
2644         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2645         /* Match the size of Rx completion entry to the size of a cacheline. */
2646         if (RTE_CACHE_LINE_SIZE == 128)
2647                 setenv("MLX5_CQE_SIZE", "128", 0);
2648         /*
2649          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2650          * cleanup all the Verbs resources even when the device was removed.
2651          */
2652         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2653 #ifdef RTE_IBVERBS_LINK_DLOPEN
2654         if (mlx5_glue_init())
2655                 return;
2656         assert(mlx5_glue);
2657 #endif
2658 #ifndef NDEBUG
2659         /* Glue structure must not contain any NULL pointers. */
2660         {
2661                 unsigned int i;
2662
2663                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2664                         assert(((const void *const *)mlx5_glue)[i]);
2665         }
2666 #endif
2667         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2668                 DRV_LOG(ERR,
2669                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2670                         mlx5_glue->version, MLX5_GLUE_VERSION);
2671                 return;
2672         }
2673         mlx5_glue->fork_init();
2674         rte_pci_register(&mlx5_driver);
2675 }
2676
2677 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2678 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2679 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");