4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
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15 * the documentation and/or other materials provided with the
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
45 #pragma GCC diagnostic ignored "-pedantic"
47 #include <infiniband/verbs.h>
49 #pragma GCC diagnostic error "-pedantic"
52 /* DPDK headers don't like -pedantic. */
54 #pragma GCC diagnostic ignored "-pedantic"
56 #include <rte_malloc.h>
57 #include <rte_ethdev.h>
59 #include <rte_common.h>
61 #pragma GCC diagnostic error "-pedantic"
65 #include "mlx5_utils.h"
66 #include "mlx5_rxtx.h"
67 #include "mlx5_autoconf.h"
68 #include "mlx5_defs.h"
71 * Retrieve integer value from environment variable.
74 * Environment variable name.
77 * Integer value, 0 if the variable is not set.
80 mlx5_getenv_int(const char *name)
82 const char *val = getenv(name);
90 * DPDK callback to close the device.
92 * Destroy all queues and objects, free memory.
95 * Pointer to Ethernet device structure.
98 mlx5_dev_close(struct rte_eth_dev *dev)
100 struct priv *priv = mlx5_get_priv(dev);
104 DEBUG("%p: closing device \"%s\"",
106 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
107 /* In case mlx5_dev_stop() has not been called. */
108 priv_dev_interrupt_handler_uninstall(priv, dev);
109 priv_special_flow_disable_all(priv);
110 priv_mac_addrs_disable(priv);
111 priv_destroy_hash_rxqs(priv);
113 /* Remove flow director elements. */
114 priv_fdir_disable(priv);
115 priv_fdir_delete_filters_list(priv);
117 /* Prevent crashes when queues are still in use. */
118 dev->rx_pkt_burst = removed_rx_burst;
119 dev->tx_pkt_burst = removed_tx_burst;
120 if (priv->rxqs != NULL) {
121 /* XXX race condition if mlx5_rx_burst() is still running. */
123 for (i = 0; (i != priv->rxqs_n); ++i) {
124 struct rxq *rxq = (*priv->rxqs)[i];
125 struct rxq_ctrl *rxq_ctrl;
129 rxq_ctrl = container_of(rxq, struct rxq_ctrl, rxq);
130 (*priv->rxqs)[i] = NULL;
131 rxq_cleanup(rxq_ctrl);
137 if (priv->txqs != NULL) {
138 /* XXX race condition if mlx5_tx_burst() is still running. */
140 for (i = 0; (i != priv->txqs_n); ++i) {
141 struct txq *txq = (*priv->txqs)[i];
142 struct txq_ctrl *txq_ctrl;
146 txq_ctrl = container_of(txq, struct txq_ctrl, txq);
147 (*priv->txqs)[i] = NULL;
148 txq_cleanup(txq_ctrl);
154 if (priv->pd != NULL) {
155 assert(priv->ctx != NULL);
156 claim_zero(ibv_dealloc_pd(priv->pd));
157 claim_zero(ibv_close_device(priv->ctx));
159 assert(priv->ctx == NULL);
160 if (priv->rss_conf != NULL) {
161 for (i = 0; (i != hash_rxq_init_n); ++i)
162 rte_free((*priv->rss_conf)[i]);
163 rte_free(priv->rss_conf);
165 if (priv->reta_idx != NULL)
166 rte_free(priv->reta_idx);
168 memset(priv, 0, sizeof(*priv));
171 static const struct eth_dev_ops mlx5_dev_ops = {
172 .dev_configure = mlx5_dev_configure,
173 .dev_start = mlx5_dev_start,
174 .dev_stop = mlx5_dev_stop,
175 .dev_set_link_down = mlx5_set_link_down,
176 .dev_set_link_up = mlx5_set_link_up,
177 .dev_close = mlx5_dev_close,
178 .promiscuous_enable = mlx5_promiscuous_enable,
179 .promiscuous_disable = mlx5_promiscuous_disable,
180 .allmulticast_enable = mlx5_allmulticast_enable,
181 .allmulticast_disable = mlx5_allmulticast_disable,
182 .link_update = mlx5_link_update,
183 .stats_get = mlx5_stats_get,
184 .stats_reset = mlx5_stats_reset,
185 .dev_infos_get = mlx5_dev_infos_get,
186 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
187 .vlan_filter_set = mlx5_vlan_filter_set,
188 .rx_queue_setup = mlx5_rx_queue_setup,
189 .tx_queue_setup = mlx5_tx_queue_setup,
190 .rx_queue_release = mlx5_rx_queue_release,
191 .tx_queue_release = mlx5_tx_queue_release,
192 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
193 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
194 .mac_addr_remove = mlx5_mac_addr_remove,
195 .mac_addr_add = mlx5_mac_addr_add,
196 .mac_addr_set = mlx5_mac_addr_set,
197 .mtu_set = mlx5_dev_set_mtu,
198 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
199 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
200 .vlan_offload_set = mlx5_vlan_offload_set,
201 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
202 .reta_update = mlx5_dev_rss_reta_update,
203 .reta_query = mlx5_dev_rss_reta_query,
204 .rss_hash_update = mlx5_rss_hash_update,
205 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
206 #ifdef MLX5_FDIR_SUPPORT
207 .filter_ctrl = mlx5_dev_filter_ctrl,
208 #endif /* MLX5_FDIR_SUPPORT */
212 struct rte_pci_addr pci_addr; /* associated PCI address */
213 uint32_t ports; /* physical ports bitfield. */
217 * Get device index in mlx5_dev[] from PCI bus address.
219 * @param[in] pci_addr
220 * PCI bus address to look for.
223 * mlx5_dev[] index on success, -1 on failure.
226 mlx5_dev_idx(struct rte_pci_addr *pci_addr)
231 assert(pci_addr != NULL);
232 for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
233 if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
234 (mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
235 (mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
236 (mlx5_dev[i].pci_addr.function == pci_addr->function))
238 if ((mlx5_dev[i].ports == 0) && (ret == -1))
244 static struct eth_driver mlx5_driver;
247 * DPDK callback to register a PCI device.
249 * This function creates an Ethernet device for each port of a given
253 * PCI driver structure (mlx5_driver).
255 * PCI device information.
258 * 0 on success, negative errno value on failure.
261 mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
263 struct ibv_device **list;
264 struct ibv_device *ibv_dev;
266 struct ibv_context *attr_ctx = NULL;
267 struct ibv_device_attr device_attr;
274 assert(pci_drv == &mlx5_driver.pci_drv);
275 /* Get mlx5_dev[] index. */
276 idx = mlx5_dev_idx(&pci_dev->addr);
278 ERROR("this driver cannot support any more adapters");
281 DEBUG("using driver device index %d", idx);
283 /* Save PCI address. */
284 mlx5_dev[idx].pci_addr = pci_dev->addr;
285 list = ibv_get_device_list(&i);
288 if (errno == ENOSYS) {
289 WARN("cannot list devices, is ib_uverbs loaded?");
296 * For each listed device, check related sysfs entry against
297 * the provided PCI ID.
300 struct rte_pci_addr pci_addr;
303 DEBUG("checking device \"%s\"", list[i]->name);
304 if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
306 if ((pci_dev->addr.domain != pci_addr.domain) ||
307 (pci_dev->addr.bus != pci_addr.bus) ||
308 (pci_dev->addr.devid != pci_addr.devid) ||
309 (pci_dev->addr.function != pci_addr.function))
311 sriov = ((pci_dev->id.device_id ==
312 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
313 (pci_dev->id.device_id ==
314 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
315 /* Multi-packet send is only supported by ConnectX-4 Lx PF. */
316 mps = (pci_dev->id.device_id ==
317 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX);
318 INFO("PCI information matches, using device \"%s\""
319 " (SR-IOV: %s, MPS: %s)",
321 sriov ? "true" : "false",
322 mps ? "true" : "false");
323 attr_ctx = ibv_open_device(list[i]);
327 if (attr_ctx == NULL) {
328 ibv_free_device_list(list);
331 WARN("cannot access device, is mlx5_ib loaded?");
334 WARN("cannot use device, are drivers up to date?");
342 DEBUG("device opened");
343 if (ibv_query_device(attr_ctx, &device_attr))
345 INFO("%u port(s) detected", device_attr.phys_port_cnt);
347 for (i = 0; i < device_attr.phys_port_cnt; i++) {
348 uint32_t port = i + 1; /* ports are indexed from one */
349 uint32_t test = (1 << i);
350 struct ibv_context *ctx = NULL;
351 struct ibv_port_attr port_attr;
352 struct ibv_pd *pd = NULL;
353 struct priv *priv = NULL;
354 struct rte_eth_dev *eth_dev;
355 #ifdef HAVE_EXP_QUERY_DEVICE
356 struct ibv_exp_device_attr exp_device_attr;
357 #endif /* HAVE_EXP_QUERY_DEVICE */
358 struct ether_addr mac;
359 uint16_t num_vfs = 0;
361 #ifdef HAVE_EXP_QUERY_DEVICE
362 exp_device_attr.comp_mask =
363 IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
364 IBV_EXP_DEVICE_ATTR_RX_HASH |
365 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
366 IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
367 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
368 #ifdef HAVE_VERBS_RX_END_PADDING
369 IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
370 #endif /* HAVE_VERBS_RX_END_PADDING */
372 #endif /* HAVE_EXP_QUERY_DEVICE */
374 DEBUG("using port %u (%08" PRIx32 ")", port, test);
376 ctx = ibv_open_device(ibv_dev);
380 /* Check port status. */
381 err = ibv_query_port(ctx, port, &port_attr);
383 ERROR("port query failed: %s", strerror(err));
387 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
388 ERROR("port %d is not configured in Ethernet mode",
393 if (port_attr.state != IBV_PORT_ACTIVE)
394 DEBUG("port %d is not active: \"%s\" (%d)",
395 port, ibv_port_state_str(port_attr.state),
398 /* Allocate protection domain. */
399 pd = ibv_alloc_pd(ctx);
401 ERROR("PD allocation failure");
406 mlx5_dev[idx].ports |= test;
408 /* from rte_ethdev.c */
409 priv = rte_zmalloc("ethdev private structure",
411 RTE_CACHE_LINE_SIZE);
413 ERROR("priv allocation failure");
419 priv->device_attr = device_attr;
422 priv->mtu = ETHER_MTU;
423 #ifdef HAVE_EXP_QUERY_DEVICE
424 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
425 ERROR("ibv_exp_query_device() failed");
430 ((exp_device_attr.exp_device_cap_flags &
431 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
432 (exp_device_attr.exp_device_cap_flags &
433 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
434 DEBUG("checksum offloading is %ssupported",
435 (priv->hw_csum ? "" : "not "));
437 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
438 IBV_EXP_DEVICE_VXLAN_SUPPORT);
439 DEBUG("L2 tunnel checksum offloads are %ssupported",
440 (priv->hw_csum_l2tun ? "" : "not "));
442 priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
443 /* Remove this check once DPDK supports larger/variable
444 * indirection tables. */
445 if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
446 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
447 DEBUG("maximum RX indirection table size is %u",
448 priv->ind_table_max_size);
449 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
450 priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
451 IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
452 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
453 DEBUG("VLAN stripping is %ssupported",
454 (priv->hw_vlan_strip ? "" : "not "));
456 #ifdef HAVE_VERBS_FCS
457 priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
458 IBV_EXP_DEVICE_SCATTER_FCS);
459 #endif /* HAVE_VERBS_FCS */
460 DEBUG("FCS stripping configuration is %ssupported",
461 (priv->hw_fcs_strip ? "" : "not "));
463 #ifdef HAVE_VERBS_RX_END_PADDING
464 priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
465 #endif /* HAVE_VERBS_RX_END_PADDING */
466 DEBUG("hardware RX end alignment padding is %ssupported",
467 (priv->hw_padding ? "" : "not "));
469 #else /* HAVE_EXP_QUERY_DEVICE */
470 priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
471 #endif /* HAVE_EXP_QUERY_DEVICE */
473 priv_get_num_vfs(priv, &num_vfs);
474 priv->sriov = (num_vfs || sriov);
476 /* Allocate and register default RSS hash keys. */
477 priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
478 sizeof((*priv->rss_conf)[0]), 0);
479 if (priv->rss_conf == NULL) {
483 err = rss_hash_rss_conf_new_key(priv,
484 rss_hash_default_key,
485 rss_hash_default_key_len,
489 /* Configure the first MAC address by default. */
490 if (priv_get_mac(priv, &mac.addr_bytes)) {
491 ERROR("cannot get MAC address, is mlx5_en loaded?"
492 " (errno: %s)", strerror(errno));
495 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
497 mac.addr_bytes[0], mac.addr_bytes[1],
498 mac.addr_bytes[2], mac.addr_bytes[3],
499 mac.addr_bytes[4], mac.addr_bytes[5]);
500 /* Register MAC address. */
501 claim_zero(priv_mac_addr_add(priv, 0,
502 (const uint8_t (*)[ETHER_ADDR_LEN])
504 /* Initialize FD filters list. */
505 err = fdir_init_filters_list(priv);
510 char ifname[IF_NAMESIZE];
512 if (priv_get_ifname(priv, &ifname) == 0)
513 DEBUG("port %u ifname is \"%s\"",
516 DEBUG("port %u ifname is unknown", priv->port);
519 /* Get actual MTU if possible. */
520 priv_get_mtu(priv, &priv->mtu);
521 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
523 /* from rte_ethdev.c */
525 char name[RTE_ETH_NAME_MAX_LEN];
527 snprintf(name, sizeof(name), "%s port %u",
528 ibv_get_device_name(ibv_dev), port);
529 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
531 if (eth_dev == NULL) {
532 ERROR("can not allocate rte ethdev");
537 /* Secondary processes have to use local storage for their
538 * private data as well as a copy of eth_dev->data, but this
539 * pointer must not be modified before burst functions are
540 * actually called. */
541 if (mlx5_is_secondary()) {
542 struct mlx5_secondary_data *sd =
543 &mlx5_secondary_data[eth_dev->data->port_id];
544 sd->primary_priv = eth_dev->data->dev_private;
545 if (sd->primary_priv == NULL) {
546 ERROR("no private data for port %u",
547 eth_dev->data->port_id);
551 sd->shared_dev_data = eth_dev->data;
552 rte_spinlock_init(&sd->lock);
553 memcpy(sd->data.name, sd->shared_dev_data->name,
554 sizeof(sd->data.name));
555 sd->data.dev_private = priv;
556 sd->data.rx_mbuf_alloc_failed = 0;
557 sd->data.mtu = ETHER_MTU;
558 sd->data.port_id = sd->shared_dev_data->port_id;
559 sd->data.mac_addrs = priv->mac;
560 eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
561 eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
563 eth_dev->data->dev_private = priv;
564 eth_dev->data->rx_mbuf_alloc_failed = 0;
565 eth_dev->data->mtu = ETHER_MTU;
566 eth_dev->data->mac_addrs = priv->mac;
569 eth_dev->pci_dev = pci_dev;
570 rte_eth_copy_pci_info(eth_dev, pci_dev);
571 eth_dev->driver = &mlx5_driver;
573 eth_dev->dev_ops = &mlx5_dev_ops;
575 TAILQ_INIT(ð_dev->link_intr_cbs);
577 /* Bring Ethernet device up. */
578 DEBUG("forcing Ethernet interface up");
579 priv_set_flags(priv, ~IFF_UP, IFF_UP);
584 rte_free(priv->rss_conf);
588 claim_zero(ibv_dealloc_pd(pd));
590 claim_zero(ibv_close_device(ctx));
595 * XXX if something went wrong in the loop above, there is a resource
596 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
597 * long as the dpdk does not provide a way to deallocate a ethdev and a
598 * way to enumerate the registered ethdevs to free the previous ones.
601 /* no port found, complain */
602 if (!mlx5_dev[idx].ports) {
609 claim_zero(ibv_close_device(attr_ctx));
611 ibv_free_device_list(list);
616 static const struct rte_pci_id mlx5_pci_id_map[] = {
618 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
619 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
622 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
623 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
626 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
627 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
630 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
631 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
638 static struct eth_driver mlx5_driver = {
640 .name = MLX5_DRIVER_NAME,
641 .id_table = mlx5_pci_id_map,
642 .devinit = mlx5_pci_devinit,
643 .drv_flags = RTE_PCI_DRV_INTR_LSC,
645 .dev_private_size = sizeof(struct priv)
649 * Driver initialization routine.
652 rte_mlx5_pmd_init(const char *name, const char *args)
657 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
658 * huge pages. Calling ibv_fork_init() during init allows
659 * applications to use fork() safely for purposes other than
660 * using this PMD, which is not supported in forked processes.
662 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
664 rte_eal_pci_register(&mlx5_driver.pci_drv);
668 static struct rte_driver rte_mlx5_driver = {
670 .name = MLX5_DRIVER_NAME,
671 .init = rte_mlx5_pmd_init,
674 PMD_REGISTER_DRIVER(rte_mlx5_driver)