drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40 #include <rte_alarm.h>
  41
  42 #include "mlx5.h"
  43 #include "mlx5_utils.h"
  44 #include "mlx5_rxtx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_defs.h"
  47 #include "mlx5_glue.h"
  48 #include "mlx5_mr.h"
  49 #include "mlx5_flow.h"
  50
  51 /* Device parameter to enable RX completion queue compression. */
  52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  53
  54 /* Device parameter to enable RX completion entry padding to 128B. */
  55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  56
  57 /* Device parameter to enable padding Rx packet to cacheline size. */
  58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  59
  60 /* Device parameter to enable Multi-Packet Rx queue. */
  61 #define MLX5_RX_MPRQ_EN "mprq_en"
  62
  63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  65
  66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  68
  69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  71
  72 /* Device parameter to configure inline send. Deprecated, ignored.*/
  73 #define MLX5_TXQ_INLINE "txq_inline"
  74
  75 /* Device parameter to limit packet size to inline with ordinary SEND. */
  76 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  77
  78 /* Device parameter to configure minimal data size to inline. */
  79 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  80
  81 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  82 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  83
  84 /*
  85  * Device parameter to configure the number of TX queues threshold for
  86  * enabling inline send.
  87  */
  88 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  89
  90 /*
  91  * Device parameter to configure the number of TX queues threshold for
  92  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  93  */
  94 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  95
  96 /* Device parameter to enable multi-packet send WQEs. */
  97 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  98
  99 /*
 100  * Device parameter to include 2 dsegs in the title WQEBB.
 101  * Deprecated, ignored.
 102  */
 103 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 104
 105 /*
 106  * Device parameter to limit the size of inlining packet.
 107  * Deprecated, ignored.
 108  */
 109 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 110
 111 /*
 112  * Device parameter to enable hardware Tx vector.
 113  * Deprecated, ignored (no vectorized Tx routines anymore).
 114  */
 115 #define MLX5_TX_VEC_EN "tx_vec_en"
 116
 117 /* Device parameter to enable hardware Rx vector. */
 118 #define MLX5_RX_VEC_EN "rx_vec_en"
 119
 120 /* Allow L3 VXLAN flow creation. */
 121 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 122
 123 /* Activate DV E-Switch flow steering. */
 124 #define MLX5_DV_ESW_EN "dv_esw_en"
 125
 126 /* Activate DV flow steering. */
 127 #define MLX5_DV_FLOW_EN "dv_flow_en"
 128
 129 /* Activate Netlink support in VF mode. */
 130 #define MLX5_VF_NL_EN "vf_nl_en"
 131
 132 /* Enable extending memsegs when creating a MR. */
 133 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 134
 135 /* Select port representors to instantiate. */
 136 #define MLX5_REPRESENTOR "representor"
 137
 138 /* Device parameter to configure the maximum number of dump files per queue. */
 139 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 140
 141 /* Configure timeout of LRO session (in microseconds). */
 142 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 143
 144 #ifndef HAVE_IBV_MLX5_MOD_MPW
 145 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 146 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 147 #endif
 148
 149 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 150 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 151 #endif
 152
 153 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 154
 155 /* Shared memory between primary and secondary processes. */
 156 struct mlx5_shared_data *mlx5_shared_data;
 157
 158 /* Spinlock for mlx5_shared_data allocation. */
 159 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 160
 161 /* Process local data for secondary processes. */
 162 static struct mlx5_local_data mlx5_local_data;
 163
 164 /** Driver-specific log messages type. */
 165 int mlx5_logtype;
 166
 167 /** Data associated with devices to spawn. */
 168 struct mlx5_dev_spawn_data {
 169         uint32_t ifindex; /**< Network interface index. */
 170         uint32_t max_port; /**< IB device maximal port index. */
 171         uint32_t ibv_port; /**< IB device physical port index. */
 172         struct mlx5_switch_info info; /**< Switch information. */
 173         struct ibv_device *ibv_dev; /**< Associated IB device. */
 174         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 175         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 176 };
 177
 178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 180
 181 /**
 182  * Initialize the counters management structure.
 183  *
 184  * @param[in] sh
 185  *   Pointer to mlx5_ibv_shared object to free
 186  */
 187 static void
 188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 189 {
 190         uint8_t i;
 191
 192         TAILQ_INIT(&sh->cmng.flow_counters);
 193         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 194                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 195 }
 196
 197 /**
 198  * Destroy all the resources allocated for a counter memory management.
 199  *
 200  * @param[in] mng
 201  *   Pointer to the memory management structure.
 202  */
 203 static void
 204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 205 {
 206         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 207
 208         LIST_REMOVE(mng, next);
 209         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 210         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 211         rte_free(mem);
 212 }
 213
 214 /**
 215  * Close and release all the resources of the counters management.
 216  *
 217  * @param[in] sh
 218  *   Pointer to mlx5_ibv_shared object to free.
 219  */
 220 static void
 221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 222 {
 223         struct mlx5_counter_stats_mem_mng *mng;
 224         uint8_t i;
 225         int j;
 226         int retries = 1024;
 227
 228         rte_errno = 0;
 229         while (--retries) {
 230                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 231                 if (rte_errno != EINPROGRESS)
 232                         break;
 233                 rte_pause();
 234         }
 235         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 236                 struct mlx5_flow_counter_pool *pool;
 237                 uint32_t batch = !!(i % 2);
 238
 239                 if (!sh->cmng.ccont[i].pools)
 240                         continue;
 241                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 242                 while (pool) {
 243                         if (batch) {
 244                                 if (pool->min_dcs)
 245                                         claim_zero
 246                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 247                         }
 248                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 249                                 if (pool->counters_raw[j].action)
 250                                         claim_zero
 251                                         (mlx5_glue->destroy_flow_action
 252                                                (pool->counters_raw[j].action));
 253                                 if (!batch && pool->counters_raw[j].dcs)
 254                                         claim_zero(mlx5_devx_cmd_destroy
 255                                                   (pool->counters_raw[j].dcs));
 256                         }
 257                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 258                                      next);
 259                         rte_free(pool);
 260                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 261                 }
 262                 rte_free(sh->cmng.ccont[i].pools);
 263         }
 264         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 265         while (mng) {
 266                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 267                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 268         }
 269         memset(&sh->cmng, 0, sizeof(sh->cmng));
 270 }
 271
 272 /**
 273  * Extract pdn of PD object using DV API.
 274  *
 275  * @param[in] pd
 276  *   Pointer to the verbs PD object.
 277  * @param[out] pdn
 278  *   Pointer to the PD object number variable.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 284 static int
 285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 286 {
 287         struct mlx5dv_obj obj;
 288         struct mlx5dv_pd pd_info;
 289         int ret = 0;
 290
 291         obj.pd.in = pd;
 292         obj.pd.out = &pd_info;
 293         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 294         if (ret) {
 295                 DRV_LOG(DEBUG, "Fail to get PD object info");
 296                 return ret;
 297         }
 298         *pdn = pd_info.pdn;
 299         return 0;
 300 }
 301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 302
 303 /**
 304  * Allocate shared IB device context. If there is multiport device the
 305  * master and representors will share this context, if there is single
 306  * port dedicated IB device, the context will be used by only given
 307  * port due to unification.
 308  *
 309  * Routine first searches the context for the specified IB device name,
 310  * if found the shared context assumed and reference counter is incremented.
 311  * If no context found the new one is created and initialized with specified
 312  * IB device context and parameters.
 313  *
 314  * @param[in] spawn
 315  *   Pointer to the IB device attributes (name, port, etc).
 316  *
 317  * @return
 318  *   Pointer to mlx5_ibv_shared object on success,
 319  *   otherwise NULL and rte_errno is set.
 320  */
 321 static struct mlx5_ibv_shared *
 322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 323 {
 324         struct mlx5_ibv_shared *sh;
 325         int err = 0;
 326         uint32_t i;
 327
 328         assert(spawn);
 329         /* Secondary process should not create the shared context. */
 330         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 331         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 332         /* Search for IB context by device name. */
 333         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 334                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 335                         sh->refcnt++;
 336                         goto exit;
 337                 }
 338         }
 339         /* No device found, we have to create new shared context. */
 340         assert(spawn->max_port);
 341         sh = rte_zmalloc("ethdev shared ib context",
 342                          sizeof(struct mlx5_ibv_shared) +
 343                          spawn->max_port *
 344                          sizeof(struct mlx5_ibv_shared_port),
 345                          RTE_CACHE_LINE_SIZE);
 346         if (!sh) {
 347                 DRV_LOG(ERR, "shared context allocation failure");
 348                 rte_errno  = ENOMEM;
 349                 goto exit;
 350         }
 351         /* Try to open IB device with DV first, then usual Verbs. */
 352         errno = 0;
 353         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 354         if (sh->ctx) {
 355                 sh->devx = 1;
 356                 DRV_LOG(DEBUG, "DevX is supported");
 357         } else {
 358                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 359                 if (!sh->ctx) {
 360                         err = errno ? errno : ENODEV;
 361                         goto error;
 362                 }
 363                 DRV_LOG(DEBUG, "DevX is NOT supported");
 364         }
 365         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 366         if (err) {
 367                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 368                 goto error;
 369         }
 370         sh->refcnt = 1;
 371         sh->max_port = spawn->max_port;
 372         strncpy(sh->ibdev_name, sh->ctx->device->name,
 373                 sizeof(sh->ibdev_name));
 374         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 375                 sizeof(sh->ibdev_path));
 376         sh->pci_dev = spawn->pci_dev;
 377         pthread_mutex_init(&sh->intr_mutex, NULL);
 378         /*
 379          * Setting port_id to max unallowed value means
 380          * there is no interrupt subhandler installed for
 381          * the given port index i.
 382          */
 383         for (i = 0; i < sh->max_port; i++)
 384                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 385         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 386         if (sh->pd == NULL) {
 387                 DRV_LOG(ERR, "PD allocation failure");
 388                 err = ENOMEM;
 389                 goto error;
 390         }
 391 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 392         err = mlx5_get_pdn(sh->pd, &sh->pdn);
 393         if (err) {
 394                 DRV_LOG(ERR, "Fail to extract pdn from PD");
 395                 goto error;
 396         }
 397 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 398         /*
 399          * Once the device is added to the list of memory event
 400          * callback, its global MR cache table cannot be expanded
 401          * on the fly because of deadlock. If it overflows, lookup
 402          * should be done by searching MR list linearly, which is slow.
 403          *
 404          * At this point the device is not added to the memory
 405          * event list yet, context is just being created.
 406          */
 407         err = mlx5_mr_btree_init(&sh->mr.cache,
 408                                  MLX5_MR_BTREE_CACHE_N * 2,
 409                                  sh->pci_dev->device.numa_node);
 410         if (err) {
 411                 err = rte_errno;
 412                 goto error;
 413         }
 414         mlx5_flow_counters_mng_init(sh);
 415         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 416 exit:
 417         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 418         return sh;
 419 error:
 420         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 421         assert(sh);
 422         if (sh->pd)
 423                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 424         if (sh->ctx)
 425                 claim_zero(mlx5_glue->close_device(sh->ctx));
 426         rte_free(sh);
 427         assert(err > 0);
 428         rte_errno = err;
 429         return NULL;
 430 }
 431
 432 /**
 433  * Free shared IB device context. Decrement counter and if zero free
 434  * all allocated resources and close handles.
 435  *
 436  * @param[in] sh
 437  *   Pointer to mlx5_ibv_shared object to free
 438  */
 439 static void
 440 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 441 {
 442         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 443 #ifndef NDEBUG
 444         /* Check the object presence in the list. */
 445         struct mlx5_ibv_shared *lctx;
 446
 447         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 448                 if (lctx == sh)
 449                         break;
 450         assert(lctx);
 451         if (lctx != sh) {
 452                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 453                 goto exit;
 454         }
 455 #endif
 456         assert(sh);
 457         assert(sh->refcnt);
 458         /* Secondary process should not free the shared context. */
 459         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 460         if (--sh->refcnt)
 461                 goto exit;
 462         /* Release created Memory Regions. */
 463         mlx5_mr_release(sh);
 464         LIST_REMOVE(sh, next);
 465         /*
 466          *  Ensure there is no async event handler installed.
 467          *  Only primary process handles async device events.
 468          **/
 469         mlx5_flow_counters_mng_close(sh);
 470         assert(!sh->intr_cnt);
 471         if (sh->intr_cnt)
 472                 mlx5_intr_callback_unregister
 473                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 474         pthread_mutex_destroy(&sh->intr_mutex);
 475         if (sh->pd)
 476                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 477         if (sh->ctx)
 478                 claim_zero(mlx5_glue->close_device(sh->ctx));
 479         rte_free(sh);
 480 exit:
 481         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 482 }
 483
 484 /**
 485  * Initialize DR related data within private structure.
 486  * Routine checks the reference counter and does actual
 487  * resources creation/initialization only if counter is zero.
 488  *
 489  * @param[in] priv
 490  *   Pointer to the private device data structure.
 491  *
 492  * @return
 493  *   Zero on success, positive error code otherwise.
 494  */
 495 static int
 496 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 497 {
 498 #ifdef HAVE_MLX5DV_DR
 499         struct mlx5_ibv_shared *sh = priv->sh;
 500         int err = 0;
 501         void *domain;
 502
 503         assert(sh);
 504         if (sh->dv_refcnt) {
 505                 /* Shared DV/DR structures is already initialized. */
 506                 sh->dv_refcnt++;
 507                 priv->dr_shared = 1;
 508                 return 0;
 509         }
 510         /* Reference counter is zero, we should initialize structures. */
 511         domain = mlx5_glue->dr_create_domain(sh->ctx,
 512                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 513         if (!domain) {
 514                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 515                 err = errno;
 516                 goto error;
 517         }
 518         sh->rx_domain = domain;
 519         domain = mlx5_glue->dr_create_domain(sh->ctx,
 520                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 521         if (!domain) {
 522                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 523                 err = errno;
 524                 goto error;
 525         }
 526         pthread_mutex_init(&sh->dv_mutex, NULL);
 527         sh->tx_domain = domain;
 528 #ifdef HAVE_MLX5DV_DR_ESWITCH
 529         if (priv->config.dv_esw_en) {
 530                 domain  = mlx5_glue->dr_create_domain
 531                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 532                 if (!domain) {
 533                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 534                         err = errno;
 535                         goto error;
 536                 }
 537                 sh->fdb_domain = domain;
 538                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 539         }
 540 #endif
 541         sh->dv_refcnt++;
 542         priv->dr_shared = 1;
 543         return 0;
 544
 545 error:
 546        /* Rollback the created objects. */
 547         if (sh->rx_domain) {
 548                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 549                 sh->rx_domain = NULL;
 550         }
 551         if (sh->tx_domain) {
 552                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 553                 sh->tx_domain = NULL;
 554         }
 555         if (sh->fdb_domain) {
 556                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 557                 sh->fdb_domain = NULL;
 558         }
 559         if (sh->esw_drop_action) {
 560                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 561                 sh->esw_drop_action = NULL;
 562         }
 563         return err;
 564 #else
 565         (void)priv;
 566         return 0;
 567 #endif
 568 }
 569
 570 /**
 571  * Destroy DR related data within private structure.
 572  *
 573  * @param[in] priv
 574  *   Pointer to the private device data structure.
 575  */
 576 static void
 577 mlx5_free_shared_dr(struct mlx5_priv *priv)
 578 {
 579 #ifdef HAVE_MLX5DV_DR
 580         struct mlx5_ibv_shared *sh;
 581
 582         if (!priv->dr_shared)
 583                 return;
 584         priv->dr_shared = 0;
 585         sh = priv->sh;
 586         assert(sh);
 587         assert(sh->dv_refcnt);
 588         if (sh->dv_refcnt && --sh->dv_refcnt)
 589                 return;
 590         if (sh->rx_domain) {
 591                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 592                 sh->rx_domain = NULL;
 593         }
 594         if (sh->tx_domain) {
 595                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 596                 sh->tx_domain = NULL;
 597         }
 598 #ifdef HAVE_MLX5DV_DR_ESWITCH
 599         if (sh->fdb_domain) {
 600                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 601                 sh->fdb_domain = NULL;
 602         }
 603         if (sh->esw_drop_action) {
 604                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 605                 sh->esw_drop_action = NULL;
 606         }
 607 #endif
 608         pthread_mutex_destroy(&sh->dv_mutex);
 609 #else
 610         (void)priv;
 611 #endif
 612 }
 613
 614 /**
 615  * Initialize shared data between primary and secondary process.
 616  *
 617  * A memzone is reserved by primary process and secondary processes attach to
 618  * the memzone.
 619  *
 620  * @return
 621  *   0 on success, a negative errno value otherwise and rte_errno is set.
 622  */
 623 static int
 624 mlx5_init_shared_data(void)
 625 {
 626         const struct rte_memzone *mz;
 627         int ret = 0;
 628
 629         rte_spinlock_lock(&mlx5_shared_data_lock);
 630         if (mlx5_shared_data == NULL) {
 631                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 632                         /* Allocate shared memory. */
 633                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 634                                                  sizeof(*mlx5_shared_data),
 635                                                  SOCKET_ID_ANY, 0);
 636                         if (mz == NULL) {
 637                                 DRV_LOG(ERR,
 638                                         "Cannot allocate mlx5 shared data\n");
 639                                 ret = -rte_errno;
 640                                 goto error;
 641                         }
 642                         mlx5_shared_data = mz->addr;
 643                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 644                         rte_spinlock_init(&mlx5_shared_data->lock);
 645                 } else {
 646                         /* Lookup allocated shared memory. */
 647                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 648                         if (mz == NULL) {
 649                                 DRV_LOG(ERR,
 650                                         "Cannot attach mlx5 shared data\n");
 651                                 ret = -rte_errno;
 652                                 goto error;
 653                         }
 654                         mlx5_shared_data = mz->addr;
 655                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 656                 }
 657         }
 658 error:
 659         rte_spinlock_unlock(&mlx5_shared_data_lock);
 660         return ret;
 661 }
 662
 663 /**
 664  * Retrieve integer value from environment variable.
 665  *
 666  * @param[in] name
 667  *   Environment variable name.
 668  *
 669  * @return
 670  *   Integer value, 0 if the variable is not set.
 671  */
 672 int
 673 mlx5_getenv_int(const char *name)
 674 {
 675         const char *val = getenv(name);
 676
 677         if (val == NULL)
 678                 return 0;
 679         return atoi(val);
 680 }
 681
 682 /**
 683  * Verbs callback to allocate a memory. This function should allocate the space
 684  * according to the size provided residing inside a huge page.
 685  * Please note that all allocation must respect the alignment from libmlx5
 686  * (i.e. currently sysconf(_SC_PAGESIZE)).
 687  *
 688  * @param[in] size
 689  *   The size in bytes of the memory to allocate.
 690  * @param[in] data
 691  *   A pointer to the callback data.
 692  *
 693  * @return
 694  *   Allocated buffer, NULL otherwise and rte_errno is set.
 695  */
 696 static void *
 697 mlx5_alloc_verbs_buf(size_t size, void *data)
 698 {
 699         struct mlx5_priv *priv = data;
 700         void *ret;
 701         size_t alignment = sysconf(_SC_PAGESIZE);
 702         unsigned int socket = SOCKET_ID_ANY;
 703
 704         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 705                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 706
 707                 socket = ctrl->socket;
 708         } else if (priv->verbs_alloc_ctx.type ==
 709                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 710                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 711
 712                 socket = ctrl->socket;
 713         }
 714         assert(data != NULL);
 715         ret = rte_malloc_socket(__func__, size, alignment, socket);
 716         if (!ret && size)
 717                 rte_errno = ENOMEM;
 718         return ret;
 719 }
 720
 721 /**
 722  * Verbs callback to free a memory.
 723  *
 724  * @param[in] ptr
 725  *   A pointer to the memory to free.
 726  * @param[in] data
 727  *   A pointer to the callback data.
 728  */
 729 static void
 730 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 731 {
 732         assert(data != NULL);
 733         rte_free(ptr);
 734 }
 735
 736 /**
 737  * Initialize process private data structure.
 738  *
 739  * @param dev
 740  *   Pointer to Ethernet device structure.
 741  *
 742  * @return
 743  *   0 on success, a negative errno value otherwise and rte_errno is set.
 744  */
 745 int
 746 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 747 {
 748         struct mlx5_priv *priv = dev->data->dev_private;
 749         struct mlx5_proc_priv *ppriv;
 750         size_t ppriv_size;
 751
 752         /*
 753          * UAR register table follows the process private structure. BlueFlame
 754          * registers for Tx queues are stored in the table.
 755          */
 756         ppriv_size =
 757                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 758         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 759                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 760         if (!ppriv) {
 761                 rte_errno = ENOMEM;
 762                 return -rte_errno;
 763         }
 764         ppriv->uar_table_sz = ppriv_size;
 765         dev->process_private = ppriv;
 766         return 0;
 767 }
 768
 769 /**
 770  * Un-initialize process private data structure.
 771  *
 772  * @param dev
 773  *   Pointer to Ethernet device structure.
 774  */
 775 static void
 776 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 777 {
 778         if (!dev->process_private)
 779                 return;
 780         rte_free(dev->process_private);
 781         dev->process_private = NULL;
 782 }
 783
 784 /**
 785  * DPDK callback to close the device.
 786  *
 787  * Destroy all queues and objects, free memory.
 788  *
 789  * @param dev
 790  *   Pointer to Ethernet device structure.
 791  */
 792 static void
 793 mlx5_dev_close(struct rte_eth_dev *dev)
 794 {
 795         struct mlx5_priv *priv = dev->data->dev_private;
 796         unsigned int i;
 797         int ret;
 798
 799         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 800                 dev->data->port_id,
 801                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 802         /* In case mlx5_dev_stop() has not been called. */
 803         mlx5_dev_interrupt_handler_uninstall(dev);
 804         mlx5_traffic_disable(dev);
 805         mlx5_flow_flush(dev, NULL);
 806         /* Prevent crashes when queues are still in use. */
 807         dev->rx_pkt_burst = removed_rx_burst;
 808         dev->tx_pkt_burst = removed_tx_burst;
 809         rte_wmb();
 810         /* Disable datapath on secondary process. */
 811         mlx5_mp_req_stop_rxtx(dev);
 812         if (priv->rxqs != NULL) {
 813                 /* XXX race condition if mlx5_rx_burst() is still running. */
 814                 usleep(1000);
 815                 for (i = 0; (i != priv->rxqs_n); ++i)
 816                         mlx5_rxq_release(dev, i);
 817                 priv->rxqs_n = 0;
 818                 priv->rxqs = NULL;
 819         }
 820         if (priv->txqs != NULL) {
 821                 /* XXX race condition if mlx5_tx_burst() is still running. */
 822                 usleep(1000);
 823                 for (i = 0; (i != priv->txqs_n); ++i)
 824                         mlx5_txq_release(dev, i);
 825                 priv->txqs_n = 0;
 826                 priv->txqs = NULL;
 827         }
 828         mlx5_proc_priv_uninit(dev);
 829         mlx5_mprq_free_mp(dev);
 830         /* Remove from memory callback device list. */
 831         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 832         assert(priv->sh);
 833         LIST_REMOVE(priv->sh, mem_event_cb);
 834         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 835         mlx5_free_shared_dr(priv);
 836         if (priv->rss_conf.rss_key != NULL)
 837                 rte_free(priv->rss_conf.rss_key);
 838         if (priv->reta_idx != NULL)
 839                 rte_free(priv->reta_idx);
 840         if (priv->config.vf)
 841                 mlx5_nl_mac_addr_flush(dev);
 842         if (priv->nl_socket_route >= 0)
 843                 close(priv->nl_socket_route);
 844         if (priv->nl_socket_rdma >= 0)
 845                 close(priv->nl_socket_rdma);
 846         if (priv->vmwa_context)
 847                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
 848         if (priv->sh) {
 849                 /*
 850                  * Free the shared context in last turn, because the cleanup
 851                  * routines above may use some shared fields, like
 852                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 853                  * ifindex if Netlink fails.
 854                  */
 855                 mlx5_free_shared_ibctx(priv->sh);
 856                 priv->sh = NULL;
 857         }
 858         ret = mlx5_hrxq_verify(dev);
 859         if (ret)
 860                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 861                         dev->data->port_id);
 862         ret = mlx5_ind_table_obj_verify(dev);
 863         if (ret)
 864                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 865                         dev->data->port_id);
 866         ret = mlx5_rxq_obj_verify(dev);
 867         if (ret)
 868                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
 869                         dev->data->port_id);
 870         ret = mlx5_rxq_verify(dev);
 871         if (ret)
 872                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 873                         dev->data->port_id);
 874         ret = mlx5_txq_ibv_verify(dev);
 875         if (ret)
 876                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 877                         dev->data->port_id);
 878         ret = mlx5_txq_verify(dev);
 879         if (ret)
 880                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 881                         dev->data->port_id);
 882         ret = mlx5_flow_verify(dev);
 883         if (ret)
 884                 DRV_LOG(WARNING, "port %u some flows still remain",
 885                         dev->data->port_id);
 886         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 887                 unsigned int c = 0;
 888                 uint16_t port_id;
 889
 890                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 891                         struct mlx5_priv *opriv =
 892                                 rte_eth_devices[port_id].data->dev_private;
 893
 894                         if (!opriv ||
 895                             opriv->domain_id != priv->domain_id ||
 896                             &rte_eth_devices[port_id] == dev)
 897                                 continue;
 898                         ++c;
 899                 }
 900                 if (!c)
 901                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 902         }
 903         memset(priv, 0, sizeof(*priv));
 904         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 905         /*
 906          * Reset mac_addrs to NULL such that it is not freed as part of
 907          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 908          * it is freed when dev_private is freed.
 909          */
 910         dev->data->mac_addrs = NULL;
 911 }
 912
 913 const struct eth_dev_ops mlx5_dev_ops = {
 914         .dev_configure = mlx5_dev_configure,
 915         .dev_start = mlx5_dev_start,
 916         .dev_stop = mlx5_dev_stop,
 917         .dev_set_link_down = mlx5_set_link_down,
 918         .dev_set_link_up = mlx5_set_link_up,
 919         .dev_close = mlx5_dev_close,
 920         .promiscuous_enable = mlx5_promiscuous_enable,
 921         .promiscuous_disable = mlx5_promiscuous_disable,
 922         .allmulticast_enable = mlx5_allmulticast_enable,
 923         .allmulticast_disable = mlx5_allmulticast_disable,
 924         .link_update = mlx5_link_update,
 925         .stats_get = mlx5_stats_get,
 926         .stats_reset = mlx5_stats_reset,
 927         .xstats_get = mlx5_xstats_get,
 928         .xstats_reset = mlx5_xstats_reset,
 929         .xstats_get_names = mlx5_xstats_get_names,
 930         .fw_version_get = mlx5_fw_version_get,
 931         .dev_infos_get = mlx5_dev_infos_get,
 932         .read_clock = mlx5_read_clock,
 933         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 934         .vlan_filter_set = mlx5_vlan_filter_set,
 935         .rx_queue_setup = mlx5_rx_queue_setup,
 936         .tx_queue_setup = mlx5_tx_queue_setup,
 937         .rx_queue_release = mlx5_rx_queue_release,
 938         .tx_queue_release = mlx5_tx_queue_release,
 939         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 940         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 941         .mac_addr_remove = mlx5_mac_addr_remove,
 942         .mac_addr_add = mlx5_mac_addr_add,
 943         .mac_addr_set = mlx5_mac_addr_set,
 944         .set_mc_addr_list = mlx5_set_mc_addr_list,
 945         .mtu_set = mlx5_dev_set_mtu,
 946         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 947         .vlan_offload_set = mlx5_vlan_offload_set,
 948         .reta_update = mlx5_dev_rss_reta_update,
 949         .reta_query = mlx5_dev_rss_reta_query,
 950         .rss_hash_update = mlx5_rss_hash_update,
 951         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 952         .filter_ctrl = mlx5_dev_filter_ctrl,
 953         .rx_descriptor_status = mlx5_rx_descriptor_status,
 954         .tx_descriptor_status = mlx5_tx_descriptor_status,
 955         .rx_queue_count = mlx5_rx_queue_count,
 956         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 957         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 958         .is_removed = mlx5_is_removed,
 959 };
 960
 961 /* Available operations from secondary process. */
 962 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 963         .stats_get = mlx5_stats_get,
 964         .stats_reset = mlx5_stats_reset,
 965         .xstats_get = mlx5_xstats_get,
 966         .xstats_reset = mlx5_xstats_reset,
 967         .xstats_get_names = mlx5_xstats_get_names,
 968         .fw_version_get = mlx5_fw_version_get,
 969         .dev_infos_get = mlx5_dev_infos_get,
 970         .rx_descriptor_status = mlx5_rx_descriptor_status,
 971         .tx_descriptor_status = mlx5_tx_descriptor_status,
 972 };
 973
 974 /* Available operations in flow isolated mode. */
 975 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 976         .dev_configure = mlx5_dev_configure,
 977         .dev_start = mlx5_dev_start,
 978         .dev_stop = mlx5_dev_stop,
 979         .dev_set_link_down = mlx5_set_link_down,
 980         .dev_set_link_up = mlx5_set_link_up,
 981         .dev_close = mlx5_dev_close,
 982         .promiscuous_enable = mlx5_promiscuous_enable,
 983         .promiscuous_disable = mlx5_promiscuous_disable,
 984         .allmulticast_enable = mlx5_allmulticast_enable,
 985         .allmulticast_disable = mlx5_allmulticast_disable,
 986         .link_update = mlx5_link_update,
 987         .stats_get = mlx5_stats_get,
 988         .stats_reset = mlx5_stats_reset,
 989         .xstats_get = mlx5_xstats_get,
 990         .xstats_reset = mlx5_xstats_reset,
 991         .xstats_get_names = mlx5_xstats_get_names,
 992         .fw_version_get = mlx5_fw_version_get,
 993         .dev_infos_get = mlx5_dev_infos_get,
 994         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 995         .vlan_filter_set = mlx5_vlan_filter_set,
 996         .rx_queue_setup = mlx5_rx_queue_setup,
 997         .tx_queue_setup = mlx5_tx_queue_setup,
 998         .rx_queue_release = mlx5_rx_queue_release,
 999         .tx_queue_release = mlx5_tx_queue_release,
1000         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1001         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1002         .mac_addr_remove = mlx5_mac_addr_remove,
1003         .mac_addr_add = mlx5_mac_addr_add,
1004         .mac_addr_set = mlx5_mac_addr_set,
1005         .set_mc_addr_list = mlx5_set_mc_addr_list,
1006         .mtu_set = mlx5_dev_set_mtu,
1007         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1008         .vlan_offload_set = mlx5_vlan_offload_set,
1009         .filter_ctrl = mlx5_dev_filter_ctrl,
1010         .rx_descriptor_status = mlx5_rx_descriptor_status,
1011         .tx_descriptor_status = mlx5_tx_descriptor_status,
1012         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1013         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1014         .is_removed = mlx5_is_removed,
1015 };
1016
1017 /**
1018  * Verify and store value for device argument.
1019  *
1020  * @param[in] key
1021  *   Key argument to verify.
1022  * @param[in] val
1023  *   Value associated with key.
1024  * @param opaque
1025  *   User data.
1026  *
1027  * @return
1028  *   0 on success, a negative errno value otherwise and rte_errno is set.
1029  */
1030 static int
1031 mlx5_args_check(const char *key, const char *val, void *opaque)
1032 {
1033         struct mlx5_dev_config *config = opaque;
1034         unsigned long tmp;
1035
1036         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1037         if (!strcmp(MLX5_REPRESENTOR, key))
1038                 return 0;
1039         errno = 0;
1040         tmp = strtoul(val, NULL, 0);
1041         if (errno) {
1042                 rte_errno = errno;
1043                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1044                 return -rte_errno;
1045         }
1046         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1047                 config->cqe_comp = !!tmp;
1048         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1049                 config->cqe_pad = !!tmp;
1050         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1051                 config->hw_padding = !!tmp;
1052         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1053                 config->mprq.enabled = !!tmp;
1054         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1055                 config->mprq.stride_num_n = tmp;
1056         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1057                 config->mprq.max_memcpy_len = tmp;
1058         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1059                 config->mprq.min_rxqs_num = tmp;
1060         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1061                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1062                                  " converted to txq_inline_max", key);
1063                 config->txq_inline_max = tmp;
1064         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1065                 config->txq_inline_max = tmp;
1066         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1067                 config->txq_inline_min = tmp;
1068         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1069                 config->txq_inline_mpw = tmp;
1070         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1071                 config->txqs_inline = tmp;
1072         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1073                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1074         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1075                 config->mps = !!tmp;
1076         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1077                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1078         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1079                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1080                                  " converted to txq_inline_mpw", key);
1081                 config->txq_inline_mpw = tmp;
1082         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1083                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1084         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1085                 config->rx_vec_en = !!tmp;
1086         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1087                 config->l3_vxlan_en = !!tmp;
1088         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1089                 config->vf_nl_en = !!tmp;
1090         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1091                 config->dv_esw_en = !!tmp;
1092         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1093                 config->dv_flow_en = !!tmp;
1094         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1095                 config->mr_ext_memseg_en = !!tmp;
1096         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1097                 config->max_dump_files_num = tmp;
1098         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1099                 config->lro.timeout = tmp;
1100         } else {
1101                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1102                 rte_errno = EINVAL;
1103                 return -rte_errno;
1104         }
1105         return 0;
1106 }
1107
1108 /**
1109  * Parse device parameters.
1110  *
1111  * @param config
1112  *   Pointer to device configuration structure.
1113  * @param devargs
1114  *   Device arguments structure.
1115  *
1116  * @return
1117  *   0 on success, a negative errno value otherwise and rte_errno is set.
1118  */
1119 static int
1120 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1121 {
1122         const char **params = (const char *[]){
1123                 MLX5_RXQ_CQE_COMP_EN,
1124                 MLX5_RXQ_CQE_PAD_EN,
1125                 MLX5_RXQ_PKT_PAD_EN,
1126                 MLX5_RX_MPRQ_EN,
1127                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1128                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1129                 MLX5_RXQS_MIN_MPRQ,
1130                 MLX5_TXQ_INLINE,
1131                 MLX5_TXQ_INLINE_MIN,
1132                 MLX5_TXQ_INLINE_MAX,
1133                 MLX5_TXQ_INLINE_MPW,
1134                 MLX5_TXQS_MIN_INLINE,
1135                 MLX5_TXQS_MAX_VEC,
1136                 MLX5_TXQ_MPW_EN,
1137                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1138                 MLX5_TXQ_MAX_INLINE_LEN,
1139                 MLX5_TX_VEC_EN,
1140                 MLX5_RX_VEC_EN,
1141                 MLX5_L3_VXLAN_EN,
1142                 MLX5_VF_NL_EN,
1143                 MLX5_DV_ESW_EN,
1144                 MLX5_DV_FLOW_EN,
1145                 MLX5_MR_EXT_MEMSEG_EN,
1146                 MLX5_REPRESENTOR,
1147                 MLX5_MAX_DUMP_FILES_NUM,
1148                 MLX5_LRO_TIMEOUT_USEC,
1149                 NULL,
1150         };
1151         struct rte_kvargs *kvlist;
1152         int ret = 0;
1153         int i;
1154
1155         if (devargs == NULL)
1156                 return 0;
1157         /* Following UGLY cast is done to pass checkpatch. */
1158         kvlist = rte_kvargs_parse(devargs->args, params);
1159         if (kvlist == NULL) {
1160                 rte_errno = EINVAL;
1161                 return -rte_errno;
1162         }
1163         /* Process parameters. */
1164         for (i = 0; (params[i] != NULL); ++i) {
1165                 if (rte_kvargs_count(kvlist, params[i])) {
1166                         ret = rte_kvargs_process(kvlist, params[i],
1167                                                  mlx5_args_check, config);
1168                         if (ret) {
1169                                 rte_errno = EINVAL;
1170                                 rte_kvargs_free(kvlist);
1171                                 return -rte_errno;
1172                         }
1173                 }
1174         }
1175         rte_kvargs_free(kvlist);
1176         return 0;
1177 }
1178
1179 static struct rte_pci_driver mlx5_driver;
1180
1181 /**
1182  * PMD global initialization.
1183  *
1184  * Independent from individual device, this function initializes global
1185  * per-PMD data structures distinguishing primary and secondary processes.
1186  * Hence, each initialization is called once per a process.
1187  *
1188  * @return
1189  *   0 on success, a negative errno value otherwise and rte_errno is set.
1190  */
1191 static int
1192 mlx5_init_once(void)
1193 {
1194         struct mlx5_shared_data *sd;
1195         struct mlx5_local_data *ld = &mlx5_local_data;
1196         int ret = 0;
1197
1198         if (mlx5_init_shared_data())
1199                 return -rte_errno;
1200         sd = mlx5_shared_data;
1201         assert(sd);
1202         rte_spinlock_lock(&sd->lock);
1203         switch (rte_eal_process_type()) {
1204         case RTE_PROC_PRIMARY:
1205                 if (sd->init_done)
1206                         break;
1207                 LIST_INIT(&sd->mem_event_cb_list);
1208                 rte_rwlock_init(&sd->mem_event_rwlock);
1209                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1210                                                 mlx5_mr_mem_event_cb, NULL);
1211                 ret = mlx5_mp_init_primary();
1212                 if (ret)
1213                         goto out;
1214                 sd->init_done = true;
1215                 break;
1216         case RTE_PROC_SECONDARY:
1217                 if (ld->init_done)
1218                         break;
1219                 ret = mlx5_mp_init_secondary();
1220                 if (ret)
1221                         goto out;
1222                 ++sd->secondary_cnt;
1223                 ld->init_done = true;
1224                 break;
1225         default:
1226                 break;
1227         }
1228 out:
1229         rte_spinlock_unlock(&sd->lock);
1230         return ret;
1231 }
1232
1233 /**
1234  * Configures the minimal amount of data to inline into WQE
1235  * while sending packets.
1236  *
1237  * - the txq_inline_min has the maximal priority, if this
1238  *   key is specified in devargs
1239  * - if DevX is enabled the inline mode is queried from the
1240  *   device (HCA attributes and NIC vport context if needed).
1241  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1242  *   and none (0 bytes) for other NICs
1243  *
1244  * @param spawn
1245  *   Verbs device parameters (name, port, switch_info) to spawn.
1246  * @param config
1247  *   Device configuration parameters.
1248  */
1249 static void
1250 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1251                     struct mlx5_dev_config *config)
1252 {
1253         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1254                 /* Application defines size of inlined data explicitly. */
1255                 switch (spawn->pci_dev->id.device_id) {
1256                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1257                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1258                         if (config->txq_inline_min <
1259                                        (int)MLX5_INLINE_HSIZE_L2) {
1260                                 DRV_LOG(DEBUG,
1261                                         "txq_inline_mix aligned to minimal"
1262                                         " ConnectX-4 required value %d",
1263                                         (int)MLX5_INLINE_HSIZE_L2);
1264                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1265                         }
1266                         break;
1267                 }
1268                 goto exit;
1269         }
1270         if (config->hca_attr.eth_net_offloads) {
1271                 /* We have DevX enabled, inline mode queried successfully. */
1272                 switch (config->hca_attr.wqe_inline_mode) {
1273                 case MLX5_CAP_INLINE_MODE_L2:
1274                         /* outer L2 header must be inlined. */
1275                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1276                         goto exit;
1277                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1278                         /* No inline data are required by NIC. */
1279                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1280                         config->hw_vlan_insert =
1281                                 config->hca_attr.wqe_vlan_insert;
1282                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1283                         goto exit;
1284                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1285                         /* inline mode is defined by NIC vport context. */
1286                         if (!config->hca_attr.eth_virt)
1287                                 break;
1288                         switch (config->hca_attr.vport_inline_mode) {
1289                         case MLX5_INLINE_MODE_NONE:
1290                                 config->txq_inline_min =
1291                                         MLX5_INLINE_HSIZE_NONE;
1292                                 goto exit;
1293                         case MLX5_INLINE_MODE_L2:
1294                                 config->txq_inline_min =
1295                                         MLX5_INLINE_HSIZE_L2;
1296                                 goto exit;
1297                         case MLX5_INLINE_MODE_IP:
1298                                 config->txq_inline_min =
1299                                         MLX5_INLINE_HSIZE_L3;
1300                                 goto exit;
1301                         case MLX5_INLINE_MODE_TCP_UDP:
1302                                 config->txq_inline_min =
1303                                         MLX5_INLINE_HSIZE_L4;
1304                                 goto exit;
1305                         case MLX5_INLINE_MODE_INNER_L2:
1306                                 config->txq_inline_min =
1307                                         MLX5_INLINE_HSIZE_INNER_L2;
1308                                 goto exit;
1309                         case MLX5_INLINE_MODE_INNER_IP:
1310                                 config->txq_inline_min =
1311                                         MLX5_INLINE_HSIZE_INNER_L3;
1312                                 goto exit;
1313                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1314                                 config->txq_inline_min =
1315                                         MLX5_INLINE_HSIZE_INNER_L4;
1316                                 goto exit;
1317                         }
1318                 }
1319         }
1320         /*
1321          * We get here if we are unable to deduce
1322          * inline data size with DevX. Try PCI ID
1323          * to determine old NICs.
1324          */
1325         switch (spawn->pci_dev->id.device_id) {
1326         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1327         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1328                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1329                 config->hw_vlan_insert = 0;
1330                 break;
1331         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1332         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1333                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1334                 config->hw_vlan_insert = 0;
1335                 break;
1336         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1337         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1338         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1339         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1340                 /*
1341                  * These NICs support VLAN insertion from WQE and
1342                  * report the wqe_vlan_insert flag. But there is the bug
1343                  * and PFC control may be broken, so disable feature.
1344                  */
1345                 config->hw_vlan_insert = 0;
1346                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1347                 break;
1348         default:
1349                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1350                 break;
1351         }
1352 exit:
1353         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1354 }
1355
1356 /**
1357  * Allocate page of door-bells and register it using DevX API.
1358  *
1359  * @param [in] dev
1360  *   Pointer to Ethernet device.
1361  *
1362  * @return
1363  *   Pointer to new page on success, NULL otherwise.
1364  */
1365 static struct mlx5_devx_dbr_page *
1366 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1367 {
1368         struct mlx5_priv *priv = dev->data->dev_private;
1369         struct mlx5_devx_dbr_page *page;
1370
1371         /* Allocate space for door-bell page and management data. */
1372         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1373                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1374         if (!page) {
1375                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1376                         dev->data->port_id);
1377                 return NULL;
1378         }
1379         /* Register allocated memory. */
1380         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1381                                               MLX5_DBR_PAGE_SIZE, 0);
1382         if (!page->umem) {
1383                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1384                         dev->data->port_id);
1385                 rte_free(page);
1386                 return NULL;
1387         }
1388         return page;
1389 }
1390
1391 /**
1392  * Find the next available door-bell, allocate new page if needed.
1393  *
1394  * @param [in] dev
1395  *   Pointer to Ethernet device.
1396  * @param [out] dbr_page
1397  *   Door-bell page containing the page data.
1398  *
1399  * @return
1400  *   Door-bell address offset on success, a negative error value otherwise.
1401  */
1402 int64_t
1403 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1404 {
1405         struct mlx5_priv *priv = dev->data->dev_private;
1406         struct mlx5_devx_dbr_page *page = NULL;
1407         uint32_t i, j;
1408
1409         LIST_FOREACH(page, &priv->dbrpgs, next)
1410                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1411                         break;
1412         if (!page) { /* No page with free door-bell exists. */
1413                 page = mlx5_alloc_dbr_page(dev);
1414                 if (!page) /* Failed to allocate new page. */
1415                         return (-1);
1416                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1417         }
1418         /* Loop to find bitmap part with clear bit. */
1419         for (i = 0;
1420              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1421              i++)
1422                 ; /* Empty. */
1423         /* Find the first clear bit. */
1424         j = rte_bsf64(~page->dbr_bitmap[i]);
1425         assert(i < (MLX5_DBR_PER_PAGE / 64));
1426         page->dbr_bitmap[i] |= (1 << j);
1427         page->dbr_count++;
1428         *dbr_page = page;
1429         return (((i * 64) + j) * sizeof(uint64_t));
1430 }
1431
1432 /**
1433  * Release a door-bell record.
1434  *
1435  * @param [in] dev
1436  *   Pointer to Ethernet device.
1437  * @param [in] umem_id
1438  *   UMEM ID of page containing the door-bell record to release.
1439  * @param [in] offset
1440  *   Offset of door-bell record in page.
1441  *
1442  * @return
1443  *   0 on success, a negative error value otherwise.
1444  */
1445 int32_t
1446 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1447 {
1448         struct mlx5_priv *priv = dev->data->dev_private;
1449         struct mlx5_devx_dbr_page *page = NULL;
1450         int ret = 0;
1451
1452         LIST_FOREACH(page, &priv->dbrpgs, next)
1453                 /* Find the page this address belongs to. */
1454                 if (page->umem->umem_id == umem_id)
1455                         break;
1456         if (!page)
1457                 return -EINVAL;
1458         page->dbr_count--;
1459         if (!page->dbr_count) {
1460                 /* Page not used, free it and remove from list. */
1461                 LIST_REMOVE(page, next);
1462                 if (page->umem)
1463                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1464                 rte_free(page);
1465         } else {
1466                 /* Mark in bitmap that this door-bell is not in use. */
1467                 offset /= MLX5_DBR_SIZE;
1468                 int i = offset / 64;
1469                 int j = offset % 64;
1470
1471                 page->dbr_bitmap[i] &= ~(1 << j);
1472         }
1473         return ret;
1474 }
1475
1476 /**
1477  * Spawn an Ethernet device from Verbs information.
1478  *
1479  * @param dpdk_dev
1480  *   Backing DPDK device.
1481  * @param spawn
1482  *   Verbs device parameters (name, port, switch_info) to spawn.
1483  * @param config
1484  *   Device configuration parameters.
1485  *
1486  * @return
1487  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1488  *   is set. The following errors are defined:
1489  *
1490  *   EBUSY: device is not supposed to be spawned.
1491  *   EEXIST: device is already spawned
1492  */
1493 static struct rte_eth_dev *
1494 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1495                struct mlx5_dev_spawn_data *spawn,
1496                struct mlx5_dev_config config)
1497 {
1498         const struct mlx5_switch_info *switch_info = &spawn->info;
1499         struct mlx5_ibv_shared *sh = NULL;
1500         struct ibv_port_attr port_attr;
1501         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1502         struct rte_eth_dev *eth_dev = NULL;
1503         struct mlx5_priv *priv = NULL;
1504         int err = 0;
1505         unsigned int hw_padding = 0;
1506         unsigned int mps;
1507         unsigned int cqe_comp;
1508         unsigned int cqe_pad = 0;
1509         unsigned int tunnel_en = 0;
1510         unsigned int mpls_en = 0;
1511         unsigned int swp = 0;
1512         unsigned int mprq = 0;
1513         unsigned int mprq_min_stride_size_n = 0;
1514         unsigned int mprq_max_stride_size_n = 0;
1515         unsigned int mprq_min_stride_num_n = 0;
1516         unsigned int mprq_max_stride_num_n = 0;
1517         struct rte_ether_addr mac;
1518         char name[RTE_ETH_NAME_MAX_LEN];
1519         int own_domain_id = 0;
1520         uint16_t port_id;
1521         unsigned int i;
1522
1523         /* Determine if this port representor is supposed to be spawned. */
1524         if (switch_info->representor && dpdk_dev->devargs) {
1525                 struct rte_eth_devargs eth_da;
1526
1527                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1528                 if (err) {
1529                         rte_errno = -err;
1530                         DRV_LOG(ERR, "failed to process device arguments: %s",
1531                                 strerror(rte_errno));
1532                         return NULL;
1533                 }
1534                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1535                         if (eth_da.representor_ports[i] ==
1536                             (uint16_t)switch_info->port_name)
1537                                 break;
1538                 if (i == eth_da.nb_representor_ports) {
1539                         rte_errno = EBUSY;
1540                         return NULL;
1541                 }
1542         }
1543         /* Build device name. */
1544         if (!switch_info->representor)
1545                 strlcpy(name, dpdk_dev->name, sizeof(name));
1546         else
1547                 snprintf(name, sizeof(name), "%s_representor_%u",
1548                          dpdk_dev->name, switch_info->port_name);
1549         /* check if the device is already spawned */
1550         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1551                 rte_errno = EEXIST;
1552                 return NULL;
1553         }
1554         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1555         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1556                 eth_dev = rte_eth_dev_attach_secondary(name);
1557                 if (eth_dev == NULL) {
1558                         DRV_LOG(ERR, "can not attach rte ethdev");
1559                         rte_errno = ENOMEM;
1560                         return NULL;
1561                 }
1562                 eth_dev->device = dpdk_dev;
1563                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1564                 err = mlx5_proc_priv_init(eth_dev);
1565                 if (err)
1566                         return NULL;
1567                 /* Receive command fd from primary process */
1568                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1569                 if (err < 0)
1570                         return NULL;
1571                 /* Remap UAR for Tx queues. */
1572                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1573                 if (err)
1574                         return NULL;
1575                 /*
1576                  * Ethdev pointer is still required as input since
1577                  * the primary device is not accessible from the
1578                  * secondary process.
1579                  */
1580                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1581                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1582                 return eth_dev;
1583         }
1584         sh = mlx5_alloc_shared_ibctx(spawn);
1585         if (!sh)
1586                 return NULL;
1587         config.devx = sh->devx;
1588 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1589         config.dest_tir = 1;
1590 #endif
1591 #ifdef HAVE_IBV_MLX5_MOD_SWP
1592         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1593 #endif
1594         /*
1595          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1596          * as all ConnectX-5 devices.
1597          */
1598 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1599         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1600 #endif
1601 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1602         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1603 #endif
1604         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1605         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1606                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1607                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1608                         mps = MLX5_MPW_ENHANCED;
1609                 } else {
1610                         DRV_LOG(DEBUG, "MPW is supported");
1611                         mps = MLX5_MPW;
1612                 }
1613         } else {
1614                 DRV_LOG(DEBUG, "MPW isn't supported");
1615                 mps = MLX5_MPW_DISABLED;
1616         }
1617 #ifdef HAVE_IBV_MLX5_MOD_SWP
1618         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1619                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1620         DRV_LOG(DEBUG, "SWP support: %u", swp);
1621 #endif
1622         config.swp = !!swp;
1623 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1624         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1625                 struct mlx5dv_striding_rq_caps mprq_caps =
1626                         dv_attr.striding_rq_caps;
1627
1628                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1629                         mprq_caps.min_single_stride_log_num_of_bytes);
1630                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1631                         mprq_caps.max_single_stride_log_num_of_bytes);
1632                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1633                         mprq_caps.min_single_wqe_log_num_of_strides);
1634                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1635                         mprq_caps.max_single_wqe_log_num_of_strides);
1636                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1637                         mprq_caps.supported_qpts);
1638                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1639                 mprq = 1;
1640                 mprq_min_stride_size_n =
1641                         mprq_caps.min_single_stride_log_num_of_bytes;
1642                 mprq_max_stride_size_n =
1643                         mprq_caps.max_single_stride_log_num_of_bytes;
1644                 mprq_min_stride_num_n =
1645                         mprq_caps.min_single_wqe_log_num_of_strides;
1646                 mprq_max_stride_num_n =
1647                         mprq_caps.max_single_wqe_log_num_of_strides;
1648                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1649                                                    mprq_min_stride_num_n);
1650         }
1651 #endif
1652         if (RTE_CACHE_LINE_SIZE == 128 &&
1653             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1654                 cqe_comp = 0;
1655         else
1656                 cqe_comp = 1;
1657         config.cqe_comp = cqe_comp;
1658 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1659         /* Whether device supports 128B Rx CQE padding. */
1660         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1661                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1662 #endif
1663 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1664         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1665                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1666                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1667                              (dv_attr.tunnel_offloads_caps &
1668                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1669         }
1670         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1671                 tunnel_en ? "" : "not ");
1672 #else
1673         DRV_LOG(WARNING,
1674                 "tunnel offloading disabled due to old OFED/rdma-core version");
1675 #endif
1676         config.tunnel_en = tunnel_en;
1677 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1678         mpls_en = ((dv_attr.tunnel_offloads_caps &
1679                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1680                    (dv_attr.tunnel_offloads_caps &
1681                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1682         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1683                 mpls_en ? "" : "not ");
1684 #else
1685         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1686                 " old OFED/rdma-core version or firmware configuration");
1687 #endif
1688         config.mpls_en = mpls_en;
1689         /* Check port status. */
1690         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1691         if (err) {
1692                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1693                 goto error;
1694         }
1695         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1696                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1697                 err = EINVAL;
1698                 goto error;
1699         }
1700         if (port_attr.state != IBV_PORT_ACTIVE)
1701                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1702                         mlx5_glue->port_state_str(port_attr.state),
1703                         port_attr.state);
1704         /* Allocate private eth device data. */
1705         priv = rte_zmalloc("ethdev private structure",
1706                            sizeof(*priv),
1707                            RTE_CACHE_LINE_SIZE);
1708         if (priv == NULL) {
1709                 DRV_LOG(ERR, "priv allocation failure");
1710                 err = ENOMEM;
1711                 goto error;
1712         }
1713         priv->sh = sh;
1714         priv->ibv_port = spawn->ibv_port;
1715         priv->mtu = RTE_ETHER_MTU;
1716 #ifndef RTE_ARCH_64
1717         /* Initialize UAR access locks for 32bit implementations. */
1718         rte_spinlock_init(&priv->uar_lock_cq);
1719         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1720                 rte_spinlock_init(&priv->uar_lock[i]);
1721 #endif
1722         /* Some internal functions rely on Netlink sockets, open them now. */
1723         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1724         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1725         priv->nl_sn = 0;
1726         priv->representor = !!switch_info->representor;
1727         priv->master = !!switch_info->master;
1728         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1729         /*
1730          * Currently we support single E-Switch per PF configurations
1731          * only and vport_id field contains the vport index for
1732          * associated VF, which is deduced from representor port name.
1733          * For example, let's have the IB device port 10, it has
1734          * attached network device eth0, which has port name attribute
1735          * pf0vf2, we can deduce the VF number as 2, and set vport index
1736          * as 3 (2+1). This assigning schema should be changed if the
1737          * multiple E-Switch instances per PF configurations or/and PCI
1738          * subfunctions are added.
1739          */
1740         priv->vport_id = switch_info->representor ?
1741                          switch_info->port_name + 1 : -1;
1742         /* representor_id field keeps the unmodified port/VF index. */
1743         priv->representor_id = switch_info->representor ?
1744                                switch_info->port_name : -1;
1745         /*
1746          * Look for sibling devices in order to reuse their switch domain
1747          * if any, otherwise allocate one.
1748          */
1749         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1750                 const struct mlx5_priv *opriv =
1751                         rte_eth_devices[port_id].data->dev_private;
1752
1753                 if (!opriv ||
1754                         opriv->domain_id ==
1755                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1756                         continue;
1757                 priv->domain_id = opriv->domain_id;
1758                 break;
1759         }
1760         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1761                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1762                 if (err) {
1763                         err = rte_errno;
1764                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1765                                 strerror(rte_errno));
1766                         goto error;
1767                 }
1768                 own_domain_id = 1;
1769         }
1770         err = mlx5_args(&config, dpdk_dev->devargs);
1771         if (err) {
1772                 err = rte_errno;
1773                 DRV_LOG(ERR, "failed to process device arguments: %s",
1774                         strerror(rte_errno));
1775                 goto error;
1776         }
1777         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1778                             IBV_DEVICE_RAW_IP_CSUM);
1779         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1780                 (config.hw_csum ? "" : "not "));
1781 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1782         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1783         DRV_LOG(DEBUG, "counters are not supported");
1784 #endif
1785 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1786         if (config.dv_flow_en) {
1787                 DRV_LOG(WARNING, "DV flow is not supported");
1788                 config.dv_flow_en = 0;
1789         }
1790 #endif
1791         config.ind_table_max_size =
1792                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1793         /*
1794          * Remove this check once DPDK supports larger/variable
1795          * indirection tables.
1796          */
1797         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1798                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1799         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1800                 config.ind_table_max_size);
1801         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1802                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1803         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1804                 (config.hw_vlan_strip ? "" : "not "));
1805         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1806                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1807         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1808                 (config.hw_fcs_strip ? "" : "not "));
1809 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1810         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1811 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1812         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1813                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1814 #endif
1815         if (config.hw_padding && !hw_padding) {
1816                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1817                 config.hw_padding = 0;
1818         } else if (config.hw_padding) {
1819                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1820         }
1821         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1822                       (sh->device_attr.tso_caps.supported_qpts &
1823                        (1 << IBV_QPT_RAW_PACKET)));
1824         if (config.tso)
1825                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1826         /*
1827          * MPW is disabled by default, while the Enhanced MPW is enabled
1828          * by default.
1829          */
1830         if (config.mps == MLX5_ARG_UNSET)
1831                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1832                                                           MLX5_MPW_DISABLED;
1833         else
1834                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1835         DRV_LOG(INFO, "%sMPS is %s",
1836                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1837                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1838         if (config.cqe_comp && !cqe_comp) {
1839                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1840                 config.cqe_comp = 0;
1841         }
1842         if (config.cqe_pad && !cqe_pad) {
1843                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1844                 config.cqe_pad = 0;
1845         } else if (config.cqe_pad) {
1846                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1847         }
1848         if (config.devx) {
1849                 priv->counter_fallback = 0;
1850                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1851                 if (err) {
1852                         err = -err;
1853                         goto error;
1854                 }
1855                 if (!config.hca_attr.flow_counters_dump)
1856                         priv->counter_fallback = 1;
1857 #ifndef HAVE_IBV_DEVX_ASYNC
1858                 priv->counter_fallback = 1;
1859 #endif
1860                 if (priv->counter_fallback)
1861                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1862                 /* Check for LRO support. */
1863                 if (config.dest_tir && config.hca_attr.lro_cap) {
1864                         /* TBD check tunnel lro caps. */
1865                         config.lro.supported = config.hca_attr.lro_cap;
1866                         DRV_LOG(DEBUG, "Device supports LRO");
1867                         /*
1868                          * If LRO timeout is not configured by application,
1869                          * use the minimal supported value.
1870                          */
1871                         if (!config.lro.timeout)
1872                                 config.lro.timeout =
1873                                 config.hca_attr.lro_timer_supported_periods[0];
1874                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1875                                 config.lro.timeout);
1876                 }
1877         }
1878         if (config.mprq.enabled && mprq) {
1879                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1880                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1881                         config.mprq.stride_num_n =
1882                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1883                                         mprq_min_stride_num_n);
1884                         DRV_LOG(WARNING,
1885                                 "the number of strides"
1886                                 " for Multi-Packet RQ is out of range,"
1887                                 " setting default value (%u)",
1888                                 1 << config.mprq.stride_num_n);
1889                 }
1890                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1891                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1892         } else if (config.mprq.enabled && !mprq) {
1893                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1894                 config.mprq.enabled = 0;
1895         }
1896         if (config.max_dump_files_num == 0)
1897                 config.max_dump_files_num = 128;
1898         eth_dev = rte_eth_dev_allocate(name);
1899         if (eth_dev == NULL) {
1900                 DRV_LOG(ERR, "can not allocate rte ethdev");
1901                 err = ENOMEM;
1902                 goto error;
1903         }
1904         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1905         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1906         if (priv->representor) {
1907                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1908                 eth_dev->data->representor_id = priv->representor_id;
1909         }
1910         /*
1911          * Store associated network device interface index. This index
1912          * is permanent throughout the lifetime of device. So, we may store
1913          * the ifindex here and use the cached value further.
1914          */
1915         assert(spawn->ifindex);
1916         priv->if_index = spawn->ifindex;
1917         eth_dev->data->dev_private = priv;
1918         priv->dev_data = eth_dev->data;
1919         eth_dev->data->mac_addrs = priv->mac;
1920         eth_dev->device = dpdk_dev;
1921         /* Configure the first MAC address by default. */
1922         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1923                 DRV_LOG(ERR,
1924                         "port %u cannot get MAC address, is mlx5_en"
1925                         " loaded? (errno: %s)",
1926                         eth_dev->data->port_id, strerror(rte_errno));
1927                 err = ENODEV;
1928                 goto error;
1929         }
1930         DRV_LOG(INFO,
1931                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1932                 eth_dev->data->port_id,
1933                 mac.addr_bytes[0], mac.addr_bytes[1],
1934                 mac.addr_bytes[2], mac.addr_bytes[3],
1935                 mac.addr_bytes[4], mac.addr_bytes[5]);
1936 #ifndef NDEBUG
1937         {
1938                 char ifname[IF_NAMESIZE];
1939
1940                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1941                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1942                                 eth_dev->data->port_id, ifname);
1943                 else
1944                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1945                                 eth_dev->data->port_id);
1946         }
1947 #endif
1948         /* Get actual MTU if possible. */
1949         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1950         if (err) {
1951                 err = rte_errno;
1952                 goto error;
1953         }
1954         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1955                 priv->mtu);
1956         /* Initialize burst functions to prevent crashes before link-up. */
1957         eth_dev->rx_pkt_burst = removed_rx_burst;
1958         eth_dev->tx_pkt_burst = removed_tx_burst;
1959         eth_dev->dev_ops = &mlx5_dev_ops;
1960         /* Register MAC address. */
1961         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1962         if (config.vf && config.vf_nl_en)
1963                 mlx5_nl_mac_addr_sync(eth_dev);
1964         TAILQ_INIT(&priv->flows);
1965         TAILQ_INIT(&priv->ctrl_flows);
1966         /* Hint libmlx5 to use PMD allocator for data plane resources */
1967         struct mlx5dv_ctx_allocators alctr = {
1968                 .alloc = &mlx5_alloc_verbs_buf,
1969                 .free = &mlx5_free_verbs_buf,
1970                 .data = priv,
1971         };
1972         mlx5_glue->dv_set_context_attr(sh->ctx,
1973                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1974                                        (void *)((uintptr_t)&alctr));
1975         /* Bring Ethernet device up. */
1976         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1977                 eth_dev->data->port_id);
1978         mlx5_set_link_up(eth_dev);
1979         /*
1980          * Even though the interrupt handler is not installed yet,
1981          * interrupts will still trigger on the async_fd from
1982          * Verbs context returned by ibv_open_device().
1983          */
1984         mlx5_link_update(eth_dev, 0);
1985 #ifdef HAVE_MLX5DV_DR_ESWITCH
1986         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1987               (switch_info->representor || switch_info->master)))
1988                 config.dv_esw_en = 0;
1989 #else
1990         config.dv_esw_en = 0;
1991 #endif
1992         /* Detect minimal data bytes to inline. */
1993         mlx5_set_min_inline(spawn, &config);
1994         /* Store device configuration on private structure. */
1995         priv->config = config;
1996         /* Create context for virtual machine VLAN workaround. */
1997         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1998         if (config.dv_flow_en) {
1999                 err = mlx5_alloc_shared_dr(priv);
2000                 if (err)
2001                         goto error;
2002         }
2003         /* Supported Verbs flow priority number detection. */
2004         err = mlx5_flow_discover_priorities(eth_dev);
2005         if (err < 0) {
2006                 err = -err;
2007                 goto error;
2008         }
2009         priv->config.flow_prio = err;
2010         /* Add device to memory callback list. */
2011         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
2012         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
2013                          sh, mem_event_cb);
2014         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
2015         return eth_dev;
2016 error:
2017         if (priv) {
2018                 if (priv->sh)
2019                         mlx5_free_shared_dr(priv);
2020                 if (priv->nl_socket_route >= 0)
2021                         close(priv->nl_socket_route);
2022                 if (priv->nl_socket_rdma >= 0)
2023                         close(priv->nl_socket_rdma);
2024                 if (priv->vmwa_context)
2025                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2026                 if (own_domain_id)
2027                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2028                 rte_free(priv);
2029                 if (eth_dev != NULL)
2030                         eth_dev->data->dev_private = NULL;
2031         }
2032         if (eth_dev != NULL) {
2033                 /* mac_addrs must not be freed alone because part of dev_private */
2034                 eth_dev->data->mac_addrs = NULL;
2035                 rte_eth_dev_release_port(eth_dev);
2036         }
2037         if (sh)
2038                 mlx5_free_shared_ibctx(sh);
2039         assert(err > 0);
2040         rte_errno = err;
2041         return NULL;
2042 }
2043
2044 /**
2045  * Comparison callback to sort device data.
2046  *
2047  * This is meant to be used with qsort().
2048  *
2049  * @param a[in]
2050  *   Pointer to pointer to first data object.
2051  * @param b[in]
2052  *   Pointer to pointer to second data object.
2053  *
2054  * @return
2055  *   0 if both objects are equal, less than 0 if the first argument is less
2056  *   than the second, greater than 0 otherwise.
2057  */
2058 static int
2059 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2060 {
2061         const struct mlx5_switch_info *si_a =
2062                 &((const struct mlx5_dev_spawn_data *)a)->info;
2063         const struct mlx5_switch_info *si_b =
2064                 &((const struct mlx5_dev_spawn_data *)b)->info;
2065         int ret;
2066
2067         /* Master device first. */
2068         ret = si_b->master - si_a->master;
2069         if (ret)
2070                 return ret;
2071         /* Then representor devices. */
2072         ret = si_b->representor - si_a->representor;
2073         if (ret)
2074                 return ret;
2075         /* Unidentified devices come last in no specific order. */
2076         if (!si_a->representor)
2077                 return 0;
2078         /* Order representors by name. */
2079         return si_a->port_name - si_b->port_name;
2080 }
2081
2082 /**
2083  * DPDK callback to register a PCI device.
2084  *
2085  * This function spawns Ethernet devices out of a given PCI device.
2086  *
2087  * @param[in] pci_drv
2088  *   PCI driver structure (mlx5_driver).
2089  * @param[in] pci_dev
2090  *   PCI device information.
2091  *
2092  * @return
2093  *   0 on success, a negative errno value otherwise and rte_errno is set.
2094  */
2095 static int
2096 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2097                struct rte_pci_device *pci_dev)
2098 {
2099         struct ibv_device **ibv_list;
2100         /*
2101          * Number of found IB Devices matching with requested PCI BDF.
2102          * nd != 1 means there are multiple IB devices over the same
2103          * PCI device and we have representors and master.
2104          */
2105         unsigned int nd = 0;
2106         /*
2107          * Number of found IB device Ports. nd = 1 and np = 1..n means
2108          * we have the single multiport IB device, and there may be
2109          * representors attached to some of found ports.
2110          */
2111         unsigned int np = 0;
2112         /*
2113          * Number of DPDK ethernet devices to Spawn - either over
2114          * multiple IB devices or multiple ports of single IB device.
2115          * Actually this is the number of iterations to spawn.
2116          */
2117         unsigned int ns = 0;
2118         struct mlx5_dev_config dev_config;
2119         int ret;
2120
2121         ret = mlx5_init_once();
2122         if (ret) {
2123                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2124                         strerror(rte_errno));
2125                 return -rte_errno;
2126         }
2127         assert(pci_drv == &mlx5_driver);
2128         errno = 0;
2129         ibv_list = mlx5_glue->get_device_list(&ret);
2130         if (!ibv_list) {
2131                 rte_errno = errno ? errno : ENOSYS;
2132                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2133                 return -rte_errno;
2134         }
2135         /*
2136          * First scan the list of all Infiniband devices to find
2137          * matching ones, gathering into the list.
2138          */
2139         struct ibv_device *ibv_match[ret + 1];
2140         int nl_route = -1;
2141         int nl_rdma = -1;
2142         unsigned int i;
2143
2144         while (ret-- > 0) {
2145                 struct rte_pci_addr pci_addr;
2146
2147                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2148                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2149                         continue;
2150                 if (pci_dev->addr.domain != pci_addr.domain ||
2151                     pci_dev->addr.bus != pci_addr.bus ||
2152                     pci_dev->addr.devid != pci_addr.devid ||
2153                     pci_dev->addr.function != pci_addr.function)
2154                         continue;
2155                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2156                         ibv_list[ret]->name);
2157                 ibv_match[nd++] = ibv_list[ret];
2158         }
2159         ibv_match[nd] = NULL;
2160         if (!nd) {
2161                 /* No device matches, just complain and bail out. */
2162                 mlx5_glue->free_device_list(ibv_list);
2163                 DRV_LOG(WARNING,
2164                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2165                         " are kernel drivers loaded?",
2166                         pci_dev->addr.domain, pci_dev->addr.bus,
2167                         pci_dev->addr.devid, pci_dev->addr.function);
2168                 rte_errno = ENOENT;
2169                 ret = -rte_errno;
2170                 return ret;
2171         }
2172         nl_route = mlx5_nl_init(NETLINK_ROUTE);
2173         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2174         if (nd == 1) {
2175                 /*
2176                  * Found single matching device may have multiple ports.
2177                  * Each port may be representor, we have to check the port
2178                  * number and check the representors existence.
2179                  */
2180                 if (nl_rdma >= 0)
2181                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2182                 if (!np)
2183                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2184                                          " ports number", ibv_match[0]->name);
2185         }
2186         /*
2187          * Now we can determine the maximal
2188          * amount of devices to be spawned.
2189          */
2190         struct mlx5_dev_spawn_data list[np ? np : nd];
2191
2192         if (np > 1) {
2193                 /*
2194                  * Single IB device with multiple ports found,
2195                  * it may be E-Switch master device and representors.
2196                  * We have to perform identification trough the ports.
2197                  */
2198                 assert(nl_rdma >= 0);
2199                 assert(ns == 0);
2200                 assert(nd == 1);
2201                 for (i = 1; i <= np; ++i) {
2202                         list[ns].max_port = np;
2203                         list[ns].ibv_port = i;
2204                         list[ns].ibv_dev = ibv_match[0];
2205                         list[ns].eth_dev = NULL;
2206                         list[ns].pci_dev = pci_dev;
2207                         list[ns].ifindex = mlx5_nl_ifindex
2208                                         (nl_rdma, list[ns].ibv_dev->name, i);
2209                         if (!list[ns].ifindex) {
2210                                 /*
2211                                  * No network interface index found for the
2212                                  * specified port, it means there is no
2213                                  * representor on this port. It's OK,
2214                                  * there can be disabled ports, for example
2215                                  * if sriov_numvfs < sriov_totalvfs.
2216                                  */
2217                                 continue;
2218                         }
2219                         ret = -1;
2220                         if (nl_route >= 0)
2221                                 ret = mlx5_nl_switch_info
2222                                                (nl_route,
2223                                                 list[ns].ifindex,
2224                                                 &list[ns].info);
2225                         if (ret || (!list[ns].info.representor &&
2226                                     !list[ns].info.master)) {
2227                                 /*
2228                                  * We failed to recognize representors with
2229                                  * Netlink, let's try to perform the task
2230                                  * with sysfs.
2231                                  */
2232                                 ret =  mlx5_sysfs_switch_info
2233                                                 (list[ns].ifindex,
2234                                                  &list[ns].info);
2235                         }
2236                         if (!ret && (list[ns].info.representor ^
2237                                      list[ns].info.master))
2238                                 ns++;
2239                 }
2240                 if (!ns) {
2241                         DRV_LOG(ERR,
2242                                 "unable to recognize master/representors"
2243                                 " on the IB device with multiple ports");
2244                         rte_errno = ENOENT;
2245                         ret = -rte_errno;
2246                         goto exit;
2247                 }
2248         } else {
2249                 /*
2250                  * The existence of several matching entries (nd > 1) means
2251                  * port representors have been instantiated. No existing Verbs
2252                  * call nor sysfs entries can tell them apart, this can only
2253                  * be done through Netlink calls assuming kernel drivers are
2254                  * recent enough to support them.
2255                  *
2256                  * In the event of identification failure through Netlink,
2257                  * try again through sysfs, then:
2258                  *
2259                  * 1. A single IB device matches (nd == 1) with single
2260                  *    port (np=0/1) and is not a representor, assume
2261                  *    no switch support.
2262                  *
2263                  * 2. Otherwise no safe assumptions can be made;
2264                  *    complain louder and bail out.
2265                  */
2266                 np = 1;
2267                 for (i = 0; i != nd; ++i) {
2268                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2269                         list[ns].max_port = 1;
2270                         list[ns].ibv_port = 1;
2271                         list[ns].ibv_dev = ibv_match[i];
2272                         list[ns].eth_dev = NULL;
2273                         list[ns].pci_dev = pci_dev;
2274                         list[ns].ifindex = 0;
2275                         if (nl_rdma >= 0)
2276                                 list[ns].ifindex = mlx5_nl_ifindex
2277                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2278                         if (!list[ns].ifindex) {
2279                                 char ifname[IF_NAMESIZE];
2280
2281                                 /*
2282                                  * Netlink failed, it may happen with old
2283                                  * ib_core kernel driver (before 4.16).
2284                                  * We can assume there is old driver because
2285                                  * here we are processing single ports IB
2286                                  * devices. Let's try sysfs to retrieve
2287                                  * the ifindex. The method works for
2288                                  * master device only.
2289                                  */
2290                                 if (nd > 1) {
2291                                         /*
2292                                          * Multiple devices found, assume
2293                                          * representors, can not distinguish
2294                                          * master/representor and retrieve
2295                                          * ifindex via sysfs.
2296                                          */
2297                                         continue;
2298                                 }
2299                                 ret = mlx5_get_master_ifname
2300                                         (ibv_match[i]->ibdev_path, &ifname);
2301                                 if (!ret)
2302                                         list[ns].ifindex =
2303                                                 if_nametoindex(ifname);
2304                                 if (!list[ns].ifindex) {
2305                                         /*
2306                                          * No network interface index found
2307                                          * for the specified device, it means
2308                                          * there it is neither representor
2309                                          * nor master.
2310                                          */
2311                                         continue;
2312                                 }
2313                         }
2314                         ret = -1;
2315                         if (nl_route >= 0)
2316                                 ret = mlx5_nl_switch_info
2317                                                (nl_route,
2318                                                 list[ns].ifindex,
2319                                                 &list[ns].info);
2320                         if (ret || (!list[ns].info.representor &&
2321                                     !list[ns].info.master)) {
2322                                 /*
2323                                  * We failed to recognize representors with
2324                                  * Netlink, let's try to perform the task
2325                                  * with sysfs.
2326                                  */
2327                                 ret =  mlx5_sysfs_switch_info
2328                                                 (list[ns].ifindex,
2329                                                  &list[ns].info);
2330                         }
2331                         if (!ret && (list[ns].info.representor ^
2332                                      list[ns].info.master)) {
2333                                 ns++;
2334                         } else if ((nd == 1) &&
2335                                    !list[ns].info.representor &&
2336                                    !list[ns].info.master) {
2337                                 /*
2338                                  * Single IB device with
2339                                  * one physical port and
2340                                  * attached network device.
2341                                  * May be SRIOV is not enabled
2342                                  * or there is no representors.
2343                                  */
2344                                 DRV_LOG(INFO, "no E-Switch support detected");
2345                                 ns++;
2346                                 break;
2347                         }
2348                 }
2349                 if (!ns) {
2350                         DRV_LOG(ERR,
2351                                 "unable to recognize master/representors"
2352                                 " on the multiple IB devices");
2353                         rte_errno = ENOENT;
2354                         ret = -rte_errno;
2355                         goto exit;
2356                 }
2357         }
2358         assert(ns);
2359         /*
2360          * Sort list to probe devices in natural order for users convenience
2361          * (i.e. master first, then representors from lowest to highest ID).
2362          */
2363         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2364         /* Default configuration. */
2365         dev_config = (struct mlx5_dev_config){
2366                 .hw_padding = 0,
2367                 .mps = MLX5_ARG_UNSET,
2368                 .rx_vec_en = 1,
2369                 .txq_inline_max = MLX5_ARG_UNSET,
2370                 .txq_inline_min = MLX5_ARG_UNSET,
2371                 .txq_inline_mpw = MLX5_ARG_UNSET,
2372                 .txqs_inline = MLX5_ARG_UNSET,
2373                 .vf_nl_en = 1,
2374                 .mr_ext_memseg_en = 1,
2375                 .mprq = {
2376                         .enabled = 0, /* Disabled by default. */
2377                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2378                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2379                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2380                 },
2381                 .dv_esw_en = 1,
2382         };
2383         /* Device specific configuration. */
2384         switch (pci_dev->id.device_id) {
2385         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2386         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2387         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2388         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2389                 dev_config.vf = 1;
2390                 break;
2391         default:
2392                 break;
2393         }
2394         for (i = 0; i != ns; ++i) {
2395                 uint32_t restore;
2396
2397                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2398                                                  &list[i],
2399                                                  dev_config);
2400                 if (!list[i].eth_dev) {
2401                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2402                                 break;
2403                         /* Device is disabled or already spawned. Ignore it. */
2404                         continue;
2405                 }
2406                 restore = list[i].eth_dev->data->dev_flags;
2407                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2408                 /* Restore non-PCI flags cleared by the above call. */
2409                 list[i].eth_dev->data->dev_flags |= restore;
2410                 rte_eth_dev_probing_finish(list[i].eth_dev);
2411         }
2412         if (i != ns) {
2413                 DRV_LOG(ERR,
2414                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2415                         " encountering an error: %s",
2416                         pci_dev->addr.domain, pci_dev->addr.bus,
2417                         pci_dev->addr.devid, pci_dev->addr.function,
2418                         strerror(rte_errno));
2419                 ret = -rte_errno;
2420                 /* Roll back. */
2421                 while (i--) {
2422                         if (!list[i].eth_dev)
2423                                 continue;
2424                         mlx5_dev_close(list[i].eth_dev);
2425                         /* mac_addrs must not be freed because in dev_private */
2426                         list[i].eth_dev->data->mac_addrs = NULL;
2427                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2428                 }
2429                 /* Restore original error. */
2430                 rte_errno = -ret;
2431         } else {
2432                 ret = 0;
2433         }
2434 exit:
2435         /*
2436          * Do the routine cleanup:
2437          * - close opened Netlink sockets
2438          * - free the Infiniband device list
2439          */
2440         if (nl_rdma >= 0)
2441                 close(nl_rdma);
2442         if (nl_route >= 0)
2443                 close(nl_route);
2444         assert(ibv_list);
2445         mlx5_glue->free_device_list(ibv_list);
2446         return ret;
2447 }
2448
2449 /**
2450  * DPDK callback to remove a PCI device.
2451  *
2452  * This function removes all Ethernet devices belong to a given PCI device.
2453  *
2454  * @param[in] pci_dev
2455  *   Pointer to the PCI device.
2456  *
2457  * @return
2458  *   0 on success, the function cannot fail.
2459  */
2460 static int
2461 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2462 {
2463         uint16_t port_id;
2464
2465         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2466                 rte_eth_dev_close(port_id);
2467         return 0;
2468 }
2469
2470 static const struct rte_pci_id mlx5_pci_id_map[] = {
2471         {
2472                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2473                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2474         },
2475         {
2476                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2477                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2478         },
2479         {
2480                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2481                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2482         },
2483         {
2484                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2485                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2486         },
2487         {
2488                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2489                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2490         },
2491         {
2492                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2493                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2494         },
2495         {
2496                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2497                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2498         },
2499         {
2500                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2501                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2502         },
2503         {
2504                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2505                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2506         },
2507         {
2508                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2509                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2510         },
2511         {
2512                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2513                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2514         },
2515         {
2516                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2517                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2518         },
2519         {
2520                 .vendor_id = 0
2521         }
2522 };
2523
2524 static struct rte_pci_driver mlx5_driver = {
2525         .driver = {
2526                 .name = MLX5_DRIVER_NAME
2527         },
2528         .id_table = mlx5_pci_id_map,
2529         .probe = mlx5_pci_probe,
2530         .remove = mlx5_pci_remove,
2531         .dma_map = mlx5_dma_map,
2532         .dma_unmap = mlx5_dma_unmap,
2533         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2534                      RTE_PCI_DRV_PROBE_AGAIN,
2535 };
2536
2537 #ifdef RTE_IBVERBS_LINK_DLOPEN
2538
2539 /**
2540  * Suffix RTE_EAL_PMD_PATH with "-glue".
2541  *
2542  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2543  * suffixing its last component.
2544  *
2545  * @param buf[out]
2546  *   Output buffer, should be large enough otherwise NULL is returned.
2547  * @param size
2548  *   Size of @p out.
2549  *
2550  * @return
2551  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2552  */
2553 static char *
2554 mlx5_glue_path(char *buf, size_t size)
2555 {
2556         static const char *const bad[] = { "/", ".", "..", NULL };
2557         const char *path = RTE_EAL_PMD_PATH;
2558         size_t len = strlen(path);
2559         size_t off;
2560         int i;
2561
2562         while (len && path[len - 1] == '/')
2563                 --len;
2564         for (off = len; off && path[off - 1] != '/'; --off)
2565                 ;
2566         for (i = 0; bad[i]; ++i)
2567                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2568                         goto error;
2569         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2570         if (i == -1 || (size_t)i >= size)
2571                 goto error;
2572         return buf;
2573 error:
2574         DRV_LOG(ERR,
2575                 "unable to append \"-glue\" to last component of"
2576                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2577                 " please re-configure DPDK");
2578         return NULL;
2579 }
2580
2581 /**
2582  * Initialization routine for run-time dependency on rdma-core.
2583  */
2584 static int
2585 mlx5_glue_init(void)
2586 {
2587         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2588         const char *path[] = {
2589                 /*
2590                  * A basic security check is necessary before trusting
2591                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2592                  */
2593                 (geteuid() == getuid() && getegid() == getgid() ?
2594                  getenv("MLX5_GLUE_PATH") : NULL),
2595                 /*
2596                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2597                  * variant, otherwise let dlopen() look up libraries on its
2598                  * own.
2599                  */
2600                 (*RTE_EAL_PMD_PATH ?
2601                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2602         };
2603         unsigned int i = 0;
2604         void *handle = NULL;
2605         void **sym;
2606         const char *dlmsg;
2607
2608         while (!handle && i != RTE_DIM(path)) {
2609                 const char *end;
2610                 size_t len;
2611                 int ret;
2612
2613                 if (!path[i]) {
2614                         ++i;
2615                         continue;
2616                 }
2617                 end = strpbrk(path[i], ":;");
2618                 if (!end)
2619                         end = path[i] + strlen(path[i]);
2620                 len = end - path[i];
2621                 ret = 0;
2622                 do {
2623                         char name[ret + 1];
2624
2625                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2626                                        (int)len, path[i],
2627                                        (!len || *(end - 1) == '/') ? "" : "/");
2628                         if (ret == -1)
2629                                 break;
2630                         if (sizeof(name) != (size_t)ret + 1)
2631                                 continue;
2632                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2633                                 name);
2634                         handle = dlopen(name, RTLD_LAZY);
2635                         break;
2636                 } while (1);
2637                 path[i] = end + 1;
2638                 if (!*end)
2639                         ++i;
2640         }
2641         if (!handle) {
2642                 rte_errno = EINVAL;
2643                 dlmsg = dlerror();
2644                 if (dlmsg)
2645                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2646                 goto glue_error;
2647         }
2648         sym = dlsym(handle, "mlx5_glue");
2649         if (!sym || !*sym) {
2650                 rte_errno = EINVAL;
2651                 dlmsg = dlerror();
2652                 if (dlmsg)
2653                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2654                 goto glue_error;
2655         }
2656         mlx5_glue = *sym;
2657         return 0;
2658 glue_error:
2659         if (handle)
2660                 dlclose(handle);
2661         DRV_LOG(WARNING,
2662                 "cannot initialize PMD due to missing run-time dependency on"
2663                 " rdma-core libraries (libibverbs, libmlx5)");
2664         return -rte_errno;
2665 }
2666
2667 #endif
2668
2669 /**
2670  * Driver initialization routine.
2671  */
2672 RTE_INIT(rte_mlx5_pmd_init)
2673 {
2674         /* Initialize driver log type. */
2675         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2676         if (mlx5_logtype >= 0)
2677                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2678
2679         /* Build the static tables for Verbs conversion. */
2680         mlx5_set_ptype_table();
2681         mlx5_set_cksum_table();
2682         mlx5_set_swp_types_table();
2683         /*
2684          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2685          * huge pages. Calling ibv_fork_init() during init allows
2686          * applications to use fork() safely for purposes other than
2687          * using this PMD, which is not supported in forked processes.
2688          */
2689         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2690         /* Match the size of Rx completion entry to the size of a cacheline. */
2691         if (RTE_CACHE_LINE_SIZE == 128)
2692                 setenv("MLX5_CQE_SIZE", "128", 0);
2693         /*
2694          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2695          * cleanup all the Verbs resources even when the device was removed.
2696          */
2697         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2698 #ifdef RTE_IBVERBS_LINK_DLOPEN
2699         if (mlx5_glue_init())
2700                 return;
2701         assert(mlx5_glue);
2702 #endif
2703 #ifndef NDEBUG
2704         /* Glue structure must not contain any NULL pointers. */
2705         {
2706                 unsigned int i;
2707
2708                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2709                         assert(((const void *const *)mlx5_glue)[i]);
2710         }
2711 #endif
2712         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2713                 DRV_LOG(ERR,
2714                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2715                         mlx5_glue->version, MLX5_GLUE_VERSION);
2716                 return;
2717         }
2718         mlx5_glue->fork_init();
2719         rte_pci_register(&mlx5_driver);
2720 }
2721
2722 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2723 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2724 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");