drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to include 2 dsegs in the title WQEBB.
 100  * Deprecated, ignored.
 101  */
 102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 103
 104 /*
 105  * Device parameter to limit the size of inlining packet.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 109
 110 /*
 111  * Device parameter to enable hardware Tx vector.
 112  * Deprecated, ignored (no vectorized Tx routines anymore).
 113  */
 114 #define MLX5_TX_VEC_EN "tx_vec_en"
 115
 116 /* Device parameter to enable hardware Rx vector. */
 117 #define MLX5_RX_VEC_EN "rx_vec_en"
 118
 119 /* Allow L3 VXLAN flow creation. */
 120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 121
 122 /* Activate DV E-Switch flow steering. */
 123 #define MLX5_DV_ESW_EN "dv_esw_en"
 124
 125 /* Activate DV flow steering. */
 126 #define MLX5_DV_FLOW_EN "dv_flow_en"
 127
 128 /* Enable extensive flow metadata support. */
 129 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 130
 131 /* Activate Netlink support in VF mode. */
 132 #define MLX5_VF_NL_EN "vf_nl_en"
 133
 134 /* Enable extending memsegs when creating a MR. */
 135 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 136
 137 /* Select port representors to instantiate. */
 138 #define MLX5_REPRESENTOR "representor"
 139
 140 /* Device parameter to configure the maximum number of dump files per queue. */
 141 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 142
 143 /* Configure timeout of LRO session (in microseconds). */
 144 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 145
 146 #ifndef HAVE_IBV_MLX5_MOD_MPW
 147 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 148 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 149 #endif
 150
 151 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 152 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 153 #endif
 154
 155 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 156
 157 /* Shared memory between primary and secondary processes. */
 158 struct mlx5_shared_data *mlx5_shared_data;
 159
 160 /* Spinlock for mlx5_shared_data allocation. */
 161 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 162
 163 /* Process local data for secondary processes. */
 164 static struct mlx5_local_data mlx5_local_data;
 165
 166 /** Driver-specific log messages type. */
 167 int mlx5_logtype;
 168
 169 /** Data associated with devices to spawn. */
 170 struct mlx5_dev_spawn_data {
 171         uint32_t ifindex; /**< Network interface index. */
 172         uint32_t max_port; /**< IB device maximal port index. */
 173         uint32_t ibv_port; /**< IB device physical port index. */
 174         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 175         struct mlx5_switch_info info; /**< Switch information. */
 176         struct ibv_device *ibv_dev; /**< Associated IB device. */
 177         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 178         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 179 };
 180
 181 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 182 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 183
 184 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 185 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 186
 187 /**
 188  * Allocate ID pool structure.
 189  *
 190  * @return
 191  *   Pointer to pool object, NULL value otherwise.
 192  */
 193 struct mlx5_flow_id_pool *
 194 mlx5_flow_id_pool_alloc(void)
 195 {
 196         struct mlx5_flow_id_pool *pool;
 197         void *mem;
 198
 199         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 200                            RTE_CACHE_LINE_SIZE);
 201         if (!pool) {
 202                 DRV_LOG(ERR, "can't allocate id pool");
 203                 rte_errno  = ENOMEM;
 204                 return NULL;
 205         }
 206         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 207                           RTE_CACHE_LINE_SIZE);
 208         if (!mem) {
 209                 DRV_LOG(ERR, "can't allocate mem for id pool");
 210                 rte_errno  = ENOMEM;
 211                 goto error;
 212         }
 213         pool->free_arr = mem;
 214         pool->curr = pool->free_arr;
 215         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 216         pool->base_index = 0;
 217         return pool;
 218 error:
 219         rte_free(pool);
 220         return NULL;
 221 }
 222
 223 /**
 224  * Release ID pool structure.
 225  *
 226  * @param[in] pool
 227  *   Pointer to flow id pool object to free.
 228  */
 229 void
 230 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 231 {
 232         rte_free(pool->free_arr);
 233         rte_free(pool);
 234 }
 235
 236 /**
 237  * Generate ID.
 238  *
 239  * @param[in] pool
 240  *   Pointer to flow id pool.
 241  * @param[out] id
 242  *   The generated ID.
 243  *
 244  * @return
 245  *   0 on success, error value otherwise.
 246  */
 247 uint32_t
 248 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 249 {
 250         if (pool->curr == pool->free_arr) {
 251                 if (pool->base_index == UINT32_MAX) {
 252                         rte_errno  = ENOMEM;
 253                         DRV_LOG(ERR, "no free id");
 254                         return -rte_errno;
 255                 }
 256                 *id = ++pool->base_index;
 257                 return 0;
 258         }
 259         *id = *(--pool->curr);
 260         return 0;
 261 }
 262
 263 /**
 264  * Release ID.
 265  *
 266  * @param[in] pool
 267  *   Pointer to flow id pool.
 268  * @param[out] id
 269  *   The generated ID.
 270  *
 271  * @return
 272  *   0 on success, error value otherwise.
 273  */
 274 uint32_t
 275 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 276 {
 277         uint32_t size;
 278         uint32_t size2;
 279         void *mem;
 280
 281         if (pool->curr == pool->last) {
 282                 size = pool->curr - pool->free_arr;
 283                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 284                 assert(size2 > size);
 285                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 286                 if (!mem) {
 287                         DRV_LOG(ERR, "can't allocate mem for id pool");
 288                         rte_errno  = ENOMEM;
 289                         return -rte_errno;
 290                 }
 291                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 292                 rte_free(pool->free_arr);
 293                 pool->free_arr = mem;
 294                 pool->curr = pool->free_arr + size;
 295                 pool->last = pool->free_arr + size2;
 296         }
 297         *pool->curr = id;
 298         pool->curr++;
 299         return 0;
 300 }
 301
 302 /**
 303  * Initialize the counters management structure.
 304  *
 305  * @param[in] sh
 306  *   Pointer to mlx5_ibv_shared object to free
 307  */
 308 static void
 309 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 310 {
 311         uint8_t i;
 312
 313         TAILQ_INIT(&sh->cmng.flow_counters);
 314         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 315                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 316 }
 317
 318 /**
 319  * Destroy all the resources allocated for a counter memory management.
 320  *
 321  * @param[in] mng
 322  *   Pointer to the memory management structure.
 323  */
 324 static void
 325 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 326 {
 327         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 328
 329         LIST_REMOVE(mng, next);
 330         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 331         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 332         rte_free(mem);
 333 }
 334
 335 /**
 336  * Close and release all the resources of the counters management.
 337  *
 338  * @param[in] sh
 339  *   Pointer to mlx5_ibv_shared object to free.
 340  */
 341 static void
 342 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 343 {
 344         struct mlx5_counter_stats_mem_mng *mng;
 345         uint8_t i;
 346         int j;
 347         int retries = 1024;
 348
 349         rte_errno = 0;
 350         while (--retries) {
 351                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 352                 if (rte_errno != EINPROGRESS)
 353                         break;
 354                 rte_pause();
 355         }
 356         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 357                 struct mlx5_flow_counter_pool *pool;
 358                 uint32_t batch = !!(i % 2);
 359
 360                 if (!sh->cmng.ccont[i].pools)
 361                         continue;
 362                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 363                 while (pool) {
 364                         if (batch) {
 365                                 if (pool->min_dcs)
 366                                         claim_zero
 367                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 368                         }
 369                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 370                                 if (pool->counters_raw[j].action)
 371                                         claim_zero
 372                                         (mlx5_glue->destroy_flow_action
 373                                                (pool->counters_raw[j].action));
 374                                 if (!batch && pool->counters_raw[j].dcs)
 375                                         claim_zero(mlx5_devx_cmd_destroy
 376                                                   (pool->counters_raw[j].dcs));
 377                         }
 378                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 379                                      next);
 380                         rte_free(pool);
 381                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 382                 }
 383                 rte_free(sh->cmng.ccont[i].pools);
 384         }
 385         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 386         while (mng) {
 387                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 388                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 389         }
 390         memset(&sh->cmng, 0, sizeof(sh->cmng));
 391 }
 392
 393 /**
 394  * Extract pdn of PD object using DV API.
 395  *
 396  * @param[in] pd
 397  *   Pointer to the verbs PD object.
 398  * @param[out] pdn
 399  *   Pointer to the PD object number variable.
 400  *
 401  * @return
 402  *   0 on success, error value otherwise.
 403  */
 404 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 405 static int
 406 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 407 {
 408         struct mlx5dv_obj obj;
 409         struct mlx5dv_pd pd_info;
 410         int ret = 0;
 411
 412         obj.pd.in = pd;
 413         obj.pd.out = &pd_info;
 414         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 415         if (ret) {
 416                 DRV_LOG(DEBUG, "Fail to get PD object info");
 417                 return ret;
 418         }
 419         *pdn = pd_info.pdn;
 420         return 0;
 421 }
 422 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 423
 424 /**
 425  * Allocate shared IB device context. If there is multiport device the
 426  * master and representors will share this context, if there is single
 427  * port dedicated IB device, the context will be used by only given
 428  * port due to unification.
 429  *
 430  * Routine first searches the context for the specified IB device name,
 431  * if found the shared context assumed and reference counter is incremented.
 432  * If no context found the new one is created and initialized with specified
 433  * IB device context and parameters.
 434  *
 435  * @param[in] spawn
 436  *   Pointer to the IB device attributes (name, port, etc).
 437  *
 438  * @return
 439  *   Pointer to mlx5_ibv_shared object on success,
 440  *   otherwise NULL and rte_errno is set.
 441  */
 442 static struct mlx5_ibv_shared *
 443 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 444 {
 445         struct mlx5_ibv_shared *sh;
 446         int err = 0;
 447         uint32_t i;
 448 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 449         struct mlx5_devx_tis_attr tis_attr = { 0 };
 450 #endif
 451
 452 assert(spawn);
 453         /* Secondary process should not create the shared context. */
 454         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 455         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 456         /* Search for IB context by device name. */
 457         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 458                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 459                         sh->refcnt++;
 460                         goto exit;
 461                 }
 462         }
 463         /* No device found, we have to create new shared context. */
 464         assert(spawn->max_port);
 465         sh = rte_zmalloc("ethdev shared ib context",
 466                          sizeof(struct mlx5_ibv_shared) +
 467                          spawn->max_port *
 468                          sizeof(struct mlx5_ibv_shared_port),
 469                          RTE_CACHE_LINE_SIZE);
 470         if (!sh) {
 471                 DRV_LOG(ERR, "shared context allocation failure");
 472                 rte_errno  = ENOMEM;
 473                 goto exit;
 474         }
 475         /* Try to open IB device with DV first, then usual Verbs. */
 476         errno = 0;
 477         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 478         if (sh->ctx) {
 479                 sh->devx = 1;
 480                 DRV_LOG(DEBUG, "DevX is supported");
 481         } else {
 482                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 483                 if (!sh->ctx) {
 484                         err = errno ? errno : ENODEV;
 485                         goto error;
 486                 }
 487                 DRV_LOG(DEBUG, "DevX is NOT supported");
 488         }
 489         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 490         if (err) {
 491                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 492                 goto error;
 493         }
 494         sh->refcnt = 1;
 495         sh->max_port = spawn->max_port;
 496         strncpy(sh->ibdev_name, sh->ctx->device->name,
 497                 sizeof(sh->ibdev_name));
 498         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 499                 sizeof(sh->ibdev_path));
 500         pthread_mutex_init(&sh->intr_mutex, NULL);
 501         /*
 502          * Setting port_id to max unallowed value means
 503          * there is no interrupt subhandler installed for
 504          * the given port index i.
 505          */
 506         for (i = 0; i < sh->max_port; i++) {
 507                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 508                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 509         }
 510         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 511         if (sh->pd == NULL) {
 512                 DRV_LOG(ERR, "PD allocation failure");
 513                 err = ENOMEM;
 514                 goto error;
 515         }
 516 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 517         if (sh->devx) {
 518                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 519                 if (err) {
 520                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 521                         goto error;
 522                 }
 523                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 524                 if (!sh->td) {
 525                         DRV_LOG(ERR, "TD allocation failure");
 526                         err = ENOMEM;
 527                         goto error;
 528                 }
 529                 tis_attr.transport_domain = sh->td->id;
 530                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 531                 if (!sh->tis) {
 532                         DRV_LOG(ERR, "TIS allocation failure");
 533                         err = ENOMEM;
 534                         goto error;
 535                 }
 536         }
 537         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 538         if (!sh->flow_id_pool) {
 539                 DRV_LOG(ERR, "can't create flow id pool");
 540                 err = ENOMEM;
 541                 goto error;
 542         }
 543 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 544         /*
 545          * Once the device is added to the list of memory event
 546          * callback, its global MR cache table cannot be expanded
 547          * on the fly because of deadlock. If it overflows, lookup
 548          * should be done by searching MR list linearly, which is slow.
 549          *
 550          * At this point the device is not added to the memory
 551          * event list yet, context is just being created.
 552          */
 553         err = mlx5_mr_btree_init(&sh->mr.cache,
 554                                  MLX5_MR_BTREE_CACHE_N * 2,
 555                                  spawn->pci_dev->device.numa_node);
 556         if (err) {
 557                 err = rte_errno;
 558                 goto error;
 559         }
 560         mlx5_flow_counters_mng_init(sh);
 561         /* Add device to memory callback list. */
 562         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 563         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 564                          sh, mem_event_cb);
 565         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 566         /* Add context to the global device list. */
 567         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 568 exit:
 569         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 570         return sh;
 571 error:
 572         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 573         assert(sh);
 574         if (sh->tis)
 575                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 576         if (sh->td)
 577                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 578         if (sh->pd)
 579                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 580         if (sh->ctx)
 581                 claim_zero(mlx5_glue->close_device(sh->ctx));
 582         if (sh->flow_id_pool)
 583                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 584         rte_free(sh);
 585         assert(err > 0);
 586         rte_errno = err;
 587         return NULL;
 588 }
 589
 590 /**
 591  * Free shared IB device context. Decrement counter and if zero free
 592  * all allocated resources and close handles.
 593  *
 594  * @param[in] sh
 595  *   Pointer to mlx5_ibv_shared object to free
 596  */
 597 static void
 598 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 599 {
 600         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 601 #ifndef NDEBUG
 602         /* Check the object presence in the list. */
 603         struct mlx5_ibv_shared *lctx;
 604
 605         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 606                 if (lctx == sh)
 607                         break;
 608         assert(lctx);
 609         if (lctx != sh) {
 610                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 611                 goto exit;
 612         }
 613 #endif
 614         assert(sh);
 615         assert(sh->refcnt);
 616         /* Secondary process should not free the shared context. */
 617         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 618         if (--sh->refcnt)
 619                 goto exit;
 620         /* Release created Memory Regions. */
 621         mlx5_mr_release(sh);
 622         /* Remove from memory callback device list. */
 623         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 624         LIST_REMOVE(sh, mem_event_cb);
 625         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 626         /* Remove context from the global device list. */
 627         LIST_REMOVE(sh, next);
 628         /*
 629          *  Ensure there is no async event handler installed.
 630          *  Only primary process handles async device events.
 631          **/
 632         mlx5_flow_counters_mng_close(sh);
 633         assert(!sh->intr_cnt);
 634         if (sh->intr_cnt)
 635                 mlx5_intr_callback_unregister
 636                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 637 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 638         if (sh->devx_intr_cnt) {
 639                 if (sh->intr_handle_devx.fd)
 640                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 641                                           mlx5_dev_interrupt_handler_devx, sh);
 642                 if (sh->devx_comp)
 643                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 644         }
 645 #endif
 646         pthread_mutex_destroy(&sh->intr_mutex);
 647         if (sh->pd)
 648                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 649         if (sh->tis)
 650                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 651         if (sh->td)
 652                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 653         if (sh->ctx)
 654                 claim_zero(mlx5_glue->close_device(sh->ctx));
 655         if (sh->flow_id_pool)
 656                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 657         rte_free(sh);
 658 exit:
 659         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 660 }
 661
 662 /**
 663  * Initialize DR related data within private structure.
 664  * Routine checks the reference counter and does actual
 665  * resources creation/initialization only if counter is zero.
 666  *
 667  * @param[in] priv
 668  *   Pointer to the private device data structure.
 669  *
 670  * @return
 671  *   Zero on success, positive error code otherwise.
 672  */
 673 static int
 674 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 675 {
 676 #ifdef HAVE_MLX5DV_DR
 677         struct mlx5_ibv_shared *sh = priv->sh;
 678         int err = 0;
 679         void *domain;
 680
 681         assert(sh);
 682         if (sh->dv_refcnt) {
 683                 /* Shared DV/DR structures is already initialized. */
 684                 sh->dv_refcnt++;
 685                 priv->dr_shared = 1;
 686                 return 0;
 687         }
 688         /* Reference counter is zero, we should initialize structures. */
 689         domain = mlx5_glue->dr_create_domain(sh->ctx,
 690                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 691         if (!domain) {
 692                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 693                 err = errno;
 694                 goto error;
 695         }
 696         sh->rx_domain = domain;
 697         domain = mlx5_glue->dr_create_domain(sh->ctx,
 698                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 699         if (!domain) {
 700                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 701                 err = errno;
 702                 goto error;
 703         }
 704         pthread_mutex_init(&sh->dv_mutex, NULL);
 705         sh->tx_domain = domain;
 706 #ifdef HAVE_MLX5DV_DR_ESWITCH
 707         if (priv->config.dv_esw_en) {
 708                 domain  = mlx5_glue->dr_create_domain
 709                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 710                 if (!domain) {
 711                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 712                         err = errno;
 713                         goto error;
 714                 }
 715                 sh->fdb_domain = domain;
 716                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 717         }
 718 #endif
 719         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 720         sh->dv_refcnt++;
 721         priv->dr_shared = 1;
 722         return 0;
 723
 724 error:
 725        /* Rollback the created objects. */
 726         if (sh->rx_domain) {
 727                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 728                 sh->rx_domain = NULL;
 729         }
 730         if (sh->tx_domain) {
 731                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 732                 sh->tx_domain = NULL;
 733         }
 734         if (sh->fdb_domain) {
 735                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 736                 sh->fdb_domain = NULL;
 737         }
 738         if (sh->esw_drop_action) {
 739                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 740                 sh->esw_drop_action = NULL;
 741         }
 742         if (sh->pop_vlan_action) {
 743                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 744                 sh->pop_vlan_action = NULL;
 745         }
 746         return err;
 747 #else
 748         (void)priv;
 749         return 0;
 750 #endif
 751 }
 752
 753 /**
 754  * Destroy DR related data within private structure.
 755  *
 756  * @param[in] priv
 757  *   Pointer to the private device data structure.
 758  */
 759 static void
 760 mlx5_free_shared_dr(struct mlx5_priv *priv)
 761 {
 762 #ifdef HAVE_MLX5DV_DR
 763         struct mlx5_ibv_shared *sh;
 764
 765         if (!priv->dr_shared)
 766                 return;
 767         priv->dr_shared = 0;
 768         sh = priv->sh;
 769         assert(sh);
 770         assert(sh->dv_refcnt);
 771         if (sh->dv_refcnt && --sh->dv_refcnt)
 772                 return;
 773         if (sh->rx_domain) {
 774                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 775                 sh->rx_domain = NULL;
 776         }
 777         if (sh->tx_domain) {
 778                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 779                 sh->tx_domain = NULL;
 780         }
 781 #ifdef HAVE_MLX5DV_DR_ESWITCH
 782         if (sh->fdb_domain) {
 783                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 784                 sh->fdb_domain = NULL;
 785         }
 786         if (sh->esw_drop_action) {
 787                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 788                 sh->esw_drop_action = NULL;
 789         }
 790 #endif
 791         if (sh->pop_vlan_action) {
 792                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 793                 sh->pop_vlan_action = NULL;
 794         }
 795         pthread_mutex_destroy(&sh->dv_mutex);
 796 #else
 797         (void)priv;
 798 #endif
 799 }
 800
 801 /**
 802  * Initialize shared data between primary and secondary process.
 803  *
 804  * A memzone is reserved by primary process and secondary processes attach to
 805  * the memzone.
 806  *
 807  * @return
 808  *   0 on success, a negative errno value otherwise and rte_errno is set.
 809  */
 810 static int
 811 mlx5_init_shared_data(void)
 812 {
 813         const struct rte_memzone *mz;
 814         int ret = 0;
 815
 816         rte_spinlock_lock(&mlx5_shared_data_lock);
 817         if (mlx5_shared_data == NULL) {
 818                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 819                         /* Allocate shared memory. */
 820                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 821                                                  sizeof(*mlx5_shared_data),
 822                                                  SOCKET_ID_ANY, 0);
 823                         if (mz == NULL) {
 824                                 DRV_LOG(ERR,
 825                                         "Cannot allocate mlx5 shared data");
 826                                 ret = -rte_errno;
 827                                 goto error;
 828                         }
 829                         mlx5_shared_data = mz->addr;
 830                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 831                         rte_spinlock_init(&mlx5_shared_data->lock);
 832                 } else {
 833                         /* Lookup allocated shared memory. */
 834                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 835                         if (mz == NULL) {
 836                                 DRV_LOG(ERR,
 837                                         "Cannot attach mlx5 shared data");
 838                                 ret = -rte_errno;
 839                                 goto error;
 840                         }
 841                         mlx5_shared_data = mz->addr;
 842                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 843                 }
 844         }
 845 error:
 846         rte_spinlock_unlock(&mlx5_shared_data_lock);
 847         return ret;
 848 }
 849
 850 /**
 851  * Retrieve integer value from environment variable.
 852  *
 853  * @param[in] name
 854  *   Environment variable name.
 855  *
 856  * @return
 857  *   Integer value, 0 if the variable is not set.
 858  */
 859 int
 860 mlx5_getenv_int(const char *name)
 861 {
 862         const char *val = getenv(name);
 863
 864         if (val == NULL)
 865                 return 0;
 866         return atoi(val);
 867 }
 868
 869 /**
 870  * Verbs callback to allocate a memory. This function should allocate the space
 871  * according to the size provided residing inside a huge page.
 872  * Please note that all allocation must respect the alignment from libmlx5
 873  * (i.e. currently sysconf(_SC_PAGESIZE)).
 874  *
 875  * @param[in] size
 876  *   The size in bytes of the memory to allocate.
 877  * @param[in] data
 878  *   A pointer to the callback data.
 879  *
 880  * @return
 881  *   Allocated buffer, NULL otherwise and rte_errno is set.
 882  */
 883 static void *
 884 mlx5_alloc_verbs_buf(size_t size, void *data)
 885 {
 886         struct mlx5_priv *priv = data;
 887         void *ret;
 888         size_t alignment = sysconf(_SC_PAGESIZE);
 889         unsigned int socket = SOCKET_ID_ANY;
 890
 891         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 892                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 893
 894                 socket = ctrl->socket;
 895         } else if (priv->verbs_alloc_ctx.type ==
 896                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 897                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 898
 899                 socket = ctrl->socket;
 900         }
 901         assert(data != NULL);
 902         ret = rte_malloc_socket(__func__, size, alignment, socket);
 903         if (!ret && size)
 904                 rte_errno = ENOMEM;
 905         return ret;
 906 }
 907
 908 /**
 909  * Verbs callback to free a memory.
 910  *
 911  * @param[in] ptr
 912  *   A pointer to the memory to free.
 913  * @param[in] data
 914  *   A pointer to the callback data.
 915  */
 916 static void
 917 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 918 {
 919         assert(data != NULL);
 920         rte_free(ptr);
 921 }
 922
 923 /**
 924  * DPDK callback to add udp tunnel port
 925  *
 926  * @param[in] dev
 927  *   A pointer to eth_dev
 928  * @param[in] udp_tunnel
 929  *   A pointer to udp tunnel
 930  *
 931  * @return
 932  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
 933  */
 934 int
 935 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
 936                          struct rte_eth_udp_tunnel *udp_tunnel)
 937 {
 938         assert(udp_tunnel != NULL);
 939         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
 940             udp_tunnel->udp_port == 4789)
 941                 return 0;
 942         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
 943             udp_tunnel->udp_port == 4790)
 944                 return 0;
 945         return -ENOTSUP;
 946 }
 947
 948 /**
 949  * Initialize process private data structure.
 950  *
 951  * @param dev
 952  *   Pointer to Ethernet device structure.
 953  *
 954  * @return
 955  *   0 on success, a negative errno value otherwise and rte_errno is set.
 956  */
 957 int
 958 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 959 {
 960         struct mlx5_priv *priv = dev->data->dev_private;
 961         struct mlx5_proc_priv *ppriv;
 962         size_t ppriv_size;
 963
 964         /*
 965          * UAR register table follows the process private structure. BlueFlame
 966          * registers for Tx queues are stored in the table.
 967          */
 968         ppriv_size =
 969                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 970         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 971                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 972         if (!ppriv) {
 973                 rte_errno = ENOMEM;
 974                 return -rte_errno;
 975         }
 976         ppriv->uar_table_sz = ppriv_size;
 977         dev->process_private = ppriv;
 978         return 0;
 979 }
 980
 981 /**
 982  * Un-initialize process private data structure.
 983  *
 984  * @param dev
 985  *   Pointer to Ethernet device structure.
 986  */
 987 static void
 988 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 989 {
 990         if (!dev->process_private)
 991                 return;
 992         rte_free(dev->process_private);
 993         dev->process_private = NULL;
 994 }
 995
 996 /**
 997  * DPDK callback to close the device.
 998  *
 999  * Destroy all queues and objects, free memory.
1000  *
1001  * @param dev
1002  *   Pointer to Ethernet device structure.
1003  */
1004 static void
1005 mlx5_dev_close(struct rte_eth_dev *dev)
1006 {
1007         struct mlx5_priv *priv = dev->data->dev_private;
1008         unsigned int i;
1009         int ret;
1010
1011         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1012                 dev->data->port_id,
1013                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1014         /* In case mlx5_dev_stop() has not been called. */
1015         mlx5_dev_interrupt_handler_uninstall(dev);
1016         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1017         mlx5_traffic_disable(dev);
1018         mlx5_flow_flush(dev, NULL);
1019         /* Prevent crashes when queues are still in use. */
1020         dev->rx_pkt_burst = removed_rx_burst;
1021         dev->tx_pkt_burst = removed_tx_burst;
1022         rte_wmb();
1023         /* Disable datapath on secondary process. */
1024         mlx5_mp_req_stop_rxtx(dev);
1025         if (priv->rxqs != NULL) {
1026                 /* XXX race condition if mlx5_rx_burst() is still running. */
1027                 usleep(1000);
1028                 for (i = 0; (i != priv->rxqs_n); ++i)
1029                         mlx5_rxq_release(dev, i);
1030                 priv->rxqs_n = 0;
1031                 priv->rxqs = NULL;
1032         }
1033         if (priv->txqs != NULL) {
1034                 /* XXX race condition if mlx5_tx_burst() is still running. */
1035                 usleep(1000);
1036                 for (i = 0; (i != priv->txqs_n); ++i)
1037                         mlx5_txq_release(dev, i);
1038                 priv->txqs_n = 0;
1039                 priv->txqs = NULL;
1040         }
1041         mlx5_proc_priv_uninit(dev);
1042         mlx5_mprq_free_mp(dev);
1043         mlx5_free_shared_dr(priv);
1044         if (priv->rss_conf.rss_key != NULL)
1045                 rte_free(priv->rss_conf.rss_key);
1046         if (priv->reta_idx != NULL)
1047                 rte_free(priv->reta_idx);
1048         if (priv->config.vf)
1049                 mlx5_nl_mac_addr_flush(dev);
1050         if (priv->nl_socket_route >= 0)
1051                 close(priv->nl_socket_route);
1052         if (priv->nl_socket_rdma >= 0)
1053                 close(priv->nl_socket_rdma);
1054         if (priv->vmwa_context)
1055                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1056         if (priv->sh) {
1057                 /*
1058                  * Free the shared context in last turn, because the cleanup
1059                  * routines above may use some shared fields, like
1060                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1061                  * ifindex if Netlink fails.
1062                  */
1063                 mlx5_free_shared_ibctx(priv->sh);
1064                 priv->sh = NULL;
1065         }
1066         ret = mlx5_hrxq_verify(dev);
1067         if (ret)
1068                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1069                         dev->data->port_id);
1070         ret = mlx5_ind_table_obj_verify(dev);
1071         if (ret)
1072                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1073                         dev->data->port_id);
1074         ret = mlx5_rxq_obj_verify(dev);
1075         if (ret)
1076                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1077                         dev->data->port_id);
1078         ret = mlx5_rxq_verify(dev);
1079         if (ret)
1080                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1081                         dev->data->port_id);
1082         ret = mlx5_txq_obj_verify(dev);
1083         if (ret)
1084                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1085                         dev->data->port_id);
1086         ret = mlx5_txq_verify(dev);
1087         if (ret)
1088                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1089                         dev->data->port_id);
1090         ret = mlx5_flow_verify(dev);
1091         if (ret)
1092                 DRV_LOG(WARNING, "port %u some flows still remain",
1093                         dev->data->port_id);
1094         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1095                 unsigned int c = 0;
1096                 uint16_t port_id;
1097
1098                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1099                         struct mlx5_priv *opriv =
1100                                 rte_eth_devices[port_id].data->dev_private;
1101
1102                         if (!opriv ||
1103                             opriv->domain_id != priv->domain_id ||
1104                             &rte_eth_devices[port_id] == dev)
1105                                 continue;
1106                         ++c;
1107                         break;
1108                 }
1109                 if (!c)
1110                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1111         }
1112         memset(priv, 0, sizeof(*priv));
1113         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1114         /*
1115          * Reset mac_addrs to NULL such that it is not freed as part of
1116          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1117          * it is freed when dev_private is freed.
1118          */
1119         dev->data->mac_addrs = NULL;
1120 }
1121
1122 const struct eth_dev_ops mlx5_dev_ops = {
1123         .dev_configure = mlx5_dev_configure,
1124         .dev_start = mlx5_dev_start,
1125         .dev_stop = mlx5_dev_stop,
1126         .dev_set_link_down = mlx5_set_link_down,
1127         .dev_set_link_up = mlx5_set_link_up,
1128         .dev_close = mlx5_dev_close,
1129         .promiscuous_enable = mlx5_promiscuous_enable,
1130         .promiscuous_disable = mlx5_promiscuous_disable,
1131         .allmulticast_enable = mlx5_allmulticast_enable,
1132         .allmulticast_disable = mlx5_allmulticast_disable,
1133         .link_update = mlx5_link_update,
1134         .stats_get = mlx5_stats_get,
1135         .stats_reset = mlx5_stats_reset,
1136         .xstats_get = mlx5_xstats_get,
1137         .xstats_reset = mlx5_xstats_reset,
1138         .xstats_get_names = mlx5_xstats_get_names,
1139         .fw_version_get = mlx5_fw_version_get,
1140         .dev_infos_get = mlx5_dev_infos_get,
1141         .read_clock = mlx5_read_clock,
1142         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1143         .vlan_filter_set = mlx5_vlan_filter_set,
1144         .rx_queue_setup = mlx5_rx_queue_setup,
1145         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1146         .tx_queue_setup = mlx5_tx_queue_setup,
1147         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1148         .rx_queue_release = mlx5_rx_queue_release,
1149         .tx_queue_release = mlx5_tx_queue_release,
1150         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1151         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1152         .mac_addr_remove = mlx5_mac_addr_remove,
1153         .mac_addr_add = mlx5_mac_addr_add,
1154         .mac_addr_set = mlx5_mac_addr_set,
1155         .set_mc_addr_list = mlx5_set_mc_addr_list,
1156         .mtu_set = mlx5_dev_set_mtu,
1157         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1158         .vlan_offload_set = mlx5_vlan_offload_set,
1159         .reta_update = mlx5_dev_rss_reta_update,
1160         .reta_query = mlx5_dev_rss_reta_query,
1161         .rss_hash_update = mlx5_rss_hash_update,
1162         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1163         .filter_ctrl = mlx5_dev_filter_ctrl,
1164         .rx_descriptor_status = mlx5_rx_descriptor_status,
1165         .tx_descriptor_status = mlx5_tx_descriptor_status,
1166         .rx_queue_count = mlx5_rx_queue_count,
1167         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1168         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1169         .is_removed = mlx5_is_removed,
1170         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1171         .get_module_info = mlx5_get_module_info,
1172         .get_module_eeprom = mlx5_get_module_eeprom,
1173         .hairpin_cap_get = mlx5_hairpin_cap_get,
1174 };
1175
1176 /* Available operations from secondary process. */
1177 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1178         .stats_get = mlx5_stats_get,
1179         .stats_reset = mlx5_stats_reset,
1180         .xstats_get = mlx5_xstats_get,
1181         .xstats_reset = mlx5_xstats_reset,
1182         .xstats_get_names = mlx5_xstats_get_names,
1183         .fw_version_get = mlx5_fw_version_get,
1184         .dev_infos_get = mlx5_dev_infos_get,
1185         .rx_descriptor_status = mlx5_rx_descriptor_status,
1186         .tx_descriptor_status = mlx5_tx_descriptor_status,
1187         .get_module_info = mlx5_get_module_info,
1188         .get_module_eeprom = mlx5_get_module_eeprom,
1189 };
1190
1191 /* Available operations in flow isolated mode. */
1192 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1193         .dev_configure = mlx5_dev_configure,
1194         .dev_start = mlx5_dev_start,
1195         .dev_stop = mlx5_dev_stop,
1196         .dev_set_link_down = mlx5_set_link_down,
1197         .dev_set_link_up = mlx5_set_link_up,
1198         .dev_close = mlx5_dev_close,
1199         .promiscuous_enable = mlx5_promiscuous_enable,
1200         .promiscuous_disable = mlx5_promiscuous_disable,
1201         .allmulticast_enable = mlx5_allmulticast_enable,
1202         .allmulticast_disable = mlx5_allmulticast_disable,
1203         .link_update = mlx5_link_update,
1204         .stats_get = mlx5_stats_get,
1205         .stats_reset = mlx5_stats_reset,
1206         .xstats_get = mlx5_xstats_get,
1207         .xstats_reset = mlx5_xstats_reset,
1208         .xstats_get_names = mlx5_xstats_get_names,
1209         .fw_version_get = mlx5_fw_version_get,
1210         .dev_infos_get = mlx5_dev_infos_get,
1211         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1212         .vlan_filter_set = mlx5_vlan_filter_set,
1213         .rx_queue_setup = mlx5_rx_queue_setup,
1214         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1215         .tx_queue_setup = mlx5_tx_queue_setup,
1216         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1217         .rx_queue_release = mlx5_rx_queue_release,
1218         .tx_queue_release = mlx5_tx_queue_release,
1219         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1220         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1221         .mac_addr_remove = mlx5_mac_addr_remove,
1222         .mac_addr_add = mlx5_mac_addr_add,
1223         .mac_addr_set = mlx5_mac_addr_set,
1224         .set_mc_addr_list = mlx5_set_mc_addr_list,
1225         .mtu_set = mlx5_dev_set_mtu,
1226         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1227         .vlan_offload_set = mlx5_vlan_offload_set,
1228         .filter_ctrl = mlx5_dev_filter_ctrl,
1229         .rx_descriptor_status = mlx5_rx_descriptor_status,
1230         .tx_descriptor_status = mlx5_tx_descriptor_status,
1231         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1232         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1233         .is_removed = mlx5_is_removed,
1234         .get_module_info = mlx5_get_module_info,
1235         .get_module_eeprom = mlx5_get_module_eeprom,
1236         .hairpin_cap_get = mlx5_hairpin_cap_get,
1237 };
1238
1239 /**
1240  * Verify and store value for device argument.
1241  *
1242  * @param[in] key
1243  *   Key argument to verify.
1244  * @param[in] val
1245  *   Value associated with key.
1246  * @param opaque
1247  *   User data.
1248  *
1249  * @return
1250  *   0 on success, a negative errno value otherwise and rte_errno is set.
1251  */
1252 static int
1253 mlx5_args_check(const char *key, const char *val, void *opaque)
1254 {
1255         struct mlx5_dev_config *config = opaque;
1256         unsigned long tmp;
1257
1258         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1259         if (!strcmp(MLX5_REPRESENTOR, key))
1260                 return 0;
1261         errno = 0;
1262         tmp = strtoul(val, NULL, 0);
1263         if (errno) {
1264                 rte_errno = errno;
1265                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1266                 return -rte_errno;
1267         }
1268         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1269                 config->cqe_comp = !!tmp;
1270         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1271                 config->cqe_pad = !!tmp;
1272         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1273                 config->hw_padding = !!tmp;
1274         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1275                 config->mprq.enabled = !!tmp;
1276         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1277                 config->mprq.stride_num_n = tmp;
1278         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1279                 config->mprq.max_memcpy_len = tmp;
1280         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1281                 config->mprq.min_rxqs_num = tmp;
1282         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1283                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1284                                  " converted to txq_inline_max", key);
1285                 config->txq_inline_max = tmp;
1286         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1287                 config->txq_inline_max = tmp;
1288         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1289                 config->txq_inline_min = tmp;
1290         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1291                 config->txq_inline_mpw = tmp;
1292         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1293                 config->txqs_inline = tmp;
1294         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1295                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1296         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1297                 config->mps = !!tmp;
1298         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1299                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1300         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1301                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1302                                  " converted to txq_inline_mpw", key);
1303                 config->txq_inline_mpw = tmp;
1304         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1305                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1306         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1307                 config->rx_vec_en = !!tmp;
1308         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1309                 config->l3_vxlan_en = !!tmp;
1310         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1311                 config->vf_nl_en = !!tmp;
1312         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1313                 config->dv_esw_en = !!tmp;
1314         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1315                 config->dv_flow_en = !!tmp;
1316         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1317                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1318                     tmp != MLX5_XMETA_MODE_META16 &&
1319                     tmp != MLX5_XMETA_MODE_META32) {
1320                         DRV_LOG(WARNING, "invalid extensive "
1321                                          "metadata parameter");
1322                         rte_errno = EINVAL;
1323                         return -rte_errno;
1324                 }
1325                 config->dv_xmeta_en = tmp;
1326         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1327                 config->mr_ext_memseg_en = !!tmp;
1328         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1329                 config->max_dump_files_num = tmp;
1330         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1331                 config->lro.timeout = tmp;
1332         } else {
1333                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1334                 rte_errno = EINVAL;
1335                 return -rte_errno;
1336         }
1337         return 0;
1338 }
1339
1340 /**
1341  * Parse device parameters.
1342  *
1343  * @param config
1344  *   Pointer to device configuration structure.
1345  * @param devargs
1346  *   Device arguments structure.
1347  *
1348  * @return
1349  *   0 on success, a negative errno value otherwise and rte_errno is set.
1350  */
1351 static int
1352 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1353 {
1354         const char **params = (const char *[]){
1355                 MLX5_RXQ_CQE_COMP_EN,
1356                 MLX5_RXQ_CQE_PAD_EN,
1357                 MLX5_RXQ_PKT_PAD_EN,
1358                 MLX5_RX_MPRQ_EN,
1359                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1360                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1361                 MLX5_RXQS_MIN_MPRQ,
1362                 MLX5_TXQ_INLINE,
1363                 MLX5_TXQ_INLINE_MIN,
1364                 MLX5_TXQ_INLINE_MAX,
1365                 MLX5_TXQ_INLINE_MPW,
1366                 MLX5_TXQS_MIN_INLINE,
1367                 MLX5_TXQS_MAX_VEC,
1368                 MLX5_TXQ_MPW_EN,
1369                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1370                 MLX5_TXQ_MAX_INLINE_LEN,
1371                 MLX5_TX_VEC_EN,
1372                 MLX5_RX_VEC_EN,
1373                 MLX5_L3_VXLAN_EN,
1374                 MLX5_VF_NL_EN,
1375                 MLX5_DV_ESW_EN,
1376                 MLX5_DV_FLOW_EN,
1377                 MLX5_DV_XMETA_EN,
1378                 MLX5_MR_EXT_MEMSEG_EN,
1379                 MLX5_REPRESENTOR,
1380                 MLX5_MAX_DUMP_FILES_NUM,
1381                 MLX5_LRO_TIMEOUT_USEC,
1382                 NULL,
1383         };
1384         struct rte_kvargs *kvlist;
1385         int ret = 0;
1386         int i;
1387
1388         if (devargs == NULL)
1389                 return 0;
1390         /* Following UGLY cast is done to pass checkpatch. */
1391         kvlist = rte_kvargs_parse(devargs->args, params);
1392         if (kvlist == NULL) {
1393                 rte_errno = EINVAL;
1394                 return -rte_errno;
1395         }
1396         /* Process parameters. */
1397         for (i = 0; (params[i] != NULL); ++i) {
1398                 if (rte_kvargs_count(kvlist, params[i])) {
1399                         ret = rte_kvargs_process(kvlist, params[i],
1400                                                  mlx5_args_check, config);
1401                         if (ret) {
1402                                 rte_errno = EINVAL;
1403                                 rte_kvargs_free(kvlist);
1404                                 return -rte_errno;
1405                         }
1406                 }
1407         }
1408         rte_kvargs_free(kvlist);
1409         return 0;
1410 }
1411
1412 static struct rte_pci_driver mlx5_driver;
1413
1414 /**
1415  * PMD global initialization.
1416  *
1417  * Independent from individual device, this function initializes global
1418  * per-PMD data structures distinguishing primary and secondary processes.
1419  * Hence, each initialization is called once per a process.
1420  *
1421  * @return
1422  *   0 on success, a negative errno value otherwise and rte_errno is set.
1423  */
1424 static int
1425 mlx5_init_once(void)
1426 {
1427         struct mlx5_shared_data *sd;
1428         struct mlx5_local_data *ld = &mlx5_local_data;
1429         int ret = 0;
1430
1431         if (mlx5_init_shared_data())
1432                 return -rte_errno;
1433         sd = mlx5_shared_data;
1434         assert(sd);
1435         rte_spinlock_lock(&sd->lock);
1436         switch (rte_eal_process_type()) {
1437         case RTE_PROC_PRIMARY:
1438                 if (sd->init_done)
1439                         break;
1440                 LIST_INIT(&sd->mem_event_cb_list);
1441                 rte_rwlock_init(&sd->mem_event_rwlock);
1442                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1443                                                 mlx5_mr_mem_event_cb, NULL);
1444                 ret = mlx5_mp_init_primary();
1445                 if (ret)
1446                         goto out;
1447                 sd->init_done = true;
1448                 break;
1449         case RTE_PROC_SECONDARY:
1450                 if (ld->init_done)
1451                         break;
1452                 ret = mlx5_mp_init_secondary();
1453                 if (ret)
1454                         goto out;
1455                 ++sd->secondary_cnt;
1456                 ld->init_done = true;
1457                 break;
1458         default:
1459                 break;
1460         }
1461 out:
1462         rte_spinlock_unlock(&sd->lock);
1463         return ret;
1464 }
1465
1466 /**
1467  * Configures the minimal amount of data to inline into WQE
1468  * while sending packets.
1469  *
1470  * - the txq_inline_min has the maximal priority, if this
1471  *   key is specified in devargs
1472  * - if DevX is enabled the inline mode is queried from the
1473  *   device (HCA attributes and NIC vport context if needed).
1474  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1475  *   and none (0 bytes) for other NICs
1476  *
1477  * @param spawn
1478  *   Verbs device parameters (name, port, switch_info) to spawn.
1479  * @param config
1480  *   Device configuration parameters.
1481  */
1482 static void
1483 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1484                     struct mlx5_dev_config *config)
1485 {
1486         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1487                 /* Application defines size of inlined data explicitly. */
1488                 switch (spawn->pci_dev->id.device_id) {
1489                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1490                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1491                         if (config->txq_inline_min <
1492                                        (int)MLX5_INLINE_HSIZE_L2) {
1493                                 DRV_LOG(DEBUG,
1494                                         "txq_inline_mix aligned to minimal"
1495                                         " ConnectX-4 required value %d",
1496                                         (int)MLX5_INLINE_HSIZE_L2);
1497                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1498                         }
1499                         break;
1500                 }
1501                 goto exit;
1502         }
1503         if (config->hca_attr.eth_net_offloads) {
1504                 /* We have DevX enabled, inline mode queried successfully. */
1505                 switch (config->hca_attr.wqe_inline_mode) {
1506                 case MLX5_CAP_INLINE_MODE_L2:
1507                         /* outer L2 header must be inlined. */
1508                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1509                         goto exit;
1510                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1511                         /* No inline data are required by NIC. */
1512                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1513                         config->hw_vlan_insert =
1514                                 config->hca_attr.wqe_vlan_insert;
1515                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1516                         goto exit;
1517                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1518                         /* inline mode is defined by NIC vport context. */
1519                         if (!config->hca_attr.eth_virt)
1520                                 break;
1521                         switch (config->hca_attr.vport_inline_mode) {
1522                         case MLX5_INLINE_MODE_NONE:
1523                                 config->txq_inline_min =
1524                                         MLX5_INLINE_HSIZE_NONE;
1525                                 goto exit;
1526                         case MLX5_INLINE_MODE_L2:
1527                                 config->txq_inline_min =
1528                                         MLX5_INLINE_HSIZE_L2;
1529                                 goto exit;
1530                         case MLX5_INLINE_MODE_IP:
1531                                 config->txq_inline_min =
1532                                         MLX5_INLINE_HSIZE_L3;
1533                                 goto exit;
1534                         case MLX5_INLINE_MODE_TCP_UDP:
1535                                 config->txq_inline_min =
1536                                         MLX5_INLINE_HSIZE_L4;
1537                                 goto exit;
1538                         case MLX5_INLINE_MODE_INNER_L2:
1539                                 config->txq_inline_min =
1540                                         MLX5_INLINE_HSIZE_INNER_L2;
1541                                 goto exit;
1542                         case MLX5_INLINE_MODE_INNER_IP:
1543                                 config->txq_inline_min =
1544                                         MLX5_INLINE_HSIZE_INNER_L3;
1545                                 goto exit;
1546                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1547                                 config->txq_inline_min =
1548                                         MLX5_INLINE_HSIZE_INNER_L4;
1549                                 goto exit;
1550                         }
1551                 }
1552         }
1553         /*
1554          * We get here if we are unable to deduce
1555          * inline data size with DevX. Try PCI ID
1556          * to determine old NICs.
1557          */
1558         switch (spawn->pci_dev->id.device_id) {
1559         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1560         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1561         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1562         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1563                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1564                 config->hw_vlan_insert = 0;
1565                 break;
1566         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1567         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1568         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1569         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1570                 /*
1571                  * These NICs support VLAN insertion from WQE and
1572                  * report the wqe_vlan_insert flag. But there is the bug
1573                  * and PFC control may be broken, so disable feature.
1574                  */
1575                 config->hw_vlan_insert = 0;
1576                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1577                 break;
1578         default:
1579                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1580                 break;
1581         }
1582 exit:
1583         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1584 }
1585
1586 /**
1587  * Allocate page of door-bells and register it using DevX API.
1588  *
1589  * @param [in] dev
1590  *   Pointer to Ethernet device.
1591  *
1592  * @return
1593  *   Pointer to new page on success, NULL otherwise.
1594  */
1595 static struct mlx5_devx_dbr_page *
1596 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1597 {
1598         struct mlx5_priv *priv = dev->data->dev_private;
1599         struct mlx5_devx_dbr_page *page;
1600
1601         /* Allocate space for door-bell page and management data. */
1602         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1603                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1604         if (!page) {
1605                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1606                         dev->data->port_id);
1607                 return NULL;
1608         }
1609         /* Register allocated memory. */
1610         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1611                                               MLX5_DBR_PAGE_SIZE, 0);
1612         if (!page->umem) {
1613                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1614                         dev->data->port_id);
1615                 rte_free(page);
1616                 return NULL;
1617         }
1618         return page;
1619 }
1620
1621 /**
1622  * Find the next available door-bell, allocate new page if needed.
1623  *
1624  * @param [in] dev
1625  *   Pointer to Ethernet device.
1626  * @param [out] dbr_page
1627  *   Door-bell page containing the page data.
1628  *
1629  * @return
1630  *   Door-bell address offset on success, a negative error value otherwise.
1631  */
1632 int64_t
1633 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1634 {
1635         struct mlx5_priv *priv = dev->data->dev_private;
1636         struct mlx5_devx_dbr_page *page = NULL;
1637         uint32_t i, j;
1638
1639         LIST_FOREACH(page, &priv->dbrpgs, next)
1640                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1641                         break;
1642         if (!page) { /* No page with free door-bell exists. */
1643                 page = mlx5_alloc_dbr_page(dev);
1644                 if (!page) /* Failed to allocate new page. */
1645                         return (-1);
1646                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1647         }
1648         /* Loop to find bitmap part with clear bit. */
1649         for (i = 0;
1650              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1651              i++)
1652                 ; /* Empty. */
1653         /* Find the first clear bit. */
1654         j = rte_bsf64(~page->dbr_bitmap[i]);
1655         assert(i < (MLX5_DBR_PER_PAGE / 64));
1656         page->dbr_bitmap[i] |= (1 << j);
1657         page->dbr_count++;
1658         *dbr_page = page;
1659         return (((i * 64) + j) * sizeof(uint64_t));
1660 }
1661
1662 /**
1663  * Release a door-bell record.
1664  *
1665  * @param [in] dev
1666  *   Pointer to Ethernet device.
1667  * @param [in] umem_id
1668  *   UMEM ID of page containing the door-bell record to release.
1669  * @param [in] offset
1670  *   Offset of door-bell record in page.
1671  *
1672  * @return
1673  *   0 on success, a negative error value otherwise.
1674  */
1675 int32_t
1676 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1677 {
1678         struct mlx5_priv *priv = dev->data->dev_private;
1679         struct mlx5_devx_dbr_page *page = NULL;
1680         int ret = 0;
1681
1682         LIST_FOREACH(page, &priv->dbrpgs, next)
1683                 /* Find the page this address belongs to. */
1684                 if (page->umem->umem_id == umem_id)
1685                         break;
1686         if (!page)
1687                 return -EINVAL;
1688         page->dbr_count--;
1689         if (!page->dbr_count) {
1690                 /* Page not used, free it and remove from list. */
1691                 LIST_REMOVE(page, next);
1692                 if (page->umem)
1693                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1694                 rte_free(page);
1695         } else {
1696                 /* Mark in bitmap that this door-bell is not in use. */
1697                 offset /= MLX5_DBR_SIZE;
1698                 int i = offset / 64;
1699                 int j = offset % 64;
1700
1701                 page->dbr_bitmap[i] &= ~(1 << j);
1702         }
1703         return ret;
1704 }
1705
1706 /**
1707  * Check sibling device configurations.
1708  *
1709  * Sibling devices sharing the Infiniband device context
1710  * should have compatible configurations. This regards
1711  * representors and bonding slaves.
1712  *
1713  * @param priv
1714  *   Private device descriptor.
1715  * @param config
1716  *   Configuration of the device is going to be created.
1717  *
1718  * @return
1719  *   0 on success, EINVAL otherwise
1720  */
1721 static int
1722 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1723                               struct mlx5_dev_config *config)
1724 {
1725         struct mlx5_ibv_shared *sh = priv->sh;
1726         struct mlx5_dev_config *sh_conf = NULL;
1727         uint16_t port_id;
1728
1729         assert(sh);
1730         /* Nothing to compare for the single/first device. */
1731         if (sh->refcnt == 1)
1732                 return 0;
1733         /* Find the device with shared context. */
1734         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1735                 struct mlx5_priv *opriv =
1736                         rte_eth_devices[port_id].data->dev_private;
1737
1738                 if (opriv && opriv != priv && opriv->sh == sh) {
1739                         sh_conf = &opriv->config;
1740                         break;
1741                 }
1742         }
1743         if (!sh_conf)
1744                 return 0;
1745         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
1746                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
1747                              " for shared %s context", sh->ibdev_name);
1748                 rte_errno = EINVAL;
1749                 return rte_errno;
1750         }
1751         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
1752                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
1753                              " for shared %s context", sh->ibdev_name);
1754                 rte_errno = EINVAL;
1755                 return rte_errno;
1756         }
1757         return 0;
1758 }
1759 /**
1760  * Spawn an Ethernet device from Verbs information.
1761  *
1762  * @param dpdk_dev
1763  *   Backing DPDK device.
1764  * @param spawn
1765  *   Verbs device parameters (name, port, switch_info) to spawn.
1766  * @param config
1767  *   Device configuration parameters.
1768  *
1769  * @return
1770  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1771  *   is set. The following errors are defined:
1772  *
1773  *   EBUSY: device is not supposed to be spawned.
1774  *   EEXIST: device is already spawned
1775  */
1776 static struct rte_eth_dev *
1777 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1778                struct mlx5_dev_spawn_data *spawn,
1779                struct mlx5_dev_config config)
1780 {
1781         const struct mlx5_switch_info *switch_info = &spawn->info;
1782         struct mlx5_ibv_shared *sh = NULL;
1783         struct ibv_port_attr port_attr;
1784         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1785         struct rte_eth_dev *eth_dev = NULL;
1786         struct mlx5_priv *priv = NULL;
1787         int err = 0;
1788         unsigned int hw_padding = 0;
1789         unsigned int mps;
1790         unsigned int cqe_comp;
1791         unsigned int cqe_pad = 0;
1792         unsigned int tunnel_en = 0;
1793         unsigned int mpls_en = 0;
1794         unsigned int swp = 0;
1795         unsigned int mprq = 0;
1796         unsigned int mprq_min_stride_size_n = 0;
1797         unsigned int mprq_max_stride_size_n = 0;
1798         unsigned int mprq_min_stride_num_n = 0;
1799         unsigned int mprq_max_stride_num_n = 0;
1800         struct rte_ether_addr mac;
1801         char name[RTE_ETH_NAME_MAX_LEN];
1802         int own_domain_id = 0;
1803         uint16_t port_id;
1804         unsigned int i;
1805 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1806         struct mlx5dv_devx_port devx_port;
1807 #endif
1808
1809         /* Determine if this port representor is supposed to be spawned. */
1810         if (switch_info->representor && dpdk_dev->devargs) {
1811                 struct rte_eth_devargs eth_da;
1812
1813                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1814                 if (err) {
1815                         rte_errno = -err;
1816                         DRV_LOG(ERR, "failed to process device arguments: %s",
1817                                 strerror(rte_errno));
1818                         return NULL;
1819                 }
1820                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1821                         if (eth_da.representor_ports[i] ==
1822                             (uint16_t)switch_info->port_name)
1823                                 break;
1824                 if (i == eth_da.nb_representor_ports) {
1825                         rte_errno = EBUSY;
1826                         return NULL;
1827                 }
1828         }
1829         /* Build device name. */
1830         if (spawn->pf_bond <  0) {
1831                 /* Single device. */
1832                 if (!switch_info->representor)
1833                         strlcpy(name, dpdk_dev->name, sizeof(name));
1834                 else
1835                         snprintf(name, sizeof(name), "%s_representor_%u",
1836                                  dpdk_dev->name, switch_info->port_name);
1837         } else {
1838                 /* Bonding device. */
1839                 if (!switch_info->representor)
1840                         snprintf(name, sizeof(name), "%s_%s",
1841                                  dpdk_dev->name, spawn->ibv_dev->name);
1842                 else
1843                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1844                                  dpdk_dev->name, spawn->ibv_dev->name,
1845                                  switch_info->port_name);
1846         }
1847         /* check if the device is already spawned */
1848         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1849                 rte_errno = EEXIST;
1850                 return NULL;
1851         }
1852         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1853         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1854                 eth_dev = rte_eth_dev_attach_secondary(name);
1855                 if (eth_dev == NULL) {
1856                         DRV_LOG(ERR, "can not attach rte ethdev");
1857                         rte_errno = ENOMEM;
1858                         return NULL;
1859                 }
1860                 eth_dev->device = dpdk_dev;
1861                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1862                 err = mlx5_proc_priv_init(eth_dev);
1863                 if (err)
1864                         return NULL;
1865                 /* Receive command fd from primary process */
1866                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1867                 if (err < 0)
1868                         return NULL;
1869                 /* Remap UAR for Tx queues. */
1870                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1871                 if (err)
1872                         return NULL;
1873                 /*
1874                  * Ethdev pointer is still required as input since
1875                  * the primary device is not accessible from the
1876                  * secondary process.
1877                  */
1878                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1879                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1880                 return eth_dev;
1881         }
1882         sh = mlx5_alloc_shared_ibctx(spawn);
1883         if (!sh)
1884                 return NULL;
1885         config.devx = sh->devx;
1886 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1887         config.dest_tir = 1;
1888 #endif
1889 #ifdef HAVE_IBV_MLX5_MOD_SWP
1890         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1891 #endif
1892         /*
1893          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1894          * as all ConnectX-5 devices.
1895          */
1896 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1897         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1898 #endif
1899 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1900         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1901 #endif
1902         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1903         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1904                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1905                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1906                         mps = MLX5_MPW_ENHANCED;
1907                 } else {
1908                         DRV_LOG(DEBUG, "MPW is supported");
1909                         mps = MLX5_MPW;
1910                 }
1911         } else {
1912                 DRV_LOG(DEBUG, "MPW isn't supported");
1913                 mps = MLX5_MPW_DISABLED;
1914         }
1915 #ifdef HAVE_IBV_MLX5_MOD_SWP
1916         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1917                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1918         DRV_LOG(DEBUG, "SWP support: %u", swp);
1919 #endif
1920         config.swp = !!swp;
1921 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1922         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1923                 struct mlx5dv_striding_rq_caps mprq_caps =
1924                         dv_attr.striding_rq_caps;
1925
1926                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1927                         mprq_caps.min_single_stride_log_num_of_bytes);
1928                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1929                         mprq_caps.max_single_stride_log_num_of_bytes);
1930                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1931                         mprq_caps.min_single_wqe_log_num_of_strides);
1932                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1933                         mprq_caps.max_single_wqe_log_num_of_strides);
1934                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1935                         mprq_caps.supported_qpts);
1936                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1937                 mprq = 1;
1938                 mprq_min_stride_size_n =
1939                         mprq_caps.min_single_stride_log_num_of_bytes;
1940                 mprq_max_stride_size_n =
1941                         mprq_caps.max_single_stride_log_num_of_bytes;
1942                 mprq_min_stride_num_n =
1943                         mprq_caps.min_single_wqe_log_num_of_strides;
1944                 mprq_max_stride_num_n =
1945                         mprq_caps.max_single_wqe_log_num_of_strides;
1946                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1947                                                    mprq_min_stride_num_n);
1948         }
1949 #endif
1950         if (RTE_CACHE_LINE_SIZE == 128 &&
1951             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1952                 cqe_comp = 0;
1953         else
1954                 cqe_comp = 1;
1955         config.cqe_comp = cqe_comp;
1956 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1957         /* Whether device supports 128B Rx CQE padding. */
1958         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1959                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1960 #endif
1961 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1962         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1963                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1964                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1965                              (dv_attr.tunnel_offloads_caps &
1966                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1967         }
1968         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1969                 tunnel_en ? "" : "not ");
1970 #else
1971         DRV_LOG(WARNING,
1972                 "tunnel offloading disabled due to old OFED/rdma-core version");
1973 #endif
1974         config.tunnel_en = tunnel_en;
1975 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1976         mpls_en = ((dv_attr.tunnel_offloads_caps &
1977                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1978                    (dv_attr.tunnel_offloads_caps &
1979                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1980         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1981                 mpls_en ? "" : "not ");
1982 #else
1983         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1984                 " old OFED/rdma-core version or firmware configuration");
1985 #endif
1986         config.mpls_en = mpls_en;
1987         /* Check port status. */
1988         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1989         if (err) {
1990                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1991                 goto error;
1992         }
1993         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1994                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1995                 err = EINVAL;
1996                 goto error;
1997         }
1998         if (port_attr.state != IBV_PORT_ACTIVE)
1999                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2000                         mlx5_glue->port_state_str(port_attr.state),
2001                         port_attr.state);
2002         /* Allocate private eth device data. */
2003         priv = rte_zmalloc("ethdev private structure",
2004                            sizeof(*priv),
2005                            RTE_CACHE_LINE_SIZE);
2006         if (priv == NULL) {
2007                 DRV_LOG(ERR, "priv allocation failure");
2008                 err = ENOMEM;
2009                 goto error;
2010         }
2011         priv->sh = sh;
2012         priv->ibv_port = spawn->ibv_port;
2013         priv->pci_dev = spawn->pci_dev;
2014         priv->mtu = RTE_ETHER_MTU;
2015 #ifndef RTE_ARCH_64
2016         /* Initialize UAR access locks for 32bit implementations. */
2017         rte_spinlock_init(&priv->uar_lock_cq);
2018         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2019                 rte_spinlock_init(&priv->uar_lock[i]);
2020 #endif
2021         /* Some internal functions rely on Netlink sockets, open them now. */
2022         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2023         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2024         priv->nl_sn = 0;
2025         priv->representor = !!switch_info->representor;
2026         priv->master = !!switch_info->master;
2027         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2028         priv->vport_meta_tag = 0;
2029         priv->vport_meta_mask = 0;
2030         priv->pf_bond = spawn->pf_bond;
2031 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2032         /*
2033          * The DevX port query API is implemented. E-Switch may use
2034          * either vport or reg_c[0] metadata register to match on
2035          * vport index. The engaged part of metadata register is
2036          * defined by mask.
2037          */
2038         devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2039                               MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2040         err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port, &devx_port);
2041         if (err) {
2042                 DRV_LOG(WARNING, "can't query devx port %d on device %s",
2043                         spawn->ibv_port, spawn->ibv_dev->name);
2044                 devx_port.comp_mask = 0;
2045         }
2046         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2047                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2048                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2049                 if (!priv->vport_meta_mask) {
2050                         DRV_LOG(ERR, "vport zero mask for port %d"
2051                                      " on bonding device %s",
2052                                      spawn->ibv_port, spawn->ibv_dev->name);
2053                         err = ENOTSUP;
2054                         goto error;
2055                 }
2056                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2057                         DRV_LOG(ERR, "invalid vport tag for port %d"
2058                                      " on bonding device %s",
2059                                      spawn->ibv_port, spawn->ibv_dev->name);
2060                         err = ENOTSUP;
2061                         goto error;
2062                 }
2063         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2064                 priv->vport_id = devx_port.vport_num;
2065         } else if (spawn->pf_bond >= 0) {
2066                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2067                              " on bonding device %s",
2068                              spawn->ibv_port, spawn->ibv_dev->name);
2069                 err = ENOTSUP;
2070                 goto error;
2071         } else {
2072                 /* Suppose vport index in compatible way. */
2073                 priv->vport_id = switch_info->representor ?
2074                                  switch_info->port_name + 1 : -1;
2075         }
2076 #else
2077         /*
2078          * Kernel/rdma_core support single E-Switch per PF configurations
2079          * only and vport_id field contains the vport index for
2080          * associated VF, which is deduced from representor port name.
2081          * For example, let's have the IB device port 10, it has
2082          * attached network device eth0, which has port name attribute
2083          * pf0vf2, we can deduce the VF number as 2, and set vport index
2084          * as 3 (2+1). This assigning schema should be changed if the
2085          * multiple E-Switch instances per PF configurations or/and PCI
2086          * subfunctions are added.
2087          */
2088         priv->vport_id = switch_info->representor ?
2089                          switch_info->port_name + 1 : -1;
2090 #endif
2091         /* representor_id field keeps the unmodified VF index. */
2092         priv->representor_id = switch_info->representor ?
2093                                switch_info->port_name : -1;
2094         /*
2095          * Look for sibling devices in order to reuse their switch domain
2096          * if any, otherwise allocate one.
2097          */
2098         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2099                 const struct mlx5_priv *opriv =
2100                         rte_eth_devices[port_id].data->dev_private;
2101
2102                 if (!opriv ||
2103                     opriv->sh != priv->sh ||
2104                         opriv->domain_id ==
2105                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2106                         continue;
2107                 priv->domain_id = opriv->domain_id;
2108                 break;
2109         }
2110         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2111                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2112                 if (err) {
2113                         err = rte_errno;
2114                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2115                                 strerror(rte_errno));
2116                         goto error;
2117                 }
2118                 own_domain_id = 1;
2119         }
2120         err = mlx5_args(&config, dpdk_dev->devargs);
2121         if (err) {
2122                 err = rte_errno;
2123                 DRV_LOG(ERR, "failed to process device arguments: %s",
2124                         strerror(rte_errno));
2125                 goto error;
2126         }
2127         err = mlx5_dev_check_sibling_config(priv, &config);
2128         if (err)
2129                 goto error;
2130         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2131                             IBV_DEVICE_RAW_IP_CSUM);
2132         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2133                 (config.hw_csum ? "" : "not "));
2134 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2135         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2136         DRV_LOG(DEBUG, "counters are not supported");
2137 #endif
2138 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2139         if (config.dv_flow_en) {
2140                 DRV_LOG(WARNING, "DV flow is not supported");
2141                 config.dv_flow_en = 0;
2142         }
2143 #endif
2144         config.ind_table_max_size =
2145                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2146         /*
2147          * Remove this check once DPDK supports larger/variable
2148          * indirection tables.
2149          */
2150         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2151                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2152         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2153                 config.ind_table_max_size);
2154         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2155                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2156         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2157                 (config.hw_vlan_strip ? "" : "not "));
2158         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2159                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2160         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2161                 (config.hw_fcs_strip ? "" : "not "));
2162 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2163         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2164 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2165         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2166                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2167 #endif
2168         if (config.hw_padding && !hw_padding) {
2169                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2170                 config.hw_padding = 0;
2171         } else if (config.hw_padding) {
2172                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2173         }
2174         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2175                       (sh->device_attr.tso_caps.supported_qpts &
2176                        (1 << IBV_QPT_RAW_PACKET)));
2177         if (config.tso)
2178                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2179         /*
2180          * MPW is disabled by default, while the Enhanced MPW is enabled
2181          * by default.
2182          */
2183         if (config.mps == MLX5_ARG_UNSET)
2184                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2185                                                           MLX5_MPW_DISABLED;
2186         else
2187                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2188         DRV_LOG(INFO, "%sMPS is %s",
2189                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2190                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2191         if (config.cqe_comp && !cqe_comp) {
2192                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2193                 config.cqe_comp = 0;
2194         }
2195         if (config.cqe_pad && !cqe_pad) {
2196                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2197                 config.cqe_pad = 0;
2198         } else if (config.cqe_pad) {
2199                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2200         }
2201         if (config.devx) {
2202                 priv->counter_fallback = 0;
2203                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2204                 if (err) {
2205                         err = -err;
2206                         goto error;
2207                 }
2208                 if (!config.hca_attr.flow_counters_dump)
2209                         priv->counter_fallback = 1;
2210 #ifndef HAVE_IBV_DEVX_ASYNC
2211                 priv->counter_fallback = 1;
2212 #endif
2213                 if (priv->counter_fallback)
2214                         DRV_LOG(INFO, "Use fall-back DV counter management");
2215                 /* Check for LRO support. */
2216                 if (config.dest_tir && config.hca_attr.lro_cap &&
2217                     config.dv_flow_en) {
2218                         /* TBD check tunnel lro caps. */
2219                         config.lro.supported = config.hca_attr.lro_cap;
2220                         DRV_LOG(DEBUG, "Device supports LRO");
2221                         /*
2222                          * If LRO timeout is not configured by application,
2223                          * use the minimal supported value.
2224                          */
2225                         if (!config.lro.timeout)
2226                                 config.lro.timeout =
2227                                 config.hca_attr.lro_timer_supported_periods[0];
2228                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2229                                 config.lro.timeout);
2230                 }
2231         }
2232         if (config.mprq.enabled && mprq) {
2233                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2234                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2235                         config.mprq.stride_num_n =
2236                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2237                                         mprq_min_stride_num_n);
2238                         DRV_LOG(WARNING,
2239                                 "the number of strides"
2240                                 " for Multi-Packet RQ is out of range,"
2241                                 " setting default value (%u)",
2242                                 1 << config.mprq.stride_num_n);
2243                 }
2244                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2245                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2246         } else if (config.mprq.enabled && !mprq) {
2247                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2248                 config.mprq.enabled = 0;
2249         }
2250         if (config.max_dump_files_num == 0)
2251                 config.max_dump_files_num = 128;
2252         eth_dev = rte_eth_dev_allocate(name);
2253         if (eth_dev == NULL) {
2254                 DRV_LOG(ERR, "can not allocate rte ethdev");
2255                 err = ENOMEM;
2256                 goto error;
2257         }
2258         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2259         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2260         if (priv->representor) {
2261                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2262                 eth_dev->data->representor_id = priv->representor_id;
2263         }
2264         /*
2265          * Store associated network device interface index. This index
2266          * is permanent throughout the lifetime of device. So, we may store
2267          * the ifindex here and use the cached value further.
2268          */
2269         assert(spawn->ifindex);
2270         priv->if_index = spawn->ifindex;
2271         eth_dev->data->dev_private = priv;
2272         priv->dev_data = eth_dev->data;
2273         eth_dev->data->mac_addrs = priv->mac;
2274         eth_dev->device = dpdk_dev;
2275         /* Configure the first MAC address by default. */
2276         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2277                 DRV_LOG(ERR,
2278                         "port %u cannot get MAC address, is mlx5_en"
2279                         " loaded? (errno: %s)",
2280                         eth_dev->data->port_id, strerror(rte_errno));
2281                 err = ENODEV;
2282                 goto error;
2283         }
2284         DRV_LOG(INFO,
2285                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2286                 eth_dev->data->port_id,
2287                 mac.addr_bytes[0], mac.addr_bytes[1],
2288                 mac.addr_bytes[2], mac.addr_bytes[3],
2289                 mac.addr_bytes[4], mac.addr_bytes[5]);
2290 #ifndef NDEBUG
2291         {
2292                 char ifname[IF_NAMESIZE];
2293
2294                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2295                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2296                                 eth_dev->data->port_id, ifname);
2297                 else
2298                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2299                                 eth_dev->data->port_id);
2300         }
2301 #endif
2302         /* Get actual MTU if possible. */
2303         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2304         if (err) {
2305                 err = rte_errno;
2306                 goto error;
2307         }
2308         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2309                 priv->mtu);
2310         /* Initialize burst functions to prevent crashes before link-up. */
2311         eth_dev->rx_pkt_burst = removed_rx_burst;
2312         eth_dev->tx_pkt_burst = removed_tx_burst;
2313         eth_dev->dev_ops = &mlx5_dev_ops;
2314         /* Register MAC address. */
2315         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2316         if (config.vf && config.vf_nl_en)
2317                 mlx5_nl_mac_addr_sync(eth_dev);
2318         TAILQ_INIT(&priv->flows);
2319         TAILQ_INIT(&priv->ctrl_flows);
2320         /* Hint libmlx5 to use PMD allocator for data plane resources */
2321         struct mlx5dv_ctx_allocators alctr = {
2322                 .alloc = &mlx5_alloc_verbs_buf,
2323                 .free = &mlx5_free_verbs_buf,
2324                 .data = priv,
2325         };
2326         mlx5_glue->dv_set_context_attr(sh->ctx,
2327                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2328                                        (void *)((uintptr_t)&alctr));
2329         /* Bring Ethernet device up. */
2330         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2331                 eth_dev->data->port_id);
2332         mlx5_set_link_up(eth_dev);
2333         /*
2334          * Even though the interrupt handler is not installed yet,
2335          * interrupts will still trigger on the async_fd from
2336          * Verbs context returned by ibv_open_device().
2337          */
2338         mlx5_link_update(eth_dev, 0);
2339 #ifdef HAVE_MLX5DV_DR_ESWITCH
2340         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2341               (switch_info->representor || switch_info->master)))
2342                 config.dv_esw_en = 0;
2343 #else
2344         config.dv_esw_en = 0;
2345 #endif
2346         /* Detect minimal data bytes to inline. */
2347         mlx5_set_min_inline(spawn, &config);
2348         /* Store device configuration on private structure. */
2349         priv->config = config;
2350         /* Create context for virtual machine VLAN workaround. */
2351         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2352         if (config.dv_flow_en) {
2353                 err = mlx5_alloc_shared_dr(priv);
2354                 if (err)
2355                         goto error;
2356         }
2357         /* Supported Verbs flow priority number detection. */
2358         err = mlx5_flow_discover_priorities(eth_dev);
2359         if (err < 0) {
2360                 err = -err;
2361                 goto error;
2362         }
2363         priv->config.flow_prio = err;
2364         /* Query availibility of metadata reg_c's. */
2365         err = mlx5_flow_discover_mreg_c(eth_dev);
2366         if (err < 0) {
2367                 err = -err;
2368                 goto error;
2369         }
2370         if (!priv->config.dv_esw_en &&
2371             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2372                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2373                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2374                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2375         }
2376         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2377                 DRV_LOG(DEBUG,
2378                         "port %u extensive metadata register is not supported",
2379                         eth_dev->data->port_id);
2380                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2381                         DRV_LOG(ERR, "metadata mode %u is not supported "
2382                                      "(no metadata registers available)",
2383                                      priv->config.dv_xmeta_en);
2384                         err = ENOTSUP;
2385                         goto error;
2386                 }
2387         }
2388         return eth_dev;
2389 error:
2390         if (priv) {
2391                 if (priv->sh)
2392                         mlx5_free_shared_dr(priv);
2393                 if (priv->nl_socket_route >= 0)
2394                         close(priv->nl_socket_route);
2395                 if (priv->nl_socket_rdma >= 0)
2396                         close(priv->nl_socket_rdma);
2397                 if (priv->vmwa_context)
2398                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2399                 if (own_domain_id)
2400                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2401                 rte_free(priv);
2402                 if (eth_dev != NULL)
2403                         eth_dev->data->dev_private = NULL;
2404         }
2405         if (eth_dev != NULL) {
2406                 /* mac_addrs must not be freed alone because part of dev_private */
2407                 eth_dev->data->mac_addrs = NULL;
2408                 rte_eth_dev_release_port(eth_dev);
2409         }
2410         if (sh)
2411                 mlx5_free_shared_ibctx(sh);
2412         assert(err > 0);
2413         rte_errno = err;
2414         return NULL;
2415 }
2416
2417 /**
2418  * Comparison callback to sort device data.
2419  *
2420  * This is meant to be used with qsort().
2421  *
2422  * @param a[in]
2423  *   Pointer to pointer to first data object.
2424  * @param b[in]
2425  *   Pointer to pointer to second data object.
2426  *
2427  * @return
2428  *   0 if both objects are equal, less than 0 if the first argument is less
2429  *   than the second, greater than 0 otherwise.
2430  */
2431 static int
2432 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2433 {
2434         const struct mlx5_switch_info *si_a =
2435                 &((const struct mlx5_dev_spawn_data *)a)->info;
2436         const struct mlx5_switch_info *si_b =
2437                 &((const struct mlx5_dev_spawn_data *)b)->info;
2438         int ret;
2439
2440         /* Master device first. */
2441         ret = si_b->master - si_a->master;
2442         if (ret)
2443                 return ret;
2444         /* Then representor devices. */
2445         ret = si_b->representor - si_a->representor;
2446         if (ret)
2447                 return ret;
2448         /* Unidentified devices come last in no specific order. */
2449         if (!si_a->representor)
2450                 return 0;
2451         /* Order representors by name. */
2452         return si_a->port_name - si_b->port_name;
2453 }
2454
2455 /**
2456  * Match PCI information for possible slaves of bonding device.
2457  *
2458  * @param[in] ibv_dev
2459  *   Pointer to Infiniband device structure.
2460  * @param[in] pci_dev
2461  *   Pointer to PCI device structure to match PCI address.
2462  * @param[in] nl_rdma
2463  *   Netlink RDMA group socket handle.
2464  *
2465  * @return
2466  *   negative value if no bonding device found, otherwise
2467  *   positive index of slave PF in bonding.
2468  */
2469 static int
2470 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2471                            const struct rte_pci_device *pci_dev,
2472                            int nl_rdma)
2473 {
2474         char ifname[IF_NAMESIZE + 1];
2475         unsigned int ifindex;
2476         unsigned int np, i;
2477         FILE *file = NULL;
2478         int pf = -1;
2479
2480         /*
2481          * Try to get master device name. If something goes
2482          * wrong suppose the lack of kernel support and no
2483          * bonding devices.
2484          */
2485         if (nl_rdma < 0)
2486                 return -1;
2487         if (!strstr(ibv_dev->name, "bond"))
2488                 return -1;
2489         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2490         if (!np)
2491                 return -1;
2492         /*
2493          * The Master device might not be on the predefined
2494          * port (not on port index 1, it is not garanted),
2495          * we have to scan all Infiniband device port and
2496          * find master.
2497          */
2498         for (i = 1; i <= np; ++i) {
2499                 /* Check whether Infiniband port is populated. */
2500                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2501                 if (!ifindex)
2502                         continue;
2503                 if (!if_indextoname(ifindex, ifname))
2504                         continue;
2505                 /* Try to read bonding slave names from sysfs. */
2506                 MKSTR(slaves,
2507                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2508                 file = fopen(slaves, "r");
2509                 if (file)
2510                         break;
2511         }
2512         if (!file)
2513                 return -1;
2514         /* Use safe format to check maximal buffer length. */
2515         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2516         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2517                 char tmp_str[IF_NAMESIZE + 32];
2518                 struct rte_pci_addr pci_addr;
2519                 struct mlx5_switch_info info;
2520
2521                 /* Process slave interface names in the loop. */
2522                 snprintf(tmp_str, sizeof(tmp_str),
2523                          "/sys/class/net/%s", ifname);
2524                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2525                         DRV_LOG(WARNING, "can not get PCI address"
2526                                          " for netdev \"%s\"", ifname);
2527                         continue;
2528                 }
2529                 if (pci_dev->addr.domain != pci_addr.domain ||
2530                     pci_dev->addr.bus != pci_addr.bus ||
2531                     pci_dev->addr.devid != pci_addr.devid ||
2532                     pci_dev->addr.function != pci_addr.function)
2533                         continue;
2534                 /* Slave interface PCI address match found. */
2535                 fclose(file);
2536                 snprintf(tmp_str, sizeof(tmp_str),
2537                          "/sys/class/net/%s/phys_port_name", ifname);
2538                 file = fopen(tmp_str, "rb");
2539                 if (!file)
2540                         break;
2541                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2542                 if (fscanf(file, "%32s", tmp_str) == 1)
2543                         mlx5_translate_port_name(tmp_str, &info);
2544                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2545                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2546                         pf = info.port_name;
2547                 break;
2548         }
2549         if (file)
2550                 fclose(file);
2551         return pf;
2552 }
2553
2554 /**
2555  * DPDK callback to register a PCI device.
2556  *
2557  * This function spawns Ethernet devices out of a given PCI device.
2558  *
2559  * @param[in] pci_drv
2560  *   PCI driver structure (mlx5_driver).
2561  * @param[in] pci_dev
2562  *   PCI device information.
2563  *
2564  * @return
2565  *   0 on success, a negative errno value otherwise and rte_errno is set.
2566  */
2567 static int
2568 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2569                struct rte_pci_device *pci_dev)
2570 {
2571         struct ibv_device **ibv_list;
2572         /*
2573          * Number of found IB Devices matching with requested PCI BDF.
2574          * nd != 1 means there are multiple IB devices over the same
2575          * PCI device and we have representors and master.
2576          */
2577         unsigned int nd = 0;
2578         /*
2579          * Number of found IB device Ports. nd = 1 and np = 1..n means
2580          * we have the single multiport IB device, and there may be
2581          * representors attached to some of found ports.
2582          */
2583         unsigned int np = 0;
2584         /*
2585          * Number of DPDK ethernet devices to Spawn - either over
2586          * multiple IB devices or multiple ports of single IB device.
2587          * Actually this is the number of iterations to spawn.
2588          */
2589         unsigned int ns = 0;
2590         /*
2591          * Bonding device
2592          *   < 0 - no bonding device (single one)
2593          *  >= 0 - bonding device (value is slave PF index)
2594          */
2595         int bd = -1;
2596         struct mlx5_dev_spawn_data *list = NULL;
2597         struct mlx5_dev_config dev_config;
2598         int ret;
2599
2600         ret = mlx5_init_once();
2601         if (ret) {
2602                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2603                         strerror(rte_errno));
2604                 return -rte_errno;
2605         }
2606         assert(pci_drv == &mlx5_driver);
2607         errno = 0;
2608         ibv_list = mlx5_glue->get_device_list(&ret);
2609         if (!ibv_list) {
2610                 rte_errno = errno ? errno : ENOSYS;
2611                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2612                 return -rte_errno;
2613         }
2614         /*
2615          * First scan the list of all Infiniband devices to find
2616          * matching ones, gathering into the list.
2617          */
2618         struct ibv_device *ibv_match[ret + 1];
2619         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2620         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2621         unsigned int i;
2622
2623         while (ret-- > 0) {
2624                 struct rte_pci_addr pci_addr;
2625
2626                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2627                 bd = mlx5_device_bond_pci_match
2628                                 (ibv_list[ret], pci_dev, nl_rdma);
2629                 if (bd >= 0) {
2630                         /*
2631                          * Bonding device detected. Only one match is allowed,
2632                          * the bonding is supported over multi-port IB device,
2633                          * there should be no matches on representor PCI
2634                          * functions or non VF LAG bonding devices with
2635                          * specified address.
2636                          */
2637                         if (nd) {
2638                                 DRV_LOG(ERR,
2639                                         "multiple PCI match on bonding device"
2640                                         "\"%s\" found", ibv_list[ret]->name);
2641                                 rte_errno = ENOENT;
2642                                 ret = -rte_errno;
2643                                 goto exit;
2644                         }
2645                         DRV_LOG(INFO, "PCI information matches for"
2646                                       " slave %d bonding device \"%s\"",
2647                                       bd, ibv_list[ret]->name);
2648                         ibv_match[nd++] = ibv_list[ret];
2649                         break;
2650                 }
2651                 if (mlx5_dev_to_pci_addr
2652                         (ibv_list[ret]->ibdev_path, &pci_addr))
2653                         continue;
2654                 if (pci_dev->addr.domain != pci_addr.domain ||
2655                     pci_dev->addr.bus != pci_addr.bus ||
2656                     pci_dev->addr.devid != pci_addr.devid ||
2657                     pci_dev->addr.function != pci_addr.function)
2658                         continue;
2659                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2660                         ibv_list[ret]->name);
2661                 ibv_match[nd++] = ibv_list[ret];
2662         }
2663         ibv_match[nd] = NULL;
2664         if (!nd) {
2665                 /* No device matches, just complain and bail out. */
2666                 DRV_LOG(WARNING,
2667                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2668                         " are kernel drivers loaded?",
2669                         pci_dev->addr.domain, pci_dev->addr.bus,
2670                         pci_dev->addr.devid, pci_dev->addr.function);
2671                 rte_errno = ENOENT;
2672                 ret = -rte_errno;
2673                 goto exit;
2674         }
2675         if (nd == 1) {
2676                 /*
2677                  * Found single matching device may have multiple ports.
2678                  * Each port may be representor, we have to check the port
2679                  * number and check the representors existence.
2680                  */
2681                 if (nl_rdma >= 0)
2682                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2683                 if (!np)
2684                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2685                                          " ports number", ibv_match[0]->name);
2686                 if (bd >= 0 && !np) {
2687                         DRV_LOG(ERR, "can not get ports"
2688                                      " for bonding device");
2689                         rte_errno = ENOENT;
2690                         ret = -rte_errno;
2691                         goto exit;
2692                 }
2693         }
2694 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2695         if (bd >= 0) {
2696                 /*
2697                  * This may happen if there is VF LAG kernel support and
2698                  * application is compiled with older rdma_core library.
2699                  */
2700                 DRV_LOG(ERR,
2701                         "No kernel/verbs support for VF LAG bonding found.");
2702                 rte_errno = ENOTSUP;
2703                 ret = -rte_errno;
2704                 goto exit;
2705         }
2706 #endif
2707         /*
2708          * Now we can determine the maximal
2709          * amount of devices to be spawned.
2710          */
2711         list = rte_zmalloc("device spawn data",
2712                          sizeof(struct mlx5_dev_spawn_data) *
2713                          (np ? np : nd),
2714                          RTE_CACHE_LINE_SIZE);
2715         if (!list) {
2716                 DRV_LOG(ERR, "spawn data array allocation failure");
2717                 rte_errno = ENOMEM;
2718                 ret = -rte_errno;
2719                 goto exit;
2720         }
2721         if (bd >= 0 || np > 1) {
2722                 /*
2723                  * Single IB device with multiple ports found,
2724                  * it may be E-Switch master device and representors.
2725                  * We have to perform identification trough the ports.
2726                  */
2727                 assert(nl_rdma >= 0);
2728                 assert(ns == 0);
2729                 assert(nd == 1);
2730                 assert(np);
2731                 for (i = 1; i <= np; ++i) {
2732                         list[ns].max_port = np;
2733                         list[ns].ibv_port = i;
2734                         list[ns].ibv_dev = ibv_match[0];
2735                         list[ns].eth_dev = NULL;
2736                         list[ns].pci_dev = pci_dev;
2737                         list[ns].pf_bond = bd;
2738                         list[ns].ifindex = mlx5_nl_ifindex
2739                                         (nl_rdma, list[ns].ibv_dev->name, i);
2740                         if (!list[ns].ifindex) {
2741                                 /*
2742                                  * No network interface index found for the
2743                                  * specified port, it means there is no
2744                                  * representor on this port. It's OK,
2745                                  * there can be disabled ports, for example
2746                                  * if sriov_numvfs < sriov_totalvfs.
2747                                  */
2748                                 continue;
2749                         }
2750                         ret = -1;
2751                         if (nl_route >= 0)
2752                                 ret = mlx5_nl_switch_info
2753                                                (nl_route,
2754                                                 list[ns].ifindex,
2755                                                 &list[ns].info);
2756                         if (ret || (!list[ns].info.representor &&
2757                                     !list[ns].info.master)) {
2758                                 /*
2759                                  * We failed to recognize representors with
2760                                  * Netlink, let's try to perform the task
2761                                  * with sysfs.
2762                                  */
2763                                 ret =  mlx5_sysfs_switch_info
2764                                                 (list[ns].ifindex,
2765                                                  &list[ns].info);
2766                         }
2767                         if (!ret && bd >= 0) {
2768                                 switch (list[ns].info.name_type) {
2769                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2770                                         if (list[ns].info.port_name == bd)
2771                                                 ns++;
2772                                         break;
2773                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2774                                         if (list[ns].info.pf_num == bd)
2775                                                 ns++;
2776                                         break;
2777                                 default:
2778                                         break;
2779                                 }
2780                                 continue;
2781                         }
2782                         if (!ret && (list[ns].info.representor ^
2783                                      list[ns].info.master))
2784                                 ns++;
2785                 }
2786                 if (!ns) {
2787                         DRV_LOG(ERR,
2788                                 "unable to recognize master/representors"
2789                                 " on the IB device with multiple ports");
2790                         rte_errno = ENOENT;
2791                         ret = -rte_errno;
2792                         goto exit;
2793                 }
2794         } else {
2795                 /*
2796                  * The existence of several matching entries (nd > 1) means
2797                  * port representors have been instantiated. No existing Verbs
2798                  * call nor sysfs entries can tell them apart, this can only
2799                  * be done through Netlink calls assuming kernel drivers are
2800                  * recent enough to support them.
2801                  *
2802                  * In the event of identification failure through Netlink,
2803                  * try again through sysfs, then:
2804                  *
2805                  * 1. A single IB device matches (nd == 1) with single
2806                  *    port (np=0/1) and is not a representor, assume
2807                  *    no switch support.
2808                  *
2809                  * 2. Otherwise no safe assumptions can be made;
2810                  *    complain louder and bail out.
2811                  */
2812                 np = 1;
2813                 for (i = 0; i != nd; ++i) {
2814                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2815                         list[ns].max_port = 1;
2816                         list[ns].ibv_port = 1;
2817                         list[ns].ibv_dev = ibv_match[i];
2818                         list[ns].eth_dev = NULL;
2819                         list[ns].pci_dev = pci_dev;
2820                         list[ns].pf_bond = -1;
2821                         list[ns].ifindex = 0;
2822                         if (nl_rdma >= 0)
2823                                 list[ns].ifindex = mlx5_nl_ifindex
2824                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2825                         if (!list[ns].ifindex) {
2826                                 char ifname[IF_NAMESIZE];
2827
2828                                 /*
2829                                  * Netlink failed, it may happen with old
2830                                  * ib_core kernel driver (before 4.16).
2831                                  * We can assume there is old driver because
2832                                  * here we are processing single ports IB
2833                                  * devices. Let's try sysfs to retrieve
2834                                  * the ifindex. The method works for
2835                                  * master device only.
2836                                  */
2837                                 if (nd > 1) {
2838                                         /*
2839                                          * Multiple devices found, assume
2840                                          * representors, can not distinguish
2841                                          * master/representor and retrieve
2842                                          * ifindex via sysfs.
2843                                          */
2844                                         continue;
2845                                 }
2846                                 ret = mlx5_get_master_ifname
2847                                         (ibv_match[i]->ibdev_path, &ifname);
2848                                 if (!ret)
2849                                         list[ns].ifindex =
2850                                                 if_nametoindex(ifname);
2851                                 if (!list[ns].ifindex) {
2852                                         /*
2853                                          * No network interface index found
2854                                          * for the specified device, it means
2855                                          * there it is neither representor
2856                                          * nor master.
2857                                          */
2858                                         continue;
2859                                 }
2860                         }
2861                         ret = -1;
2862                         if (nl_route >= 0)
2863                                 ret = mlx5_nl_switch_info
2864                                                (nl_route,
2865                                                 list[ns].ifindex,
2866                                                 &list[ns].info);
2867                         if (ret || (!list[ns].info.representor &&
2868                                     !list[ns].info.master)) {
2869                                 /*
2870                                  * We failed to recognize representors with
2871                                  * Netlink, let's try to perform the task
2872                                  * with sysfs.
2873                                  */
2874                                 ret =  mlx5_sysfs_switch_info
2875                                                 (list[ns].ifindex,
2876                                                  &list[ns].info);
2877                         }
2878                         if (!ret && (list[ns].info.representor ^
2879                                      list[ns].info.master)) {
2880                                 ns++;
2881                         } else if ((nd == 1) &&
2882                                    !list[ns].info.representor &&
2883                                    !list[ns].info.master) {
2884                                 /*
2885                                  * Single IB device with
2886                                  * one physical port and
2887                                  * attached network device.
2888                                  * May be SRIOV is not enabled
2889                                  * or there is no representors.
2890                                  */
2891                                 DRV_LOG(INFO, "no E-Switch support detected");
2892                                 ns++;
2893                                 break;
2894                         }
2895                 }
2896                 if (!ns) {
2897                         DRV_LOG(ERR,
2898                                 "unable to recognize master/representors"
2899                                 " on the multiple IB devices");
2900                         rte_errno = ENOENT;
2901                         ret = -rte_errno;
2902                         goto exit;
2903                 }
2904         }
2905         assert(ns);
2906         /*
2907          * Sort list to probe devices in natural order for users convenience
2908          * (i.e. master first, then representors from lowest to highest ID).
2909          */
2910         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2911         /* Default configuration. */
2912         dev_config = (struct mlx5_dev_config){
2913                 .hw_padding = 0,
2914                 .mps = MLX5_ARG_UNSET,
2915                 .rx_vec_en = 1,
2916                 .txq_inline_max = MLX5_ARG_UNSET,
2917                 .txq_inline_min = MLX5_ARG_UNSET,
2918                 .txq_inline_mpw = MLX5_ARG_UNSET,
2919                 .txqs_inline = MLX5_ARG_UNSET,
2920                 .vf_nl_en = 1,
2921                 .mr_ext_memseg_en = 1,
2922                 .mprq = {
2923                         .enabled = 0, /* Disabled by default. */
2924                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2925                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2926                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2927                 },
2928                 .dv_esw_en = 1,
2929         };
2930         /* Device specific configuration. */
2931         switch (pci_dev->id.device_id) {
2932         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2933         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2934         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2935         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2936         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2937         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2938         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2939                 dev_config.vf = 1;
2940                 break;
2941         default:
2942                 break;
2943         }
2944         for (i = 0; i != ns; ++i) {
2945                 uint32_t restore;
2946
2947                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2948                                                  &list[i],
2949                                                  dev_config);
2950                 if (!list[i].eth_dev) {
2951                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2952                                 break;
2953                         /* Device is disabled or already spawned. Ignore it. */
2954                         continue;
2955                 }
2956                 restore = list[i].eth_dev->data->dev_flags;
2957                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2958                 /* Restore non-PCI flags cleared by the above call. */
2959                 list[i].eth_dev->data->dev_flags |= restore;
2960                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
2961                 rte_eth_dev_probing_finish(list[i].eth_dev);
2962         }
2963         if (i != ns) {
2964                 DRV_LOG(ERR,
2965                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2966                         " encountering an error: %s",
2967                         pci_dev->addr.domain, pci_dev->addr.bus,
2968                         pci_dev->addr.devid, pci_dev->addr.function,
2969                         strerror(rte_errno));
2970                 ret = -rte_errno;
2971                 /* Roll back. */
2972                 while (i--) {
2973                         if (!list[i].eth_dev)
2974                                 continue;
2975                         mlx5_dev_close(list[i].eth_dev);
2976                         /* mac_addrs must not be freed because in dev_private */
2977                         list[i].eth_dev->data->mac_addrs = NULL;
2978                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2979                 }
2980                 /* Restore original error. */
2981                 rte_errno = -ret;
2982         } else {
2983                 ret = 0;
2984         }
2985 exit:
2986         /*
2987          * Do the routine cleanup:
2988          * - close opened Netlink sockets
2989          * - free allocated spawn data array
2990          * - free the Infiniband device list
2991          */
2992         if (nl_rdma >= 0)
2993                 close(nl_rdma);
2994         if (nl_route >= 0)
2995                 close(nl_route);
2996         if (list)
2997                 rte_free(list);
2998         assert(ibv_list);
2999         mlx5_glue->free_device_list(ibv_list);
3000         return ret;
3001 }
3002
3003 /**
3004  * Look for the ethernet device belonging to mlx5 driver.
3005  *
3006  * @param[in] port_id
3007  *   port_id to start looking for device.
3008  * @param[in] pci_dev
3009  *   Pointer to the hint PCI device. When device is being probed
3010  *   the its siblings (master and preceding representors might
3011  *   not have assigned driver yet (because the mlx5_pci_probe()
3012  *   is not completed yet, for this case match on hint PCI
3013  *   device may be used to detect sibling device.
3014  *
3015  * @return
3016  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3017  */
3018 uint16_t
3019 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3020 {
3021         while (port_id < RTE_MAX_ETHPORTS) {
3022                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3023
3024                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3025                     dev->device &&
3026                     (dev->device == &pci_dev->device ||
3027                      (dev->device->driver &&
3028                      dev->device->driver->name &&
3029                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3030                         break;
3031                 port_id++;
3032         }
3033         if (port_id >= RTE_MAX_ETHPORTS)
3034                 return RTE_MAX_ETHPORTS;
3035         return port_id;
3036 }
3037
3038 /**
3039  * DPDK callback to remove a PCI device.
3040  *
3041  * This function removes all Ethernet devices belong to a given PCI device.
3042  *
3043  * @param[in] pci_dev
3044  *   Pointer to the PCI device.
3045  *
3046  * @return
3047  *   0 on success, the function cannot fail.
3048  */
3049 static int
3050 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3051 {
3052         uint16_t port_id;
3053
3054         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3055                 rte_eth_dev_close(port_id);
3056         return 0;
3057 }
3058
3059 static const struct rte_pci_id mlx5_pci_id_map[] = {
3060         {
3061                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3062                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3063         },
3064         {
3065                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3066                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3067         },
3068         {
3069                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3070                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3071         },
3072         {
3073                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3074                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3075         },
3076         {
3077                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3078                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3079         },
3080         {
3081                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3082                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3083         },
3084         {
3085                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3086                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3087         },
3088         {
3089                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3090                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3091         },
3092         {
3093                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3094                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3095         },
3096         {
3097                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3098                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3099         },
3100         {
3101                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3102                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3103         },
3104         {
3105                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3106                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3107         },
3108         {
3109                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3110                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3111         },
3112         {
3113                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3114                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3115         },
3116         {
3117                 .vendor_id = 0
3118         }
3119 };
3120
3121 static struct rte_pci_driver mlx5_driver = {
3122         .driver = {
3123                 .name = MLX5_DRIVER_NAME
3124         },
3125         .id_table = mlx5_pci_id_map,
3126         .probe = mlx5_pci_probe,
3127         .remove = mlx5_pci_remove,
3128         .dma_map = mlx5_dma_map,
3129         .dma_unmap = mlx5_dma_unmap,
3130         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3131                      RTE_PCI_DRV_PROBE_AGAIN,
3132 };
3133
3134 #ifdef RTE_IBVERBS_LINK_DLOPEN
3135
3136 /**
3137  * Suffix RTE_EAL_PMD_PATH with "-glue".
3138  *
3139  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3140  * suffixing its last component.
3141  *
3142  * @param buf[out]
3143  *   Output buffer, should be large enough otherwise NULL is returned.
3144  * @param size
3145  *   Size of @p out.
3146  *
3147  * @return
3148  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3149  */
3150 static char *
3151 mlx5_glue_path(char *buf, size_t size)
3152 {
3153         static const char *const bad[] = { "/", ".", "..", NULL };
3154         const char *path = RTE_EAL_PMD_PATH;
3155         size_t len = strlen(path);
3156         size_t off;
3157         int i;
3158
3159         while (len && path[len - 1] == '/')
3160                 --len;
3161         for (off = len; off && path[off - 1] != '/'; --off)
3162                 ;
3163         for (i = 0; bad[i]; ++i)
3164                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3165                         goto error;
3166         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3167         if (i == -1 || (size_t)i >= size)
3168                 goto error;
3169         return buf;
3170 error:
3171         DRV_LOG(ERR,
3172                 "unable to append \"-glue\" to last component of"
3173                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3174                 " please re-configure DPDK");
3175         return NULL;
3176 }
3177
3178 /**
3179  * Initialization routine for run-time dependency on rdma-core.
3180  */
3181 static int
3182 mlx5_glue_init(void)
3183 {
3184         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3185         const char *path[] = {
3186                 /*
3187                  * A basic security check is necessary before trusting
3188                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3189                  */
3190                 (geteuid() == getuid() && getegid() == getgid() ?
3191                  getenv("MLX5_GLUE_PATH") : NULL),
3192                 /*
3193                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3194                  * variant, otherwise let dlopen() look up libraries on its
3195                  * own.
3196                  */
3197                 (*RTE_EAL_PMD_PATH ?
3198                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3199         };
3200         unsigned int i = 0;
3201         void *handle = NULL;
3202         void **sym;
3203         const char *dlmsg;
3204
3205         while (!handle && i != RTE_DIM(path)) {
3206                 const char *end;
3207                 size_t len;
3208                 int ret;
3209
3210                 if (!path[i]) {
3211                         ++i;
3212                         continue;
3213                 }
3214                 end = strpbrk(path[i], ":;");
3215                 if (!end)
3216                         end = path[i] + strlen(path[i]);
3217                 len = end - path[i];
3218                 ret = 0;
3219                 do {
3220                         char name[ret + 1];
3221
3222                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3223                                        (int)len, path[i],
3224                                        (!len || *(end - 1) == '/') ? "" : "/");
3225                         if (ret == -1)
3226                                 break;
3227                         if (sizeof(name) != (size_t)ret + 1)
3228                                 continue;
3229                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3230                                 name);
3231                         handle = dlopen(name, RTLD_LAZY);
3232                         break;
3233                 } while (1);
3234                 path[i] = end + 1;
3235                 if (!*end)
3236                         ++i;
3237         }
3238         if (!handle) {
3239                 rte_errno = EINVAL;
3240                 dlmsg = dlerror();
3241                 if (dlmsg)
3242                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3243                 goto glue_error;
3244         }
3245         sym = dlsym(handle, "mlx5_glue");
3246         if (!sym || !*sym) {
3247                 rte_errno = EINVAL;
3248                 dlmsg = dlerror();
3249                 if (dlmsg)
3250                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3251                 goto glue_error;
3252         }
3253         mlx5_glue = *sym;
3254         return 0;
3255 glue_error:
3256         if (handle)
3257                 dlclose(handle);
3258         DRV_LOG(WARNING,
3259                 "cannot initialize PMD due to missing run-time dependency on"
3260                 " rdma-core libraries (libibverbs, libmlx5)");
3261         return -rte_errno;
3262 }
3263
3264 #endif
3265
3266 /**
3267  * Driver initialization routine.
3268  */
3269 RTE_INIT(rte_mlx5_pmd_init)
3270 {
3271         /* Initialize driver log type. */
3272         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3273         if (mlx5_logtype >= 0)
3274                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3275
3276         /* Build the static tables for Verbs conversion. */
3277         mlx5_set_ptype_table();
3278         mlx5_set_cksum_table();
3279         mlx5_set_swp_types_table();
3280         /*
3281          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3282          * huge pages. Calling ibv_fork_init() during init allows
3283          * applications to use fork() safely for purposes other than
3284          * using this PMD, which is not supported in forked processes.
3285          */
3286         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3287         /* Match the size of Rx completion entry to the size of a cacheline. */
3288         if (RTE_CACHE_LINE_SIZE == 128)
3289                 setenv("MLX5_CQE_SIZE", "128", 0);
3290         /*
3291          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3292          * cleanup all the Verbs resources even when the device was removed.
3293          */
3294         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3295 #ifdef RTE_IBVERBS_LINK_DLOPEN
3296         if (mlx5_glue_init())
3297                 return;
3298         assert(mlx5_glue);
3299 #endif
3300 #ifndef NDEBUG
3301         /* Glue structure must not contain any NULL pointers. */
3302         {
3303                 unsigned int i;
3304
3305                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3306                         assert(((const void *const *)mlx5_glue)[i]);
3307         }
3308 #endif
3309         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3310                 DRV_LOG(ERR,
3311                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3312                         mlx5_glue->version, MLX5_GLUE_VERSION);
3313                 return;
3314         }
3315         mlx5_glue->fork_init();
3316         rte_pci_register(&mlx5_driver);
3317 }
3318
3319 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3320 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3321 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");