drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV E-Switch flow steering. */
 105 #define MLX5_DV_ESW_EN "dv_esw_en"
 106
 107 /* Activate DV flow steering. */
 108 #define MLX5_DV_FLOW_EN "dv_flow_en"
 109
 110 /* Activate Netlink support in VF mode. */
 111 #define MLX5_VF_NL_EN "vf_nl_en"
 112
 113 /* Enable extending memsegs when creating a MR. */
 114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 115
 116 /* Select port representors to instantiate. */
 117 #define MLX5_REPRESENTOR "representor"
 118
 119 /* Device parameter to configure the maximum number of dump files per queue. */
 120 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 121
 122 #ifndef HAVE_IBV_MLX5_MOD_MPW
 123 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 124 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 125 #endif
 126
 127 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 128 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 129 #endif
 130
 131 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 132
 133 /* Shared memory between primary and secondary processes. */
 134 struct mlx5_shared_data *mlx5_shared_data;
 135
 136 /* Spinlock for mlx5_shared_data allocation. */
 137 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 138
 139 /* Process local data for secondary processes. */
 140 static struct mlx5_local_data mlx5_local_data;
 141
 142 /** Driver-specific log messages type. */
 143 int mlx5_logtype;
 144
 145 /** Data associated with devices to spawn. */
 146 struct mlx5_dev_spawn_data {
 147         uint32_t ifindex; /**< Network interface index. */
 148         uint32_t max_port; /**< IB device maximal port index. */
 149         uint32_t ibv_port; /**< IB device physical port index. */
 150         struct mlx5_switch_info info; /**< Switch information. */
 151         struct ibv_device *ibv_dev; /**< Associated IB device. */
 152         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 153         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 154 };
 155
 156 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 157 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 158
 159 /**
 160  * Initialize the counters management structure.
 161  *
 162  * @param[in] sh
 163  *   Pointer to mlx5_ibv_shared object to free
 164  */
 165 static void
 166 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 167 {
 168         uint8_t i;
 169
 170         TAILQ_INIT(&sh->cmng.flow_counters);
 171         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 172                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 173 }
 174
 175 /**
 176  * Destroy all the resources allocated for a counter memory management.
 177  *
 178  * @param[in] mng
 179  *   Pointer to the memory management structure.
 180  */
 181 static void
 182 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 183 {
 184         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 185
 186         LIST_REMOVE(mng, next);
 187         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 188         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 189         rte_free(mem);
 190 }
 191
 192 /**
 193  * Close and release all the resources of the counters management.
 194  *
 195  * @param[in] sh
 196  *   Pointer to mlx5_ibv_shared object to free.
 197  */
 198 static void
 199 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 200 {
 201         struct mlx5_counter_stats_mem_mng *mng;
 202         uint8_t i;
 203         int j;
 204
 205         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 206                 struct mlx5_flow_counter_pool *pool;
 207                 uint32_t batch = !!(i % 2);
 208
 209                 if (!sh->cmng.ccont[i].pools)
 210                         continue;
 211                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 212                 while (pool) {
 213                         if (batch) {
 214                                 if (pool->min_dcs)
 215                                         claim_zero
 216                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 217                         }
 218                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 219                                 if (pool->counters_raw[j].action)
 220                                         claim_zero
 221                                         (mlx5_glue->destroy_flow_action
 222                                                (pool->counters_raw[j].action));
 223                                 if (!batch && pool->counters_raw[j].dcs)
 224                                         claim_zero(mlx5_devx_cmd_destroy
 225                                                   (pool->counters_raw[j].dcs));
 226                         }
 227                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 228                                      next);
 229                         rte_free(pool);
 230                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 231                 }
 232                 rte_free(sh->cmng.ccont[i].pools);
 233         }
 234         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 235         while (mng) {
 236                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 237                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 238         }
 239         memset(&sh->cmng, 0, sizeof(sh->cmng));
 240 }
 241
 242 /**
 243  * Allocate shared IB device context. If there is multiport device the
 244  * master and representors will share this context, if there is single
 245  * port dedicated IB device, the context will be used by only given
 246  * port due to unification.
 247  *
 248  * Routine first searches the context for the specified IB device name,
 249  * if found the shared context assumed and reference counter is incremented.
 250  * If no context found the new one is created and initialized with specified
 251  * IB device context and parameters.
 252  *
 253  * @param[in] spawn
 254  *   Pointer to the IB device attributes (name, port, etc).
 255  *
 256  * @return
 257  *   Pointer to mlx5_ibv_shared object on success,
 258  *   otherwise NULL and rte_errno is set.
 259  */
 260 static struct mlx5_ibv_shared *
 261 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 262 {
 263         struct mlx5_ibv_shared *sh;
 264         int err = 0;
 265         uint32_t i;
 266
 267         assert(spawn);
 268         /* Secondary process should not create the shared context. */
 269         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 270         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 271         /* Search for IB context by device name. */
 272         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 273                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 274                         sh->refcnt++;
 275                         goto exit;
 276                 }
 277         }
 278         /* No device found, we have to create new shared context. */
 279         assert(spawn->max_port);
 280         sh = rte_zmalloc("ethdev shared ib context",
 281                          sizeof(struct mlx5_ibv_shared) +
 282                          spawn->max_port *
 283                          sizeof(struct mlx5_ibv_shared_port),
 284                          RTE_CACHE_LINE_SIZE);
 285         if (!sh) {
 286                 DRV_LOG(ERR, "shared context allocation failure");
 287                 rte_errno  = ENOMEM;
 288                 goto exit;
 289         }
 290         /* Try to open IB device with DV first, then usual Verbs. */
 291         errno = 0;
 292         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 293         if (sh->ctx) {
 294                 sh->devx = 1;
 295                 DRV_LOG(DEBUG, "DevX is supported");
 296         } else {
 297                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 298                 if (!sh->ctx) {
 299                         err = errno ? errno : ENODEV;
 300                         goto error;
 301                 }
 302                 DRV_LOG(DEBUG, "DevX is NOT supported");
 303         }
 304         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 305         if (err) {
 306                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 307                 goto error;
 308         }
 309         sh->refcnt = 1;
 310         sh->max_port = spawn->max_port;
 311         strncpy(sh->ibdev_name, sh->ctx->device->name,
 312                 sizeof(sh->ibdev_name));
 313         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 314                 sizeof(sh->ibdev_path));
 315         sh->pci_dev = spawn->pci_dev;
 316         pthread_mutex_init(&sh->intr_mutex, NULL);
 317         /*
 318          * Setting port_id to max unallowed value means
 319          * there is no interrupt subhandler installed for
 320          * the given port index i.
 321          */
 322         for (i = 0; i < sh->max_port; i++)
 323                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 324         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 325         if (sh->pd == NULL) {
 326                 DRV_LOG(ERR, "PD allocation failure");
 327                 err = ENOMEM;
 328                 goto error;
 329         }
 330         /*
 331          * Once the device is added to the list of memory event
 332          * callback, its global MR cache table cannot be expanded
 333          * on the fly because of deadlock. If it overflows, lookup
 334          * should be done by searching MR list linearly, which is slow.
 335          *
 336          * At this point the device is not added to the memory
 337          * event list yet, context is just being created.
 338          */
 339         err = mlx5_mr_btree_init(&sh->mr.cache,
 340                                  MLX5_MR_BTREE_CACHE_N * 2,
 341                                  sh->pci_dev->device.numa_node);
 342         if (err) {
 343                 err = rte_errno;
 344                 goto error;
 345         }
 346         mlx5_flow_counters_mng_init(sh);
 347         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 348 exit:
 349         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 350         return sh;
 351 error:
 352         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 353         assert(sh);
 354         if (sh->pd)
 355                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 356         if (sh->ctx)
 357                 claim_zero(mlx5_glue->close_device(sh->ctx));
 358         rte_free(sh);
 359         assert(err > 0);
 360         rte_errno = err;
 361         return NULL;
 362 }
 363
 364 /**
 365  * Free shared IB device context. Decrement counter and if zero free
 366  * all allocated resources and close handles.
 367  *
 368  * @param[in] sh
 369  *   Pointer to mlx5_ibv_shared object to free
 370  */
 371 static void
 372 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 373 {
 374         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 375 #ifndef NDEBUG
 376         /* Check the object presence in the list. */
 377         struct mlx5_ibv_shared *lctx;
 378
 379         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 380                 if (lctx == sh)
 381                         break;
 382         assert(lctx);
 383         if (lctx != sh) {
 384                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 385                 goto exit;
 386         }
 387 #endif
 388         assert(sh);
 389         assert(sh->refcnt);
 390         /* Secondary process should not free the shared context. */
 391         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 392         if (--sh->refcnt)
 393                 goto exit;
 394         /* Release created Memory Regions. */
 395         mlx5_mr_release(sh);
 396         LIST_REMOVE(sh, next);
 397         /*
 398          *  Ensure there is no async event handler installed.
 399          *  Only primary process handles async device events.
 400          **/
 401         mlx5_flow_counters_mng_close(sh);
 402         assert(!sh->intr_cnt);
 403         if (sh->intr_cnt)
 404                 mlx5_intr_callback_unregister
 405                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 406         pthread_mutex_destroy(&sh->intr_mutex);
 407         if (sh->pd)
 408                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 409         if (sh->ctx)
 410                 claim_zero(mlx5_glue->close_device(sh->ctx));
 411         rte_free(sh);
 412 exit:
 413         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 414 }
 415
 416 /**
 417  * Initialize DR related data within private structure.
 418  * Routine checks the reference counter and does actual
 419  * resources creation/initialization only if counter is zero.
 420  *
 421  * @param[in] priv
 422  *   Pointer to the private device data structure.
 423  *
 424  * @return
 425  *   Zero on success, positive error code otherwise.
 426  */
 427 static int
 428 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 429 {
 430 #ifdef HAVE_MLX5DV_DR
 431         struct mlx5_ibv_shared *sh = priv->sh;
 432         int err = 0;
 433         void *domain;
 434
 435         assert(sh);
 436         if (sh->dv_refcnt) {
 437                 /* Shared DV/DR structures is already initialized. */
 438                 sh->dv_refcnt++;
 439                 priv->dr_shared = 1;
 440                 return 0;
 441         }
 442         /* Reference counter is zero, we should initialize structures. */
 443         domain = mlx5_glue->dr_create_domain(sh->ctx,
 444                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 445         if (!domain) {
 446                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 447                 err = errno;
 448                 goto error;
 449         }
 450         sh->rx_domain = domain;
 451         domain = mlx5_glue->dr_create_domain(sh->ctx,
 452                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 453         if (!domain) {
 454                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 455                 err = errno;
 456                 goto error;
 457         }
 458         pthread_mutex_init(&sh->dv_mutex, NULL);
 459         sh->tx_domain = domain;
 460 #ifdef HAVE_MLX5DV_DR_ESWITCH
 461         if (priv->config.dv_esw_en) {
 462                 domain  = mlx5_glue->dr_create_domain
 463                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 464                 if (!domain) {
 465                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 466                         err = errno;
 467                         goto error;
 468                 }
 469                 sh->fdb_domain = domain;
 470                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 471         }
 472 #endif
 473         sh->dv_refcnt++;
 474         priv->dr_shared = 1;
 475         return 0;
 476
 477 error:
 478        /* Rollback the created objects. */
 479         if (sh->rx_domain) {
 480                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 481                 sh->rx_domain = NULL;
 482         }
 483         if (sh->tx_domain) {
 484                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 485                 sh->tx_domain = NULL;
 486         }
 487         if (sh->fdb_domain) {
 488                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 489                 sh->fdb_domain = NULL;
 490         }
 491         if (sh->esw_drop_action) {
 492                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 493                 sh->esw_drop_action = NULL;
 494         }
 495         return err;
 496 #else
 497         (void)priv;
 498         return 0;
 499 #endif
 500 }
 501
 502 /**
 503  * Destroy DR related data within private structure.
 504  *
 505  * @param[in] priv
 506  *   Pointer to the private device data structure.
 507  */
 508 static void
 509 mlx5_free_shared_dr(struct mlx5_priv *priv)
 510 {
 511 #ifdef HAVE_MLX5DV_DR
 512         struct mlx5_ibv_shared *sh;
 513
 514         if (!priv->dr_shared)
 515                 return;
 516         priv->dr_shared = 0;
 517         sh = priv->sh;
 518         assert(sh);
 519         assert(sh->dv_refcnt);
 520         if (sh->dv_refcnt && --sh->dv_refcnt)
 521                 return;
 522         if (sh->rx_domain) {
 523                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 524                 sh->rx_domain = NULL;
 525         }
 526         if (sh->tx_domain) {
 527                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 528                 sh->tx_domain = NULL;
 529         }
 530 #ifdef HAVE_MLX5DV_DR_ESWITCH
 531         if (sh->fdb_domain) {
 532                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 533                 sh->fdb_domain = NULL;
 534         }
 535         if (sh->esw_drop_action) {
 536                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 537                 sh->esw_drop_action = NULL;
 538         }
 539 #endif
 540         pthread_mutex_destroy(&sh->dv_mutex);
 541 #else
 542         (void)priv;
 543 #endif
 544 }
 545
 546 /**
 547  * Initialize shared data between primary and secondary process.
 548  *
 549  * A memzone is reserved by primary process and secondary processes attach to
 550  * the memzone.
 551  *
 552  * @return
 553  *   0 on success, a negative errno value otherwise and rte_errno is set.
 554  */
 555 static int
 556 mlx5_init_shared_data(void)
 557 {
 558         const struct rte_memzone *mz;
 559         int ret = 0;
 560
 561         rte_spinlock_lock(&mlx5_shared_data_lock);
 562         if (mlx5_shared_data == NULL) {
 563                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 564                         /* Allocate shared memory. */
 565                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 566                                                  sizeof(*mlx5_shared_data),
 567                                                  SOCKET_ID_ANY, 0);
 568                         if (mz == NULL) {
 569                                 DRV_LOG(ERR,
 570                                         "Cannot allocate mlx5 shared data\n");
 571                                 ret = -rte_errno;
 572                                 goto error;
 573                         }
 574                         mlx5_shared_data = mz->addr;
 575                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 576                         rte_spinlock_init(&mlx5_shared_data->lock);
 577                 } else {
 578                         /* Lookup allocated shared memory. */
 579                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 580                         if (mz == NULL) {
 581                                 DRV_LOG(ERR,
 582                                         "Cannot attach mlx5 shared data\n");
 583                                 ret = -rte_errno;
 584                                 goto error;
 585                         }
 586                         mlx5_shared_data = mz->addr;
 587                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 588                 }
 589         }
 590 error:
 591         rte_spinlock_unlock(&mlx5_shared_data_lock);
 592         return ret;
 593 }
 594
 595 /**
 596  * Retrieve integer value from environment variable.
 597  *
 598  * @param[in] name
 599  *   Environment variable name.
 600  *
 601  * @return
 602  *   Integer value, 0 if the variable is not set.
 603  */
 604 int
 605 mlx5_getenv_int(const char *name)
 606 {
 607         const char *val = getenv(name);
 608
 609         if (val == NULL)
 610                 return 0;
 611         return atoi(val);
 612 }
 613
 614 /**
 615  * Verbs callback to allocate a memory. This function should allocate the space
 616  * according to the size provided residing inside a huge page.
 617  * Please note that all allocation must respect the alignment from libmlx5
 618  * (i.e. currently sysconf(_SC_PAGESIZE)).
 619  *
 620  * @param[in] size
 621  *   The size in bytes of the memory to allocate.
 622  * @param[in] data
 623  *   A pointer to the callback data.
 624  *
 625  * @return
 626  *   Allocated buffer, NULL otherwise and rte_errno is set.
 627  */
 628 static void *
 629 mlx5_alloc_verbs_buf(size_t size, void *data)
 630 {
 631         struct mlx5_priv *priv = data;
 632         void *ret;
 633         size_t alignment = sysconf(_SC_PAGESIZE);
 634         unsigned int socket = SOCKET_ID_ANY;
 635
 636         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 637                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 638
 639                 socket = ctrl->socket;
 640         } else if (priv->verbs_alloc_ctx.type ==
 641                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 642                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 643
 644                 socket = ctrl->socket;
 645         }
 646         assert(data != NULL);
 647         ret = rte_malloc_socket(__func__, size, alignment, socket);
 648         if (!ret && size)
 649                 rte_errno = ENOMEM;
 650         return ret;
 651 }
 652
 653 /**
 654  * Verbs callback to free a memory.
 655  *
 656  * @param[in] ptr
 657  *   A pointer to the memory to free.
 658  * @param[in] data
 659  *   A pointer to the callback data.
 660  */
 661 static void
 662 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 663 {
 664         assert(data != NULL);
 665         rte_free(ptr);
 666 }
 667
 668 /**
 669  * Initialize process private data structure.
 670  *
 671  * @param dev
 672  *   Pointer to Ethernet device structure.
 673  *
 674  * @return
 675  *   0 on success, a negative errno value otherwise and rte_errno is set.
 676  */
 677 int
 678 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 679 {
 680         struct mlx5_priv *priv = dev->data->dev_private;
 681         struct mlx5_proc_priv *ppriv;
 682         size_t ppriv_size;
 683
 684         /*
 685          * UAR register table follows the process private structure. BlueFlame
 686          * registers for Tx queues are stored in the table.
 687          */
 688         ppriv_size =
 689                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 690         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 691                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 692         if (!ppriv) {
 693                 rte_errno = ENOMEM;
 694                 return -rte_errno;
 695         }
 696         ppriv->uar_table_sz = ppriv_size;
 697         dev->process_private = ppriv;
 698         return 0;
 699 }
 700
 701 /**
 702  * Un-initialize process private data structure.
 703  *
 704  * @param dev
 705  *   Pointer to Ethernet device structure.
 706  */
 707 static void
 708 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 709 {
 710         if (!dev->process_private)
 711                 return;
 712         rte_free(dev->process_private);
 713         dev->process_private = NULL;
 714 }
 715
 716 /**
 717  * DPDK callback to close the device.
 718  *
 719  * Destroy all queues and objects, free memory.
 720  *
 721  * @param dev
 722  *   Pointer to Ethernet device structure.
 723  */
 724 static void
 725 mlx5_dev_close(struct rte_eth_dev *dev)
 726 {
 727         struct mlx5_priv *priv = dev->data->dev_private;
 728         unsigned int i;
 729         int ret;
 730
 731         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 732                 dev->data->port_id,
 733                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 734         /* In case mlx5_dev_stop() has not been called. */
 735         mlx5_dev_interrupt_handler_uninstall(dev);
 736         mlx5_traffic_disable(dev);
 737         mlx5_flow_flush(dev, NULL);
 738         /* Prevent crashes when queues are still in use. */
 739         dev->rx_pkt_burst = removed_rx_burst;
 740         dev->tx_pkt_burst = removed_tx_burst;
 741         rte_wmb();
 742         /* Disable datapath on secondary process. */
 743         mlx5_mp_req_stop_rxtx(dev);
 744         if (priv->rxqs != NULL) {
 745                 /* XXX race condition if mlx5_rx_burst() is still running. */
 746                 usleep(1000);
 747                 for (i = 0; (i != priv->rxqs_n); ++i)
 748                         mlx5_rxq_release(dev, i);
 749                 priv->rxqs_n = 0;
 750                 priv->rxqs = NULL;
 751         }
 752         if (priv->txqs != NULL) {
 753                 /* XXX race condition if mlx5_tx_burst() is still running. */
 754                 usleep(1000);
 755                 for (i = 0; (i != priv->txqs_n); ++i)
 756                         mlx5_txq_release(dev, i);
 757                 priv->txqs_n = 0;
 758                 priv->txqs = NULL;
 759         }
 760         mlx5_proc_priv_uninit(dev);
 761         mlx5_mprq_free_mp(dev);
 762         /* Remove from memory callback device list. */
 763         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 764         assert(priv->sh);
 765         LIST_REMOVE(priv->sh, mem_event_cb);
 766         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 767         mlx5_free_shared_dr(priv);
 768         if (priv->rss_conf.rss_key != NULL)
 769                 rte_free(priv->rss_conf.rss_key);
 770         if (priv->reta_idx != NULL)
 771                 rte_free(priv->reta_idx);
 772         if (priv->config.vf)
 773                 mlx5_nl_mac_addr_flush(dev);
 774         if (priv->nl_socket_route >= 0)
 775                 close(priv->nl_socket_route);
 776         if (priv->nl_socket_rdma >= 0)
 777                 close(priv->nl_socket_rdma);
 778         if (priv->sh) {
 779                 /*
 780                  * Free the shared context in last turn, because the cleanup
 781                  * routines above may use some shared fields, like
 782                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 783                  * ifindex if Netlink fails.
 784                  */
 785                 mlx5_free_shared_ibctx(priv->sh);
 786                 priv->sh = NULL;
 787         }
 788         ret = mlx5_hrxq_ibv_verify(dev);
 789         if (ret)
 790                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 791                         dev->data->port_id);
 792         ret = mlx5_ind_table_ibv_verify(dev);
 793         if (ret)
 794                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 795                         dev->data->port_id);
 796         ret = mlx5_rxq_ibv_verify(dev);
 797         if (ret)
 798                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 799                         dev->data->port_id);
 800         ret = mlx5_rxq_verify(dev);
 801         if (ret)
 802                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 803                         dev->data->port_id);
 804         ret = mlx5_txq_ibv_verify(dev);
 805         if (ret)
 806                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 807                         dev->data->port_id);
 808         ret = mlx5_txq_verify(dev);
 809         if (ret)
 810                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 811                         dev->data->port_id);
 812         ret = mlx5_flow_verify(dev);
 813         if (ret)
 814                 DRV_LOG(WARNING, "port %u some flows still remain",
 815                         dev->data->port_id);
 816         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 817                 unsigned int c = 0;
 818                 uint16_t port_id;
 819
 820                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 821                         struct mlx5_priv *opriv =
 822                                 rte_eth_devices[port_id].data->dev_private;
 823
 824                         if (!opriv ||
 825                             opriv->domain_id != priv->domain_id ||
 826                             &rte_eth_devices[port_id] == dev)
 827                                 continue;
 828                         ++c;
 829                 }
 830                 if (!c)
 831                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 832         }
 833         memset(priv, 0, sizeof(*priv));
 834         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 835         /*
 836          * Reset mac_addrs to NULL such that it is not freed as part of
 837          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 838          * it is freed when dev_private is freed.
 839          */
 840         dev->data->mac_addrs = NULL;
 841 }
 842
 843 const struct eth_dev_ops mlx5_dev_ops = {
 844         .dev_configure = mlx5_dev_configure,
 845         .dev_start = mlx5_dev_start,
 846         .dev_stop = mlx5_dev_stop,
 847         .dev_set_link_down = mlx5_set_link_down,
 848         .dev_set_link_up = mlx5_set_link_up,
 849         .dev_close = mlx5_dev_close,
 850         .promiscuous_enable = mlx5_promiscuous_enable,
 851         .promiscuous_disable = mlx5_promiscuous_disable,
 852         .allmulticast_enable = mlx5_allmulticast_enable,
 853         .allmulticast_disable = mlx5_allmulticast_disable,
 854         .link_update = mlx5_link_update,
 855         .stats_get = mlx5_stats_get,
 856         .stats_reset = mlx5_stats_reset,
 857         .xstats_get = mlx5_xstats_get,
 858         .xstats_reset = mlx5_xstats_reset,
 859         .xstats_get_names = mlx5_xstats_get_names,
 860         .fw_version_get = mlx5_fw_version_get,
 861         .dev_infos_get = mlx5_dev_infos_get,
 862         .read_clock = mlx5_read_clock,
 863         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 864         .vlan_filter_set = mlx5_vlan_filter_set,
 865         .rx_queue_setup = mlx5_rx_queue_setup,
 866         .tx_queue_setup = mlx5_tx_queue_setup,
 867         .rx_queue_release = mlx5_rx_queue_release,
 868         .tx_queue_release = mlx5_tx_queue_release,
 869         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 870         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 871         .mac_addr_remove = mlx5_mac_addr_remove,
 872         .mac_addr_add = mlx5_mac_addr_add,
 873         .mac_addr_set = mlx5_mac_addr_set,
 874         .set_mc_addr_list = mlx5_set_mc_addr_list,
 875         .mtu_set = mlx5_dev_set_mtu,
 876         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 877         .vlan_offload_set = mlx5_vlan_offload_set,
 878         .reta_update = mlx5_dev_rss_reta_update,
 879         .reta_query = mlx5_dev_rss_reta_query,
 880         .rss_hash_update = mlx5_rss_hash_update,
 881         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 882         .filter_ctrl = mlx5_dev_filter_ctrl,
 883         .rx_descriptor_status = mlx5_rx_descriptor_status,
 884         .tx_descriptor_status = mlx5_tx_descriptor_status,
 885         .rx_queue_count = mlx5_rx_queue_count,
 886         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 887         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 888         .is_removed = mlx5_is_removed,
 889 };
 890
 891 /* Available operations from secondary process. */
 892 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 893         .stats_get = mlx5_stats_get,
 894         .stats_reset = mlx5_stats_reset,
 895         .xstats_get = mlx5_xstats_get,
 896         .xstats_reset = mlx5_xstats_reset,
 897         .xstats_get_names = mlx5_xstats_get_names,
 898         .fw_version_get = mlx5_fw_version_get,
 899         .dev_infos_get = mlx5_dev_infos_get,
 900         .rx_descriptor_status = mlx5_rx_descriptor_status,
 901         .tx_descriptor_status = mlx5_tx_descriptor_status,
 902 };
 903
 904 /* Available operations in flow isolated mode. */
 905 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 906         .dev_configure = mlx5_dev_configure,
 907         .dev_start = mlx5_dev_start,
 908         .dev_stop = mlx5_dev_stop,
 909         .dev_set_link_down = mlx5_set_link_down,
 910         .dev_set_link_up = mlx5_set_link_up,
 911         .dev_close = mlx5_dev_close,
 912         .promiscuous_enable = mlx5_promiscuous_enable,
 913         .promiscuous_disable = mlx5_promiscuous_disable,
 914         .allmulticast_enable = mlx5_allmulticast_enable,
 915         .allmulticast_disable = mlx5_allmulticast_disable,
 916         .link_update = mlx5_link_update,
 917         .stats_get = mlx5_stats_get,
 918         .stats_reset = mlx5_stats_reset,
 919         .xstats_get = mlx5_xstats_get,
 920         .xstats_reset = mlx5_xstats_reset,
 921         .xstats_get_names = mlx5_xstats_get_names,
 922         .fw_version_get = mlx5_fw_version_get,
 923         .dev_infos_get = mlx5_dev_infos_get,
 924         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 925         .vlan_filter_set = mlx5_vlan_filter_set,
 926         .rx_queue_setup = mlx5_rx_queue_setup,
 927         .tx_queue_setup = mlx5_tx_queue_setup,
 928         .rx_queue_release = mlx5_rx_queue_release,
 929         .tx_queue_release = mlx5_tx_queue_release,
 930         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 931         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 932         .mac_addr_remove = mlx5_mac_addr_remove,
 933         .mac_addr_add = mlx5_mac_addr_add,
 934         .mac_addr_set = mlx5_mac_addr_set,
 935         .set_mc_addr_list = mlx5_set_mc_addr_list,
 936         .mtu_set = mlx5_dev_set_mtu,
 937         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 938         .vlan_offload_set = mlx5_vlan_offload_set,
 939         .filter_ctrl = mlx5_dev_filter_ctrl,
 940         .rx_descriptor_status = mlx5_rx_descriptor_status,
 941         .tx_descriptor_status = mlx5_tx_descriptor_status,
 942         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 943         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 944         .is_removed = mlx5_is_removed,
 945 };
 946
 947 /**
 948  * Verify and store value for device argument.
 949  *
 950  * @param[in] key
 951  *   Key argument to verify.
 952  * @param[in] val
 953  *   Value associated with key.
 954  * @param opaque
 955  *   User data.
 956  *
 957  * @return
 958  *   0 on success, a negative errno value otherwise and rte_errno is set.
 959  */
 960 static int
 961 mlx5_args_check(const char *key, const char *val, void *opaque)
 962 {
 963         struct mlx5_dev_config *config = opaque;
 964         unsigned long tmp;
 965
 966         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 967         if (!strcmp(MLX5_REPRESENTOR, key))
 968                 return 0;
 969         errno = 0;
 970         tmp = strtoul(val, NULL, 0);
 971         if (errno) {
 972                 rte_errno = errno;
 973                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 974                 return -rte_errno;
 975         }
 976         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 977                 config->cqe_comp = !!tmp;
 978         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 979                 config->cqe_pad = !!tmp;
 980         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 981                 config->hw_padding = !!tmp;
 982         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 983                 config->mprq.enabled = !!tmp;
 984         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 985                 config->mprq.stride_num_n = tmp;
 986         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 987                 config->mprq.max_memcpy_len = tmp;
 988         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 989                 config->mprq.min_rxqs_num = tmp;
 990         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 991                 config->txq_inline = tmp;
 992         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 993                 config->txqs_inline = tmp;
 994         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 995                 config->txqs_vec = tmp;
 996         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 997                 config->mps = !!tmp;
 998         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 999                 config->mpw_hdr_dseg = !!tmp;
1000         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1001                 config->inline_max_packet_sz = tmp;
1002         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1003                 config->tx_vec_en = !!tmp;
1004         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1005                 config->rx_vec_en = !!tmp;
1006         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1007                 config->l3_vxlan_en = !!tmp;
1008         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1009                 config->vf_nl_en = !!tmp;
1010         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1011                 config->dv_esw_en = !!tmp;
1012         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1013                 config->dv_flow_en = !!tmp;
1014         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1015                 config->mr_ext_memseg_en = !!tmp;
1016         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1017                 config->max_dump_files_num = tmp;
1018         } else {
1019                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1020                 rte_errno = EINVAL;
1021                 return -rte_errno;
1022         }
1023         return 0;
1024 }
1025
1026 /**
1027  * Parse device parameters.
1028  *
1029  * @param config
1030  *   Pointer to device configuration structure.
1031  * @param devargs
1032  *   Device arguments structure.
1033  *
1034  * @return
1035  *   0 on success, a negative errno value otherwise and rte_errno is set.
1036  */
1037 static int
1038 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1039 {
1040         const char **params = (const char *[]){
1041                 MLX5_RXQ_CQE_COMP_EN,
1042                 MLX5_RXQ_CQE_PAD_EN,
1043                 MLX5_RXQ_PKT_PAD_EN,
1044                 MLX5_RX_MPRQ_EN,
1045                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1046                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1047                 MLX5_RXQS_MIN_MPRQ,
1048                 MLX5_TXQ_INLINE,
1049                 MLX5_TXQS_MIN_INLINE,
1050                 MLX5_TXQS_MAX_VEC,
1051                 MLX5_TXQ_MPW_EN,
1052                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1053                 MLX5_TXQ_MAX_INLINE_LEN,
1054                 MLX5_TX_VEC_EN,
1055                 MLX5_RX_VEC_EN,
1056                 MLX5_L3_VXLAN_EN,
1057                 MLX5_VF_NL_EN,
1058                 MLX5_DV_ESW_EN,
1059                 MLX5_DV_FLOW_EN,
1060                 MLX5_MR_EXT_MEMSEG_EN,
1061                 MLX5_REPRESENTOR,
1062                 MLX5_MAX_DUMP_FILES_NUM,
1063                 NULL,
1064         };
1065         struct rte_kvargs *kvlist;
1066         int ret = 0;
1067         int i;
1068
1069         if (devargs == NULL)
1070                 return 0;
1071         /* Following UGLY cast is done to pass checkpatch. */
1072         kvlist = rte_kvargs_parse(devargs->args, params);
1073         if (kvlist == NULL) {
1074                 rte_errno = EINVAL;
1075                 return -rte_errno;
1076         }
1077         /* Process parameters. */
1078         for (i = 0; (params[i] != NULL); ++i) {
1079                 if (rte_kvargs_count(kvlist, params[i])) {
1080                         ret = rte_kvargs_process(kvlist, params[i],
1081                                                  mlx5_args_check, config);
1082                         if (ret) {
1083                                 rte_errno = EINVAL;
1084                                 rte_kvargs_free(kvlist);
1085                                 return -rte_errno;
1086                         }
1087                 }
1088         }
1089         rte_kvargs_free(kvlist);
1090         return 0;
1091 }
1092
1093 static struct rte_pci_driver mlx5_driver;
1094
1095 /**
1096  * PMD global initialization.
1097  *
1098  * Independent from individual device, this function initializes global
1099  * per-PMD data structures distinguishing primary and secondary processes.
1100  * Hence, each initialization is called once per a process.
1101  *
1102  * @return
1103  *   0 on success, a negative errno value otherwise and rte_errno is set.
1104  */
1105 static int
1106 mlx5_init_once(void)
1107 {
1108         struct mlx5_shared_data *sd;
1109         struct mlx5_local_data *ld = &mlx5_local_data;
1110         int ret = 0;
1111
1112         if (mlx5_init_shared_data())
1113                 return -rte_errno;
1114         sd = mlx5_shared_data;
1115         assert(sd);
1116         rte_spinlock_lock(&sd->lock);
1117         switch (rte_eal_process_type()) {
1118         case RTE_PROC_PRIMARY:
1119                 if (sd->init_done)
1120                         break;
1121                 LIST_INIT(&sd->mem_event_cb_list);
1122                 rte_rwlock_init(&sd->mem_event_rwlock);
1123                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1124                                                 mlx5_mr_mem_event_cb, NULL);
1125                 ret = mlx5_mp_init_primary();
1126                 if (ret)
1127                         goto out;
1128                 sd->init_done = true;
1129                 break;
1130         case RTE_PROC_SECONDARY:
1131                 if (ld->init_done)
1132                         break;
1133                 ret = mlx5_mp_init_secondary();
1134                 if (ret)
1135                         goto out;
1136                 ++sd->secondary_cnt;
1137                 ld->init_done = true;
1138                 break;
1139         default:
1140                 break;
1141         }
1142 out:
1143         rte_spinlock_unlock(&sd->lock);
1144         return ret;
1145 }
1146
1147 /**
1148  * Spawn an Ethernet device from Verbs information.
1149  *
1150  * @param dpdk_dev
1151  *   Backing DPDK device.
1152  * @param spawn
1153  *   Verbs device parameters (name, port, switch_info) to spawn.
1154  * @param config
1155  *   Device configuration parameters.
1156  *
1157  * @return
1158  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1159  *   is set. The following errors are defined:
1160  *
1161  *   EBUSY: device is not supposed to be spawned.
1162  *   EEXIST: device is already spawned
1163  */
1164 static struct rte_eth_dev *
1165 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1166                struct mlx5_dev_spawn_data *spawn,
1167                struct mlx5_dev_config config)
1168 {
1169         const struct mlx5_switch_info *switch_info = &spawn->info;
1170         struct mlx5_ibv_shared *sh = NULL;
1171         struct ibv_port_attr port_attr;
1172         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1173         struct rte_eth_dev *eth_dev = NULL;
1174         struct mlx5_priv *priv = NULL;
1175         int err = 0;
1176         unsigned int hw_padding = 0;
1177         unsigned int mps;
1178         unsigned int cqe_comp;
1179         unsigned int cqe_pad = 0;
1180         unsigned int tunnel_en = 0;
1181         unsigned int mpls_en = 0;
1182         unsigned int swp = 0;
1183         unsigned int mprq = 0;
1184         unsigned int mprq_min_stride_size_n = 0;
1185         unsigned int mprq_max_stride_size_n = 0;
1186         unsigned int mprq_min_stride_num_n = 0;
1187         unsigned int mprq_max_stride_num_n = 0;
1188         struct rte_ether_addr mac;
1189         char name[RTE_ETH_NAME_MAX_LEN];
1190         int own_domain_id = 0;
1191         uint16_t port_id;
1192         unsigned int i;
1193
1194         /* Determine if this port representor is supposed to be spawned. */
1195         if (switch_info->representor && dpdk_dev->devargs) {
1196                 struct rte_eth_devargs eth_da;
1197
1198                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1199                 if (err) {
1200                         rte_errno = -err;
1201                         DRV_LOG(ERR, "failed to process device arguments: %s",
1202                                 strerror(rte_errno));
1203                         return NULL;
1204                 }
1205                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1206                         if (eth_da.representor_ports[i] ==
1207                             (uint16_t)switch_info->port_name)
1208                                 break;
1209                 if (i == eth_da.nb_representor_ports) {
1210                         rte_errno = EBUSY;
1211                         return NULL;
1212                 }
1213         }
1214         /* Build device name. */
1215         if (!switch_info->representor)
1216                 strlcpy(name, dpdk_dev->name, sizeof(name));
1217         else
1218                 snprintf(name, sizeof(name), "%s_representor_%u",
1219                          dpdk_dev->name, switch_info->port_name);
1220         /* check if the device is already spawned */
1221         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1222                 rte_errno = EEXIST;
1223                 return NULL;
1224         }
1225         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1226         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1227                 eth_dev = rte_eth_dev_attach_secondary(name);
1228                 if (eth_dev == NULL) {
1229                         DRV_LOG(ERR, "can not attach rte ethdev");
1230                         rte_errno = ENOMEM;
1231                         return NULL;
1232                 }
1233                 eth_dev->device = dpdk_dev;
1234                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1235                 err = mlx5_proc_priv_init(eth_dev);
1236                 if (err)
1237                         return NULL;
1238                 /* Receive command fd from primary process */
1239                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1240                 if (err < 0)
1241                         return NULL;
1242                 /* Remap UAR for Tx queues. */
1243                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1244                 if (err)
1245                         return NULL;
1246                 /*
1247                  * Ethdev pointer is still required as input since
1248                  * the primary device is not accessible from the
1249                  * secondary process.
1250                  */
1251                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1252                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1253                 return eth_dev;
1254         }
1255         sh = mlx5_alloc_shared_ibctx(spawn);
1256         if (!sh)
1257                 return NULL;
1258         config.devx = sh->devx;
1259 #ifdef HAVE_IBV_MLX5_MOD_SWP
1260         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1261 #endif
1262         /*
1263          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1264          * as all ConnectX-5 devices.
1265          */
1266 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1267         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1268 #endif
1269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1270         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1271 #endif
1272         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1273         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1274                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1275                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1276                         mps = MLX5_MPW_ENHANCED;
1277                 } else {
1278                         DRV_LOG(DEBUG, "MPW is supported");
1279                         mps = MLX5_MPW;
1280                 }
1281         } else {
1282                 DRV_LOG(DEBUG, "MPW isn't supported");
1283                 mps = MLX5_MPW_DISABLED;
1284         }
1285 #ifdef HAVE_IBV_MLX5_MOD_SWP
1286         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1287                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1288         DRV_LOG(DEBUG, "SWP support: %u", swp);
1289 #endif
1290         config.swp = !!swp;
1291 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1292         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1293                 struct mlx5dv_striding_rq_caps mprq_caps =
1294                         dv_attr.striding_rq_caps;
1295
1296                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1297                         mprq_caps.min_single_stride_log_num_of_bytes);
1298                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1299                         mprq_caps.max_single_stride_log_num_of_bytes);
1300                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1301                         mprq_caps.min_single_wqe_log_num_of_strides);
1302                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1303                         mprq_caps.max_single_wqe_log_num_of_strides);
1304                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1305                         mprq_caps.supported_qpts);
1306                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1307                 mprq = 1;
1308                 mprq_min_stride_size_n =
1309                         mprq_caps.min_single_stride_log_num_of_bytes;
1310                 mprq_max_stride_size_n =
1311                         mprq_caps.max_single_stride_log_num_of_bytes;
1312                 mprq_min_stride_num_n =
1313                         mprq_caps.min_single_wqe_log_num_of_strides;
1314                 mprq_max_stride_num_n =
1315                         mprq_caps.max_single_wqe_log_num_of_strides;
1316                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1317                                                    mprq_min_stride_num_n);
1318         }
1319 #endif
1320         if (RTE_CACHE_LINE_SIZE == 128 &&
1321             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1322                 cqe_comp = 0;
1323         else
1324                 cqe_comp = 1;
1325         config.cqe_comp = cqe_comp;
1326 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1327         /* Whether device supports 128B Rx CQE padding. */
1328         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1329                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1330 #endif
1331 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1332         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1333                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1334                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1335                              (dv_attr.tunnel_offloads_caps &
1336                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1337         }
1338         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1339                 tunnel_en ? "" : "not ");
1340 #else
1341         DRV_LOG(WARNING,
1342                 "tunnel offloading disabled due to old OFED/rdma-core version");
1343 #endif
1344         config.tunnel_en = tunnel_en;
1345 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1346         mpls_en = ((dv_attr.tunnel_offloads_caps &
1347                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1348                    (dv_attr.tunnel_offloads_caps &
1349                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1350         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1351                 mpls_en ? "" : "not ");
1352 #else
1353         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1354                 " old OFED/rdma-core version or firmware configuration");
1355 #endif
1356         config.mpls_en = mpls_en;
1357         /* Check port status. */
1358         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1359         if (err) {
1360                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1361                 goto error;
1362         }
1363         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1364                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1365                 err = EINVAL;
1366                 goto error;
1367         }
1368         if (port_attr.state != IBV_PORT_ACTIVE)
1369                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1370                         mlx5_glue->port_state_str(port_attr.state),
1371                         port_attr.state);
1372         /* Allocate private eth device data. */
1373         priv = rte_zmalloc("ethdev private structure",
1374                            sizeof(*priv),
1375                            RTE_CACHE_LINE_SIZE);
1376         if (priv == NULL) {
1377                 DRV_LOG(ERR, "priv allocation failure");
1378                 err = ENOMEM;
1379                 goto error;
1380         }
1381         priv->sh = sh;
1382         priv->ibv_port = spawn->ibv_port;
1383         priv->mtu = RTE_ETHER_MTU;
1384 #ifndef RTE_ARCH_64
1385         /* Initialize UAR access locks for 32bit implementations. */
1386         rte_spinlock_init(&priv->uar_lock_cq);
1387         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1388                 rte_spinlock_init(&priv->uar_lock[i]);
1389 #endif
1390         /* Some internal functions rely on Netlink sockets, open them now. */
1391         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1392         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1393         priv->nl_sn = 0;
1394         priv->representor = !!switch_info->representor;
1395         priv->master = !!switch_info->master;
1396         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1397         /*
1398          * Currently we support single E-Switch per PF configurations
1399          * only and vport_id field contains the vport index for
1400          * associated VF, which is deduced from representor port name.
1401          * For example, let's have the IB device port 10, it has
1402          * attached network device eth0, which has port name attribute
1403          * pf0vf2, we can deduce the VF number as 2, and set vport index
1404          * as 3 (2+1). This assigning schema should be changed if the
1405          * multiple E-Switch instances per PF configurations or/and PCI
1406          * subfunctions are added.
1407          */
1408         priv->vport_id = switch_info->representor ?
1409                          switch_info->port_name + 1 : -1;
1410         /* representor_id field keeps the unmodified port/VF index. */
1411         priv->representor_id = switch_info->representor ?
1412                                switch_info->port_name : -1;
1413         /*
1414          * Look for sibling devices in order to reuse their switch domain
1415          * if any, otherwise allocate one.
1416          */
1417         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1418                 const struct mlx5_priv *opriv =
1419                         rte_eth_devices[port_id].data->dev_private;
1420
1421                 if (!opriv ||
1422                         opriv->domain_id ==
1423                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1424                         continue;
1425                 priv->domain_id = opriv->domain_id;
1426                 break;
1427         }
1428         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1429                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1430                 if (err) {
1431                         err = rte_errno;
1432                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1433                                 strerror(rte_errno));
1434                         goto error;
1435                 }
1436                 own_domain_id = 1;
1437         }
1438         err = mlx5_args(&config, dpdk_dev->devargs);
1439         if (err) {
1440                 err = rte_errno;
1441                 DRV_LOG(ERR, "failed to process device arguments: %s",
1442                         strerror(rte_errno));
1443                 goto error;
1444         }
1445         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1446                             IBV_DEVICE_RAW_IP_CSUM);
1447         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1448                 (config.hw_csum ? "" : "not "));
1449 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1450         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1451         DRV_LOG(DEBUG, "counters are not supported");
1452 #endif
1453 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1454         if (config.dv_flow_en) {
1455                 DRV_LOG(WARNING, "DV flow is not supported");
1456                 config.dv_flow_en = 0;
1457         }
1458 #endif
1459         config.ind_table_max_size =
1460                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1461         /*
1462          * Remove this check once DPDK supports larger/variable
1463          * indirection tables.
1464          */
1465         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1466                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1467         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1468                 config.ind_table_max_size);
1469         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1470                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1471         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1472                 (config.hw_vlan_strip ? "" : "not "));
1473         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1474                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1475         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1476                 (config.hw_fcs_strip ? "" : "not "));
1477 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1478         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1479 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1480         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1481                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1482 #endif
1483         if (config.hw_padding && !hw_padding) {
1484                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1485                 config.hw_padding = 0;
1486         } else if (config.hw_padding) {
1487                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1488         }
1489         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1490                       (sh->device_attr.tso_caps.supported_qpts &
1491                        (1 << IBV_QPT_RAW_PACKET)));
1492         if (config.tso)
1493                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1494         /*
1495          * MPW is disabled by default, while the Enhanced MPW is enabled
1496          * by default.
1497          */
1498         if (config.mps == MLX5_ARG_UNSET)
1499                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1500                                                           MLX5_MPW_DISABLED;
1501         else
1502                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1503         DRV_LOG(INFO, "%sMPS is %s",
1504                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1505                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1506         if (config.cqe_comp && !cqe_comp) {
1507                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1508                 config.cqe_comp = 0;
1509         }
1510         if (config.cqe_pad && !cqe_pad) {
1511                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1512                 config.cqe_pad = 0;
1513         } else if (config.cqe_pad) {
1514                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1515         }
1516         if (config.mprq.enabled && mprq) {
1517                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1518                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1519                         config.mprq.stride_num_n =
1520                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1521                                         mprq_min_stride_num_n);
1522                         DRV_LOG(WARNING,
1523                                 "the number of strides"
1524                                 " for Multi-Packet RQ is out of range,"
1525                                 " setting default value (%u)",
1526                                 1 << config.mprq.stride_num_n);
1527                 }
1528                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1529                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1530         } else if (config.mprq.enabled && !mprq) {
1531                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1532                 config.mprq.enabled = 0;
1533         }
1534         if (config.max_dump_files_num == 0)
1535                 config.max_dump_files_num = 128;
1536         eth_dev = rte_eth_dev_allocate(name);
1537         if (eth_dev == NULL) {
1538                 DRV_LOG(ERR, "can not allocate rte ethdev");
1539                 err = ENOMEM;
1540                 goto error;
1541         }
1542         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1543         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1544         if (priv->representor) {
1545                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1546                 eth_dev->data->representor_id = priv->representor_id;
1547         }
1548         eth_dev->data->dev_private = priv;
1549         priv->dev_data = eth_dev->data;
1550         eth_dev->data->mac_addrs = priv->mac;
1551         eth_dev->device = dpdk_dev;
1552         /* Configure the first MAC address by default. */
1553         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1554                 DRV_LOG(ERR,
1555                         "port %u cannot get MAC address, is mlx5_en"
1556                         " loaded? (errno: %s)",
1557                         eth_dev->data->port_id, strerror(rte_errno));
1558                 err = ENODEV;
1559                 goto error;
1560         }
1561         DRV_LOG(INFO,
1562                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1563                 eth_dev->data->port_id,
1564                 mac.addr_bytes[0], mac.addr_bytes[1],
1565                 mac.addr_bytes[2], mac.addr_bytes[3],
1566                 mac.addr_bytes[4], mac.addr_bytes[5]);
1567 #ifndef NDEBUG
1568         {
1569                 char ifname[IF_NAMESIZE];
1570
1571                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1572                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1573                                 eth_dev->data->port_id, ifname);
1574                 else
1575                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1576                                 eth_dev->data->port_id);
1577         }
1578 #endif
1579         /* Get actual MTU if possible. */
1580         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1581         if (err) {
1582                 err = rte_errno;
1583                 goto error;
1584         }
1585         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1586                 priv->mtu);
1587         /* Initialize burst functions to prevent crashes before link-up. */
1588         eth_dev->rx_pkt_burst = removed_rx_burst;
1589         eth_dev->tx_pkt_burst = removed_tx_burst;
1590         eth_dev->dev_ops = &mlx5_dev_ops;
1591         /* Register MAC address. */
1592         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1593         if (config.vf && config.vf_nl_en)
1594                 mlx5_nl_mac_addr_sync(eth_dev);
1595         TAILQ_INIT(&priv->flows);
1596         TAILQ_INIT(&priv->ctrl_flows);
1597         /* Hint libmlx5 to use PMD allocator for data plane resources */
1598         struct mlx5dv_ctx_allocators alctr = {
1599                 .alloc = &mlx5_alloc_verbs_buf,
1600                 .free = &mlx5_free_verbs_buf,
1601                 .data = priv,
1602         };
1603         mlx5_glue->dv_set_context_attr(sh->ctx,
1604                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1605                                        (void *)((uintptr_t)&alctr));
1606         /* Bring Ethernet device up. */
1607         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1608                 eth_dev->data->port_id);
1609         mlx5_set_link_up(eth_dev);
1610         /*
1611          * Even though the interrupt handler is not installed yet,
1612          * interrupts will still trigger on the async_fd from
1613          * Verbs context returned by ibv_open_device().
1614          */
1615         mlx5_link_update(eth_dev, 0);
1616 #ifdef HAVE_IBV_DEVX_OBJ
1617         if (config.devx) {
1618                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1619                 if (err) {
1620                         err = -err;
1621                         goto error;
1622                 }
1623         }
1624 #endif
1625 #ifdef HAVE_MLX5DV_DR_ESWITCH
1626         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1627               (switch_info->representor || switch_info->master)))
1628                 config.dv_esw_en = 0;
1629 #else
1630         config.dv_esw_en = 0;
1631 #endif
1632         /* Store device configuration on private structure. */
1633         priv->config = config;
1634         if (config.dv_flow_en) {
1635                 err = mlx5_alloc_shared_dr(priv);
1636                 if (err)
1637                         goto error;
1638         }
1639         /* Supported Verbs flow priority number detection. */
1640         err = mlx5_flow_discover_priorities(eth_dev);
1641         if (err < 0) {
1642                 err = -err;
1643                 goto error;
1644         }
1645         priv->config.flow_prio = err;
1646         /* Add device to memory callback list. */
1647         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1648         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1649                          sh, mem_event_cb);
1650         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1651         return eth_dev;
1652 error:
1653         if (priv) {
1654                 if (priv->sh)
1655                         mlx5_free_shared_dr(priv);
1656                 if (priv->nl_socket_route >= 0)
1657                         close(priv->nl_socket_route);
1658                 if (priv->nl_socket_rdma >= 0)
1659                         close(priv->nl_socket_rdma);
1660                 if (own_domain_id)
1661                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1662                 rte_free(priv);
1663                 if (eth_dev != NULL)
1664                         eth_dev->data->dev_private = NULL;
1665         }
1666         if (eth_dev != NULL) {
1667                 /* mac_addrs must not be freed alone because part of dev_private */
1668                 eth_dev->data->mac_addrs = NULL;
1669                 rte_eth_dev_release_port(eth_dev);
1670         }
1671         if (sh)
1672                 mlx5_free_shared_ibctx(sh);
1673         assert(err > 0);
1674         rte_errno = err;
1675         return NULL;
1676 }
1677
1678 /**
1679  * Comparison callback to sort device data.
1680  *
1681  * This is meant to be used with qsort().
1682  *
1683  * @param a[in]
1684  *   Pointer to pointer to first data object.
1685  * @param b[in]
1686  *   Pointer to pointer to second data object.
1687  *
1688  * @return
1689  *   0 if both objects are equal, less than 0 if the first argument is less
1690  *   than the second, greater than 0 otherwise.
1691  */
1692 static int
1693 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1694 {
1695         const struct mlx5_switch_info *si_a =
1696                 &((const struct mlx5_dev_spawn_data *)a)->info;
1697         const struct mlx5_switch_info *si_b =
1698                 &((const struct mlx5_dev_spawn_data *)b)->info;
1699         int ret;
1700
1701         /* Master device first. */
1702         ret = si_b->master - si_a->master;
1703         if (ret)
1704                 return ret;
1705         /* Then representor devices. */
1706         ret = si_b->representor - si_a->representor;
1707         if (ret)
1708                 return ret;
1709         /* Unidentified devices come last in no specific order. */
1710         if (!si_a->representor)
1711                 return 0;
1712         /* Order representors by name. */
1713         return si_a->port_name - si_b->port_name;
1714 }
1715
1716 /**
1717  * DPDK callback to register a PCI device.
1718  *
1719  * This function spawns Ethernet devices out of a given PCI device.
1720  *
1721  * @param[in] pci_drv
1722  *   PCI driver structure (mlx5_driver).
1723  * @param[in] pci_dev
1724  *   PCI device information.
1725  *
1726  * @return
1727  *   0 on success, a negative errno value otherwise and rte_errno is set.
1728  */
1729 static int
1730 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1731                struct rte_pci_device *pci_dev)
1732 {
1733         struct ibv_device **ibv_list;
1734         /*
1735          * Number of found IB Devices matching with requested PCI BDF.
1736          * nd != 1 means there are multiple IB devices over the same
1737          * PCI device and we have representors and master.
1738          */
1739         unsigned int nd = 0;
1740         /*
1741          * Number of found IB device Ports. nd = 1 and np = 1..n means
1742          * we have the single multiport IB device, and there may be
1743          * representors attached to some of found ports.
1744          */
1745         unsigned int np = 0;
1746         /*
1747          * Number of DPDK ethernet devices to Spawn - either over
1748          * multiple IB devices or multiple ports of single IB device.
1749          * Actually this is the number of iterations to spawn.
1750          */
1751         unsigned int ns = 0;
1752         struct mlx5_dev_config dev_config;
1753         int ret;
1754
1755         ret = mlx5_init_once();
1756         if (ret) {
1757                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1758                         strerror(rte_errno));
1759                 return -rte_errno;
1760         }
1761         assert(pci_drv == &mlx5_driver);
1762         errno = 0;
1763         ibv_list = mlx5_glue->get_device_list(&ret);
1764         if (!ibv_list) {
1765                 rte_errno = errno ? errno : ENOSYS;
1766                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1767                 return -rte_errno;
1768         }
1769         /*
1770          * First scan the list of all Infiniband devices to find
1771          * matching ones, gathering into the list.
1772          */
1773         struct ibv_device *ibv_match[ret + 1];
1774         int nl_route = -1;
1775         int nl_rdma = -1;
1776         unsigned int i;
1777
1778         while (ret-- > 0) {
1779                 struct rte_pci_addr pci_addr;
1780
1781                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1782                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1783                         continue;
1784                 if (pci_dev->addr.domain != pci_addr.domain ||
1785                     pci_dev->addr.bus != pci_addr.bus ||
1786                     pci_dev->addr.devid != pci_addr.devid ||
1787                     pci_dev->addr.function != pci_addr.function)
1788                         continue;
1789                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1790                         ibv_list[ret]->name);
1791                 ibv_match[nd++] = ibv_list[ret];
1792         }
1793         ibv_match[nd] = NULL;
1794         if (!nd) {
1795                 /* No device matches, just complain and bail out. */
1796                 mlx5_glue->free_device_list(ibv_list);
1797                 DRV_LOG(WARNING,
1798                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1799                         " are kernel drivers loaded?",
1800                         pci_dev->addr.domain, pci_dev->addr.bus,
1801                         pci_dev->addr.devid, pci_dev->addr.function);
1802                 rte_errno = ENOENT;
1803                 ret = -rte_errno;
1804                 return ret;
1805         }
1806         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1807         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1808         if (nd == 1) {
1809                 /*
1810                  * Found single matching device may have multiple ports.
1811                  * Each port may be representor, we have to check the port
1812                  * number and check the representors existence.
1813                  */
1814                 if (nl_rdma >= 0)
1815                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1816                 if (!np)
1817                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1818                                          " ports number", ibv_match[0]->name);
1819         }
1820         /*
1821          * Now we can determine the maximal
1822          * amount of devices to be spawned.
1823          */
1824         struct mlx5_dev_spawn_data list[np ? np : nd];
1825
1826         if (np > 1) {
1827                 /*
1828                  * Single IB device with multiple ports found,
1829                  * it may be E-Switch master device and representors.
1830                  * We have to perform identification trough the ports.
1831                  */
1832                 assert(nl_rdma >= 0);
1833                 assert(ns == 0);
1834                 assert(nd == 1);
1835                 for (i = 1; i <= np; ++i) {
1836                         list[ns].max_port = np;
1837                         list[ns].ibv_port = i;
1838                         list[ns].ibv_dev = ibv_match[0];
1839                         list[ns].eth_dev = NULL;
1840                         list[ns].pci_dev = pci_dev;
1841                         list[ns].ifindex = mlx5_nl_ifindex
1842                                         (nl_rdma, list[ns].ibv_dev->name, i);
1843                         if (!list[ns].ifindex) {
1844                                 /*
1845                                  * No network interface index found for the
1846                                  * specified port, it means there is no
1847                                  * representor on this port. It's OK,
1848                                  * there can be disabled ports, for example
1849                                  * if sriov_numvfs < sriov_totalvfs.
1850                                  */
1851                                 continue;
1852                         }
1853                         ret = -1;
1854                         if (nl_route >= 0)
1855                                 ret = mlx5_nl_switch_info
1856                                                (nl_route,
1857                                                 list[ns].ifindex,
1858                                                 &list[ns].info);
1859                         if (ret || (!list[ns].info.representor &&
1860                                     !list[ns].info.master)) {
1861                                 /*
1862                                  * We failed to recognize representors with
1863                                  * Netlink, let's try to perform the task
1864                                  * with sysfs.
1865                                  */
1866                                 ret =  mlx5_sysfs_switch_info
1867                                                 (list[ns].ifindex,
1868                                                  &list[ns].info);
1869                         }
1870                         if (!ret && (list[ns].info.representor ^
1871                                      list[ns].info.master))
1872                                 ns++;
1873                 }
1874                 if (!ns) {
1875                         DRV_LOG(ERR,
1876                                 "unable to recognize master/representors"
1877                                 " on the IB device with multiple ports");
1878                         rte_errno = ENOENT;
1879                         ret = -rte_errno;
1880                         goto exit;
1881                 }
1882         } else {
1883                 /*
1884                  * The existence of several matching entries (nd > 1) means
1885                  * port representors have been instantiated. No existing Verbs
1886                  * call nor sysfs entries can tell them apart, this can only
1887                  * be done through Netlink calls assuming kernel drivers are
1888                  * recent enough to support them.
1889                  *
1890                  * In the event of identification failure through Netlink,
1891                  * try again through sysfs, then:
1892                  *
1893                  * 1. A single IB device matches (nd == 1) with single
1894                  *    port (np=0/1) and is not a representor, assume
1895                  *    no switch support.
1896                  *
1897                  * 2. Otherwise no safe assumptions can be made;
1898                  *    complain louder and bail out.
1899                  */
1900                 np = 1;
1901                 for (i = 0; i != nd; ++i) {
1902                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1903                         list[ns].max_port = 1;
1904                         list[ns].ibv_port = 1;
1905                         list[ns].ibv_dev = ibv_match[i];
1906                         list[ns].eth_dev = NULL;
1907                         list[ns].pci_dev = pci_dev;
1908                         list[ns].ifindex = 0;
1909                         if (nl_rdma >= 0)
1910                                 list[ns].ifindex = mlx5_nl_ifindex
1911                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1912                         if (!list[ns].ifindex) {
1913                                 char ifname[IF_NAMESIZE];
1914
1915                                 /*
1916                                  * Netlink failed, it may happen with old
1917                                  * ib_core kernel driver (before 4.16).
1918                                  * We can assume there is old driver because
1919                                  * here we are processing single ports IB
1920                                  * devices. Let's try sysfs to retrieve
1921                                  * the ifindex. The method works for
1922                                  * master device only.
1923                                  */
1924                                 if (nd > 1) {
1925                                         /*
1926                                          * Multiple devices found, assume
1927                                          * representors, can not distinguish
1928                                          * master/representor and retrieve
1929                                          * ifindex via sysfs.
1930                                          */
1931                                         continue;
1932                                 }
1933                                 ret = mlx5_get_master_ifname
1934                                         (ibv_match[i]->ibdev_path, &ifname);
1935                                 if (!ret)
1936                                         list[ns].ifindex =
1937                                                 if_nametoindex(ifname);
1938                                 if (!list[ns].ifindex) {
1939                                         /*
1940                                          * No network interface index found
1941                                          * for the specified device, it means
1942                                          * there it is neither representor
1943                                          * nor master.
1944                                          */
1945                                         continue;
1946                                 }
1947                         }
1948                         ret = -1;
1949                         if (nl_route >= 0)
1950                                 ret = mlx5_nl_switch_info
1951                                                (nl_route,
1952                                                 list[ns].ifindex,
1953                                                 &list[ns].info);
1954                         if (ret || (!list[ns].info.representor &&
1955                                     !list[ns].info.master)) {
1956                                 /*
1957                                  * We failed to recognize representors with
1958                                  * Netlink, let's try to perform the task
1959                                  * with sysfs.
1960                                  */
1961                                 ret =  mlx5_sysfs_switch_info
1962                                                 (list[ns].ifindex,
1963                                                  &list[ns].info);
1964                         }
1965                         if (!ret && (list[ns].info.representor ^
1966                                      list[ns].info.master)) {
1967                                 ns++;
1968                         } else if ((nd == 1) &&
1969                                    !list[ns].info.representor &&
1970                                    !list[ns].info.master) {
1971                                 /*
1972                                  * Single IB device with
1973                                  * one physical port and
1974                                  * attached network device.
1975                                  * May be SRIOV is not enabled
1976                                  * or there is no representors.
1977                                  */
1978                                 DRV_LOG(INFO, "no E-Switch support detected");
1979                                 ns++;
1980                                 break;
1981                         }
1982                 }
1983                 if (!ns) {
1984                         DRV_LOG(ERR,
1985                                 "unable to recognize master/representors"
1986                                 " on the multiple IB devices");
1987                         rte_errno = ENOENT;
1988                         ret = -rte_errno;
1989                         goto exit;
1990                 }
1991         }
1992         assert(ns);
1993         /*
1994          * Sort list to probe devices in natural order for users convenience
1995          * (i.e. master first, then representors from lowest to highest ID).
1996          */
1997         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1998         /* Default configuration. */
1999         dev_config = (struct mlx5_dev_config){
2000                 .hw_padding = 0,
2001                 .mps = MLX5_ARG_UNSET,
2002                 .tx_vec_en = 1,
2003                 .rx_vec_en = 1,
2004                 .txq_inline = MLX5_ARG_UNSET,
2005                 .txqs_inline = MLX5_ARG_UNSET,
2006                 .txqs_vec = MLX5_ARG_UNSET,
2007                 .inline_max_packet_sz = MLX5_ARG_UNSET,
2008                 .vf_nl_en = 1,
2009                 .mr_ext_memseg_en = 1,
2010                 .mprq = {
2011                         .enabled = 0, /* Disabled by default. */
2012                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2013                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2014                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2015                 },
2016                 .dv_esw_en = 1,
2017         };
2018         /* Device specific configuration. */
2019         switch (pci_dev->id.device_id) {
2020         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
2021                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
2022                 break;
2023         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2024         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2025         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2026         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2027                 dev_config.vf = 1;
2028                 break;
2029         default:
2030                 break;
2031         }
2032         /* Set architecture-dependent default value if unset. */
2033         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
2034                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
2035         for (i = 0; i != ns; ++i) {
2036                 uint32_t restore;
2037
2038                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2039                                                  &list[i],
2040                                                  dev_config);
2041                 if (!list[i].eth_dev) {
2042                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2043                                 break;
2044                         /* Device is disabled or already spawned. Ignore it. */
2045                         continue;
2046                 }
2047                 restore = list[i].eth_dev->data->dev_flags;
2048                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2049                 /* Restore non-PCI flags cleared by the above call. */
2050                 list[i].eth_dev->data->dev_flags |= restore;
2051                 rte_eth_dev_probing_finish(list[i].eth_dev);
2052         }
2053         if (i != ns) {
2054                 DRV_LOG(ERR,
2055                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2056                         " encountering an error: %s",
2057                         pci_dev->addr.domain, pci_dev->addr.bus,
2058                         pci_dev->addr.devid, pci_dev->addr.function,
2059                         strerror(rte_errno));
2060                 ret = -rte_errno;
2061                 /* Roll back. */
2062                 while (i--) {
2063                         if (!list[i].eth_dev)
2064                                 continue;
2065                         mlx5_dev_close(list[i].eth_dev);
2066                         /* mac_addrs must not be freed because in dev_private */
2067                         list[i].eth_dev->data->mac_addrs = NULL;
2068                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2069                 }
2070                 /* Restore original error. */
2071                 rte_errno = -ret;
2072         } else {
2073                 ret = 0;
2074         }
2075 exit:
2076         /*
2077          * Do the routine cleanup:
2078          * - close opened Netlink sockets
2079          * - free the Infiniband device list
2080          */
2081         if (nl_rdma >= 0)
2082                 close(nl_rdma);
2083         if (nl_route >= 0)
2084                 close(nl_route);
2085         assert(ibv_list);
2086         mlx5_glue->free_device_list(ibv_list);
2087         return ret;
2088 }
2089
2090 /**
2091  * DPDK callback to remove a PCI device.
2092  *
2093  * This function removes all Ethernet devices belong to a given PCI device.
2094  *
2095  * @param[in] pci_dev
2096  *   Pointer to the PCI device.
2097  *
2098  * @return
2099  *   0 on success, the function cannot fail.
2100  */
2101 static int
2102 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2103 {
2104         uint16_t port_id;
2105
2106         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2107                 rte_eth_dev_close(port_id);
2108         return 0;
2109 }
2110
2111 static const struct rte_pci_id mlx5_pci_id_map[] = {
2112         {
2113                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2114                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2115         },
2116         {
2117                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2118                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2119         },
2120         {
2121                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2122                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2123         },
2124         {
2125                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2126                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2127         },
2128         {
2129                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2130                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2131         },
2132         {
2133                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2134                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2135         },
2136         {
2137                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2138                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2139         },
2140         {
2141                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2142                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2143         },
2144         {
2145                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2146                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2147         },
2148         {
2149                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2150                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2151         },
2152         {
2153                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2154                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2155         },
2156         {
2157                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2158                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2159         },
2160         {
2161                 .vendor_id = 0
2162         }
2163 };
2164
2165 static struct rte_pci_driver mlx5_driver = {
2166         .driver = {
2167                 .name = MLX5_DRIVER_NAME
2168         },
2169         .id_table = mlx5_pci_id_map,
2170         .probe = mlx5_pci_probe,
2171         .remove = mlx5_pci_remove,
2172         .dma_map = mlx5_dma_map,
2173         .dma_unmap = mlx5_dma_unmap,
2174         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2175                      RTE_PCI_DRV_PROBE_AGAIN,
2176 };
2177
2178 #ifdef RTE_IBVERBS_LINK_DLOPEN
2179
2180 /**
2181  * Suffix RTE_EAL_PMD_PATH with "-glue".
2182  *
2183  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2184  * suffixing its last component.
2185  *
2186  * @param buf[out]
2187  *   Output buffer, should be large enough otherwise NULL is returned.
2188  * @param size
2189  *   Size of @p out.
2190  *
2191  * @return
2192  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2193  */
2194 static char *
2195 mlx5_glue_path(char *buf, size_t size)
2196 {
2197         static const char *const bad[] = { "/", ".", "..", NULL };
2198         const char *path = RTE_EAL_PMD_PATH;
2199         size_t len = strlen(path);
2200         size_t off;
2201         int i;
2202
2203         while (len && path[len - 1] == '/')
2204                 --len;
2205         for (off = len; off && path[off - 1] != '/'; --off)
2206                 ;
2207         for (i = 0; bad[i]; ++i)
2208                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2209                         goto error;
2210         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2211         if (i == -1 || (size_t)i >= size)
2212                 goto error;
2213         return buf;
2214 error:
2215         DRV_LOG(ERR,
2216                 "unable to append \"-glue\" to last component of"
2217                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2218                 " please re-configure DPDK");
2219         return NULL;
2220 }
2221
2222 /**
2223  * Initialization routine for run-time dependency on rdma-core.
2224  */
2225 static int
2226 mlx5_glue_init(void)
2227 {
2228         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2229         const char *path[] = {
2230                 /*
2231                  * A basic security check is necessary before trusting
2232                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2233                  */
2234                 (geteuid() == getuid() && getegid() == getgid() ?
2235                  getenv("MLX5_GLUE_PATH") : NULL),
2236                 /*
2237                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2238                  * variant, otherwise let dlopen() look up libraries on its
2239                  * own.
2240                  */
2241                 (*RTE_EAL_PMD_PATH ?
2242                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2243         };
2244         unsigned int i = 0;
2245         void *handle = NULL;
2246         void **sym;
2247         const char *dlmsg;
2248
2249         while (!handle && i != RTE_DIM(path)) {
2250                 const char *end;
2251                 size_t len;
2252                 int ret;
2253
2254                 if (!path[i]) {
2255                         ++i;
2256                         continue;
2257                 }
2258                 end = strpbrk(path[i], ":;");
2259                 if (!end)
2260                         end = path[i] + strlen(path[i]);
2261                 len = end - path[i];
2262                 ret = 0;
2263                 do {
2264                         char name[ret + 1];
2265
2266                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2267                                        (int)len, path[i],
2268                                        (!len || *(end - 1) == '/') ? "" : "/");
2269                         if (ret == -1)
2270                                 break;
2271                         if (sizeof(name) != (size_t)ret + 1)
2272                                 continue;
2273                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2274                                 name);
2275                         handle = dlopen(name, RTLD_LAZY);
2276                         break;
2277                 } while (1);
2278                 path[i] = end + 1;
2279                 if (!*end)
2280                         ++i;
2281         }
2282         if (!handle) {
2283                 rte_errno = EINVAL;
2284                 dlmsg = dlerror();
2285                 if (dlmsg)
2286                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2287                 goto glue_error;
2288         }
2289         sym = dlsym(handle, "mlx5_glue");
2290         if (!sym || !*sym) {
2291                 rte_errno = EINVAL;
2292                 dlmsg = dlerror();
2293                 if (dlmsg)
2294                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2295                 goto glue_error;
2296         }
2297         mlx5_glue = *sym;
2298         return 0;
2299 glue_error:
2300         if (handle)
2301                 dlclose(handle);
2302         DRV_LOG(WARNING,
2303                 "cannot initialize PMD due to missing run-time dependency on"
2304                 " rdma-core libraries (libibverbs, libmlx5)");
2305         return -rte_errno;
2306 }
2307
2308 #endif
2309
2310 /**
2311  * Driver initialization routine.
2312  */
2313 RTE_INIT(rte_mlx5_pmd_init)
2314 {
2315         /* Initialize driver log type. */
2316         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2317         if (mlx5_logtype >= 0)
2318                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2319
2320         /* Build the static tables for Verbs conversion. */
2321         mlx5_set_ptype_table();
2322         mlx5_set_cksum_table();
2323         mlx5_set_swp_types_table();
2324         /*
2325          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2326          * huge pages. Calling ibv_fork_init() during init allows
2327          * applications to use fork() safely for purposes other than
2328          * using this PMD, which is not supported in forked processes.
2329          */
2330         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2331         /* Match the size of Rx completion entry to the size of a cacheline. */
2332         if (RTE_CACHE_LINE_SIZE == 128)
2333                 setenv("MLX5_CQE_SIZE", "128", 0);
2334         /*
2335          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2336          * cleanup all the Verbs resources even when the device was removed.
2337          */
2338         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2339 #ifdef RTE_IBVERBS_LINK_DLOPEN
2340         if (mlx5_glue_init())
2341                 return;
2342         assert(mlx5_glue);
2343 #endif
2344 #ifndef NDEBUG
2345         /* Glue structure must not contain any NULL pointers. */
2346         {
2347                 unsigned int i;
2348
2349                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2350                         assert(((const void *const *)mlx5_glue)[i]);
2351         }
2352 #endif
2353         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2354                 DRV_LOG(ERR,
2355                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2356                         mlx5_glue->version, MLX5_GLUE_VERSION);
2357                 return;
2358         }
2359         mlx5_glue->fork_init();
2360         rte_pci_register(&mlx5_driver);
2361 }
2362
2363 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2364 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2365 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");