1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to force doorbell register mapping
100 * to non-cahed region eliminating the extra write memory barrier.
102 #define MLX5_TX_DB_NC "tx_db_nc"
105 * Device parameter to include 2 dsegs in the title WQEBB.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
111 * Device parameter to limit the size of inlining packet.
112 * Deprecated, ignored.
114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
117 * Device parameter to enable hardware Tx vector.
118 * Deprecated, ignored (no vectorized Tx routines anymore).
120 #define MLX5_TX_VEC_EN "tx_vec_en"
122 /* Device parameter to enable hardware Rx vector. */
123 #define MLX5_RX_VEC_EN "rx_vec_en"
125 /* Allow L3 VXLAN flow creation. */
126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
128 /* Activate DV E-Switch flow steering. */
129 #define MLX5_DV_ESW_EN "dv_esw_en"
131 /* Activate DV flow steering. */
132 #define MLX5_DV_FLOW_EN "dv_flow_en"
134 /* Enable extensive flow metadata support. */
135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
137 /* Activate Netlink support in VF mode. */
138 #define MLX5_VF_NL_EN "vf_nl_en"
140 /* Enable extending memsegs when creating a MR. */
141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
143 /* Select port representors to instantiate. */
144 #define MLX5_REPRESENTOR "representor"
146 /* Device parameter to configure the maximum number of dump files per queue. */
147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
149 /* Configure timeout of LRO session (in microseconds). */
150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
152 #ifndef HAVE_IBV_MLX5_MOD_MPW
153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
163 /* Shared memory between primary and secondary processes. */
164 struct mlx5_shared_data *mlx5_shared_data;
166 /* Spinlock for mlx5_shared_data allocation. */
167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
169 /* Process local data for secondary processes. */
170 static struct mlx5_local_data mlx5_local_data;
172 /** Driver-specific log messages type. */
175 /** Data associated with devices to spawn. */
176 struct mlx5_dev_spawn_data {
177 uint32_t ifindex; /**< Network interface index. */
178 uint32_t max_port; /**< IB device maximal port index. */
179 uint32_t ibv_port; /**< IB device physical port index. */
180 int pf_bond; /**< bonding device PF index. < 0 - no bonding */
181 struct mlx5_switch_info info; /**< Switch information. */
182 struct ibv_device *ibv_dev; /**< Associated IB device. */
183 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
184 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
197 * Allocate ID pool structure.
200 * Pointer to pool object, NULL value otherwise.
202 struct mlx5_flow_id_pool *
203 mlx5_flow_id_pool_alloc(void)
205 struct mlx5_flow_id_pool *pool;
208 pool = rte_zmalloc("id pool allocation", sizeof(*pool),
209 RTE_CACHE_LINE_SIZE);
211 DRV_LOG(ERR, "can't allocate id pool");
215 mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
216 RTE_CACHE_LINE_SIZE);
218 DRV_LOG(ERR, "can't allocate mem for id pool");
222 pool->free_arr = mem;
223 pool->curr = pool->free_arr;
224 pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
225 pool->base_index = 0;
233 * Release ID pool structure.
236 * Pointer to flow id pool object to free.
239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
241 rte_free(pool->free_arr);
249 * Pointer to flow id pool.
254 * 0 on success, error value otherwise.
257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
259 if (pool->curr == pool->free_arr) {
260 if (pool->base_index == UINT32_MAX) {
262 DRV_LOG(ERR, "no free id");
265 *id = ++pool->base_index;
268 *id = *(--pool->curr);
276 * Pointer to flow id pool.
281 * 0 on success, error value otherwise.
284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
290 if (pool->curr == pool->last) {
291 size = pool->curr - pool->free_arr;
292 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
293 assert(size2 > size);
294 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
296 DRV_LOG(ERR, "can't allocate mem for id pool");
300 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
301 rte_free(pool->free_arr);
302 pool->free_arr = mem;
303 pool->curr = pool->free_arr + size;
304 pool->last = pool->free_arr + size2;
312 * Initialize the counters management structure.
315 * Pointer to mlx5_ibv_shared object to free
318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
322 TAILQ_INIT(&sh->cmng.flow_counters);
323 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
324 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
328 * Destroy all the resources allocated for a counter memory management.
331 * Pointer to the memory management structure.
334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
336 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
338 LIST_REMOVE(mng, next);
339 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
340 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
345 * Close and release all the resources of the counters management.
348 * Pointer to mlx5_ibv_shared object to free.
351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
353 struct mlx5_counter_stats_mem_mng *mng;
360 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
361 if (rte_errno != EINPROGRESS)
365 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
366 struct mlx5_flow_counter_pool *pool;
367 uint32_t batch = !!(i % 2);
369 if (!sh->cmng.ccont[i].pools)
371 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
376 (mlx5_devx_cmd_destroy(pool->min_dcs));
378 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
379 if (pool->counters_raw[j].action)
381 (mlx5_glue->destroy_flow_action
382 (pool->counters_raw[j].action));
383 if (!batch && pool->counters_raw[j].dcs)
384 claim_zero(mlx5_devx_cmd_destroy
385 (pool->counters_raw[j].dcs));
387 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
390 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
392 rte_free(sh->cmng.ccont[i].pools);
394 mng = LIST_FIRST(&sh->cmng.mem_mngs);
396 mlx5_flow_destroy_counter_stat_mem_mng(mng);
397 mng = LIST_FIRST(&sh->cmng.mem_mngs);
399 memset(&sh->cmng, 0, sizeof(sh->cmng));
403 * Extract pdn of PD object using DV API.
406 * Pointer to the verbs PD object.
408 * Pointer to the PD object number variable.
411 * 0 on success, error value otherwise.
413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
417 struct mlx5dv_obj obj;
418 struct mlx5dv_pd pd_info;
422 obj.pd.out = &pd_info;
423 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
425 DRV_LOG(DEBUG, "Fail to get PD object info");
431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
439 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
440 /* Get environment variable to store. */
441 env = getenv(MLX5_SHUT_UP_BF);
442 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
443 if (config->dbnc == MLX5_ARG_UNSET)
444 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
446 setenv(MLX5_SHUT_UP_BF, config->dbnc ? "1" : "0", 1);
451 mlx5_restore_doorbell_mapping_env(int value)
453 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
454 /* Restore the original environment variable state. */
455 if (value == MLX5_ARG_UNSET)
456 unsetenv(MLX5_SHUT_UP_BF);
458 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
462 * Allocate shared IB device context. If there is multiport device the
463 * master and representors will share this context, if there is single
464 * port dedicated IB device, the context will be used by only given
465 * port due to unification.
467 * Routine first searches the context for the specified IB device name,
468 * if found the shared context assumed and reference counter is incremented.
469 * If no context found the new one is created and initialized with specified
470 * IB device context and parameters.
473 * Pointer to the IB device attributes (name, port, etc).
475 * Pointer to device configuration structure.
478 * Pointer to mlx5_ibv_shared object on success,
479 * otherwise NULL and rte_errno is set.
481 static struct mlx5_ibv_shared *
482 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
483 const struct mlx5_dev_config *config)
485 struct mlx5_ibv_shared *sh;
489 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
490 struct mlx5_devx_tis_attr tis_attr = { 0 };
494 /* Secondary process should not create the shared context. */
495 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
496 pthread_mutex_lock(&mlx5_ibv_list_mutex);
497 /* Search for IB context by device name. */
498 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
499 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
504 /* No device found, we have to create new shared context. */
505 assert(spawn->max_port);
506 sh = rte_zmalloc("ethdev shared ib context",
507 sizeof(struct mlx5_ibv_shared) +
509 sizeof(struct mlx5_ibv_shared_port),
510 RTE_CACHE_LINE_SIZE);
512 DRV_LOG(ERR, "shared context allocation failure");
517 * Configure environment variable "MLX5_BF_SHUT_UP"
518 * before the device creation. The rdma_core library
519 * checks the variable at device creation and
520 * stores the result internally.
522 dbmap_env = mlx5_config_doorbell_mapping_env(config);
523 /* Try to open IB device with DV first, then usual Verbs. */
525 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
528 DRV_LOG(DEBUG, "DevX is supported");
529 /* The device is created, no need for environment. */
530 mlx5_restore_doorbell_mapping_env(dbmap_env);
532 /* The environment variable is still configured. */
533 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
534 err = errno ? errno : ENODEV;
536 * The environment variable is not needed anymore,
537 * all device creation attempts are completed.
539 mlx5_restore_doorbell_mapping_env(dbmap_env);
542 DRV_LOG(DEBUG, "DevX is NOT supported");
544 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
546 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
550 sh->max_port = spawn->max_port;
551 strncpy(sh->ibdev_name, sh->ctx->device->name,
552 sizeof(sh->ibdev_name));
553 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
554 sizeof(sh->ibdev_path));
555 pthread_mutex_init(&sh->intr_mutex, NULL);
557 * Setting port_id to max unallowed value means
558 * there is no interrupt subhandler installed for
559 * the given port index i.
561 for (i = 0; i < sh->max_port; i++) {
562 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
563 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
565 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
566 if (sh->pd == NULL) {
567 DRV_LOG(ERR, "PD allocation failure");
571 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
573 err = mlx5_get_pdn(sh->pd, &sh->pdn);
575 DRV_LOG(ERR, "Fail to extract pdn from PD");
578 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
580 DRV_LOG(ERR, "TD allocation failure");
584 tis_attr.transport_domain = sh->td->id;
585 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
587 DRV_LOG(ERR, "TIS allocation failure");
592 sh->flow_id_pool = mlx5_flow_id_pool_alloc();
593 if (!sh->flow_id_pool) {
594 DRV_LOG(ERR, "can't create flow id pool");
598 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
600 * Once the device is added to the list of memory event
601 * callback, its global MR cache table cannot be expanded
602 * on the fly because of deadlock. If it overflows, lookup
603 * should be done by searching MR list linearly, which is slow.
605 * At this point the device is not added to the memory
606 * event list yet, context is just being created.
608 err = mlx5_mr_btree_init(&sh->mr.cache,
609 MLX5_MR_BTREE_CACHE_N * 2,
610 spawn->pci_dev->device.numa_node);
615 mlx5_flow_counters_mng_init(sh);
616 /* Add device to memory callback list. */
617 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
618 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
620 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
621 /* Add context to the global device list. */
622 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
624 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
627 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
630 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
632 claim_zero(mlx5_devx_cmd_destroy(sh->td));
634 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
636 claim_zero(mlx5_glue->close_device(sh->ctx));
637 if (sh->flow_id_pool)
638 mlx5_flow_id_pool_release(sh->flow_id_pool);
646 * Free shared IB device context. Decrement counter and if zero free
647 * all allocated resources and close handles.
650 * Pointer to mlx5_ibv_shared object to free
653 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
655 pthread_mutex_lock(&mlx5_ibv_list_mutex);
657 /* Check the object presence in the list. */
658 struct mlx5_ibv_shared *lctx;
660 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
665 DRV_LOG(ERR, "Freeing non-existing shared IB context");
671 /* Secondary process should not free the shared context. */
672 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
675 /* Release created Memory Regions. */
677 /* Remove from memory callback device list. */
678 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
679 LIST_REMOVE(sh, mem_event_cb);
680 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
681 /* Remove context from the global device list. */
682 LIST_REMOVE(sh, next);
684 * Ensure there is no async event handler installed.
685 * Only primary process handles async device events.
687 mlx5_flow_counters_mng_close(sh);
688 assert(!sh->intr_cnt);
690 mlx5_intr_callback_unregister
691 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
692 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
693 if (sh->devx_intr_cnt) {
694 if (sh->intr_handle_devx.fd)
695 rte_intr_callback_unregister(&sh->intr_handle_devx,
696 mlx5_dev_interrupt_handler_devx, sh);
698 mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
701 pthread_mutex_destroy(&sh->intr_mutex);
703 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
705 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
707 claim_zero(mlx5_devx_cmd_destroy(sh->td));
709 claim_zero(mlx5_glue->close_device(sh->ctx));
710 if (sh->flow_id_pool)
711 mlx5_flow_id_pool_release(sh->flow_id_pool);
714 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
718 * Destroy table hash list and all the root entries per domain.
721 * Pointer to the private device data structure.
724 mlx5_free_table_hash_list(struct mlx5_priv *priv)
726 struct mlx5_ibv_shared *sh = priv->sh;
727 struct mlx5_flow_tbl_data_entry *tbl_data;
728 union mlx5_flow_tbl_key table_key = {
736 struct mlx5_hlist_entry *pos;
740 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
742 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
745 mlx5_hlist_remove(sh->flow_tbls, pos);
748 table_key.direction = 1;
749 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
751 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
754 mlx5_hlist_remove(sh->flow_tbls, pos);
757 table_key.direction = 0;
758 table_key.domain = 1;
759 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
761 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
764 mlx5_hlist_remove(sh->flow_tbls, pos);
767 mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
771 * Initialize flow table hash list and create the root tables entry
775 * Pointer to the private device data structure.
778 * Zero on success, positive error code otherwise.
781 mlx5_alloc_table_hash_list(struct mlx5_priv *priv)
783 struct mlx5_ibv_shared *sh = priv->sh;
784 char s[MLX5_HLIST_NAMESIZE];
788 snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
789 sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
790 if (!sh->flow_tbls) {
791 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
795 #ifndef HAVE_MLX5DV_DR
797 * In case we have not DR support, the zero tables should be created
798 * because DV expect to see them even if they cannot be created by
801 union mlx5_flow_tbl_key table_key = {
809 struct mlx5_flow_tbl_data_entry *tbl_data = rte_zmalloc(NULL,
810 sizeof(*tbl_data), 0);
816 tbl_data->entry.key = table_key.v64;
817 err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
820 rte_atomic32_init(&tbl_data->tbl.refcnt);
821 rte_atomic32_inc(&tbl_data->tbl.refcnt);
822 table_key.direction = 1;
823 tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
828 tbl_data->entry.key = table_key.v64;
829 err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
832 rte_atomic32_init(&tbl_data->tbl.refcnt);
833 rte_atomic32_inc(&tbl_data->tbl.refcnt);
834 table_key.direction = 0;
835 table_key.domain = 1;
836 tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
841 tbl_data->entry.key = table_key.v64;
842 err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
845 rte_atomic32_init(&tbl_data->tbl.refcnt);
846 rte_atomic32_inc(&tbl_data->tbl.refcnt);
849 mlx5_free_table_hash_list(priv);
850 #endif /* HAVE_MLX5DV_DR */
855 * Initialize DR related data within private structure.
856 * Routine checks the reference counter and does actual
857 * resources creation/initialization only if counter is zero.
860 * Pointer to the private device data structure.
863 * Zero on success, positive error code otherwise.
866 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
868 int err = mlx5_alloc_table_hash_list(priv);
872 #ifdef HAVE_MLX5DV_DR
873 struct mlx5_ibv_shared *sh = priv->sh;
874 char s[MLX5_HLIST_NAMESIZE];
878 /* Shared DV/DR structures is already initialized. */
883 /* Reference counter is zero, we should initialize structures. */
884 domain = mlx5_glue->dr_create_domain(sh->ctx,
885 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
887 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
891 sh->rx_domain = domain;
892 domain = mlx5_glue->dr_create_domain(sh->ctx,
893 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
895 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
899 pthread_mutex_init(&sh->dv_mutex, NULL);
900 sh->tx_domain = domain;
901 #ifdef HAVE_MLX5DV_DR_ESWITCH
902 if (priv->config.dv_esw_en) {
903 domain = mlx5_glue->dr_create_domain
904 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
906 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
910 sh->fdb_domain = domain;
911 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
914 /* create tags hash list table. */
915 snprintf(s, sizeof(s), "%s_tags", priv->sh->ibdev_name);
916 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
917 if (!sh->flow_tbls) {
918 DRV_LOG(ERR, "tags with hash creation failed.\n");
921 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
927 /* Rollback the created objects. */
929 mlx5_glue->dr_destroy_domain(sh->rx_domain);
930 sh->rx_domain = NULL;
933 mlx5_glue->dr_destroy_domain(sh->tx_domain);
934 sh->tx_domain = NULL;
936 if (sh->fdb_domain) {
937 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
938 sh->fdb_domain = NULL;
940 if (sh->esw_drop_action) {
941 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
942 sh->esw_drop_action = NULL;
944 if (sh->pop_vlan_action) {
945 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
946 sh->pop_vlan_action = NULL;
948 mlx5_free_table_hash_list(priv);
954 * Destroy DR related data within private structure.
957 * Pointer to the private device data structure.
960 mlx5_free_shared_dr(struct mlx5_priv *priv)
962 #ifdef HAVE_MLX5DV_DR
963 struct mlx5_ibv_shared *sh;
965 if (!priv->dr_shared)
970 assert(sh->dv_refcnt);
971 if (sh->dv_refcnt && --sh->dv_refcnt)
974 mlx5_glue->dr_destroy_domain(sh->rx_domain);
975 sh->rx_domain = NULL;
978 mlx5_glue->dr_destroy_domain(sh->tx_domain);
979 sh->tx_domain = NULL;
981 #ifdef HAVE_MLX5DV_DR_ESWITCH
982 if (sh->fdb_domain) {
983 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
984 sh->fdb_domain = NULL;
986 if (sh->esw_drop_action) {
987 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
988 sh->esw_drop_action = NULL;
992 /* tags should be destroyed with flow before. */
993 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
994 sh->tag_table = NULL;
996 if (sh->pop_vlan_action) {
997 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
998 sh->pop_vlan_action = NULL;
1000 pthread_mutex_destroy(&sh->dv_mutex);
1001 #endif /* HAVE_MLX5DV_DR */
1002 mlx5_free_table_hash_list(priv);
1006 * Initialize shared data between primary and secondary process.
1008 * A memzone is reserved by primary process and secondary processes attach to
1012 * 0 on success, a negative errno value otherwise and rte_errno is set.
1015 mlx5_init_shared_data(void)
1017 const struct rte_memzone *mz;
1020 rte_spinlock_lock(&mlx5_shared_data_lock);
1021 if (mlx5_shared_data == NULL) {
1022 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1023 /* Allocate shared memory. */
1024 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
1025 sizeof(*mlx5_shared_data),
1029 "Cannot allocate mlx5 shared data");
1033 mlx5_shared_data = mz->addr;
1034 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
1035 rte_spinlock_init(&mlx5_shared_data->lock);
1037 /* Lookup allocated shared memory. */
1038 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
1041 "Cannot attach mlx5 shared data");
1045 mlx5_shared_data = mz->addr;
1046 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
1050 rte_spinlock_unlock(&mlx5_shared_data_lock);
1055 * Retrieve integer value from environment variable.
1058 * Environment variable name.
1061 * Integer value, 0 if the variable is not set.
1064 mlx5_getenv_int(const char *name)
1066 const char *val = getenv(name);
1074 * Verbs callback to allocate a memory. This function should allocate the space
1075 * according to the size provided residing inside a huge page.
1076 * Please note that all allocation must respect the alignment from libmlx5
1077 * (i.e. currently sysconf(_SC_PAGESIZE)).
1080 * The size in bytes of the memory to allocate.
1082 * A pointer to the callback data.
1085 * Allocated buffer, NULL otherwise and rte_errno is set.
1088 mlx5_alloc_verbs_buf(size_t size, void *data)
1090 struct mlx5_priv *priv = data;
1092 size_t alignment = sysconf(_SC_PAGESIZE);
1093 unsigned int socket = SOCKET_ID_ANY;
1095 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
1096 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1098 socket = ctrl->socket;
1099 } else if (priv->verbs_alloc_ctx.type ==
1100 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
1101 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1103 socket = ctrl->socket;
1105 assert(data != NULL);
1106 ret = rte_malloc_socket(__func__, size, alignment, socket);
1113 * Verbs callback to free a memory.
1116 * A pointer to the memory to free.
1118 * A pointer to the callback data.
1121 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1123 assert(data != NULL);
1128 * DPDK callback to add udp tunnel port
1131 * A pointer to eth_dev
1132 * @param[in] udp_tunnel
1133 * A pointer to udp tunnel
1136 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1139 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1140 struct rte_eth_udp_tunnel *udp_tunnel)
1142 assert(udp_tunnel != NULL);
1143 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1144 udp_tunnel->udp_port == 4789)
1146 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1147 udp_tunnel->udp_port == 4790)
1153 * Initialize process private data structure.
1156 * Pointer to Ethernet device structure.
1159 * 0 on success, a negative errno value otherwise and rte_errno is set.
1162 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1164 struct mlx5_priv *priv = dev->data->dev_private;
1165 struct mlx5_proc_priv *ppriv;
1169 * UAR register table follows the process private structure. BlueFlame
1170 * registers for Tx queues are stored in the table.
1173 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1174 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1175 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1180 ppriv->uar_table_sz = ppriv_size;
1181 dev->process_private = ppriv;
1186 * Un-initialize process private data structure.
1189 * Pointer to Ethernet device structure.
1192 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1194 if (!dev->process_private)
1196 rte_free(dev->process_private);
1197 dev->process_private = NULL;
1201 * DPDK callback to close the device.
1203 * Destroy all queues and objects, free memory.
1206 * Pointer to Ethernet device structure.
1209 mlx5_dev_close(struct rte_eth_dev *dev)
1211 struct mlx5_priv *priv = dev->data->dev_private;
1215 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1217 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1218 /* In case mlx5_dev_stop() has not been called. */
1219 mlx5_dev_interrupt_handler_uninstall(dev);
1220 mlx5_dev_interrupt_handler_devx_uninstall(dev);
1221 mlx5_traffic_disable(dev);
1222 mlx5_flow_flush(dev, NULL);
1223 mlx5_flow_meter_flush(dev, NULL);
1224 /* Prevent crashes when queues are still in use. */
1225 dev->rx_pkt_burst = removed_rx_burst;
1226 dev->tx_pkt_burst = removed_tx_burst;
1228 /* Disable datapath on secondary process. */
1229 mlx5_mp_req_stop_rxtx(dev);
1230 if (priv->rxqs != NULL) {
1231 /* XXX race condition if mlx5_rx_burst() is still running. */
1233 for (i = 0; (i != priv->rxqs_n); ++i)
1234 mlx5_rxq_release(dev, i);
1238 if (priv->txqs != NULL) {
1239 /* XXX race condition if mlx5_tx_burst() is still running. */
1241 for (i = 0; (i != priv->txqs_n); ++i)
1242 mlx5_txq_release(dev, i);
1246 mlx5_proc_priv_uninit(dev);
1247 if (priv->mreg_cp_tbl)
1248 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1249 mlx5_mprq_free_mp(dev);
1250 mlx5_free_shared_dr(priv);
1251 if (priv->rss_conf.rss_key != NULL)
1252 rte_free(priv->rss_conf.rss_key);
1253 if (priv->reta_idx != NULL)
1254 rte_free(priv->reta_idx);
1255 if (priv->config.vf)
1256 mlx5_nl_mac_addr_flush(dev);
1257 if (priv->nl_socket_route >= 0)
1258 close(priv->nl_socket_route);
1259 if (priv->nl_socket_rdma >= 0)
1260 close(priv->nl_socket_rdma);
1261 if (priv->vmwa_context)
1262 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1265 * Free the shared context in last turn, because the cleanup
1266 * routines above may use some shared fields, like
1267 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1268 * ifindex if Netlink fails.
1270 mlx5_free_shared_ibctx(priv->sh);
1273 ret = mlx5_hrxq_verify(dev);
1275 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1276 dev->data->port_id);
1277 ret = mlx5_ind_table_obj_verify(dev);
1279 DRV_LOG(WARNING, "port %u some indirection table still remain",
1280 dev->data->port_id);
1281 ret = mlx5_rxq_obj_verify(dev);
1283 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1284 dev->data->port_id);
1285 ret = mlx5_rxq_verify(dev);
1287 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1288 dev->data->port_id);
1289 ret = mlx5_txq_obj_verify(dev);
1291 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1292 dev->data->port_id);
1293 ret = mlx5_txq_verify(dev);
1295 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1296 dev->data->port_id);
1297 ret = mlx5_flow_verify(dev);
1299 DRV_LOG(WARNING, "port %u some flows still remain",
1300 dev->data->port_id);
1301 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1305 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1306 struct mlx5_priv *opriv =
1307 rte_eth_devices[port_id].data->dev_private;
1310 opriv->domain_id != priv->domain_id ||
1311 &rte_eth_devices[port_id] == dev)
1317 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1319 memset(priv, 0, sizeof(*priv));
1320 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1322 * Reset mac_addrs to NULL such that it is not freed as part of
1323 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1324 * it is freed when dev_private is freed.
1326 dev->data->mac_addrs = NULL;
1329 const struct eth_dev_ops mlx5_dev_ops = {
1330 .dev_configure = mlx5_dev_configure,
1331 .dev_start = mlx5_dev_start,
1332 .dev_stop = mlx5_dev_stop,
1333 .dev_set_link_down = mlx5_set_link_down,
1334 .dev_set_link_up = mlx5_set_link_up,
1335 .dev_close = mlx5_dev_close,
1336 .promiscuous_enable = mlx5_promiscuous_enable,
1337 .promiscuous_disable = mlx5_promiscuous_disable,
1338 .allmulticast_enable = mlx5_allmulticast_enable,
1339 .allmulticast_disable = mlx5_allmulticast_disable,
1340 .link_update = mlx5_link_update,
1341 .stats_get = mlx5_stats_get,
1342 .stats_reset = mlx5_stats_reset,
1343 .xstats_get = mlx5_xstats_get,
1344 .xstats_reset = mlx5_xstats_reset,
1345 .xstats_get_names = mlx5_xstats_get_names,
1346 .fw_version_get = mlx5_fw_version_get,
1347 .dev_infos_get = mlx5_dev_infos_get,
1348 .read_clock = mlx5_read_clock,
1349 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1350 .vlan_filter_set = mlx5_vlan_filter_set,
1351 .rx_queue_setup = mlx5_rx_queue_setup,
1352 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1353 .tx_queue_setup = mlx5_tx_queue_setup,
1354 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1355 .rx_queue_release = mlx5_rx_queue_release,
1356 .tx_queue_release = mlx5_tx_queue_release,
1357 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1358 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1359 .mac_addr_remove = mlx5_mac_addr_remove,
1360 .mac_addr_add = mlx5_mac_addr_add,
1361 .mac_addr_set = mlx5_mac_addr_set,
1362 .set_mc_addr_list = mlx5_set_mc_addr_list,
1363 .mtu_set = mlx5_dev_set_mtu,
1364 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1365 .vlan_offload_set = mlx5_vlan_offload_set,
1366 .reta_update = mlx5_dev_rss_reta_update,
1367 .reta_query = mlx5_dev_rss_reta_query,
1368 .rss_hash_update = mlx5_rss_hash_update,
1369 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1370 .filter_ctrl = mlx5_dev_filter_ctrl,
1371 .rx_descriptor_status = mlx5_rx_descriptor_status,
1372 .tx_descriptor_status = mlx5_tx_descriptor_status,
1373 .rx_queue_count = mlx5_rx_queue_count,
1374 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1375 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1376 .is_removed = mlx5_is_removed,
1377 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1378 .get_module_info = mlx5_get_module_info,
1379 .get_module_eeprom = mlx5_get_module_eeprom,
1380 .hairpin_cap_get = mlx5_hairpin_cap_get,
1381 .mtr_ops_get = mlx5_flow_meter_ops_get,
1384 /* Available operations from secondary process. */
1385 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1386 .stats_get = mlx5_stats_get,
1387 .stats_reset = mlx5_stats_reset,
1388 .xstats_get = mlx5_xstats_get,
1389 .xstats_reset = mlx5_xstats_reset,
1390 .xstats_get_names = mlx5_xstats_get_names,
1391 .fw_version_get = mlx5_fw_version_get,
1392 .dev_infos_get = mlx5_dev_infos_get,
1393 .rx_descriptor_status = mlx5_rx_descriptor_status,
1394 .tx_descriptor_status = mlx5_tx_descriptor_status,
1395 .get_module_info = mlx5_get_module_info,
1396 .get_module_eeprom = mlx5_get_module_eeprom,
1399 /* Available operations in flow isolated mode. */
1400 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1401 .dev_configure = mlx5_dev_configure,
1402 .dev_start = mlx5_dev_start,
1403 .dev_stop = mlx5_dev_stop,
1404 .dev_set_link_down = mlx5_set_link_down,
1405 .dev_set_link_up = mlx5_set_link_up,
1406 .dev_close = mlx5_dev_close,
1407 .promiscuous_enable = mlx5_promiscuous_enable,
1408 .promiscuous_disable = mlx5_promiscuous_disable,
1409 .allmulticast_enable = mlx5_allmulticast_enable,
1410 .allmulticast_disable = mlx5_allmulticast_disable,
1411 .link_update = mlx5_link_update,
1412 .stats_get = mlx5_stats_get,
1413 .stats_reset = mlx5_stats_reset,
1414 .xstats_get = mlx5_xstats_get,
1415 .xstats_reset = mlx5_xstats_reset,
1416 .xstats_get_names = mlx5_xstats_get_names,
1417 .fw_version_get = mlx5_fw_version_get,
1418 .dev_infos_get = mlx5_dev_infos_get,
1419 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1420 .vlan_filter_set = mlx5_vlan_filter_set,
1421 .rx_queue_setup = mlx5_rx_queue_setup,
1422 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1423 .tx_queue_setup = mlx5_tx_queue_setup,
1424 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1425 .rx_queue_release = mlx5_rx_queue_release,
1426 .tx_queue_release = mlx5_tx_queue_release,
1427 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1428 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1429 .mac_addr_remove = mlx5_mac_addr_remove,
1430 .mac_addr_add = mlx5_mac_addr_add,
1431 .mac_addr_set = mlx5_mac_addr_set,
1432 .set_mc_addr_list = mlx5_set_mc_addr_list,
1433 .mtu_set = mlx5_dev_set_mtu,
1434 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1435 .vlan_offload_set = mlx5_vlan_offload_set,
1436 .filter_ctrl = mlx5_dev_filter_ctrl,
1437 .rx_descriptor_status = mlx5_rx_descriptor_status,
1438 .tx_descriptor_status = mlx5_tx_descriptor_status,
1439 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1440 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1441 .is_removed = mlx5_is_removed,
1442 .get_module_info = mlx5_get_module_info,
1443 .get_module_eeprom = mlx5_get_module_eeprom,
1444 .hairpin_cap_get = mlx5_hairpin_cap_get,
1445 .mtr_ops_get = mlx5_flow_meter_ops_get,
1449 * Verify and store value for device argument.
1452 * Key argument to verify.
1454 * Value associated with key.
1459 * 0 on success, a negative errno value otherwise and rte_errno is set.
1462 mlx5_args_check(const char *key, const char *val, void *opaque)
1464 struct mlx5_dev_config *config = opaque;
1467 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1468 if (!strcmp(MLX5_REPRESENTOR, key))
1471 tmp = strtoul(val, NULL, 0);
1474 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1477 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1478 config->cqe_comp = !!tmp;
1479 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1480 config->cqe_pad = !!tmp;
1481 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1482 config->hw_padding = !!tmp;
1483 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1484 config->mprq.enabled = !!tmp;
1485 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1486 config->mprq.stride_num_n = tmp;
1487 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1488 config->mprq.max_memcpy_len = tmp;
1489 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1490 config->mprq.min_rxqs_num = tmp;
1491 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1492 DRV_LOG(WARNING, "%s: deprecated parameter,"
1493 " converted to txq_inline_max", key);
1494 config->txq_inline_max = tmp;
1495 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1496 config->txq_inline_max = tmp;
1497 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1498 config->txq_inline_min = tmp;
1499 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1500 config->txq_inline_mpw = tmp;
1501 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1502 config->txqs_inline = tmp;
1503 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1504 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1505 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1506 config->mps = !!tmp;
1507 } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1508 config->dbnc = !!tmp;
1509 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1510 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1511 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1512 DRV_LOG(WARNING, "%s: deprecated parameter,"
1513 " converted to txq_inline_mpw", key);
1514 config->txq_inline_mpw = tmp;
1515 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1516 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1517 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1518 config->rx_vec_en = !!tmp;
1519 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1520 config->l3_vxlan_en = !!tmp;
1521 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1522 config->vf_nl_en = !!tmp;
1523 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1524 config->dv_esw_en = !!tmp;
1525 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1526 config->dv_flow_en = !!tmp;
1527 } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1528 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1529 tmp != MLX5_XMETA_MODE_META16 &&
1530 tmp != MLX5_XMETA_MODE_META32) {
1531 DRV_LOG(WARNING, "invalid extensive "
1532 "metadata parameter");
1536 config->dv_xmeta_en = tmp;
1537 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1538 config->mr_ext_memseg_en = !!tmp;
1539 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1540 config->max_dump_files_num = tmp;
1541 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1542 config->lro.timeout = tmp;
1544 DRV_LOG(WARNING, "%s: unknown parameter", key);
1552 * Parse device parameters.
1555 * Pointer to device configuration structure.
1557 * Device arguments structure.
1560 * 0 on success, a negative errno value otherwise and rte_errno is set.
1563 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1565 const char **params = (const char *[]){
1566 MLX5_RXQ_CQE_COMP_EN,
1567 MLX5_RXQ_CQE_PAD_EN,
1568 MLX5_RXQ_PKT_PAD_EN,
1570 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1571 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1574 MLX5_TXQ_INLINE_MIN,
1575 MLX5_TXQ_INLINE_MAX,
1576 MLX5_TXQ_INLINE_MPW,
1577 MLX5_TXQS_MIN_INLINE,
1580 MLX5_TXQ_MPW_HDR_DSEG_EN,
1581 MLX5_TXQ_MAX_INLINE_LEN,
1590 MLX5_MR_EXT_MEMSEG_EN,
1592 MLX5_MAX_DUMP_FILES_NUM,
1593 MLX5_LRO_TIMEOUT_USEC,
1596 struct rte_kvargs *kvlist;
1600 if (devargs == NULL)
1602 /* Following UGLY cast is done to pass checkpatch. */
1603 kvlist = rte_kvargs_parse(devargs->args, params);
1604 if (kvlist == NULL) {
1608 /* Process parameters. */
1609 for (i = 0; (params[i] != NULL); ++i) {
1610 if (rte_kvargs_count(kvlist, params[i])) {
1611 ret = rte_kvargs_process(kvlist, params[i],
1612 mlx5_args_check, config);
1615 rte_kvargs_free(kvlist);
1620 rte_kvargs_free(kvlist);
1624 static struct rte_pci_driver mlx5_driver;
1627 * PMD global initialization.
1629 * Independent from individual device, this function initializes global
1630 * per-PMD data structures distinguishing primary and secondary processes.
1631 * Hence, each initialization is called once per a process.
1634 * 0 on success, a negative errno value otherwise and rte_errno is set.
1637 mlx5_init_once(void)
1639 struct mlx5_shared_data *sd;
1640 struct mlx5_local_data *ld = &mlx5_local_data;
1643 if (mlx5_init_shared_data())
1645 sd = mlx5_shared_data;
1647 rte_spinlock_lock(&sd->lock);
1648 switch (rte_eal_process_type()) {
1649 case RTE_PROC_PRIMARY:
1652 LIST_INIT(&sd->mem_event_cb_list);
1653 rte_rwlock_init(&sd->mem_event_rwlock);
1654 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1655 mlx5_mr_mem_event_cb, NULL);
1656 ret = mlx5_mp_init_primary();
1659 sd->init_done = true;
1661 case RTE_PROC_SECONDARY:
1664 ret = mlx5_mp_init_secondary();
1667 ++sd->secondary_cnt;
1668 ld->init_done = true;
1674 rte_spinlock_unlock(&sd->lock);
1679 * Configures the minimal amount of data to inline into WQE
1680 * while sending packets.
1682 * - the txq_inline_min has the maximal priority, if this
1683 * key is specified in devargs
1684 * - if DevX is enabled the inline mode is queried from the
1685 * device (HCA attributes and NIC vport context if needed).
1686 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1687 * and none (0 bytes) for other NICs
1690 * Verbs device parameters (name, port, switch_info) to spawn.
1692 * Device configuration parameters.
1695 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1696 struct mlx5_dev_config *config)
1698 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1699 /* Application defines size of inlined data explicitly. */
1700 switch (spawn->pci_dev->id.device_id) {
1701 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1702 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1703 if (config->txq_inline_min <
1704 (int)MLX5_INLINE_HSIZE_L2) {
1706 "txq_inline_mix aligned to minimal"
1707 " ConnectX-4 required value %d",
1708 (int)MLX5_INLINE_HSIZE_L2);
1709 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1715 if (config->hca_attr.eth_net_offloads) {
1716 /* We have DevX enabled, inline mode queried successfully. */
1717 switch (config->hca_attr.wqe_inline_mode) {
1718 case MLX5_CAP_INLINE_MODE_L2:
1719 /* outer L2 header must be inlined. */
1720 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1722 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1723 /* No inline data are required by NIC. */
1724 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1725 config->hw_vlan_insert =
1726 config->hca_attr.wqe_vlan_insert;
1727 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1729 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1730 /* inline mode is defined by NIC vport context. */
1731 if (!config->hca_attr.eth_virt)
1733 switch (config->hca_attr.vport_inline_mode) {
1734 case MLX5_INLINE_MODE_NONE:
1735 config->txq_inline_min =
1736 MLX5_INLINE_HSIZE_NONE;
1738 case MLX5_INLINE_MODE_L2:
1739 config->txq_inline_min =
1740 MLX5_INLINE_HSIZE_L2;
1742 case MLX5_INLINE_MODE_IP:
1743 config->txq_inline_min =
1744 MLX5_INLINE_HSIZE_L3;
1746 case MLX5_INLINE_MODE_TCP_UDP:
1747 config->txq_inline_min =
1748 MLX5_INLINE_HSIZE_L4;
1750 case MLX5_INLINE_MODE_INNER_L2:
1751 config->txq_inline_min =
1752 MLX5_INLINE_HSIZE_INNER_L2;
1754 case MLX5_INLINE_MODE_INNER_IP:
1755 config->txq_inline_min =
1756 MLX5_INLINE_HSIZE_INNER_L3;
1758 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1759 config->txq_inline_min =
1760 MLX5_INLINE_HSIZE_INNER_L4;
1766 * We get here if we are unable to deduce
1767 * inline data size with DevX. Try PCI ID
1768 * to determine old NICs.
1770 switch (spawn->pci_dev->id.device_id) {
1771 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1772 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1773 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1774 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1775 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1776 config->hw_vlan_insert = 0;
1778 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1779 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1780 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1781 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1783 * These NICs support VLAN insertion from WQE and
1784 * report the wqe_vlan_insert flag. But there is the bug
1785 * and PFC control may be broken, so disable feature.
1787 config->hw_vlan_insert = 0;
1788 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1791 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1795 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1799 * Configures the metadata mask fields in the shared context.
1802 * Pointer to Ethernet device.
1805 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1807 struct mlx5_priv *priv = dev->data->dev_private;
1808 struct mlx5_ibv_shared *sh = priv->sh;
1809 uint32_t meta, mark, reg_c0;
1811 reg_c0 = ~priv->vport_meta_mask;
1812 switch (priv->config.dv_xmeta_en) {
1813 case MLX5_XMETA_MODE_LEGACY:
1815 mark = MLX5_FLOW_MARK_MASK;
1817 case MLX5_XMETA_MODE_META16:
1818 meta = reg_c0 >> rte_bsf32(reg_c0);
1819 mark = MLX5_FLOW_MARK_MASK;
1821 case MLX5_XMETA_MODE_META32:
1823 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1831 if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1832 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1833 sh->dv_mark_mask, mark);
1835 sh->dv_mark_mask = mark;
1836 if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1837 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1838 sh->dv_meta_mask, meta);
1840 sh->dv_meta_mask = meta;
1841 if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1842 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1843 sh->dv_meta_mask, reg_c0);
1845 sh->dv_regc0_mask = reg_c0;
1846 DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1847 DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1848 DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1849 DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1853 * Allocate page of door-bells and register it using DevX API.
1856 * Pointer to Ethernet device.
1859 * Pointer to new page on success, NULL otherwise.
1861 static struct mlx5_devx_dbr_page *
1862 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1864 struct mlx5_priv *priv = dev->data->dev_private;
1865 struct mlx5_devx_dbr_page *page;
1867 /* Allocate space for door-bell page and management data. */
1868 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1869 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1871 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1872 dev->data->port_id);
1875 /* Register allocated memory. */
1876 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1877 MLX5_DBR_PAGE_SIZE, 0);
1879 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1880 dev->data->port_id);
1888 * Find the next available door-bell, allocate new page if needed.
1891 * Pointer to Ethernet device.
1892 * @param [out] dbr_page
1893 * Door-bell page containing the page data.
1896 * Door-bell address offset on success, a negative error value otherwise.
1899 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1901 struct mlx5_priv *priv = dev->data->dev_private;
1902 struct mlx5_devx_dbr_page *page = NULL;
1905 LIST_FOREACH(page, &priv->dbrpgs, next)
1906 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1908 if (!page) { /* No page with free door-bell exists. */
1909 page = mlx5_alloc_dbr_page(dev);
1910 if (!page) /* Failed to allocate new page. */
1912 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1914 /* Loop to find bitmap part with clear bit. */
1916 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1919 /* Find the first clear bit. */
1920 j = rte_bsf64(~page->dbr_bitmap[i]);
1921 assert(i < (MLX5_DBR_PER_PAGE / 64));
1922 page->dbr_bitmap[i] |= (1 << j);
1925 return (((i * 64) + j) * sizeof(uint64_t));
1929 * Release a door-bell record.
1932 * Pointer to Ethernet device.
1933 * @param [in] umem_id
1934 * UMEM ID of page containing the door-bell record to release.
1935 * @param [in] offset
1936 * Offset of door-bell record in page.
1939 * 0 on success, a negative error value otherwise.
1942 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1944 struct mlx5_priv *priv = dev->data->dev_private;
1945 struct mlx5_devx_dbr_page *page = NULL;
1948 LIST_FOREACH(page, &priv->dbrpgs, next)
1949 /* Find the page this address belongs to. */
1950 if (page->umem->umem_id == umem_id)
1955 if (!page->dbr_count) {
1956 /* Page not used, free it and remove from list. */
1957 LIST_REMOVE(page, next);
1959 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1962 /* Mark in bitmap that this door-bell is not in use. */
1963 offset /= MLX5_DBR_SIZE;
1964 int i = offset / 64;
1965 int j = offset % 64;
1967 page->dbr_bitmap[i] &= ~(1 << j);
1973 * Check sibling device configurations.
1975 * Sibling devices sharing the Infiniband device context
1976 * should have compatible configurations. This regards
1977 * representors and bonding slaves.
1980 * Private device descriptor.
1982 * Configuration of the device is going to be created.
1985 * 0 on success, EINVAL otherwise
1988 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
1989 struct mlx5_dev_config *config)
1991 struct mlx5_ibv_shared *sh = priv->sh;
1992 struct mlx5_dev_config *sh_conf = NULL;
1996 /* Nothing to compare for the single/first device. */
1997 if (sh->refcnt == 1)
1999 /* Find the device with shared context. */
2000 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2001 struct mlx5_priv *opriv =
2002 rte_eth_devices[port_id].data->dev_private;
2004 if (opriv && opriv != priv && opriv->sh == sh) {
2005 sh_conf = &opriv->config;
2011 if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
2012 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
2013 " for shared %s context", sh->ibdev_name);
2017 if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
2018 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
2019 " for shared %s context", sh->ibdev_name);
2026 * Spawn an Ethernet device from Verbs information.
2029 * Backing DPDK device.
2031 * Verbs device parameters (name, port, switch_info) to spawn.
2033 * Device configuration parameters.
2036 * A valid Ethernet device object on success, NULL otherwise and rte_errno
2037 * is set. The following errors are defined:
2039 * EBUSY: device is not supposed to be spawned.
2040 * EEXIST: device is already spawned
2042 static struct rte_eth_dev *
2043 mlx5_dev_spawn(struct rte_device *dpdk_dev,
2044 struct mlx5_dev_spawn_data *spawn,
2045 struct mlx5_dev_config config)
2047 const struct mlx5_switch_info *switch_info = &spawn->info;
2048 struct mlx5_ibv_shared *sh = NULL;
2049 struct ibv_port_attr port_attr;
2050 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
2051 struct rte_eth_dev *eth_dev = NULL;
2052 struct mlx5_priv *priv = NULL;
2054 unsigned int hw_padding = 0;
2056 unsigned int cqe_comp;
2057 unsigned int cqe_pad = 0;
2058 unsigned int tunnel_en = 0;
2059 unsigned int mpls_en = 0;
2060 unsigned int swp = 0;
2061 unsigned int mprq = 0;
2062 unsigned int mprq_min_stride_size_n = 0;
2063 unsigned int mprq_max_stride_size_n = 0;
2064 unsigned int mprq_min_stride_num_n = 0;
2065 unsigned int mprq_max_stride_num_n = 0;
2066 struct rte_ether_addr mac;
2067 char name[RTE_ETH_NAME_MAX_LEN];
2068 int own_domain_id = 0;
2071 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2072 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
2075 /* Determine if this port representor is supposed to be spawned. */
2076 if (switch_info->representor && dpdk_dev->devargs) {
2077 struct rte_eth_devargs eth_da;
2079 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
2082 DRV_LOG(ERR, "failed to process device arguments: %s",
2083 strerror(rte_errno));
2086 for (i = 0; i < eth_da.nb_representor_ports; ++i)
2087 if (eth_da.representor_ports[i] ==
2088 (uint16_t)switch_info->port_name)
2090 if (i == eth_da.nb_representor_ports) {
2095 /* Build device name. */
2096 if (spawn->pf_bond < 0) {
2097 /* Single device. */
2098 if (!switch_info->representor)
2099 strlcpy(name, dpdk_dev->name, sizeof(name));
2101 snprintf(name, sizeof(name), "%s_representor_%u",
2102 dpdk_dev->name, switch_info->port_name);
2104 /* Bonding device. */
2105 if (!switch_info->representor)
2106 snprintf(name, sizeof(name), "%s_%s",
2107 dpdk_dev->name, spawn->ibv_dev->name);
2109 snprintf(name, sizeof(name), "%s_%s_representor_%u",
2110 dpdk_dev->name, spawn->ibv_dev->name,
2111 switch_info->port_name);
2113 /* check if the device is already spawned */
2114 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2118 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2119 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2120 eth_dev = rte_eth_dev_attach_secondary(name);
2121 if (eth_dev == NULL) {
2122 DRV_LOG(ERR, "can not attach rte ethdev");
2126 eth_dev->device = dpdk_dev;
2127 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2128 err = mlx5_proc_priv_init(eth_dev);
2131 /* Receive command fd from primary process */
2132 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2135 /* Remap UAR for Tx queues. */
2136 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2140 * Ethdev pointer is still required as input since
2141 * the primary device is not accessible from the
2142 * secondary process.
2144 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2145 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2149 * Some parameters ("tx_db_nc" in particularly) are needed in
2150 * advance to create dv/verbs device context. We proceed the
2151 * devargs here to get ones, and later proceed devargs again
2152 * to override some hardware settings.
2154 err = mlx5_args(&config, dpdk_dev->devargs);
2157 DRV_LOG(ERR, "failed to process device arguments: %s",
2158 strerror(rte_errno));
2161 sh = mlx5_alloc_shared_ibctx(spawn, &config);
2164 config.devx = sh->devx;
2165 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2166 config.dest_tir = 1;
2168 #ifdef HAVE_IBV_MLX5_MOD_SWP
2169 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2172 * Multi-packet send is supported by ConnectX-4 Lx PF as well
2173 * as all ConnectX-5 devices.
2175 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2176 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2178 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2179 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2181 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2182 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2183 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2184 DRV_LOG(DEBUG, "enhanced MPW is supported");
2185 mps = MLX5_MPW_ENHANCED;
2187 DRV_LOG(DEBUG, "MPW is supported");
2191 DRV_LOG(DEBUG, "MPW isn't supported");
2192 mps = MLX5_MPW_DISABLED;
2194 #ifdef HAVE_IBV_MLX5_MOD_SWP
2195 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2196 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2197 DRV_LOG(DEBUG, "SWP support: %u", swp);
2200 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2201 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2202 struct mlx5dv_striding_rq_caps mprq_caps =
2203 dv_attr.striding_rq_caps;
2205 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2206 mprq_caps.min_single_stride_log_num_of_bytes);
2207 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2208 mprq_caps.max_single_stride_log_num_of_bytes);
2209 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2210 mprq_caps.min_single_wqe_log_num_of_strides);
2211 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2212 mprq_caps.max_single_wqe_log_num_of_strides);
2213 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2214 mprq_caps.supported_qpts);
2215 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2217 mprq_min_stride_size_n =
2218 mprq_caps.min_single_stride_log_num_of_bytes;
2219 mprq_max_stride_size_n =
2220 mprq_caps.max_single_stride_log_num_of_bytes;
2221 mprq_min_stride_num_n =
2222 mprq_caps.min_single_wqe_log_num_of_strides;
2223 mprq_max_stride_num_n =
2224 mprq_caps.max_single_wqe_log_num_of_strides;
2225 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2226 mprq_min_stride_num_n);
2229 if (RTE_CACHE_LINE_SIZE == 128 &&
2230 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2234 config.cqe_comp = cqe_comp;
2235 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2236 /* Whether device supports 128B Rx CQE padding. */
2237 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2238 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2240 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2241 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2242 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2243 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2244 (dv_attr.tunnel_offloads_caps &
2245 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
2247 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2248 tunnel_en ? "" : "not ");
2251 "tunnel offloading disabled due to old OFED/rdma-core version");
2253 config.tunnel_en = tunnel_en;
2254 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2255 mpls_en = ((dv_attr.tunnel_offloads_caps &
2256 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2257 (dv_attr.tunnel_offloads_caps &
2258 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2259 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2260 mpls_en ? "" : "not ");
2262 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2263 " old OFED/rdma-core version or firmware configuration");
2265 config.mpls_en = mpls_en;
2266 /* Check port status. */
2267 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2269 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2272 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2273 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2277 if (port_attr.state != IBV_PORT_ACTIVE)
2278 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2279 mlx5_glue->port_state_str(port_attr.state),
2281 /* Allocate private eth device data. */
2282 priv = rte_zmalloc("ethdev private structure",
2284 RTE_CACHE_LINE_SIZE);
2286 DRV_LOG(ERR, "priv allocation failure");
2291 priv->ibv_port = spawn->ibv_port;
2292 priv->pci_dev = spawn->pci_dev;
2293 priv->mtu = RTE_ETHER_MTU;
2295 /* Initialize UAR access locks for 32bit implementations. */
2296 rte_spinlock_init(&priv->uar_lock_cq);
2297 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2298 rte_spinlock_init(&priv->uar_lock[i]);
2300 /* Some internal functions rely on Netlink sockets, open them now. */
2301 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2302 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2304 priv->representor = !!switch_info->representor;
2305 priv->master = !!switch_info->master;
2306 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2307 priv->vport_meta_tag = 0;
2308 priv->vport_meta_mask = 0;
2309 priv->pf_bond = spawn->pf_bond;
2310 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2312 * The DevX port query API is implemented. E-Switch may use
2313 * either vport or reg_c[0] metadata register to match on
2314 * vport index. The engaged part of metadata register is
2317 if (switch_info->representor || switch_info->master) {
2318 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2319 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2320 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2324 "can't query devx port %d on device %s",
2325 spawn->ibv_port, spawn->ibv_dev->name);
2326 devx_port.comp_mask = 0;
2329 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2330 priv->vport_meta_tag = devx_port.reg_c_0.value;
2331 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2332 if (!priv->vport_meta_mask) {
2333 DRV_LOG(ERR, "vport zero mask for port %d"
2334 " on bonding device %s",
2335 spawn->ibv_port, spawn->ibv_dev->name);
2339 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2340 DRV_LOG(ERR, "invalid vport tag for port %d"
2341 " on bonding device %s",
2342 spawn->ibv_port, spawn->ibv_dev->name);
2347 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2348 priv->vport_id = devx_port.vport_num;
2349 } else if (spawn->pf_bond >= 0) {
2350 DRV_LOG(ERR, "can't deduce vport index for port %d"
2351 " on bonding device %s",
2352 spawn->ibv_port, spawn->ibv_dev->name);
2356 /* Suppose vport index in compatible way. */
2357 priv->vport_id = switch_info->representor ?
2358 switch_info->port_name + 1 : -1;
2362 * Kernel/rdma_core support single E-Switch per PF configurations
2363 * only and vport_id field contains the vport index for
2364 * associated VF, which is deduced from representor port name.
2365 * For example, let's have the IB device port 10, it has
2366 * attached network device eth0, which has port name attribute
2367 * pf0vf2, we can deduce the VF number as 2, and set vport index
2368 * as 3 (2+1). This assigning schema should be changed if the
2369 * multiple E-Switch instances per PF configurations or/and PCI
2370 * subfunctions are added.
2372 priv->vport_id = switch_info->representor ?
2373 switch_info->port_name + 1 : -1;
2375 /* representor_id field keeps the unmodified VF index. */
2376 priv->representor_id = switch_info->representor ?
2377 switch_info->port_name : -1;
2379 * Look for sibling devices in order to reuse their switch domain
2380 * if any, otherwise allocate one.
2382 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2383 const struct mlx5_priv *opriv =
2384 rte_eth_devices[port_id].data->dev_private;
2387 opriv->sh != priv->sh ||
2389 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2391 priv->domain_id = opriv->domain_id;
2394 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2395 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2398 DRV_LOG(ERR, "unable to allocate switch domain: %s",
2399 strerror(rte_errno));
2404 /* Override some values set by hardware configuration. */
2405 mlx5_args(&config, dpdk_dev->devargs);
2406 err = mlx5_dev_check_sibling_config(priv, &config);
2409 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2410 IBV_DEVICE_RAW_IP_CSUM);
2411 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2412 (config.hw_csum ? "" : "not "));
2413 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2414 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2415 DRV_LOG(DEBUG, "counters are not supported");
2417 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
2418 if (config.dv_flow_en) {
2419 DRV_LOG(WARNING, "DV flow is not supported");
2420 config.dv_flow_en = 0;
2423 config.ind_table_max_size =
2424 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2426 * Remove this check once DPDK supports larger/variable
2427 * indirection tables.
2429 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2430 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2431 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2432 config.ind_table_max_size);
2433 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2434 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2435 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2436 (config.hw_vlan_strip ? "" : "not "));
2437 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2438 IBV_RAW_PACKET_CAP_SCATTER_FCS);
2439 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2440 (config.hw_fcs_strip ? "" : "not "));
2441 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2442 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2443 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2444 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2445 IBV_DEVICE_PCI_WRITE_END_PADDING);
2447 if (config.hw_padding && !hw_padding) {
2448 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2449 config.hw_padding = 0;
2450 } else if (config.hw_padding) {
2451 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2453 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2454 (sh->device_attr.tso_caps.supported_qpts &
2455 (1 << IBV_QPT_RAW_PACKET)));
2457 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2459 * MPW is disabled by default, while the Enhanced MPW is enabled
2462 if (config.mps == MLX5_ARG_UNSET)
2463 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2466 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2467 DRV_LOG(INFO, "%sMPS is %s",
2468 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
2469 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2470 if (config.cqe_comp && !cqe_comp) {
2471 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2472 config.cqe_comp = 0;
2474 if (config.cqe_pad && !cqe_pad) {
2475 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2477 } else if (config.cqe_pad) {
2478 DRV_LOG(INFO, "Rx CQE padding is enabled");
2481 priv->counter_fallback = 0;
2482 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2487 if (!config.hca_attr.flow_counters_dump)
2488 priv->counter_fallback = 1;
2489 #ifndef HAVE_IBV_DEVX_ASYNC
2490 priv->counter_fallback = 1;
2492 if (priv->counter_fallback)
2493 DRV_LOG(INFO, "Use fall-back DV counter management");
2494 /* Check for LRO support. */
2495 if (config.dest_tir && config.hca_attr.lro_cap &&
2496 config.dv_flow_en) {
2497 /* TBD check tunnel lro caps. */
2498 config.lro.supported = config.hca_attr.lro_cap;
2499 DRV_LOG(DEBUG, "Device supports LRO");
2501 * If LRO timeout is not configured by application,
2502 * use the minimal supported value.
2504 if (!config.lro.timeout)
2505 config.lro.timeout =
2506 config.hca_attr.lro_timer_supported_periods[0];
2507 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2508 config.lro.timeout);
2510 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2511 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2512 config.dv_flow_en) {
2513 uint8_t reg_c_mask =
2514 config.hca_attr.qos.flow_meter_reg_c_ids;
2516 * Meter needs two REG_C's for color match and pre-sfx
2517 * flow match. Here get the REG_C for color match.
2518 * REG_C_0 and REG_C_1 is reserved for metadata feature.
2521 if (__builtin_popcount(reg_c_mask) < 1) {
2523 DRV_LOG(WARNING, "No available register for"
2526 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2529 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2530 priv->mtr_color_reg);
2535 if (config.mprq.enabled && mprq) {
2536 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2537 config.mprq.stride_num_n < mprq_min_stride_num_n) {
2538 config.mprq.stride_num_n =
2539 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2540 mprq_min_stride_num_n);
2542 "the number of strides"
2543 " for Multi-Packet RQ is out of range,"
2544 " setting default value (%u)",
2545 1 << config.mprq.stride_num_n);
2547 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2548 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2549 } else if (config.mprq.enabled && !mprq) {
2550 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2551 config.mprq.enabled = 0;
2553 if (config.max_dump_files_num == 0)
2554 config.max_dump_files_num = 128;
2555 eth_dev = rte_eth_dev_allocate(name);
2556 if (eth_dev == NULL) {
2557 DRV_LOG(ERR, "can not allocate rte ethdev");
2561 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2562 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2563 if (priv->representor) {
2564 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2565 eth_dev->data->representor_id = priv->representor_id;
2568 * Store associated network device interface index. This index
2569 * is permanent throughout the lifetime of device. So, we may store
2570 * the ifindex here and use the cached value further.
2572 assert(spawn->ifindex);
2573 priv->if_index = spawn->ifindex;
2574 eth_dev->data->dev_private = priv;
2575 priv->dev_data = eth_dev->data;
2576 eth_dev->data->mac_addrs = priv->mac;
2577 eth_dev->device = dpdk_dev;
2578 /* Configure the first MAC address by default. */
2579 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2581 "port %u cannot get MAC address, is mlx5_en"
2582 " loaded? (errno: %s)",
2583 eth_dev->data->port_id, strerror(rte_errno));
2588 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2589 eth_dev->data->port_id,
2590 mac.addr_bytes[0], mac.addr_bytes[1],
2591 mac.addr_bytes[2], mac.addr_bytes[3],
2592 mac.addr_bytes[4], mac.addr_bytes[5]);
2595 char ifname[IF_NAMESIZE];
2597 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2598 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2599 eth_dev->data->port_id, ifname);
2601 DRV_LOG(DEBUG, "port %u ifname is unknown",
2602 eth_dev->data->port_id);
2605 /* Get actual MTU if possible. */
2606 err = mlx5_get_mtu(eth_dev, &priv->mtu);
2611 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2613 /* Initialize burst functions to prevent crashes before link-up. */
2614 eth_dev->rx_pkt_burst = removed_rx_burst;
2615 eth_dev->tx_pkt_burst = removed_tx_burst;
2616 eth_dev->dev_ops = &mlx5_dev_ops;
2617 /* Register MAC address. */
2618 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2619 if (config.vf && config.vf_nl_en)
2620 mlx5_nl_mac_addr_sync(eth_dev);
2621 TAILQ_INIT(&priv->flows);
2622 TAILQ_INIT(&priv->ctrl_flows);
2623 TAILQ_INIT(&priv->flow_meters);
2624 TAILQ_INIT(&priv->flow_meter_profiles);
2625 /* Hint libmlx5 to use PMD allocator for data plane resources */
2626 struct mlx5dv_ctx_allocators alctr = {
2627 .alloc = &mlx5_alloc_verbs_buf,
2628 .free = &mlx5_free_verbs_buf,
2631 mlx5_glue->dv_set_context_attr(sh->ctx,
2632 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2633 (void *)((uintptr_t)&alctr));
2634 /* Bring Ethernet device up. */
2635 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2636 eth_dev->data->port_id);
2637 mlx5_set_link_up(eth_dev);
2639 * Even though the interrupt handler is not installed yet,
2640 * interrupts will still trigger on the async_fd from
2641 * Verbs context returned by ibv_open_device().
2643 mlx5_link_update(eth_dev, 0);
2644 #ifdef HAVE_MLX5DV_DR_ESWITCH
2645 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2646 (switch_info->representor || switch_info->master)))
2647 config.dv_esw_en = 0;
2649 config.dv_esw_en = 0;
2651 /* Detect minimal data bytes to inline. */
2652 mlx5_set_min_inline(spawn, &config);
2653 /* Store device configuration on private structure. */
2654 priv->config = config;
2655 /* Create context for virtual machine VLAN workaround. */
2656 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2657 if (config.dv_flow_en) {
2658 err = mlx5_alloc_shared_dr(priv);
2661 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2662 if (!priv->qrss_id_pool) {
2663 DRV_LOG(ERR, "can't create flow id pool");
2668 /* Supported Verbs flow priority number detection. */
2669 err = mlx5_flow_discover_priorities(eth_dev);
2674 priv->config.flow_prio = err;
2675 if (!priv->config.dv_esw_en &&
2676 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2677 DRV_LOG(WARNING, "metadata mode %u is not supported "
2678 "(no E-Switch)", priv->config.dv_xmeta_en);
2679 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2681 mlx5_set_metadata_mask(eth_dev);
2682 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2683 !priv->sh->dv_regc0_mask) {
2684 DRV_LOG(ERR, "metadata mode %u is not supported "
2685 "(no metadata reg_c[0] is available)",
2686 priv->config.dv_xmeta_en);
2690 /* Query availibility of metadata reg_c's. */
2691 err = mlx5_flow_discover_mreg_c(eth_dev);
2696 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2698 "port %u extensive metadata register is not supported",
2699 eth_dev->data->port_id);
2700 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2701 DRV_LOG(ERR, "metadata mode %u is not supported "
2702 "(no metadata registers available)",
2703 priv->config.dv_xmeta_en);
2708 if (priv->config.dv_flow_en &&
2709 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2710 mlx5_flow_ext_mreg_supported(eth_dev) &&
2711 priv->sh->dv_regc0_mask) {
2712 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2713 MLX5_FLOW_MREG_HTABLE_SZ);
2714 if (!priv->mreg_cp_tbl) {
2722 if (priv->mreg_cp_tbl)
2723 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2725 mlx5_free_shared_dr(priv);
2726 if (priv->nl_socket_route >= 0)
2727 close(priv->nl_socket_route);
2728 if (priv->nl_socket_rdma >= 0)
2729 close(priv->nl_socket_rdma);
2730 if (priv->vmwa_context)
2731 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2732 if (priv->qrss_id_pool)
2733 mlx5_flow_id_pool_release(priv->qrss_id_pool);
2735 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2737 if (eth_dev != NULL)
2738 eth_dev->data->dev_private = NULL;
2740 if (eth_dev != NULL) {
2741 /* mac_addrs must not be freed alone because part of dev_private */
2742 eth_dev->data->mac_addrs = NULL;
2743 rte_eth_dev_release_port(eth_dev);
2746 mlx5_free_shared_ibctx(sh);
2753 * Comparison callback to sort device data.
2755 * This is meant to be used with qsort().
2758 * Pointer to pointer to first data object.
2760 * Pointer to pointer to second data object.
2763 * 0 if both objects are equal, less than 0 if the first argument is less
2764 * than the second, greater than 0 otherwise.
2767 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2769 const struct mlx5_switch_info *si_a =
2770 &((const struct mlx5_dev_spawn_data *)a)->info;
2771 const struct mlx5_switch_info *si_b =
2772 &((const struct mlx5_dev_spawn_data *)b)->info;
2775 /* Master device first. */
2776 ret = si_b->master - si_a->master;
2779 /* Then representor devices. */
2780 ret = si_b->representor - si_a->representor;
2783 /* Unidentified devices come last in no specific order. */
2784 if (!si_a->representor)
2786 /* Order representors by name. */
2787 return si_a->port_name - si_b->port_name;
2791 * Match PCI information for possible slaves of bonding device.
2793 * @param[in] ibv_dev
2794 * Pointer to Infiniband device structure.
2795 * @param[in] pci_dev
2796 * Pointer to PCI device structure to match PCI address.
2797 * @param[in] nl_rdma
2798 * Netlink RDMA group socket handle.
2801 * negative value if no bonding device found, otherwise
2802 * positive index of slave PF in bonding.
2805 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2806 const struct rte_pci_device *pci_dev,
2809 char ifname[IF_NAMESIZE + 1];
2810 unsigned int ifindex;
2816 * Try to get master device name. If something goes
2817 * wrong suppose the lack of kernel support and no
2822 if (!strstr(ibv_dev->name, "bond"))
2824 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2828 * The Master device might not be on the predefined
2829 * port (not on port index 1, it is not garanted),
2830 * we have to scan all Infiniband device port and
2833 for (i = 1; i <= np; ++i) {
2834 /* Check whether Infiniband port is populated. */
2835 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2838 if (!if_indextoname(ifindex, ifname))
2840 /* Try to read bonding slave names from sysfs. */
2842 "/sys/class/net/%s/master/bonding/slaves", ifname);
2843 file = fopen(slaves, "r");
2849 /* Use safe format to check maximal buffer length. */
2850 assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2851 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2852 char tmp_str[IF_NAMESIZE + 32];
2853 struct rte_pci_addr pci_addr;
2854 struct mlx5_switch_info info;
2856 /* Process slave interface names in the loop. */
2857 snprintf(tmp_str, sizeof(tmp_str),
2858 "/sys/class/net/%s", ifname);
2859 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2860 DRV_LOG(WARNING, "can not get PCI address"
2861 " for netdev \"%s\"", ifname);
2864 if (pci_dev->addr.domain != pci_addr.domain ||
2865 pci_dev->addr.bus != pci_addr.bus ||
2866 pci_dev->addr.devid != pci_addr.devid ||
2867 pci_dev->addr.function != pci_addr.function)
2869 /* Slave interface PCI address match found. */
2871 snprintf(tmp_str, sizeof(tmp_str),
2872 "/sys/class/net/%s/phys_port_name", ifname);
2873 file = fopen(tmp_str, "rb");
2876 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2877 if (fscanf(file, "%32s", tmp_str) == 1)
2878 mlx5_translate_port_name(tmp_str, &info);
2879 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2880 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2881 pf = info.port_name;
2890 * DPDK callback to register a PCI device.
2892 * This function spawns Ethernet devices out of a given PCI device.
2894 * @param[in] pci_drv
2895 * PCI driver structure (mlx5_driver).
2896 * @param[in] pci_dev
2897 * PCI device information.
2900 * 0 on success, a negative errno value otherwise and rte_errno is set.
2903 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2904 struct rte_pci_device *pci_dev)
2906 struct ibv_device **ibv_list;
2908 * Number of found IB Devices matching with requested PCI BDF.
2909 * nd != 1 means there are multiple IB devices over the same
2910 * PCI device and we have representors and master.
2912 unsigned int nd = 0;
2914 * Number of found IB device Ports. nd = 1 and np = 1..n means
2915 * we have the single multiport IB device, and there may be
2916 * representors attached to some of found ports.
2918 unsigned int np = 0;
2920 * Number of DPDK ethernet devices to Spawn - either over
2921 * multiple IB devices or multiple ports of single IB device.
2922 * Actually this is the number of iterations to spawn.
2924 unsigned int ns = 0;
2927 * < 0 - no bonding device (single one)
2928 * >= 0 - bonding device (value is slave PF index)
2931 struct mlx5_dev_spawn_data *list = NULL;
2932 struct mlx5_dev_config dev_config;
2935 ret = mlx5_init_once();
2937 DRV_LOG(ERR, "unable to init PMD global data: %s",
2938 strerror(rte_errno));
2941 assert(pci_drv == &mlx5_driver);
2943 ibv_list = mlx5_glue->get_device_list(&ret);
2945 rte_errno = errno ? errno : ENOSYS;
2946 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2950 * First scan the list of all Infiniband devices to find
2951 * matching ones, gathering into the list.
2953 struct ibv_device *ibv_match[ret + 1];
2954 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2955 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2959 struct rte_pci_addr pci_addr;
2961 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2962 bd = mlx5_device_bond_pci_match
2963 (ibv_list[ret], pci_dev, nl_rdma);
2966 * Bonding device detected. Only one match is allowed,
2967 * the bonding is supported over multi-port IB device,
2968 * there should be no matches on representor PCI
2969 * functions or non VF LAG bonding devices with
2970 * specified address.
2974 "multiple PCI match on bonding device"
2975 "\"%s\" found", ibv_list[ret]->name);
2980 DRV_LOG(INFO, "PCI information matches for"
2981 " slave %d bonding device \"%s\"",
2982 bd, ibv_list[ret]->name);
2983 ibv_match[nd++] = ibv_list[ret];
2986 if (mlx5_dev_to_pci_addr
2987 (ibv_list[ret]->ibdev_path, &pci_addr))
2989 if (pci_dev->addr.domain != pci_addr.domain ||
2990 pci_dev->addr.bus != pci_addr.bus ||
2991 pci_dev->addr.devid != pci_addr.devid ||
2992 pci_dev->addr.function != pci_addr.function)
2994 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2995 ibv_list[ret]->name);
2996 ibv_match[nd++] = ibv_list[ret];
2998 ibv_match[nd] = NULL;
3000 /* No device matches, just complain and bail out. */
3002 "no Verbs device matches PCI device " PCI_PRI_FMT ","
3003 " are kernel drivers loaded?",
3004 pci_dev->addr.domain, pci_dev->addr.bus,
3005 pci_dev->addr.devid, pci_dev->addr.function);
3012 * Found single matching device may have multiple ports.
3013 * Each port may be representor, we have to check the port
3014 * number and check the representors existence.
3017 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
3019 DRV_LOG(WARNING, "can not get IB device \"%s\""
3020 " ports number", ibv_match[0]->name);
3021 if (bd >= 0 && !np) {
3022 DRV_LOG(ERR, "can not get ports"
3023 " for bonding device");
3029 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
3032 * This may happen if there is VF LAG kernel support and
3033 * application is compiled with older rdma_core library.
3036 "No kernel/verbs support for VF LAG bonding found.");
3037 rte_errno = ENOTSUP;
3043 * Now we can determine the maximal
3044 * amount of devices to be spawned.
3046 list = rte_zmalloc("device spawn data",
3047 sizeof(struct mlx5_dev_spawn_data) *
3049 RTE_CACHE_LINE_SIZE);
3051 DRV_LOG(ERR, "spawn data array allocation failure");
3056 if (bd >= 0 || np > 1) {
3058 * Single IB device with multiple ports found,
3059 * it may be E-Switch master device and representors.
3060 * We have to perform identification trough the ports.
3062 assert(nl_rdma >= 0);
3066 for (i = 1; i <= np; ++i) {
3067 list[ns].max_port = np;
3068 list[ns].ibv_port = i;
3069 list[ns].ibv_dev = ibv_match[0];
3070 list[ns].eth_dev = NULL;
3071 list[ns].pci_dev = pci_dev;
3072 list[ns].pf_bond = bd;
3073 list[ns].ifindex = mlx5_nl_ifindex
3074 (nl_rdma, list[ns].ibv_dev->name, i);
3075 if (!list[ns].ifindex) {
3077 * No network interface index found for the
3078 * specified port, it means there is no
3079 * representor on this port. It's OK,
3080 * there can be disabled ports, for example
3081 * if sriov_numvfs < sriov_totalvfs.
3087 ret = mlx5_nl_switch_info
3091 if (ret || (!list[ns].info.representor &&
3092 !list[ns].info.master)) {
3094 * We failed to recognize representors with
3095 * Netlink, let's try to perform the task
3098 ret = mlx5_sysfs_switch_info
3102 if (!ret && bd >= 0) {
3103 switch (list[ns].info.name_type) {
3104 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
3105 if (list[ns].info.port_name == bd)
3108 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
3109 if (list[ns].info.pf_num == bd)
3117 if (!ret && (list[ns].info.representor ^
3118 list[ns].info.master))
3123 "unable to recognize master/representors"
3124 " on the IB device with multiple ports");
3131 * The existence of several matching entries (nd > 1) means
3132 * port representors have been instantiated. No existing Verbs
3133 * call nor sysfs entries can tell them apart, this can only
3134 * be done through Netlink calls assuming kernel drivers are
3135 * recent enough to support them.
3137 * In the event of identification failure through Netlink,
3138 * try again through sysfs, then:
3140 * 1. A single IB device matches (nd == 1) with single
3141 * port (np=0/1) and is not a representor, assume
3142 * no switch support.
3144 * 2. Otherwise no safe assumptions can be made;
3145 * complain louder and bail out.
3148 for (i = 0; i != nd; ++i) {
3149 memset(&list[ns].info, 0, sizeof(list[ns].info));
3150 list[ns].max_port = 1;
3151 list[ns].ibv_port = 1;
3152 list[ns].ibv_dev = ibv_match[i];
3153 list[ns].eth_dev = NULL;
3154 list[ns].pci_dev = pci_dev;
3155 list[ns].pf_bond = -1;
3156 list[ns].ifindex = 0;
3158 list[ns].ifindex = mlx5_nl_ifindex
3159 (nl_rdma, list[ns].ibv_dev->name, 1);
3160 if (!list[ns].ifindex) {
3161 char ifname[IF_NAMESIZE];
3164 * Netlink failed, it may happen with old
3165 * ib_core kernel driver (before 4.16).
3166 * We can assume there is old driver because
3167 * here we are processing single ports IB
3168 * devices. Let's try sysfs to retrieve
3169 * the ifindex. The method works for
3170 * master device only.
3174 * Multiple devices found, assume
3175 * representors, can not distinguish
3176 * master/representor and retrieve
3177 * ifindex via sysfs.
3181 ret = mlx5_get_master_ifname
3182 (ibv_match[i]->ibdev_path, &ifname);
3185 if_nametoindex(ifname);
3186 if (!list[ns].ifindex) {
3188 * No network interface index found
3189 * for the specified device, it means
3190 * there it is neither representor
3198 ret = mlx5_nl_switch_info
3202 if (ret || (!list[ns].info.representor &&
3203 !list[ns].info.master)) {
3205 * We failed to recognize representors with
3206 * Netlink, let's try to perform the task
3209 ret = mlx5_sysfs_switch_info
3213 if (!ret && (list[ns].info.representor ^
3214 list[ns].info.master)) {
3216 } else if ((nd == 1) &&
3217 !list[ns].info.representor &&
3218 !list[ns].info.master) {
3220 * Single IB device with
3221 * one physical port and
3222 * attached network device.
3223 * May be SRIOV is not enabled
3224 * or there is no representors.
3226 DRV_LOG(INFO, "no E-Switch support detected");
3233 "unable to recognize master/representors"
3234 " on the multiple IB devices");
3242 * Sort list to probe devices in natural order for users convenience
3243 * (i.e. master first, then representors from lowest to highest ID).
3245 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3246 /* Default configuration. */
3247 dev_config = (struct mlx5_dev_config){
3249 .mps = MLX5_ARG_UNSET,
3250 .dbnc = MLX5_ARG_UNSET,
3252 .txq_inline_max = MLX5_ARG_UNSET,
3253 .txq_inline_min = MLX5_ARG_UNSET,
3254 .txq_inline_mpw = MLX5_ARG_UNSET,
3255 .txqs_inline = MLX5_ARG_UNSET,
3257 .mr_ext_memseg_en = 1,
3259 .enabled = 0, /* Disabled by default. */
3260 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3261 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3262 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3266 /* Device specific configuration. */
3267 switch (pci_dev->id.device_id) {
3268 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3269 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3270 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3271 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3272 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3273 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3274 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3280 for (i = 0; i != ns; ++i) {
3283 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3286 if (!list[i].eth_dev) {
3287 if (rte_errno != EBUSY && rte_errno != EEXIST)
3289 /* Device is disabled or already spawned. Ignore it. */
3292 restore = list[i].eth_dev->data->dev_flags;
3293 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3294 /* Restore non-PCI flags cleared by the above call. */
3295 list[i].eth_dev->data->dev_flags |= restore;
3296 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3297 rte_eth_dev_probing_finish(list[i].eth_dev);
3301 "probe of PCI device " PCI_PRI_FMT " aborted after"
3302 " encountering an error: %s",
3303 pci_dev->addr.domain, pci_dev->addr.bus,
3304 pci_dev->addr.devid, pci_dev->addr.function,
3305 strerror(rte_errno));
3309 if (!list[i].eth_dev)
3311 mlx5_dev_close(list[i].eth_dev);
3312 /* mac_addrs must not be freed because in dev_private */
3313 list[i].eth_dev->data->mac_addrs = NULL;
3314 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3316 /* Restore original error. */
3323 * Do the routine cleanup:
3324 * - close opened Netlink sockets
3325 * - free allocated spawn data array
3326 * - free the Infiniband device list
3335 mlx5_glue->free_device_list(ibv_list);
3340 * Look for the ethernet device belonging to mlx5 driver.
3342 * @param[in] port_id
3343 * port_id to start looking for device.
3344 * @param[in] pci_dev
3345 * Pointer to the hint PCI device. When device is being probed
3346 * the its siblings (master and preceding representors might
3347 * not have assigned driver yet (because the mlx5_pci_probe()
3348 * is not completed yet, for this case match on hint PCI
3349 * device may be used to detect sibling device.
3352 * port_id of found device, RTE_MAX_ETHPORT if not found.
3355 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3357 while (port_id < RTE_MAX_ETHPORTS) {
3358 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3360 if (dev->state != RTE_ETH_DEV_UNUSED &&
3362 (dev->device == &pci_dev->device ||
3363 (dev->device->driver &&
3364 dev->device->driver->name &&
3365 !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3369 if (port_id >= RTE_MAX_ETHPORTS)
3370 return RTE_MAX_ETHPORTS;
3375 * DPDK callback to remove a PCI device.
3377 * This function removes all Ethernet devices belong to a given PCI device.
3379 * @param[in] pci_dev
3380 * Pointer to the PCI device.
3383 * 0 on success, the function cannot fail.
3386 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3390 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3391 rte_eth_dev_close(port_id);
3395 static const struct rte_pci_id mlx5_pci_id_map[] = {
3397 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3398 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3401 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3402 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3405 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3406 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3409 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3410 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3413 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3414 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3417 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3418 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3421 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3422 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3425 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3426 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3429 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3430 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3433 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3434 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3437 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3438 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3441 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3442 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3445 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3446 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3449 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3450 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3457 static struct rte_pci_driver mlx5_driver = {
3459 .name = MLX5_DRIVER_NAME
3461 .id_table = mlx5_pci_id_map,
3462 .probe = mlx5_pci_probe,
3463 .remove = mlx5_pci_remove,
3464 .dma_map = mlx5_dma_map,
3465 .dma_unmap = mlx5_dma_unmap,
3466 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3467 RTE_PCI_DRV_PROBE_AGAIN,
3470 #ifdef RTE_IBVERBS_LINK_DLOPEN
3473 * Suffix RTE_EAL_PMD_PATH with "-glue".
3475 * This function performs a sanity check on RTE_EAL_PMD_PATH before
3476 * suffixing its last component.
3479 * Output buffer, should be large enough otherwise NULL is returned.
3484 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
3487 mlx5_glue_path(char *buf, size_t size)
3489 static const char *const bad[] = { "/", ".", "..", NULL };
3490 const char *path = RTE_EAL_PMD_PATH;
3491 size_t len = strlen(path);
3495 while (len && path[len - 1] == '/')
3497 for (off = len; off && path[off - 1] != '/'; --off)
3499 for (i = 0; bad[i]; ++i)
3500 if (!strncmp(path + off, bad[i], (int)(len - off)))
3502 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3503 if (i == -1 || (size_t)i >= size)
3508 "unable to append \"-glue\" to last component of"
3509 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3510 " please re-configure DPDK");
3515 * Initialization routine for run-time dependency on rdma-core.
3518 mlx5_glue_init(void)
3520 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3521 const char *path[] = {
3523 * A basic security check is necessary before trusting
3524 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3526 (geteuid() == getuid() && getegid() == getgid() ?
3527 getenv("MLX5_GLUE_PATH") : NULL),
3529 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3530 * variant, otherwise let dlopen() look up libraries on its
3533 (*RTE_EAL_PMD_PATH ?
3534 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3537 void *handle = NULL;
3541 while (!handle && i != RTE_DIM(path)) {
3550 end = strpbrk(path[i], ":;");
3552 end = path[i] + strlen(path[i]);
3553 len = end - path[i];
3558 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3560 (!len || *(end - 1) == '/') ? "" : "/");
3563 if (sizeof(name) != (size_t)ret + 1)
3565 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3567 handle = dlopen(name, RTLD_LAZY);
3578 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3581 sym = dlsym(handle, "mlx5_glue");
3582 if (!sym || !*sym) {
3586 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3595 "cannot initialize PMD due to missing run-time dependency on"
3596 " rdma-core libraries (libibverbs, libmlx5)");
3603 * Driver initialization routine.
3605 RTE_INIT(rte_mlx5_pmd_init)
3607 /* Initialize driver log type. */
3608 mlx5_logtype = rte_log_register("pmd.net.mlx5");
3609 if (mlx5_logtype >= 0)
3610 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3612 /* Build the static tables for Verbs conversion. */
3613 mlx5_set_ptype_table();
3614 mlx5_set_cksum_table();
3615 mlx5_set_swp_types_table();
3617 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3618 * huge pages. Calling ibv_fork_init() during init allows
3619 * applications to use fork() safely for purposes other than
3620 * using this PMD, which is not supported in forked processes.
3622 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3623 /* Match the size of Rx completion entry to the size of a cacheline. */
3624 if (RTE_CACHE_LINE_SIZE == 128)
3625 setenv("MLX5_CQE_SIZE", "128", 0);
3627 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3628 * cleanup all the Verbs resources even when the device was removed.
3630 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3631 #ifdef RTE_IBVERBS_LINK_DLOPEN
3632 if (mlx5_glue_init())
3637 /* Glue structure must not contain any NULL pointers. */
3641 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3642 assert(((const void *const *)mlx5_glue)[i]);
3645 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3647 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3648 mlx5_glue->version, MLX5_GLUE_VERSION);
3651 mlx5_glue->fork_init();
3652 rte_pci_register(&mlx5_driver);
3655 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3656 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3657 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");