drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40 #include <rte_alarm.h>
  41
  42 #include "mlx5.h"
  43 #include "mlx5_utils.h"
  44 #include "mlx5_rxtx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_defs.h"
  47 #include "mlx5_glue.h"
  48 #include "mlx5_mr.h"
  49 #include "mlx5_flow.h"
  50
  51 /* Device parameter to enable RX completion queue compression. */
  52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  53
  54 /* Device parameter to enable RX completion entry padding to 128B. */
  55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  56
  57 /* Device parameter to enable padding Rx packet to cacheline size. */
  58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  59
  60 /* Device parameter to enable Multi-Packet Rx queue. */
  61 #define MLX5_RX_MPRQ_EN "mprq_en"
  62
  63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  65
  66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  68
  69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  71
  72 /* Device parameter to configure inline send. Deprecated, ignored.*/
  73 #define MLX5_TXQ_INLINE "txq_inline"
  74
  75 /*
  76  * Device parameter to configure the number of TX queues threshold for
  77  * enabling inline send.
  78  */
  79 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  80
  81 /*
  82  * Device parameter to configure the number of TX queues threshold for
  83  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  84  */
  85 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  86
  87 /* Device parameter to enable multi-packet send WQEs. */
  88 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  89
  90 /*
  91  * Device parameter to include 2 dsegs in the title WQEBB.
  92  * Deprecated, ignored.
  93  */
  94 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  95
  96 /*
  97  * Device parameter to limit the size of inlining packet.
  98  * Deprecated, ignored.
  99  */
 100 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 101
 102 /*
 103  * Device parameter to enable hardware Tx vector.
 104  * Deprecated, ignored (no vectorized Tx routines anymore).
 105  */
 106 #define MLX5_TX_VEC_EN "tx_vec_en"
 107
 108 /* Device parameter to enable hardware Rx vector. */
 109 #define MLX5_RX_VEC_EN "rx_vec_en"
 110
 111 /* Allow L3 VXLAN flow creation. */
 112 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 113
 114 /* Activate DV E-Switch flow steering. */
 115 #define MLX5_DV_ESW_EN "dv_esw_en"
 116
 117 /* Activate DV flow steering. */
 118 #define MLX5_DV_FLOW_EN "dv_flow_en"
 119
 120 /* Activate Netlink support in VF mode. */
 121 #define MLX5_VF_NL_EN "vf_nl_en"
 122
 123 /* Enable extending memsegs when creating a MR. */
 124 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 125
 126 /* Select port representors to instantiate. */
 127 #define MLX5_REPRESENTOR "representor"
 128
 129 /* Device parameter to configure the maximum number of dump files per queue. */
 130 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 131
 132 #ifndef HAVE_IBV_MLX5_MOD_MPW
 133 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 134 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 135 #endif
 136
 137 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 138 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 139 #endif
 140
 141 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 142
 143 /* Shared memory between primary and secondary processes. */
 144 struct mlx5_shared_data *mlx5_shared_data;
 145
 146 /* Spinlock for mlx5_shared_data allocation. */
 147 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 148
 149 /* Process local data for secondary processes. */
 150 static struct mlx5_local_data mlx5_local_data;
 151
 152 /** Driver-specific log messages type. */
 153 int mlx5_logtype;
 154
 155 /** Data associated with devices to spawn. */
 156 struct mlx5_dev_spawn_data {
 157         uint32_t ifindex; /**< Network interface index. */
 158         uint32_t max_port; /**< IB device maximal port index. */
 159         uint32_t ibv_port; /**< IB device physical port index. */
 160         struct mlx5_switch_info info; /**< Switch information. */
 161         struct ibv_device *ibv_dev; /**< Associated IB device. */
 162         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 163         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 164 };
 165
 166 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 167 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 168
 169 /**
 170  * Initialize the counters management structure.
 171  *
 172  * @param[in] sh
 173  *   Pointer to mlx5_ibv_shared object to free
 174  */
 175 static void
 176 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 177 {
 178         uint8_t i;
 179
 180         TAILQ_INIT(&sh->cmng.flow_counters);
 181         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 182                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 183 }
 184
 185 /**
 186  * Destroy all the resources allocated for a counter memory management.
 187  *
 188  * @param[in] mng
 189  *   Pointer to the memory management structure.
 190  */
 191 static void
 192 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 193 {
 194         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 195
 196         LIST_REMOVE(mng, next);
 197         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 198         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 199         rte_free(mem);
 200 }
 201
 202 /**
 203  * Close and release all the resources of the counters management.
 204  *
 205  * @param[in] sh
 206  *   Pointer to mlx5_ibv_shared object to free.
 207  */
 208 static void
 209 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 210 {
 211         struct mlx5_counter_stats_mem_mng *mng;
 212         uint8_t i;
 213         int j;
 214         int retries = 1024;
 215
 216         rte_errno = 0;
 217         while (--retries) {
 218                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 219                 if (rte_errno != EINPROGRESS)
 220                         break;
 221                 rte_pause();
 222         }
 223         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 224                 struct mlx5_flow_counter_pool *pool;
 225                 uint32_t batch = !!(i % 2);
 226
 227                 if (!sh->cmng.ccont[i].pools)
 228                         continue;
 229                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 230                 while (pool) {
 231                         if (batch) {
 232                                 if (pool->min_dcs)
 233                                         claim_zero
 234                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 235                         }
 236                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 237                                 if (pool->counters_raw[j].action)
 238                                         claim_zero
 239                                         (mlx5_glue->destroy_flow_action
 240                                                (pool->counters_raw[j].action));
 241                                 if (!batch && pool->counters_raw[j].dcs)
 242                                         claim_zero(mlx5_devx_cmd_destroy
 243                                                   (pool->counters_raw[j].dcs));
 244                         }
 245                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 246                                      next);
 247                         rte_free(pool);
 248                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 249                 }
 250                 rte_free(sh->cmng.ccont[i].pools);
 251         }
 252         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 253         while (mng) {
 254                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 255                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 256         }
 257         memset(&sh->cmng, 0, sizeof(sh->cmng));
 258 }
 259
 260 /**
 261  * Allocate shared IB device context. If there is multiport device the
 262  * master and representors will share this context, if there is single
 263  * port dedicated IB device, the context will be used by only given
 264  * port due to unification.
 265  *
 266  * Routine first searches the context for the specified IB device name,
 267  * if found the shared context assumed and reference counter is incremented.
 268  * If no context found the new one is created and initialized with specified
 269  * IB device context and parameters.
 270  *
 271  * @param[in] spawn
 272  *   Pointer to the IB device attributes (name, port, etc).
 273  *
 274  * @return
 275  *   Pointer to mlx5_ibv_shared object on success,
 276  *   otherwise NULL and rte_errno is set.
 277  */
 278 static struct mlx5_ibv_shared *
 279 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 280 {
 281         struct mlx5_ibv_shared *sh;
 282         int err = 0;
 283         uint32_t i;
 284
 285         assert(spawn);
 286         /* Secondary process should not create the shared context. */
 287         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 288         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 289         /* Search for IB context by device name. */
 290         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 291                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 292                         sh->refcnt++;
 293                         goto exit;
 294                 }
 295         }
 296         /* No device found, we have to create new shared context. */
 297         assert(spawn->max_port);
 298         sh = rte_zmalloc("ethdev shared ib context",
 299                          sizeof(struct mlx5_ibv_shared) +
 300                          spawn->max_port *
 301                          sizeof(struct mlx5_ibv_shared_port),
 302                          RTE_CACHE_LINE_SIZE);
 303         if (!sh) {
 304                 DRV_LOG(ERR, "shared context allocation failure");
 305                 rte_errno  = ENOMEM;
 306                 goto exit;
 307         }
 308         /* Try to open IB device with DV first, then usual Verbs. */
 309         errno = 0;
 310         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 311         if (sh->ctx) {
 312                 sh->devx = 1;
 313                 DRV_LOG(DEBUG, "DevX is supported");
 314         } else {
 315                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 316                 if (!sh->ctx) {
 317                         err = errno ? errno : ENODEV;
 318                         goto error;
 319                 }
 320                 DRV_LOG(DEBUG, "DevX is NOT supported");
 321         }
 322         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 323         if (err) {
 324                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 325                 goto error;
 326         }
 327         sh->refcnt = 1;
 328         sh->max_port = spawn->max_port;
 329         strncpy(sh->ibdev_name, sh->ctx->device->name,
 330                 sizeof(sh->ibdev_name));
 331         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 332                 sizeof(sh->ibdev_path));
 333         sh->pci_dev = spawn->pci_dev;
 334         pthread_mutex_init(&sh->intr_mutex, NULL);
 335         /*
 336          * Setting port_id to max unallowed value means
 337          * there is no interrupt subhandler installed for
 338          * the given port index i.
 339          */
 340         for (i = 0; i < sh->max_port; i++)
 341                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 342         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 343         if (sh->pd == NULL) {
 344                 DRV_LOG(ERR, "PD allocation failure");
 345                 err = ENOMEM;
 346                 goto error;
 347         }
 348         /*
 349          * Once the device is added to the list of memory event
 350          * callback, its global MR cache table cannot be expanded
 351          * on the fly because of deadlock. If it overflows, lookup
 352          * should be done by searching MR list linearly, which is slow.
 353          *
 354          * At this point the device is not added to the memory
 355          * event list yet, context is just being created.
 356          */
 357         err = mlx5_mr_btree_init(&sh->mr.cache,
 358                                  MLX5_MR_BTREE_CACHE_N * 2,
 359                                  sh->pci_dev->device.numa_node);
 360         if (err) {
 361                 err = rte_errno;
 362                 goto error;
 363         }
 364         mlx5_flow_counters_mng_init(sh);
 365         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 366 exit:
 367         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 368         return sh;
 369 error:
 370         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 371         assert(sh);
 372         if (sh->pd)
 373                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 374         if (sh->ctx)
 375                 claim_zero(mlx5_glue->close_device(sh->ctx));
 376         rte_free(sh);
 377         assert(err > 0);
 378         rte_errno = err;
 379         return NULL;
 380 }
 381
 382 /**
 383  * Free shared IB device context. Decrement counter and if zero free
 384  * all allocated resources and close handles.
 385  *
 386  * @param[in] sh
 387  *   Pointer to mlx5_ibv_shared object to free
 388  */
 389 static void
 390 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 391 {
 392         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 393 #ifndef NDEBUG
 394         /* Check the object presence in the list. */
 395         struct mlx5_ibv_shared *lctx;
 396
 397         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 398                 if (lctx == sh)
 399                         break;
 400         assert(lctx);
 401         if (lctx != sh) {
 402                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 403                 goto exit;
 404         }
 405 #endif
 406         assert(sh);
 407         assert(sh->refcnt);
 408         /* Secondary process should not free the shared context. */
 409         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 410         if (--sh->refcnt)
 411                 goto exit;
 412         /* Release created Memory Regions. */
 413         mlx5_mr_release(sh);
 414         LIST_REMOVE(sh, next);
 415         /*
 416          *  Ensure there is no async event handler installed.
 417          *  Only primary process handles async device events.
 418          **/
 419         mlx5_flow_counters_mng_close(sh);
 420         assert(!sh->intr_cnt);
 421         if (sh->intr_cnt)
 422                 mlx5_intr_callback_unregister
 423                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 424         pthread_mutex_destroy(&sh->intr_mutex);
 425         if (sh->pd)
 426                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 427         if (sh->ctx)
 428                 claim_zero(mlx5_glue->close_device(sh->ctx));
 429         rte_free(sh);
 430 exit:
 431         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 432 }
 433
 434 /**
 435  * Initialize DR related data within private structure.
 436  * Routine checks the reference counter and does actual
 437  * resources creation/initialization only if counter is zero.
 438  *
 439  * @param[in] priv
 440  *   Pointer to the private device data structure.
 441  *
 442  * @return
 443  *   Zero on success, positive error code otherwise.
 444  */
 445 static int
 446 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 447 {
 448 #ifdef HAVE_MLX5DV_DR
 449         struct mlx5_ibv_shared *sh = priv->sh;
 450         int err = 0;
 451         void *domain;
 452
 453         assert(sh);
 454         if (sh->dv_refcnt) {
 455                 /* Shared DV/DR structures is already initialized. */
 456                 sh->dv_refcnt++;
 457                 priv->dr_shared = 1;
 458                 return 0;
 459         }
 460         /* Reference counter is zero, we should initialize structures. */
 461         domain = mlx5_glue->dr_create_domain(sh->ctx,
 462                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 463         if (!domain) {
 464                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 465                 err = errno;
 466                 goto error;
 467         }
 468         sh->rx_domain = domain;
 469         domain = mlx5_glue->dr_create_domain(sh->ctx,
 470                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 471         if (!domain) {
 472                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 473                 err = errno;
 474                 goto error;
 475         }
 476         pthread_mutex_init(&sh->dv_mutex, NULL);
 477         sh->tx_domain = domain;
 478 #ifdef HAVE_MLX5DV_DR_ESWITCH
 479         if (priv->config.dv_esw_en) {
 480                 domain  = mlx5_glue->dr_create_domain
 481                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 482                 if (!domain) {
 483                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 484                         err = errno;
 485                         goto error;
 486                 }
 487                 sh->fdb_domain = domain;
 488                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 489         }
 490 #endif
 491         sh->dv_refcnt++;
 492         priv->dr_shared = 1;
 493         return 0;
 494
 495 error:
 496        /* Rollback the created objects. */
 497         if (sh->rx_domain) {
 498                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 499                 sh->rx_domain = NULL;
 500         }
 501         if (sh->tx_domain) {
 502                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 503                 sh->tx_domain = NULL;
 504         }
 505         if (sh->fdb_domain) {
 506                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 507                 sh->fdb_domain = NULL;
 508         }
 509         if (sh->esw_drop_action) {
 510                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 511                 sh->esw_drop_action = NULL;
 512         }
 513         return err;
 514 #else
 515         (void)priv;
 516         return 0;
 517 #endif
 518 }
 519
 520 /**
 521  * Destroy DR related data within private structure.
 522  *
 523  * @param[in] priv
 524  *   Pointer to the private device data structure.
 525  */
 526 static void
 527 mlx5_free_shared_dr(struct mlx5_priv *priv)
 528 {
 529 #ifdef HAVE_MLX5DV_DR
 530         struct mlx5_ibv_shared *sh;
 531
 532         if (!priv->dr_shared)
 533                 return;
 534         priv->dr_shared = 0;
 535         sh = priv->sh;
 536         assert(sh);
 537         assert(sh->dv_refcnt);
 538         if (sh->dv_refcnt && --sh->dv_refcnt)
 539                 return;
 540         if (sh->rx_domain) {
 541                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 542                 sh->rx_domain = NULL;
 543         }
 544         if (sh->tx_domain) {
 545                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 546                 sh->tx_domain = NULL;
 547         }
 548 #ifdef HAVE_MLX5DV_DR_ESWITCH
 549         if (sh->fdb_domain) {
 550                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 551                 sh->fdb_domain = NULL;
 552         }
 553         if (sh->esw_drop_action) {
 554                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 555                 sh->esw_drop_action = NULL;
 556         }
 557 #endif
 558         pthread_mutex_destroy(&sh->dv_mutex);
 559 #else
 560         (void)priv;
 561 #endif
 562 }
 563
 564 /**
 565  * Initialize shared data between primary and secondary process.
 566  *
 567  * A memzone is reserved by primary process and secondary processes attach to
 568  * the memzone.
 569  *
 570  * @return
 571  *   0 on success, a negative errno value otherwise and rte_errno is set.
 572  */
 573 static int
 574 mlx5_init_shared_data(void)
 575 {
 576         const struct rte_memzone *mz;
 577         int ret = 0;
 578
 579         rte_spinlock_lock(&mlx5_shared_data_lock);
 580         if (mlx5_shared_data == NULL) {
 581                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 582                         /* Allocate shared memory. */
 583                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 584                                                  sizeof(*mlx5_shared_data),
 585                                                  SOCKET_ID_ANY, 0);
 586                         if (mz == NULL) {
 587                                 DRV_LOG(ERR,
 588                                         "Cannot allocate mlx5 shared data\n");
 589                                 ret = -rte_errno;
 590                                 goto error;
 591                         }
 592                         mlx5_shared_data = mz->addr;
 593                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 594                         rte_spinlock_init(&mlx5_shared_data->lock);
 595                 } else {
 596                         /* Lookup allocated shared memory. */
 597                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 598                         if (mz == NULL) {
 599                                 DRV_LOG(ERR,
 600                                         "Cannot attach mlx5 shared data\n");
 601                                 ret = -rte_errno;
 602                                 goto error;
 603                         }
 604                         mlx5_shared_data = mz->addr;
 605                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 606                 }
 607         }
 608 error:
 609         rte_spinlock_unlock(&mlx5_shared_data_lock);
 610         return ret;
 611 }
 612
 613 /**
 614  * Retrieve integer value from environment variable.
 615  *
 616  * @param[in] name
 617  *   Environment variable name.
 618  *
 619  * @return
 620  *   Integer value, 0 if the variable is not set.
 621  */
 622 int
 623 mlx5_getenv_int(const char *name)
 624 {
 625         const char *val = getenv(name);
 626
 627         if (val == NULL)
 628                 return 0;
 629         return atoi(val);
 630 }
 631
 632 /**
 633  * Verbs callback to allocate a memory. This function should allocate the space
 634  * according to the size provided residing inside a huge page.
 635  * Please note that all allocation must respect the alignment from libmlx5
 636  * (i.e. currently sysconf(_SC_PAGESIZE)).
 637  *
 638  * @param[in] size
 639  *   The size in bytes of the memory to allocate.
 640  * @param[in] data
 641  *   A pointer to the callback data.
 642  *
 643  * @return
 644  *   Allocated buffer, NULL otherwise and rte_errno is set.
 645  */
 646 static void *
 647 mlx5_alloc_verbs_buf(size_t size, void *data)
 648 {
 649         struct mlx5_priv *priv = data;
 650         void *ret;
 651         size_t alignment = sysconf(_SC_PAGESIZE);
 652         unsigned int socket = SOCKET_ID_ANY;
 653
 654         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 655                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 656
 657                 socket = ctrl->socket;
 658         } else if (priv->verbs_alloc_ctx.type ==
 659                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 660                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 661
 662                 socket = ctrl->socket;
 663         }
 664         assert(data != NULL);
 665         ret = rte_malloc_socket(__func__, size, alignment, socket);
 666         if (!ret && size)
 667                 rte_errno = ENOMEM;
 668         return ret;
 669 }
 670
 671 /**
 672  * Verbs callback to free a memory.
 673  *
 674  * @param[in] ptr
 675  *   A pointer to the memory to free.
 676  * @param[in] data
 677  *   A pointer to the callback data.
 678  */
 679 static void
 680 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 681 {
 682         assert(data != NULL);
 683         rte_free(ptr);
 684 }
 685
 686 /**
 687  * Initialize process private data structure.
 688  *
 689  * @param dev
 690  *   Pointer to Ethernet device structure.
 691  *
 692  * @return
 693  *   0 on success, a negative errno value otherwise and rte_errno is set.
 694  */
 695 int
 696 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 697 {
 698         struct mlx5_priv *priv = dev->data->dev_private;
 699         struct mlx5_proc_priv *ppriv;
 700         size_t ppriv_size;
 701
 702         /*
 703          * UAR register table follows the process private structure. BlueFlame
 704          * registers for Tx queues are stored in the table.
 705          */
 706         ppriv_size =
 707                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 708         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 709                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 710         if (!ppriv) {
 711                 rte_errno = ENOMEM;
 712                 return -rte_errno;
 713         }
 714         ppriv->uar_table_sz = ppriv_size;
 715         dev->process_private = ppriv;
 716         return 0;
 717 }
 718
 719 /**
 720  * Un-initialize process private data structure.
 721  *
 722  * @param dev
 723  *   Pointer to Ethernet device structure.
 724  */
 725 static void
 726 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 727 {
 728         if (!dev->process_private)
 729                 return;
 730         rte_free(dev->process_private);
 731         dev->process_private = NULL;
 732 }
 733
 734 /**
 735  * DPDK callback to close the device.
 736  *
 737  * Destroy all queues and objects, free memory.
 738  *
 739  * @param dev
 740  *   Pointer to Ethernet device structure.
 741  */
 742 static void
 743 mlx5_dev_close(struct rte_eth_dev *dev)
 744 {
 745         struct mlx5_priv *priv = dev->data->dev_private;
 746         unsigned int i;
 747         int ret;
 748
 749         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 750                 dev->data->port_id,
 751                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 752         /* In case mlx5_dev_stop() has not been called. */
 753         mlx5_dev_interrupt_handler_uninstall(dev);
 754         mlx5_traffic_disable(dev);
 755         mlx5_flow_flush(dev, NULL);
 756         /* Prevent crashes when queues are still in use. */
 757         dev->rx_pkt_burst = removed_rx_burst;
 758         dev->tx_pkt_burst = removed_tx_burst;
 759         rte_wmb();
 760         /* Disable datapath on secondary process. */
 761         mlx5_mp_req_stop_rxtx(dev);
 762         if (priv->rxqs != NULL) {
 763                 /* XXX race condition if mlx5_rx_burst() is still running. */
 764                 usleep(1000);
 765                 for (i = 0; (i != priv->rxqs_n); ++i)
 766                         mlx5_rxq_release(dev, i);
 767                 priv->rxqs_n = 0;
 768                 priv->rxqs = NULL;
 769         }
 770         if (priv->txqs != NULL) {
 771                 /* XXX race condition if mlx5_tx_burst() is still running. */
 772                 usleep(1000);
 773                 for (i = 0; (i != priv->txqs_n); ++i)
 774                         mlx5_txq_release(dev, i);
 775                 priv->txqs_n = 0;
 776                 priv->txqs = NULL;
 777         }
 778         mlx5_proc_priv_uninit(dev);
 779         mlx5_mprq_free_mp(dev);
 780         /* Remove from memory callback device list. */
 781         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 782         assert(priv->sh);
 783         LIST_REMOVE(priv->sh, mem_event_cb);
 784         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 785         mlx5_free_shared_dr(priv);
 786         if (priv->rss_conf.rss_key != NULL)
 787                 rte_free(priv->rss_conf.rss_key);
 788         if (priv->reta_idx != NULL)
 789                 rte_free(priv->reta_idx);
 790         if (priv->config.vf)
 791                 mlx5_nl_mac_addr_flush(dev);
 792         if (priv->nl_socket_route >= 0)
 793                 close(priv->nl_socket_route);
 794         if (priv->nl_socket_rdma >= 0)
 795                 close(priv->nl_socket_rdma);
 796         if (priv->sh) {
 797                 /*
 798                  * Free the shared context in last turn, because the cleanup
 799                  * routines above may use some shared fields, like
 800                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 801                  * ifindex if Netlink fails.
 802                  */
 803                 mlx5_free_shared_ibctx(priv->sh);
 804                 priv->sh = NULL;
 805         }
 806         ret = mlx5_hrxq_ibv_verify(dev);
 807         if (ret)
 808                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 809                         dev->data->port_id);
 810         ret = mlx5_ind_table_ibv_verify(dev);
 811         if (ret)
 812                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 813                         dev->data->port_id);
 814         ret = mlx5_rxq_ibv_verify(dev);
 815         if (ret)
 816                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 817                         dev->data->port_id);
 818         ret = mlx5_rxq_verify(dev);
 819         if (ret)
 820                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 821                         dev->data->port_id);
 822         ret = mlx5_txq_ibv_verify(dev);
 823         if (ret)
 824                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 825                         dev->data->port_id);
 826         ret = mlx5_txq_verify(dev);
 827         if (ret)
 828                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 829                         dev->data->port_id);
 830         ret = mlx5_flow_verify(dev);
 831         if (ret)
 832                 DRV_LOG(WARNING, "port %u some flows still remain",
 833                         dev->data->port_id);
 834         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 835                 unsigned int c = 0;
 836                 uint16_t port_id;
 837
 838                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 839                         struct mlx5_priv *opriv =
 840                                 rte_eth_devices[port_id].data->dev_private;
 841
 842                         if (!opriv ||
 843                             opriv->domain_id != priv->domain_id ||
 844                             &rte_eth_devices[port_id] == dev)
 845                                 continue;
 846                         ++c;
 847                 }
 848                 if (!c)
 849                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 850         }
 851         memset(priv, 0, sizeof(*priv));
 852         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 853         /*
 854          * Reset mac_addrs to NULL such that it is not freed as part of
 855          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 856          * it is freed when dev_private is freed.
 857          */
 858         dev->data->mac_addrs = NULL;
 859 }
 860
 861 const struct eth_dev_ops mlx5_dev_ops = {
 862         .dev_configure = mlx5_dev_configure,
 863         .dev_start = mlx5_dev_start,
 864         .dev_stop = mlx5_dev_stop,
 865         .dev_set_link_down = mlx5_set_link_down,
 866         .dev_set_link_up = mlx5_set_link_up,
 867         .dev_close = mlx5_dev_close,
 868         .promiscuous_enable = mlx5_promiscuous_enable,
 869         .promiscuous_disable = mlx5_promiscuous_disable,
 870         .allmulticast_enable = mlx5_allmulticast_enable,
 871         .allmulticast_disable = mlx5_allmulticast_disable,
 872         .link_update = mlx5_link_update,
 873         .stats_get = mlx5_stats_get,
 874         .stats_reset = mlx5_stats_reset,
 875         .xstats_get = mlx5_xstats_get,
 876         .xstats_reset = mlx5_xstats_reset,
 877         .xstats_get_names = mlx5_xstats_get_names,
 878         .fw_version_get = mlx5_fw_version_get,
 879         .dev_infos_get = mlx5_dev_infos_get,
 880         .read_clock = mlx5_read_clock,
 881         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 882         .vlan_filter_set = mlx5_vlan_filter_set,
 883         .rx_queue_setup = mlx5_rx_queue_setup,
 884         .tx_queue_setup = mlx5_tx_queue_setup,
 885         .rx_queue_release = mlx5_rx_queue_release,
 886         .tx_queue_release = mlx5_tx_queue_release,
 887         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 888         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 889         .mac_addr_remove = mlx5_mac_addr_remove,
 890         .mac_addr_add = mlx5_mac_addr_add,
 891         .mac_addr_set = mlx5_mac_addr_set,
 892         .set_mc_addr_list = mlx5_set_mc_addr_list,
 893         .mtu_set = mlx5_dev_set_mtu,
 894         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 895         .vlan_offload_set = mlx5_vlan_offload_set,
 896         .reta_update = mlx5_dev_rss_reta_update,
 897         .reta_query = mlx5_dev_rss_reta_query,
 898         .rss_hash_update = mlx5_rss_hash_update,
 899         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 900         .filter_ctrl = mlx5_dev_filter_ctrl,
 901         .rx_descriptor_status = mlx5_rx_descriptor_status,
 902         .tx_descriptor_status = mlx5_tx_descriptor_status,
 903         .rx_queue_count = mlx5_rx_queue_count,
 904         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 905         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 906         .is_removed = mlx5_is_removed,
 907 };
 908
 909 /* Available operations from secondary process. */
 910 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 911         .stats_get = mlx5_stats_get,
 912         .stats_reset = mlx5_stats_reset,
 913         .xstats_get = mlx5_xstats_get,
 914         .xstats_reset = mlx5_xstats_reset,
 915         .xstats_get_names = mlx5_xstats_get_names,
 916         .fw_version_get = mlx5_fw_version_get,
 917         .dev_infos_get = mlx5_dev_infos_get,
 918         .rx_descriptor_status = mlx5_rx_descriptor_status,
 919         .tx_descriptor_status = mlx5_tx_descriptor_status,
 920 };
 921
 922 /* Available operations in flow isolated mode. */
 923 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 924         .dev_configure = mlx5_dev_configure,
 925         .dev_start = mlx5_dev_start,
 926         .dev_stop = mlx5_dev_stop,
 927         .dev_set_link_down = mlx5_set_link_down,
 928         .dev_set_link_up = mlx5_set_link_up,
 929         .dev_close = mlx5_dev_close,
 930         .promiscuous_enable = mlx5_promiscuous_enable,
 931         .promiscuous_disable = mlx5_promiscuous_disable,
 932         .allmulticast_enable = mlx5_allmulticast_enable,
 933         .allmulticast_disable = mlx5_allmulticast_disable,
 934         .link_update = mlx5_link_update,
 935         .stats_get = mlx5_stats_get,
 936         .stats_reset = mlx5_stats_reset,
 937         .xstats_get = mlx5_xstats_get,
 938         .xstats_reset = mlx5_xstats_reset,
 939         .xstats_get_names = mlx5_xstats_get_names,
 940         .fw_version_get = mlx5_fw_version_get,
 941         .dev_infos_get = mlx5_dev_infos_get,
 942         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 943         .vlan_filter_set = mlx5_vlan_filter_set,
 944         .rx_queue_setup = mlx5_rx_queue_setup,
 945         .tx_queue_setup = mlx5_tx_queue_setup,
 946         .rx_queue_release = mlx5_rx_queue_release,
 947         .tx_queue_release = mlx5_tx_queue_release,
 948         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 949         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 950         .mac_addr_remove = mlx5_mac_addr_remove,
 951         .mac_addr_add = mlx5_mac_addr_add,
 952         .mac_addr_set = mlx5_mac_addr_set,
 953         .set_mc_addr_list = mlx5_set_mc_addr_list,
 954         .mtu_set = mlx5_dev_set_mtu,
 955         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 956         .vlan_offload_set = mlx5_vlan_offload_set,
 957         .filter_ctrl = mlx5_dev_filter_ctrl,
 958         .rx_descriptor_status = mlx5_rx_descriptor_status,
 959         .tx_descriptor_status = mlx5_tx_descriptor_status,
 960         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 961         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 962         .is_removed = mlx5_is_removed,
 963 };
 964
 965 /**
 966  * Verify and store value for device argument.
 967  *
 968  * @param[in] key
 969  *   Key argument to verify.
 970  * @param[in] val
 971  *   Value associated with key.
 972  * @param opaque
 973  *   User data.
 974  *
 975  * @return
 976  *   0 on success, a negative errno value otherwise and rte_errno is set.
 977  */
 978 static int
 979 mlx5_args_check(const char *key, const char *val, void *opaque)
 980 {
 981         struct mlx5_dev_config *config = opaque;
 982         unsigned long tmp;
 983
 984         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 985         if (!strcmp(MLX5_REPRESENTOR, key))
 986                 return 0;
 987         errno = 0;
 988         tmp = strtoul(val, NULL, 0);
 989         if (errno) {
 990                 rte_errno = errno;
 991                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 992                 return -rte_errno;
 993         }
 994         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 995                 config->cqe_comp = !!tmp;
 996         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 997                 config->cqe_pad = !!tmp;
 998         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 999                 config->hw_padding = !!tmp;
1000         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1001                 config->mprq.enabled = !!tmp;
1002         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1003                 config->mprq.stride_num_n = tmp;
1004         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1005                 config->mprq.max_memcpy_len = tmp;
1006         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1007                 config->mprq.min_rxqs_num = tmp;
1008         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1009                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1010         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1011                 config->txqs_inline = tmp;
1012         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1013                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1014         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1015                 config->mps = !!tmp;
1016         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1017                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1018         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1019                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1020         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1021                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1022         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1023                 config->rx_vec_en = !!tmp;
1024         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1025                 config->l3_vxlan_en = !!tmp;
1026         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1027                 config->vf_nl_en = !!tmp;
1028         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1029                 config->dv_esw_en = !!tmp;
1030         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1031                 config->dv_flow_en = !!tmp;
1032         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1033                 config->mr_ext_memseg_en = !!tmp;
1034         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1035                 config->max_dump_files_num = tmp;
1036         } else {
1037                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1038                 rte_errno = EINVAL;
1039                 return -rte_errno;
1040         }
1041         return 0;
1042 }
1043
1044 /**
1045  * Parse device parameters.
1046  *
1047  * @param config
1048  *   Pointer to device configuration structure.
1049  * @param devargs
1050  *   Device arguments structure.
1051  *
1052  * @return
1053  *   0 on success, a negative errno value otherwise and rte_errno is set.
1054  */
1055 static int
1056 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1057 {
1058         const char **params = (const char *[]){
1059                 MLX5_RXQ_CQE_COMP_EN,
1060                 MLX5_RXQ_CQE_PAD_EN,
1061                 MLX5_RXQ_PKT_PAD_EN,
1062                 MLX5_RX_MPRQ_EN,
1063                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1064                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1065                 MLX5_RXQS_MIN_MPRQ,
1066                 MLX5_TXQ_INLINE,
1067                 MLX5_TXQS_MIN_INLINE,
1068                 MLX5_TXQS_MAX_VEC,
1069                 MLX5_TXQ_MPW_EN,
1070                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1071                 MLX5_TXQ_MAX_INLINE_LEN,
1072                 MLX5_TX_VEC_EN,
1073                 MLX5_RX_VEC_EN,
1074                 MLX5_L3_VXLAN_EN,
1075                 MLX5_VF_NL_EN,
1076                 MLX5_DV_ESW_EN,
1077                 MLX5_DV_FLOW_EN,
1078                 MLX5_MR_EXT_MEMSEG_EN,
1079                 MLX5_REPRESENTOR,
1080                 MLX5_MAX_DUMP_FILES_NUM,
1081                 NULL,
1082         };
1083         struct rte_kvargs *kvlist;
1084         int ret = 0;
1085         int i;
1086
1087         if (devargs == NULL)
1088                 return 0;
1089         /* Following UGLY cast is done to pass checkpatch. */
1090         kvlist = rte_kvargs_parse(devargs->args, params);
1091         if (kvlist == NULL) {
1092                 rte_errno = EINVAL;
1093                 return -rte_errno;
1094         }
1095         /* Process parameters. */
1096         for (i = 0; (params[i] != NULL); ++i) {
1097                 if (rte_kvargs_count(kvlist, params[i])) {
1098                         ret = rte_kvargs_process(kvlist, params[i],
1099                                                  mlx5_args_check, config);
1100                         if (ret) {
1101                                 rte_errno = EINVAL;
1102                                 rte_kvargs_free(kvlist);
1103                                 return -rte_errno;
1104                         }
1105                 }
1106         }
1107         rte_kvargs_free(kvlist);
1108         return 0;
1109 }
1110
1111 static struct rte_pci_driver mlx5_driver;
1112
1113 /**
1114  * PMD global initialization.
1115  *
1116  * Independent from individual device, this function initializes global
1117  * per-PMD data structures distinguishing primary and secondary processes.
1118  * Hence, each initialization is called once per a process.
1119  *
1120  * @return
1121  *   0 on success, a negative errno value otherwise and rte_errno is set.
1122  */
1123 static int
1124 mlx5_init_once(void)
1125 {
1126         struct mlx5_shared_data *sd;
1127         struct mlx5_local_data *ld = &mlx5_local_data;
1128         int ret = 0;
1129
1130         if (mlx5_init_shared_data())
1131                 return -rte_errno;
1132         sd = mlx5_shared_data;
1133         assert(sd);
1134         rte_spinlock_lock(&sd->lock);
1135         switch (rte_eal_process_type()) {
1136         case RTE_PROC_PRIMARY:
1137                 if (sd->init_done)
1138                         break;
1139                 LIST_INIT(&sd->mem_event_cb_list);
1140                 rte_rwlock_init(&sd->mem_event_rwlock);
1141                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1142                                                 mlx5_mr_mem_event_cb, NULL);
1143                 ret = mlx5_mp_init_primary();
1144                 if (ret)
1145                         goto out;
1146                 sd->init_done = true;
1147                 break;
1148         case RTE_PROC_SECONDARY:
1149                 if (ld->init_done)
1150                         break;
1151                 ret = mlx5_mp_init_secondary();
1152                 if (ret)
1153                         goto out;
1154                 ++sd->secondary_cnt;
1155                 ld->init_done = true;
1156                 break;
1157         default:
1158                 break;
1159         }
1160 out:
1161         rte_spinlock_unlock(&sd->lock);
1162         return ret;
1163 }
1164
1165 /**
1166  * Spawn an Ethernet device from Verbs information.
1167  *
1168  * @param dpdk_dev
1169  *   Backing DPDK device.
1170  * @param spawn
1171  *   Verbs device parameters (name, port, switch_info) to spawn.
1172  * @param config
1173  *   Device configuration parameters.
1174  *
1175  * @return
1176  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1177  *   is set. The following errors are defined:
1178  *
1179  *   EBUSY: device is not supposed to be spawned.
1180  *   EEXIST: device is already spawned
1181  */
1182 static struct rte_eth_dev *
1183 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1184                struct mlx5_dev_spawn_data *spawn,
1185                struct mlx5_dev_config config)
1186 {
1187         const struct mlx5_switch_info *switch_info = &spawn->info;
1188         struct mlx5_ibv_shared *sh = NULL;
1189         struct ibv_port_attr port_attr;
1190         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1191         struct rte_eth_dev *eth_dev = NULL;
1192         struct mlx5_priv *priv = NULL;
1193         int err = 0;
1194         unsigned int hw_padding = 0;
1195         unsigned int mps;
1196         unsigned int cqe_comp;
1197         unsigned int cqe_pad = 0;
1198         unsigned int tunnel_en = 0;
1199         unsigned int mpls_en = 0;
1200         unsigned int swp = 0;
1201         unsigned int mprq = 0;
1202         unsigned int mprq_min_stride_size_n = 0;
1203         unsigned int mprq_max_stride_size_n = 0;
1204         unsigned int mprq_min_stride_num_n = 0;
1205         unsigned int mprq_max_stride_num_n = 0;
1206         struct rte_ether_addr mac;
1207         char name[RTE_ETH_NAME_MAX_LEN];
1208         int own_domain_id = 0;
1209         uint16_t port_id;
1210         unsigned int i;
1211
1212         /* Determine if this port representor is supposed to be spawned. */
1213         if (switch_info->representor && dpdk_dev->devargs) {
1214                 struct rte_eth_devargs eth_da;
1215
1216                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1217                 if (err) {
1218                         rte_errno = -err;
1219                         DRV_LOG(ERR, "failed to process device arguments: %s",
1220                                 strerror(rte_errno));
1221                         return NULL;
1222                 }
1223                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1224                         if (eth_da.representor_ports[i] ==
1225                             (uint16_t)switch_info->port_name)
1226                                 break;
1227                 if (i == eth_da.nb_representor_ports) {
1228                         rte_errno = EBUSY;
1229                         return NULL;
1230                 }
1231         }
1232         /* Build device name. */
1233         if (!switch_info->representor)
1234                 strlcpy(name, dpdk_dev->name, sizeof(name));
1235         else
1236                 snprintf(name, sizeof(name), "%s_representor_%u",
1237                          dpdk_dev->name, switch_info->port_name);
1238         /* check if the device is already spawned */
1239         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1240                 rte_errno = EEXIST;
1241                 return NULL;
1242         }
1243         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1244         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1245                 eth_dev = rte_eth_dev_attach_secondary(name);
1246                 if (eth_dev == NULL) {
1247                         DRV_LOG(ERR, "can not attach rte ethdev");
1248                         rte_errno = ENOMEM;
1249                         return NULL;
1250                 }
1251                 eth_dev->device = dpdk_dev;
1252                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1253                 err = mlx5_proc_priv_init(eth_dev);
1254                 if (err)
1255                         return NULL;
1256                 /* Receive command fd from primary process */
1257                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1258                 if (err < 0)
1259                         return NULL;
1260                 /* Remap UAR for Tx queues. */
1261                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1262                 if (err)
1263                         return NULL;
1264                 /*
1265                  * Ethdev pointer is still required as input since
1266                  * the primary device is not accessible from the
1267                  * secondary process.
1268                  */
1269                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1270                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1271                 return eth_dev;
1272         }
1273         sh = mlx5_alloc_shared_ibctx(spawn);
1274         if (!sh)
1275                 return NULL;
1276         config.devx = sh->devx;
1277 #ifdef HAVE_IBV_MLX5_MOD_SWP
1278         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1279 #endif
1280         /*
1281          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1282          * as all ConnectX-5 devices.
1283          */
1284 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1285         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1286 #endif
1287 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1288         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1289 #endif
1290         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1291         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1292                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1293                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1294                         mps = MLX5_MPW_ENHANCED;
1295                 } else {
1296                         DRV_LOG(DEBUG, "MPW is supported");
1297                         mps = MLX5_MPW;
1298                 }
1299         } else {
1300                 DRV_LOG(DEBUG, "MPW isn't supported");
1301                 mps = MLX5_MPW_DISABLED;
1302         }
1303 #ifdef HAVE_IBV_MLX5_MOD_SWP
1304         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1305                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1306         DRV_LOG(DEBUG, "SWP support: %u", swp);
1307 #endif
1308         config.swp = !!swp;
1309 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1310         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1311                 struct mlx5dv_striding_rq_caps mprq_caps =
1312                         dv_attr.striding_rq_caps;
1313
1314                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1315                         mprq_caps.min_single_stride_log_num_of_bytes);
1316                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1317                         mprq_caps.max_single_stride_log_num_of_bytes);
1318                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1319                         mprq_caps.min_single_wqe_log_num_of_strides);
1320                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1321                         mprq_caps.max_single_wqe_log_num_of_strides);
1322                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1323                         mprq_caps.supported_qpts);
1324                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1325                 mprq = 1;
1326                 mprq_min_stride_size_n =
1327                         mprq_caps.min_single_stride_log_num_of_bytes;
1328                 mprq_max_stride_size_n =
1329                         mprq_caps.max_single_stride_log_num_of_bytes;
1330                 mprq_min_stride_num_n =
1331                         mprq_caps.min_single_wqe_log_num_of_strides;
1332                 mprq_max_stride_num_n =
1333                         mprq_caps.max_single_wqe_log_num_of_strides;
1334                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1335                                                    mprq_min_stride_num_n);
1336         }
1337 #endif
1338         if (RTE_CACHE_LINE_SIZE == 128 &&
1339             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1340                 cqe_comp = 0;
1341         else
1342                 cqe_comp = 1;
1343         config.cqe_comp = cqe_comp;
1344 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1345         /* Whether device supports 128B Rx CQE padding. */
1346         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1347                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1348 #endif
1349 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1350         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1351                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1352                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1353                              (dv_attr.tunnel_offloads_caps &
1354                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1355         }
1356         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1357                 tunnel_en ? "" : "not ");
1358 #else
1359         DRV_LOG(WARNING,
1360                 "tunnel offloading disabled due to old OFED/rdma-core version");
1361 #endif
1362         config.tunnel_en = tunnel_en;
1363 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1364         mpls_en = ((dv_attr.tunnel_offloads_caps &
1365                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1366                    (dv_attr.tunnel_offloads_caps &
1367                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1368         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1369                 mpls_en ? "" : "not ");
1370 #else
1371         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1372                 " old OFED/rdma-core version or firmware configuration");
1373 #endif
1374         config.mpls_en = mpls_en;
1375         /* Check port status. */
1376         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1377         if (err) {
1378                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1379                 goto error;
1380         }
1381         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1382                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1383                 err = EINVAL;
1384                 goto error;
1385         }
1386         if (port_attr.state != IBV_PORT_ACTIVE)
1387                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1388                         mlx5_glue->port_state_str(port_attr.state),
1389                         port_attr.state);
1390         /* Allocate private eth device data. */
1391         priv = rte_zmalloc("ethdev private structure",
1392                            sizeof(*priv),
1393                            RTE_CACHE_LINE_SIZE);
1394         if (priv == NULL) {
1395                 DRV_LOG(ERR, "priv allocation failure");
1396                 err = ENOMEM;
1397                 goto error;
1398         }
1399         priv->sh = sh;
1400         priv->ibv_port = spawn->ibv_port;
1401         priv->mtu = RTE_ETHER_MTU;
1402 #ifndef RTE_ARCH_64
1403         /* Initialize UAR access locks for 32bit implementations. */
1404         rte_spinlock_init(&priv->uar_lock_cq);
1405         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1406                 rte_spinlock_init(&priv->uar_lock[i]);
1407 #endif
1408         /* Some internal functions rely on Netlink sockets, open them now. */
1409         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1410         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1411         priv->nl_sn = 0;
1412         priv->representor = !!switch_info->representor;
1413         priv->master = !!switch_info->master;
1414         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1415         /*
1416          * Currently we support single E-Switch per PF configurations
1417          * only and vport_id field contains the vport index for
1418          * associated VF, which is deduced from representor port name.
1419          * For example, let's have the IB device port 10, it has
1420          * attached network device eth0, which has port name attribute
1421          * pf0vf2, we can deduce the VF number as 2, and set vport index
1422          * as 3 (2+1). This assigning schema should be changed if the
1423          * multiple E-Switch instances per PF configurations or/and PCI
1424          * subfunctions are added.
1425          */
1426         priv->vport_id = switch_info->representor ?
1427                          switch_info->port_name + 1 : -1;
1428         /* representor_id field keeps the unmodified port/VF index. */
1429         priv->representor_id = switch_info->representor ?
1430                                switch_info->port_name : -1;
1431         /*
1432          * Look for sibling devices in order to reuse their switch domain
1433          * if any, otherwise allocate one.
1434          */
1435         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1436                 const struct mlx5_priv *opriv =
1437                         rte_eth_devices[port_id].data->dev_private;
1438
1439                 if (!opriv ||
1440                         opriv->domain_id ==
1441                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1442                         continue;
1443                 priv->domain_id = opriv->domain_id;
1444                 break;
1445         }
1446         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1447                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1448                 if (err) {
1449                         err = rte_errno;
1450                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1451                                 strerror(rte_errno));
1452                         goto error;
1453                 }
1454                 own_domain_id = 1;
1455         }
1456         err = mlx5_args(&config, dpdk_dev->devargs);
1457         if (err) {
1458                 err = rte_errno;
1459                 DRV_LOG(ERR, "failed to process device arguments: %s",
1460                         strerror(rte_errno));
1461                 goto error;
1462         }
1463         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1464                             IBV_DEVICE_RAW_IP_CSUM);
1465         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1466                 (config.hw_csum ? "" : "not "));
1467 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1468         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1469         DRV_LOG(DEBUG, "counters are not supported");
1470 #endif
1471 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1472         if (config.dv_flow_en) {
1473                 DRV_LOG(WARNING, "DV flow is not supported");
1474                 config.dv_flow_en = 0;
1475         }
1476 #endif
1477         config.ind_table_max_size =
1478                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1479         /*
1480          * Remove this check once DPDK supports larger/variable
1481          * indirection tables.
1482          */
1483         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1484                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1485         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1486                 config.ind_table_max_size);
1487         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1488                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1489         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1490                 (config.hw_vlan_strip ? "" : "not "));
1491         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1492                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1493         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1494                 (config.hw_fcs_strip ? "" : "not "));
1495 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1496         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1497 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1498         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1499                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1500 #endif
1501         if (config.hw_padding && !hw_padding) {
1502                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1503                 config.hw_padding = 0;
1504         } else if (config.hw_padding) {
1505                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1506         }
1507         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1508                       (sh->device_attr.tso_caps.supported_qpts &
1509                        (1 << IBV_QPT_RAW_PACKET)));
1510         if (config.tso)
1511                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1512         /*
1513          * MPW is disabled by default, while the Enhanced MPW is enabled
1514          * by default.
1515          */
1516         if (config.mps == MLX5_ARG_UNSET)
1517                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1518                                                           MLX5_MPW_DISABLED;
1519         else
1520                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1521         DRV_LOG(INFO, "%sMPS is %s",
1522                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1523                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1524         if (config.cqe_comp && !cqe_comp) {
1525                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1526                 config.cqe_comp = 0;
1527         }
1528         if (config.cqe_pad && !cqe_pad) {
1529                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1530                 config.cqe_pad = 0;
1531         } else if (config.cqe_pad) {
1532                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1533         }
1534         if (config.mprq.enabled && mprq) {
1535                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1536                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1537                         config.mprq.stride_num_n =
1538                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1539                                         mprq_min_stride_num_n);
1540                         DRV_LOG(WARNING,
1541                                 "the number of strides"
1542                                 " for Multi-Packet RQ is out of range,"
1543                                 " setting default value (%u)",
1544                                 1 << config.mprq.stride_num_n);
1545                 }
1546                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1547                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1548         } else if (config.mprq.enabled && !mprq) {
1549                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1550                 config.mprq.enabled = 0;
1551         }
1552         if (config.max_dump_files_num == 0)
1553                 config.max_dump_files_num = 128;
1554         eth_dev = rte_eth_dev_allocate(name);
1555         if (eth_dev == NULL) {
1556                 DRV_LOG(ERR, "can not allocate rte ethdev");
1557                 err = ENOMEM;
1558                 goto error;
1559         }
1560         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1561         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1562         if (priv->representor) {
1563                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1564                 eth_dev->data->representor_id = priv->representor_id;
1565         }
1566         eth_dev->data->dev_private = priv;
1567         priv->dev_data = eth_dev->data;
1568         eth_dev->data->mac_addrs = priv->mac;
1569         eth_dev->device = dpdk_dev;
1570         /* Configure the first MAC address by default. */
1571         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1572                 DRV_LOG(ERR,
1573                         "port %u cannot get MAC address, is mlx5_en"
1574                         " loaded? (errno: %s)",
1575                         eth_dev->data->port_id, strerror(rte_errno));
1576                 err = ENODEV;
1577                 goto error;
1578         }
1579         DRV_LOG(INFO,
1580                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1581                 eth_dev->data->port_id,
1582                 mac.addr_bytes[0], mac.addr_bytes[1],
1583                 mac.addr_bytes[2], mac.addr_bytes[3],
1584                 mac.addr_bytes[4], mac.addr_bytes[5]);
1585 #ifndef NDEBUG
1586         {
1587                 char ifname[IF_NAMESIZE];
1588
1589                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1590                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1591                                 eth_dev->data->port_id, ifname);
1592                 else
1593                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1594                                 eth_dev->data->port_id);
1595         }
1596 #endif
1597         /* Get actual MTU if possible. */
1598         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1599         if (err) {
1600                 err = rte_errno;
1601                 goto error;
1602         }
1603         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1604                 priv->mtu);
1605         /* Initialize burst functions to prevent crashes before link-up. */
1606         eth_dev->rx_pkt_burst = removed_rx_burst;
1607         eth_dev->tx_pkt_burst = removed_tx_burst;
1608         eth_dev->dev_ops = &mlx5_dev_ops;
1609         /* Register MAC address. */
1610         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1611         if (config.vf && config.vf_nl_en)
1612                 mlx5_nl_mac_addr_sync(eth_dev);
1613         TAILQ_INIT(&priv->flows);
1614         TAILQ_INIT(&priv->ctrl_flows);
1615         /* Hint libmlx5 to use PMD allocator for data plane resources */
1616         struct mlx5dv_ctx_allocators alctr = {
1617                 .alloc = &mlx5_alloc_verbs_buf,
1618                 .free = &mlx5_free_verbs_buf,
1619                 .data = priv,
1620         };
1621         mlx5_glue->dv_set_context_attr(sh->ctx,
1622                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1623                                        (void *)((uintptr_t)&alctr));
1624         /* Bring Ethernet device up. */
1625         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1626                 eth_dev->data->port_id);
1627         mlx5_set_link_up(eth_dev);
1628         /*
1629          * Even though the interrupt handler is not installed yet,
1630          * interrupts will still trigger on the async_fd from
1631          * Verbs context returned by ibv_open_device().
1632          */
1633         mlx5_link_update(eth_dev, 0);
1634 #ifdef HAVE_IBV_DEVX_OBJ
1635         if (config.devx) {
1636                 priv->counter_fallback = 0;
1637                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1638                 if (err) {
1639                         err = -err;
1640                         goto error;
1641                 }
1642                 if (!config.hca_attr.flow_counters_dump)
1643                         priv->counter_fallback = 1;
1644 #ifndef HAVE_IBV_DEVX_ASYNC
1645                 priv->counter_fallback = 1;
1646 #endif
1647                 if (priv->counter_fallback)
1648                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1649         }
1650 #endif
1651 #ifdef HAVE_MLX5DV_DR_ESWITCH
1652         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1653               (switch_info->representor || switch_info->master)))
1654                 config.dv_esw_en = 0;
1655 #else
1656         config.dv_esw_en = 0;
1657 #endif
1658         /* Store device configuration on private structure. */
1659         priv->config = config;
1660         if (config.dv_flow_en) {
1661                 err = mlx5_alloc_shared_dr(priv);
1662                 if (err)
1663                         goto error;
1664         }
1665         /* Supported Verbs flow priority number detection. */
1666         err = mlx5_flow_discover_priorities(eth_dev);
1667         if (err < 0) {
1668                 err = -err;
1669                 goto error;
1670         }
1671         priv->config.flow_prio = err;
1672         /* Add device to memory callback list. */
1673         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1674         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1675                          sh, mem_event_cb);
1676         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1677         return eth_dev;
1678 error:
1679         if (priv) {
1680                 if (priv->sh)
1681                         mlx5_free_shared_dr(priv);
1682                 if (priv->nl_socket_route >= 0)
1683                         close(priv->nl_socket_route);
1684                 if (priv->nl_socket_rdma >= 0)
1685                         close(priv->nl_socket_rdma);
1686                 if (own_domain_id)
1687                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1688                 rte_free(priv);
1689                 if (eth_dev != NULL)
1690                         eth_dev->data->dev_private = NULL;
1691         }
1692         if (eth_dev != NULL) {
1693                 /* mac_addrs must not be freed alone because part of dev_private */
1694                 eth_dev->data->mac_addrs = NULL;
1695                 rte_eth_dev_release_port(eth_dev);
1696         }
1697         if (sh)
1698                 mlx5_free_shared_ibctx(sh);
1699         assert(err > 0);
1700         rte_errno = err;
1701         return NULL;
1702 }
1703
1704 /**
1705  * Comparison callback to sort device data.
1706  *
1707  * This is meant to be used with qsort().
1708  *
1709  * @param a[in]
1710  *   Pointer to pointer to first data object.
1711  * @param b[in]
1712  *   Pointer to pointer to second data object.
1713  *
1714  * @return
1715  *   0 if both objects are equal, less than 0 if the first argument is less
1716  *   than the second, greater than 0 otherwise.
1717  */
1718 static int
1719 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1720 {
1721         const struct mlx5_switch_info *si_a =
1722                 &((const struct mlx5_dev_spawn_data *)a)->info;
1723         const struct mlx5_switch_info *si_b =
1724                 &((const struct mlx5_dev_spawn_data *)b)->info;
1725         int ret;
1726
1727         /* Master device first. */
1728         ret = si_b->master - si_a->master;
1729         if (ret)
1730                 return ret;
1731         /* Then representor devices. */
1732         ret = si_b->representor - si_a->representor;
1733         if (ret)
1734                 return ret;
1735         /* Unidentified devices come last in no specific order. */
1736         if (!si_a->representor)
1737                 return 0;
1738         /* Order representors by name. */
1739         return si_a->port_name - si_b->port_name;
1740 }
1741
1742 /**
1743  * DPDK callback to register a PCI device.
1744  *
1745  * This function spawns Ethernet devices out of a given PCI device.
1746  *
1747  * @param[in] pci_drv
1748  *   PCI driver structure (mlx5_driver).
1749  * @param[in] pci_dev
1750  *   PCI device information.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1757                struct rte_pci_device *pci_dev)
1758 {
1759         struct ibv_device **ibv_list;
1760         /*
1761          * Number of found IB Devices matching with requested PCI BDF.
1762          * nd != 1 means there are multiple IB devices over the same
1763          * PCI device and we have representors and master.
1764          */
1765         unsigned int nd = 0;
1766         /*
1767          * Number of found IB device Ports. nd = 1 and np = 1..n means
1768          * we have the single multiport IB device, and there may be
1769          * representors attached to some of found ports.
1770          */
1771         unsigned int np = 0;
1772         /*
1773          * Number of DPDK ethernet devices to Spawn - either over
1774          * multiple IB devices or multiple ports of single IB device.
1775          * Actually this is the number of iterations to spawn.
1776          */
1777         unsigned int ns = 0;
1778         struct mlx5_dev_config dev_config;
1779         int ret;
1780
1781         ret = mlx5_init_once();
1782         if (ret) {
1783                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1784                         strerror(rte_errno));
1785                 return -rte_errno;
1786         }
1787         assert(pci_drv == &mlx5_driver);
1788         errno = 0;
1789         ibv_list = mlx5_glue->get_device_list(&ret);
1790         if (!ibv_list) {
1791                 rte_errno = errno ? errno : ENOSYS;
1792                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1793                 return -rte_errno;
1794         }
1795         /*
1796          * First scan the list of all Infiniband devices to find
1797          * matching ones, gathering into the list.
1798          */
1799         struct ibv_device *ibv_match[ret + 1];
1800         int nl_route = -1;
1801         int nl_rdma = -1;
1802         unsigned int i;
1803
1804         while (ret-- > 0) {
1805                 struct rte_pci_addr pci_addr;
1806
1807                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1808                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1809                         continue;
1810                 if (pci_dev->addr.domain != pci_addr.domain ||
1811                     pci_dev->addr.bus != pci_addr.bus ||
1812                     pci_dev->addr.devid != pci_addr.devid ||
1813                     pci_dev->addr.function != pci_addr.function)
1814                         continue;
1815                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1816                         ibv_list[ret]->name);
1817                 ibv_match[nd++] = ibv_list[ret];
1818         }
1819         ibv_match[nd] = NULL;
1820         if (!nd) {
1821                 /* No device matches, just complain and bail out. */
1822                 mlx5_glue->free_device_list(ibv_list);
1823                 DRV_LOG(WARNING,
1824                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1825                         " are kernel drivers loaded?",
1826                         pci_dev->addr.domain, pci_dev->addr.bus,
1827                         pci_dev->addr.devid, pci_dev->addr.function);
1828                 rte_errno = ENOENT;
1829                 ret = -rte_errno;
1830                 return ret;
1831         }
1832         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1833         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1834         if (nd == 1) {
1835                 /*
1836                  * Found single matching device may have multiple ports.
1837                  * Each port may be representor, we have to check the port
1838                  * number and check the representors existence.
1839                  */
1840                 if (nl_rdma >= 0)
1841                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1842                 if (!np)
1843                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1844                                          " ports number", ibv_match[0]->name);
1845         }
1846         /*
1847          * Now we can determine the maximal
1848          * amount of devices to be spawned.
1849          */
1850         struct mlx5_dev_spawn_data list[np ? np : nd];
1851
1852         if (np > 1) {
1853                 /*
1854                  * Single IB device with multiple ports found,
1855                  * it may be E-Switch master device and representors.
1856                  * We have to perform identification trough the ports.
1857                  */
1858                 assert(nl_rdma >= 0);
1859                 assert(ns == 0);
1860                 assert(nd == 1);
1861                 for (i = 1; i <= np; ++i) {
1862                         list[ns].max_port = np;
1863                         list[ns].ibv_port = i;
1864                         list[ns].ibv_dev = ibv_match[0];
1865                         list[ns].eth_dev = NULL;
1866                         list[ns].pci_dev = pci_dev;
1867                         list[ns].ifindex = mlx5_nl_ifindex
1868                                         (nl_rdma, list[ns].ibv_dev->name, i);
1869                         if (!list[ns].ifindex) {
1870                                 /*
1871                                  * No network interface index found for the
1872                                  * specified port, it means there is no
1873                                  * representor on this port. It's OK,
1874                                  * there can be disabled ports, for example
1875                                  * if sriov_numvfs < sriov_totalvfs.
1876                                  */
1877                                 continue;
1878                         }
1879                         ret = -1;
1880                         if (nl_route >= 0)
1881                                 ret = mlx5_nl_switch_info
1882                                                (nl_route,
1883                                                 list[ns].ifindex,
1884                                                 &list[ns].info);
1885                         if (ret || (!list[ns].info.representor &&
1886                                     !list[ns].info.master)) {
1887                                 /*
1888                                  * We failed to recognize representors with
1889                                  * Netlink, let's try to perform the task
1890                                  * with sysfs.
1891                                  */
1892                                 ret =  mlx5_sysfs_switch_info
1893                                                 (list[ns].ifindex,
1894                                                  &list[ns].info);
1895                         }
1896                         if (!ret && (list[ns].info.representor ^
1897                                      list[ns].info.master))
1898                                 ns++;
1899                 }
1900                 if (!ns) {
1901                         DRV_LOG(ERR,
1902                                 "unable to recognize master/representors"
1903                                 " on the IB device with multiple ports");
1904                         rte_errno = ENOENT;
1905                         ret = -rte_errno;
1906                         goto exit;
1907                 }
1908         } else {
1909                 /*
1910                  * The existence of several matching entries (nd > 1) means
1911                  * port representors have been instantiated. No existing Verbs
1912                  * call nor sysfs entries can tell them apart, this can only
1913                  * be done through Netlink calls assuming kernel drivers are
1914                  * recent enough to support them.
1915                  *
1916                  * In the event of identification failure through Netlink,
1917                  * try again through sysfs, then:
1918                  *
1919                  * 1. A single IB device matches (nd == 1) with single
1920                  *    port (np=0/1) and is not a representor, assume
1921                  *    no switch support.
1922                  *
1923                  * 2. Otherwise no safe assumptions can be made;
1924                  *    complain louder and bail out.
1925                  */
1926                 np = 1;
1927                 for (i = 0; i != nd; ++i) {
1928                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1929                         list[ns].max_port = 1;
1930                         list[ns].ibv_port = 1;
1931                         list[ns].ibv_dev = ibv_match[i];
1932                         list[ns].eth_dev = NULL;
1933                         list[ns].pci_dev = pci_dev;
1934                         list[ns].ifindex = 0;
1935                         if (nl_rdma >= 0)
1936                                 list[ns].ifindex = mlx5_nl_ifindex
1937                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1938                         if (!list[ns].ifindex) {
1939                                 char ifname[IF_NAMESIZE];
1940
1941                                 /*
1942                                  * Netlink failed, it may happen with old
1943                                  * ib_core kernel driver (before 4.16).
1944                                  * We can assume there is old driver because
1945                                  * here we are processing single ports IB
1946                                  * devices. Let's try sysfs to retrieve
1947                                  * the ifindex. The method works for
1948                                  * master device only.
1949                                  */
1950                                 if (nd > 1) {
1951                                         /*
1952                                          * Multiple devices found, assume
1953                                          * representors, can not distinguish
1954                                          * master/representor and retrieve
1955                                          * ifindex via sysfs.
1956                                          */
1957                                         continue;
1958                                 }
1959                                 ret = mlx5_get_master_ifname
1960                                         (ibv_match[i]->ibdev_path, &ifname);
1961                                 if (!ret)
1962                                         list[ns].ifindex =
1963                                                 if_nametoindex(ifname);
1964                                 if (!list[ns].ifindex) {
1965                                         /*
1966                                          * No network interface index found
1967                                          * for the specified device, it means
1968                                          * there it is neither representor
1969                                          * nor master.
1970                                          */
1971                                         continue;
1972                                 }
1973                         }
1974                         ret = -1;
1975                         if (nl_route >= 0)
1976                                 ret = mlx5_nl_switch_info
1977                                                (nl_route,
1978                                                 list[ns].ifindex,
1979                                                 &list[ns].info);
1980                         if (ret || (!list[ns].info.representor &&
1981                                     !list[ns].info.master)) {
1982                                 /*
1983                                  * We failed to recognize representors with
1984                                  * Netlink, let's try to perform the task
1985                                  * with sysfs.
1986                                  */
1987                                 ret =  mlx5_sysfs_switch_info
1988                                                 (list[ns].ifindex,
1989                                                  &list[ns].info);
1990                         }
1991                         if (!ret && (list[ns].info.representor ^
1992                                      list[ns].info.master)) {
1993                                 ns++;
1994                         } else if ((nd == 1) &&
1995                                    !list[ns].info.representor &&
1996                                    !list[ns].info.master) {
1997                                 /*
1998                                  * Single IB device with
1999                                  * one physical port and
2000                                  * attached network device.
2001                                  * May be SRIOV is not enabled
2002                                  * or there is no representors.
2003                                  */
2004                                 DRV_LOG(INFO, "no E-Switch support detected");
2005                                 ns++;
2006                                 break;
2007                         }
2008                 }
2009                 if (!ns) {
2010                         DRV_LOG(ERR,
2011                                 "unable to recognize master/representors"
2012                                 " on the multiple IB devices");
2013                         rte_errno = ENOENT;
2014                         ret = -rte_errno;
2015                         goto exit;
2016                 }
2017         }
2018         assert(ns);
2019         /*
2020          * Sort list to probe devices in natural order for users convenience
2021          * (i.e. master first, then representors from lowest to highest ID).
2022          */
2023         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2024         /* Default configuration. */
2025         dev_config = (struct mlx5_dev_config){
2026                 .hw_padding = 0,
2027                 .mps = MLX5_ARG_UNSET,
2028                 .rx_vec_en = 1,
2029                 .txqs_inline = MLX5_ARG_UNSET,
2030                 .vf_nl_en = 1,
2031                 .mr_ext_memseg_en = 1,
2032                 .mprq = {
2033                         .enabled = 0, /* Disabled by default. */
2034                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2035                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2036                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2037                 },
2038                 .dv_esw_en = 1,
2039         };
2040         /* Device specific configuration. */
2041         switch (pci_dev->id.device_id) {
2042         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2043         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2044         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2045         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2046                 dev_config.vf = 1;
2047                 break;
2048         default:
2049                 break;
2050         }
2051         for (i = 0; i != ns; ++i) {
2052                 uint32_t restore;
2053
2054                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2055                                                  &list[i],
2056                                                  dev_config);
2057                 if (!list[i].eth_dev) {
2058                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2059                                 break;
2060                         /* Device is disabled or already spawned. Ignore it. */
2061                         continue;
2062                 }
2063                 restore = list[i].eth_dev->data->dev_flags;
2064                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2065                 /* Restore non-PCI flags cleared by the above call. */
2066                 list[i].eth_dev->data->dev_flags |= restore;
2067                 rte_eth_dev_probing_finish(list[i].eth_dev);
2068         }
2069         if (i != ns) {
2070                 DRV_LOG(ERR,
2071                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2072                         " encountering an error: %s",
2073                         pci_dev->addr.domain, pci_dev->addr.bus,
2074                         pci_dev->addr.devid, pci_dev->addr.function,
2075                         strerror(rte_errno));
2076                 ret = -rte_errno;
2077                 /* Roll back. */
2078                 while (i--) {
2079                         if (!list[i].eth_dev)
2080                                 continue;
2081                         mlx5_dev_close(list[i].eth_dev);
2082                         /* mac_addrs must not be freed because in dev_private */
2083                         list[i].eth_dev->data->mac_addrs = NULL;
2084                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2085                 }
2086                 /* Restore original error. */
2087                 rte_errno = -ret;
2088         } else {
2089                 ret = 0;
2090         }
2091 exit:
2092         /*
2093          * Do the routine cleanup:
2094          * - close opened Netlink sockets
2095          * - free the Infiniband device list
2096          */
2097         if (nl_rdma >= 0)
2098                 close(nl_rdma);
2099         if (nl_route >= 0)
2100                 close(nl_route);
2101         assert(ibv_list);
2102         mlx5_glue->free_device_list(ibv_list);
2103         return ret;
2104 }
2105
2106 /**
2107  * DPDK callback to remove a PCI device.
2108  *
2109  * This function removes all Ethernet devices belong to a given PCI device.
2110  *
2111  * @param[in] pci_dev
2112  *   Pointer to the PCI device.
2113  *
2114  * @return
2115  *   0 on success, the function cannot fail.
2116  */
2117 static int
2118 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2119 {
2120         uint16_t port_id;
2121
2122         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2123                 rte_eth_dev_close(port_id);
2124         return 0;
2125 }
2126
2127 static const struct rte_pci_id mlx5_pci_id_map[] = {
2128         {
2129                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2130                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2131         },
2132         {
2133                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2134                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2135         },
2136         {
2137                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2138                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2139         },
2140         {
2141                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2142                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2143         },
2144         {
2145                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2146                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2147         },
2148         {
2149                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2150                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2151         },
2152         {
2153                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2154                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2155         },
2156         {
2157                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2158                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2159         },
2160         {
2161                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2162                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2163         },
2164         {
2165                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2166                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2167         },
2168         {
2169                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2170                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2171         },
2172         {
2173                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2174                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2175         },
2176         {
2177                 .vendor_id = 0
2178         }
2179 };
2180
2181 static struct rte_pci_driver mlx5_driver = {
2182         .driver = {
2183                 .name = MLX5_DRIVER_NAME
2184         },
2185         .id_table = mlx5_pci_id_map,
2186         .probe = mlx5_pci_probe,
2187         .remove = mlx5_pci_remove,
2188         .dma_map = mlx5_dma_map,
2189         .dma_unmap = mlx5_dma_unmap,
2190         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2191                      RTE_PCI_DRV_PROBE_AGAIN,
2192 };
2193
2194 #ifdef RTE_IBVERBS_LINK_DLOPEN
2195
2196 /**
2197  * Suffix RTE_EAL_PMD_PATH with "-glue".
2198  *
2199  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2200  * suffixing its last component.
2201  *
2202  * @param buf[out]
2203  *   Output buffer, should be large enough otherwise NULL is returned.
2204  * @param size
2205  *   Size of @p out.
2206  *
2207  * @return
2208  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2209  */
2210 static char *
2211 mlx5_glue_path(char *buf, size_t size)
2212 {
2213         static const char *const bad[] = { "/", ".", "..", NULL };
2214         const char *path = RTE_EAL_PMD_PATH;
2215         size_t len = strlen(path);
2216         size_t off;
2217         int i;
2218
2219         while (len && path[len - 1] == '/')
2220                 --len;
2221         for (off = len; off && path[off - 1] != '/'; --off)
2222                 ;
2223         for (i = 0; bad[i]; ++i)
2224                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2225                         goto error;
2226         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2227         if (i == -1 || (size_t)i >= size)
2228                 goto error;
2229         return buf;
2230 error:
2231         DRV_LOG(ERR,
2232                 "unable to append \"-glue\" to last component of"
2233                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2234                 " please re-configure DPDK");
2235         return NULL;
2236 }
2237
2238 /**
2239  * Initialization routine for run-time dependency on rdma-core.
2240  */
2241 static int
2242 mlx5_glue_init(void)
2243 {
2244         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2245         const char *path[] = {
2246                 /*
2247                  * A basic security check is necessary before trusting
2248                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2249                  */
2250                 (geteuid() == getuid() && getegid() == getgid() ?
2251                  getenv("MLX5_GLUE_PATH") : NULL),
2252                 /*
2253                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2254                  * variant, otherwise let dlopen() look up libraries on its
2255                  * own.
2256                  */
2257                 (*RTE_EAL_PMD_PATH ?
2258                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2259         };
2260         unsigned int i = 0;
2261         void *handle = NULL;
2262         void **sym;
2263         const char *dlmsg;
2264
2265         while (!handle && i != RTE_DIM(path)) {
2266                 const char *end;
2267                 size_t len;
2268                 int ret;
2269
2270                 if (!path[i]) {
2271                         ++i;
2272                         continue;
2273                 }
2274                 end = strpbrk(path[i], ":;");
2275                 if (!end)
2276                         end = path[i] + strlen(path[i]);
2277                 len = end - path[i];
2278                 ret = 0;
2279                 do {
2280                         char name[ret + 1];
2281
2282                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2283                                        (int)len, path[i],
2284                                        (!len || *(end - 1) == '/') ? "" : "/");
2285                         if (ret == -1)
2286                                 break;
2287                         if (sizeof(name) != (size_t)ret + 1)
2288                                 continue;
2289                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2290                                 name);
2291                         handle = dlopen(name, RTLD_LAZY);
2292                         break;
2293                 } while (1);
2294                 path[i] = end + 1;
2295                 if (!*end)
2296                         ++i;
2297         }
2298         if (!handle) {
2299                 rte_errno = EINVAL;
2300                 dlmsg = dlerror();
2301                 if (dlmsg)
2302                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2303                 goto glue_error;
2304         }
2305         sym = dlsym(handle, "mlx5_glue");
2306         if (!sym || !*sym) {
2307                 rte_errno = EINVAL;
2308                 dlmsg = dlerror();
2309                 if (dlmsg)
2310                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2311                 goto glue_error;
2312         }
2313         mlx5_glue = *sym;
2314         return 0;
2315 glue_error:
2316         if (handle)
2317                 dlclose(handle);
2318         DRV_LOG(WARNING,
2319                 "cannot initialize PMD due to missing run-time dependency on"
2320                 " rdma-core libraries (libibverbs, libmlx5)");
2321         return -rte_errno;
2322 }
2323
2324 #endif
2325
2326 /**
2327  * Driver initialization routine.
2328  */
2329 RTE_INIT(rte_mlx5_pmd_init)
2330 {
2331         /* Initialize driver log type. */
2332         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2333         if (mlx5_logtype >= 0)
2334                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2335
2336         /* Build the static tables for Verbs conversion. */
2337         mlx5_set_ptype_table();
2338         mlx5_set_cksum_table();
2339         mlx5_set_swp_types_table();
2340         /*
2341          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2342          * huge pages. Calling ibv_fork_init() during init allows
2343          * applications to use fork() safely for purposes other than
2344          * using this PMD, which is not supported in forked processes.
2345          */
2346         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2347         /* Match the size of Rx completion entry to the size of a cacheline. */
2348         if (RTE_CACHE_LINE_SIZE == 128)
2349                 setenv("MLX5_CQE_SIZE", "128", 0);
2350         /*
2351          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2352          * cleanup all the Verbs resources even when the device was removed.
2353          */
2354         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2355 #ifdef RTE_IBVERBS_LINK_DLOPEN
2356         if (mlx5_glue_init())
2357                 return;
2358         assert(mlx5_glue);
2359 #endif
2360 #ifndef NDEBUG
2361         /* Glue structure must not contain any NULL pointers. */
2362         {
2363                 unsigned int i;
2364
2365                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2366                         assert(((const void *const *)mlx5_glue)[i]);
2367         }
2368 #endif
2369         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2370                 DRV_LOG(ERR,
2371                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2372                         mlx5_glue->version, MLX5_GLUE_VERSION);
2373                 return;
2374         }
2375         mlx5_glue->fork_init();
2376         rte_pci_register(&mlx5_driver);
2377 }
2378
2379 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2380 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2381 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");