drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to include 2 dsegs in the title WQEBB.
 100  * Deprecated, ignored.
 101  */
 102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 103
 104 /*
 105  * Device parameter to limit the size of inlining packet.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 109
 110 /*
 111  * Device parameter to enable hardware Tx vector.
 112  * Deprecated, ignored (no vectorized Tx routines anymore).
 113  */
 114 #define MLX5_TX_VEC_EN "tx_vec_en"
 115
 116 /* Device parameter to enable hardware Rx vector. */
 117 #define MLX5_RX_VEC_EN "rx_vec_en"
 118
 119 /* Allow L3 VXLAN flow creation. */
 120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 121
 122 /* Activate DV E-Switch flow steering. */
 123 #define MLX5_DV_ESW_EN "dv_esw_en"
 124
 125 /* Activate DV flow steering. */
 126 #define MLX5_DV_FLOW_EN "dv_flow_en"
 127
 128 /* Activate Netlink support in VF mode. */
 129 #define MLX5_VF_NL_EN "vf_nl_en"
 130
 131 /* Enable extending memsegs when creating a MR. */
 132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 133
 134 /* Select port representors to instantiate. */
 135 #define MLX5_REPRESENTOR "representor"
 136
 137 /* Device parameter to configure the maximum number of dump files per queue. */
 138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 139
 140 /* Configure timeout of LRO session (in microseconds). */
 141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 142
 143 #ifndef HAVE_IBV_MLX5_MOD_MPW
 144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 146 #endif
 147
 148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 150 #endif
 151
 152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 153
 154 /* Shared memory between primary and secondary processes. */
 155 struct mlx5_shared_data *mlx5_shared_data;
 156
 157 /* Spinlock for mlx5_shared_data allocation. */
 158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 159
 160 /* Process local data for secondary processes. */
 161 static struct mlx5_local_data mlx5_local_data;
 162
 163 /** Driver-specific log messages type. */
 164 int mlx5_logtype;
 165
 166 /** Data associated with devices to spawn. */
 167 struct mlx5_dev_spawn_data {
 168         uint32_t ifindex; /**< Network interface index. */
 169         uint32_t max_port; /**< IB device maximal port index. */
 170         uint32_t ibv_port; /**< IB device physical port index. */
 171         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 172         struct mlx5_switch_info info; /**< Switch information. */
 173         struct ibv_device *ibv_dev; /**< Associated IB device. */
 174         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 175         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 176 };
 177
 178 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 179 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 180
 181 /**
 182  * Initialize the counters management structure.
 183  *
 184  * @param[in] sh
 185  *   Pointer to mlx5_ibv_shared object to free
 186  */
 187 static void
 188 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 189 {
 190         uint8_t i;
 191
 192         TAILQ_INIT(&sh->cmng.flow_counters);
 193         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 194                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 195 }
 196
 197 /**
 198  * Destroy all the resources allocated for a counter memory management.
 199  *
 200  * @param[in] mng
 201  *   Pointer to the memory management structure.
 202  */
 203 static void
 204 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 205 {
 206         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 207
 208         LIST_REMOVE(mng, next);
 209         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 210         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 211         rte_free(mem);
 212 }
 213
 214 /**
 215  * Close and release all the resources of the counters management.
 216  *
 217  * @param[in] sh
 218  *   Pointer to mlx5_ibv_shared object to free.
 219  */
 220 static void
 221 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 222 {
 223         struct mlx5_counter_stats_mem_mng *mng;
 224         uint8_t i;
 225         int j;
 226         int retries = 1024;
 227
 228         rte_errno = 0;
 229         while (--retries) {
 230                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 231                 if (rte_errno != EINPROGRESS)
 232                         break;
 233                 rte_pause();
 234         }
 235         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 236                 struct mlx5_flow_counter_pool *pool;
 237                 uint32_t batch = !!(i % 2);
 238
 239                 if (!sh->cmng.ccont[i].pools)
 240                         continue;
 241                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 242                 while (pool) {
 243                         if (batch) {
 244                                 if (pool->min_dcs)
 245                                         claim_zero
 246                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 247                         }
 248                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 249                                 if (pool->counters_raw[j].action)
 250                                         claim_zero
 251                                         (mlx5_glue->destroy_flow_action
 252                                                (pool->counters_raw[j].action));
 253                                 if (!batch && pool->counters_raw[j].dcs)
 254                                         claim_zero(mlx5_devx_cmd_destroy
 255                                                   (pool->counters_raw[j].dcs));
 256                         }
 257                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 258                                      next);
 259                         rte_free(pool);
 260                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 261                 }
 262                 rte_free(sh->cmng.ccont[i].pools);
 263         }
 264         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 265         while (mng) {
 266                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 267                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 268         }
 269         memset(&sh->cmng, 0, sizeof(sh->cmng));
 270 }
 271
 272 /**
 273  * Extract pdn of PD object using DV API.
 274  *
 275  * @param[in] pd
 276  *   Pointer to the verbs PD object.
 277  * @param[out] pdn
 278  *   Pointer to the PD object number variable.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 284 static int
 285 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 286 {
 287         struct mlx5dv_obj obj;
 288         struct mlx5dv_pd pd_info;
 289         int ret = 0;
 290
 291         obj.pd.in = pd;
 292         obj.pd.out = &pd_info;
 293         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 294         if (ret) {
 295                 DRV_LOG(DEBUG, "Fail to get PD object info");
 296                 return ret;
 297         }
 298         *pdn = pd_info.pdn;
 299         return 0;
 300 }
 301 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 302
 303 /**
 304  * Allocate shared IB device context. If there is multiport device the
 305  * master and representors will share this context, if there is single
 306  * port dedicated IB device, the context will be used by only given
 307  * port due to unification.
 308  *
 309  * Routine first searches the context for the specified IB device name,
 310  * if found the shared context assumed and reference counter is incremented.
 311  * If no context found the new one is created and initialized with specified
 312  * IB device context and parameters.
 313  *
 314  * @param[in] spawn
 315  *   Pointer to the IB device attributes (name, port, etc).
 316  *
 317  * @return
 318  *   Pointer to mlx5_ibv_shared object on success,
 319  *   otherwise NULL and rte_errno is set.
 320  */
 321 static struct mlx5_ibv_shared *
 322 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 323 {
 324         struct mlx5_ibv_shared *sh;
 325         int err = 0;
 326         uint32_t i;
 327
 328         assert(spawn);
 329         /* Secondary process should not create the shared context. */
 330         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 331         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 332         /* Search for IB context by device name. */
 333         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 334                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 335                         sh->refcnt++;
 336                         goto exit;
 337                 }
 338         }
 339         /* No device found, we have to create new shared context. */
 340         assert(spawn->max_port);
 341         sh = rte_zmalloc("ethdev shared ib context",
 342                          sizeof(struct mlx5_ibv_shared) +
 343                          spawn->max_port *
 344                          sizeof(struct mlx5_ibv_shared_port),
 345                          RTE_CACHE_LINE_SIZE);
 346         if (!sh) {
 347                 DRV_LOG(ERR, "shared context allocation failure");
 348                 rte_errno  = ENOMEM;
 349                 goto exit;
 350         }
 351         /* Try to open IB device with DV first, then usual Verbs. */
 352         errno = 0;
 353         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 354         if (sh->ctx) {
 355                 sh->devx = 1;
 356                 DRV_LOG(DEBUG, "DevX is supported");
 357         } else {
 358                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 359                 if (!sh->ctx) {
 360                         err = errno ? errno : ENODEV;
 361                         goto error;
 362                 }
 363                 DRV_LOG(DEBUG, "DevX is NOT supported");
 364         }
 365         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 366         if (err) {
 367                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 368                 goto error;
 369         }
 370         sh->refcnt = 1;
 371         sh->max_port = spawn->max_port;
 372         strncpy(sh->ibdev_name, sh->ctx->device->name,
 373                 sizeof(sh->ibdev_name));
 374         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 375                 sizeof(sh->ibdev_path));
 376         pthread_mutex_init(&sh->intr_mutex, NULL);
 377         /*
 378          * Setting port_id to max unallowed value means
 379          * there is no interrupt subhandler installed for
 380          * the given port index i.
 381          */
 382         for (i = 0; i < sh->max_port; i++)
 383                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 384         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 385         if (sh->pd == NULL) {
 386                 DRV_LOG(ERR, "PD allocation failure");
 387                 err = ENOMEM;
 388                 goto error;
 389         }
 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 391         err = mlx5_get_pdn(sh->pd, &sh->pdn);
 392         if (err) {
 393                 DRV_LOG(ERR, "Fail to extract pdn from PD");
 394                 goto error;
 395         }
 396 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 397         /*
 398          * Once the device is added to the list of memory event
 399          * callback, its global MR cache table cannot be expanded
 400          * on the fly because of deadlock. If it overflows, lookup
 401          * should be done by searching MR list linearly, which is slow.
 402          *
 403          * At this point the device is not added to the memory
 404          * event list yet, context is just being created.
 405          */
 406         err = mlx5_mr_btree_init(&sh->mr.cache,
 407                                  MLX5_MR_BTREE_CACHE_N * 2,
 408                                  spawn->pci_dev->device.numa_node);
 409         if (err) {
 410                 err = rte_errno;
 411                 goto error;
 412         }
 413         mlx5_flow_counters_mng_init(sh);
 414         /* Add device to memory callback list. */
 415         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 416         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 417                          sh, mem_event_cb);
 418         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 419         /* Add context to the global device list. */
 420         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 421 exit:
 422         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 423         return sh;
 424 error:
 425         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 426         assert(sh);
 427         if (sh->pd)
 428                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 429         if (sh->ctx)
 430                 claim_zero(mlx5_glue->close_device(sh->ctx));
 431         rte_free(sh);
 432         assert(err > 0);
 433         rte_errno = err;
 434         return NULL;
 435 }
 436
 437 /**
 438  * Free shared IB device context. Decrement counter and if zero free
 439  * all allocated resources and close handles.
 440  *
 441  * @param[in] sh
 442  *   Pointer to mlx5_ibv_shared object to free
 443  */
 444 static void
 445 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 446 {
 447         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 448 #ifndef NDEBUG
 449         /* Check the object presence in the list. */
 450         struct mlx5_ibv_shared *lctx;
 451
 452         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 453                 if (lctx == sh)
 454                         break;
 455         assert(lctx);
 456         if (lctx != sh) {
 457                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 458                 goto exit;
 459         }
 460 #endif
 461         assert(sh);
 462         assert(sh->refcnt);
 463         /* Secondary process should not free the shared context. */
 464         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 465         if (--sh->refcnt)
 466                 goto exit;
 467         /* Release created Memory Regions. */
 468         mlx5_mr_release(sh);
 469         /* Remove from memory callback device list. */
 470         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 471         LIST_REMOVE(sh, mem_event_cb);
 472         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 473         /* Remove context from the global device list. */
 474         LIST_REMOVE(sh, next);
 475         /*
 476          *  Ensure there is no async event handler installed.
 477          *  Only primary process handles async device events.
 478          **/
 479         mlx5_flow_counters_mng_close(sh);
 480         assert(!sh->intr_cnt);
 481         if (sh->intr_cnt)
 482                 mlx5_intr_callback_unregister
 483                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 484         pthread_mutex_destroy(&sh->intr_mutex);
 485         if (sh->pd)
 486                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 487         if (sh->ctx)
 488                 claim_zero(mlx5_glue->close_device(sh->ctx));
 489         rte_free(sh);
 490 exit:
 491         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 492 }
 493
 494 /**
 495  * Initialize DR related data within private structure.
 496  * Routine checks the reference counter and does actual
 497  * resources creation/initialization only if counter is zero.
 498  *
 499  * @param[in] priv
 500  *   Pointer to the private device data structure.
 501  *
 502  * @return
 503  *   Zero on success, positive error code otherwise.
 504  */
 505 static int
 506 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 507 {
 508 #ifdef HAVE_MLX5DV_DR
 509         struct mlx5_ibv_shared *sh = priv->sh;
 510         int err = 0;
 511         void *domain;
 512
 513         assert(sh);
 514         if (sh->dv_refcnt) {
 515                 /* Shared DV/DR structures is already initialized. */
 516                 sh->dv_refcnt++;
 517                 priv->dr_shared = 1;
 518                 return 0;
 519         }
 520         /* Reference counter is zero, we should initialize structures. */
 521         domain = mlx5_glue->dr_create_domain(sh->ctx,
 522                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 523         if (!domain) {
 524                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 525                 err = errno;
 526                 goto error;
 527         }
 528         sh->rx_domain = domain;
 529         domain = mlx5_glue->dr_create_domain(sh->ctx,
 530                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 531         if (!domain) {
 532                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 533                 err = errno;
 534                 goto error;
 535         }
 536         pthread_mutex_init(&sh->dv_mutex, NULL);
 537         sh->tx_domain = domain;
 538 #ifdef HAVE_MLX5DV_DR_ESWITCH
 539         if (priv->config.dv_esw_en) {
 540                 domain  = mlx5_glue->dr_create_domain
 541                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 542                 if (!domain) {
 543                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 544                         err = errno;
 545                         goto error;
 546                 }
 547                 sh->fdb_domain = domain;
 548                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 549         }
 550 #endif
 551         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 552         sh->dv_refcnt++;
 553         priv->dr_shared = 1;
 554         return 0;
 555
 556 error:
 557        /* Rollback the created objects. */
 558         if (sh->rx_domain) {
 559                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 560                 sh->rx_domain = NULL;
 561         }
 562         if (sh->tx_domain) {
 563                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 564                 sh->tx_domain = NULL;
 565         }
 566         if (sh->fdb_domain) {
 567                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 568                 sh->fdb_domain = NULL;
 569         }
 570         if (sh->esw_drop_action) {
 571                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 572                 sh->esw_drop_action = NULL;
 573         }
 574         if (sh->pop_vlan_action) {
 575                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 576                 sh->pop_vlan_action = NULL;
 577         }
 578         return err;
 579 #else
 580         (void)priv;
 581         return 0;
 582 #endif
 583 }
 584
 585 /**
 586  * Destroy DR related data within private structure.
 587  *
 588  * @param[in] priv
 589  *   Pointer to the private device data structure.
 590  */
 591 static void
 592 mlx5_free_shared_dr(struct mlx5_priv *priv)
 593 {
 594 #ifdef HAVE_MLX5DV_DR
 595         struct mlx5_ibv_shared *sh;
 596
 597         if (!priv->dr_shared)
 598                 return;
 599         priv->dr_shared = 0;
 600         sh = priv->sh;
 601         assert(sh);
 602         assert(sh->dv_refcnt);
 603         if (sh->dv_refcnt && --sh->dv_refcnt)
 604                 return;
 605         if (sh->rx_domain) {
 606                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 607                 sh->rx_domain = NULL;
 608         }
 609         if (sh->tx_domain) {
 610                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 611                 sh->tx_domain = NULL;
 612         }
 613 #ifdef HAVE_MLX5DV_DR_ESWITCH
 614         if (sh->fdb_domain) {
 615                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 616                 sh->fdb_domain = NULL;
 617         }
 618         if (sh->esw_drop_action) {
 619                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 620                 sh->esw_drop_action = NULL;
 621         }
 622 #endif
 623         if (sh->pop_vlan_action) {
 624                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 625                 sh->pop_vlan_action = NULL;
 626         }
 627         pthread_mutex_destroy(&sh->dv_mutex);
 628 #else
 629         (void)priv;
 630 #endif
 631 }
 632
 633 /**
 634  * Initialize shared data between primary and secondary process.
 635  *
 636  * A memzone is reserved by primary process and secondary processes attach to
 637  * the memzone.
 638  *
 639  * @return
 640  *   0 on success, a negative errno value otherwise and rte_errno is set.
 641  */
 642 static int
 643 mlx5_init_shared_data(void)
 644 {
 645         const struct rte_memzone *mz;
 646         int ret = 0;
 647
 648         rte_spinlock_lock(&mlx5_shared_data_lock);
 649         if (mlx5_shared_data == NULL) {
 650                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 651                         /* Allocate shared memory. */
 652                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 653                                                  sizeof(*mlx5_shared_data),
 654                                                  SOCKET_ID_ANY, 0);
 655                         if (mz == NULL) {
 656                                 DRV_LOG(ERR,
 657                                         "Cannot allocate mlx5 shared data\n");
 658                                 ret = -rte_errno;
 659                                 goto error;
 660                         }
 661                         mlx5_shared_data = mz->addr;
 662                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 663                         rte_spinlock_init(&mlx5_shared_data->lock);
 664                 } else {
 665                         /* Lookup allocated shared memory. */
 666                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 667                         if (mz == NULL) {
 668                                 DRV_LOG(ERR,
 669                                         "Cannot attach mlx5 shared data\n");
 670                                 ret = -rte_errno;
 671                                 goto error;
 672                         }
 673                         mlx5_shared_data = mz->addr;
 674                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 675                 }
 676         }
 677 error:
 678         rte_spinlock_unlock(&mlx5_shared_data_lock);
 679         return ret;
 680 }
 681
 682 /**
 683  * Retrieve integer value from environment variable.
 684  *
 685  * @param[in] name
 686  *   Environment variable name.
 687  *
 688  * @return
 689  *   Integer value, 0 if the variable is not set.
 690  */
 691 int
 692 mlx5_getenv_int(const char *name)
 693 {
 694         const char *val = getenv(name);
 695
 696         if (val == NULL)
 697                 return 0;
 698         return atoi(val);
 699 }
 700
 701 /**
 702  * Verbs callback to allocate a memory. This function should allocate the space
 703  * according to the size provided residing inside a huge page.
 704  * Please note that all allocation must respect the alignment from libmlx5
 705  * (i.e. currently sysconf(_SC_PAGESIZE)).
 706  *
 707  * @param[in] size
 708  *   The size in bytes of the memory to allocate.
 709  * @param[in] data
 710  *   A pointer to the callback data.
 711  *
 712  * @return
 713  *   Allocated buffer, NULL otherwise and rte_errno is set.
 714  */
 715 static void *
 716 mlx5_alloc_verbs_buf(size_t size, void *data)
 717 {
 718         struct mlx5_priv *priv = data;
 719         void *ret;
 720         size_t alignment = sysconf(_SC_PAGESIZE);
 721         unsigned int socket = SOCKET_ID_ANY;
 722
 723         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 724                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 725
 726                 socket = ctrl->socket;
 727         } else if (priv->verbs_alloc_ctx.type ==
 728                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 729                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 730
 731                 socket = ctrl->socket;
 732         }
 733         assert(data != NULL);
 734         ret = rte_malloc_socket(__func__, size, alignment, socket);
 735         if (!ret && size)
 736                 rte_errno = ENOMEM;
 737         return ret;
 738 }
 739
 740 /**
 741  * Verbs callback to free a memory.
 742  *
 743  * @param[in] ptr
 744  *   A pointer to the memory to free.
 745  * @param[in] data
 746  *   A pointer to the callback data.
 747  */
 748 static void
 749 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 750 {
 751         assert(data != NULL);
 752         rte_free(ptr);
 753 }
 754
 755 /**
 756  * DPDK callback to add udp tunnel port
 757  *
 758  * @param[in] dev
 759  *   A pointer to eth_dev
 760  * @param[in] udp_tunnel
 761  *   A pointer to udp tunnel
 762  *
 763  * @return
 764  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
 765  */
 766 int
 767 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
 768                          struct rte_eth_udp_tunnel *udp_tunnel)
 769 {
 770         assert(udp_tunnel != NULL);
 771         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
 772             udp_tunnel->udp_port == 4789)
 773                 return 0;
 774         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
 775             udp_tunnel->udp_port == 4790)
 776                 return 0;
 777         return -ENOTSUP;
 778 }
 779
 780 /**
 781  * Initialize process private data structure.
 782  *
 783  * @param dev
 784  *   Pointer to Ethernet device structure.
 785  *
 786  * @return
 787  *   0 on success, a negative errno value otherwise and rte_errno is set.
 788  */
 789 int
 790 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 791 {
 792         struct mlx5_priv *priv = dev->data->dev_private;
 793         struct mlx5_proc_priv *ppriv;
 794         size_t ppriv_size;
 795
 796         /*
 797          * UAR register table follows the process private structure. BlueFlame
 798          * registers for Tx queues are stored in the table.
 799          */
 800         ppriv_size =
 801                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 802         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 803                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 804         if (!ppriv) {
 805                 rte_errno = ENOMEM;
 806                 return -rte_errno;
 807         }
 808         ppriv->uar_table_sz = ppriv_size;
 809         dev->process_private = ppriv;
 810         return 0;
 811 }
 812
 813 /**
 814  * Un-initialize process private data structure.
 815  *
 816  * @param dev
 817  *   Pointer to Ethernet device structure.
 818  */
 819 static void
 820 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 821 {
 822         if (!dev->process_private)
 823                 return;
 824         rte_free(dev->process_private);
 825         dev->process_private = NULL;
 826 }
 827
 828 /**
 829  * DPDK callback to close the device.
 830  *
 831  * Destroy all queues and objects, free memory.
 832  *
 833  * @param dev
 834  *   Pointer to Ethernet device structure.
 835  */
 836 static void
 837 mlx5_dev_close(struct rte_eth_dev *dev)
 838 {
 839         struct mlx5_priv *priv = dev->data->dev_private;
 840         unsigned int i;
 841         int ret;
 842
 843         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 844                 dev->data->port_id,
 845                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 846         /* In case mlx5_dev_stop() has not been called. */
 847         mlx5_dev_interrupt_handler_uninstall(dev);
 848         mlx5_traffic_disable(dev);
 849         mlx5_flow_flush(dev, NULL);
 850         /* Prevent crashes when queues are still in use. */
 851         dev->rx_pkt_burst = removed_rx_burst;
 852         dev->tx_pkt_burst = removed_tx_burst;
 853         rte_wmb();
 854         /* Disable datapath on secondary process. */
 855         mlx5_mp_req_stop_rxtx(dev);
 856         if (priv->rxqs != NULL) {
 857                 /* XXX race condition if mlx5_rx_burst() is still running. */
 858                 usleep(1000);
 859                 for (i = 0; (i != priv->rxqs_n); ++i)
 860                         mlx5_rxq_release(dev, i);
 861                 priv->rxqs_n = 0;
 862                 priv->rxqs = NULL;
 863         }
 864         if (priv->txqs != NULL) {
 865                 /* XXX race condition if mlx5_tx_burst() is still running. */
 866                 usleep(1000);
 867                 for (i = 0; (i != priv->txqs_n); ++i)
 868                         mlx5_txq_release(dev, i);
 869                 priv->txqs_n = 0;
 870                 priv->txqs = NULL;
 871         }
 872         mlx5_proc_priv_uninit(dev);
 873         mlx5_mprq_free_mp(dev);
 874         mlx5_free_shared_dr(priv);
 875         if (priv->rss_conf.rss_key != NULL)
 876                 rte_free(priv->rss_conf.rss_key);
 877         if (priv->reta_idx != NULL)
 878                 rte_free(priv->reta_idx);
 879         if (priv->config.vf)
 880                 mlx5_nl_mac_addr_flush(dev);
 881         if (priv->nl_socket_route >= 0)
 882                 close(priv->nl_socket_route);
 883         if (priv->nl_socket_rdma >= 0)
 884                 close(priv->nl_socket_rdma);
 885         if (priv->vmwa_context)
 886                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
 887         if (priv->sh) {
 888                 /*
 889                  * Free the shared context in last turn, because the cleanup
 890                  * routines above may use some shared fields, like
 891                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 892                  * ifindex if Netlink fails.
 893                  */
 894                 mlx5_free_shared_ibctx(priv->sh);
 895                 priv->sh = NULL;
 896         }
 897         ret = mlx5_hrxq_verify(dev);
 898         if (ret)
 899                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 900                         dev->data->port_id);
 901         ret = mlx5_ind_table_obj_verify(dev);
 902         if (ret)
 903                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 904                         dev->data->port_id);
 905         ret = mlx5_rxq_obj_verify(dev);
 906         if (ret)
 907                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
 908                         dev->data->port_id);
 909         ret = mlx5_rxq_verify(dev);
 910         if (ret)
 911                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 912                         dev->data->port_id);
 913         ret = mlx5_txq_ibv_verify(dev);
 914         if (ret)
 915                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 916                         dev->data->port_id);
 917         ret = mlx5_txq_verify(dev);
 918         if (ret)
 919                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 920                         dev->data->port_id);
 921         ret = mlx5_flow_verify(dev);
 922         if (ret)
 923                 DRV_LOG(WARNING, "port %u some flows still remain",
 924                         dev->data->port_id);
 925         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 926                 unsigned int c = 0;
 927                 uint16_t port_id;
 928
 929                 MLX5_ETH_FOREACH_DEV(port_id) {
 930                         struct mlx5_priv *opriv =
 931                                 rte_eth_devices[port_id].data->dev_private;
 932
 933                         if (!opriv ||
 934                             opriv->domain_id != priv->domain_id ||
 935                             &rte_eth_devices[port_id] == dev)
 936                                 continue;
 937                         ++c;
 938                         break;
 939                 }
 940                 if (!c)
 941                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 942         }
 943         memset(priv, 0, sizeof(*priv));
 944         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 945         /*
 946          * Reset mac_addrs to NULL such that it is not freed as part of
 947          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 948          * it is freed when dev_private is freed.
 949          */
 950         dev->data->mac_addrs = NULL;
 951 }
 952
 953 const struct eth_dev_ops mlx5_dev_ops = {
 954         .dev_configure = mlx5_dev_configure,
 955         .dev_start = mlx5_dev_start,
 956         .dev_stop = mlx5_dev_stop,
 957         .dev_set_link_down = mlx5_set_link_down,
 958         .dev_set_link_up = mlx5_set_link_up,
 959         .dev_close = mlx5_dev_close,
 960         .promiscuous_enable = mlx5_promiscuous_enable,
 961         .promiscuous_disable = mlx5_promiscuous_disable,
 962         .allmulticast_enable = mlx5_allmulticast_enable,
 963         .allmulticast_disable = mlx5_allmulticast_disable,
 964         .link_update = mlx5_link_update,
 965         .stats_get = mlx5_stats_get,
 966         .stats_reset = mlx5_stats_reset,
 967         .xstats_get = mlx5_xstats_get,
 968         .xstats_reset = mlx5_xstats_reset,
 969         .xstats_get_names = mlx5_xstats_get_names,
 970         .fw_version_get = mlx5_fw_version_get,
 971         .dev_infos_get = mlx5_dev_infos_get,
 972         .read_clock = mlx5_read_clock,
 973         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 974         .vlan_filter_set = mlx5_vlan_filter_set,
 975         .rx_queue_setup = mlx5_rx_queue_setup,
 976         .tx_queue_setup = mlx5_tx_queue_setup,
 977         .rx_queue_release = mlx5_rx_queue_release,
 978         .tx_queue_release = mlx5_tx_queue_release,
 979         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 980         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 981         .mac_addr_remove = mlx5_mac_addr_remove,
 982         .mac_addr_add = mlx5_mac_addr_add,
 983         .mac_addr_set = mlx5_mac_addr_set,
 984         .set_mc_addr_list = mlx5_set_mc_addr_list,
 985         .mtu_set = mlx5_dev_set_mtu,
 986         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 987         .vlan_offload_set = mlx5_vlan_offload_set,
 988         .reta_update = mlx5_dev_rss_reta_update,
 989         .reta_query = mlx5_dev_rss_reta_query,
 990         .rss_hash_update = mlx5_rss_hash_update,
 991         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 992         .filter_ctrl = mlx5_dev_filter_ctrl,
 993         .rx_descriptor_status = mlx5_rx_descriptor_status,
 994         .tx_descriptor_status = mlx5_tx_descriptor_status,
 995         .rx_queue_count = mlx5_rx_queue_count,
 996         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 997         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 998         .is_removed = mlx5_is_removed,
 999         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1000         .get_module_info = mlx5_get_module_info,
1001         .get_module_eeprom = mlx5_get_module_eeprom,
1002 };
1003
1004 /* Available operations from secondary process. */
1005 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1006         .stats_get = mlx5_stats_get,
1007         .stats_reset = mlx5_stats_reset,
1008         .xstats_get = mlx5_xstats_get,
1009         .xstats_reset = mlx5_xstats_reset,
1010         .xstats_get_names = mlx5_xstats_get_names,
1011         .fw_version_get = mlx5_fw_version_get,
1012         .dev_infos_get = mlx5_dev_infos_get,
1013         .rx_descriptor_status = mlx5_rx_descriptor_status,
1014         .tx_descriptor_status = mlx5_tx_descriptor_status,
1015         .get_module_info = mlx5_get_module_info,
1016         .get_module_eeprom = mlx5_get_module_eeprom,
1017 };
1018
1019 /* Available operations in flow isolated mode. */
1020 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1021         .dev_configure = mlx5_dev_configure,
1022         .dev_start = mlx5_dev_start,
1023         .dev_stop = mlx5_dev_stop,
1024         .dev_set_link_down = mlx5_set_link_down,
1025         .dev_set_link_up = mlx5_set_link_up,
1026         .dev_close = mlx5_dev_close,
1027         .promiscuous_enable = mlx5_promiscuous_enable,
1028         .promiscuous_disable = mlx5_promiscuous_disable,
1029         .allmulticast_enable = mlx5_allmulticast_enable,
1030         .allmulticast_disable = mlx5_allmulticast_disable,
1031         .link_update = mlx5_link_update,
1032         .stats_get = mlx5_stats_get,
1033         .stats_reset = mlx5_stats_reset,
1034         .xstats_get = mlx5_xstats_get,
1035         .xstats_reset = mlx5_xstats_reset,
1036         .xstats_get_names = mlx5_xstats_get_names,
1037         .fw_version_get = mlx5_fw_version_get,
1038         .dev_infos_get = mlx5_dev_infos_get,
1039         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1040         .vlan_filter_set = mlx5_vlan_filter_set,
1041         .rx_queue_setup = mlx5_rx_queue_setup,
1042         .tx_queue_setup = mlx5_tx_queue_setup,
1043         .rx_queue_release = mlx5_rx_queue_release,
1044         .tx_queue_release = mlx5_tx_queue_release,
1045         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1046         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1047         .mac_addr_remove = mlx5_mac_addr_remove,
1048         .mac_addr_add = mlx5_mac_addr_add,
1049         .mac_addr_set = mlx5_mac_addr_set,
1050         .set_mc_addr_list = mlx5_set_mc_addr_list,
1051         .mtu_set = mlx5_dev_set_mtu,
1052         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1053         .vlan_offload_set = mlx5_vlan_offload_set,
1054         .filter_ctrl = mlx5_dev_filter_ctrl,
1055         .rx_descriptor_status = mlx5_rx_descriptor_status,
1056         .tx_descriptor_status = mlx5_tx_descriptor_status,
1057         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1058         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1059         .is_removed = mlx5_is_removed,
1060         .get_module_info = mlx5_get_module_info,
1061         .get_module_eeprom = mlx5_get_module_eeprom,
1062 };
1063
1064 /**
1065  * Verify and store value for device argument.
1066  *
1067  * @param[in] key
1068  *   Key argument to verify.
1069  * @param[in] val
1070  *   Value associated with key.
1071  * @param opaque
1072  *   User data.
1073  *
1074  * @return
1075  *   0 on success, a negative errno value otherwise and rte_errno is set.
1076  */
1077 static int
1078 mlx5_args_check(const char *key, const char *val, void *opaque)
1079 {
1080         struct mlx5_dev_config *config = opaque;
1081         unsigned long tmp;
1082
1083         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1084         if (!strcmp(MLX5_REPRESENTOR, key))
1085                 return 0;
1086         errno = 0;
1087         tmp = strtoul(val, NULL, 0);
1088         if (errno) {
1089                 rte_errno = errno;
1090                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1091                 return -rte_errno;
1092         }
1093         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1094                 config->cqe_comp = !!tmp;
1095         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1096                 config->cqe_pad = !!tmp;
1097         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1098                 config->hw_padding = !!tmp;
1099         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1100                 config->mprq.enabled = !!tmp;
1101         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1102                 config->mprq.stride_num_n = tmp;
1103         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1104                 config->mprq.max_memcpy_len = tmp;
1105         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1106                 config->mprq.min_rxqs_num = tmp;
1107         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1108                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1109                                  " converted to txq_inline_max", key);
1110                 config->txq_inline_max = tmp;
1111         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1112                 config->txq_inline_max = tmp;
1113         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1114                 config->txq_inline_min = tmp;
1115         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1116                 config->txq_inline_mpw = tmp;
1117         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1118                 config->txqs_inline = tmp;
1119         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1120                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1121         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1122                 config->mps = !!tmp;
1123         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1124                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1125         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1126                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1127                                  " converted to txq_inline_mpw", key);
1128                 config->txq_inline_mpw = tmp;
1129         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1130                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1131         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1132                 config->rx_vec_en = !!tmp;
1133         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1134                 config->l3_vxlan_en = !!tmp;
1135         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1136                 config->vf_nl_en = !!tmp;
1137         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1138                 config->dv_esw_en = !!tmp;
1139         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1140                 config->dv_flow_en = !!tmp;
1141         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1142                 config->mr_ext_memseg_en = !!tmp;
1143         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1144                 config->max_dump_files_num = tmp;
1145         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1146                 config->lro.timeout = tmp;
1147         } else {
1148                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1149                 rte_errno = EINVAL;
1150                 return -rte_errno;
1151         }
1152         return 0;
1153 }
1154
1155 /**
1156  * Parse device parameters.
1157  *
1158  * @param config
1159  *   Pointer to device configuration structure.
1160  * @param devargs
1161  *   Device arguments structure.
1162  *
1163  * @return
1164  *   0 on success, a negative errno value otherwise and rte_errno is set.
1165  */
1166 static int
1167 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1168 {
1169         const char **params = (const char *[]){
1170                 MLX5_RXQ_CQE_COMP_EN,
1171                 MLX5_RXQ_CQE_PAD_EN,
1172                 MLX5_RXQ_PKT_PAD_EN,
1173                 MLX5_RX_MPRQ_EN,
1174                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1175                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1176                 MLX5_RXQS_MIN_MPRQ,
1177                 MLX5_TXQ_INLINE,
1178                 MLX5_TXQ_INLINE_MIN,
1179                 MLX5_TXQ_INLINE_MAX,
1180                 MLX5_TXQ_INLINE_MPW,
1181                 MLX5_TXQS_MIN_INLINE,
1182                 MLX5_TXQS_MAX_VEC,
1183                 MLX5_TXQ_MPW_EN,
1184                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1185                 MLX5_TXQ_MAX_INLINE_LEN,
1186                 MLX5_TX_VEC_EN,
1187                 MLX5_RX_VEC_EN,
1188                 MLX5_L3_VXLAN_EN,
1189                 MLX5_VF_NL_EN,
1190                 MLX5_DV_ESW_EN,
1191                 MLX5_DV_FLOW_EN,
1192                 MLX5_MR_EXT_MEMSEG_EN,
1193                 MLX5_REPRESENTOR,
1194                 MLX5_MAX_DUMP_FILES_NUM,
1195                 MLX5_LRO_TIMEOUT_USEC,
1196                 NULL,
1197         };
1198         struct rte_kvargs *kvlist;
1199         int ret = 0;
1200         int i;
1201
1202         if (devargs == NULL)
1203                 return 0;
1204         /* Following UGLY cast is done to pass checkpatch. */
1205         kvlist = rte_kvargs_parse(devargs->args, params);
1206         if (kvlist == NULL) {
1207                 rte_errno = EINVAL;
1208                 return -rte_errno;
1209         }
1210         /* Process parameters. */
1211         for (i = 0; (params[i] != NULL); ++i) {
1212                 if (rte_kvargs_count(kvlist, params[i])) {
1213                         ret = rte_kvargs_process(kvlist, params[i],
1214                                                  mlx5_args_check, config);
1215                         if (ret) {
1216                                 rte_errno = EINVAL;
1217                                 rte_kvargs_free(kvlist);
1218                                 return -rte_errno;
1219                         }
1220                 }
1221         }
1222         rte_kvargs_free(kvlist);
1223         return 0;
1224 }
1225
1226 static struct rte_pci_driver mlx5_driver;
1227
1228 /**
1229  * PMD global initialization.
1230  *
1231  * Independent from individual device, this function initializes global
1232  * per-PMD data structures distinguishing primary and secondary processes.
1233  * Hence, each initialization is called once per a process.
1234  *
1235  * @return
1236  *   0 on success, a negative errno value otherwise and rte_errno is set.
1237  */
1238 static int
1239 mlx5_init_once(void)
1240 {
1241         struct mlx5_shared_data *sd;
1242         struct mlx5_local_data *ld = &mlx5_local_data;
1243         int ret = 0;
1244
1245         if (mlx5_init_shared_data())
1246                 return -rte_errno;
1247         sd = mlx5_shared_data;
1248         assert(sd);
1249         rte_spinlock_lock(&sd->lock);
1250         switch (rte_eal_process_type()) {
1251         case RTE_PROC_PRIMARY:
1252                 if (sd->init_done)
1253                         break;
1254                 LIST_INIT(&sd->mem_event_cb_list);
1255                 rte_rwlock_init(&sd->mem_event_rwlock);
1256                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1257                                                 mlx5_mr_mem_event_cb, NULL);
1258                 ret = mlx5_mp_init_primary();
1259                 if (ret)
1260                         goto out;
1261                 sd->init_done = true;
1262                 break;
1263         case RTE_PROC_SECONDARY:
1264                 if (ld->init_done)
1265                         break;
1266                 ret = mlx5_mp_init_secondary();
1267                 if (ret)
1268                         goto out;
1269                 ++sd->secondary_cnt;
1270                 ld->init_done = true;
1271                 break;
1272         default:
1273                 break;
1274         }
1275 out:
1276         rte_spinlock_unlock(&sd->lock);
1277         return ret;
1278 }
1279
1280 /**
1281  * Configures the minimal amount of data to inline into WQE
1282  * while sending packets.
1283  *
1284  * - the txq_inline_min has the maximal priority, if this
1285  *   key is specified in devargs
1286  * - if DevX is enabled the inline mode is queried from the
1287  *   device (HCA attributes and NIC vport context if needed).
1288  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1289  *   and none (0 bytes) for other NICs
1290  *
1291  * @param spawn
1292  *   Verbs device parameters (name, port, switch_info) to spawn.
1293  * @param config
1294  *   Device configuration parameters.
1295  */
1296 static void
1297 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1298                     struct mlx5_dev_config *config)
1299 {
1300         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1301                 /* Application defines size of inlined data explicitly. */
1302                 switch (spawn->pci_dev->id.device_id) {
1303                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1304                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1305                         if (config->txq_inline_min <
1306                                        (int)MLX5_INLINE_HSIZE_L2) {
1307                                 DRV_LOG(DEBUG,
1308                                         "txq_inline_mix aligned to minimal"
1309                                         " ConnectX-4 required value %d",
1310                                         (int)MLX5_INLINE_HSIZE_L2);
1311                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1312                         }
1313                         break;
1314                 }
1315                 goto exit;
1316         }
1317         if (config->hca_attr.eth_net_offloads) {
1318                 /* We have DevX enabled, inline mode queried successfully. */
1319                 switch (config->hca_attr.wqe_inline_mode) {
1320                 case MLX5_CAP_INLINE_MODE_L2:
1321                         /* outer L2 header must be inlined. */
1322                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1323                         goto exit;
1324                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1325                         /* No inline data are required by NIC. */
1326                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1327                         config->hw_vlan_insert =
1328                                 config->hca_attr.wqe_vlan_insert;
1329                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1330                         goto exit;
1331                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1332                         /* inline mode is defined by NIC vport context. */
1333                         if (!config->hca_attr.eth_virt)
1334                                 break;
1335                         switch (config->hca_attr.vport_inline_mode) {
1336                         case MLX5_INLINE_MODE_NONE:
1337                                 config->txq_inline_min =
1338                                         MLX5_INLINE_HSIZE_NONE;
1339                                 goto exit;
1340                         case MLX5_INLINE_MODE_L2:
1341                                 config->txq_inline_min =
1342                                         MLX5_INLINE_HSIZE_L2;
1343                                 goto exit;
1344                         case MLX5_INLINE_MODE_IP:
1345                                 config->txq_inline_min =
1346                                         MLX5_INLINE_HSIZE_L3;
1347                                 goto exit;
1348                         case MLX5_INLINE_MODE_TCP_UDP:
1349                                 config->txq_inline_min =
1350                                         MLX5_INLINE_HSIZE_L4;
1351                                 goto exit;
1352                         case MLX5_INLINE_MODE_INNER_L2:
1353                                 config->txq_inline_min =
1354                                         MLX5_INLINE_HSIZE_INNER_L2;
1355                                 goto exit;
1356                         case MLX5_INLINE_MODE_INNER_IP:
1357                                 config->txq_inline_min =
1358                                         MLX5_INLINE_HSIZE_INNER_L3;
1359                                 goto exit;
1360                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1361                                 config->txq_inline_min =
1362                                         MLX5_INLINE_HSIZE_INNER_L4;
1363                                 goto exit;
1364                         }
1365                 }
1366         }
1367         /*
1368          * We get here if we are unable to deduce
1369          * inline data size with DevX. Try PCI ID
1370          * to determine old NICs.
1371          */
1372         switch (spawn->pci_dev->id.device_id) {
1373         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1374         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1375         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1376         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1377                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1378                 config->hw_vlan_insert = 0;
1379                 break;
1380         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1381         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1382         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1383         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1384                 /*
1385                  * These NICs support VLAN insertion from WQE and
1386                  * report the wqe_vlan_insert flag. But there is the bug
1387                  * and PFC control may be broken, so disable feature.
1388                  */
1389                 config->hw_vlan_insert = 0;
1390                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1391                 break;
1392         default:
1393                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1394                 break;
1395         }
1396 exit:
1397         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1398 }
1399
1400 /**
1401  * Allocate page of door-bells and register it using DevX API.
1402  *
1403  * @param [in] dev
1404  *   Pointer to Ethernet device.
1405  *
1406  * @return
1407  *   Pointer to new page on success, NULL otherwise.
1408  */
1409 static struct mlx5_devx_dbr_page *
1410 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1411 {
1412         struct mlx5_priv *priv = dev->data->dev_private;
1413         struct mlx5_devx_dbr_page *page;
1414
1415         /* Allocate space for door-bell page and management data. */
1416         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1417                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1418         if (!page) {
1419                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1420                         dev->data->port_id);
1421                 return NULL;
1422         }
1423         /* Register allocated memory. */
1424         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1425                                               MLX5_DBR_PAGE_SIZE, 0);
1426         if (!page->umem) {
1427                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1428                         dev->data->port_id);
1429                 rte_free(page);
1430                 return NULL;
1431         }
1432         return page;
1433 }
1434
1435 /**
1436  * Find the next available door-bell, allocate new page if needed.
1437  *
1438  * @param [in] dev
1439  *   Pointer to Ethernet device.
1440  * @param [out] dbr_page
1441  *   Door-bell page containing the page data.
1442  *
1443  * @return
1444  *   Door-bell address offset on success, a negative error value otherwise.
1445  */
1446 int64_t
1447 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1448 {
1449         struct mlx5_priv *priv = dev->data->dev_private;
1450         struct mlx5_devx_dbr_page *page = NULL;
1451         uint32_t i, j;
1452
1453         LIST_FOREACH(page, &priv->dbrpgs, next)
1454                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1455                         break;
1456         if (!page) { /* No page with free door-bell exists. */
1457                 page = mlx5_alloc_dbr_page(dev);
1458                 if (!page) /* Failed to allocate new page. */
1459                         return (-1);
1460                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1461         }
1462         /* Loop to find bitmap part with clear bit. */
1463         for (i = 0;
1464              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1465              i++)
1466                 ; /* Empty. */
1467         /* Find the first clear bit. */
1468         j = rte_bsf64(~page->dbr_bitmap[i]);
1469         assert(i < (MLX5_DBR_PER_PAGE / 64));
1470         page->dbr_bitmap[i] |= (1 << j);
1471         page->dbr_count++;
1472         *dbr_page = page;
1473         return (((i * 64) + j) * sizeof(uint64_t));
1474 }
1475
1476 /**
1477  * Release a door-bell record.
1478  *
1479  * @param [in] dev
1480  *   Pointer to Ethernet device.
1481  * @param [in] umem_id
1482  *   UMEM ID of page containing the door-bell record to release.
1483  * @param [in] offset
1484  *   Offset of door-bell record in page.
1485  *
1486  * @return
1487  *   0 on success, a negative error value otherwise.
1488  */
1489 int32_t
1490 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1491 {
1492         struct mlx5_priv *priv = dev->data->dev_private;
1493         struct mlx5_devx_dbr_page *page = NULL;
1494         int ret = 0;
1495
1496         LIST_FOREACH(page, &priv->dbrpgs, next)
1497                 /* Find the page this address belongs to. */
1498                 if (page->umem->umem_id == umem_id)
1499                         break;
1500         if (!page)
1501                 return -EINVAL;
1502         page->dbr_count--;
1503         if (!page->dbr_count) {
1504                 /* Page not used, free it and remove from list. */
1505                 LIST_REMOVE(page, next);
1506                 if (page->umem)
1507                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1508                 rte_free(page);
1509         } else {
1510                 /* Mark in bitmap that this door-bell is not in use. */
1511                 offset /= MLX5_DBR_SIZE;
1512                 int i = offset / 64;
1513                 int j = offset % 64;
1514
1515                 page->dbr_bitmap[i] &= ~(1 << j);
1516         }
1517         return ret;
1518 }
1519
1520 /**
1521  * Spawn an Ethernet device from Verbs information.
1522  *
1523  * @param dpdk_dev
1524  *   Backing DPDK device.
1525  * @param spawn
1526  *   Verbs device parameters (name, port, switch_info) to spawn.
1527  * @param config
1528  *   Device configuration parameters.
1529  *
1530  * @return
1531  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1532  *   is set. The following errors are defined:
1533  *
1534  *   EBUSY: device is not supposed to be spawned.
1535  *   EEXIST: device is already spawned
1536  */
1537 static struct rte_eth_dev *
1538 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1539                struct mlx5_dev_spawn_data *spawn,
1540                struct mlx5_dev_config config)
1541 {
1542         const struct mlx5_switch_info *switch_info = &spawn->info;
1543         struct mlx5_ibv_shared *sh = NULL;
1544         struct ibv_port_attr port_attr;
1545         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1546         struct rte_eth_dev *eth_dev = NULL;
1547         struct mlx5_priv *priv = NULL;
1548         int err = 0;
1549         unsigned int hw_padding = 0;
1550         unsigned int mps;
1551         unsigned int cqe_comp;
1552         unsigned int cqe_pad = 0;
1553         unsigned int tunnel_en = 0;
1554         unsigned int mpls_en = 0;
1555         unsigned int swp = 0;
1556         unsigned int mprq = 0;
1557         unsigned int mprq_min_stride_size_n = 0;
1558         unsigned int mprq_max_stride_size_n = 0;
1559         unsigned int mprq_min_stride_num_n = 0;
1560         unsigned int mprq_max_stride_num_n = 0;
1561         struct rte_ether_addr mac;
1562         char name[RTE_ETH_NAME_MAX_LEN];
1563         int own_domain_id = 0;
1564         uint16_t port_id;
1565         unsigned int i;
1566 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1567         struct mlx5dv_devx_port devx_port;
1568 #endif
1569
1570         /* Determine if this port representor is supposed to be spawned. */
1571         if (switch_info->representor && dpdk_dev->devargs) {
1572                 struct rte_eth_devargs eth_da;
1573
1574                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1575                 if (err) {
1576                         rte_errno = -err;
1577                         DRV_LOG(ERR, "failed to process device arguments: %s",
1578                                 strerror(rte_errno));
1579                         return NULL;
1580                 }
1581                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1582                         if (eth_da.representor_ports[i] ==
1583                             (uint16_t)switch_info->port_name)
1584                                 break;
1585                 if (i == eth_da.nb_representor_ports) {
1586                         rte_errno = EBUSY;
1587                         return NULL;
1588                 }
1589         }
1590         /* Build device name. */
1591         if (spawn->pf_bond <  0) {
1592                 /* Single device. */
1593                 if (!switch_info->representor)
1594                         strlcpy(name, dpdk_dev->name, sizeof(name));
1595                 else
1596                         snprintf(name, sizeof(name), "%s_representor_%u",
1597                                  dpdk_dev->name, switch_info->port_name);
1598         } else {
1599                 /* Bonding device. */
1600                 if (!switch_info->representor)
1601                         snprintf(name, sizeof(name), "%s_%s",
1602                                  dpdk_dev->name, spawn->ibv_dev->name);
1603                 else
1604                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
1605                                  dpdk_dev->name, spawn->ibv_dev->name,
1606                                  switch_info->port_name);
1607         }
1608         /* check if the device is already spawned */
1609         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1610                 rte_errno = EEXIST;
1611                 return NULL;
1612         }
1613         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1614         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1615                 eth_dev = rte_eth_dev_attach_secondary(name);
1616                 if (eth_dev == NULL) {
1617                         DRV_LOG(ERR, "can not attach rte ethdev");
1618                         rte_errno = ENOMEM;
1619                         return NULL;
1620                 }
1621                 eth_dev->device = dpdk_dev;
1622                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1623                 err = mlx5_proc_priv_init(eth_dev);
1624                 if (err)
1625                         return NULL;
1626                 /* Receive command fd from primary process */
1627                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1628                 if (err < 0)
1629                         return NULL;
1630                 /* Remap UAR for Tx queues. */
1631                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1632                 if (err)
1633                         return NULL;
1634                 /*
1635                  * Ethdev pointer is still required as input since
1636                  * the primary device is not accessible from the
1637                  * secondary process.
1638                  */
1639                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1640                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1641                 return eth_dev;
1642         }
1643         sh = mlx5_alloc_shared_ibctx(spawn);
1644         if (!sh)
1645                 return NULL;
1646         config.devx = sh->devx;
1647 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1648         config.dest_tir = 1;
1649 #endif
1650 #ifdef HAVE_IBV_MLX5_MOD_SWP
1651         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1652 #endif
1653         /*
1654          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1655          * as all ConnectX-5 devices.
1656          */
1657 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1658         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1659 #endif
1660 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1661         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1662 #endif
1663         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1664         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1665                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1666                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1667                         mps = MLX5_MPW_ENHANCED;
1668                 } else {
1669                         DRV_LOG(DEBUG, "MPW is supported");
1670                         mps = MLX5_MPW;
1671                 }
1672         } else {
1673                 DRV_LOG(DEBUG, "MPW isn't supported");
1674                 mps = MLX5_MPW_DISABLED;
1675         }
1676 #ifdef HAVE_IBV_MLX5_MOD_SWP
1677         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1678                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1679         DRV_LOG(DEBUG, "SWP support: %u", swp);
1680 #endif
1681         config.swp = !!swp;
1682 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1683         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1684                 struct mlx5dv_striding_rq_caps mprq_caps =
1685                         dv_attr.striding_rq_caps;
1686
1687                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1688                         mprq_caps.min_single_stride_log_num_of_bytes);
1689                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1690                         mprq_caps.max_single_stride_log_num_of_bytes);
1691                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1692                         mprq_caps.min_single_wqe_log_num_of_strides);
1693                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1694                         mprq_caps.max_single_wqe_log_num_of_strides);
1695                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1696                         mprq_caps.supported_qpts);
1697                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1698                 mprq = 1;
1699                 mprq_min_stride_size_n =
1700                         mprq_caps.min_single_stride_log_num_of_bytes;
1701                 mprq_max_stride_size_n =
1702                         mprq_caps.max_single_stride_log_num_of_bytes;
1703                 mprq_min_stride_num_n =
1704                         mprq_caps.min_single_wqe_log_num_of_strides;
1705                 mprq_max_stride_num_n =
1706                         mprq_caps.max_single_wqe_log_num_of_strides;
1707                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1708                                                    mprq_min_stride_num_n);
1709         }
1710 #endif
1711         if (RTE_CACHE_LINE_SIZE == 128 &&
1712             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1713                 cqe_comp = 0;
1714         else
1715                 cqe_comp = 1;
1716         config.cqe_comp = cqe_comp;
1717 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1718         /* Whether device supports 128B Rx CQE padding. */
1719         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1720                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1721 #endif
1722 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1723         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1724                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1725                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1726                              (dv_attr.tunnel_offloads_caps &
1727                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1728         }
1729         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1730                 tunnel_en ? "" : "not ");
1731 #else
1732         DRV_LOG(WARNING,
1733                 "tunnel offloading disabled due to old OFED/rdma-core version");
1734 #endif
1735         config.tunnel_en = tunnel_en;
1736 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1737         mpls_en = ((dv_attr.tunnel_offloads_caps &
1738                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1739                    (dv_attr.tunnel_offloads_caps &
1740                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1741         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1742                 mpls_en ? "" : "not ");
1743 #else
1744         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1745                 " old OFED/rdma-core version or firmware configuration");
1746 #endif
1747         config.mpls_en = mpls_en;
1748         /* Check port status. */
1749         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1750         if (err) {
1751                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1752                 goto error;
1753         }
1754         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1755                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1756                 err = EINVAL;
1757                 goto error;
1758         }
1759         if (port_attr.state != IBV_PORT_ACTIVE)
1760                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1761                         mlx5_glue->port_state_str(port_attr.state),
1762                         port_attr.state);
1763         /* Allocate private eth device data. */
1764         priv = rte_zmalloc("ethdev private structure",
1765                            sizeof(*priv),
1766                            RTE_CACHE_LINE_SIZE);
1767         if (priv == NULL) {
1768                 DRV_LOG(ERR, "priv allocation failure");
1769                 err = ENOMEM;
1770                 goto error;
1771         }
1772         priv->sh = sh;
1773         priv->ibv_port = spawn->ibv_port;
1774         priv->pci_dev = spawn->pci_dev;
1775         priv->mtu = RTE_ETHER_MTU;
1776 #ifndef RTE_ARCH_64
1777         /* Initialize UAR access locks for 32bit implementations. */
1778         rte_spinlock_init(&priv->uar_lock_cq);
1779         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1780                 rte_spinlock_init(&priv->uar_lock[i]);
1781 #endif
1782         /* Some internal functions rely on Netlink sockets, open them now. */
1783         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1784         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1785         priv->nl_sn = 0;
1786         priv->representor = !!switch_info->representor;
1787         priv->master = !!switch_info->master;
1788         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1789         priv->vport_meta_tag = 0;
1790         priv->vport_meta_mask = 0;
1791         priv->pf_bond = spawn->pf_bond;
1792 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1793         /*
1794          * The DevX port query API is implemented. E-Switch may use
1795          * either vport or reg_c[0] metadata register to match on
1796          * vport index. The engaged part of metadata register is
1797          * defined by mask.
1798          */
1799         devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1800                               MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1801         err = mlx5dv_query_devx_port(sh->ctx, spawn->ibv_port, &devx_port);
1802         if (err) {
1803                 DRV_LOG(WARNING, "can't query devx port %d on device %s\n",
1804                         spawn->ibv_port, spawn->ibv_dev->name);
1805                 devx_port.comp_mask = 0;
1806         }
1807         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1808                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1809                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1810                 if (!priv->vport_meta_mask) {
1811                         DRV_LOG(ERR, "vport zero mask for port %d"
1812                                      " on bonding device %s\n",
1813                                      spawn->ibv_port, spawn->ibv_dev->name);
1814                         err = ENOTSUP;
1815                         goto error;
1816                 }
1817                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1818                         DRV_LOG(ERR, "invalid vport tag for port %d"
1819                                      " on bonding device %s\n",
1820                                      spawn->ibv_port, spawn->ibv_dev->name);
1821                         err = ENOTSUP;
1822                         goto error;
1823                 }
1824         } else if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1825                 priv->vport_id = devx_port.vport_num;
1826         } else if (spawn->pf_bond >= 0) {
1827                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1828                              " on bonding device %s\n",
1829                              spawn->ibv_port, spawn->ibv_dev->name);
1830                 err = ENOTSUP;
1831                 goto error;
1832         } else {
1833                 /* Suppose vport index in compatible way. */
1834                 priv->vport_id = switch_info->representor ?
1835                                  switch_info->port_name + 1 : -1;
1836         }
1837 #else
1838         /*
1839          * Kernel/rdma_core support single E-Switch per PF configurations
1840          * only and vport_id field contains the vport index for
1841          * associated VF, which is deduced from representor port name.
1842          * For example, let's have the IB device port 10, it has
1843          * attached network device eth0, which has port name attribute
1844          * pf0vf2, we can deduce the VF number as 2, and set vport index
1845          * as 3 (2+1). This assigning schema should be changed if the
1846          * multiple E-Switch instances per PF configurations or/and PCI
1847          * subfunctions are added.
1848          */
1849         priv->vport_id = switch_info->representor ?
1850                          switch_info->port_name + 1 : -1;
1851 #endif
1852         /* representor_id field keeps the unmodified VF index. */
1853         priv->representor_id = switch_info->representor ?
1854                                switch_info->port_name : -1;
1855         /*
1856          * Look for sibling devices in order to reuse their switch domain
1857          * if any, otherwise allocate one.
1858          */
1859         MLX5_ETH_FOREACH_DEV(port_id) {
1860                 const struct mlx5_priv *opriv =
1861                         rte_eth_devices[port_id].data->dev_private;
1862
1863                 if (!opriv ||
1864                     opriv->sh != priv->sh ||
1865                         opriv->domain_id ==
1866                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1867                         continue;
1868                 priv->domain_id = opriv->domain_id;
1869                 break;
1870         }
1871         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1872                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1873                 if (err) {
1874                         err = rte_errno;
1875                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1876                                 strerror(rte_errno));
1877                         goto error;
1878                 }
1879                 own_domain_id = 1;
1880         }
1881         err = mlx5_args(&config, dpdk_dev->devargs);
1882         if (err) {
1883                 err = rte_errno;
1884                 DRV_LOG(ERR, "failed to process device arguments: %s",
1885                         strerror(rte_errno));
1886                 goto error;
1887         }
1888         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1889                             IBV_DEVICE_RAW_IP_CSUM);
1890         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1891                 (config.hw_csum ? "" : "not "));
1892 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1893         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1894         DRV_LOG(DEBUG, "counters are not supported");
1895 #endif
1896 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1897         if (config.dv_flow_en) {
1898                 DRV_LOG(WARNING, "DV flow is not supported");
1899                 config.dv_flow_en = 0;
1900         }
1901 #endif
1902         config.ind_table_max_size =
1903                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1904         /*
1905          * Remove this check once DPDK supports larger/variable
1906          * indirection tables.
1907          */
1908         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1909                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1910         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1911                 config.ind_table_max_size);
1912         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1913                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1914         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1915                 (config.hw_vlan_strip ? "" : "not "));
1916         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1917                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1918         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1919                 (config.hw_fcs_strip ? "" : "not "));
1920 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1921         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1922 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1923         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1924                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1925 #endif
1926         if (config.hw_padding && !hw_padding) {
1927                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1928                 config.hw_padding = 0;
1929         } else if (config.hw_padding) {
1930                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1931         }
1932         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1933                       (sh->device_attr.tso_caps.supported_qpts &
1934                        (1 << IBV_QPT_RAW_PACKET)));
1935         if (config.tso)
1936                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1937         /*
1938          * MPW is disabled by default, while the Enhanced MPW is enabled
1939          * by default.
1940          */
1941         if (config.mps == MLX5_ARG_UNSET)
1942                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1943                                                           MLX5_MPW_DISABLED;
1944         else
1945                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1946         DRV_LOG(INFO, "%sMPS is %s",
1947                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1948                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1949         if (config.cqe_comp && !cqe_comp) {
1950                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1951                 config.cqe_comp = 0;
1952         }
1953         if (config.cqe_pad && !cqe_pad) {
1954                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1955                 config.cqe_pad = 0;
1956         } else if (config.cqe_pad) {
1957                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1958         }
1959         if (config.devx) {
1960                 priv->counter_fallback = 0;
1961                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1962                 if (err) {
1963                         err = -err;
1964                         goto error;
1965                 }
1966                 if (!config.hca_attr.flow_counters_dump)
1967                         priv->counter_fallback = 1;
1968 #ifndef HAVE_IBV_DEVX_ASYNC
1969                 priv->counter_fallback = 1;
1970 #endif
1971                 if (priv->counter_fallback)
1972                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1973                 /* Check for LRO support. */
1974                 if (config.dest_tir && config.hca_attr.lro_cap) {
1975                         /* TBD check tunnel lro caps. */
1976                         config.lro.supported = config.hca_attr.lro_cap;
1977                         DRV_LOG(DEBUG, "Device supports LRO");
1978                         /*
1979                          * If LRO timeout is not configured by application,
1980                          * use the minimal supported value.
1981                          */
1982                         if (!config.lro.timeout)
1983                                 config.lro.timeout =
1984                                 config.hca_attr.lro_timer_supported_periods[0];
1985                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1986                                 config.lro.timeout);
1987                 }
1988         }
1989         if (config.mprq.enabled && mprq) {
1990                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1991                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1992                         config.mprq.stride_num_n =
1993                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1994                                         mprq_min_stride_num_n);
1995                         DRV_LOG(WARNING,
1996                                 "the number of strides"
1997                                 " for Multi-Packet RQ is out of range,"
1998                                 " setting default value (%u)",
1999                                 1 << config.mprq.stride_num_n);
2000                 }
2001                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2002                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2003         } else if (config.mprq.enabled && !mprq) {
2004                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2005                 config.mprq.enabled = 0;
2006         }
2007         if (config.max_dump_files_num == 0)
2008                 config.max_dump_files_num = 128;
2009         eth_dev = rte_eth_dev_allocate(name);
2010         if (eth_dev == NULL) {
2011                 DRV_LOG(ERR, "can not allocate rte ethdev");
2012                 err = ENOMEM;
2013                 goto error;
2014         }
2015         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2016         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2017         if (priv->representor) {
2018                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2019                 eth_dev->data->representor_id = priv->representor_id;
2020         }
2021         /*
2022          * Store associated network device interface index. This index
2023          * is permanent throughout the lifetime of device. So, we may store
2024          * the ifindex here and use the cached value further.
2025          */
2026         assert(spawn->ifindex);
2027         priv->if_index = spawn->ifindex;
2028         eth_dev->data->dev_private = priv;
2029         priv->dev_data = eth_dev->data;
2030         eth_dev->data->mac_addrs = priv->mac;
2031         eth_dev->device = dpdk_dev;
2032         /* Configure the first MAC address by default. */
2033         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2034                 DRV_LOG(ERR,
2035                         "port %u cannot get MAC address, is mlx5_en"
2036                         " loaded? (errno: %s)",
2037                         eth_dev->data->port_id, strerror(rte_errno));
2038                 err = ENODEV;
2039                 goto error;
2040         }
2041         DRV_LOG(INFO,
2042                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2043                 eth_dev->data->port_id,
2044                 mac.addr_bytes[0], mac.addr_bytes[1],
2045                 mac.addr_bytes[2], mac.addr_bytes[3],
2046                 mac.addr_bytes[4], mac.addr_bytes[5]);
2047 #ifndef NDEBUG
2048         {
2049                 char ifname[IF_NAMESIZE];
2050
2051                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2052                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2053                                 eth_dev->data->port_id, ifname);
2054                 else
2055                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2056                                 eth_dev->data->port_id);
2057         }
2058 #endif
2059         /* Get actual MTU if possible. */
2060         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2061         if (err) {
2062                 err = rte_errno;
2063                 goto error;
2064         }
2065         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2066                 priv->mtu);
2067         /* Initialize burst functions to prevent crashes before link-up. */
2068         eth_dev->rx_pkt_burst = removed_rx_burst;
2069         eth_dev->tx_pkt_burst = removed_tx_burst;
2070         eth_dev->dev_ops = &mlx5_dev_ops;
2071         /* Register MAC address. */
2072         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2073         if (config.vf && config.vf_nl_en)
2074                 mlx5_nl_mac_addr_sync(eth_dev);
2075         TAILQ_INIT(&priv->flows);
2076         TAILQ_INIT(&priv->ctrl_flows);
2077         /* Hint libmlx5 to use PMD allocator for data plane resources */
2078         struct mlx5dv_ctx_allocators alctr = {
2079                 .alloc = &mlx5_alloc_verbs_buf,
2080                 .free = &mlx5_free_verbs_buf,
2081                 .data = priv,
2082         };
2083         mlx5_glue->dv_set_context_attr(sh->ctx,
2084                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2085                                        (void *)((uintptr_t)&alctr));
2086         /* Bring Ethernet device up. */
2087         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2088                 eth_dev->data->port_id);
2089         mlx5_set_link_up(eth_dev);
2090         /*
2091          * Even though the interrupt handler is not installed yet,
2092          * interrupts will still trigger on the async_fd from
2093          * Verbs context returned by ibv_open_device().
2094          */
2095         mlx5_link_update(eth_dev, 0);
2096 #ifdef HAVE_MLX5DV_DR_ESWITCH
2097         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2098               (switch_info->representor || switch_info->master)))
2099                 config.dv_esw_en = 0;
2100 #else
2101         config.dv_esw_en = 0;
2102 #endif
2103         /* Detect minimal data bytes to inline. */
2104         mlx5_set_min_inline(spawn, &config);
2105         /* Store device configuration on private structure. */
2106         priv->config = config;
2107         /* Create context for virtual machine VLAN workaround. */
2108         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2109         if (config.dv_flow_en) {
2110                 err = mlx5_alloc_shared_dr(priv);
2111                 if (err)
2112                         goto error;
2113         }
2114         /* Supported Verbs flow priority number detection. */
2115         err = mlx5_flow_discover_priorities(eth_dev);
2116         if (err < 0) {
2117                 err = -err;
2118                 goto error;
2119         }
2120         priv->config.flow_prio = err;
2121         return eth_dev;
2122 error:
2123         if (priv) {
2124                 if (priv->sh)
2125                         mlx5_free_shared_dr(priv);
2126                 if (priv->nl_socket_route >= 0)
2127                         close(priv->nl_socket_route);
2128                 if (priv->nl_socket_rdma >= 0)
2129                         close(priv->nl_socket_rdma);
2130                 if (priv->vmwa_context)
2131                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2132                 if (own_domain_id)
2133                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2134                 rte_free(priv);
2135                 if (eth_dev != NULL)
2136                         eth_dev->data->dev_private = NULL;
2137         }
2138         if (eth_dev != NULL) {
2139                 /* mac_addrs must not be freed alone because part of dev_private */
2140                 eth_dev->data->mac_addrs = NULL;
2141                 rte_eth_dev_release_port(eth_dev);
2142         }
2143         if (sh)
2144                 mlx5_free_shared_ibctx(sh);
2145         assert(err > 0);
2146         rte_errno = err;
2147         return NULL;
2148 }
2149
2150 /**
2151  * Comparison callback to sort device data.
2152  *
2153  * This is meant to be used with qsort().
2154  *
2155  * @param a[in]
2156  *   Pointer to pointer to first data object.
2157  * @param b[in]
2158  *   Pointer to pointer to second data object.
2159  *
2160  * @return
2161  *   0 if both objects are equal, less than 0 if the first argument is less
2162  *   than the second, greater than 0 otherwise.
2163  */
2164 static int
2165 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2166 {
2167         const struct mlx5_switch_info *si_a =
2168                 &((const struct mlx5_dev_spawn_data *)a)->info;
2169         const struct mlx5_switch_info *si_b =
2170                 &((const struct mlx5_dev_spawn_data *)b)->info;
2171         int ret;
2172
2173         /* Master device first. */
2174         ret = si_b->master - si_a->master;
2175         if (ret)
2176                 return ret;
2177         /* Then representor devices. */
2178         ret = si_b->representor - si_a->representor;
2179         if (ret)
2180                 return ret;
2181         /* Unidentified devices come last in no specific order. */
2182         if (!si_a->representor)
2183                 return 0;
2184         /* Order representors by name. */
2185         return si_a->port_name - si_b->port_name;
2186 }
2187
2188 /**
2189  * Match PCI information for possible slaves of bonding device.
2190  *
2191  * @param[in] ibv_dev
2192  *   Pointer to Infiniband device structure.
2193  * @param[in] pci_dev
2194  *   Pointer to PCI device structure to match PCI address.
2195  * @param[in] nl_rdma
2196  *   Netlink RDMA group socket handle.
2197  *
2198  * @return
2199  *   negative value if no bonding device found, otherwise
2200  *   positive index of slave PF in bonding.
2201  */
2202 static int
2203 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2204                            const struct rte_pci_device *pci_dev,
2205                            int nl_rdma)
2206 {
2207         char ifname[IF_NAMESIZE + 1];
2208         unsigned int ifindex;
2209         unsigned int np, i;
2210         FILE *file = NULL;
2211         int pf = -1;
2212
2213         /*
2214          * Try to get master device name. If something goes
2215          * wrong suppose the lack of kernel support and no
2216          * bonding devices.
2217          */
2218         if (nl_rdma < 0)
2219                 return -1;
2220         if (!strstr(ibv_dev->name, "bond"))
2221                 return -1;
2222         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2223         if (!np)
2224                 return -1;
2225         /*
2226          * The Master device might not be on the predefined
2227          * port (not on port index 1, it is not garanted),
2228          * we have to scan all Infiniband device port and
2229          * find master.
2230          */
2231         for (i = 1; i <= np; ++i) {
2232                 /* Check whether Infiniband port is populated. */
2233                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2234                 if (!ifindex)
2235                         continue;
2236                 if (!if_indextoname(ifindex, ifname))
2237                         continue;
2238                 /* Try to read bonding slave names from sysfs. */
2239                 MKSTR(slaves,
2240                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2241                 file = fopen(slaves, "r");
2242                 if (file)
2243                         break;
2244         }
2245         if (!file)
2246                 return -1;
2247         /* Use safe format to check maximal buffer length. */
2248         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2249         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2250                 char tmp_str[IF_NAMESIZE + 32];
2251                 struct rte_pci_addr pci_addr;
2252                 struct mlx5_switch_info info;
2253
2254                 /* Process slave interface names in the loop. */
2255                 snprintf(tmp_str, sizeof(tmp_str),
2256                          "/sys/class/net/%s", ifname);
2257                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2258                         DRV_LOG(WARNING, "can not get PCI address"
2259                                          " for netdev \"%s\"", ifname);
2260                         continue;
2261                 }
2262                 if (pci_dev->addr.domain != pci_addr.domain ||
2263                     pci_dev->addr.bus != pci_addr.bus ||
2264                     pci_dev->addr.devid != pci_addr.devid ||
2265                     pci_dev->addr.function != pci_addr.function)
2266                         continue;
2267                 /* Slave interface PCI address match found. */
2268                 fclose(file);
2269                 snprintf(tmp_str, sizeof(tmp_str),
2270                          "/sys/class/net/%s/phys_port_name", ifname);
2271                 file = fopen(tmp_str, "rb");
2272                 if (!file)
2273                         break;
2274                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2275                 if (fscanf(file, "%32s", tmp_str) == 1)
2276                         mlx5_translate_port_name(tmp_str, &info);
2277                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2278                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2279                         pf = info.port_name;
2280                 break;
2281         }
2282         if (file)
2283                 fclose(file);
2284         return pf;
2285 }
2286
2287 /**
2288  * DPDK callback to register a PCI device.
2289  *
2290  * This function spawns Ethernet devices out of a given PCI device.
2291  *
2292  * @param[in] pci_drv
2293  *   PCI driver structure (mlx5_driver).
2294  * @param[in] pci_dev
2295  *   PCI device information.
2296  *
2297  * @return
2298  *   0 on success, a negative errno value otherwise and rte_errno is set.
2299  */
2300 static int
2301 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2302                struct rte_pci_device *pci_dev)
2303 {
2304         struct ibv_device **ibv_list;
2305         /*
2306          * Number of found IB Devices matching with requested PCI BDF.
2307          * nd != 1 means there are multiple IB devices over the same
2308          * PCI device and we have representors and master.
2309          */
2310         unsigned int nd = 0;
2311         /*
2312          * Number of found IB device Ports. nd = 1 and np = 1..n means
2313          * we have the single multiport IB device, and there may be
2314          * representors attached to some of found ports.
2315          */
2316         unsigned int np = 0;
2317         /*
2318          * Number of DPDK ethernet devices to Spawn - either over
2319          * multiple IB devices or multiple ports of single IB device.
2320          * Actually this is the number of iterations to spawn.
2321          */
2322         unsigned int ns = 0;
2323         /*
2324          * Bonding device
2325          *   < 0 - no bonding device (single one)
2326          *  >= 0 - bonding device (value is slave PF index)
2327          */
2328         int bd = -1;
2329         struct mlx5_dev_spawn_data *list = NULL;
2330         struct mlx5_dev_config dev_config;
2331         int ret;
2332
2333         ret = mlx5_init_once();
2334         if (ret) {
2335                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2336                         strerror(rte_errno));
2337                 return -rte_errno;
2338         }
2339         assert(pci_drv == &mlx5_driver);
2340         errno = 0;
2341         ibv_list = mlx5_glue->get_device_list(&ret);
2342         if (!ibv_list) {
2343                 rte_errno = errno ? errno : ENOSYS;
2344                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2345                 return -rte_errno;
2346         }
2347         /*
2348          * First scan the list of all Infiniband devices to find
2349          * matching ones, gathering into the list.
2350          */
2351         struct ibv_device *ibv_match[ret + 1];
2352         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2353         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2354         unsigned int i;
2355
2356         while (ret-- > 0) {
2357                 struct rte_pci_addr pci_addr;
2358
2359                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2360                 bd = mlx5_device_bond_pci_match
2361                                 (ibv_list[ret], pci_dev, nl_rdma);
2362                 if (bd >= 0) {
2363                         /*
2364                          * Bonding device detected. Only one match is allowed,
2365                          * the bonding is supported over multi-port IB device,
2366                          * there should be no matches on representor PCI
2367                          * functions or non VF LAG bonding devices with
2368                          * specified address.
2369                          */
2370                         if (nd) {
2371                                 DRV_LOG(ERR,
2372                                         "multiple PCI match on bonding device"
2373                                         "\"%s\" found", ibv_list[ret]->name);
2374                                 rte_errno = ENOENT;
2375                                 ret = -rte_errno;
2376                                 goto exit;
2377                         }
2378                         DRV_LOG(INFO, "PCI information matches for"
2379                                       " slave %d bonding device \"%s\"",
2380                                       bd, ibv_list[ret]->name);
2381                         ibv_match[nd++] = ibv_list[ret];
2382                         break;
2383                 }
2384                 if (mlx5_dev_to_pci_addr
2385                         (ibv_list[ret]->ibdev_path, &pci_addr))
2386                         continue;
2387                 if (pci_dev->addr.domain != pci_addr.domain ||
2388                     pci_dev->addr.bus != pci_addr.bus ||
2389                     pci_dev->addr.devid != pci_addr.devid ||
2390                     pci_dev->addr.function != pci_addr.function)
2391                         continue;
2392                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2393                         ibv_list[ret]->name);
2394                 ibv_match[nd++] = ibv_list[ret];
2395         }
2396         ibv_match[nd] = NULL;
2397         if (!nd) {
2398                 /* No device matches, just complain and bail out. */
2399                 DRV_LOG(WARNING,
2400                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2401                         " are kernel drivers loaded?",
2402                         pci_dev->addr.domain, pci_dev->addr.bus,
2403                         pci_dev->addr.devid, pci_dev->addr.function);
2404                 rte_errno = ENOENT;
2405                 ret = -rte_errno;
2406                 goto exit;
2407         }
2408         if (nd == 1) {
2409                 /*
2410                  * Found single matching device may have multiple ports.
2411                  * Each port may be representor, we have to check the port
2412                  * number and check the representors existence.
2413                  */
2414                 if (nl_rdma >= 0)
2415                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2416                 if (!np)
2417                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2418                                          " ports number", ibv_match[0]->name);
2419                 if (bd >= 0 && !np) {
2420                         DRV_LOG(ERR, "can not get ports"
2421                                      " for bonding device");
2422                         rte_errno = ENOENT;
2423                         ret = -rte_errno;
2424                         goto exit;
2425                 }
2426         }
2427 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2428         if (bd >= 0) {
2429                 /*
2430                  * This may happen if there is VF LAG kernel support and
2431                  * application is compiled with older rdma_core library.
2432                  */
2433                 DRV_LOG(ERR,
2434                         "No kernel/verbs support for VF LAG bonding found.");
2435                 rte_errno = ENOTSUP;
2436                 ret = -rte_errno;
2437                 goto exit;
2438         }
2439 #endif
2440         /*
2441          * Now we can determine the maximal
2442          * amount of devices to be spawned.
2443          */
2444         list = rte_zmalloc("device spawn data",
2445                          sizeof(struct mlx5_dev_spawn_data) *
2446                          (np ? np : nd),
2447                          RTE_CACHE_LINE_SIZE);
2448         if (!list) {
2449                 DRV_LOG(ERR, "spawn data array allocation failure");
2450                 rte_errno = ENOMEM;
2451                 ret = -rte_errno;
2452                 goto exit;
2453         }
2454         if (bd >= 0 || np > 1) {
2455                 /*
2456                  * Single IB device with multiple ports found,
2457                  * it may be E-Switch master device and representors.
2458                  * We have to perform identification trough the ports.
2459                  */
2460                 assert(nl_rdma >= 0);
2461                 assert(ns == 0);
2462                 assert(nd == 1);
2463                 assert(np);
2464                 for (i = 1; i <= np; ++i) {
2465                         list[ns].max_port = np;
2466                         list[ns].ibv_port = i;
2467                         list[ns].ibv_dev = ibv_match[0];
2468                         list[ns].eth_dev = NULL;
2469                         list[ns].pci_dev = pci_dev;
2470                         list[ns].pf_bond = bd;
2471                         list[ns].ifindex = mlx5_nl_ifindex
2472                                         (nl_rdma, list[ns].ibv_dev->name, i);
2473                         if (!list[ns].ifindex) {
2474                                 /*
2475                                  * No network interface index found for the
2476                                  * specified port, it means there is no
2477                                  * representor on this port. It's OK,
2478                                  * there can be disabled ports, for example
2479                                  * if sriov_numvfs < sriov_totalvfs.
2480                                  */
2481                                 continue;
2482                         }
2483                         ret = -1;
2484                         if (nl_route >= 0)
2485                                 ret = mlx5_nl_switch_info
2486                                                (nl_route,
2487                                                 list[ns].ifindex,
2488                                                 &list[ns].info);
2489                         if (ret || (!list[ns].info.representor &&
2490                                     !list[ns].info.master)) {
2491                                 /*
2492                                  * We failed to recognize representors with
2493                                  * Netlink, let's try to perform the task
2494                                  * with sysfs.
2495                                  */
2496                                 ret =  mlx5_sysfs_switch_info
2497                                                 (list[ns].ifindex,
2498                                                  &list[ns].info);
2499                         }
2500                         if (!ret && bd >= 0) {
2501                                 switch (list[ns].info.name_type) {
2502                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2503                                         if (list[ns].info.port_name == bd)
2504                                                 ns++;
2505                                         break;
2506                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2507                                         if (list[ns].info.pf_num == bd)
2508                                                 ns++;
2509                                         break;
2510                                 default:
2511                                         break;
2512                                 }
2513                                 continue;
2514                         }
2515                         if (!ret && (list[ns].info.representor ^
2516                                      list[ns].info.master))
2517                                 ns++;
2518                 }
2519                 if (!ns) {
2520                         DRV_LOG(ERR,
2521                                 "unable to recognize master/representors"
2522                                 " on the IB device with multiple ports");
2523                         rte_errno = ENOENT;
2524                         ret = -rte_errno;
2525                         goto exit;
2526                 }
2527         } else {
2528                 /*
2529                  * The existence of several matching entries (nd > 1) means
2530                  * port representors have been instantiated. No existing Verbs
2531                  * call nor sysfs entries can tell them apart, this can only
2532                  * be done through Netlink calls assuming kernel drivers are
2533                  * recent enough to support them.
2534                  *
2535                  * In the event of identification failure through Netlink,
2536                  * try again through sysfs, then:
2537                  *
2538                  * 1. A single IB device matches (nd == 1) with single
2539                  *    port (np=0/1) and is not a representor, assume
2540                  *    no switch support.
2541                  *
2542                  * 2. Otherwise no safe assumptions can be made;
2543                  *    complain louder and bail out.
2544                  */
2545                 np = 1;
2546                 for (i = 0; i != nd; ++i) {
2547                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2548                         list[ns].max_port = 1;
2549                         list[ns].ibv_port = 1;
2550                         list[ns].ibv_dev = ibv_match[i];
2551                         list[ns].eth_dev = NULL;
2552                         list[ns].pci_dev = pci_dev;
2553                         list[ns].pf_bond = -1;
2554                         list[ns].ifindex = 0;
2555                         if (nl_rdma >= 0)
2556                                 list[ns].ifindex = mlx5_nl_ifindex
2557                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2558                         if (!list[ns].ifindex) {
2559                                 char ifname[IF_NAMESIZE];
2560
2561                                 /*
2562                                  * Netlink failed, it may happen with old
2563                                  * ib_core kernel driver (before 4.16).
2564                                  * We can assume there is old driver because
2565                                  * here we are processing single ports IB
2566                                  * devices. Let's try sysfs to retrieve
2567                                  * the ifindex. The method works for
2568                                  * master device only.
2569                                  */
2570                                 if (nd > 1) {
2571                                         /*
2572                                          * Multiple devices found, assume
2573                                          * representors, can not distinguish
2574                                          * master/representor and retrieve
2575                                          * ifindex via sysfs.
2576                                          */
2577                                         continue;
2578                                 }
2579                                 ret = mlx5_get_master_ifname
2580                                         (ibv_match[i]->ibdev_path, &ifname);
2581                                 if (!ret)
2582                                         list[ns].ifindex =
2583                                                 if_nametoindex(ifname);
2584                                 if (!list[ns].ifindex) {
2585                                         /*
2586                                          * No network interface index found
2587                                          * for the specified device, it means
2588                                          * there it is neither representor
2589                                          * nor master.
2590                                          */
2591                                         continue;
2592                                 }
2593                         }
2594                         ret = -1;
2595                         if (nl_route >= 0)
2596                                 ret = mlx5_nl_switch_info
2597                                                (nl_route,
2598                                                 list[ns].ifindex,
2599                                                 &list[ns].info);
2600                         if (ret || (!list[ns].info.representor &&
2601                                     !list[ns].info.master)) {
2602                                 /*
2603                                  * We failed to recognize representors with
2604                                  * Netlink, let's try to perform the task
2605                                  * with sysfs.
2606                                  */
2607                                 ret =  mlx5_sysfs_switch_info
2608                                                 (list[ns].ifindex,
2609                                                  &list[ns].info);
2610                         }
2611                         if (!ret && (list[ns].info.representor ^
2612                                      list[ns].info.master)) {
2613                                 ns++;
2614                         } else if ((nd == 1) &&
2615                                    !list[ns].info.representor &&
2616                                    !list[ns].info.master) {
2617                                 /*
2618                                  * Single IB device with
2619                                  * one physical port and
2620                                  * attached network device.
2621                                  * May be SRIOV is not enabled
2622                                  * or there is no representors.
2623                                  */
2624                                 DRV_LOG(INFO, "no E-Switch support detected");
2625                                 ns++;
2626                                 break;
2627                         }
2628                 }
2629                 if (!ns) {
2630                         DRV_LOG(ERR,
2631                                 "unable to recognize master/representors"
2632                                 " on the multiple IB devices");
2633                         rte_errno = ENOENT;
2634                         ret = -rte_errno;
2635                         goto exit;
2636                 }
2637         }
2638         assert(ns);
2639         /*
2640          * Sort list to probe devices in natural order for users convenience
2641          * (i.e. master first, then representors from lowest to highest ID).
2642          */
2643         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2644         /* Default configuration. */
2645         dev_config = (struct mlx5_dev_config){
2646                 .hw_padding = 0,
2647                 .mps = MLX5_ARG_UNSET,
2648                 .rx_vec_en = 1,
2649                 .txq_inline_max = MLX5_ARG_UNSET,
2650                 .txq_inline_min = MLX5_ARG_UNSET,
2651                 .txq_inline_mpw = MLX5_ARG_UNSET,
2652                 .txqs_inline = MLX5_ARG_UNSET,
2653                 .vf_nl_en = 1,
2654                 .mr_ext_memseg_en = 1,
2655                 .mprq = {
2656                         .enabled = 0, /* Disabled by default. */
2657                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2658                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2659                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2660                 },
2661                 .dv_esw_en = 1,
2662         };
2663         /* Device specific configuration. */
2664         switch (pci_dev->id.device_id) {
2665         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2666         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2667         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2668         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2669         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2670         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2671                 dev_config.vf = 1;
2672                 break;
2673         default:
2674                 break;
2675         }
2676         for (i = 0; i != ns; ++i) {
2677                 uint32_t restore;
2678
2679                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2680                                                  &list[i],
2681                                                  dev_config);
2682                 if (!list[i].eth_dev) {
2683                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2684                                 break;
2685                         /* Device is disabled or already spawned. Ignore it. */
2686                         continue;
2687                 }
2688                 restore = list[i].eth_dev->data->dev_flags;
2689                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2690                 /* Restore non-PCI flags cleared by the above call. */
2691                 list[i].eth_dev->data->dev_flags |= restore;
2692                 rte_eth_dev_probing_finish(list[i].eth_dev);
2693         }
2694         if (i != ns) {
2695                 DRV_LOG(ERR,
2696                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2697                         " encountering an error: %s",
2698                         pci_dev->addr.domain, pci_dev->addr.bus,
2699                         pci_dev->addr.devid, pci_dev->addr.function,
2700                         strerror(rte_errno));
2701                 ret = -rte_errno;
2702                 /* Roll back. */
2703                 while (i--) {
2704                         if (!list[i].eth_dev)
2705                                 continue;
2706                         mlx5_dev_close(list[i].eth_dev);
2707                         /* mac_addrs must not be freed because in dev_private */
2708                         list[i].eth_dev->data->mac_addrs = NULL;
2709                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2710                 }
2711                 /* Restore original error. */
2712                 rte_errno = -ret;
2713         } else {
2714                 ret = 0;
2715         }
2716 exit:
2717         /*
2718          * Do the routine cleanup:
2719          * - close opened Netlink sockets
2720          * - free allocated spawn data array
2721          * - free the Infiniband device list
2722          */
2723         if (nl_rdma >= 0)
2724                 close(nl_rdma);
2725         if (nl_route >= 0)
2726                 close(nl_route);
2727         if (list)
2728                 rte_free(list);
2729         assert(ibv_list);
2730         mlx5_glue->free_device_list(ibv_list);
2731         return ret;
2732 }
2733
2734 uint16_t
2735 mlx5_eth_find_next(uint16_t port_id)
2736 {
2737         while (port_id < RTE_MAX_ETHPORTS) {
2738                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2739
2740                 if (dev->state != RTE_ETH_DEV_UNUSED &&
2741                     dev->device &&
2742                     dev->device->driver &&
2743                     dev->device->driver->name &&
2744                     !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))
2745                         break;
2746                 port_id++;
2747         }
2748         if (port_id >= RTE_MAX_ETHPORTS)
2749                 return RTE_MAX_ETHPORTS;
2750         return port_id;
2751 }
2752
2753 /**
2754  * DPDK callback to remove a PCI device.
2755  *
2756  * This function removes all Ethernet devices belong to a given PCI device.
2757  *
2758  * @param[in] pci_dev
2759  *   Pointer to the PCI device.
2760  *
2761  * @return
2762  *   0 on success, the function cannot fail.
2763  */
2764 static int
2765 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2766 {
2767         uint16_t port_id;
2768
2769         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2770                 rte_eth_dev_close(port_id);
2771         return 0;
2772 }
2773
2774 static const struct rte_pci_id mlx5_pci_id_map[] = {
2775         {
2776                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2777                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2778         },
2779         {
2780                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2781                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2782         },
2783         {
2784                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2785                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2786         },
2787         {
2788                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2789                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2790         },
2791         {
2792                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2793                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2794         },
2795         {
2796                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2797                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2798         },
2799         {
2800                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2801                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2802         },
2803         {
2804                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2805                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2806         },
2807         {
2808                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2809                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2810         },
2811         {
2812                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2813                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2814         },
2815         {
2816                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2817                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2818         },
2819         {
2820                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2821                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2822         },
2823         {
2824                 .vendor_id = 0
2825         }
2826 };
2827
2828 static struct rte_pci_driver mlx5_driver = {
2829         .driver = {
2830                 .name = MLX5_DRIVER_NAME
2831         },
2832         .id_table = mlx5_pci_id_map,
2833         .probe = mlx5_pci_probe,
2834         .remove = mlx5_pci_remove,
2835         .dma_map = mlx5_dma_map,
2836         .dma_unmap = mlx5_dma_unmap,
2837         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2838                      RTE_PCI_DRV_PROBE_AGAIN,
2839 };
2840
2841 #ifdef RTE_IBVERBS_LINK_DLOPEN
2842
2843 /**
2844  * Suffix RTE_EAL_PMD_PATH with "-glue".
2845  *
2846  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2847  * suffixing its last component.
2848  *
2849  * @param buf[out]
2850  *   Output buffer, should be large enough otherwise NULL is returned.
2851  * @param size
2852  *   Size of @p out.
2853  *
2854  * @return
2855  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2856  */
2857 static char *
2858 mlx5_glue_path(char *buf, size_t size)
2859 {
2860         static const char *const bad[] = { "/", ".", "..", NULL };
2861         const char *path = RTE_EAL_PMD_PATH;
2862         size_t len = strlen(path);
2863         size_t off;
2864         int i;
2865
2866         while (len && path[len - 1] == '/')
2867                 --len;
2868         for (off = len; off && path[off - 1] != '/'; --off)
2869                 ;
2870         for (i = 0; bad[i]; ++i)
2871                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2872                         goto error;
2873         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2874         if (i == -1 || (size_t)i >= size)
2875                 goto error;
2876         return buf;
2877 error:
2878         DRV_LOG(ERR,
2879                 "unable to append \"-glue\" to last component of"
2880                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2881                 " please re-configure DPDK");
2882         return NULL;
2883 }
2884
2885 /**
2886  * Initialization routine for run-time dependency on rdma-core.
2887  */
2888 static int
2889 mlx5_glue_init(void)
2890 {
2891         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2892         const char *path[] = {
2893                 /*
2894                  * A basic security check is necessary before trusting
2895                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2896                  */
2897                 (geteuid() == getuid() && getegid() == getgid() ?
2898                  getenv("MLX5_GLUE_PATH") : NULL),
2899                 /*
2900                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2901                  * variant, otherwise let dlopen() look up libraries on its
2902                  * own.
2903                  */
2904                 (*RTE_EAL_PMD_PATH ?
2905                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2906         };
2907         unsigned int i = 0;
2908         void *handle = NULL;
2909         void **sym;
2910         const char *dlmsg;
2911
2912         while (!handle && i != RTE_DIM(path)) {
2913                 const char *end;
2914                 size_t len;
2915                 int ret;
2916
2917                 if (!path[i]) {
2918                         ++i;
2919                         continue;
2920                 }
2921                 end = strpbrk(path[i], ":;");
2922                 if (!end)
2923                         end = path[i] + strlen(path[i]);
2924                 len = end - path[i];
2925                 ret = 0;
2926                 do {
2927                         char name[ret + 1];
2928
2929                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2930                                        (int)len, path[i],
2931                                        (!len || *(end - 1) == '/') ? "" : "/");
2932                         if (ret == -1)
2933                                 break;
2934                         if (sizeof(name) != (size_t)ret + 1)
2935                                 continue;
2936                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2937                                 name);
2938                         handle = dlopen(name, RTLD_LAZY);
2939                         break;
2940                 } while (1);
2941                 path[i] = end + 1;
2942                 if (!*end)
2943                         ++i;
2944         }
2945         if (!handle) {
2946                 rte_errno = EINVAL;
2947                 dlmsg = dlerror();
2948                 if (dlmsg)
2949                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2950                 goto glue_error;
2951         }
2952         sym = dlsym(handle, "mlx5_glue");
2953         if (!sym || !*sym) {
2954                 rte_errno = EINVAL;
2955                 dlmsg = dlerror();
2956                 if (dlmsg)
2957                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2958                 goto glue_error;
2959         }
2960         mlx5_glue = *sym;
2961         return 0;
2962 glue_error:
2963         if (handle)
2964                 dlclose(handle);
2965         DRV_LOG(WARNING,
2966                 "cannot initialize PMD due to missing run-time dependency on"
2967                 " rdma-core libraries (libibverbs, libmlx5)");
2968         return -rte_errno;
2969 }
2970
2971 #endif
2972
2973 /**
2974  * Driver initialization routine.
2975  */
2976 RTE_INIT(rte_mlx5_pmd_init)
2977 {
2978         /* Initialize driver log type. */
2979         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2980         if (mlx5_logtype >= 0)
2981                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2982
2983         /* Build the static tables for Verbs conversion. */
2984         mlx5_set_ptype_table();
2985         mlx5_set_cksum_table();
2986         mlx5_set_swp_types_table();
2987         /*
2988          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2989          * huge pages. Calling ibv_fork_init() during init allows
2990          * applications to use fork() safely for purposes other than
2991          * using this PMD, which is not supported in forked processes.
2992          */
2993         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2994         /* Match the size of Rx completion entry to the size of a cacheline. */
2995         if (RTE_CACHE_LINE_SIZE == 128)
2996                 setenv("MLX5_CQE_SIZE", "128", 0);
2997         /*
2998          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2999          * cleanup all the Verbs resources even when the device was removed.
3000          */
3001         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3002 #ifdef RTE_IBVERBS_LINK_DLOPEN
3003         if (mlx5_glue_init())
3004                 return;
3005         assert(mlx5_glue);
3006 #endif
3007 #ifndef NDEBUG
3008         /* Glue structure must not contain any NULL pointers. */
3009         {
3010                 unsigned int i;
3011
3012                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3013                         assert(((const void *const *)mlx5_glue)[i]);
3014         }
3015 #endif
3016         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3017                 DRV_LOG(ERR,
3018                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3019                         mlx5_glue->version, MLX5_GLUE_VERSION);
3020                 return;
3021         }
3022         mlx5_glue->fork_init();
3023         rte_pci_register(&mlx5_driver);
3024 }
3025
3026 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3027 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3028 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");