drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV flow steering. */
 105 #define MLX5_DV_FLOW_EN "dv_flow_en"
 106
 107 /* Activate Netlink support in VF mode. */
 108 #define MLX5_VF_NL_EN "vf_nl_en"
 109
 110 /* Enable extending memsegs when creating a MR. */
 111 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 112
 113 /* Select port representors to instantiate. */
 114 #define MLX5_REPRESENTOR "representor"
 115
 116 #ifndef HAVE_IBV_MLX5_MOD_MPW
 117 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 118 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 119 #endif
 120
 121 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 122 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 123 #endif
 124
 125 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 126
 127 /* Shared memory between primary and secondary processes. */
 128 struct mlx5_shared_data *mlx5_shared_data;
 129
 130 /* Spinlock for mlx5_shared_data allocation. */
 131 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 132
 133 /* Process local data for secondary processes. */
 134 static struct mlx5_local_data mlx5_local_data;
 135
 136 /** Driver-specific log messages type. */
 137 int mlx5_logtype;
 138
 139 /** Data associated with devices to spawn. */
 140 struct mlx5_dev_spawn_data {
 141         uint32_t ifindex; /**< Network interface index. */
 142         uint32_t max_port; /**< IB device maximal port index. */
 143         uint32_t ibv_port; /**< IB device physical port index. */
 144         struct mlx5_switch_info info; /**< Switch information. */
 145         struct ibv_device *ibv_dev; /**< Associated IB device. */
 146         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 147 };
 148
 149 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 150 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 151
 152 /**
 153  * Allocate shared IB device context. If there is multiport device the
 154  * master and representors will share this context, if there is single
 155  * port dedicated IB device, the context will be used by only given
 156  * port due to unification.
 157  *
 158  * Routine first searches the context for the spesified IB device name,
 159  * if found the shared context assumed and reference counter is incremented.
 160  * If no context found the new one is created and initialized with specified
 161  * IB device context and parameters.
 162  *
 163  * @param[in] spawn
 164  *   Pointer to the IB device attributes (name, port, etc).
 165  *
 166  * @return
 167  *   Pointer to mlx5_ibv_shared object on success,
 168  *   otherwise NULL and rte_errno is set.
 169  */
 170 static struct mlx5_ibv_shared *
 171 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 172 {
 173         struct mlx5_ibv_shared *sh;
 174         int err = 0;
 175         uint32_t i;
 176
 177         assert(spawn);
 178         /* Secondary process should not create the shared context. */
 179         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 180         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 181         /* Search for IB context by device name. */
 182         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 183                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 184                         sh->refcnt++;
 185                         goto exit;
 186                 }
 187         }
 188         /* No device found, we have to create new sharted context. */
 189         assert(spawn->max_port);
 190         sh = rte_zmalloc("ethdev shared ib context",
 191                          sizeof(struct mlx5_ibv_shared) +
 192                          spawn->max_port *
 193                          sizeof(struct mlx5_ibv_shared_port),
 194                          RTE_CACHE_LINE_SIZE);
 195         if (!sh) {
 196                 DRV_LOG(ERR, "shared context allocation failure");
 197                 rte_errno  = ENOMEM;
 198                 goto exit;
 199         }
 200         /* Try to open IB device with DV first, then usual Verbs. */
 201         errno = 0;
 202         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 203         if (sh->ctx) {
 204                 sh->devx = 1;
 205                 DRV_LOG(DEBUG, "DevX is supported");
 206         } else {
 207                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 208                 if (!sh->ctx) {
 209                         err = errno ? errno : ENODEV;
 210                         goto error;
 211                 }
 212                 DRV_LOG(DEBUG, "DevX is NOT supported");
 213         }
 214         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 215         if (err) {
 216                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 217                 goto error;
 218         }
 219         sh->refcnt = 1;
 220         sh->max_port = spawn->max_port;
 221         strncpy(sh->ibdev_name, sh->ctx->device->name,
 222                 sizeof(sh->ibdev_name));
 223         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 224                 sizeof(sh->ibdev_path));
 225         pthread_mutex_init(&sh->intr_mutex, NULL);
 226         /*
 227          * Setting port_id to max unallowed value means
 228          * there is no interrupt subhandler installed for
 229          * the given port index i.
 230          */
 231         for (i = 0; i < sh->max_port; i++)
 232                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 233         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 234         if (sh->pd == NULL) {
 235                 DRV_LOG(ERR, "PD allocation failure");
 236                 err = ENOMEM;
 237                 goto error;
 238         }
 239         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 240 exit:
 241         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 242         return sh;
 243 error:
 244         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 245         assert(sh);
 246         if (sh->pd)
 247                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 248         if (sh->ctx)
 249                 claim_zero(mlx5_glue->close_device(sh->ctx));
 250         rte_free(sh);
 251         assert(err > 0);
 252         rte_errno = err;
 253         return NULL;
 254 }
 255
 256 /**
 257  * Free shared IB device context. Decrement counter and if zero free
 258  * all allocated resources and close handles.
 259  *
 260  * @param[in] sh
 261  *   Pointer to mlx5_ibv_shared object to free
 262  */
 263 static void
 264 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 265 {
 266         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 267 #ifndef NDEBUG
 268         /* Check the object presence in the list. */
 269         struct mlx5_ibv_shared *lctx;
 270
 271         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 272                 if (lctx == sh)
 273                         break;
 274         assert(lctx);
 275         if (lctx != sh) {
 276                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 277                 goto exit;
 278         }
 279 #endif
 280         assert(sh);
 281         assert(sh->refcnt);
 282         /* Secondary process should not free the shared context. */
 283         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 284         if (--sh->refcnt)
 285                 goto exit;
 286         LIST_REMOVE(sh, next);
 287         /*
 288          *  Ensure there is no async event handler installed.
 289          *  Only primary process handles async device events.
 290          **/
 291         assert(!sh->intr_cnt);
 292         if (sh->intr_cnt)
 293                 rte_intr_callback_unregister
 294                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 295         pthread_mutex_destroy(&sh->intr_mutex);
 296         if (sh->pd)
 297                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 298         if (sh->ctx)
 299                 claim_zero(mlx5_glue->close_device(sh->ctx));
 300         rte_free(sh);
 301 exit:
 302         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 303 }
 304
 305 /**
 306  * Initialize shared data between primary and secondary process.
 307  *
 308  * A memzone is reserved by primary process and secondary processes attach to
 309  * the memzone.
 310  *
 311  * @return
 312  *   0 on success, a negative errno value otherwise and rte_errno is set.
 313  */
 314 static int
 315 mlx5_init_shared_data(void)
 316 {
 317         const struct rte_memzone *mz;
 318         int ret = 0;
 319
 320         rte_spinlock_lock(&mlx5_shared_data_lock);
 321         if (mlx5_shared_data == NULL) {
 322                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 323                         /* Allocate shared memory. */
 324                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 325                                                  sizeof(*mlx5_shared_data),
 326                                                  SOCKET_ID_ANY, 0);
 327                         if (mz == NULL) {
 328                                 DRV_LOG(ERR,
 329                                         "Cannot allocate mlx5 shared data\n");
 330                                 ret = -rte_errno;
 331                                 goto error;
 332                         }
 333                         mlx5_shared_data = mz->addr;
 334                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 335                         rte_spinlock_init(&mlx5_shared_data->lock);
 336                 } else {
 337                         /* Lookup allocated shared memory. */
 338                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 339                         if (mz == NULL) {
 340                                 DRV_LOG(ERR,
 341                                         "Cannot attach mlx5 shared data\n");
 342                                 ret = -rte_errno;
 343                                 goto error;
 344                         }
 345                         mlx5_shared_data = mz->addr;
 346                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 347                 }
 348         }
 349 error:
 350         rte_spinlock_unlock(&mlx5_shared_data_lock);
 351         return ret;
 352 }
 353
 354 /**
 355  * Uninitialize shared data between primary and secondary process.
 356  *
 357  * The pointer of secondary process is dereferenced and primary process frees
 358  * the memzone.
 359  */
 360 static void
 361 mlx5_uninit_shared_data(void)
 362 {
 363         const struct rte_memzone *mz;
 364
 365         rte_spinlock_lock(&mlx5_shared_data_lock);
 366         if (mlx5_shared_data) {
 367                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 368                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 369                         rte_memzone_free(mz);
 370                 } else {
 371                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 372                 }
 373                 mlx5_shared_data = NULL;
 374         }
 375         rte_spinlock_unlock(&mlx5_shared_data_lock);
 376 }
 377
 378 /**
 379  * Retrieve integer value from environment variable.
 380  *
 381  * @param[in] name
 382  *   Environment variable name.
 383  *
 384  * @return
 385  *   Integer value, 0 if the variable is not set.
 386  */
 387 int
 388 mlx5_getenv_int(const char *name)
 389 {
 390         const char *val = getenv(name);
 391
 392         if (val == NULL)
 393                 return 0;
 394         return atoi(val);
 395 }
 396
 397 /**
 398  * Verbs callback to allocate a memory. This function should allocate the space
 399  * according to the size provided residing inside a huge page.
 400  * Please note that all allocation must respect the alignment from libmlx5
 401  * (i.e. currently sysconf(_SC_PAGESIZE)).
 402  *
 403  * @param[in] size
 404  *   The size in bytes of the memory to allocate.
 405  * @param[in] data
 406  *   A pointer to the callback data.
 407  *
 408  * @return
 409  *   Allocated buffer, NULL otherwise and rte_errno is set.
 410  */
 411 static void *
 412 mlx5_alloc_verbs_buf(size_t size, void *data)
 413 {
 414         struct mlx5_priv *priv = data;
 415         void *ret;
 416         size_t alignment = sysconf(_SC_PAGESIZE);
 417         unsigned int socket = SOCKET_ID_ANY;
 418
 419         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 420                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 421
 422                 socket = ctrl->socket;
 423         } else if (priv->verbs_alloc_ctx.type ==
 424                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 425                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 426
 427                 socket = ctrl->socket;
 428         }
 429         assert(data != NULL);
 430         ret = rte_malloc_socket(__func__, size, alignment, socket);
 431         if (!ret && size)
 432                 rte_errno = ENOMEM;
 433         return ret;
 434 }
 435
 436 /**
 437  * Verbs callback to free a memory.
 438  *
 439  * @param[in] ptr
 440  *   A pointer to the memory to free.
 441  * @param[in] data
 442  *   A pointer to the callback data.
 443  */
 444 static void
 445 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 446 {
 447         assert(data != NULL);
 448         rte_free(ptr);
 449 }
 450
 451 /**
 452  * DPDK callback to close the device.
 453  *
 454  * Destroy all queues and objects, free memory.
 455  *
 456  * @param dev
 457  *   Pointer to Ethernet device structure.
 458  */
 459 static void
 460 mlx5_dev_close(struct rte_eth_dev *dev)
 461 {
 462         struct mlx5_priv *priv = dev->data->dev_private;
 463         unsigned int i;
 464         int ret;
 465
 466         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 467                 dev->data->port_id,
 468                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 469         /* In case mlx5_dev_stop() has not been called. */
 470         mlx5_dev_interrupt_handler_uninstall(dev);
 471         mlx5_traffic_disable(dev);
 472         mlx5_flow_flush(dev, NULL);
 473         /* Prevent crashes when queues are still in use. */
 474         dev->rx_pkt_burst = removed_rx_burst;
 475         dev->tx_pkt_burst = removed_tx_burst;
 476         rte_wmb();
 477         /* Disable datapath on secondary process. */
 478         mlx5_mp_req_stop_rxtx(dev);
 479         if (priv->rxqs != NULL) {
 480                 /* XXX race condition if mlx5_rx_burst() is still running. */
 481                 usleep(1000);
 482                 for (i = 0; (i != priv->rxqs_n); ++i)
 483                         mlx5_rxq_release(dev, i);
 484                 priv->rxqs_n = 0;
 485                 priv->rxqs = NULL;
 486         }
 487         if (priv->txqs != NULL) {
 488                 /* XXX race condition if mlx5_tx_burst() is still running. */
 489                 usleep(1000);
 490                 for (i = 0; (i != priv->txqs_n); ++i)
 491                         mlx5_txq_release(dev, i);
 492                 priv->txqs_n = 0;
 493                 priv->txqs = NULL;
 494         }
 495         mlx5_mprq_free_mp(dev);
 496         mlx5_mr_release(dev);
 497         assert(priv->sh);
 498         if (priv->sh)
 499                 mlx5_free_shared_ibctx(priv->sh);
 500         priv->sh = NULL;
 501         if (priv->rss_conf.rss_key != NULL)
 502                 rte_free(priv->rss_conf.rss_key);
 503         if (priv->reta_idx != NULL)
 504                 rte_free(priv->reta_idx);
 505         if (priv->config.vf)
 506                 mlx5_nl_mac_addr_flush(dev);
 507         if (priv->nl_socket_route >= 0)
 508                 close(priv->nl_socket_route);
 509         if (priv->nl_socket_rdma >= 0)
 510                 close(priv->nl_socket_rdma);
 511         if (priv->tcf_context)
 512                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 513         ret = mlx5_hrxq_ibv_verify(dev);
 514         if (ret)
 515                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 516                         dev->data->port_id);
 517         ret = mlx5_ind_table_ibv_verify(dev);
 518         if (ret)
 519                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 520                         dev->data->port_id);
 521         ret = mlx5_rxq_ibv_verify(dev);
 522         if (ret)
 523                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 524                         dev->data->port_id);
 525         ret = mlx5_rxq_verify(dev);
 526         if (ret)
 527                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 528                         dev->data->port_id);
 529         ret = mlx5_txq_ibv_verify(dev);
 530         if (ret)
 531                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 532                         dev->data->port_id);
 533         ret = mlx5_txq_verify(dev);
 534         if (ret)
 535                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 536                         dev->data->port_id);
 537         ret = mlx5_flow_verify(dev);
 538         if (ret)
 539                 DRV_LOG(WARNING, "port %u some flows still remain",
 540                         dev->data->port_id);
 541         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 542                 unsigned int c = 0;
 543                 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
 544                 uint16_t port_id[i];
 545
 546                 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
 547                 while (i--) {
 548                         struct mlx5_priv *opriv =
 549                                 rte_eth_devices[port_id[i]].data->dev_private;
 550
 551                         if (!opriv ||
 552                             opriv->domain_id != priv->domain_id ||
 553                             &rte_eth_devices[port_id[i]] == dev)
 554                                 continue;
 555                         ++c;
 556                 }
 557                 if (!c)
 558                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 559         }
 560         memset(priv, 0, sizeof(*priv));
 561         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 562         /*
 563          * Reset mac_addrs to NULL such that it is not freed as part of
 564          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 565          * it is freed when dev_private is freed.
 566          */
 567         dev->data->mac_addrs = NULL;
 568 }
 569
 570 const struct eth_dev_ops mlx5_dev_ops = {
 571         .dev_configure = mlx5_dev_configure,
 572         .dev_start = mlx5_dev_start,
 573         .dev_stop = mlx5_dev_stop,
 574         .dev_set_link_down = mlx5_set_link_down,
 575         .dev_set_link_up = mlx5_set_link_up,
 576         .dev_close = mlx5_dev_close,
 577         .promiscuous_enable = mlx5_promiscuous_enable,
 578         .promiscuous_disable = mlx5_promiscuous_disable,
 579         .allmulticast_enable = mlx5_allmulticast_enable,
 580         .allmulticast_disable = mlx5_allmulticast_disable,
 581         .link_update = mlx5_link_update,
 582         .stats_get = mlx5_stats_get,
 583         .stats_reset = mlx5_stats_reset,
 584         .xstats_get = mlx5_xstats_get,
 585         .xstats_reset = mlx5_xstats_reset,
 586         .xstats_get_names = mlx5_xstats_get_names,
 587         .fw_version_get = mlx5_fw_version_get,
 588         .dev_infos_get = mlx5_dev_infos_get,
 589         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 590         .vlan_filter_set = mlx5_vlan_filter_set,
 591         .rx_queue_setup = mlx5_rx_queue_setup,
 592         .tx_queue_setup = mlx5_tx_queue_setup,
 593         .rx_queue_release = mlx5_rx_queue_release,
 594         .tx_queue_release = mlx5_tx_queue_release,
 595         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 596         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 597         .mac_addr_remove = mlx5_mac_addr_remove,
 598         .mac_addr_add = mlx5_mac_addr_add,
 599         .mac_addr_set = mlx5_mac_addr_set,
 600         .set_mc_addr_list = mlx5_set_mc_addr_list,
 601         .mtu_set = mlx5_dev_set_mtu,
 602         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 603         .vlan_offload_set = mlx5_vlan_offload_set,
 604         .reta_update = mlx5_dev_rss_reta_update,
 605         .reta_query = mlx5_dev_rss_reta_query,
 606         .rss_hash_update = mlx5_rss_hash_update,
 607         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 608         .filter_ctrl = mlx5_dev_filter_ctrl,
 609         .rx_descriptor_status = mlx5_rx_descriptor_status,
 610         .tx_descriptor_status = mlx5_tx_descriptor_status,
 611         .rx_queue_count = mlx5_rx_queue_count,
 612         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 613         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 614         .is_removed = mlx5_is_removed,
 615 };
 616
 617 /* Available operations from secondary process. */
 618 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 619         .stats_get = mlx5_stats_get,
 620         .stats_reset = mlx5_stats_reset,
 621         .xstats_get = mlx5_xstats_get,
 622         .xstats_reset = mlx5_xstats_reset,
 623         .xstats_get_names = mlx5_xstats_get_names,
 624         .fw_version_get = mlx5_fw_version_get,
 625         .dev_infos_get = mlx5_dev_infos_get,
 626         .rx_descriptor_status = mlx5_rx_descriptor_status,
 627         .tx_descriptor_status = mlx5_tx_descriptor_status,
 628 };
 629
 630 /* Available operations in flow isolated mode. */
 631 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 632         .dev_configure = mlx5_dev_configure,
 633         .dev_start = mlx5_dev_start,
 634         .dev_stop = mlx5_dev_stop,
 635         .dev_set_link_down = mlx5_set_link_down,
 636         .dev_set_link_up = mlx5_set_link_up,
 637         .dev_close = mlx5_dev_close,
 638         .promiscuous_enable = mlx5_promiscuous_enable,
 639         .promiscuous_disable = mlx5_promiscuous_disable,
 640         .allmulticast_enable = mlx5_allmulticast_enable,
 641         .allmulticast_disable = mlx5_allmulticast_disable,
 642         .link_update = mlx5_link_update,
 643         .stats_get = mlx5_stats_get,
 644         .stats_reset = mlx5_stats_reset,
 645         .xstats_get = mlx5_xstats_get,
 646         .xstats_reset = mlx5_xstats_reset,
 647         .xstats_get_names = mlx5_xstats_get_names,
 648         .fw_version_get = mlx5_fw_version_get,
 649         .dev_infos_get = mlx5_dev_infos_get,
 650         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 651         .vlan_filter_set = mlx5_vlan_filter_set,
 652         .rx_queue_setup = mlx5_rx_queue_setup,
 653         .tx_queue_setup = mlx5_tx_queue_setup,
 654         .rx_queue_release = mlx5_rx_queue_release,
 655         .tx_queue_release = mlx5_tx_queue_release,
 656         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 657         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 658         .mac_addr_remove = mlx5_mac_addr_remove,
 659         .mac_addr_add = mlx5_mac_addr_add,
 660         .mac_addr_set = mlx5_mac_addr_set,
 661         .set_mc_addr_list = mlx5_set_mc_addr_list,
 662         .mtu_set = mlx5_dev_set_mtu,
 663         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 664         .vlan_offload_set = mlx5_vlan_offload_set,
 665         .filter_ctrl = mlx5_dev_filter_ctrl,
 666         .rx_descriptor_status = mlx5_rx_descriptor_status,
 667         .tx_descriptor_status = mlx5_tx_descriptor_status,
 668         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 669         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 670         .is_removed = mlx5_is_removed,
 671 };
 672
 673 /**
 674  * Verify and store value for device argument.
 675  *
 676  * @param[in] key
 677  *   Key argument to verify.
 678  * @param[in] val
 679  *   Value associated with key.
 680  * @param opaque
 681  *   User data.
 682  *
 683  * @return
 684  *   0 on success, a negative errno value otherwise and rte_errno is set.
 685  */
 686 static int
 687 mlx5_args_check(const char *key, const char *val, void *opaque)
 688 {
 689         struct mlx5_dev_config *config = opaque;
 690         unsigned long tmp;
 691
 692         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 693         if (!strcmp(MLX5_REPRESENTOR, key))
 694                 return 0;
 695         errno = 0;
 696         tmp = strtoul(val, NULL, 0);
 697         if (errno) {
 698                 rte_errno = errno;
 699                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 700                 return -rte_errno;
 701         }
 702         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 703                 config->cqe_comp = !!tmp;
 704         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 705                 config->cqe_pad = !!tmp;
 706         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 707                 config->hw_padding = !!tmp;
 708         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 709                 config->mprq.enabled = !!tmp;
 710         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 711                 config->mprq.stride_num_n = tmp;
 712         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 713                 config->mprq.max_memcpy_len = tmp;
 714         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 715                 config->mprq.min_rxqs_num = tmp;
 716         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 717                 config->txq_inline = tmp;
 718         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 719                 config->txqs_inline = tmp;
 720         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 721                 config->txqs_vec = tmp;
 722         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 723                 config->mps = !!tmp;
 724         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 725                 config->mpw_hdr_dseg = !!tmp;
 726         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 727                 config->inline_max_packet_sz = tmp;
 728         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 729                 config->tx_vec_en = !!tmp;
 730         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 731                 config->rx_vec_en = !!tmp;
 732         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 733                 config->l3_vxlan_en = !!tmp;
 734         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 735                 config->vf_nl_en = !!tmp;
 736         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 737                 config->dv_flow_en = !!tmp;
 738         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
 739                 config->mr_ext_memseg_en = !!tmp;
 740         } else {
 741                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 742                 rte_errno = EINVAL;
 743                 return -rte_errno;
 744         }
 745         return 0;
 746 }
 747
 748 /**
 749  * Parse device parameters.
 750  *
 751  * @param config
 752  *   Pointer to device configuration structure.
 753  * @param devargs
 754  *   Device arguments structure.
 755  *
 756  * @return
 757  *   0 on success, a negative errno value otherwise and rte_errno is set.
 758  */
 759 static int
 760 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 761 {
 762         const char **params = (const char *[]){
 763                 MLX5_RXQ_CQE_COMP_EN,
 764                 MLX5_RXQ_CQE_PAD_EN,
 765                 MLX5_RXQ_PKT_PAD_EN,
 766                 MLX5_RX_MPRQ_EN,
 767                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 768                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 769                 MLX5_RXQS_MIN_MPRQ,
 770                 MLX5_TXQ_INLINE,
 771                 MLX5_TXQS_MIN_INLINE,
 772                 MLX5_TXQS_MAX_VEC,
 773                 MLX5_TXQ_MPW_EN,
 774                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 775                 MLX5_TXQ_MAX_INLINE_LEN,
 776                 MLX5_TX_VEC_EN,
 777                 MLX5_RX_VEC_EN,
 778                 MLX5_L3_VXLAN_EN,
 779                 MLX5_VF_NL_EN,
 780                 MLX5_DV_FLOW_EN,
 781                 MLX5_MR_EXT_MEMSEG_EN,
 782                 MLX5_REPRESENTOR,
 783                 NULL,
 784         };
 785         struct rte_kvargs *kvlist;
 786         int ret = 0;
 787         int i;
 788
 789         if (devargs == NULL)
 790                 return 0;
 791         /* Following UGLY cast is done to pass checkpatch. */
 792         kvlist = rte_kvargs_parse(devargs->args, params);
 793         if (kvlist == NULL)
 794                 return 0;
 795         /* Process parameters. */
 796         for (i = 0; (params[i] != NULL); ++i) {
 797                 if (rte_kvargs_count(kvlist, params[i])) {
 798                         ret = rte_kvargs_process(kvlist, params[i],
 799                                                  mlx5_args_check, config);
 800                         if (ret) {
 801                                 rte_errno = EINVAL;
 802                                 rte_kvargs_free(kvlist);
 803                                 return -rte_errno;
 804                         }
 805                 }
 806         }
 807         rte_kvargs_free(kvlist);
 808         return 0;
 809 }
 810
 811 static struct rte_pci_driver mlx5_driver;
 812
 813 static int
 814 find_lower_va_bound(const struct rte_memseg_list *msl,
 815                 const struct rte_memseg *ms, void *arg)
 816 {
 817         void **addr = arg;
 818
 819         if (msl->external)
 820                 return 0;
 821         if (*addr == NULL)
 822                 *addr = ms->addr;
 823         else
 824                 *addr = RTE_MIN(*addr, ms->addr);
 825
 826         return 0;
 827 }
 828
 829 /**
 830  * Reserve UAR address space for primary process.
 831  *
 832  * Process local resource is used by both primary and secondary to avoid
 833  * duplicate reservation. The space has to be available on both primary and
 834  * secondary process, TXQ UAR maps to this area using fixed mmap w/o double
 835  * check.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 mlx5_uar_init_primary(void)
 842 {
 843         struct mlx5_shared_data *sd = mlx5_shared_data;
 844         void *addr = (void *)0;
 845
 846         if (sd->uar_base)
 847                 return 0;
 848         /* find out lower bound of hugepage segments */
 849         rte_memseg_walk(find_lower_va_bound, &addr);
 850         /* keep distance to hugepages to minimize potential conflicts. */
 851         addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
 852         /* anonymous mmap, no real memory consumption. */
 853         addr = mmap(addr, MLX5_UAR_SIZE,
 854                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 855         if (addr == MAP_FAILED) {
 856                 DRV_LOG(ERR,
 857                         "Failed to reserve UAR address space, please"
 858                         " adjust MLX5_UAR_SIZE or try --base-virtaddr");
 859                 rte_errno = ENOMEM;
 860                 return -rte_errno;
 861         }
 862         /* Accept either same addr or a new addr returned from mmap if target
 863          * range occupied.
 864          */
 865         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
 866         sd->uar_base = addr; /* for primary and secondary UAR re-mmap. */
 867         return 0;
 868 }
 869
 870 /**
 871  * Unmap UAR address space reserved for primary process.
 872  */
 873 static void
 874 mlx5_uar_uninit_primary(void)
 875 {
 876         struct mlx5_shared_data *sd = mlx5_shared_data;
 877
 878         if (!sd->uar_base)
 879                 return;
 880         munmap(sd->uar_base, MLX5_UAR_SIZE);
 881         sd->uar_base = NULL;
 882 }
 883
 884 /**
 885  * Reserve UAR address space for secondary process, align with primary process.
 886  *
 887  * @return
 888  *   0 on success, a negative errno value otherwise and rte_errno is set.
 889  */
 890 static int
 891 mlx5_uar_init_secondary(void)
 892 {
 893         struct mlx5_shared_data *sd = mlx5_shared_data;
 894         struct mlx5_local_data *ld = &mlx5_local_data;
 895         void *addr;
 896
 897         if (ld->uar_base) { /* Already reserved. */
 898                 assert(sd->uar_base == ld->uar_base);
 899                 return 0;
 900         }
 901         assert(sd->uar_base);
 902         /* anonymous mmap, no real memory consumption. */
 903         addr = mmap(sd->uar_base, MLX5_UAR_SIZE,
 904                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 905         if (addr == MAP_FAILED) {
 906                 DRV_LOG(ERR, "UAR mmap failed: %p size: %llu",
 907                         sd->uar_base, MLX5_UAR_SIZE);
 908                 rte_errno = ENXIO;
 909                 return -rte_errno;
 910         }
 911         if (sd->uar_base != addr) {
 912                 DRV_LOG(ERR,
 913                         "UAR address %p size %llu occupied, please"
 914                         " adjust MLX5_UAR_OFFSET or try EAL parameter"
 915                         " --base-virtaddr",
 916                         sd->uar_base, MLX5_UAR_SIZE);
 917                 rte_errno = ENXIO;
 918                 return -rte_errno;
 919         }
 920         ld->uar_base = addr;
 921         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
 922         return 0;
 923 }
 924
 925 /**
 926  * Unmap UAR address space reserved for secondary process.
 927  */
 928 static void
 929 mlx5_uar_uninit_secondary(void)
 930 {
 931         struct mlx5_local_data *ld = &mlx5_local_data;
 932
 933         if (!ld->uar_base)
 934                 return;
 935         munmap(ld->uar_base, MLX5_UAR_SIZE);
 936         ld->uar_base = NULL;
 937 }
 938
 939 /**
 940  * PMD global initialization.
 941  *
 942  * Independent from individual device, this function initializes global
 943  * per-PMD data structures distinguishing primary and secondary processes.
 944  * Hence, each initialization is called once per a process.
 945  *
 946  * @return
 947  *   0 on success, a negative errno value otherwise and rte_errno is set.
 948  */
 949 static int
 950 mlx5_init_once(void)
 951 {
 952         struct mlx5_shared_data *sd;
 953         struct mlx5_local_data *ld = &mlx5_local_data;
 954         int ret;
 955
 956         if (mlx5_init_shared_data())
 957                 return -rte_errno;
 958         sd = mlx5_shared_data;
 959         assert(sd);
 960         rte_spinlock_lock(&sd->lock);
 961         switch (rte_eal_process_type()) {
 962         case RTE_PROC_PRIMARY:
 963                 if (sd->init_done)
 964                         break;
 965                 LIST_INIT(&sd->mem_event_cb_list);
 966                 rte_rwlock_init(&sd->mem_event_rwlock);
 967                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 968                                                 mlx5_mr_mem_event_cb, NULL);
 969                 mlx5_mp_init_primary();
 970                 ret = mlx5_uar_init_primary();
 971                 if (ret)
 972                         goto error;
 973                 sd->init_done = true;
 974                 break;
 975         case RTE_PROC_SECONDARY:
 976                 if (ld->init_done)
 977                         break;
 978                 mlx5_mp_init_secondary();
 979                 ret = mlx5_uar_init_secondary();
 980                 if (ret)
 981                         goto error;
 982                 ++sd->secondary_cnt;
 983                 ld->init_done = true;
 984                 break;
 985         default:
 986                 break;
 987         }
 988         rte_spinlock_unlock(&sd->lock);
 989         return 0;
 990 error:
 991         switch (rte_eal_process_type()) {
 992         case RTE_PROC_PRIMARY:
 993                 mlx5_uar_uninit_primary();
 994                 mlx5_mp_uninit_primary();
 995                 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB", NULL);
 996                 break;
 997         case RTE_PROC_SECONDARY:
 998                 mlx5_uar_uninit_secondary();
 999                 mlx5_mp_uninit_secondary();
1000                 break;
1001         default:
1002                 break;
1003         }
1004         rte_spinlock_unlock(&sd->lock);
1005         mlx5_uninit_shared_data();
1006         return -rte_errno;
1007 }
1008
1009 /**
1010  * Spawn an Ethernet device from Verbs information.
1011  *
1012  * @param dpdk_dev
1013  *   Backing DPDK device.
1014  * @param spawn
1015  *   Verbs device parameters (name, port, switch_info) to spawn.
1016  * @param config
1017  *   Device configuration parameters.
1018  *
1019  * @return
1020  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1021  *   is set. The following errors are defined:
1022  *
1023  *   EBUSY: device is not supposed to be spawned.
1024  *   EEXIST: device is already spawned
1025  */
1026 static struct rte_eth_dev *
1027 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1028                struct mlx5_dev_spawn_data *spawn,
1029                struct mlx5_dev_config config)
1030 {
1031         const struct mlx5_switch_info *switch_info = &spawn->info;
1032         struct mlx5_ibv_shared *sh = NULL;
1033         struct ibv_port_attr port_attr;
1034         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1035         struct rte_eth_dev *eth_dev = NULL;
1036         struct mlx5_priv *priv = NULL;
1037         int err = 0;
1038         unsigned int hw_padding = 0;
1039         unsigned int mps;
1040         unsigned int cqe_comp;
1041         unsigned int cqe_pad = 0;
1042         unsigned int tunnel_en = 0;
1043         unsigned int mpls_en = 0;
1044         unsigned int swp = 0;
1045         unsigned int mprq = 0;
1046         unsigned int mprq_min_stride_size_n = 0;
1047         unsigned int mprq_max_stride_size_n = 0;
1048         unsigned int mprq_min_stride_num_n = 0;
1049         unsigned int mprq_max_stride_num_n = 0;
1050         struct ether_addr mac;
1051         char name[RTE_ETH_NAME_MAX_LEN];
1052         int own_domain_id = 0;
1053         uint16_t port_id;
1054         unsigned int i;
1055
1056         /* Determine if this port representor is supposed to be spawned. */
1057         if (switch_info->representor && dpdk_dev->devargs) {
1058                 struct rte_eth_devargs eth_da;
1059
1060                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1061                 if (err) {
1062                         rte_errno = -err;
1063                         DRV_LOG(ERR, "failed to process device arguments: %s",
1064                                 strerror(rte_errno));
1065                         return NULL;
1066                 }
1067                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1068                         if (eth_da.representor_ports[i] ==
1069                             (uint16_t)switch_info->port_name)
1070                                 break;
1071                 if (i == eth_da.nb_representor_ports) {
1072                         rte_errno = EBUSY;
1073                         return NULL;
1074                 }
1075         }
1076         /* Build device name. */
1077         if (!switch_info->representor)
1078                 strlcpy(name, dpdk_dev->name, sizeof(name));
1079         else
1080                 snprintf(name, sizeof(name), "%s_representor_%u",
1081                          dpdk_dev->name, switch_info->port_name);
1082         /* check if the device is already spawned */
1083         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1084                 rte_errno = EEXIST;
1085                 return NULL;
1086         }
1087         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1088         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1089                 eth_dev = rte_eth_dev_attach_secondary(name);
1090                 if (eth_dev == NULL) {
1091                         DRV_LOG(ERR, "can not attach rte ethdev");
1092                         rte_errno = ENOMEM;
1093                         return NULL;
1094                 }
1095                 eth_dev->device = dpdk_dev;
1096                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1097                 /* Receive command fd from primary process */
1098                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1099                 if (err < 0)
1100                         return NULL;
1101                 /* Remap UAR for Tx queues. */
1102                 err = mlx5_tx_uar_remap(eth_dev, err);
1103                 if (err)
1104                         return NULL;
1105                 /*
1106                  * Ethdev pointer is still required as input since
1107                  * the primary device is not accessible from the
1108                  * secondary process.
1109                  */
1110                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1111                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1112                 return eth_dev;
1113         }
1114         sh = mlx5_alloc_shared_ibctx(spawn);
1115         if (!sh)
1116                 return NULL;
1117         config.devx = sh->devx;
1118 #ifdef HAVE_IBV_MLX5_MOD_SWP
1119         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1120 #endif
1121         /*
1122          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1123          * as all ConnectX-5 devices.
1124          */
1125 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1126         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1127 #endif
1128 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1129         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1130 #endif
1131         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1132         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1133                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1134                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1135                         mps = MLX5_MPW_ENHANCED;
1136                 } else {
1137                         DRV_LOG(DEBUG, "MPW is supported");
1138                         mps = MLX5_MPW;
1139                 }
1140         } else {
1141                 DRV_LOG(DEBUG, "MPW isn't supported");
1142                 mps = MLX5_MPW_DISABLED;
1143         }
1144 #ifdef HAVE_IBV_MLX5_MOD_SWP
1145         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1146                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1147         DRV_LOG(DEBUG, "SWP support: %u", swp);
1148 #endif
1149         config.swp = !!swp;
1150 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1151         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1152                 struct mlx5dv_striding_rq_caps mprq_caps =
1153                         dv_attr.striding_rq_caps;
1154
1155                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1156                         mprq_caps.min_single_stride_log_num_of_bytes);
1157                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1158                         mprq_caps.max_single_stride_log_num_of_bytes);
1159                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1160                         mprq_caps.min_single_wqe_log_num_of_strides);
1161                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1162                         mprq_caps.max_single_wqe_log_num_of_strides);
1163                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1164                         mprq_caps.supported_qpts);
1165                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1166                 mprq = 1;
1167                 mprq_min_stride_size_n =
1168                         mprq_caps.min_single_stride_log_num_of_bytes;
1169                 mprq_max_stride_size_n =
1170                         mprq_caps.max_single_stride_log_num_of_bytes;
1171                 mprq_min_stride_num_n =
1172                         mprq_caps.min_single_wqe_log_num_of_strides;
1173                 mprq_max_stride_num_n =
1174                         mprq_caps.max_single_wqe_log_num_of_strides;
1175                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1176                                                    mprq_min_stride_num_n);
1177         }
1178 #endif
1179         if (RTE_CACHE_LINE_SIZE == 128 &&
1180             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1181                 cqe_comp = 0;
1182         else
1183                 cqe_comp = 1;
1184         config.cqe_comp = cqe_comp;
1185 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1186         /* Whether device supports 128B Rx CQE padding. */
1187         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1188                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1189 #endif
1190 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1191         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1192                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1193                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1194                              (dv_attr.tunnel_offloads_caps &
1195                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1196         }
1197         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1198                 tunnel_en ? "" : "not ");
1199 #else
1200         DRV_LOG(WARNING,
1201                 "tunnel offloading disabled due to old OFED/rdma-core version");
1202 #endif
1203         config.tunnel_en = tunnel_en;
1204 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1205         mpls_en = ((dv_attr.tunnel_offloads_caps &
1206                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1207                    (dv_attr.tunnel_offloads_caps &
1208                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1209         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1210                 mpls_en ? "" : "not ");
1211 #else
1212         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1213                 " old OFED/rdma-core version or firmware configuration");
1214 #endif
1215         config.mpls_en = mpls_en;
1216         /* Check port status. */
1217         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1218         if (err) {
1219                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1220                 goto error;
1221         }
1222         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1223                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1224                 err = EINVAL;
1225                 goto error;
1226         }
1227         if (port_attr.state != IBV_PORT_ACTIVE)
1228                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1229                         mlx5_glue->port_state_str(port_attr.state),
1230                         port_attr.state);
1231         /* Allocate private eth device data. */
1232         priv = rte_zmalloc("ethdev private structure",
1233                            sizeof(*priv),
1234                            RTE_CACHE_LINE_SIZE);
1235         if (priv == NULL) {
1236                 DRV_LOG(ERR, "priv allocation failure");
1237                 err = ENOMEM;
1238                 goto error;
1239         }
1240         priv->sh = sh;
1241         priv->ibv_port = spawn->ibv_port;
1242         priv->mtu = ETHER_MTU;
1243 #ifndef RTE_ARCH_64
1244         /* Initialize UAR access locks for 32bit implementations. */
1245         rte_spinlock_init(&priv->uar_lock_cq);
1246         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1247                 rte_spinlock_init(&priv->uar_lock[i]);
1248 #endif
1249         /* Some internal functions rely on Netlink sockets, open them now. */
1250         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1251         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1252         priv->nl_sn = 0;
1253         priv->representor = !!switch_info->representor;
1254         priv->master = !!switch_info->master;
1255         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1256         /*
1257          * Currently we support single E-Switch per PF configurations
1258          * only and vport_id field contains the vport index for
1259          * associated VF, which is deduced from representor port name.
1260          * For exapmple, let's have the IB device port 10, it has
1261          * attached network device eth0, which has port name attribute
1262          * pf0vf2, we can deduce the VF number as 2, and set vport index
1263          * as 3 (2+1). This assigning schema should be changed if the
1264          * multiple E-Switch instances per PF configurations or/and PCI
1265          * subfunctions are added.
1266          */
1267         priv->vport_id = switch_info->representor ?
1268                          switch_info->port_name + 1 : -1;
1269         /* representor_id field keeps the unmodified port/VF index. */
1270         priv->representor_id = switch_info->representor ?
1271                                switch_info->port_name : -1;
1272         /*
1273          * Look for sibling devices in order to reuse their switch domain
1274          * if any, otherwise allocate one.
1275          */
1276         i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1277         if (i > 0) {
1278                 uint16_t port_id[i];
1279
1280                 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1281                 while (i--) {
1282                         const struct mlx5_priv *opriv =
1283                                 rte_eth_devices[port_id[i]].data->dev_private;
1284
1285                         if (!opriv ||
1286                             opriv->domain_id ==
1287                             RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1288                                 continue;
1289                         priv->domain_id = opriv->domain_id;
1290                         break;
1291                 }
1292         }
1293         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1294                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1295                 if (err) {
1296                         err = rte_errno;
1297                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1298                                 strerror(rte_errno));
1299                         goto error;
1300                 }
1301                 own_domain_id = 1;
1302         }
1303         err = mlx5_args(&config, dpdk_dev->devargs);
1304         if (err) {
1305                 err = rte_errno;
1306                 DRV_LOG(ERR, "failed to process device arguments: %s",
1307                         strerror(rte_errno));
1308                 goto error;
1309         }
1310         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1311                             IBV_DEVICE_RAW_IP_CSUM);
1312         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1313                 (config.hw_csum ? "" : "not "));
1314 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1315         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1316         DRV_LOG(DEBUG, "counters are not supported");
1317 #endif
1318 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1319         if (config.dv_flow_en) {
1320                 DRV_LOG(WARNING, "DV flow is not supported");
1321                 config.dv_flow_en = 0;
1322         }
1323 #endif
1324         config.ind_table_max_size =
1325                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1326         /*
1327          * Remove this check once DPDK supports larger/variable
1328          * indirection tables.
1329          */
1330         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1331                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1332         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1333                 config.ind_table_max_size);
1334         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1335                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1336         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1337                 (config.hw_vlan_strip ? "" : "not "));
1338         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1339                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1340         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1341                 (config.hw_fcs_strip ? "" : "not "));
1342 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1343         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1344 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1345         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1346                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1347 #endif
1348         if (config.hw_padding && !hw_padding) {
1349                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1350                 config.hw_padding = 0;
1351         } else if (config.hw_padding) {
1352                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1353         }
1354         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1355                       (sh->device_attr.tso_caps.supported_qpts &
1356                        (1 << IBV_QPT_RAW_PACKET)));
1357         if (config.tso)
1358                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1359         /*
1360          * MPW is disabled by default, while the Enhanced MPW is enabled
1361          * by default.
1362          */
1363         if (config.mps == MLX5_ARG_UNSET)
1364                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1365                                                           MLX5_MPW_DISABLED;
1366         else
1367                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1368         DRV_LOG(INFO, "%sMPS is %s",
1369                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1370                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1371         if (config.cqe_comp && !cqe_comp) {
1372                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1373                 config.cqe_comp = 0;
1374         }
1375         if (config.cqe_pad && !cqe_pad) {
1376                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1377                 config.cqe_pad = 0;
1378         } else if (config.cqe_pad) {
1379                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1380         }
1381         if (config.mprq.enabled && mprq) {
1382                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1383                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1384                         config.mprq.stride_num_n =
1385                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1386                                         mprq_min_stride_num_n);
1387                         DRV_LOG(WARNING,
1388                                 "the number of strides"
1389                                 " for Multi-Packet RQ is out of range,"
1390                                 " setting default value (%u)",
1391                                 1 << config.mprq.stride_num_n);
1392                 }
1393                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1394                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1395         } else if (config.mprq.enabled && !mprq) {
1396                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1397                 config.mprq.enabled = 0;
1398         }
1399         eth_dev = rte_eth_dev_allocate(name);
1400         if (eth_dev == NULL) {
1401                 DRV_LOG(ERR, "can not allocate rte ethdev");
1402                 err = ENOMEM;
1403                 goto error;
1404         }
1405         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1406         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1407         if (priv->representor) {
1408                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1409                 eth_dev->data->representor_id = priv->representor_id;
1410         }
1411         eth_dev->data->dev_private = priv;
1412         priv->dev_data = eth_dev->data;
1413         eth_dev->data->mac_addrs = priv->mac;
1414         eth_dev->device = dpdk_dev;
1415         /* Configure the first MAC address by default. */
1416         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1417                 DRV_LOG(ERR,
1418                         "port %u cannot get MAC address, is mlx5_en"
1419                         " loaded? (errno: %s)",
1420                         eth_dev->data->port_id, strerror(rte_errno));
1421                 err = ENODEV;
1422                 goto error;
1423         }
1424         DRV_LOG(INFO,
1425                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1426                 eth_dev->data->port_id,
1427                 mac.addr_bytes[0], mac.addr_bytes[1],
1428                 mac.addr_bytes[2], mac.addr_bytes[3],
1429                 mac.addr_bytes[4], mac.addr_bytes[5]);
1430 #ifndef NDEBUG
1431         {
1432                 char ifname[IF_NAMESIZE];
1433
1434                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1435                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1436                                 eth_dev->data->port_id, ifname);
1437                 else
1438                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1439                                 eth_dev->data->port_id);
1440         }
1441 #endif
1442         /* Get actual MTU if possible. */
1443         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1444         if (err) {
1445                 err = rte_errno;
1446                 goto error;
1447         }
1448         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1449                 priv->mtu);
1450         /* Initialize burst functions to prevent crashes before link-up. */
1451         eth_dev->rx_pkt_burst = removed_rx_burst;
1452         eth_dev->tx_pkt_burst = removed_tx_burst;
1453         eth_dev->dev_ops = &mlx5_dev_ops;
1454         /* Register MAC address. */
1455         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1456         if (config.vf && config.vf_nl_en)
1457                 mlx5_nl_mac_addr_sync(eth_dev);
1458         priv->tcf_context = mlx5_flow_tcf_context_create();
1459         if (!priv->tcf_context) {
1460                 err = -rte_errno;
1461                 DRV_LOG(WARNING,
1462                         "flow rules relying on switch offloads will not be"
1463                         " supported: cannot open libmnl socket: %s",
1464                         strerror(rte_errno));
1465         } else {
1466                 struct rte_flow_error error;
1467                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1468
1469                 if (!ifindex) {
1470                         err = -rte_errno;
1471                         error.message =
1472                                 "cannot retrieve network interface index";
1473                 } else {
1474                         err = mlx5_flow_tcf_init(priv->tcf_context,
1475                                                  ifindex, &error);
1476                 }
1477                 if (err) {
1478                         DRV_LOG(WARNING,
1479                                 "flow rules relying on switch offloads will"
1480                                 " not be supported: %s: %s",
1481                                 error.message, strerror(rte_errno));
1482                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1483                         priv->tcf_context = NULL;
1484                 }
1485         }
1486         TAILQ_INIT(&priv->flows);
1487         TAILQ_INIT(&priv->ctrl_flows);
1488         /* Hint libmlx5 to use PMD allocator for data plane resources */
1489         struct mlx5dv_ctx_allocators alctr = {
1490                 .alloc = &mlx5_alloc_verbs_buf,
1491                 .free = &mlx5_free_verbs_buf,
1492                 .data = priv,
1493         };
1494         mlx5_glue->dv_set_context_attr(sh->ctx,
1495                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1496                                        (void *)((uintptr_t)&alctr));
1497         /* Bring Ethernet device up. */
1498         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1499                 eth_dev->data->port_id);
1500         mlx5_set_link_up(eth_dev);
1501         /*
1502          * Even though the interrupt handler is not installed yet,
1503          * interrupts will still trigger on the asyn_fd from
1504          * Verbs context returned by ibv_open_device().
1505          */
1506         mlx5_link_update(eth_dev, 0);
1507         /* Store device configuration on private structure. */
1508         priv->config = config;
1509         /* Supported Verbs flow priority number detection. */
1510         err = mlx5_flow_discover_priorities(eth_dev);
1511         if (err < 0) {
1512                 err = -err;
1513                 goto error;
1514         }
1515         priv->config.flow_prio = err;
1516         /*
1517          * Once the device is added to the list of memory event
1518          * callback, its global MR cache table cannot be expanded
1519          * on the fly because of deadlock. If it overflows, lookup
1520          * should be done by searching MR list linearly, which is slow.
1521          */
1522         err = mlx5_mr_btree_init(&priv->mr.cache,
1523                                  MLX5_MR_BTREE_CACHE_N * 2,
1524                                  eth_dev->device->numa_node);
1525         if (err) {
1526                 err = rte_errno;
1527                 goto error;
1528         }
1529         /* Add device to memory callback list. */
1530         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1531         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1532                          priv, mem_event_cb);
1533         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1534         return eth_dev;
1535 error:
1536         if (priv) {
1537                 if (priv->nl_socket_route >= 0)
1538                         close(priv->nl_socket_route);
1539                 if (priv->nl_socket_rdma >= 0)
1540                         close(priv->nl_socket_rdma);
1541                 if (priv->tcf_context)
1542                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1543                 if (own_domain_id)
1544                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1545                 rte_free(priv);
1546                 if (eth_dev != NULL)
1547                         eth_dev->data->dev_private = NULL;
1548         }
1549         if (eth_dev != NULL) {
1550                 /* mac_addrs must not be freed alone because part of dev_private */
1551                 eth_dev->data->mac_addrs = NULL;
1552                 rte_eth_dev_release_port(eth_dev);
1553         }
1554         if (sh)
1555                 mlx5_free_shared_ibctx(sh);
1556         assert(err > 0);
1557         rte_errno = err;
1558         return NULL;
1559 }
1560
1561 /**
1562  * Comparison callback to sort device data.
1563  *
1564  * This is meant to be used with qsort().
1565  *
1566  * @param a[in]
1567  *   Pointer to pointer to first data object.
1568  * @param b[in]
1569  *   Pointer to pointer to second data object.
1570  *
1571  * @return
1572  *   0 if both objects are equal, less than 0 if the first argument is less
1573  *   than the second, greater than 0 otherwise.
1574  */
1575 static int
1576 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1577 {
1578         const struct mlx5_switch_info *si_a =
1579                 &((const struct mlx5_dev_spawn_data *)a)->info;
1580         const struct mlx5_switch_info *si_b =
1581                 &((const struct mlx5_dev_spawn_data *)b)->info;
1582         int ret;
1583
1584         /* Master device first. */
1585         ret = si_b->master - si_a->master;
1586         if (ret)
1587                 return ret;
1588         /* Then representor devices. */
1589         ret = si_b->representor - si_a->representor;
1590         if (ret)
1591                 return ret;
1592         /* Unidentified devices come last in no specific order. */
1593         if (!si_a->representor)
1594                 return 0;
1595         /* Order representors by name. */
1596         return si_a->port_name - si_b->port_name;
1597 }
1598
1599 /**
1600  * DPDK callback to register a PCI device.
1601  *
1602  * This function spawns Ethernet devices out of a given PCI device.
1603  *
1604  * @param[in] pci_drv
1605  *   PCI driver structure (mlx5_driver).
1606  * @param[in] pci_dev
1607  *   PCI device information.
1608  *
1609  * @return
1610  *   0 on success, a negative errno value otherwise and rte_errno is set.
1611  */
1612 static int
1613 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1614                struct rte_pci_device *pci_dev)
1615 {
1616         struct ibv_device **ibv_list;
1617         /*
1618          * Number of found IB Devices matching with requested PCI BDF.
1619          * nd != 1 means there are multiple IB devices over the same
1620          * PCI device and we have representors and master.
1621          */
1622         unsigned int nd = 0;
1623         /*
1624          * Number of found IB device Ports. nd = 1 and np = 1..n means
1625          * we have the single multiport IB device, and there may be
1626          * representors attached to some of found ports.
1627          */
1628         unsigned int np = 0;
1629         /*
1630          * Number of DPDK ethernet devices to Spawn - either over
1631          * multiple IB devices or multiple ports of single IB device.
1632          * Actually this is the number of iterations to spawn.
1633          */
1634         unsigned int ns = 0;
1635         struct mlx5_dev_config dev_config;
1636         int ret;
1637
1638         ret = mlx5_init_once();
1639         if (ret) {
1640                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1641                         strerror(rte_errno));
1642                 return -rte_errno;
1643         }
1644         assert(pci_drv == &mlx5_driver);
1645         errno = 0;
1646         ibv_list = mlx5_glue->get_device_list(&ret);
1647         if (!ibv_list) {
1648                 rte_errno = errno ? errno : ENOSYS;
1649                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1650                 return -rte_errno;
1651         }
1652         /*
1653          * First scan the list of all Infiniband devices to find
1654          * matching ones, gathering into the list.
1655          */
1656         struct ibv_device *ibv_match[ret + 1];
1657         int nl_route = -1;
1658         int nl_rdma = -1;
1659         unsigned int i;
1660
1661         while (ret-- > 0) {
1662                 struct rte_pci_addr pci_addr;
1663
1664                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1665                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1666                         continue;
1667                 if (pci_dev->addr.domain != pci_addr.domain ||
1668                     pci_dev->addr.bus != pci_addr.bus ||
1669                     pci_dev->addr.devid != pci_addr.devid ||
1670                     pci_dev->addr.function != pci_addr.function)
1671                         continue;
1672                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1673                         ibv_list[ret]->name);
1674                 ibv_match[nd++] = ibv_list[ret];
1675         }
1676         ibv_match[nd] = NULL;
1677         if (!nd) {
1678                 /* No device macthes, just complain and bail out. */
1679                 mlx5_glue->free_device_list(ibv_list);
1680                 DRV_LOG(WARNING,
1681                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1682                         " are kernel drivers loaded?",
1683                         pci_dev->addr.domain, pci_dev->addr.bus,
1684                         pci_dev->addr.devid, pci_dev->addr.function);
1685                 rte_errno = ENOENT;
1686                 ret = -rte_errno;
1687                 return ret;
1688         }
1689         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1690         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1691         if (nd == 1) {
1692                 /*
1693                  * Found single matching device may have multiple ports.
1694                  * Each port may be representor, we have to check the port
1695                  * number and check the representors existence.
1696                  */
1697                 if (nl_rdma >= 0)
1698                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1699                 if (!np)
1700                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1701                                          " ports number", ibv_match[0]->name);
1702         }
1703         /*
1704          * Now we can determine the maximal
1705          * amount of devices to be spawned.
1706          */
1707         struct mlx5_dev_spawn_data list[np ? np : nd];
1708
1709         if (np > 1) {
1710                 /*
1711                  * Signle IB device with multiple ports found,
1712                  * it may be E-Switch master device and representors.
1713                  * We have to perform identification trough the ports.
1714                  */
1715                 assert(nl_rdma >= 0);
1716                 assert(ns == 0);
1717                 assert(nd == 1);
1718                 for (i = 1; i <= np; ++i) {
1719                         list[ns].max_port = np;
1720                         list[ns].ibv_port = i;
1721                         list[ns].ibv_dev = ibv_match[0];
1722                         list[ns].eth_dev = NULL;
1723                         list[ns].ifindex = mlx5_nl_ifindex
1724                                         (nl_rdma, list[ns].ibv_dev->name, i);
1725                         if (!list[ns].ifindex) {
1726                                 /*
1727                                  * No network interface index found for the
1728                                  * specified port, it means there is no
1729                                  * representor on this port. It's OK,
1730                                  * there can be disabled ports, for example
1731                                  * if sriov_numvfs < sriov_totalvfs.
1732                                  */
1733                                 continue;
1734                         }
1735                         ret = -1;
1736                         if (nl_route >= 0)
1737                                 ret = mlx5_nl_switch_info
1738                                                (nl_route,
1739                                                 list[ns].ifindex,
1740                                                 &list[ns].info);
1741                         if (ret || (!list[ns].info.representor &&
1742                                     !list[ns].info.master)) {
1743                                 /*
1744                                  * We failed to recognize representors with
1745                                  * Netlink, let's try to perform the task
1746                                  * with sysfs.
1747                                  */
1748                                 ret =  mlx5_sysfs_switch_info
1749                                                 (list[ns].ifindex,
1750                                                  &list[ns].info);
1751                         }
1752                         if (!ret && (list[ns].info.representor ^
1753                                      list[ns].info.master))
1754                                 ns++;
1755                 }
1756                 if (!ns) {
1757                         DRV_LOG(ERR,
1758                                 "unable to recognize master/representors"
1759                                 " on the IB device with multiple ports");
1760                         rte_errno = ENOENT;
1761                         ret = -rte_errno;
1762                         goto exit;
1763                 }
1764         } else {
1765                 /*
1766                  * The existence of several matching entries (nd > 1) means
1767                  * port representors have been instantiated. No existing Verbs
1768                  * call nor sysfs entries can tell them apart, this can only
1769                  * be done through Netlink calls assuming kernel drivers are
1770                  * recent enough to support them.
1771                  *
1772                  * In the event of identification failure through Netlink,
1773                  * try again through sysfs, then:
1774                  *
1775                  * 1. A single IB device matches (nd == 1) with single
1776                  *    port (np=0/1) and is not a representor, assume
1777                  *    no switch support.
1778                  *
1779                  * 2. Otherwise no safe assumptions can be made;
1780                  *    complain louder and bail out.
1781                  */
1782                 np = 1;
1783                 for (i = 0; i != nd; ++i) {
1784                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1785                         list[ns].max_port = 1;
1786                         list[ns].ibv_port = 1;
1787                         list[ns].ibv_dev = ibv_match[i];
1788                         list[ns].eth_dev = NULL;
1789                         list[ns].ifindex = 0;
1790                         if (nl_rdma >= 0)
1791                                 list[ns].ifindex = mlx5_nl_ifindex
1792                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1793                         if (!list[ns].ifindex) {
1794                                 /*
1795                                  * No network interface index found for the
1796                                  * specified device, it means there it is not
1797                                  * a representor/master.
1798                                  */
1799                                 continue;
1800                         }
1801                         ret = -1;
1802                         if (nl_route >= 0)
1803                                 ret = mlx5_nl_switch_info
1804                                                (nl_route,
1805                                                 list[ns].ifindex,
1806                                                 &list[ns].info);
1807                         if (ret || (!list[ns].info.representor &&
1808                                     !list[ns].info.master)) {
1809                                 /*
1810                                  * We failed to recognize representors with
1811                                  * Netlink, let's try to perform the task
1812                                  * with sysfs.
1813                                  */
1814                                 ret =  mlx5_sysfs_switch_info
1815                                                 (list[ns].ifindex,
1816                                                  &list[ns].info);
1817                         }
1818                         if (!ret && (list[ns].info.representor ^
1819                                      list[ns].info.master)) {
1820                                 ns++;
1821                         } else if ((nd == 1) &&
1822                                    !list[ns].info.representor &&
1823                                    !list[ns].info.master) {
1824                                 /*
1825                                  * Single IB device with
1826                                  * one physical port and
1827                                  * attached network device.
1828                                  * May be SRIOV is not enabled
1829                                  * or there is no representors.
1830                                  */
1831                                 DRV_LOG(INFO, "no E-Switch support detected");
1832                                 ns++;
1833                                 break;
1834                         }
1835                 }
1836                 if (!ns) {
1837                         DRV_LOG(ERR,
1838                                 "unable to recognize master/representors"
1839                                 " on the multiple IB devices");
1840                         rte_errno = ENOENT;
1841                         ret = -rte_errno;
1842                         goto exit;
1843                 }
1844         }
1845         assert(ns);
1846         /*
1847          * Sort list to probe devices in natural order for users convenience
1848          * (i.e. master first, then representors from lowest to highest ID).
1849          */
1850         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1851         /* Default configuration. */
1852         dev_config = (struct mlx5_dev_config){
1853                 .hw_padding = 0,
1854                 .mps = MLX5_ARG_UNSET,
1855                 .tx_vec_en = 1,
1856                 .rx_vec_en = 1,
1857                 .txq_inline = MLX5_ARG_UNSET,
1858                 .txqs_inline = MLX5_ARG_UNSET,
1859                 .txqs_vec = MLX5_ARG_UNSET,
1860                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1861                 .vf_nl_en = 1,
1862                 .mr_ext_memseg_en = 1,
1863                 .mprq = {
1864                         .enabled = 0, /* Disabled by default. */
1865                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1866                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1867                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1868                 },
1869         };
1870         /* Device specific configuration. */
1871         switch (pci_dev->id.device_id) {
1872         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1873                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1874                 break;
1875         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1876         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1877         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1878         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1879                 dev_config.vf = 1;
1880                 break;
1881         default:
1882                 break;
1883         }
1884         /* Set architecture-dependent default value if unset. */
1885         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1886                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1887         for (i = 0; i != ns; ++i) {
1888                 uint32_t restore;
1889
1890                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1891                                                  &list[i],
1892                                                  dev_config);
1893                 if (!list[i].eth_dev) {
1894                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1895                                 break;
1896                         /* Device is disabled or already spawned. Ignore it. */
1897                         continue;
1898                 }
1899                 restore = list[i].eth_dev->data->dev_flags;
1900                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1901                 /* Restore non-PCI flags cleared by the above call. */
1902                 list[i].eth_dev->data->dev_flags |= restore;
1903                 rte_eth_dev_probing_finish(list[i].eth_dev);
1904         }
1905         if (i != ns) {
1906                 DRV_LOG(ERR,
1907                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1908                         " encountering an error: %s",
1909                         pci_dev->addr.domain, pci_dev->addr.bus,
1910                         pci_dev->addr.devid, pci_dev->addr.function,
1911                         strerror(rte_errno));
1912                 ret = -rte_errno;
1913                 /* Roll back. */
1914                 while (i--) {
1915                         if (!list[i].eth_dev)
1916                                 continue;
1917                         mlx5_dev_close(list[i].eth_dev);
1918                         /* mac_addrs must not be freed because in dev_private */
1919                         list[i].eth_dev->data->mac_addrs = NULL;
1920                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1921                 }
1922                 /* Restore original error. */
1923                 rte_errno = -ret;
1924         } else {
1925                 ret = 0;
1926         }
1927 exit:
1928         /*
1929          * Do the routine cleanup:
1930          * - close opened Netlink sockets
1931          * - free the Infiniband device list
1932          */
1933         if (nl_rdma >= 0)
1934                 close(nl_rdma);
1935         if (nl_route >= 0)
1936                 close(nl_route);
1937         assert(ibv_list);
1938         mlx5_glue->free_device_list(ibv_list);
1939         return ret;
1940 }
1941
1942 /**
1943  * DPDK callback to remove a PCI device.
1944  *
1945  * This function removes all Ethernet devices belong to a given PCI device.
1946  *
1947  * @param[in] pci_dev
1948  *   Pointer to the PCI device.
1949  *
1950  * @return
1951  *   0 on success, the function cannot fail.
1952  */
1953 static int
1954 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1955 {
1956         uint16_t port_id;
1957         struct rte_eth_dev *port;
1958
1959         for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1960                 port = &rte_eth_devices[port_id];
1961                 if (port->state != RTE_ETH_DEV_UNUSED &&
1962                                 port->device == &pci_dev->device)
1963                         rte_eth_dev_close(port_id);
1964         }
1965         return 0;
1966 }
1967
1968 static const struct rte_pci_id mlx5_pci_id_map[] = {
1969         {
1970                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1971                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1972         },
1973         {
1974                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1975                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1976         },
1977         {
1978                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1979                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1980         },
1981         {
1982                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1983                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1984         },
1985         {
1986                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1987                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1988         },
1989         {
1990                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1991                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1992         },
1993         {
1994                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1995                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1996         },
1997         {
1998                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1999                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2000         },
2001         {
2002                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2003                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2004         },
2005         {
2006                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2007                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2008         },
2009         {
2010                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2011                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2012         },
2013         {
2014                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2015                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2016         },
2017         {
2018                 .vendor_id = 0
2019         }
2020 };
2021
2022 static struct rte_pci_driver mlx5_driver = {
2023         .driver = {
2024                 .name = MLX5_DRIVER_NAME
2025         },
2026         .id_table = mlx5_pci_id_map,
2027         .probe = mlx5_pci_probe,
2028         .remove = mlx5_pci_remove,
2029         .dma_map = mlx5_dma_map,
2030         .dma_unmap = mlx5_dma_unmap,
2031         .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2032                       RTE_PCI_DRV_PROBE_AGAIN),
2033 };
2034
2035 #ifdef RTE_IBVERBS_LINK_DLOPEN
2036
2037 /**
2038  * Suffix RTE_EAL_PMD_PATH with "-glue".
2039  *
2040  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2041  * suffixing its last component.
2042  *
2043  * @param buf[out]
2044  *   Output buffer, should be large enough otherwise NULL is returned.
2045  * @param size
2046  *   Size of @p out.
2047  *
2048  * @return
2049  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2050  */
2051 static char *
2052 mlx5_glue_path(char *buf, size_t size)
2053 {
2054         static const char *const bad[] = { "/", ".", "..", NULL };
2055         const char *path = RTE_EAL_PMD_PATH;
2056         size_t len = strlen(path);
2057         size_t off;
2058         int i;
2059
2060         while (len && path[len - 1] == '/')
2061                 --len;
2062         for (off = len; off && path[off - 1] != '/'; --off)
2063                 ;
2064         for (i = 0; bad[i]; ++i)
2065                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2066                         goto error;
2067         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2068         if (i == -1 || (size_t)i >= size)
2069                 goto error;
2070         return buf;
2071 error:
2072         DRV_LOG(ERR,
2073                 "unable to append \"-glue\" to last component of"
2074                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2075                 " please re-configure DPDK");
2076         return NULL;
2077 }
2078
2079 /**
2080  * Initialization routine for run-time dependency on rdma-core.
2081  */
2082 static int
2083 mlx5_glue_init(void)
2084 {
2085         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2086         const char *path[] = {
2087                 /*
2088                  * A basic security check is necessary before trusting
2089                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2090                  */
2091                 (geteuid() == getuid() && getegid() == getgid() ?
2092                  getenv("MLX5_GLUE_PATH") : NULL),
2093                 /*
2094                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2095                  * variant, otherwise let dlopen() look up libraries on its
2096                  * own.
2097                  */
2098                 (*RTE_EAL_PMD_PATH ?
2099                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2100         };
2101         unsigned int i = 0;
2102         void *handle = NULL;
2103         void **sym;
2104         const char *dlmsg;
2105
2106         while (!handle && i != RTE_DIM(path)) {
2107                 const char *end;
2108                 size_t len;
2109                 int ret;
2110
2111                 if (!path[i]) {
2112                         ++i;
2113                         continue;
2114                 }
2115                 end = strpbrk(path[i], ":;");
2116                 if (!end)
2117                         end = path[i] + strlen(path[i]);
2118                 len = end - path[i];
2119                 ret = 0;
2120                 do {
2121                         char name[ret + 1];
2122
2123                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2124                                        (int)len, path[i],
2125                                        (!len || *(end - 1) == '/') ? "" : "/");
2126                         if (ret == -1)
2127                                 break;
2128                         if (sizeof(name) != (size_t)ret + 1)
2129                                 continue;
2130                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2131                                 name);
2132                         handle = dlopen(name, RTLD_LAZY);
2133                         break;
2134                 } while (1);
2135                 path[i] = end + 1;
2136                 if (!*end)
2137                         ++i;
2138         }
2139         if (!handle) {
2140                 rte_errno = EINVAL;
2141                 dlmsg = dlerror();
2142                 if (dlmsg)
2143                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2144                 goto glue_error;
2145         }
2146         sym = dlsym(handle, "mlx5_glue");
2147         if (!sym || !*sym) {
2148                 rte_errno = EINVAL;
2149                 dlmsg = dlerror();
2150                 if (dlmsg)
2151                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2152                 goto glue_error;
2153         }
2154         mlx5_glue = *sym;
2155         return 0;
2156 glue_error:
2157         if (handle)
2158                 dlclose(handle);
2159         DRV_LOG(WARNING,
2160                 "cannot initialize PMD due to missing run-time dependency on"
2161                 " rdma-core libraries (libibverbs, libmlx5)");
2162         return -rte_errno;
2163 }
2164
2165 #endif
2166
2167 /**
2168  * Driver initialization routine.
2169  */
2170 RTE_INIT(rte_mlx5_pmd_init)
2171 {
2172         /* Initialize driver log type. */
2173         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2174         if (mlx5_logtype >= 0)
2175                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2176
2177         /* Build the static tables for Verbs conversion. */
2178         mlx5_set_ptype_table();
2179         mlx5_set_cksum_table();
2180         mlx5_set_swp_types_table();
2181         /*
2182          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2183          * huge pages. Calling ibv_fork_init() during init allows
2184          * applications to use fork() safely for purposes other than
2185          * using this PMD, which is not supported in forked processes.
2186          */
2187         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2188         /* Match the size of Rx completion entry to the size of a cacheline. */
2189         if (RTE_CACHE_LINE_SIZE == 128)
2190                 setenv("MLX5_CQE_SIZE", "128", 0);
2191         /*
2192          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2193          * cleanup all the Verbs resources even when the device was removed.
2194          */
2195         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2196 #ifdef RTE_IBVERBS_LINK_DLOPEN
2197         if (mlx5_glue_init())
2198                 return;
2199         assert(mlx5_glue);
2200 #endif
2201 #ifndef NDEBUG
2202         /* Glue structure must not contain any NULL pointers. */
2203         {
2204                 unsigned int i;
2205
2206                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2207                         assert(((const void *const *)mlx5_glue)[i]);
2208         }
2209 #endif
2210         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2211                 DRV_LOG(ERR,
2212                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2213                         mlx5_glue->version, MLX5_GLUE_VERSION);
2214                 return;
2215         }
2216         mlx5_glue->fork_init();
2217         rte_pci_register(&mlx5_driver);
2218 }
2219
2220 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2221 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2222 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");