4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
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15 * the documentation and/or other materials provided with the
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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46 #include <sys/ioctl.h>
47 #include <sys/socket.h>
48 #include <sys/utsname.h>
49 #include <netinet/in.h>
50 #include <linux/ethtool.h>
51 #include <linux/sockios.h>
52 #include <linux/version.h>
57 #include <rte_atomic.h>
58 #include <rte_ethdev.h>
59 #include <rte_bus_pci.h>
61 #include <rte_common.h>
62 #include <rte_interrupts.h>
63 #include <rte_alarm.h>
64 #include <rte_malloc.h>
67 #include "mlx5_rxtx.h"
68 #include "mlx5_utils.h"
70 /* Add defines in case the running kernel is not the same as user headers. */
71 #ifndef ETHTOOL_GLINKSETTINGS
72 struct ethtool_link_settings {
81 uint8_t eth_tp_mdix_ctrl;
82 int8_t link_mode_masks_nwords;
84 uint32_t link_mode_masks[];
87 #define ETHTOOL_GLINKSETTINGS 0x0000004c
88 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
89 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
90 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
91 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
92 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
93 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
94 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
95 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
96 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
97 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
98 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
99 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
100 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
101 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
102 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
103 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
105 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
106 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
107 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
108 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
110 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
111 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
112 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
114 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
115 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
116 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
117 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
118 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
122 * Check if running as a secondary process.
125 * Nonzero if running as a secondary process.
128 mlx5_is_secondary(void)
130 return rte_eal_process_type() == RTE_PROC_SECONDARY;
134 * Get interface name from private structure.
137 * Pointer to private structure.
139 * Interface name output buffer.
142 * 0 on success, -1 on failure and errno is set.
145 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
149 unsigned int dev_type = 0;
150 unsigned int dev_port_prev = ~0u;
151 char match[IF_NAMESIZE] = "";
154 MKSTR(path, "%s/device/net", priv->ibdev_path);
160 while ((dent = readdir(dir)) != NULL) {
161 char *name = dent->d_name;
163 unsigned int dev_port;
166 if ((name[0] == '.') &&
167 ((name[1] == '\0') ||
168 ((name[1] == '.') && (name[2] == '\0'))))
171 MKSTR(path, "%s/device/net/%s/%s",
172 priv->ibdev_path, name,
173 (dev_type ? "dev_id" : "dev_port"));
175 file = fopen(path, "rb");
180 * Switch to dev_id when dev_port does not exist as
181 * is the case with Linux kernel versions < 3.15.
192 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
197 * Switch to dev_id when dev_port returns the same value for
198 * all ports. May happen when using a MOFED release older than
199 * 3.0 with a Linux kernel >= 3.15.
201 if (dev_port == dev_port_prev)
203 dev_port_prev = dev_port;
204 if (dev_port == (priv->port - 1u))
205 snprintf(match, sizeof(match), "%s", name);
208 if (match[0] == '\0')
210 strncpy(*ifname, match, sizeof(*ifname));
215 * Check if the counter is located on ib counters file.
221 * 1 if counter is located on ib counters file , 0 otherwise.
224 priv_is_ib_cntr(const char *cntr)
226 if (!strcmp(cntr, "out_of_buffer"))
232 * Read from sysfs entry.
235 * Pointer to private structure.
237 * Entry name relative to sysfs path.
239 * Data output buffer.
244 * 0 on success, -1 on failure and errno is set.
247 priv_sysfs_read(const struct priv *priv, const char *entry,
248 char *buf, size_t size)
250 char ifname[IF_NAMESIZE];
255 if (priv_get_ifname(priv, &ifname))
258 if (priv_is_ib_cntr(entry)) {
259 MKSTR(path, "%s/ports/1/hw_counters/%s",
260 priv->ibdev_path, entry);
261 file = fopen(path, "rb");
263 MKSTR(path, "%s/device/net/%s/%s",
264 priv->ibdev_path, ifname, entry);
265 file = fopen(path, "rb");
269 ret = fread(buf, 1, size, file);
271 if (((size_t)ret < size) && (ferror(file)))
281 * Write to sysfs entry.
284 * Pointer to private structure.
286 * Entry name relative to sysfs path.
293 * 0 on success, -1 on failure and errno is set.
296 priv_sysfs_write(const struct priv *priv, const char *entry,
297 char *buf, size_t size)
299 char ifname[IF_NAMESIZE];
304 if (priv_get_ifname(priv, &ifname))
307 MKSTR(path, "%s/device/net/%s/%s", priv->ibdev_path, ifname, entry);
309 file = fopen(path, "wb");
312 ret = fwrite(buf, 1, size, file);
314 if (((size_t)ret < size) || (ferror(file)))
324 * Get unsigned long sysfs property.
327 * Pointer to private structure.
329 * Entry name relative to sysfs path.
331 * Value output buffer.
334 * 0 on success, -1 on failure and errno is set.
337 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
340 unsigned long value_ret;
343 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
345 DEBUG("cannot read %s value from sysfs: %s",
346 name, strerror(errno));
349 value_str[ret] = '\0';
351 value_ret = strtoul(value_str, NULL, 0);
353 DEBUG("invalid %s value `%s': %s", name, value_str,
362 * Set unsigned long sysfs property.
365 * Pointer to private structure.
367 * Entry name relative to sysfs path.
372 * 0 on success, -1 on failure and errno is set.
375 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
378 MKSTR(value_str, "%lu", value);
380 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
382 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
383 name, value_str, value, strerror(errno));
390 * Perform ifreq ioctl() on associated Ethernet device.
393 * Pointer to private structure.
395 * Request number to pass to ioctl().
397 * Interface request structure output buffer.
400 * 0 on success, -1 on failure and errno is set.
403 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
405 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
410 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
411 ret = ioctl(sock, req, ifr);
417 * Return the number of active VFs for the current device.
420 * Pointer to private structure.
421 * @param[out] num_vfs
422 * Number of active VFs.
425 * 0 on success, -1 on failure and errno is set.
428 priv_get_num_vfs(struct priv *priv, uint16_t *num_vfs)
430 /* The sysfs entry name depends on the operating system. */
431 const char **name = (const char *[]){
432 "device/sriov_numvfs",
433 "device/mlx5_num_vfs",
439 unsigned long ulong_num_vfs;
441 ret = priv_get_sysfs_ulong(priv, *name, &ulong_num_vfs);
443 *num_vfs = ulong_num_vfs;
444 } while (*(++name) && ret);
452 * Pointer to private structure.
454 * MTU value output buffer.
457 * 0 on success, -1 on failure and errno is set.
460 priv_get_mtu(struct priv *priv, uint16_t *mtu)
462 unsigned long ulong_mtu;
464 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
471 * Read device counter from sysfs.
474 * Pointer to private structure.
478 * Counter output buffer.
481 * 0 on success, -1 on failure and errno is set.
484 priv_get_cntr_sysfs(struct priv *priv, const char *name, uint64_t *cntr)
486 unsigned long ulong_ctr;
488 if (priv_get_sysfs_ulong(priv, name, &ulong_ctr) == -1)
498 * Pointer to private structure.
503 * 0 on success, -1 on failure and errno is set.
506 priv_set_mtu(struct priv *priv, uint16_t mtu)
510 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
511 priv_get_mtu(priv, &new_mtu))
523 * Pointer to private structure.
525 * Bitmask for flags that must remain untouched.
527 * Bitmask for flags to modify.
530 * 0 on success, -1 on failure and errno is set.
533 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
537 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
540 tmp |= (flags & (~keep));
541 return priv_set_sysfs_ulong(priv, "flags", tmp);
545 * Ethernet device configuration.
547 * Prepare the driver for a given number of TX and RX queues.
550 * Pointer to Ethernet device structure.
553 * 0 on success, errno value on failure.
556 dev_configure(struct rte_eth_dev *dev)
558 struct priv *priv = dev->data->dev_private;
559 unsigned int rxqs_n = dev->data->nb_rx_queues;
560 unsigned int txqs_n = dev->data->nb_tx_queues;
563 unsigned int reta_idx_n;
564 const uint8_t use_app_rss_key =
565 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len;
567 if (use_app_rss_key &&
568 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
569 rss_hash_default_key_len)) {
570 /* MLX5 RSS only support 40bytes key. */
573 priv->rss_conf.rss_key =
574 rte_realloc(priv->rss_conf.rss_key,
575 rss_hash_default_key_len, 0);
576 if (!priv->rss_conf.rss_key) {
577 ERROR("cannot allocate RSS hash key memory (%u)", rxqs_n);
580 memcpy(priv->rss_conf.rss_key,
582 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
583 rss_hash_default_key,
584 rss_hash_default_key_len);
585 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
586 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
587 priv->rxqs = (void *)dev->data->rx_queues;
588 priv->txqs = (void *)dev->data->tx_queues;
589 if (txqs_n != priv->txqs_n) {
590 INFO("%p: TX queues number update: %u -> %u",
591 (void *)dev, priv->txqs_n, txqs_n);
592 priv->txqs_n = txqs_n;
594 if (rxqs_n > priv->ind_table_max_size) {
595 ERROR("cannot handle this many RX queues (%u)", rxqs_n);
598 if (rxqs_n == priv->rxqs_n)
600 INFO("%p: RX queues number update: %u -> %u",
601 (void *)dev, priv->rxqs_n, rxqs_n);
602 priv->rxqs_n = rxqs_n;
603 /* If the requested number of RX queues is not a power of two, use the
604 * maximum indirection table size for better balancing.
605 * The result is always rounded to the next power of two. */
606 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
607 priv->ind_table_max_size :
609 if (priv_rss_reta_index_resize(priv, reta_idx_n))
611 /* When the number of RX queues is not a power of two, the remaining
612 * table entries are padded with reused WQs and hashes are not spread
614 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
615 (*priv->reta_idx)[i] = j;
623 * DPDK callback for Ethernet device configuration.
626 * Pointer to Ethernet device structure.
629 * 0 on success, negative errno value on failure.
632 mlx5_dev_configure(struct rte_eth_dev *dev)
634 struct priv *priv = dev->data->dev_private;
637 if (mlx5_is_secondary())
638 return -E_RTE_SECONDARY;
641 ret = dev_configure(dev);
648 * DPDK callback to get information about the device.
651 * Pointer to Ethernet device structure.
653 * Info structure output buffer.
656 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
658 struct priv *priv = dev->data->dev_private;
660 char ifname[IF_NAMESIZE];
662 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
665 /* FIXME: we should ask the device for these values. */
666 info->min_rx_bufsize = 32;
667 info->max_rx_pktlen = 65536;
669 * Since we need one CQ per QP, the limit is the minimum number
670 * between the two values.
672 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
673 priv->device_attr.orig_attr.max_qp);
674 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
677 info->max_rx_queues = max;
678 info->max_tx_queues = max;
679 info->max_mac_addrs = RTE_DIM(priv->mac);
680 info->rx_offload_capa =
682 (DEV_RX_OFFLOAD_IPV4_CKSUM |
683 DEV_RX_OFFLOAD_UDP_CKSUM |
684 DEV_RX_OFFLOAD_TCP_CKSUM) :
686 (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
687 DEV_RX_OFFLOAD_TIMESTAMP;
690 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
692 info->tx_offload_capa |=
693 (DEV_TX_OFFLOAD_IPV4_CKSUM |
694 DEV_TX_OFFLOAD_UDP_CKSUM |
695 DEV_TX_OFFLOAD_TCP_CKSUM);
697 info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
699 info->tx_offload_capa |= (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
700 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
701 DEV_TX_OFFLOAD_GRE_TNL_TSO);
702 if (priv_get_ifname(priv, &ifname) == 0)
703 info->if_index = if_nametoindex(ifname);
704 info->reta_size = priv->reta_idx_n ?
705 priv->reta_idx_n : priv->ind_table_max_size;
706 info->hash_key_size = priv->rss_conf.rss_key_len;
707 info->speed_capa = priv->link_speed_capa;
712 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
714 static const uint32_t ptypes[] = {
715 /* refers to rxq_cq_to_pkt_type() */
717 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
718 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
719 RTE_PTYPE_L4_NONFRAG,
723 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
724 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
725 RTE_PTYPE_INNER_L4_NONFRAG,
726 RTE_PTYPE_INNER_L4_FRAG,
727 RTE_PTYPE_INNER_L4_TCP,
728 RTE_PTYPE_INNER_L4_UDP,
732 if (dev->rx_pkt_burst == mlx5_rx_burst ||
733 dev->rx_pkt_burst == mlx5_rx_burst_vec)
739 * DPDK callback to retrieve physical link information.
742 * Pointer to Ethernet device structure.
743 * @param wait_to_complete
744 * Wait for request completion (ignored).
747 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, int wait_to_complete)
749 struct priv *priv = dev->data->dev_private;
750 struct ethtool_cmd edata = {
751 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
754 struct rte_eth_link dev_link;
757 /* priv_lock() is not taken to allow concurrent calls. */
759 (void)wait_to_complete;
760 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
761 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
764 memset(&dev_link, 0, sizeof(dev_link));
765 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
766 (ifr.ifr_flags & IFF_RUNNING));
767 ifr.ifr_data = (void *)&edata;
768 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
769 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
773 link_speed = ethtool_cmd_speed(&edata);
774 if (link_speed == -1)
775 dev_link.link_speed = 0;
777 dev_link.link_speed = link_speed;
778 priv->link_speed_capa = 0;
779 if (edata.supported & SUPPORTED_Autoneg)
780 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
781 if (edata.supported & (SUPPORTED_1000baseT_Full |
782 SUPPORTED_1000baseKX_Full))
783 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
784 if (edata.supported & SUPPORTED_10000baseKR_Full)
785 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
786 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
787 SUPPORTED_40000baseCR4_Full |
788 SUPPORTED_40000baseSR4_Full |
789 SUPPORTED_40000baseLR4_Full))
790 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
791 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
792 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
793 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
794 ETH_LINK_SPEED_FIXED);
795 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
796 /* Link status changed. */
797 dev->data->dev_link = dev_link;
800 /* Link status is still the same. */
805 * Retrieve physical link information (unlocked version using new ioctl).
808 * Pointer to Ethernet device structure.
809 * @param wait_to_complete
810 * Wait for request completion (ignored).
813 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, int wait_to_complete)
815 struct priv *priv = dev->data->dev_private;
816 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
818 struct rte_eth_link dev_link;
821 (void)wait_to_complete;
822 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
823 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
826 memset(&dev_link, 0, sizeof(dev_link));
827 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
828 (ifr.ifr_flags & IFF_RUNNING));
829 ifr.ifr_data = (void *)&gcmd;
830 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
831 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s",
835 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
837 alignas(struct ethtool_link_settings)
838 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
839 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
840 struct ethtool_link_settings *ecmd = (void *)data;
843 ifr.ifr_data = (void *)ecmd;
844 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
845 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s",
849 dev_link.link_speed = ecmd->speed;
850 sc = ecmd->link_mode_masks[0] |
851 ((uint64_t)ecmd->link_mode_masks[1] << 32);
852 priv->link_speed_capa = 0;
853 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
854 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
855 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
856 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
857 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
858 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
859 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
860 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
861 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
862 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
863 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
864 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
865 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
866 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
867 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
868 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
869 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
870 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
871 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
872 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
873 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
874 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
875 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
876 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
877 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
878 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
879 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
880 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
881 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
882 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
883 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
884 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
885 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
886 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
887 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
888 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
889 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
890 ETH_LINK_SPEED_FIXED);
891 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
892 /* Link status changed. */
893 dev->data->dev_link = dev_link;
896 /* Link status is still the same. */
901 * DPDK callback to retrieve physical link information.
904 * Pointer to Ethernet device structure.
905 * @param wait_to_complete
906 * Wait for request completion (ignored).
909 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
911 struct utsname utsname;
914 if (uname(&utsname) == -1 ||
915 sscanf(utsname.release, "%d.%d.%d",
916 &ver[0], &ver[1], &ver[2]) != 3 ||
917 KERNEL_VERSION(ver[0], ver[1], ver[2]) < KERNEL_VERSION(4, 9, 0))
918 return mlx5_link_update_unlocked_gset(dev, wait_to_complete);
919 return mlx5_link_update_unlocked_gs(dev, wait_to_complete);
923 * DPDK callback to change the MTU.
926 * Pointer to Ethernet device structure.
931 * 0 on success, negative errno value on failure.
934 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
936 struct priv *priv = dev->data->dev_private;
940 if (mlx5_is_secondary())
941 return -E_RTE_SECONDARY;
944 ret = priv_get_mtu(priv, &kern_mtu);
947 /* Set kernel interface MTU first. */
948 ret = priv_set_mtu(priv, mtu);
951 ret = priv_get_mtu(priv, &kern_mtu);
954 if (kern_mtu == mtu) {
956 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
962 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
970 * DPDK callback to get flow control status.
973 * Pointer to Ethernet device structure.
974 * @param[out] fc_conf
975 * Flow control output buffer.
978 * 0 on success, negative errno value on failure.
981 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
983 struct priv *priv = dev->data->dev_private;
985 struct ethtool_pauseparam ethpause = {
986 .cmd = ETHTOOL_GPAUSEPARAM
990 if (mlx5_is_secondary())
991 return -E_RTE_SECONDARY;
993 ifr.ifr_data = (void *)ðpause;
995 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
997 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
1003 fc_conf->autoneg = ethpause.autoneg;
1004 if (ethpause.rx_pause && ethpause.tx_pause)
1005 fc_conf->mode = RTE_FC_FULL;
1006 else if (ethpause.rx_pause)
1007 fc_conf->mode = RTE_FC_RX_PAUSE;
1008 else if (ethpause.tx_pause)
1009 fc_conf->mode = RTE_FC_TX_PAUSE;
1011 fc_conf->mode = RTE_FC_NONE;
1021 * DPDK callback to modify flow control parameters.
1024 * Pointer to Ethernet device structure.
1025 * @param[in] fc_conf
1026 * Flow control parameters.
1029 * 0 on success, negative errno value on failure.
1032 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1034 struct priv *priv = dev->data->dev_private;
1036 struct ethtool_pauseparam ethpause = {
1037 .cmd = ETHTOOL_SPAUSEPARAM
1041 if (mlx5_is_secondary())
1042 return -E_RTE_SECONDARY;
1044 ifr.ifr_data = (void *)ðpause;
1045 ethpause.autoneg = fc_conf->autoneg;
1046 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1047 (fc_conf->mode & RTE_FC_RX_PAUSE))
1048 ethpause.rx_pause = 1;
1050 ethpause.rx_pause = 0;
1052 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1053 (fc_conf->mode & RTE_FC_TX_PAUSE))
1054 ethpause.tx_pause = 1;
1056 ethpause.tx_pause = 0;
1059 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
1061 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
1075 * Get PCI information from struct ibv_device.
1078 * Pointer to Ethernet device structure.
1079 * @param[out] pci_addr
1080 * PCI bus address output buffer.
1083 * 0 on success, -1 on failure and errno is set.
1086 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
1087 struct rte_pci_addr *pci_addr)
1091 MKSTR(path, "%s/device/uevent", device->ibdev_path);
1093 file = fopen(path, "rb");
1096 while (fgets(line, sizeof(line), file) == line) {
1097 size_t len = strlen(line);
1100 /* Truncate long lines. */
1101 if (len == (sizeof(line) - 1))
1102 while (line[(len - 1)] != '\n') {
1106 line[(len - 1)] = ret;
1108 /* Extract information. */
1111 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
1115 &pci_addr->function) == 4) {
1125 * Update the link status.
1128 * Pointer to private structure.
1131 * Zero if the callback process can be called immediately.
1134 priv_link_status_update(struct priv *priv)
1136 struct rte_eth_link *link = &priv->dev->data->dev_link;
1138 mlx5_link_update(priv->dev, 0);
1139 if (((link->link_speed == 0) && link->link_status) ||
1140 ((link->link_speed != 0) && !link->link_status)) {
1142 * Inconsistent status. Event likely occurred before the
1143 * kernel netdevice exposes the new status.
1145 if (!priv->pending_alarm) {
1146 priv->pending_alarm = 1;
1147 rte_eal_alarm_set(MLX5_ALARM_TIMEOUT_US,
1148 mlx5_dev_link_status_handler,
1152 } else if (unlikely(priv->pending_alarm)) {
1153 /* Link interrupt occurred while alarm is already scheduled. */
1154 priv->pending_alarm = 0;
1155 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, priv->dev);
1161 * Device status handler.
1164 * Pointer to private structure.
1166 * Pointer to event flags holder.
1169 * Events bitmap of callback process which can be called immediately.
1172 priv_dev_status_handler(struct priv *priv)
1174 struct ibv_async_event event;
1177 /* Read all message and acknowledge them. */
1179 if (ibv_get_async_event(priv->ctx, &event))
1181 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
1182 event.event_type == IBV_EVENT_PORT_ERR) &&
1183 (priv->dev->data->dev_conf.intr_conf.lsc == 1))
1184 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
1185 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
1186 priv->dev->data->dev_conf.intr_conf.rmv == 1)
1187 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
1189 DEBUG("event type %d on port %d not handled",
1190 event.event_type, event.element.port_num);
1191 ibv_ack_async_event(&event);
1193 if (ret & (1 << RTE_ETH_EVENT_INTR_LSC))
1194 if (priv_link_status_update(priv))
1195 ret &= ~(1 << RTE_ETH_EVENT_INTR_LSC);
1200 * Handle delayed link status event.
1203 * Registered argument.
1206 mlx5_dev_link_status_handler(void *arg)
1208 struct rte_eth_dev *dev = arg;
1209 struct priv *priv = dev->data->dev_private;
1213 assert(priv->pending_alarm == 1);
1214 priv->pending_alarm = 0;
1215 ret = priv_link_status_update(priv);
1218 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
1223 * Handle interrupts from the NIC.
1225 * @param[in] intr_handle
1226 * Interrupt handler.
1228 * Callback argument.
1231 mlx5_dev_interrupt_handler(void *cb_arg)
1233 struct rte_eth_dev *dev = cb_arg;
1234 struct priv *priv = dev->data->dev_private;
1238 events = priv_dev_status_handler(priv);
1240 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
1241 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
1243 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
1244 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL,
1249 * Handle interrupts from the socket.
1252 * Callback argument.
1255 mlx5_dev_handler_socket(void *cb_arg)
1257 struct rte_eth_dev *dev = cb_arg;
1258 struct priv *priv = dev->data->dev_private;
1261 priv_socket_handle(priv);
1266 * Uninstall interrupt handler.
1269 * Pointer to private structure.
1271 * Pointer to the rte_eth_dev structure.
1274 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
1276 if (dev->data->dev_conf.intr_conf.lsc ||
1277 dev->data->dev_conf.intr_conf.rmv)
1278 rte_intr_callback_unregister(&priv->intr_handle,
1279 mlx5_dev_interrupt_handler, dev);
1280 if (priv->primary_socket)
1281 rte_intr_callback_unregister(&priv->intr_handle_socket,
1282 mlx5_dev_handler_socket, dev);
1283 if (priv->pending_alarm)
1284 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, dev);
1285 priv->pending_alarm = 0;
1286 priv->intr_handle.fd = 0;
1287 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1288 priv->intr_handle_socket.fd = 0;
1289 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1293 * Install interrupt handler.
1296 * Pointer to private structure.
1298 * Pointer to the rte_eth_dev structure.
1301 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
1305 assert(!mlx5_is_secondary());
1306 assert(priv->ctx->async_fd > 0);
1307 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1308 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1310 INFO("failed to change file descriptor async event queue");
1311 dev->data->dev_conf.intr_conf.lsc = 0;
1312 dev->data->dev_conf.intr_conf.rmv = 0;
1314 if (dev->data->dev_conf.intr_conf.lsc ||
1315 dev->data->dev_conf.intr_conf.rmv) {
1316 priv->intr_handle.fd = priv->ctx->async_fd;
1317 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1318 rte_intr_callback_register(&priv->intr_handle,
1319 mlx5_dev_interrupt_handler, dev);
1322 rc = priv_socket_init(priv);
1323 if (!rc && priv->primary_socket) {
1324 priv->intr_handle_socket.fd = priv->primary_socket;
1325 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1326 rte_intr_callback_register(&priv->intr_handle_socket,
1327 mlx5_dev_handler_socket, dev);
1332 * Change the link state (UP / DOWN).
1335 * Pointer to private data structure.
1337 * Pointer to rte_eth_dev structure.
1339 * Nonzero for link up, otherwise link down.
1342 * 0 on success, errno value on failure.
1345 priv_dev_set_link(struct priv *priv, struct rte_eth_dev *dev, int up)
1350 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
1353 priv_dev_select_tx_function(priv, dev);
1354 priv_dev_select_rx_function(priv, dev);
1356 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
1359 dev->rx_pkt_burst = removed_rx_burst;
1360 dev->tx_pkt_burst = removed_tx_burst;
1366 * DPDK callback to bring the link DOWN.
1369 * Pointer to Ethernet device structure.
1372 * 0 on success, errno value on failure.
1375 mlx5_set_link_down(struct rte_eth_dev *dev)
1377 struct priv *priv = dev->data->dev_private;
1381 err = priv_dev_set_link(priv, dev, 0);
1387 * DPDK callback to bring the link UP.
1390 * Pointer to Ethernet device structure.
1393 * 0 on success, errno value on failure.
1396 mlx5_set_link_up(struct rte_eth_dev *dev)
1398 struct priv *priv = dev->data->dev_private;
1402 err = priv_dev_set_link(priv, dev, 1);
1408 * Configure the TX function to use.
1411 * Pointer to private data structure.
1413 * Pointer to rte_eth_dev structure.
1416 priv_dev_select_tx_function(struct priv *priv, struct rte_eth_dev *dev)
1418 assert(priv != NULL);
1419 assert(dev != NULL);
1420 dev->tx_pkt_burst = mlx5_tx_burst;
1421 /* Select appropriate TX function. */
1422 if (priv->mps == MLX5_MPW_ENHANCED) {
1423 if (priv_check_vec_tx_support(priv) > 0) {
1424 if (priv_check_raw_vec_tx_support(priv) > 0)
1425 dev->tx_pkt_burst = mlx5_tx_burst_raw_vec;
1427 dev->tx_pkt_burst = mlx5_tx_burst_vec;
1428 DEBUG("selected Enhanced MPW TX vectorized function");
1430 dev->tx_pkt_burst = mlx5_tx_burst_empw;
1431 DEBUG("selected Enhanced MPW TX function");
1433 } else if (priv->mps && priv->txq_inline) {
1434 dev->tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1435 DEBUG("selected MPW inline TX function");
1436 } else if (priv->mps) {
1437 dev->tx_pkt_burst = mlx5_tx_burst_mpw;
1438 DEBUG("selected MPW TX function");
1443 * Configure the RX function to use.
1446 * Pointer to private data structure.
1448 * Pointer to rte_eth_dev structure.
1451 priv_dev_select_rx_function(struct priv *priv, struct rte_eth_dev *dev)
1453 assert(priv != NULL);
1454 assert(dev != NULL);
1455 if (priv_check_vec_rx_support(priv) > 0) {
1456 dev->rx_pkt_burst = mlx5_rx_burst_vec;
1457 DEBUG("selected RX vectorized function");
1459 dev->rx_pkt_burst = mlx5_rx_burst;