4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
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23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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46 #include <sys/ioctl.h>
47 #include <sys/socket.h>
48 #include <sys/utsname.h>
49 #include <netinet/in.h>
50 #include <linux/ethtool.h>
51 #include <linux/sockios.h>
52 #include <linux/version.h>
57 #include <rte_atomic.h>
58 #include <rte_ethdev.h>
59 #include <rte_bus_pci.h>
61 #include <rte_common.h>
62 #include <rte_interrupts.h>
63 #include <rte_alarm.h>
64 #include <rte_malloc.h>
67 #include "mlx5_rxtx.h"
68 #include "mlx5_utils.h"
70 /* Add defines in case the running kernel is not the same as user headers. */
71 #ifndef ETHTOOL_GLINKSETTINGS
72 struct ethtool_link_settings {
81 uint8_t eth_tp_mdix_ctrl;
82 int8_t link_mode_masks_nwords;
84 uint32_t link_mode_masks[];
87 #define ETHTOOL_GLINKSETTINGS 0x0000004c
88 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
89 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
90 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
91 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
92 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
93 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
94 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
95 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
96 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
97 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
98 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
99 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
100 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
101 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
102 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
103 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
105 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
106 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
107 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
108 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
110 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
111 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
112 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
114 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
115 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
116 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
117 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
118 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
122 * Get interface name from private structure.
125 * Pointer to private structure.
127 * Interface name output buffer.
130 * 0 on success, -1 on failure and errno is set.
133 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
137 unsigned int dev_type = 0;
138 unsigned int dev_port_prev = ~0u;
139 char match[IF_NAMESIZE] = "";
142 MKSTR(path, "%s/device/net", priv->ibdev_path);
148 while ((dent = readdir(dir)) != NULL) {
149 char *name = dent->d_name;
151 unsigned int dev_port;
154 if ((name[0] == '.') &&
155 ((name[1] == '\0') ||
156 ((name[1] == '.') && (name[2] == '\0'))))
159 MKSTR(path, "%s/device/net/%s/%s",
160 priv->ibdev_path, name,
161 (dev_type ? "dev_id" : "dev_port"));
163 file = fopen(path, "rb");
168 * Switch to dev_id when dev_port does not exist as
169 * is the case with Linux kernel versions < 3.15.
180 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
185 * Switch to dev_id when dev_port returns the same value for
186 * all ports. May happen when using a MOFED release older than
187 * 3.0 with a Linux kernel >= 3.15.
189 if (dev_port == dev_port_prev)
191 dev_port_prev = dev_port;
192 if (dev_port == (priv->port - 1u))
193 snprintf(match, sizeof(match), "%s", name);
196 if (match[0] == '\0')
198 strncpy(*ifname, match, sizeof(*ifname));
203 * Check if the counter is located on ib counters file.
209 * 1 if counter is located on ib counters file , 0 otherwise.
212 priv_is_ib_cntr(const char *cntr)
214 if (!strcmp(cntr, "out_of_buffer"))
220 * Read from sysfs entry.
223 * Pointer to private structure.
225 * Entry name relative to sysfs path.
227 * Data output buffer.
232 * 0 on success, -1 on failure and errno is set.
235 priv_sysfs_read(const struct priv *priv, const char *entry,
236 char *buf, size_t size)
238 char ifname[IF_NAMESIZE];
243 if (priv_get_ifname(priv, &ifname))
246 if (priv_is_ib_cntr(entry)) {
247 MKSTR(path, "%s/ports/1/hw_counters/%s",
248 priv->ibdev_path, entry);
249 file = fopen(path, "rb");
251 MKSTR(path, "%s/device/net/%s/%s",
252 priv->ibdev_path, ifname, entry);
253 file = fopen(path, "rb");
257 ret = fread(buf, 1, size, file);
259 if (((size_t)ret < size) && (ferror(file)))
269 * Write to sysfs entry.
272 * Pointer to private structure.
274 * Entry name relative to sysfs path.
281 * 0 on success, -1 on failure and errno is set.
284 priv_sysfs_write(const struct priv *priv, const char *entry,
285 char *buf, size_t size)
287 char ifname[IF_NAMESIZE];
292 if (priv_get_ifname(priv, &ifname))
295 MKSTR(path, "%s/device/net/%s/%s", priv->ibdev_path, ifname, entry);
297 file = fopen(path, "wb");
300 ret = fwrite(buf, 1, size, file);
302 if (((size_t)ret < size) || (ferror(file)))
312 * Get unsigned long sysfs property.
315 * Pointer to private structure.
317 * Entry name relative to sysfs path.
319 * Value output buffer.
322 * 0 on success, -1 on failure and errno is set.
325 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
328 unsigned long value_ret;
331 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
333 DEBUG("cannot read %s value from sysfs: %s",
334 name, strerror(errno));
337 value_str[ret] = '\0';
339 value_ret = strtoul(value_str, NULL, 0);
341 DEBUG("invalid %s value `%s': %s", name, value_str,
350 * Set unsigned long sysfs property.
353 * Pointer to private structure.
355 * Entry name relative to sysfs path.
360 * 0 on success, -1 on failure and errno is set.
363 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
366 MKSTR(value_str, "%lu", value);
368 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
370 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
371 name, value_str, value, strerror(errno));
378 * Perform ifreq ioctl() on associated Ethernet device.
381 * Pointer to private structure.
383 * Request number to pass to ioctl().
385 * Interface request structure output buffer.
388 * 0 on success, -1 on failure and errno is set.
391 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
393 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
398 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
399 ret = ioctl(sock, req, ifr);
405 * Return the number of active VFs for the current device.
408 * Pointer to private structure.
409 * @param[out] num_vfs
410 * Number of active VFs.
413 * 0 on success, -1 on failure and errno is set.
416 priv_get_num_vfs(struct priv *priv, uint16_t *num_vfs)
418 /* The sysfs entry name depends on the operating system. */
419 const char **name = (const char *[]){
420 "device/sriov_numvfs",
421 "device/mlx5_num_vfs",
427 unsigned long ulong_num_vfs;
429 ret = priv_get_sysfs_ulong(priv, *name, &ulong_num_vfs);
431 *num_vfs = ulong_num_vfs;
432 } while (*(++name) && ret);
440 * Pointer to private structure.
442 * MTU value output buffer.
445 * 0 on success, -1 on failure and errno is set.
448 priv_get_mtu(struct priv *priv, uint16_t *mtu)
450 unsigned long ulong_mtu;
452 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
459 * Read device counter from sysfs.
462 * Pointer to private structure.
466 * Counter output buffer.
469 * 0 on success, -1 on failure and errno is set.
472 priv_get_cntr_sysfs(struct priv *priv, const char *name, uint64_t *cntr)
474 unsigned long ulong_ctr;
476 if (priv_get_sysfs_ulong(priv, name, &ulong_ctr) == -1)
486 * Pointer to private structure.
491 * 0 on success, -1 on failure and errno is set.
494 priv_set_mtu(struct priv *priv, uint16_t mtu)
498 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
499 priv_get_mtu(priv, &new_mtu))
511 * Pointer to private structure.
513 * Bitmask for flags that must remain untouched.
515 * Bitmask for flags to modify.
518 * 0 on success, -1 on failure and errno is set.
521 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
525 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
528 tmp |= (flags & (~keep));
529 return priv_set_sysfs_ulong(priv, "flags", tmp);
533 * Ethernet device configuration.
535 * Prepare the driver for a given number of TX and RX queues.
538 * Pointer to Ethernet device structure.
541 * 0 on success, errno value on failure.
544 dev_configure(struct rte_eth_dev *dev)
546 struct priv *priv = dev->data->dev_private;
547 unsigned int rxqs_n = dev->data->nb_rx_queues;
548 unsigned int txqs_n = dev->data->nb_tx_queues;
551 unsigned int reta_idx_n;
552 const uint8_t use_app_rss_key =
553 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
555 if (use_app_rss_key &&
556 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
557 rss_hash_default_key_len)) {
558 /* MLX5 RSS only support 40bytes key. */
561 priv->rss_conf.rss_key =
562 rte_realloc(priv->rss_conf.rss_key,
563 rss_hash_default_key_len, 0);
564 if (!priv->rss_conf.rss_key) {
565 ERROR("cannot allocate RSS hash key memory (%u)", rxqs_n);
568 memcpy(priv->rss_conf.rss_key,
570 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
571 rss_hash_default_key,
572 rss_hash_default_key_len);
573 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
574 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
575 priv->rxqs = (void *)dev->data->rx_queues;
576 priv->txqs = (void *)dev->data->tx_queues;
577 if (txqs_n != priv->txqs_n) {
578 INFO("%p: TX queues number update: %u -> %u",
579 (void *)dev, priv->txqs_n, txqs_n);
580 priv->txqs_n = txqs_n;
582 if (rxqs_n > priv->config.ind_table_max_size) {
583 ERROR("cannot handle this many RX queues (%u)", rxqs_n);
586 if (rxqs_n == priv->rxqs_n)
588 INFO("%p: RX queues number update: %u -> %u",
589 (void *)dev, priv->rxqs_n, rxqs_n);
590 priv->rxqs_n = rxqs_n;
591 /* If the requested number of RX queues is not a power of two, use the
592 * maximum indirection table size for better balancing.
593 * The result is always rounded to the next power of two. */
594 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
595 priv->config.ind_table_max_size :
597 if (priv_rss_reta_index_resize(priv, reta_idx_n))
599 /* When the number of RX queues is not a power of two, the remaining
600 * table entries are padded with reused WQs and hashes are not spread
602 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
603 (*priv->reta_idx)[i] = j;
611 * DPDK callback for Ethernet device configuration.
614 * Pointer to Ethernet device structure.
617 * 0 on success, negative errno value on failure.
620 mlx5_dev_configure(struct rte_eth_dev *dev)
622 struct priv *priv = dev->data->dev_private;
626 ret = dev_configure(dev);
633 * DPDK callback to get information about the device.
636 * Pointer to Ethernet device structure.
638 * Info structure output buffer.
641 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
643 struct priv *priv = dev->data->dev_private;
644 struct mlx5_dev_config *config = &priv->config;
646 char ifname[IF_NAMESIZE];
648 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
651 /* FIXME: we should ask the device for these values. */
652 info->min_rx_bufsize = 32;
653 info->max_rx_pktlen = 65536;
655 * Since we need one CQ per QP, the limit is the minimum number
656 * between the two values.
658 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
659 priv->device_attr.orig_attr.max_qp);
660 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
663 info->max_rx_queues = max;
664 info->max_tx_queues = max;
665 info->max_mac_addrs = RTE_DIM(priv->mac);
666 info->rx_offload_capa =
668 (DEV_RX_OFFLOAD_IPV4_CKSUM |
669 DEV_RX_OFFLOAD_UDP_CKSUM |
670 DEV_RX_OFFLOAD_TCP_CKSUM) :
672 (priv->config.hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
673 DEV_RX_OFFLOAD_TIMESTAMP;
676 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
678 info->tx_offload_capa |=
679 (DEV_TX_OFFLOAD_IPV4_CKSUM |
680 DEV_TX_OFFLOAD_UDP_CKSUM |
681 DEV_TX_OFFLOAD_TCP_CKSUM);
683 info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
684 if (config->tunnel_en)
685 info->tx_offload_capa |= (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
686 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
687 DEV_TX_OFFLOAD_GRE_TNL_TSO);
688 if (priv_get_ifname(priv, &ifname) == 0)
689 info->if_index = if_nametoindex(ifname);
690 info->reta_size = priv->reta_idx_n ?
691 priv->reta_idx_n : config->ind_table_max_size;
692 info->hash_key_size = priv->rss_conf.rss_key_len;
693 info->speed_capa = priv->link_speed_capa;
698 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
700 static const uint32_t ptypes[] = {
701 /* refers to rxq_cq_to_pkt_type() */
703 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
704 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
705 RTE_PTYPE_L4_NONFRAG,
709 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
710 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
711 RTE_PTYPE_INNER_L4_NONFRAG,
712 RTE_PTYPE_INNER_L4_FRAG,
713 RTE_PTYPE_INNER_L4_TCP,
714 RTE_PTYPE_INNER_L4_UDP,
718 if (dev->rx_pkt_burst == mlx5_rx_burst ||
719 dev->rx_pkt_burst == mlx5_rx_burst_vec)
725 * DPDK callback to retrieve physical link information.
728 * Pointer to Ethernet device structure.
729 * @param wait_to_complete
730 * Wait for request completion (ignored).
733 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, int wait_to_complete)
735 struct priv *priv = dev->data->dev_private;
736 struct ethtool_cmd edata = {
737 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
740 struct rte_eth_link dev_link;
743 /* priv_lock() is not taken to allow concurrent calls. */
745 (void)wait_to_complete;
746 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
747 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
750 memset(&dev_link, 0, sizeof(dev_link));
751 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
752 (ifr.ifr_flags & IFF_RUNNING));
753 ifr.ifr_data = (void *)&edata;
754 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
755 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
759 link_speed = ethtool_cmd_speed(&edata);
760 if (link_speed == -1)
761 dev_link.link_speed = 0;
763 dev_link.link_speed = link_speed;
764 priv->link_speed_capa = 0;
765 if (edata.supported & SUPPORTED_Autoneg)
766 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
767 if (edata.supported & (SUPPORTED_1000baseT_Full |
768 SUPPORTED_1000baseKX_Full))
769 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
770 if (edata.supported & SUPPORTED_10000baseKR_Full)
771 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
772 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
773 SUPPORTED_40000baseCR4_Full |
774 SUPPORTED_40000baseSR4_Full |
775 SUPPORTED_40000baseLR4_Full))
776 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
777 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
778 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
779 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
780 ETH_LINK_SPEED_FIXED);
781 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
782 /* Link status changed. */
783 dev->data->dev_link = dev_link;
786 /* Link status is still the same. */
791 * Retrieve physical link information (unlocked version using new ioctl).
794 * Pointer to Ethernet device structure.
795 * @param wait_to_complete
796 * Wait for request completion (ignored).
799 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, int wait_to_complete)
801 struct priv *priv = dev->data->dev_private;
802 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
804 struct rte_eth_link dev_link;
807 (void)wait_to_complete;
808 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
809 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
812 memset(&dev_link, 0, sizeof(dev_link));
813 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
814 (ifr.ifr_flags & IFF_RUNNING));
815 ifr.ifr_data = (void *)&gcmd;
816 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
817 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s",
821 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
823 alignas(struct ethtool_link_settings)
824 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
825 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
826 struct ethtool_link_settings *ecmd = (void *)data;
829 ifr.ifr_data = (void *)ecmd;
830 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
831 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s",
835 dev_link.link_speed = ecmd->speed;
836 sc = ecmd->link_mode_masks[0] |
837 ((uint64_t)ecmd->link_mode_masks[1] << 32);
838 priv->link_speed_capa = 0;
839 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
840 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
841 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
842 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
843 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
844 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
845 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
846 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
847 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
848 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
849 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
850 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
851 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
852 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
853 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
854 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
855 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
856 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
857 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
858 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
859 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
860 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
861 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
862 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
863 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
864 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
865 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
866 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
867 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
868 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
869 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
870 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
871 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
872 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
873 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
874 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
875 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
876 ETH_LINK_SPEED_FIXED);
877 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
878 /* Link status changed. */
879 dev->data->dev_link = dev_link;
882 /* Link status is still the same. */
887 * DPDK callback to retrieve physical link information.
890 * Pointer to Ethernet device structure.
891 * @param wait_to_complete
892 * Wait for request completion (ignored).
895 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
897 struct utsname utsname;
900 if (uname(&utsname) == -1 ||
901 sscanf(utsname.release, "%d.%d.%d",
902 &ver[0], &ver[1], &ver[2]) != 3 ||
903 KERNEL_VERSION(ver[0], ver[1], ver[2]) < KERNEL_VERSION(4, 9, 0))
904 return mlx5_link_update_unlocked_gset(dev, wait_to_complete);
905 return mlx5_link_update_unlocked_gs(dev, wait_to_complete);
909 * DPDK callback to change the MTU.
912 * Pointer to Ethernet device structure.
917 * 0 on success, negative errno value on failure.
920 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
922 struct priv *priv = dev->data->dev_private;
927 ret = priv_get_mtu(priv, &kern_mtu);
930 /* Set kernel interface MTU first. */
931 ret = priv_set_mtu(priv, mtu);
934 ret = priv_get_mtu(priv, &kern_mtu);
937 if (kern_mtu == mtu) {
939 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
945 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
953 * DPDK callback to get flow control status.
956 * Pointer to Ethernet device structure.
957 * @param[out] fc_conf
958 * Flow control output buffer.
961 * 0 on success, negative errno value on failure.
964 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
966 struct priv *priv = dev->data->dev_private;
968 struct ethtool_pauseparam ethpause = {
969 .cmd = ETHTOOL_GPAUSEPARAM
973 ifr.ifr_data = (void *)ðpause;
975 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
977 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
983 fc_conf->autoneg = ethpause.autoneg;
984 if (ethpause.rx_pause && ethpause.tx_pause)
985 fc_conf->mode = RTE_FC_FULL;
986 else if (ethpause.rx_pause)
987 fc_conf->mode = RTE_FC_RX_PAUSE;
988 else if (ethpause.tx_pause)
989 fc_conf->mode = RTE_FC_TX_PAUSE;
991 fc_conf->mode = RTE_FC_NONE;
1001 * DPDK callback to modify flow control parameters.
1004 * Pointer to Ethernet device structure.
1005 * @param[in] fc_conf
1006 * Flow control parameters.
1009 * 0 on success, negative errno value on failure.
1012 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1014 struct priv *priv = dev->data->dev_private;
1016 struct ethtool_pauseparam ethpause = {
1017 .cmd = ETHTOOL_SPAUSEPARAM
1021 ifr.ifr_data = (void *)ðpause;
1022 ethpause.autoneg = fc_conf->autoneg;
1023 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1024 (fc_conf->mode & RTE_FC_RX_PAUSE))
1025 ethpause.rx_pause = 1;
1027 ethpause.rx_pause = 0;
1029 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1030 (fc_conf->mode & RTE_FC_TX_PAUSE))
1031 ethpause.tx_pause = 1;
1033 ethpause.tx_pause = 0;
1036 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
1038 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
1052 * Get PCI information from struct ibv_device.
1055 * Pointer to Ethernet device structure.
1056 * @param[out] pci_addr
1057 * PCI bus address output buffer.
1060 * 0 on success, -1 on failure and errno is set.
1063 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
1064 struct rte_pci_addr *pci_addr)
1068 MKSTR(path, "%s/device/uevent", device->ibdev_path);
1070 file = fopen(path, "rb");
1073 while (fgets(line, sizeof(line), file) == line) {
1074 size_t len = strlen(line);
1077 /* Truncate long lines. */
1078 if (len == (sizeof(line) - 1))
1079 while (line[(len - 1)] != '\n') {
1083 line[(len - 1)] = ret;
1085 /* Extract information. */
1088 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
1092 &pci_addr->function) == 4) {
1102 * Update the link status.
1105 * Pointer to private structure.
1108 * Zero if the callback process can be called immediately.
1111 priv_link_status_update(struct priv *priv)
1113 struct rte_eth_link *link = &priv->dev->data->dev_link;
1115 mlx5_link_update(priv->dev, 0);
1116 if (((link->link_speed == 0) && link->link_status) ||
1117 ((link->link_speed != 0) && !link->link_status)) {
1119 * Inconsistent status. Event likely occurred before the
1120 * kernel netdevice exposes the new status.
1122 if (!priv->pending_alarm) {
1123 priv->pending_alarm = 1;
1124 rte_eal_alarm_set(MLX5_ALARM_TIMEOUT_US,
1125 mlx5_dev_link_status_handler,
1129 } else if (unlikely(priv->pending_alarm)) {
1130 /* Link interrupt occurred while alarm is already scheduled. */
1131 priv->pending_alarm = 0;
1132 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, priv->dev);
1138 * Device status handler.
1141 * Pointer to private structure.
1143 * Pointer to event flags holder.
1146 * Events bitmap of callback process which can be called immediately.
1149 priv_dev_status_handler(struct priv *priv)
1151 struct ibv_async_event event;
1154 /* Read all message and acknowledge them. */
1156 if (ibv_get_async_event(priv->ctx, &event))
1158 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
1159 event.event_type == IBV_EVENT_PORT_ERR) &&
1160 (priv->dev->data->dev_conf.intr_conf.lsc == 1))
1161 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
1162 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
1163 priv->dev->data->dev_conf.intr_conf.rmv == 1)
1164 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
1166 DEBUG("event type %d on port %d not handled",
1167 event.event_type, event.element.port_num);
1168 ibv_ack_async_event(&event);
1170 if (ret & (1 << RTE_ETH_EVENT_INTR_LSC))
1171 if (priv_link_status_update(priv))
1172 ret &= ~(1 << RTE_ETH_EVENT_INTR_LSC);
1177 * Handle delayed link status event.
1180 * Registered argument.
1183 mlx5_dev_link_status_handler(void *arg)
1185 struct rte_eth_dev *dev = arg;
1186 struct priv *priv = dev->data->dev_private;
1190 assert(priv->pending_alarm == 1);
1191 priv->pending_alarm = 0;
1192 ret = priv_link_status_update(priv);
1195 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
1200 * Handle interrupts from the NIC.
1202 * @param[in] intr_handle
1203 * Interrupt handler.
1205 * Callback argument.
1208 mlx5_dev_interrupt_handler(void *cb_arg)
1210 struct rte_eth_dev *dev = cb_arg;
1211 struct priv *priv = dev->data->dev_private;
1215 events = priv_dev_status_handler(priv);
1217 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
1218 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
1220 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
1221 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL,
1226 * Handle interrupts from the socket.
1229 * Callback argument.
1232 mlx5_dev_handler_socket(void *cb_arg)
1234 struct rte_eth_dev *dev = cb_arg;
1235 struct priv *priv = dev->data->dev_private;
1238 priv_socket_handle(priv);
1243 * Uninstall interrupt handler.
1246 * Pointer to private structure.
1248 * Pointer to the rte_eth_dev structure.
1251 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
1253 if (dev->data->dev_conf.intr_conf.lsc ||
1254 dev->data->dev_conf.intr_conf.rmv)
1255 rte_intr_callback_unregister(&priv->intr_handle,
1256 mlx5_dev_interrupt_handler, dev);
1257 if (priv->primary_socket)
1258 rte_intr_callback_unregister(&priv->intr_handle_socket,
1259 mlx5_dev_handler_socket, dev);
1260 if (priv->pending_alarm)
1261 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, dev);
1262 priv->pending_alarm = 0;
1263 priv->intr_handle.fd = 0;
1264 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1265 priv->intr_handle_socket.fd = 0;
1266 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1270 * Install interrupt handler.
1273 * Pointer to private structure.
1275 * Pointer to the rte_eth_dev structure.
1278 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
1282 assert(priv->ctx->async_fd > 0);
1283 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1284 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1286 INFO("failed to change file descriptor async event queue");
1287 dev->data->dev_conf.intr_conf.lsc = 0;
1288 dev->data->dev_conf.intr_conf.rmv = 0;
1290 if (dev->data->dev_conf.intr_conf.lsc ||
1291 dev->data->dev_conf.intr_conf.rmv) {
1292 priv->intr_handle.fd = priv->ctx->async_fd;
1293 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1294 rte_intr_callback_register(&priv->intr_handle,
1295 mlx5_dev_interrupt_handler, dev);
1298 rc = priv_socket_init(priv);
1299 if (!rc && priv->primary_socket) {
1300 priv->intr_handle_socket.fd = priv->primary_socket;
1301 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1302 rte_intr_callback_register(&priv->intr_handle_socket,
1303 mlx5_dev_handler_socket, dev);
1308 * Change the link state (UP / DOWN).
1311 * Pointer to private data structure.
1313 * Pointer to rte_eth_dev structure.
1315 * Nonzero for link up, otherwise link down.
1318 * 0 on success, errno value on failure.
1321 priv_dev_set_link(struct priv *priv, struct rte_eth_dev *dev, int up)
1326 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
1329 dev->tx_pkt_burst = priv_select_tx_function(priv, dev);
1330 dev->rx_pkt_burst = priv_select_rx_function(priv, dev);
1332 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
1335 dev->rx_pkt_burst = removed_rx_burst;
1336 dev->tx_pkt_burst = removed_tx_burst;
1342 * DPDK callback to bring the link DOWN.
1345 * Pointer to Ethernet device structure.
1348 * 0 on success, errno value on failure.
1351 mlx5_set_link_down(struct rte_eth_dev *dev)
1353 struct priv *priv = dev->data->dev_private;
1357 err = priv_dev_set_link(priv, dev, 0);
1363 * DPDK callback to bring the link UP.
1366 * Pointer to Ethernet device structure.
1369 * 0 on success, errno value on failure.
1372 mlx5_set_link_up(struct rte_eth_dev *dev)
1374 struct priv *priv = dev->data->dev_private;
1378 err = priv_dev_set_link(priv, dev, 1);
1384 * Configure the TX function to use.
1387 * Pointer to private data structure.
1389 * Pointer to rte_eth_dev structure.
1392 * Pointer to selected Tx burst function.
1395 priv_select_tx_function(struct priv *priv, __rte_unused struct rte_eth_dev *dev)
1397 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1398 struct mlx5_dev_config *config = &priv->config;
1400 assert(priv != NULL);
1401 /* Select appropriate TX function. */
1402 if (config->mps == MLX5_MPW_ENHANCED) {
1403 if (priv_check_vec_tx_support(priv) > 0) {
1404 if (priv_check_raw_vec_tx_support(priv) > 0)
1405 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1407 tx_pkt_burst = mlx5_tx_burst_vec;
1408 DEBUG("selected Enhanced MPW TX vectorized function");
1410 tx_pkt_burst = mlx5_tx_burst_empw;
1411 DEBUG("selected Enhanced MPW TX function");
1413 } else if (config->mps && (config->txq_inline > 0)) {
1414 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1415 DEBUG("selected MPW inline TX function");
1416 } else if (config->mps) {
1417 tx_pkt_burst = mlx5_tx_burst_mpw;
1418 DEBUG("selected MPW TX function");
1420 return tx_pkt_burst;
1424 * Configure the RX function to use.
1427 * Pointer to private data structure.
1429 * Pointer to rte_eth_dev structure.
1432 * Pointer to selected Rx burst function.
1435 priv_select_rx_function(struct priv *priv, __rte_unused struct rte_eth_dev *dev)
1437 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1439 assert(priv != NULL);
1440 if (priv_check_vec_rx_support(priv) > 0) {
1441 rx_pkt_burst = mlx5_rx_burst_vec;
1442 DEBUG("selected RX vectorized function");
1444 return rx_pkt_burst;