drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 291                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 295                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_GRE,
 299                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 307                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 311                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317         {
 318                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 319                 .ptype = RTE_PTYPE_TUNNEL_IP,
 320         },
 321 };
 322
 323 /**
 324  * Translate tag ID to register.
 325  *
 326  * @param[in] dev
 327  *   Pointer to the Ethernet device structure.
 328  * @param[in] feature
 329  *   The feature that request the register.
 330  * @param[in] id
 331  *   The request register ID.
 332  * @param[out] error
 333  *   Error description in case of any.
 334  *
 335  * @return
 336  *   The request register on success, a negative errno
 337  *   value otherwise and rte_errno is set.
 338  */
 339 enum modify_reg
 340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 341                      enum mlx5_feature_name feature,
 342                      uint32_t id,
 343                      struct rte_flow_error *error)
 344 {
 345         struct mlx5_priv *priv = dev->data->dev_private;
 346         struct mlx5_dev_config *config = &priv->config;
 347
 348         switch (feature) {
 349         case MLX5_HAIRPIN_RX:
 350                 return REG_B;
 351         case MLX5_HAIRPIN_TX:
 352                 return REG_A;
 353         case MLX5_METADATA_RX:
 354                 switch (config->dv_xmeta_en) {
 355                 case MLX5_XMETA_MODE_LEGACY:
 356                         return REG_B;
 357                 case MLX5_XMETA_MODE_META16:
 358                         return REG_C_0;
 359                 case MLX5_XMETA_MODE_META32:
 360                         return REG_C_1;
 361                 }
 362                 break;
 363         case MLX5_METADATA_TX:
 364                 return REG_A;
 365         case MLX5_METADATA_FDB:
 366                 return REG_C_0;
 367         case MLX5_FLOW_MARK:
 368                 switch (config->dv_xmeta_en) {
 369                 case MLX5_XMETA_MODE_LEGACY:
 370                         return REG_NONE;
 371                 case MLX5_XMETA_MODE_META16:
 372                         return REG_C_1;
 373                 case MLX5_XMETA_MODE_META32:
 374                         return REG_C_0;
 375                 }
 376                 break;
 377         case MLX5_COPY_MARK:
 378                 return REG_C_3;
 379         case MLX5_APP_TAG:
 380                 /*
 381                  * Suppose engaging reg_c_2 .. reg_c_7 registers.
 382                  * reg_c_2 is reserved for coloring by meters.
 383                  * reg_c_3 is reserved for split flows TAG.
 384                  */
 385                 if (id > (REG_C_7 - REG_C_4))
 386                         return rte_flow_error_set
 387                                         (error, EINVAL,
 388                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 389                                          NULL, "invalid tag id");
 390                 if (config->flow_mreg_c[id + REG_C_4 - REG_C_0] == REG_NONE)
 391                         return rte_flow_error_set
 392                                         (error, ENOTSUP,
 393                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 394                                          NULL, "unsupported tag id");
 395                 return config->flow_mreg_c[id + REG_C_4 - REG_C_0];
 396         }
 397         assert(false);
 398         return rte_flow_error_set(error, EINVAL,
 399                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 400                                   NULL, "invalid feature name");
 401 }
 402
 403 /**
 404  * Check extensive flow metadata register support.
 405  *
 406  * @param dev
 407  *   Pointer to rte_eth_dev structure.
 408  *
 409  * @return
 410  *   True if device supports extensive flow metadata register, otherwise false.
 411  */
 412 bool
 413 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 414 {
 415         struct mlx5_priv *priv = dev->data->dev_private;
 416         struct mlx5_dev_config *config = &priv->config;
 417
 418         /*
 419          * Having available reg_c can be regarded inclusively as supporting
 420          * extensive flow metadata register, which could mean,
 421          * - metadata register copy action by modify header.
 422          * - 16 modify header actions is supported.
 423          * - reg_c's are preserved across different domain (FDB and NIC) on
 424          *   packet loopback by flow lookup miss.
 425          */
 426         return config->flow_mreg_c[2] != REG_NONE;
 427 }
 428
 429 /**
 430  * Discover the maximum number of priority available.
 431  *
 432  * @param[in] dev
 433  *   Pointer to the Ethernet device structure.
 434  *
 435  * @return
 436  *   number of supported flow priority on success, a negative errno
 437  *   value otherwise and rte_errno is set.
 438  */
 439 int
 440 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 441 {
 442         struct mlx5_priv *priv = dev->data->dev_private;
 443         struct {
 444                 struct ibv_flow_attr attr;
 445                 struct ibv_flow_spec_eth eth;
 446                 struct ibv_flow_spec_action_drop drop;
 447         } flow_attr = {
 448                 .attr = {
 449                         .num_of_specs = 2,
 450                         .port = (uint8_t)priv->ibv_port,
 451                 },
 452                 .eth = {
 453                         .type = IBV_FLOW_SPEC_ETH,
 454                         .size = sizeof(struct ibv_flow_spec_eth),
 455                 },
 456                 .drop = {
 457                         .size = sizeof(struct ibv_flow_spec_action_drop),
 458                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 459                 },
 460         };
 461         struct ibv_flow *flow;
 462         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 463         uint16_t vprio[] = { 8, 16 };
 464         int i;
 465         int priority = 0;
 466
 467         if (!drop) {
 468                 rte_errno = ENOTSUP;
 469                 return -rte_errno;
 470         }
 471         for (i = 0; i != RTE_DIM(vprio); i++) {
 472                 flow_attr.attr.priority = vprio[i] - 1;
 473                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 474                 if (!flow)
 475                         break;
 476                 claim_zero(mlx5_glue->destroy_flow(flow));
 477                 priority = vprio[i];
 478         }
 479         mlx5_hrxq_drop_release(dev);
 480         switch (priority) {
 481         case 8:
 482                 priority = RTE_DIM(priority_map_3);
 483                 break;
 484         case 16:
 485                 priority = RTE_DIM(priority_map_5);
 486                 break;
 487         default:
 488                 rte_errno = ENOTSUP;
 489                 DRV_LOG(ERR,
 490                         "port %u verbs maximum priority: %d expected 8/16",
 491                         dev->data->port_id, priority);
 492                 return -rte_errno;
 493         }
 494         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 495                 dev->data->port_id, priority);
 496         return priority;
 497 }
 498
 499 /**
 500  * Adjust flow priority based on the highest layer and the request priority.
 501  *
 502  * @param[in] dev
 503  *   Pointer to the Ethernet device structure.
 504  * @param[in] priority
 505  *   The rule base priority.
 506  * @param[in] subpriority
 507  *   The priority based on the items.
 508  *
 509  * @return
 510  *   The new priority.
 511  */
 512 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 513                                    uint32_t subpriority)
 514 {
 515         uint32_t res = 0;
 516         struct mlx5_priv *priv = dev->data->dev_private;
 517
 518         switch (priv->config.flow_prio) {
 519         case RTE_DIM(priority_map_3):
 520                 res = priority_map_3[priority][subpriority];
 521                 break;
 522         case RTE_DIM(priority_map_5):
 523                 res = priority_map_5[priority][subpriority];
 524                 break;
 525         }
 526         return  res;
 527 }
 528
 529 /**
 530  * Verify the @p item specifications (spec, last, mask) are compatible with the
 531  * NIC capabilities.
 532  *
 533  * @param[in] item
 534  *   Item specification.
 535  * @param[in] mask
 536  *   @p item->mask or flow default bit-masks.
 537  * @param[in] nic_mask
 538  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 539  * @param[in] size
 540  *   Bit-masks size in bytes.
 541  * @param[out] error
 542  *   Pointer to error structure.
 543  *
 544  * @return
 545  *   0 on success, a negative errno value otherwise and rte_errno is set.
 546  */
 547 int
 548 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 549                           const uint8_t *mask,
 550                           const uint8_t *nic_mask,
 551                           unsigned int size,
 552                           struct rte_flow_error *error)
 553 {
 554         unsigned int i;
 555
 556         assert(nic_mask);
 557         for (i = 0; i < size; ++i)
 558                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 559                         return rte_flow_error_set(error, ENOTSUP,
 560                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 561                                                   item,
 562                                                   "mask enables non supported"
 563                                                   " bits");
 564         if (!item->spec && (item->mask || item->last))
 565                 return rte_flow_error_set(error, EINVAL,
 566                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 567                                           "mask/last without a spec is not"
 568                                           " supported");
 569         if (item->spec && item->last) {
 570                 uint8_t spec[size];
 571                 uint8_t last[size];
 572                 unsigned int i;
 573                 int ret;
 574
 575                 for (i = 0; i < size; ++i) {
 576                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 577                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 578                 }
 579                 ret = memcmp(spec, last, size);
 580                 if (ret != 0)
 581                         return rte_flow_error_set(error, EINVAL,
 582                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 583                                                   item,
 584                                                   "range is not valid");
 585         }
 586         return 0;
 587 }
 588
 589 /**
 590  * Adjust the hash fields according to the @p flow information.
 591  *
 592  * @param[in] dev_flow.
 593  *   Pointer to the mlx5_flow.
 594  * @param[in] tunnel
 595  *   1 when the hash field is for a tunnel item.
 596  * @param[in] layer_types
 597  *   ETH_RSS_* types.
 598  * @param[in] hash_fields
 599  *   Item hash fields.
 600  *
 601  * @return
 602  *   The hash fields that should be used.
 603  */
 604 uint64_t
 605 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 606                             int tunnel __rte_unused, uint64_t layer_types,
 607                             uint64_t hash_fields)
 608 {
 609         struct rte_flow *flow = dev_flow->flow;
 610 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 611         int rss_request_inner = flow->rss.level >= 2;
 612
 613         /* Check RSS hash level for tunnel. */
 614         if (tunnel && rss_request_inner)
 615                 hash_fields |= IBV_RX_HASH_INNER;
 616         else if (tunnel || rss_request_inner)
 617                 return 0;
 618 #endif
 619         /* Check if requested layer matches RSS hash fields. */
 620         if (!(flow->rss.types & layer_types))
 621                 return 0;
 622         return hash_fields;
 623 }
 624
 625 /**
 626  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 627  * if several tunnel rules are used on this queue, the tunnel ptype will be
 628  * cleared.
 629  *
 630  * @param rxq_ctrl
 631  *   Rx queue to update.
 632  */
 633 static void
 634 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 635 {
 636         unsigned int i;
 637         uint32_t tunnel_ptype = 0;
 638
 639         /* Look up for the ptype to use. */
 640         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 641                 if (!rxq_ctrl->flow_tunnels_n[i])
 642                         continue;
 643                 if (!tunnel_ptype) {
 644                         tunnel_ptype = tunnels_info[i].ptype;
 645                 } else {
 646                         tunnel_ptype = 0;
 647                         break;
 648                 }
 649         }
 650         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 651 }
 652
 653 /**
 654  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 655  * flow.
 656  *
 657  * @param[in] dev
 658  *   Pointer to the Ethernet device structure.
 659  * @param[in] dev_flow
 660  *   Pointer to device flow structure.
 661  */
 662 static void
 663 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 664 {
 665         struct mlx5_priv *priv = dev->data->dev_private;
 666         struct rte_flow *flow = dev_flow->flow;
 667         const int mark = !!(dev_flow->actions &
 668                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 669         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 670         unsigned int i;
 671
 672         for (i = 0; i != flow->rss.queue_num; ++i) {
 673                 int idx = (*flow->rss.queue)[i];
 674                 struct mlx5_rxq_ctrl *rxq_ctrl =
 675                         container_of((*priv->rxqs)[idx],
 676                                      struct mlx5_rxq_ctrl, rxq);
 677
 678                 if (mark) {
 679                         rxq_ctrl->rxq.mark = 1;
 680                         rxq_ctrl->flow_mark_n++;
 681                 }
 682                 if (tunnel) {
 683                         unsigned int j;
 684
 685                         /* Increase the counter matching the flow. */
 686                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 687                                 if ((tunnels_info[j].tunnel &
 688                                      dev_flow->layers) ==
 689                                     tunnels_info[j].tunnel) {
 690                                         rxq_ctrl->flow_tunnels_n[j]++;
 691                                         break;
 692                                 }
 693                         }
 694                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 695                 }
 696         }
 697 }
 698
 699 /**
 700  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 701  *
 702  * @param[in] dev
 703  *   Pointer to the Ethernet device structure.
 704  * @param[in] flow
 705  *   Pointer to flow structure.
 706  */
 707 static void
 708 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 709 {
 710         struct mlx5_flow *dev_flow;
 711
 712         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 713                 flow_drv_rxq_flags_set(dev, dev_flow);
 714 }
 715
 716 /**
 717  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 718  * device flow if no other flow uses it with the same kind of request.
 719  *
 720  * @param dev
 721  *   Pointer to Ethernet device.
 722  * @param[in] dev_flow
 723  *   Pointer to the device flow.
 724  */
 725 static void
 726 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 727 {
 728         struct mlx5_priv *priv = dev->data->dev_private;
 729         struct rte_flow *flow = dev_flow->flow;
 730         const int mark = !!(dev_flow->actions &
 731                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 732         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 733         unsigned int i;
 734
 735         assert(dev->data->dev_started);
 736         for (i = 0; i != flow->rss.queue_num; ++i) {
 737                 int idx = (*flow->rss.queue)[i];
 738                 struct mlx5_rxq_ctrl *rxq_ctrl =
 739                         container_of((*priv->rxqs)[idx],
 740                                      struct mlx5_rxq_ctrl, rxq);
 741
 742                 if (mark) {
 743                         rxq_ctrl->flow_mark_n--;
 744                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 745                 }
 746                 if (tunnel) {
 747                         unsigned int j;
 748
 749                         /* Decrease the counter matching the flow. */
 750                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 751                                 if ((tunnels_info[j].tunnel &
 752                                      dev_flow->layers) ==
 753                                     tunnels_info[j].tunnel) {
 754                                         rxq_ctrl->flow_tunnels_n[j]--;
 755                                         break;
 756                                 }
 757                         }
 758                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 759                 }
 760         }
 761 }
 762
 763 /**
 764  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 765  * @p flow if no other flow uses it with the same kind of request.
 766  *
 767  * @param dev
 768  *   Pointer to Ethernet device.
 769  * @param[in] flow
 770  *   Pointer to the flow.
 771  */
 772 static void
 773 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 774 {
 775         struct mlx5_flow *dev_flow;
 776
 777         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 778                 flow_drv_rxq_flags_trim(dev, dev_flow);
 779 }
 780
 781 /**
 782  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 783  *
 784  * @param dev
 785  *   Pointer to Ethernet device.
 786  */
 787 static void
 788 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 789 {
 790         struct mlx5_priv *priv = dev->data->dev_private;
 791         unsigned int i;
 792
 793         for (i = 0; i != priv->rxqs_n; ++i) {
 794                 struct mlx5_rxq_ctrl *rxq_ctrl;
 795                 unsigned int j;
 796
 797                 if (!(*priv->rxqs)[i])
 798                         continue;
 799                 rxq_ctrl = container_of((*priv->rxqs)[i],
 800                                         struct mlx5_rxq_ctrl, rxq);
 801                 rxq_ctrl->flow_mark_n = 0;
 802                 rxq_ctrl->rxq.mark = 0;
 803                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 804                         rxq_ctrl->flow_tunnels_n[j] = 0;
 805                 rxq_ctrl->rxq.tunnel = 0;
 806         }
 807 }
 808
 809 /*
 810  * return a pointer to the desired action in the list of actions.
 811  *
 812  * @param[in] actions
 813  *   The list of actions to search the action in.
 814  * @param[in] action
 815  *   The action to find.
 816  *
 817  * @return
 818  *   Pointer to the action in the list, if found. NULL otherwise.
 819  */
 820 const struct rte_flow_action *
 821 mlx5_flow_find_action(const struct rte_flow_action *actions,
 822                       enum rte_flow_action_type action)
 823 {
 824         if (actions == NULL)
 825                 return NULL;
 826         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 827                 if (actions->type == action)
 828                         return actions;
 829         return NULL;
 830 }
 831
 832 /*
 833  * Validate the flag action.
 834  *
 835  * @param[in] action_flags
 836  *   Bit-fields that holds the actions detected until now.
 837  * @param[in] attr
 838  *   Attributes of flow that includes this action.
 839  * @param[out] error
 840  *   Pointer to error structure.
 841  *
 842  * @return
 843  *   0 on success, a negative errno value otherwise and rte_errno is set.
 844  */
 845 int
 846 mlx5_flow_validate_action_flag(uint64_t action_flags,
 847                                const struct rte_flow_attr *attr,
 848                                struct rte_flow_error *error)
 849 {
 850
 851         if (action_flags & MLX5_FLOW_ACTION_DROP)
 852                 return rte_flow_error_set(error, EINVAL,
 853                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 854                                           "can't drop and flag in same flow");
 855         if (action_flags & MLX5_FLOW_ACTION_MARK)
 856                 return rte_flow_error_set(error, EINVAL,
 857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 858                                           "can't mark and flag in same flow");
 859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 860                 return rte_flow_error_set(error, EINVAL,
 861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 862                                           "can't have 2 flag"
 863                                           " actions in same flow");
 864         if (attr->egress)
 865                 return rte_flow_error_set(error, ENOTSUP,
 866                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 867                                           "flag action not supported for "
 868                                           "egress");
 869         return 0;
 870 }
 871
 872 /*
 873  * Validate the mark action.
 874  *
 875  * @param[in] action
 876  *   Pointer to the queue action.
 877  * @param[in] action_flags
 878  *   Bit-fields that holds the actions detected until now.
 879  * @param[in] attr
 880  *   Attributes of flow that includes this action.
 881  * @param[out] error
 882  *   Pointer to error structure.
 883  *
 884  * @return
 885  *   0 on success, a negative errno value otherwise and rte_errno is set.
 886  */
 887 int
 888 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 889                                uint64_t action_flags,
 890                                const struct rte_flow_attr *attr,
 891                                struct rte_flow_error *error)
 892 {
 893         const struct rte_flow_action_mark *mark = action->conf;
 894
 895         if (!mark)
 896                 return rte_flow_error_set(error, EINVAL,
 897                                           RTE_FLOW_ERROR_TYPE_ACTION,
 898                                           action,
 899                                           "configuration cannot be null");
 900         if (mark->id >= MLX5_FLOW_MARK_MAX)
 901                 return rte_flow_error_set(error, EINVAL,
 902                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 903                                           &mark->id,
 904                                           "mark id must in 0 <= id < "
 905                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 906         if (action_flags & MLX5_FLOW_ACTION_DROP)
 907                 return rte_flow_error_set(error, EINVAL,
 908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 909                                           "can't drop and mark in same flow");
 910         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 911                 return rte_flow_error_set(error, EINVAL,
 912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 913                                           "can't flag and mark in same flow");
 914         if (action_flags & MLX5_FLOW_ACTION_MARK)
 915                 return rte_flow_error_set(error, EINVAL,
 916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 917                                           "can't have 2 mark actions in same"
 918                                           " flow");
 919         if (attr->egress)
 920                 return rte_flow_error_set(error, ENOTSUP,
 921                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 922                                           "mark action not supported for "
 923                                           "egress");
 924         return 0;
 925 }
 926
 927 /*
 928  * Validate the drop action.
 929  *
 930  * @param[in] action_flags
 931  *   Bit-fields that holds the actions detected until now.
 932  * @param[in] attr
 933  *   Attributes of flow that includes this action.
 934  * @param[out] error
 935  *   Pointer to error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 int
 941 mlx5_flow_validate_action_drop(uint64_t action_flags,
 942                                const struct rte_flow_attr *attr,
 943                                struct rte_flow_error *error)
 944 {
 945         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 946                 return rte_flow_error_set(error, EINVAL,
 947                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 948                                           "can't drop and flag in same flow");
 949         if (action_flags & MLX5_FLOW_ACTION_MARK)
 950                 return rte_flow_error_set(error, EINVAL,
 951                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 952                                           "can't drop and mark in same flow");
 953         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
 954                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
 955                 return rte_flow_error_set(error, EINVAL,
 956                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 957                                           "can't have 2 fate actions in"
 958                                           " same flow");
 959         if (attr->egress)
 960                 return rte_flow_error_set(error, ENOTSUP,
 961                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 962                                           "drop action not supported for "
 963                                           "egress");
 964         return 0;
 965 }
 966
 967 /*
 968  * Validate the queue action.
 969  *
 970  * @param[in] action
 971  *   Pointer to the queue action.
 972  * @param[in] action_flags
 973  *   Bit-fields that holds the actions detected until now.
 974  * @param[in] dev
 975  *   Pointer to the Ethernet device structure.
 976  * @param[in] attr
 977  *   Attributes of flow that includes this action.
 978  * @param[out] error
 979  *   Pointer to error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 int
 985 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
 986                                 uint64_t action_flags,
 987                                 struct rte_eth_dev *dev,
 988                                 const struct rte_flow_attr *attr,
 989                                 struct rte_flow_error *error)
 990 {
 991         struct mlx5_priv *priv = dev->data->dev_private;
 992         const struct rte_flow_action_queue *queue = action->conf;
 993
 994         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 995                 return rte_flow_error_set(error, EINVAL,
 996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 997                                           "can't have 2 fate actions in"
 998                                           " same flow");
 999         if (!priv->rxqs_n)
1000                 return rte_flow_error_set(error, EINVAL,
1001                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1002                                           NULL, "No Rx queues configured");
1003         if (queue->index >= priv->rxqs_n)
1004                 return rte_flow_error_set(error, EINVAL,
1005                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1006                                           &queue->index,
1007                                           "queue index out of range");
1008         if (!(*priv->rxqs)[queue->index])
1009                 return rte_flow_error_set(error, EINVAL,
1010                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1011                                           &queue->index,
1012                                           "queue is not configured");
1013         if (attr->egress)
1014                 return rte_flow_error_set(error, ENOTSUP,
1015                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1016                                           "queue action not supported for "
1017                                           "egress");
1018         return 0;
1019 }
1020
1021 /*
1022  * Validate the rss action.
1023  *
1024  * @param[in] action
1025  *   Pointer to the queue action.
1026  * @param[in] action_flags
1027  *   Bit-fields that holds the actions detected until now.
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] attr
1031  *   Attributes of flow that includes this action.
1032  * @param[in] item_flags
1033  *   Items that were detected.
1034  * @param[out] error
1035  *   Pointer to error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 int
1041 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1042                               uint64_t action_flags,
1043                               struct rte_eth_dev *dev,
1044                               const struct rte_flow_attr *attr,
1045                               uint64_t item_flags,
1046                               struct rte_flow_error *error)
1047 {
1048         struct mlx5_priv *priv = dev->data->dev_private;
1049         const struct rte_flow_action_rss *rss = action->conf;
1050         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1051         unsigned int i;
1052
1053         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1054                 return rte_flow_error_set(error, EINVAL,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1056                                           "can't have 2 fate actions"
1057                                           " in same flow");
1058         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1059             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1060                 return rte_flow_error_set(error, ENOTSUP,
1061                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1062                                           &rss->func,
1063                                           "RSS hash function not supported");
1064 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1065         if (rss->level > 2)
1066 #else
1067         if (rss->level > 1)
1068 #endif
1069                 return rte_flow_error_set(error, ENOTSUP,
1070                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1071                                           &rss->level,
1072                                           "tunnel RSS is not supported");
1073         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1074         if (rss->key_len == 0 && rss->key != NULL)
1075                 return rte_flow_error_set(error, ENOTSUP,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           &rss->key_len,
1078                                           "RSS hash key length 0");
1079         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1080                 return rte_flow_error_set(error, ENOTSUP,
1081                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1082                                           &rss->key_len,
1083                                           "RSS hash key too small");
1084         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1085                 return rte_flow_error_set(error, ENOTSUP,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1087                                           &rss->key_len,
1088                                           "RSS hash key too large");
1089         if (rss->queue_num > priv->config.ind_table_max_size)
1090                 return rte_flow_error_set(error, ENOTSUP,
1091                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1092                                           &rss->queue_num,
1093                                           "number of queues too large");
1094         if (rss->types & MLX5_RSS_HF_MASK)
1095                 return rte_flow_error_set(error, ENOTSUP,
1096                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1097                                           &rss->types,
1098                                           "some RSS protocols are not"
1099                                           " supported");
1100         if (!priv->rxqs_n)
1101                 return rte_flow_error_set(error, EINVAL,
1102                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1103                                           NULL, "No Rx queues configured");
1104         if (!rss->queue_num)
1105                 return rte_flow_error_set(error, EINVAL,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107                                           NULL, "No queues configured");
1108         for (i = 0; i != rss->queue_num; ++i) {
1109                 if (!(*priv->rxqs)[rss->queue[i]])
1110                         return rte_flow_error_set
1111                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1112                                  &rss->queue[i], "queue is not configured");
1113         }
1114         if (attr->egress)
1115                 return rte_flow_error_set(error, ENOTSUP,
1116                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1117                                           "rss action not supported for "
1118                                           "egress");
1119         if (rss->level > 1 &&  !tunnel)
1120                 return rte_flow_error_set(error, EINVAL,
1121                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1122                                           "inner RSS is not supported for "
1123                                           "non-tunnel flows");
1124         return 0;
1125 }
1126
1127 /*
1128  * Validate the count action.
1129  *
1130  * @param[in] dev
1131  *   Pointer to the Ethernet device structure.
1132  * @param[in] attr
1133  *   Attributes of flow that includes this action.
1134  * @param[out] error
1135  *   Pointer to error structure.
1136  *
1137  * @return
1138  *   0 on success, a negative errno value otherwise and rte_errno is set.
1139  */
1140 int
1141 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1142                                 const struct rte_flow_attr *attr,
1143                                 struct rte_flow_error *error)
1144 {
1145         if (attr->egress)
1146                 return rte_flow_error_set(error, ENOTSUP,
1147                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1148                                           "count action not supported for "
1149                                           "egress");
1150         return 0;
1151 }
1152
1153 /**
1154  * Verify the @p attributes will be correctly understood by the NIC and store
1155  * them in the @p flow if everything is correct.
1156  *
1157  * @param[in] dev
1158  *   Pointer to the Ethernet device structure.
1159  * @param[in] attributes
1160  *   Pointer to flow attributes
1161  * @param[out] error
1162  *   Pointer to error structure.
1163  *
1164  * @return
1165  *   0 on success, a negative errno value otherwise and rte_errno is set.
1166  */
1167 int
1168 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1169                               const struct rte_flow_attr *attributes,
1170                               struct rte_flow_error *error)
1171 {
1172         struct mlx5_priv *priv = dev->data->dev_private;
1173         uint32_t priority_max = priv->config.flow_prio - 1;
1174
1175         if (attributes->group)
1176                 return rte_flow_error_set(error, ENOTSUP,
1177                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1178                                           NULL, "groups is not supported");
1179         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1180             attributes->priority >= priority_max)
1181                 return rte_flow_error_set(error, ENOTSUP,
1182                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1183                                           NULL, "priority out of range");
1184         if (attributes->egress)
1185                 return rte_flow_error_set(error, ENOTSUP,
1186                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1187                                           "egress is not supported");
1188         if (attributes->transfer && !priv->config.dv_esw_en)
1189                 return rte_flow_error_set(error, ENOTSUP,
1190                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1191                                           NULL, "transfer is not supported");
1192         if (!attributes->ingress)
1193                 return rte_flow_error_set(error, EINVAL,
1194                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1195                                           NULL,
1196                                           "ingress attribute is mandatory");
1197         return 0;
1198 }
1199
1200 /**
1201  * Validate ICMP6 item.
1202  *
1203  * @param[in] item
1204  *   Item specification.
1205  * @param[in] item_flags
1206  *   Bit-fields that holds the items detected until now.
1207  * @param[out] error
1208  *   Pointer to error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 int
1214 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1215                                uint64_t item_flags,
1216                                uint8_t target_protocol,
1217                                struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_item_icmp6 *mask = item->mask;
1220         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1221         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1222                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1223         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1224                                       MLX5_FLOW_LAYER_OUTER_L4;
1225         int ret;
1226
1227         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1228                 return rte_flow_error_set(error, EINVAL,
1229                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1230                                           "protocol filtering not compatible"
1231                                           " with ICMP6 layer");
1232         if (!(item_flags & l3m))
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1235                                           "IPv6 is mandatory to filter on"
1236                                           " ICMP6");
1237         if (item_flags & l4m)
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1240                                           "multiple L4 layers not supported");
1241         if (!mask)
1242                 mask = &rte_flow_item_icmp6_mask;
1243         ret = mlx5_flow_item_acceptable
1244                 (item, (const uint8_t *)mask,
1245                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1246                  sizeof(struct rte_flow_item_icmp6), error);
1247         if (ret < 0)
1248                 return ret;
1249         return 0;
1250 }
1251
1252 /**
1253  * Validate ICMP item.
1254  *
1255  * @param[in] item
1256  *   Item specification.
1257  * @param[in] item_flags
1258  *   Bit-fields that holds the items detected until now.
1259  * @param[out] error
1260  *   Pointer to error structure.
1261  *
1262  * @return
1263  *   0 on success, a negative errno value otherwise and rte_errno is set.
1264  */
1265 int
1266 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1267                              uint64_t item_flags,
1268                              uint8_t target_protocol,
1269                              struct rte_flow_error *error)
1270 {
1271         const struct rte_flow_item_icmp *mask = item->mask;
1272         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1273         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1274                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1275         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1276                                       MLX5_FLOW_LAYER_OUTER_L4;
1277         int ret;
1278
1279         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1280                 return rte_flow_error_set(error, EINVAL,
1281                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1282                                           "protocol filtering not compatible"
1283                                           " with ICMP layer");
1284         if (!(item_flags & l3m))
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1287                                           "IPv4 is mandatory to filter"
1288                                           " on ICMP");
1289         if (item_flags & l4m)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1292                                           "multiple L4 layers not supported");
1293         if (!mask)
1294                 mask = &rte_flow_item_icmp_mask;
1295         ret = mlx5_flow_item_acceptable
1296                 (item, (const uint8_t *)mask,
1297                  (const uint8_t *)&rte_flow_item_icmp_mask,
1298                  sizeof(struct rte_flow_item_icmp), error);
1299         if (ret < 0)
1300                 return ret;
1301         return 0;
1302 }
1303
1304 /**
1305  * Validate Ethernet item.
1306  *
1307  * @param[in] item
1308  *   Item specification.
1309  * @param[in] item_flags
1310  *   Bit-fields that holds the items detected until now.
1311  * @param[out] error
1312  *   Pointer to error structure.
1313  *
1314  * @return
1315  *   0 on success, a negative errno value otherwise and rte_errno is set.
1316  */
1317 int
1318 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1319                             uint64_t item_flags,
1320                             struct rte_flow_error *error)
1321 {
1322         const struct rte_flow_item_eth *mask = item->mask;
1323         const struct rte_flow_item_eth nic_mask = {
1324                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1325                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1326                 .type = RTE_BE16(0xffff),
1327         };
1328         int ret;
1329         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1330         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1331                                        MLX5_FLOW_LAYER_OUTER_L2;
1332
1333         if (item_flags & ethm)
1334                 return rte_flow_error_set(error, ENOTSUP,
1335                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1336                                           "multiple L2 layers not supported");
1337         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1338             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1339                 return rte_flow_error_set(error, EINVAL,
1340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1341                                           "L2 layer should not follow "
1342                                           "L3 layers");
1343         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1344             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1345                 return rte_flow_error_set(error, EINVAL,
1346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1347                                           "L2 layer should not follow VLAN");
1348         if (!mask)
1349                 mask = &rte_flow_item_eth_mask;
1350         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1351                                         (const uint8_t *)&nic_mask,
1352                                         sizeof(struct rte_flow_item_eth),
1353                                         error);
1354         return ret;
1355 }
1356
1357 /**
1358  * Validate VLAN item.
1359  *
1360  * @param[in] item
1361  *   Item specification.
1362  * @param[in] item_flags
1363  *   Bit-fields that holds the items detected until now.
1364  * @param[in] dev
1365  *   Ethernet device flow is being created on.
1366  * @param[out] error
1367  *   Pointer to error structure.
1368  *
1369  * @return
1370  *   0 on success, a negative errno value otherwise and rte_errno is set.
1371  */
1372 int
1373 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1374                              uint64_t item_flags,
1375                              struct rte_eth_dev *dev,
1376                              struct rte_flow_error *error)
1377 {
1378         const struct rte_flow_item_vlan *spec = item->spec;
1379         const struct rte_flow_item_vlan *mask = item->mask;
1380         const struct rte_flow_item_vlan nic_mask = {
1381                 .tci = RTE_BE16(UINT16_MAX),
1382                 .inner_type = RTE_BE16(UINT16_MAX),
1383         };
1384         uint16_t vlan_tag = 0;
1385         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1386         int ret;
1387         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1388                                         MLX5_FLOW_LAYER_INNER_L4) :
1389                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1390                                         MLX5_FLOW_LAYER_OUTER_L4);
1391         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1392                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1393
1394         if (item_flags & vlanm)
1395                 return rte_flow_error_set(error, EINVAL,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "multiple VLAN layers not supported");
1398         else if ((item_flags & l34m) != 0)
1399                 return rte_flow_error_set(error, EINVAL,
1400                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1401                                           "VLAN cannot follow L3/L4 layer");
1402         if (!mask)
1403                 mask = &rte_flow_item_vlan_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_vlan),
1407                                         error);
1408         if (ret)
1409                 return ret;
1410         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1411                 struct mlx5_priv *priv = dev->data->dev_private;
1412
1413                 if (priv->vmwa_context) {
1414                         /*
1415                          * Non-NULL context means we have a virtual machine
1416                          * and SR-IOV enabled, we have to create VLAN interface
1417                          * to make hypervisor to setup E-Switch vport
1418                          * context correctly. We avoid creating the multiple
1419                          * VLAN interfaces, so we cannot support VLAN tag mask.
1420                          */
1421                         return rte_flow_error_set(error, EINVAL,
1422                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1423                                                   item,
1424                                                   "VLAN tag mask is not"
1425                                                   " supported in virtual"
1426                                                   " environment");
1427                 }
1428         }
1429         if (spec) {
1430                 vlan_tag = spec->tci;
1431                 vlan_tag &= mask->tci;
1432         }
1433         /*
1434          * From verbs perspective an empty VLAN is equivalent
1435          * to a packet without VLAN layer.
1436          */
1437         if (!vlan_tag)
1438                 return rte_flow_error_set(error, EINVAL,
1439                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1440                                           item->spec,
1441                                           "VLAN cannot be empty");
1442         return 0;
1443 }
1444
1445 /**
1446  * Validate IPV4 item.
1447  *
1448  * @param[in] item
1449  *   Item specification.
1450  * @param[in] item_flags
1451  *   Bit-fields that holds the items detected until now.
1452  * @param[in] acc_mask
1453  *   Acceptable mask, if NULL default internal default mask
1454  *   will be used to check whether item fields are supported.
1455  * @param[out] error
1456  *   Pointer to error structure.
1457  *
1458  * @return
1459  *   0 on success, a negative errno value otherwise and rte_errno is set.
1460  */
1461 int
1462 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1463                              uint64_t item_flags,
1464                              uint64_t last_item,
1465                              uint16_t ether_type,
1466                              const struct rte_flow_item_ipv4 *acc_mask,
1467                              struct rte_flow_error *error)
1468 {
1469         const struct rte_flow_item_ipv4 *mask = item->mask;
1470         const struct rte_flow_item_ipv4 *spec = item->spec;
1471         const struct rte_flow_item_ipv4 nic_mask = {
1472                 .hdr = {
1473                         .src_addr = RTE_BE32(0xffffffff),
1474                         .dst_addr = RTE_BE32(0xffffffff),
1475                         .type_of_service = 0xff,
1476                         .next_proto_id = 0xff,
1477                 },
1478         };
1479         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1480         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1481                                       MLX5_FLOW_LAYER_OUTER_L3;
1482         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1483                                       MLX5_FLOW_LAYER_OUTER_L4;
1484         int ret;
1485         uint8_t next_proto = 0xFF;
1486         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1487                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1488                                   MLX5_FLOW_LAYER_INNER_VLAN);
1489
1490         if ((last_item & l2_vlan) && ether_type &&
1491             ether_type != RTE_ETHER_TYPE_IPV4)
1492                 return rte_flow_error_set(error, EINVAL,
1493                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1494                                           "IPv4 cannot follow L2/VLAN layer "
1495                                           "which ether type is not IPv4");
1496         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1497                 if (mask && spec)
1498                         next_proto = mask->hdr.next_proto_id &
1499                                      spec->hdr.next_proto_id;
1500                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1501                         return rte_flow_error_set(error, EINVAL,
1502                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1503                                                   item,
1504                                                   "multiple tunnel "
1505                                                   "not supported");
1506         }
1507         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1508                 return rte_flow_error_set(error, EINVAL,
1509                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1510                                           "wrong tunnel type - IPv6 specified "
1511                                           "but IPv4 item provided");
1512         if (item_flags & l3m)
1513                 return rte_flow_error_set(error, ENOTSUP,
1514                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1515                                           "multiple L3 layers not supported");
1516         else if (item_flags & l4m)
1517                 return rte_flow_error_set(error, EINVAL,
1518                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1519                                           "L3 cannot follow an L4 layer.");
1520         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1521                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1522                 return rte_flow_error_set(error, EINVAL,
1523                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1524                                           "L3 cannot follow an NVGRE layer.");
1525         if (!mask)
1526                 mask = &rte_flow_item_ipv4_mask;
1527         else if (mask->hdr.next_proto_id != 0 &&
1528                  mask->hdr.next_proto_id != 0xff)
1529                 return rte_flow_error_set(error, EINVAL,
1530                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1531                                           "partial mask is not supported"
1532                                           " for protocol");
1533         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1534                                         acc_mask ? (const uint8_t *)acc_mask
1535                                                  : (const uint8_t *)&nic_mask,
1536                                         sizeof(struct rte_flow_item_ipv4),
1537                                         error);
1538         if (ret < 0)
1539                 return ret;
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate IPV6 item.
1545  *
1546  * @param[in] item
1547  *   Item specification.
1548  * @param[in] item_flags
1549  *   Bit-fields that holds the items detected until now.
1550  * @param[in] acc_mask
1551  *   Acceptable mask, if NULL default internal default mask
1552  *   will be used to check whether item fields are supported.
1553  * @param[out] error
1554  *   Pointer to error structure.
1555  *
1556  * @return
1557  *   0 on success, a negative errno value otherwise and rte_errno is set.
1558  */
1559 int
1560 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1561                              uint64_t item_flags,
1562                              uint64_t last_item,
1563                              uint16_t ether_type,
1564                              const struct rte_flow_item_ipv6 *acc_mask,
1565                              struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_ipv6 *mask = item->mask;
1568         const struct rte_flow_item_ipv6 *spec = item->spec;
1569         const struct rte_flow_item_ipv6 nic_mask = {
1570                 .hdr = {
1571                         .src_addr =
1572                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1573                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1574                         .dst_addr =
1575                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1576                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1577                         .vtc_flow = RTE_BE32(0xffffffff),
1578                         .proto = 0xff,
1579                         .hop_limits = 0xff,
1580                 },
1581         };
1582         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1583         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1584                                       MLX5_FLOW_LAYER_OUTER_L3;
1585         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1586                                       MLX5_FLOW_LAYER_OUTER_L4;
1587         int ret;
1588         uint8_t next_proto = 0xFF;
1589         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1590                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1591                                   MLX5_FLOW_LAYER_INNER_VLAN);
1592
1593         if ((last_item & l2_vlan) && ether_type &&
1594             ether_type != RTE_ETHER_TYPE_IPV6)
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1597                                           "IPv6 cannot follow L2/VLAN layer "
1598                                           "which ether type is not IPv6");
1599         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1600                 if (mask && spec)
1601                         next_proto = mask->hdr.proto & spec->hdr.proto;
1602                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1603                         return rte_flow_error_set(error, EINVAL,
1604                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1605                                                   item,
1606                                                   "multiple tunnel "
1607                                                   "not supported");
1608         }
1609         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1610                 return rte_flow_error_set(error, EINVAL,
1611                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1612                                           "wrong tunnel type - IPv4 specified "
1613                                           "but IPv6 item provided");
1614         if (item_flags & l3m)
1615                 return rte_flow_error_set(error, ENOTSUP,
1616                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1617                                           "multiple L3 layers not supported");
1618         else if (item_flags & l4m)
1619                 return rte_flow_error_set(error, EINVAL,
1620                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1621                                           "L3 cannot follow an L4 layer.");
1622         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1623                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1624                 return rte_flow_error_set(error, EINVAL,
1625                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1626                                           "L3 cannot follow an NVGRE layer.");
1627         if (!mask)
1628                 mask = &rte_flow_item_ipv6_mask;
1629         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1630                                         acc_mask ? (const uint8_t *)acc_mask
1631                                                  : (const uint8_t *)&nic_mask,
1632                                         sizeof(struct rte_flow_item_ipv6),
1633                                         error);
1634         if (ret < 0)
1635                 return ret;
1636         return 0;
1637 }
1638
1639 /**
1640  * Validate UDP item.
1641  *
1642  * @param[in] item
1643  *   Item specification.
1644  * @param[in] item_flags
1645  *   Bit-fields that holds the items detected until now.
1646  * @param[in] target_protocol
1647  *   The next protocol in the previous item.
1648  * @param[in] flow_mask
1649  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1650  * @param[out] error
1651  *   Pointer to error structure.
1652  *
1653  * @return
1654  *   0 on success, a negative errno value otherwise and rte_errno is set.
1655  */
1656 int
1657 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1658                             uint64_t item_flags,
1659                             uint8_t target_protocol,
1660                             struct rte_flow_error *error)
1661 {
1662         const struct rte_flow_item_udp *mask = item->mask;
1663         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1664         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1665                                       MLX5_FLOW_LAYER_OUTER_L3;
1666         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1667                                       MLX5_FLOW_LAYER_OUTER_L4;
1668         int ret;
1669
1670         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1671                 return rte_flow_error_set(error, EINVAL,
1672                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1673                                           "protocol filtering not compatible"
1674                                           " with UDP layer");
1675         if (!(item_flags & l3m))
1676                 return rte_flow_error_set(error, EINVAL,
1677                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1678                                           "L3 is mandatory to filter on L4");
1679         if (item_flags & l4m)
1680                 return rte_flow_error_set(error, EINVAL,
1681                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1682                                           "multiple L4 layers not supported");
1683         if (!mask)
1684                 mask = &rte_flow_item_udp_mask;
1685         ret = mlx5_flow_item_acceptable
1686                 (item, (const uint8_t *)mask,
1687                  (const uint8_t *)&rte_flow_item_udp_mask,
1688                  sizeof(struct rte_flow_item_udp), error);
1689         if (ret < 0)
1690                 return ret;
1691         return 0;
1692 }
1693
1694 /**
1695  * Validate TCP item.
1696  *
1697  * @param[in] item
1698  *   Item specification.
1699  * @param[in] item_flags
1700  *   Bit-fields that holds the items detected until now.
1701  * @param[in] target_protocol
1702  *   The next protocol in the previous item.
1703  * @param[out] error
1704  *   Pointer to error structure.
1705  *
1706  * @return
1707  *   0 on success, a negative errno value otherwise and rte_errno is set.
1708  */
1709 int
1710 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1711                             uint64_t item_flags,
1712                             uint8_t target_protocol,
1713                             const struct rte_flow_item_tcp *flow_mask,
1714                             struct rte_flow_error *error)
1715 {
1716         const struct rte_flow_item_tcp *mask = item->mask;
1717         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1718         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1719                                       MLX5_FLOW_LAYER_OUTER_L3;
1720         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1721                                       MLX5_FLOW_LAYER_OUTER_L4;
1722         int ret;
1723
1724         assert(flow_mask);
1725         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1728                                           "protocol filtering not compatible"
1729                                           " with TCP layer");
1730         if (!(item_flags & l3m))
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1733                                           "L3 is mandatory to filter on L4");
1734         if (item_flags & l4m)
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1737                                           "multiple L4 layers not supported");
1738         if (!mask)
1739                 mask = &rte_flow_item_tcp_mask;
1740         ret = mlx5_flow_item_acceptable
1741                 (item, (const uint8_t *)mask,
1742                  (const uint8_t *)flow_mask,
1743                  sizeof(struct rte_flow_item_tcp), error);
1744         if (ret < 0)
1745                 return ret;
1746         return 0;
1747 }
1748
1749 /**
1750  * Validate VXLAN item.
1751  *
1752  * @param[in] item
1753  *   Item specification.
1754  * @param[in] item_flags
1755  *   Bit-fields that holds the items detected until now.
1756  * @param[in] target_protocol
1757  *   The next protocol in the previous item.
1758  * @param[out] error
1759  *   Pointer to error structure.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 int
1765 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1766                               uint64_t item_flags,
1767                               struct rte_flow_error *error)
1768 {
1769         const struct rte_flow_item_vxlan *spec = item->spec;
1770         const struct rte_flow_item_vxlan *mask = item->mask;
1771         int ret;
1772         union vni {
1773                 uint32_t vlan_id;
1774                 uint8_t vni[4];
1775         } id = { .vlan_id = 0, };
1776         uint32_t vlan_id = 0;
1777
1778
1779         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1780                 return rte_flow_error_set(error, ENOTSUP,
1781                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1782                                           "multiple tunnel layers not"
1783                                           " supported");
1784         /*
1785          * Verify only UDPv4 is present as defined in
1786          * https://tools.ietf.org/html/rfc7348
1787          */
1788         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1791                                           "no outer UDP layer found");
1792         if (!mask)
1793                 mask = &rte_flow_item_vxlan_mask;
1794         ret = mlx5_flow_item_acceptable
1795                 (item, (const uint8_t *)mask,
1796                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1797                  sizeof(struct rte_flow_item_vxlan),
1798                  error);
1799         if (ret < 0)
1800                 return ret;
1801         if (spec) {
1802                 memcpy(&id.vni[1], spec->vni, 3);
1803                 vlan_id = id.vlan_id;
1804                 memcpy(&id.vni[1], mask->vni, 3);
1805                 vlan_id &= id.vlan_id;
1806         }
1807         /*
1808          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1809          * only this layer is defined in the Verbs specification it is
1810          * interpreted as wildcard and all packets will match this
1811          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1812          * udp), all packets matching the layers before will also
1813          * match this rule.  To avoid such situation, VNI 0 is
1814          * currently refused.
1815          */
1816         if (!vlan_id)
1817                 return rte_flow_error_set(error, ENOTSUP,
1818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1819                                           "VXLAN vni cannot be 0");
1820         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1821                 return rte_flow_error_set(error, ENOTSUP,
1822                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1823                                           "VXLAN tunnel must be fully defined");
1824         return 0;
1825 }
1826
1827 /**
1828  * Validate VXLAN_GPE item.
1829  *
1830  * @param[in] item
1831  *   Item specification.
1832  * @param[in] item_flags
1833  *   Bit-fields that holds the items detected until now.
1834  * @param[in] priv
1835  *   Pointer to the private data structure.
1836  * @param[in] target_protocol
1837  *   The next protocol in the previous item.
1838  * @param[out] error
1839  *   Pointer to error structure.
1840  *
1841  * @return
1842  *   0 on success, a negative errno value otherwise and rte_errno is set.
1843  */
1844 int
1845 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1846                                   uint64_t item_flags,
1847                                   struct rte_eth_dev *dev,
1848                                   struct rte_flow_error *error)
1849 {
1850         struct mlx5_priv *priv = dev->data->dev_private;
1851         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1852         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1853         int ret;
1854         union vni {
1855                 uint32_t vlan_id;
1856                 uint8_t vni[4];
1857         } id = { .vlan_id = 0, };
1858         uint32_t vlan_id = 0;
1859
1860         if (!priv->config.l3_vxlan_en)
1861                 return rte_flow_error_set(error, ENOTSUP,
1862                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1863                                           "L3 VXLAN is not enabled by device"
1864                                           " parameter and/or not configured in"
1865                                           " firmware");
1866         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1869                                           "multiple tunnel layers not"
1870                                           " supported");
1871         /*
1872          * Verify only UDPv4 is present as defined in
1873          * https://tools.ietf.org/html/rfc7348
1874          */
1875         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1876                 return rte_flow_error_set(error, EINVAL,
1877                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1878                                           "no outer UDP layer found");
1879         if (!mask)
1880                 mask = &rte_flow_item_vxlan_gpe_mask;
1881         ret = mlx5_flow_item_acceptable
1882                 (item, (const uint8_t *)mask,
1883                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1884                  sizeof(struct rte_flow_item_vxlan_gpe),
1885                  error);
1886         if (ret < 0)
1887                 return ret;
1888         if (spec) {
1889                 if (spec->protocol)
1890                         return rte_flow_error_set(error, ENOTSUP,
1891                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1892                                                   item,
1893                                                   "VxLAN-GPE protocol"
1894                                                   " not supported");
1895                 memcpy(&id.vni[1], spec->vni, 3);
1896                 vlan_id = id.vlan_id;
1897                 memcpy(&id.vni[1], mask->vni, 3);
1898                 vlan_id &= id.vlan_id;
1899         }
1900         /*
1901          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1902          * layer is defined in the Verbs specification it is interpreted as
1903          * wildcard and all packets will match this rule, if it follows a full
1904          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1905          * before will also match this rule.  To avoid such situation, VNI 0
1906          * is currently refused.
1907          */
1908         if (!vlan_id)
1909                 return rte_flow_error_set(error, ENOTSUP,
1910                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1911                                           "VXLAN-GPE vni cannot be 0");
1912         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1913                 return rte_flow_error_set(error, ENOTSUP,
1914                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1915                                           "VXLAN-GPE tunnel must be fully"
1916                                           " defined");
1917         return 0;
1918 }
1919 /**
1920  * Validate GRE Key item.
1921  *
1922  * @param[in] item
1923  *   Item specification.
1924  * @param[in] item_flags
1925  *   Bit flags to mark detected items.
1926  * @param[in] gre_item
1927  *   Pointer to gre_item
1928  * @param[out] error
1929  *   Pointer to error structure.
1930  *
1931  * @return
1932  *   0 on success, a negative errno value otherwise and rte_errno is set.
1933  */
1934 int
1935 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1936                                 uint64_t item_flags,
1937                                 const struct rte_flow_item *gre_item,
1938                                 struct rte_flow_error *error)
1939 {
1940         const rte_be32_t *mask = item->mask;
1941         int ret = 0;
1942         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1943         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1944         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1945
1946         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "Multiple GRE key not support");
1950         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1951                 return rte_flow_error_set(error, ENOTSUP,
1952                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1953                                           "No preceding GRE header");
1954         if (item_flags & MLX5_FLOW_LAYER_INNER)
1955                 return rte_flow_error_set(error, ENOTSUP,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1957                                           "GRE key following a wrong item");
1958         if (!gre_mask)
1959                 gre_mask = &rte_flow_item_gre_mask;
1960         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1961                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1962                 return rte_flow_error_set(error, EINVAL,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1964                                           "Key bit must be on");
1965
1966         if (!mask)
1967                 mask = &gre_key_default_mask;
1968         ret = mlx5_flow_item_acceptable
1969                 (item, (const uint8_t *)mask,
1970                  (const uint8_t *)&gre_key_default_mask,
1971                  sizeof(rte_be32_t), error);
1972         return ret;
1973 }
1974
1975 /**
1976  * Validate GRE item.
1977  *
1978  * @param[in] item
1979  *   Item specification.
1980  * @param[in] item_flags
1981  *   Bit flags to mark detected items.
1982  * @param[in] target_protocol
1983  *   The next protocol in the previous item.
1984  * @param[out] error
1985  *   Pointer to error structure.
1986  *
1987  * @return
1988  *   0 on success, a negative errno value otherwise and rte_errno is set.
1989  */
1990 int
1991 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1992                             uint64_t item_flags,
1993                             uint8_t target_protocol,
1994                             struct rte_flow_error *error)
1995 {
1996         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1997         const struct rte_flow_item_gre *mask = item->mask;
1998         int ret;
1999         const struct rte_flow_item_gre nic_mask = {
2000                 .c_rsvd0_ver = RTE_BE16(0xB000),
2001                 .protocol = RTE_BE16(UINT16_MAX),
2002         };
2003
2004         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2007                                           "protocol filtering not compatible"
2008                                           " with this GRE layer");
2009         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2010                 return rte_flow_error_set(error, ENOTSUP,
2011                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2012                                           "multiple tunnel layers not"
2013                                           " supported");
2014         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2015                 return rte_flow_error_set(error, ENOTSUP,
2016                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2017                                           "L3 Layer is missing");
2018         if (!mask)
2019                 mask = &rte_flow_item_gre_mask;
2020         ret = mlx5_flow_item_acceptable
2021                 (item, (const uint8_t *)mask,
2022                  (const uint8_t *)&nic_mask,
2023                  sizeof(struct rte_flow_item_gre), error);
2024         if (ret < 0)
2025                 return ret;
2026 #ifndef HAVE_MLX5DV_DR
2027 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2028         if (spec && (spec->protocol & mask->protocol))
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2031                                           "without MPLS support the"
2032                                           " specification cannot be used for"
2033                                           " filtering");
2034 #endif
2035 #endif
2036         return 0;
2037 }
2038
2039 /**
2040  * Validate Geneve item.
2041  *
2042  * @param[in] item
2043  *   Item specification.
2044  * @param[in] itemFlags
2045  *   Bit-fields that holds the items detected until now.
2046  * @param[in] enPriv
2047  *   Pointer to the private data structure.
2048  * @param[out] error
2049  *   Pointer to error structure.
2050  *
2051  * @return
2052  *   0 on success, a negative errno value otherwise and rte_errno is set.
2053  */
2054
2055 int
2056 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2057                                uint64_t item_flags,
2058                                struct rte_eth_dev *dev,
2059                                struct rte_flow_error *error)
2060 {
2061         struct mlx5_priv *priv = dev->data->dev_private;
2062         const struct rte_flow_item_geneve *spec = item->spec;
2063         const struct rte_flow_item_geneve *mask = item->mask;
2064         int ret;
2065         uint16_t gbhdr;
2066         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2067                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2068         const struct rte_flow_item_geneve nic_mask = {
2069                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2070                 .vni = "\xff\xff\xff",
2071                 .protocol = RTE_BE16(UINT16_MAX),
2072         };
2073
2074         if (!(priv->config.hca_attr.flex_parser_protocols &
2075               MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2076             !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2077                 return rte_flow_error_set(error, ENOTSUP,
2078                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2079                                           "L3 Geneve is not enabled by device"
2080                                           " parameter and/or not configured in"
2081                                           " firmware");
2082         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2083                 return rte_flow_error_set(error, ENOTSUP,
2084                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2085                                           "multiple tunnel layers not"
2086                                           " supported");
2087         /*
2088          * Verify only UDPv4 is present as defined in
2089          * https://tools.ietf.org/html/rfc7348
2090          */
2091         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2092                 return rte_flow_error_set(error, EINVAL,
2093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2094                                           "no outer UDP layer found");
2095         if (!mask)
2096                 mask = &rte_flow_item_geneve_mask;
2097         ret = mlx5_flow_item_acceptable
2098                                   (item, (const uint8_t *)mask,
2099                                    (const uint8_t *)&nic_mask,
2100                                    sizeof(struct rte_flow_item_geneve), error);
2101         if (ret)
2102                 return ret;
2103         if (spec) {
2104                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2105                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2106                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2107                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2108                         return rte_flow_error_set(error, ENOTSUP,
2109                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2110                                                   item,
2111                                                   "Geneve protocol unsupported"
2112                                                   " fields are being used");
2113                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2114                         return rte_flow_error_set
2115                                         (error, ENOTSUP,
2116                                          RTE_FLOW_ERROR_TYPE_ITEM,
2117                                          item,
2118                                          "Unsupported Geneve options length");
2119         }
2120         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2121                 return rte_flow_error_set
2122                                     (error, ENOTSUP,
2123                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2124                                      "Geneve tunnel must be fully defined");
2125         return 0;
2126 }
2127
2128 /**
2129  * Validate MPLS item.
2130  *
2131  * @param[in] dev
2132  *   Pointer to the rte_eth_dev structure.
2133  * @param[in] item
2134  *   Item specification.
2135  * @param[in] item_flags
2136  *   Bit-fields that holds the items detected until now.
2137  * @param[in] prev_layer
2138  *   The protocol layer indicated in previous item.
2139  * @param[out] error
2140  *   Pointer to error structure.
2141  *
2142  * @return
2143  *   0 on success, a negative errno value otherwise and rte_errno is set.
2144  */
2145 int
2146 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2147                              const struct rte_flow_item *item __rte_unused,
2148                              uint64_t item_flags __rte_unused,
2149                              uint64_t prev_layer __rte_unused,
2150                              struct rte_flow_error *error)
2151 {
2152 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2153         const struct rte_flow_item_mpls *mask = item->mask;
2154         struct mlx5_priv *priv = dev->data->dev_private;
2155         int ret;
2156
2157         if (!priv->config.mpls_en)
2158                 return rte_flow_error_set(error, ENOTSUP,
2159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2160                                           "MPLS not supported or"
2161                                           " disabled in firmware"
2162                                           " configuration.");
2163         /* MPLS over IP, UDP, GRE is allowed */
2164         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2165                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2166                             MLX5_FLOW_LAYER_GRE)))
2167                 return rte_flow_error_set(error, EINVAL,
2168                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2169                                           "protocol filtering not compatible"
2170                                           " with MPLS layer");
2171         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2172         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2173             !(item_flags & MLX5_FLOW_LAYER_GRE))
2174                 return rte_flow_error_set(error, ENOTSUP,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2176                                           "multiple tunnel layers not"
2177                                           " supported");
2178         if (!mask)
2179                 mask = &rte_flow_item_mpls_mask;
2180         ret = mlx5_flow_item_acceptable
2181                 (item, (const uint8_t *)mask,
2182                  (const uint8_t *)&rte_flow_item_mpls_mask,
2183                  sizeof(struct rte_flow_item_mpls), error);
2184         if (ret < 0)
2185                 return ret;
2186         return 0;
2187 #endif
2188         return rte_flow_error_set(error, ENOTSUP,
2189                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2190                                   "MPLS is not supported by Verbs, please"
2191                                   " update.");
2192 }
2193
2194 /**
2195  * Validate NVGRE item.
2196  *
2197  * @param[in] item
2198  *   Item specification.
2199  * @param[in] item_flags
2200  *   Bit flags to mark detected items.
2201  * @param[in] target_protocol
2202  *   The next protocol in the previous item.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 int
2210 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2211                               uint64_t item_flags,
2212                               uint8_t target_protocol,
2213                               struct rte_flow_error *error)
2214 {
2215         const struct rte_flow_item_nvgre *mask = item->mask;
2216         int ret;
2217
2218         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2219                 return rte_flow_error_set(error, EINVAL,
2220                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2221                                           "protocol filtering not compatible"
2222                                           " with this GRE layer");
2223         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2224                 return rte_flow_error_set(error, ENOTSUP,
2225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2226                                           "multiple tunnel layers not"
2227                                           " supported");
2228         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2229                 return rte_flow_error_set(error, ENOTSUP,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "L3 Layer is missing");
2232         if (!mask)
2233                 mask = &rte_flow_item_nvgre_mask;
2234         ret = mlx5_flow_item_acceptable
2235                 (item, (const uint8_t *)mask,
2236                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2237                  sizeof(struct rte_flow_item_nvgre), error);
2238         if (ret < 0)
2239                 return ret;
2240         return 0;
2241 }
2242
2243 /* Allocate unique ID for the split Q/RSS subflows. */
2244 static uint32_t
2245 flow_qrss_get_id(struct rte_eth_dev *dev)
2246 {
2247         struct mlx5_priv *priv = dev->data->dev_private;
2248         uint32_t qrss_id, ret;
2249
2250         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2251         if (ret)
2252                 return 0;
2253         assert(qrss_id);
2254         return qrss_id;
2255 }
2256
2257 /* Free unique ID for the split Q/RSS subflows. */
2258 static void
2259 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2260 {
2261         struct mlx5_priv *priv = dev->data->dev_private;
2262
2263         if (qrss_id)
2264                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2265 }
2266
2267 /**
2268  * Release resource related QUEUE/RSS action split.
2269  *
2270  * @param dev
2271  *   Pointer to Ethernet device.
2272  * @param flow
2273  *   Flow to release id's from.
2274  */
2275 static void
2276 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2277                              struct rte_flow *flow)
2278 {
2279         struct mlx5_flow *dev_flow;
2280
2281         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2282                 if (dev_flow->qrss_id)
2283                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2284 }
2285
2286 static int
2287 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2288                    const struct rte_flow_attr *attr __rte_unused,
2289                    const struct rte_flow_item items[] __rte_unused,
2290                    const struct rte_flow_action actions[] __rte_unused,
2291                    bool external __rte_unused,
2292                    struct rte_flow_error *error)
2293 {
2294         return rte_flow_error_set(error, ENOTSUP,
2295                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2296 }
2297
2298 static struct mlx5_flow *
2299 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2300                   const struct rte_flow_item items[] __rte_unused,
2301                   const struct rte_flow_action actions[] __rte_unused,
2302                   struct rte_flow_error *error)
2303 {
2304         rte_flow_error_set(error, ENOTSUP,
2305                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2306         return NULL;
2307 }
2308
2309 static int
2310 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2311                     struct mlx5_flow *dev_flow __rte_unused,
2312                     const struct rte_flow_attr *attr __rte_unused,
2313                     const struct rte_flow_item items[] __rte_unused,
2314                     const struct rte_flow_action actions[] __rte_unused,
2315                     struct rte_flow_error *error)
2316 {
2317         return rte_flow_error_set(error, ENOTSUP,
2318                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2319 }
2320
2321 static int
2322 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2323                 struct rte_flow *flow __rte_unused,
2324                 struct rte_flow_error *error)
2325 {
2326         return rte_flow_error_set(error, ENOTSUP,
2327                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2328 }
2329
2330 static void
2331 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2332                  struct rte_flow *flow __rte_unused)
2333 {
2334 }
2335
2336 static void
2337 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2338                   struct rte_flow *flow __rte_unused)
2339 {
2340 }
2341
2342 static int
2343 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2344                 struct rte_flow *flow __rte_unused,
2345                 const struct rte_flow_action *actions __rte_unused,
2346                 void *data __rte_unused,
2347                 struct rte_flow_error *error)
2348 {
2349         return rte_flow_error_set(error, ENOTSUP,
2350                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2351 }
2352
2353 /* Void driver to protect from null pointer reference. */
2354 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2355         .validate = flow_null_validate,
2356         .prepare = flow_null_prepare,
2357         .translate = flow_null_translate,
2358         .apply = flow_null_apply,
2359         .remove = flow_null_remove,
2360         .destroy = flow_null_destroy,
2361         .query = flow_null_query,
2362 };
2363
2364 /**
2365  * Select flow driver type according to flow attributes and device
2366  * configuration.
2367  *
2368  * @param[in] dev
2369  *   Pointer to the dev structure.
2370  * @param[in] attr
2371  *   Pointer to the flow attributes.
2372  *
2373  * @return
2374  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2375  */
2376 static enum mlx5_flow_drv_type
2377 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2378 {
2379         struct mlx5_priv *priv = dev->data->dev_private;
2380         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2381
2382         if (attr->transfer && priv->config.dv_esw_en)
2383                 type = MLX5_FLOW_TYPE_DV;
2384         if (!attr->transfer)
2385                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2386                                                  MLX5_FLOW_TYPE_VERBS;
2387         return type;
2388 }
2389
2390 #define flow_get_drv_ops(type) flow_drv_ops[type]
2391
2392 /**
2393  * Flow driver validation API. This abstracts calling driver specific functions.
2394  * The type of flow driver is determined according to flow attributes.
2395  *
2396  * @param[in] dev
2397  *   Pointer to the dev structure.
2398  * @param[in] attr
2399  *   Pointer to the flow attributes.
2400  * @param[in] items
2401  *   Pointer to the list of items.
2402  * @param[in] actions
2403  *   Pointer to the list of actions.
2404  * @param[in] external
2405  *   This flow rule is created by request external to PMD.
2406  * @param[out] error
2407  *   Pointer to the error structure.
2408  *
2409  * @return
2410  *   0 on success, a negative errno value otherwise and rte_errno is set.
2411  */
2412 static inline int
2413 flow_drv_validate(struct rte_eth_dev *dev,
2414                   const struct rte_flow_attr *attr,
2415                   const struct rte_flow_item items[],
2416                   const struct rte_flow_action actions[],
2417                   bool external, struct rte_flow_error *error)
2418 {
2419         const struct mlx5_flow_driver_ops *fops;
2420         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2421
2422         fops = flow_get_drv_ops(type);
2423         return fops->validate(dev, attr, items, actions, external, error);
2424 }
2425
2426 /**
2427  * Flow driver preparation API. This abstracts calling driver specific
2428  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2429  * calculates the size of memory required for device flow, allocates the memory,
2430  * initializes the device flow and returns the pointer.
2431  *
2432  * @note
2433  *   This function initializes device flow structure such as dv or verbs in
2434  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2435  *   rest. For example, adding returning device flow to flow->dev_flow list and
2436  *   setting backward reference to the flow should be done out of this function.
2437  *   layers field is not filled either.
2438  *
2439  * @param[in] attr
2440  *   Pointer to the flow attributes.
2441  * @param[in] items
2442  *   Pointer to the list of items.
2443  * @param[in] actions
2444  *   Pointer to the list of actions.
2445  * @param[out] error
2446  *   Pointer to the error structure.
2447  *
2448  * @return
2449  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2450  */
2451 static inline struct mlx5_flow *
2452 flow_drv_prepare(const struct rte_flow *flow,
2453                  const struct rte_flow_attr *attr,
2454                  const struct rte_flow_item items[],
2455                  const struct rte_flow_action actions[],
2456                  struct rte_flow_error *error)
2457 {
2458         const struct mlx5_flow_driver_ops *fops;
2459         enum mlx5_flow_drv_type type = flow->drv_type;
2460
2461         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2462         fops = flow_get_drv_ops(type);
2463         return fops->prepare(attr, items, actions, error);
2464 }
2465
2466 /**
2467  * Flow driver translation API. This abstracts calling driver specific
2468  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2469  * translates a generic flow into a driver flow. flow_drv_prepare() must
2470  * precede.
2471  *
2472  * @note
2473  *   dev_flow->layers could be filled as a result of parsing during translation
2474  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2475  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2476  *   flow->actions could be overwritten even though all the expanded dev_flows
2477  *   have the same actions.
2478  *
2479  * @param[in] dev
2480  *   Pointer to the rte dev structure.
2481  * @param[in, out] dev_flow
2482  *   Pointer to the mlx5 flow.
2483  * @param[in] attr
2484  *   Pointer to the flow attributes.
2485  * @param[in] items
2486  *   Pointer to the list of items.
2487  * @param[in] actions
2488  *   Pointer to the list of actions.
2489  * @param[out] error
2490  *   Pointer to the error structure.
2491  *
2492  * @return
2493  *   0 on success, a negative errno value otherwise and rte_errno is set.
2494  */
2495 static inline int
2496 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2497                    const struct rte_flow_attr *attr,
2498                    const struct rte_flow_item items[],
2499                    const struct rte_flow_action actions[],
2500                    struct rte_flow_error *error)
2501 {
2502         const struct mlx5_flow_driver_ops *fops;
2503         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2504
2505         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2506         fops = flow_get_drv_ops(type);
2507         return fops->translate(dev, dev_flow, attr, items, actions, error);
2508 }
2509
2510 /**
2511  * Flow driver apply API. This abstracts calling driver specific functions.
2512  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2513  * translated driver flows on to device. flow_drv_translate() must precede.
2514  *
2515  * @param[in] dev
2516  *   Pointer to Ethernet device structure.
2517  * @param[in, out] flow
2518  *   Pointer to flow structure.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 static inline int
2526 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2527                struct rte_flow_error *error)
2528 {
2529         const struct mlx5_flow_driver_ops *fops;
2530         enum mlx5_flow_drv_type type = flow->drv_type;
2531
2532         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2533         fops = flow_get_drv_ops(type);
2534         return fops->apply(dev, flow, error);
2535 }
2536
2537 /**
2538  * Flow driver remove API. This abstracts calling driver specific functions.
2539  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2540  * on device. All the resources of the flow should be freed by calling
2541  * flow_drv_destroy().
2542  *
2543  * @param[in] dev
2544  *   Pointer to Ethernet device.
2545  * @param[in, out] flow
2546  *   Pointer to flow structure.
2547  */
2548 static inline void
2549 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2550 {
2551         const struct mlx5_flow_driver_ops *fops;
2552         enum mlx5_flow_drv_type type = flow->drv_type;
2553
2554         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2555         fops = flow_get_drv_ops(type);
2556         fops->remove(dev, flow);
2557 }
2558
2559 /**
2560  * Flow driver destroy API. This abstracts calling driver specific functions.
2561  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2562  * on device and releases resources of the flow.
2563  *
2564  * @param[in] dev
2565  *   Pointer to Ethernet device.
2566  * @param[in, out] flow
2567  *   Pointer to flow structure.
2568  */
2569 static inline void
2570 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2571 {
2572         const struct mlx5_flow_driver_ops *fops;
2573         enum mlx5_flow_drv_type type = flow->drv_type;
2574
2575         flow_mreg_split_qrss_release(dev, flow);
2576         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2577         fops = flow_get_drv_ops(type);
2578         fops->destroy(dev, flow);
2579 }
2580
2581 /**
2582  * Validate a flow supported by the NIC.
2583  *
2584  * @see rte_flow_validate()
2585  * @see rte_flow_ops
2586  */
2587 int
2588 mlx5_flow_validate(struct rte_eth_dev *dev,
2589                    const struct rte_flow_attr *attr,
2590                    const struct rte_flow_item items[],
2591                    const struct rte_flow_action actions[],
2592                    struct rte_flow_error *error)
2593 {
2594         int ret;
2595
2596         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2597         if (ret < 0)
2598                 return ret;
2599         return 0;
2600 }
2601
2602 /**
2603  * Get RSS action from the action list.
2604  *
2605  * @param[in] actions
2606  *   Pointer to the list of actions.
2607  *
2608  * @return
2609  *   Pointer to the RSS action if exist, else return NULL.
2610  */
2611 static const struct rte_flow_action_rss*
2612 flow_get_rss_action(const struct rte_flow_action actions[])
2613 {
2614         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2615                 switch (actions->type) {
2616                 case RTE_FLOW_ACTION_TYPE_RSS:
2617                         return (const struct rte_flow_action_rss *)
2618                                actions->conf;
2619                 default:
2620                         break;
2621                 }
2622         }
2623         return NULL;
2624 }
2625
2626 static unsigned int
2627 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2628 {
2629         const struct rte_flow_item *item;
2630         unsigned int has_vlan = 0;
2631
2632         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2633                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2634                         has_vlan = 1;
2635                         break;
2636                 }
2637         }
2638         if (has_vlan)
2639                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2640                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2641         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2642                                MLX5_EXPANSION_ROOT_OUTER;
2643 }
2644
2645 /**
2646  * Get QUEUE/RSS action from the action list.
2647  *
2648  * @param[in] actions
2649  *   Pointer to the list of actions.
2650  * @param[out] qrss
2651  *   Pointer to the return pointer.
2652  * @param[out] qrss_type
2653  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2654  *   if no QUEUE/RSS is found.
2655  *
2656  * @return
2657  *   Total number of actions.
2658  */
2659 static int
2660 flow_parse_qrss_action(const struct rte_flow_action actions[],
2661                        const struct rte_flow_action **qrss)
2662 {
2663         int actions_n = 0;
2664
2665         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2666                 switch (actions->type) {
2667                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2668                 case RTE_FLOW_ACTION_TYPE_RSS:
2669                         *qrss = actions;
2670                         break;
2671                 default:
2672                         break;
2673                 }
2674                 actions_n++;
2675         }
2676         /* Count RTE_FLOW_ACTION_TYPE_END. */
2677         return actions_n + 1;
2678 }
2679
2680 /**
2681  * Check if the flow should be splited due to hairpin.
2682  * The reason for the split is that in current HW we can't
2683  * support encap on Rx, so if a flow have encap we move it
2684  * to Tx.
2685  *
2686  * @param dev
2687  *   Pointer to Ethernet device.
2688  * @param[in] attr
2689  *   Flow rule attributes.
2690  * @param[in] actions
2691  *   Associated actions (list terminated by the END action).
2692  *
2693  * @return
2694  *   > 0 the number of actions and the flow should be split,
2695  *   0 when no split required.
2696  */
2697 static int
2698 flow_check_hairpin_split(struct rte_eth_dev *dev,
2699                          const struct rte_flow_attr *attr,
2700                          const struct rte_flow_action actions[])
2701 {
2702         int queue_action = 0;
2703         int action_n = 0;
2704         int encap = 0;
2705         const struct rte_flow_action_queue *queue;
2706         const struct rte_flow_action_rss *rss;
2707         const struct rte_flow_action_raw_encap *raw_encap;
2708
2709         if (!attr->ingress)
2710                 return 0;
2711         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2712                 switch (actions->type) {
2713                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2714                         queue = actions->conf;
2715                         if (mlx5_rxq_get_type(dev, queue->index) !=
2716                             MLX5_RXQ_TYPE_HAIRPIN)
2717                                 return 0;
2718                         queue_action = 1;
2719                         action_n++;
2720                         break;
2721                 case RTE_FLOW_ACTION_TYPE_RSS:
2722                         rss = actions->conf;
2723                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2724                             MLX5_RXQ_TYPE_HAIRPIN)
2725                                 return 0;
2726                         queue_action = 1;
2727                         action_n++;
2728                         break;
2729                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2730                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2731                         encap = 1;
2732                         action_n++;
2733                         break;
2734                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2735                         raw_encap = actions->conf;
2736                         if (raw_encap->size >
2737                             (sizeof(struct rte_flow_item_eth) +
2738                              sizeof(struct rte_flow_item_ipv4)))
2739                                 encap = 1;
2740                         action_n++;
2741                         break;
2742                 default:
2743                         action_n++;
2744                         break;
2745                 }
2746         }
2747         if (encap == 1 && queue_action)
2748                 return action_n;
2749         return 0;
2750 }
2751
2752 #define MLX5_MAX_SPLIT_ACTIONS 24
2753 #define MLX5_MAX_SPLIT_ITEMS 24
2754
2755 /**
2756  * Split the hairpin flow.
2757  * Since HW can't support encap on Rx we move the encap to Tx.
2758  * If the count action is after the encap then we also
2759  * move the count action. in this case the count will also measure
2760  * the outer bytes.
2761  *
2762  * @param dev
2763  *   Pointer to Ethernet device.
2764  * @param[in] actions
2765  *   Associated actions (list terminated by the END action).
2766  * @param[out] actions_rx
2767  *   Rx flow actions.
2768  * @param[out] actions_tx
2769  *   Tx flow actions..
2770  * @param[out] pattern_tx
2771  *   The pattern items for the Tx flow.
2772  * @param[out] flow_id
2773  *   The flow ID connected to this flow.
2774  *
2775  * @return
2776  *   0 on success.
2777  */
2778 static int
2779 flow_hairpin_split(struct rte_eth_dev *dev,
2780                    const struct rte_flow_action actions[],
2781                    struct rte_flow_action actions_rx[],
2782                    struct rte_flow_action actions_tx[],
2783                    struct rte_flow_item pattern_tx[],
2784                    uint32_t *flow_id)
2785 {
2786         struct mlx5_priv *priv = dev->data->dev_private;
2787         const struct rte_flow_action_raw_encap *raw_encap;
2788         const struct rte_flow_action_raw_decap *raw_decap;
2789         struct mlx5_rte_flow_action_set_tag *set_tag;
2790         struct rte_flow_action *tag_action;
2791         struct mlx5_rte_flow_item_tag *tag_item;
2792         struct rte_flow_item *item;
2793         char *addr;
2794         int encap = 0;
2795
2796         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
2797         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2798                 switch (actions->type) {
2799                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2800                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2801                         rte_memcpy(actions_tx, actions,
2802                                sizeof(struct rte_flow_action));
2803                         actions_tx++;
2804                         break;
2805                 case RTE_FLOW_ACTION_TYPE_COUNT:
2806                         if (encap) {
2807                                 rte_memcpy(actions_tx, actions,
2808                                            sizeof(struct rte_flow_action));
2809                                 actions_tx++;
2810                         } else {
2811                                 rte_memcpy(actions_rx, actions,
2812                                            sizeof(struct rte_flow_action));
2813                                 actions_rx++;
2814                         }
2815                         break;
2816                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2817                         raw_encap = actions->conf;
2818                         if (raw_encap->size >
2819                             (sizeof(struct rte_flow_item_eth) +
2820                              sizeof(struct rte_flow_item_ipv4))) {
2821                                 memcpy(actions_tx, actions,
2822                                        sizeof(struct rte_flow_action));
2823                                 actions_tx++;
2824                                 encap = 1;
2825                         } else {
2826                                 rte_memcpy(actions_rx, actions,
2827                                            sizeof(struct rte_flow_action));
2828                                 actions_rx++;
2829                         }
2830                         break;
2831                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2832                         raw_decap = actions->conf;
2833                         if (raw_decap->size <
2834                             (sizeof(struct rte_flow_item_eth) +
2835                              sizeof(struct rte_flow_item_ipv4))) {
2836                                 memcpy(actions_tx, actions,
2837                                        sizeof(struct rte_flow_action));
2838                                 actions_tx++;
2839                         } else {
2840                                 rte_memcpy(actions_rx, actions,
2841                                            sizeof(struct rte_flow_action));
2842                                 actions_rx++;
2843                         }
2844                         break;
2845                 default:
2846                         rte_memcpy(actions_rx, actions,
2847                                    sizeof(struct rte_flow_action));
2848                         actions_rx++;
2849                         break;
2850                 }
2851         }
2852         /* Add set meta action and end action for the Rx flow. */
2853         tag_action = actions_rx;
2854         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
2855         actions_rx++;
2856         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
2857         actions_rx++;
2858         set_tag = (void *)actions_rx;
2859         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
2860         assert(set_tag->id > REG_NONE);
2861         set_tag->data = *flow_id;
2862         tag_action->conf = set_tag;
2863         /* Create Tx item list. */
2864         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
2865         addr = (void *)&pattern_tx[2];
2866         item = pattern_tx;
2867         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
2868         tag_item = (void *)addr;
2869         tag_item->data = *flow_id;
2870         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
2871         assert(set_tag->id > REG_NONE);
2872         item->spec = tag_item;
2873         addr += sizeof(struct mlx5_rte_flow_item_tag);
2874         tag_item = (void *)addr;
2875         tag_item->data = UINT32_MAX;
2876         tag_item->id = UINT16_MAX;
2877         item->mask = tag_item;
2878         addr += sizeof(struct mlx5_rte_flow_item_tag);
2879         item->last = NULL;
2880         item++;
2881         item->type = RTE_FLOW_ITEM_TYPE_END;
2882         return 0;
2883 }
2884
2885 /**
2886  * The last stage of splitting chain, just creates the subflow
2887  * without any modification.
2888  *
2889  * @param dev
2890  *   Pointer to Ethernet device.
2891  * @param[in] flow
2892  *   Parent flow structure pointer.
2893  * @param[in, out] sub_flow
2894  *   Pointer to return the created subflow, may be NULL.
2895  * @param[in] attr
2896  *   Flow rule attributes.
2897  * @param[in] items
2898  *   Pattern specification (list terminated by the END pattern item).
2899  * @param[in] actions
2900  *   Associated actions (list terminated by the END action).
2901  * @param[in] external
2902  *   This flow rule is created by request external to PMD.
2903  * @param[out] error
2904  *   Perform verbose error reporting if not NULL.
2905  * @return
2906  *   0 on success, negative value otherwise
2907  */
2908 static int
2909 flow_create_split_inner(struct rte_eth_dev *dev,
2910                         struct rte_flow *flow,
2911                         struct mlx5_flow **sub_flow,
2912                         const struct rte_flow_attr *attr,
2913                         const struct rte_flow_item items[],
2914                         const struct rte_flow_action actions[],
2915                         bool external, struct rte_flow_error *error)
2916 {
2917         struct mlx5_flow *dev_flow;
2918
2919         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
2920         if (!dev_flow)
2921                 return -rte_errno;
2922         dev_flow->flow = flow;
2923         dev_flow->external = external;
2924         /* Subflow object was created, we must include one in the list. */
2925         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2926         if (sub_flow)
2927                 *sub_flow = dev_flow;
2928         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
2929 }
2930
2931 /**
2932  * Split action list having QUEUE/RSS for metadata register copy.
2933  *
2934  * Once Q/RSS action is detected in user's action list, the flow action
2935  * should be split in order to copy metadata registers, which will happen in
2936  * RX_CP_TBL like,
2937  *   - CQE->flow_tag := reg_c[1] (MARK)
2938  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
2939  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
2940  * This is because the last action of each flow must be a terminal action
2941  * (QUEUE, RSS or DROP).
2942  *
2943  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
2944  * stored and kept in the mlx5_flow structure per each sub_flow.
2945  *
2946  * The Q/RSS action is replaced with,
2947  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
2948  * And the following JUMP action is added at the end,
2949  *   - JUMP, to RX_CP_TBL.
2950  *
2951  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
2952  * flow_create_split_metadata() routine. The flow will look like,
2953  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
2954  *
2955  * @param dev
2956  *   Pointer to Ethernet device.
2957  * @param[out] split_actions
2958  *   Pointer to store split actions to jump to CP_TBL.
2959  * @param[in] actions
2960  *   Pointer to the list of original flow actions.
2961  * @param[in] qrss
2962  *   Pointer to the Q/RSS action.
2963  * @param[in] actions_n
2964  *   Number of original actions.
2965  * @param[out] error
2966  *   Perform verbose error reporting if not NULL.
2967  *
2968  * @return
2969  *   non-zero unique flow_id on success, otherwise 0 and
2970  *   error/rte_error are set.
2971  */
2972 static uint32_t
2973 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
2974                           struct rte_flow_action *split_actions,
2975                           const struct rte_flow_action *actions,
2976                           const struct rte_flow_action *qrss,
2977                           int actions_n, struct rte_flow_error *error)
2978 {
2979         struct mlx5_rte_flow_action_set_tag *set_tag;
2980         struct rte_flow_action_jump *jump;
2981         const int qrss_idx = qrss - actions;
2982         uint32_t flow_id;
2983         int ret = 0;
2984
2985         /*
2986          * Given actions will be split
2987          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
2988          * - Add jump to mreg CP_TBL.
2989          * As a result, there will be one more action.
2990          */
2991         ++actions_n;
2992         /*
2993          * Allocate the new subflow ID. This one is unique within
2994          * device and not shared with representors. Otherwise,
2995          * we would have to resolve multi-thread access synch
2996          * issue. Each flow on the shared device is appended
2997          * with source vport identifier, so the resulting
2998          * flows will be unique in the shared (by master and
2999          * representors) domain even if they have coinciding
3000          * IDs.
3001          */
3002         flow_id = flow_qrss_get_id(dev);
3003         if (!flow_id)
3004                 return rte_flow_error_set(error, ENOMEM,
3005                                           RTE_FLOW_ERROR_TYPE_ACTION,
3006                                           NULL, "can't allocate id "
3007                                           "for split Q/RSS subflow");
3008         /* Internal SET_TAG action to set flow ID. */
3009         set_tag = (void *)(split_actions + actions_n);
3010         *set_tag = (struct mlx5_rte_flow_action_set_tag){
3011                 .data = flow_id,
3012         };
3013         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3014         if (ret < 0)
3015                 return ret;
3016         set_tag->id = ret;
3017         /* JUMP action to jump to mreg copy table (CP_TBL). */
3018         jump = (void *)(set_tag + 1);
3019         *jump = (struct rte_flow_action_jump){
3020                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3021         };
3022         /* Construct new actions array. */
3023         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3024         /* Replace QUEUE/RSS action. */
3025         split_actions[qrss_idx] = (struct rte_flow_action){
3026                 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3027                 .conf = set_tag,
3028         };
3029         split_actions[actions_n - 2] = (struct rte_flow_action){
3030                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3031                 .conf = jump,
3032         };
3033         split_actions[actions_n - 1] = (struct rte_flow_action){
3034                 .type = RTE_FLOW_ACTION_TYPE_END,
3035         };
3036         return flow_id;
3037 }
3038
3039 /**
3040  * Extend the given action list for Tx metadata copy.
3041  *
3042  * Copy the given action list to the ext_actions and add flow metadata register
3043  * copy action in order to copy reg_a set by WQE to reg_c[0].
3044  *
3045  * @param[out] ext_actions
3046  *   Pointer to the extended action list.
3047  * @param[in] actions
3048  *   Pointer to the list of actions.
3049  * @param[in] actions_n
3050  *   Number of actions in the list.
3051  * @param[out] error
3052  *   Perform verbose error reporting if not NULL.
3053  *
3054  * @return
3055  *   0 on success, negative value otherwise
3056  */
3057 static int
3058 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3059                        struct rte_flow_action *ext_actions,
3060                        const struct rte_flow_action *actions,
3061                        int actions_n, struct rte_flow_error *error)
3062 {
3063         struct mlx5_flow_action_copy_mreg *cp_mreg =
3064                 (struct mlx5_flow_action_copy_mreg *)
3065                         (ext_actions + actions_n + 1);
3066         int ret;
3067
3068         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3069         if (ret < 0)
3070                 return ret;
3071         cp_mreg->dst = ret;
3072         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3073         if (ret < 0)
3074                 return ret;
3075         cp_mreg->src = ret;
3076         memcpy(ext_actions, actions,
3077                         sizeof(*ext_actions) * actions_n);
3078         ext_actions[actions_n - 1] = (struct rte_flow_action){
3079                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3080                 .conf = cp_mreg,
3081         };
3082         ext_actions[actions_n] = (struct rte_flow_action){
3083                 .type = RTE_FLOW_ACTION_TYPE_END,
3084         };
3085         return 0;
3086 }
3087
3088 /**
3089  * The splitting for metadata feature.
3090  *
3091  * - Q/RSS action on NIC Rx should be split in order to pass by
3092  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3093  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3094  *
3095  * - All the actions on NIC Tx should have a mreg copy action to
3096  *   copy reg_a from WQE to reg_c[0].
3097  *
3098  * @param dev
3099  *   Pointer to Ethernet device.
3100  * @param[in] flow
3101  *   Parent flow structure pointer.
3102  * @param[in] attr
3103  *   Flow rule attributes.
3104  * @param[in] items
3105  *   Pattern specification (list terminated by the END pattern item).
3106  * @param[in] actions
3107  *   Associated actions (list terminated by the END action).
3108  * @param[in] external
3109  *   This flow rule is created by request external to PMD.
3110  * @param[out] error
3111  *   Perform verbose error reporting if not NULL.
3112  * @return
3113  *   0 on success, negative value otherwise
3114  */
3115 static int
3116 flow_create_split_metadata(struct rte_eth_dev *dev,
3117                            struct rte_flow *flow,
3118                            const struct rte_flow_attr *attr,
3119                            const struct rte_flow_item items[],
3120                            const struct rte_flow_action actions[],
3121                            bool external, struct rte_flow_error *error)
3122 {
3123         struct mlx5_priv *priv = dev->data->dev_private;
3124         struct mlx5_dev_config *config = &priv->config;
3125         const struct rte_flow_action *qrss = NULL;
3126         struct rte_flow_action *ext_actions = NULL;
3127         struct mlx5_flow *dev_flow = NULL;
3128         uint32_t qrss_id = 0;
3129         size_t act_size;
3130         int actions_n;
3131         int ret;
3132
3133         /* Check whether extensive metadata feature is engaged. */
3134         if (!config->dv_flow_en ||
3135             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3136             !mlx5_flow_ext_mreg_supported(dev))
3137                 return flow_create_split_inner(dev, flow, NULL, attr, items,
3138                                                actions, external, error);
3139         actions_n = flow_parse_qrss_action(actions, &qrss);
3140         if (qrss) {
3141                 /* Exclude hairpin flows from splitting. */
3142                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3143                         const struct rte_flow_action_queue *queue;
3144
3145                         queue = qrss->conf;
3146                         if (mlx5_rxq_get_type(dev, queue->index) ==
3147                             MLX5_RXQ_TYPE_HAIRPIN)
3148                                 qrss = NULL;
3149                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3150                         const struct rte_flow_action_rss *rss;
3151
3152                         rss = qrss->conf;
3153                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3154                             MLX5_RXQ_TYPE_HAIRPIN)
3155                                 qrss = NULL;
3156                 }
3157         }
3158         if (qrss) {
3159                 /*
3160                  * Q/RSS action on NIC Rx should be split in order to pass by
3161                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3162                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3163                  */
3164                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3165                            sizeof(struct rte_flow_action_set_tag) +
3166                            sizeof(struct rte_flow_action_jump);
3167                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3168                 if (!ext_actions)
3169                         return rte_flow_error_set(error, ENOMEM,
3170                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3171                                                   NULL, "no memory to split "
3172                                                   "metadata flow");
3173                 /*
3174                  * Create the new actions list with removed Q/RSS action
3175                  * and appended set tag and jump to register copy table
3176                  * (RX_CP_TBL). We should preallocate unique tag ID here
3177                  * in advance, because it is needed for set tag action.
3178                  */
3179                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3180                                                     qrss, actions_n, error);
3181                 if (!qrss_id) {
3182                         ret = -rte_errno;
3183                         goto exit;
3184                 }
3185         } else if (attr->egress && !attr->transfer) {
3186                 /*
3187                  * All the actions on NIC Tx should have a metadata register
3188                  * copy action to copy reg_a from WQE to reg_c[meta]
3189                  */
3190                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3191                            sizeof(struct mlx5_flow_action_copy_mreg);
3192                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3193                 if (!ext_actions)
3194                         return rte_flow_error_set(error, ENOMEM,
3195                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3196                                                   NULL, "no memory to split "
3197                                                   "metadata flow");
3198                 /* Create the action list appended with copy register. */
3199                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3200                                              actions_n, error);
3201                 if (ret < 0)
3202                         goto exit;
3203         }
3204         /* Add the unmodified original or prefix subflow. */
3205         ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3206                                       ext_actions ? ext_actions : actions,
3207                                       external, error);
3208         if (ret < 0)
3209                 goto exit;
3210         assert(dev_flow);
3211         if (qrss_id) {
3212                 const struct rte_flow_attr q_attr = {
3213                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3214                         .ingress = 1,
3215                 };
3216                 /* Internal PMD action to set register. */
3217                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3218                         .data = qrss_id,
3219                         .id = 0,
3220                 };
3221                 struct rte_flow_item q_items[] = {
3222                         {
3223                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3224                                 .spec = &q_tag_spec,
3225                                 .last = NULL,
3226                                 .mask = NULL,
3227                         },
3228                         {
3229                                 .type = RTE_FLOW_ITEM_TYPE_END,
3230                         },
3231                 };
3232                 struct rte_flow_action q_actions[] = {
3233                         {
3234                                 .type = qrss->type,
3235                                 .conf = qrss->conf,
3236                         },
3237                         {
3238                                 .type = RTE_FLOW_ACTION_TYPE_END,
3239                         },
3240                 };
3241                 uint64_t hash_fields = dev_flow->hash_fields;
3242                 /*
3243                  * Put unique id in prefix flow due to it is destroyed after
3244                  * prefix flow and id will be freed after there is no actual
3245                  * flows with this id and identifier reallocation becomes
3246                  * possible (for example, for other flows in other threads).
3247                  */
3248                 dev_flow->qrss_id = qrss_id;
3249                 qrss_id = 0;
3250                 dev_flow = NULL;
3251                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3252                 if (ret < 0)
3253                         goto exit;
3254                 q_tag_spec.id = ret;
3255                 /* Add suffix subflow to execute Q/RSS. */
3256                 ret = flow_create_split_inner(dev, flow, &dev_flow,
3257                                               &q_attr, q_items, q_actions,
3258                                               external, error);
3259                 if (ret < 0)
3260                         goto exit;
3261                 assert(dev_flow);
3262                 dev_flow->hash_fields = hash_fields;
3263         }
3264
3265 exit:
3266         /*
3267          * We do not destroy the partially created sub_flows in case of error.
3268          * These ones are included into parent flow list and will be destroyed
3269          * by flow_drv_destroy.
3270          */
3271         flow_qrss_free_id(dev, qrss_id);
3272         rte_free(ext_actions);
3273         return ret;
3274 }
3275
3276 /**
3277  * Split the flow to subflow set. The splitters might be linked
3278  * in the chain, like this:
3279  * flow_create_split_outer() calls:
3280  *   flow_create_split_meter() calls:
3281  *     flow_create_split_metadata(meter_subflow_0) calls:
3282  *       flow_create_split_inner(metadata_subflow_0)
3283  *       flow_create_split_inner(metadata_subflow_1)
3284  *       flow_create_split_inner(metadata_subflow_2)
3285  *     flow_create_split_metadata(meter_subflow_1) calls:
3286  *       flow_create_split_inner(metadata_subflow_0)
3287  *       flow_create_split_inner(metadata_subflow_1)
3288  *       flow_create_split_inner(metadata_subflow_2)
3289  *
3290  * This provide flexible way to add new levels of flow splitting.
3291  * The all of successfully created subflows are included to the
3292  * parent flow dev_flow list.
3293  *
3294  * @param dev
3295  *   Pointer to Ethernet device.
3296  * @param[in] flow
3297  *   Parent flow structure pointer.
3298  * @param[in] attr
3299  *   Flow rule attributes.
3300  * @param[in] items
3301  *   Pattern specification (list terminated by the END pattern item).
3302  * @param[in] actions
3303  *   Associated actions (list terminated by the END action).
3304  * @param[in] external
3305  *   This flow rule is created by request external to PMD.
3306  * @param[out] error
3307  *   Perform verbose error reporting if not NULL.
3308  * @return
3309  *   0 on success, negative value otherwise
3310  */
3311 static int
3312 flow_create_split_outer(struct rte_eth_dev *dev,
3313                         struct rte_flow *flow,
3314                         const struct rte_flow_attr *attr,
3315                         const struct rte_flow_item items[],
3316                         const struct rte_flow_action actions[],
3317                         bool external, struct rte_flow_error *error)
3318 {
3319         int ret;
3320
3321         ret = flow_create_split_metadata(dev, flow, attr, items,
3322                                          actions, external, error);
3323         assert(ret <= 0);
3324         return ret;
3325 }
3326
3327 /**
3328  * Create a flow and add it to @p list.
3329  *
3330  * @param dev
3331  *   Pointer to Ethernet device.
3332  * @param list
3333  *   Pointer to a TAILQ flow list. If this parameter NULL,
3334  *   no list insertion occurred, flow is just created,
3335  *   this is caller's responsibility to track the
3336  *   created flow.
3337  * @param[in] attr
3338  *   Flow rule attributes.
3339  * @param[in] items
3340  *   Pattern specification (list terminated by the END pattern item).
3341  * @param[in] actions
3342  *   Associated actions (list terminated by the END action).
3343  * @param[in] external
3344  *   This flow rule is created by request external to PMD.
3345  * @param[out] error
3346  *   Perform verbose error reporting if not NULL.
3347  *
3348  * @return
3349  *   A flow on success, NULL otherwise and rte_errno is set.
3350  */
3351 static struct rte_flow *
3352 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
3353                  const struct rte_flow_attr *attr,
3354                  const struct rte_flow_item items[],
3355                  const struct rte_flow_action actions[],
3356                  bool external, struct rte_flow_error *error)
3357 {
3358         struct mlx5_priv *priv = dev->data->dev_private;
3359         struct rte_flow *flow = NULL;
3360         struct mlx5_flow *dev_flow;
3361         const struct rte_flow_action_rss *rss;
3362         union {
3363                 struct rte_flow_expand_rss buf;
3364                 uint8_t buffer[2048];
3365         } expand_buffer;
3366         union {
3367                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3368                 uint8_t buffer[2048];
3369         } actions_rx;
3370         union {
3371                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3372                 uint8_t buffer[2048];
3373         } actions_hairpin_tx;
3374         union {
3375                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
3376                 uint8_t buffer[2048];
3377         } items_tx;
3378         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
3379         const struct rte_flow_action *p_actions_rx = actions;
3380         int ret;
3381         uint32_t i;
3382         uint32_t flow_size;
3383         int hairpin_flow = 0;
3384         uint32_t hairpin_id = 0;
3385         struct rte_flow_attr attr_tx = { .priority = 0 };
3386
3387         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
3388         if (hairpin_flow > 0) {
3389                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
3390                         rte_errno = EINVAL;
3391                         return NULL;
3392                 }
3393                 flow_hairpin_split(dev, actions, actions_rx.actions,
3394                                    actions_hairpin_tx.actions, items_tx.items,
3395                                    &hairpin_id);
3396                 p_actions_rx = actions_rx.actions;
3397         }
3398         ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
3399                                 error);
3400         if (ret < 0)
3401                 goto error_before_flow;
3402         flow_size = sizeof(struct rte_flow);
3403         rss = flow_get_rss_action(p_actions_rx);
3404         if (rss)
3405                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
3406                                             sizeof(void *));
3407         else
3408                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
3409         flow = rte_calloc(__func__, 1, flow_size, 0);
3410         if (!flow) {
3411                 rte_errno = ENOMEM;
3412                 goto error_before_flow;
3413         }
3414         flow->drv_type = flow_get_drv_type(dev, attr);
3415         if (hairpin_id != 0)
3416                 flow->hairpin_flow_id = hairpin_id;
3417         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
3418                flow->drv_type < MLX5_FLOW_TYPE_MAX);
3419         flow->rss.queue = (void *)(flow + 1);
3420         if (rss) {
3421                 /*
3422                  * The following information is required by
3423                  * mlx5_flow_hashfields_adjust() in advance.
3424                  */
3425                 flow->rss.level = rss->level;
3426                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
3427                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
3428         }
3429         LIST_INIT(&flow->dev_flows);
3430         if (rss && rss->types) {
3431                 unsigned int graph_root;
3432
3433                 graph_root = find_graph_root(items, rss->level);
3434                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
3435                                           items, rss->types,
3436                                           mlx5_support_expansion,
3437                                           graph_root);
3438                 assert(ret > 0 &&
3439                        (unsigned int)ret < sizeof(expand_buffer.buffer));
3440         } else {
3441                 buf->entries = 1;
3442                 buf->entry[0].pattern = (void *)(uintptr_t)items;
3443         }
3444         for (i = 0; i < buf->entries; ++i) {
3445                 /*
3446                  * The splitter may create multiple dev_flows,
3447                  * depending on configuration. In the simplest
3448                  * case it just creates unmodified original flow.
3449                  */
3450                 ret = flow_create_split_outer(dev, flow, attr,
3451                                               buf->entry[i].pattern,
3452                                               p_actions_rx, external,
3453                                               error);
3454                 if (ret < 0)
3455                         goto error;
3456         }
3457         /* Create the tx flow. */
3458         if (hairpin_flow) {
3459                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
3460                 attr_tx.ingress = 0;
3461                 attr_tx.egress = 1;
3462                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
3463                                             actions_hairpin_tx.actions, error);
3464                 if (!dev_flow)
3465                         goto error;
3466                 dev_flow->flow = flow;
3467                 dev_flow->external = 0;
3468                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3469                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
3470                                          items_tx.items,
3471                                          actions_hairpin_tx.actions, error);
3472                 if (ret < 0)
3473                         goto error;
3474         }
3475         if (dev->data->dev_started) {
3476                 ret = flow_drv_apply(dev, flow, error);
3477                 if (ret < 0)
3478                         goto error;
3479         }
3480         if (list)
3481                 TAILQ_INSERT_TAIL(list, flow, next);
3482         flow_rxq_flags_set(dev, flow);
3483         return flow;
3484 error_before_flow:
3485         if (hairpin_id)
3486                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3487                                      hairpin_id);
3488         return NULL;
3489 error:
3490         ret = rte_errno; /* Save rte_errno before cleanup. */
3491         if (flow->hairpin_flow_id)
3492                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3493                                      flow->hairpin_flow_id);
3494         assert(flow);
3495         flow_drv_destroy(dev, flow);
3496         rte_free(flow);
3497         rte_errno = ret; /* Restore rte_errno. */
3498         return NULL;
3499 }
3500
3501 /**
3502  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
3503  * incoming packets to table 1.
3504  *
3505  * Other flow rules, requested for group n, will be created in
3506  * e-switch table n+1.
3507  * Jump action to e-switch group n will be created to group n+1.
3508  *
3509  * Used when working in switchdev mode, to utilise advantages of table 1
3510  * and above.
3511  *
3512  * @param dev
3513  *   Pointer to Ethernet device.
3514  *
3515  * @return
3516  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
3517  */
3518 struct rte_flow *
3519 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
3520 {
3521         const struct rte_flow_attr attr = {
3522                 .group = 0,
3523                 .priority = 0,
3524                 .ingress = 1,
3525                 .egress = 0,
3526                 .transfer = 1,
3527         };
3528         const struct rte_flow_item pattern = {
3529                 .type = RTE_FLOW_ITEM_TYPE_END,
3530         };
3531         struct rte_flow_action_jump jump = {
3532                 .group = 1,
3533         };
3534         const struct rte_flow_action actions[] = {
3535                 {
3536                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3537                         .conf = &jump,
3538                 },
3539                 {
3540                         .type = RTE_FLOW_ACTION_TYPE_END,
3541                 },
3542         };
3543         struct mlx5_priv *priv = dev->data->dev_private;
3544         struct rte_flow_error error;
3545
3546         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
3547                                 actions, false, &error);
3548 }
3549
3550 /**
3551  * Create a flow.
3552  *
3553  * @see rte_flow_create()
3554  * @see rte_flow_ops
3555  */
3556 struct rte_flow *
3557 mlx5_flow_create(struct rte_eth_dev *dev,
3558                  const struct rte_flow_attr *attr,
3559                  const struct rte_flow_item items[],
3560                  const struct rte_flow_action actions[],
3561                  struct rte_flow_error *error)
3562 {
3563         struct mlx5_priv *priv = dev->data->dev_private;
3564
3565         return flow_list_create(dev, &priv->flows,
3566                                 attr, items, actions, true, error);
3567 }
3568
3569 /**
3570  * Destroy a flow in a list.
3571  *
3572  * @param dev
3573  *   Pointer to Ethernet device.
3574  * @param list
3575  *   Pointer to a TAILQ flow list. If this parameter NULL,
3576  *   there is no flow removal from the list.
3577  * @param[in] flow
3578  *   Flow to destroy.
3579  */
3580 static void
3581 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
3582                   struct rte_flow *flow)
3583 {
3584         struct mlx5_priv *priv = dev->data->dev_private;
3585
3586         /*
3587          * Update RX queue flags only if port is started, otherwise it is
3588          * already clean.
3589          */
3590         if (dev->data->dev_started)
3591                 flow_rxq_flags_trim(dev, flow);
3592         if (flow->hairpin_flow_id)
3593                 mlx5_flow_id_release(priv->sh->flow_id_pool,
3594                                      flow->hairpin_flow_id);
3595         flow_drv_destroy(dev, flow);
3596         if (list)
3597                 TAILQ_REMOVE(list, flow, next);
3598         rte_free(flow->fdir);
3599         rte_free(flow);
3600 }
3601
3602 /**
3603  * Destroy all flows.
3604  *
3605  * @param dev
3606  *   Pointer to Ethernet device.
3607  * @param list
3608  *   Pointer to a TAILQ flow list.
3609  */
3610 void
3611 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
3612 {
3613         while (!TAILQ_EMPTY(list)) {
3614                 struct rte_flow *flow;
3615
3616                 flow = TAILQ_FIRST(list);
3617                 flow_list_destroy(dev, list, flow);
3618         }
3619 }
3620
3621 /**
3622  * Remove all flows.
3623  *
3624  * @param dev
3625  *   Pointer to Ethernet device.
3626  * @param list
3627  *   Pointer to a TAILQ flow list.
3628  */
3629 void
3630 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
3631 {
3632         struct rte_flow *flow;
3633
3634         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
3635                 flow_drv_remove(dev, flow);
3636         flow_rxq_flags_clear(dev);
3637 }
3638
3639 /**
3640  * Add all flows.
3641  *
3642  * @param dev
3643  *   Pointer to Ethernet device.
3644  * @param list
3645  *   Pointer to a TAILQ flow list.
3646  *
3647  * @return
3648  *   0 on success, a negative errno value otherwise and rte_errno is set.
3649  */
3650 int
3651 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
3652 {
3653         struct rte_flow *flow;
3654         struct rte_flow_error error;
3655         int ret = 0;
3656
3657         TAILQ_FOREACH(flow, list, next) {
3658                 ret = flow_drv_apply(dev, flow, &error);
3659                 if (ret < 0)
3660                         goto error;
3661                 flow_rxq_flags_set(dev, flow);
3662         }
3663         return 0;
3664 error:
3665         ret = rte_errno; /* Save rte_errno before cleanup. */
3666         mlx5_flow_stop(dev, list);
3667         rte_errno = ret; /* Restore rte_errno. */
3668         return -rte_errno;
3669 }
3670
3671 /**
3672  * Verify the flow list is empty
3673  *
3674  * @param dev
3675  *  Pointer to Ethernet device.
3676  *
3677  * @return the number of flows not released.
3678  */
3679 int
3680 mlx5_flow_verify(struct rte_eth_dev *dev)
3681 {
3682         struct mlx5_priv *priv = dev->data->dev_private;
3683         struct rte_flow *flow;
3684         int ret = 0;
3685
3686         TAILQ_FOREACH(flow, &priv->flows, next) {
3687                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
3688                         dev->data->port_id, (void *)flow);
3689                 ++ret;
3690         }
3691         return ret;
3692 }
3693
3694 /**
3695  * Enable default hairpin egress flow.
3696  *
3697  * @param dev
3698  *   Pointer to Ethernet device.
3699  * @param queue
3700  *   The queue index.
3701  *
3702  * @return
3703  *   0 on success, a negative errno value otherwise and rte_errno is set.
3704  */
3705 int
3706 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
3707                             uint32_t queue)
3708 {
3709         struct mlx5_priv *priv = dev->data->dev_private;
3710         const struct rte_flow_attr attr = {
3711                 .egress = 1,
3712                 .priority = 0,
3713         };
3714         struct mlx5_rte_flow_item_tx_queue queue_spec = {
3715                 .queue = queue,
3716         };
3717         struct mlx5_rte_flow_item_tx_queue queue_mask = {
3718                 .queue = UINT32_MAX,
3719         };
3720         struct rte_flow_item items[] = {
3721                 {
3722                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
3723                         .spec = &queue_spec,
3724                         .last = NULL,
3725                         .mask = &queue_mask,
3726                 },
3727                 {
3728                         .type = RTE_FLOW_ITEM_TYPE_END,
3729                 },
3730         };
3731         struct rte_flow_action_jump jump = {
3732                 .group = MLX5_HAIRPIN_TX_TABLE,
3733         };
3734         struct rte_flow_action actions[2];
3735         struct rte_flow *flow;
3736         struct rte_flow_error error;
3737
3738         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
3739         actions[0].conf = &jump;
3740         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
3741         flow = flow_list_create(dev, &priv->ctrl_flows,
3742                                 &attr, items, actions, false, &error);
3743         if (!flow) {
3744                 DRV_LOG(DEBUG,
3745                         "Failed to create ctrl flow: rte_errno(%d),"
3746                         " type(%d), message(%s)",
3747                         rte_errno, error.type,
3748                         error.message ? error.message : " (no stated reason)");
3749                 return -rte_errno;
3750         }
3751         return 0;
3752 }
3753
3754 /**
3755  * Enable a control flow configured from the control plane.
3756  *
3757  * @param dev
3758  *   Pointer to Ethernet device.
3759  * @param eth_spec
3760  *   An Ethernet flow spec to apply.
3761  * @param eth_mask
3762  *   An Ethernet flow mask to apply.
3763  * @param vlan_spec
3764  *   A VLAN flow spec to apply.
3765  * @param vlan_mask
3766  *   A VLAN flow mask to apply.
3767  *
3768  * @return
3769  *   0 on success, a negative errno value otherwise and rte_errno is set.
3770  */
3771 int
3772 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
3773                     struct rte_flow_item_eth *eth_spec,
3774                     struct rte_flow_item_eth *eth_mask,
3775                     struct rte_flow_item_vlan *vlan_spec,
3776                     struct rte_flow_item_vlan *vlan_mask)
3777 {
3778         struct mlx5_priv *priv = dev->data->dev_private;
3779         const struct rte_flow_attr attr = {
3780                 .ingress = 1,
3781                 .priority = MLX5_FLOW_PRIO_RSVD,
3782         };
3783         struct rte_flow_item items[] = {
3784                 {
3785                         .type = RTE_FLOW_ITEM_TYPE_ETH,
3786                         .spec = eth_spec,
3787                         .last = NULL,
3788                         .mask = eth_mask,
3789                 },
3790                 {
3791                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
3792                                               RTE_FLOW_ITEM_TYPE_END,
3793                         .spec = vlan_spec,
3794                         .last = NULL,
3795                         .mask = vlan_mask,
3796                 },
3797                 {
3798                         .type = RTE_FLOW_ITEM_TYPE_END,
3799                 },
3800         };
3801         uint16_t queue[priv->reta_idx_n];
3802         struct rte_flow_action_rss action_rss = {
3803                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
3804                 .level = 0,
3805                 .types = priv->rss_conf.rss_hf,
3806                 .key_len = priv->rss_conf.rss_key_len,
3807                 .queue_num = priv->reta_idx_n,
3808                 .key = priv->rss_conf.rss_key,
3809                 .queue = queue,
3810         };
3811         struct rte_flow_action actions[] = {
3812                 {
3813                         .type = RTE_FLOW_ACTION_TYPE_RSS,
3814                         .conf = &action_rss,
3815                 },
3816                 {
3817                         .type = RTE_FLOW_ACTION_TYPE_END,
3818                 },
3819         };
3820         struct rte_flow *flow;
3821         struct rte_flow_error error;
3822         unsigned int i;
3823
3824         if (!priv->reta_idx_n || !priv->rxqs_n) {
3825                 return 0;
3826         }
3827         for (i = 0; i != priv->reta_idx_n; ++i)
3828                 queue[i] = (*priv->reta_idx)[i];
3829         flow = flow_list_create(dev, &priv->ctrl_flows,
3830                                 &attr, items, actions, false, &error);
3831         if (!flow)
3832                 return -rte_errno;
3833         return 0;
3834 }
3835
3836 /**
3837  * Enable a flow control configured from the control plane.
3838  *
3839  * @param dev
3840  *   Pointer to Ethernet device.
3841  * @param eth_spec
3842  *   An Ethernet flow spec to apply.
3843  * @param eth_mask
3844  *   An Ethernet flow mask to apply.
3845  *
3846  * @return
3847  *   0 on success, a negative errno value otherwise and rte_errno is set.
3848  */
3849 int
3850 mlx5_ctrl_flow(struct rte_eth_dev *dev,
3851                struct rte_flow_item_eth *eth_spec,
3852                struct rte_flow_item_eth *eth_mask)
3853 {
3854         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
3855 }
3856
3857 /**
3858  * Destroy a flow.
3859  *
3860  * @see rte_flow_destroy()
3861  * @see rte_flow_ops
3862  */
3863 int
3864 mlx5_flow_destroy(struct rte_eth_dev *dev,
3865                   struct rte_flow *flow,
3866                   struct rte_flow_error *error __rte_unused)
3867 {
3868         struct mlx5_priv *priv = dev->data->dev_private;
3869
3870         flow_list_destroy(dev, &priv->flows, flow);
3871         return 0;
3872 }
3873
3874 /**
3875  * Destroy all flows.
3876  *
3877  * @see rte_flow_flush()
3878  * @see rte_flow_ops
3879  */
3880 int
3881 mlx5_flow_flush(struct rte_eth_dev *dev,
3882                 struct rte_flow_error *error __rte_unused)
3883 {
3884         struct mlx5_priv *priv = dev->data->dev_private;
3885
3886         mlx5_flow_list_flush(dev, &priv->flows);
3887         return 0;
3888 }
3889
3890 /**
3891  * Isolated mode.
3892  *
3893  * @see rte_flow_isolate()
3894  * @see rte_flow_ops
3895  */
3896 int
3897 mlx5_flow_isolate(struct rte_eth_dev *dev,
3898                   int enable,
3899                   struct rte_flow_error *error)
3900 {
3901         struct mlx5_priv *priv = dev->data->dev_private;
3902
3903         if (dev->data->dev_started) {
3904                 rte_flow_error_set(error, EBUSY,
3905                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3906                                    NULL,
3907                                    "port must be stopped first");
3908                 return -rte_errno;
3909         }
3910         priv->isolated = !!enable;
3911         if (enable)
3912                 dev->dev_ops = &mlx5_dev_ops_isolate;
3913         else
3914                 dev->dev_ops = &mlx5_dev_ops;
3915         return 0;
3916 }
3917
3918 /**
3919  * Query a flow.
3920  *
3921  * @see rte_flow_query()
3922  * @see rte_flow_ops
3923  */
3924 static int
3925 flow_drv_query(struct rte_eth_dev *dev,
3926                struct rte_flow *flow,
3927                const struct rte_flow_action *actions,
3928                void *data,
3929                struct rte_flow_error *error)
3930 {
3931         const struct mlx5_flow_driver_ops *fops;
3932         enum mlx5_flow_drv_type ftype = flow->drv_type;
3933
3934         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
3935         fops = flow_get_drv_ops(ftype);
3936
3937         return fops->query(dev, flow, actions, data, error);
3938 }
3939
3940 /**
3941  * Query a flow.
3942  *
3943  * @see rte_flow_query()
3944  * @see rte_flow_ops
3945  */
3946 int
3947 mlx5_flow_query(struct rte_eth_dev *dev,
3948                 struct rte_flow *flow,
3949                 const struct rte_flow_action *actions,
3950                 void *data,
3951                 struct rte_flow_error *error)
3952 {
3953         int ret;
3954
3955         ret = flow_drv_query(dev, flow, actions, data, error);
3956         if (ret < 0)
3957                 return ret;
3958         return 0;
3959 }
3960
3961 /**
3962  * Convert a flow director filter to a generic flow.
3963  *
3964  * @param dev
3965  *   Pointer to Ethernet device.
3966  * @param fdir_filter
3967  *   Flow director filter to add.
3968  * @param attributes
3969  *   Generic flow parameters structure.
3970  *
3971  * @return
3972  *   0 on success, a negative errno value otherwise and rte_errno is set.
3973  */
3974 static int
3975 flow_fdir_filter_convert(struct rte_eth_dev *dev,
3976                          const struct rte_eth_fdir_filter *fdir_filter,
3977                          struct mlx5_fdir *attributes)
3978 {
3979         struct mlx5_priv *priv = dev->data->dev_private;
3980         const struct rte_eth_fdir_input *input = &fdir_filter->input;
3981         const struct rte_eth_fdir_masks *mask =
3982                 &dev->data->dev_conf.fdir_conf.mask;
3983
3984         /* Validate queue number. */
3985         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
3986                 DRV_LOG(ERR, "port %u invalid queue number %d",
3987                         dev->data->port_id, fdir_filter->action.rx_queue);
3988                 rte_errno = EINVAL;
3989                 return -rte_errno;
3990         }
3991         attributes->attr.ingress = 1;
3992         attributes->items[0] = (struct rte_flow_item) {
3993                 .type = RTE_FLOW_ITEM_TYPE_ETH,
3994                 .spec = &attributes->l2,
3995                 .mask = &attributes->l2_mask,
3996         };
3997         switch (fdir_filter->action.behavior) {
3998         case RTE_ETH_FDIR_ACCEPT:
3999                 attributes->actions[0] = (struct rte_flow_action){
4000                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4001                         .conf = &attributes->queue,
4002                 };
4003                 break;
4004         case RTE_ETH_FDIR_REJECT:
4005                 attributes->actions[0] = (struct rte_flow_action){
4006                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4007                 };
4008                 break;
4009         default:
4010                 DRV_LOG(ERR, "port %u invalid behavior %d",
4011                         dev->data->port_id,
4012                         fdir_filter->action.behavior);
4013                 rte_errno = ENOTSUP;
4014                 return -rte_errno;
4015         }
4016         attributes->queue.index = fdir_filter->action.rx_queue;
4017         /* Handle L3. */
4018         switch (fdir_filter->input.flow_type) {
4019         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4020         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4021         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4022                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4023                         .src_addr = input->flow.ip4_flow.src_ip,
4024                         .dst_addr = input->flow.ip4_flow.dst_ip,
4025                         .time_to_live = input->flow.ip4_flow.ttl,
4026                         .type_of_service = input->flow.ip4_flow.tos,
4027                 };
4028                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4029                         .src_addr = mask->ipv4_mask.src_ip,
4030                         .dst_addr = mask->ipv4_mask.dst_ip,
4031                         .time_to_live = mask->ipv4_mask.ttl,
4032                         .type_of_service = mask->ipv4_mask.tos,
4033                         .next_proto_id = mask->ipv4_mask.proto,
4034                 };
4035                 attributes->items[1] = (struct rte_flow_item){
4036                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4037                         .spec = &attributes->l3,
4038                         .mask = &attributes->l3_mask,
4039                 };
4040                 break;
4041         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4042         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4043         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4044                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4045                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4046                         .proto = input->flow.ipv6_flow.proto,
4047                 };
4048
4049                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4050                        input->flow.ipv6_flow.src_ip,
4051                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4052                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4053                        input->flow.ipv6_flow.dst_ip,
4054                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4055                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4056                        mask->ipv6_mask.src_ip,
4057                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4058                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4059                        mask->ipv6_mask.dst_ip,
4060                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4061                 attributes->items[1] = (struct rte_flow_item){
4062                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4063                         .spec = &attributes->l3,
4064                         .mask = &attributes->l3_mask,
4065                 };
4066                 break;
4067         default:
4068                 DRV_LOG(ERR, "port %u invalid flow type%d",
4069                         dev->data->port_id, fdir_filter->input.flow_type);
4070                 rte_errno = ENOTSUP;
4071                 return -rte_errno;
4072         }
4073         /* Handle L4. */
4074         switch (fdir_filter->input.flow_type) {
4075         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4076                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4077                         .src_port = input->flow.udp4_flow.src_port,
4078                         .dst_port = input->flow.udp4_flow.dst_port,
4079                 };
4080                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4081                         .src_port = mask->src_port_mask,
4082                         .dst_port = mask->dst_port_mask,
4083                 };
4084                 attributes->items[2] = (struct rte_flow_item){
4085                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4086                         .spec = &attributes->l4,
4087                         .mask = &attributes->l4_mask,
4088                 };
4089                 break;
4090         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4091                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4092                         .src_port = input->flow.tcp4_flow.src_port,
4093                         .dst_port = input->flow.tcp4_flow.dst_port,
4094                 };
4095                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4096                         .src_port = mask->src_port_mask,
4097                         .dst_port = mask->dst_port_mask,
4098                 };
4099                 attributes->items[2] = (struct rte_flow_item){
4100                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4101                         .spec = &attributes->l4,
4102                         .mask = &attributes->l4_mask,
4103                 };
4104                 break;
4105         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4106                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4107                         .src_port = input->flow.udp6_flow.src_port,
4108                         .dst_port = input->flow.udp6_flow.dst_port,
4109                 };
4110                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4111                         .src_port = mask->src_port_mask,
4112                         .dst_port = mask->dst_port_mask,
4113                 };
4114                 attributes->items[2] = (struct rte_flow_item){
4115                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4116                         .spec = &attributes->l4,
4117                         .mask = &attributes->l4_mask,
4118                 };
4119                 break;
4120         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4121                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4122                         .src_port = input->flow.tcp6_flow.src_port,
4123                         .dst_port = input->flow.tcp6_flow.dst_port,
4124                 };
4125                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4126                         .src_port = mask->src_port_mask,
4127                         .dst_port = mask->dst_port_mask,
4128                 };
4129                 attributes->items[2] = (struct rte_flow_item){
4130                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4131                         .spec = &attributes->l4,
4132                         .mask = &attributes->l4_mask,
4133                 };
4134                 break;
4135         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4136         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4137                 break;
4138         default:
4139                 DRV_LOG(ERR, "port %u invalid flow type%d",
4140                         dev->data->port_id, fdir_filter->input.flow_type);
4141                 rte_errno = ENOTSUP;
4142                 return -rte_errno;
4143         }
4144         return 0;
4145 }
4146
4147 #define FLOW_FDIR_CMP(f1, f2, fld) \
4148         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4149
4150 /**
4151  * Compare two FDIR flows. If items and actions are identical, the two flows are
4152  * regarded as same.
4153  *
4154  * @param dev
4155  *   Pointer to Ethernet device.
4156  * @param f1
4157  *   FDIR flow to compare.
4158  * @param f2
4159  *   FDIR flow to compare.
4160  *
4161  * @return
4162  *   Zero on match, 1 otherwise.
4163  */
4164 static int
4165 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4166 {
4167         if (FLOW_FDIR_CMP(f1, f2, attr) ||
4168             FLOW_FDIR_CMP(f1, f2, l2) ||
4169             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4170             FLOW_FDIR_CMP(f1, f2, l3) ||
4171             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4172             FLOW_FDIR_CMP(f1, f2, l4) ||
4173             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4174             FLOW_FDIR_CMP(f1, f2, actions[0].type))
4175                 return 1;
4176         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4177             FLOW_FDIR_CMP(f1, f2, queue))
4178                 return 1;
4179         return 0;
4180 }
4181
4182 /**
4183  * Search device flow list to find out a matched FDIR flow.
4184  *
4185  * @param dev
4186  *   Pointer to Ethernet device.
4187  * @param fdir_flow
4188  *   FDIR flow to lookup.
4189  *
4190  * @return
4191  *   Pointer of flow if found, NULL otherwise.
4192  */
4193 static struct rte_flow *
4194 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
4195 {
4196         struct mlx5_priv *priv = dev->data->dev_private;
4197         struct rte_flow *flow = NULL;
4198
4199         assert(fdir_flow);
4200         TAILQ_FOREACH(flow, &priv->flows, next) {
4201                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
4202                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
4203                                 dev->data->port_id, (void *)flow);
4204                         break;
4205                 }
4206         }
4207         return flow;
4208 }
4209
4210 /**
4211  * Add new flow director filter and store it in list.
4212  *
4213  * @param dev
4214  *   Pointer to Ethernet device.
4215  * @param fdir_filter
4216  *   Flow director filter to add.
4217  *
4218  * @return
4219  *   0 on success, a negative errno value otherwise and rte_errno is set.
4220  */
4221 static int
4222 flow_fdir_filter_add(struct rte_eth_dev *dev,
4223                      const struct rte_eth_fdir_filter *fdir_filter)
4224 {
4225         struct mlx5_priv *priv = dev->data->dev_private;
4226         struct mlx5_fdir *fdir_flow;
4227         struct rte_flow *flow;
4228         int ret;
4229
4230         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
4231         if (!fdir_flow) {
4232                 rte_errno = ENOMEM;
4233                 return -rte_errno;
4234         }
4235         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
4236         if (ret)
4237                 goto error;
4238         flow = flow_fdir_filter_lookup(dev, fdir_flow);
4239         if (flow) {
4240                 rte_errno = EEXIST;
4241                 goto error;
4242         }
4243         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
4244                                 fdir_flow->items, fdir_flow->actions, true,
4245                                 NULL);
4246         if (!flow)
4247                 goto error;
4248         assert(!flow->fdir);
4249         flow->fdir = fdir_flow;
4250         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
4251                 dev->data->port_id, (void *)flow);
4252         return 0;
4253 error:
4254         rte_free(fdir_flow);
4255         return -rte_errno;
4256 }
4257
4258 /**
4259  * Delete specific filter.
4260  *
4261  * @param dev
4262  *   Pointer to Ethernet device.
4263  * @param fdir_filter
4264  *   Filter to be deleted.
4265  *
4266  * @return
4267  *   0 on success, a negative errno value otherwise and rte_errno is set.
4268  */
4269 static int
4270 flow_fdir_filter_delete(struct rte_eth_dev *dev,
4271                         const struct rte_eth_fdir_filter *fdir_filter)
4272 {
4273         struct mlx5_priv *priv = dev->data->dev_private;
4274         struct rte_flow *flow;
4275         struct mlx5_fdir fdir_flow = {
4276                 .attr.group = 0,
4277         };
4278         int ret;
4279
4280         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
4281         if (ret)
4282                 return -rte_errno;
4283         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
4284         if (!flow) {
4285                 rte_errno = ENOENT;
4286                 return -rte_errno;
4287         }
4288         flow_list_destroy(dev, &priv->flows, flow);
4289         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
4290                 dev->data->port_id, (void *)flow);
4291         return 0;
4292 }
4293
4294 /**
4295  * Update queue for specific filter.
4296  *
4297  * @param dev
4298  *   Pointer to Ethernet device.
4299  * @param fdir_filter
4300  *   Filter to be updated.
4301  *
4302  * @return
4303  *   0 on success, a negative errno value otherwise and rte_errno is set.
4304  */
4305 static int
4306 flow_fdir_filter_update(struct rte_eth_dev *dev,
4307                         const struct rte_eth_fdir_filter *fdir_filter)
4308 {
4309         int ret;
4310
4311         ret = flow_fdir_filter_delete(dev, fdir_filter);
4312         if (ret)
4313                 return ret;
4314         return flow_fdir_filter_add(dev, fdir_filter);
4315 }
4316
4317 /**
4318  * Flush all filters.
4319  *
4320  * @param dev
4321  *   Pointer to Ethernet device.
4322  */
4323 static void
4324 flow_fdir_filter_flush(struct rte_eth_dev *dev)
4325 {
4326         struct mlx5_priv *priv = dev->data->dev_private;
4327
4328         mlx5_flow_list_flush(dev, &priv->flows);
4329 }
4330
4331 /**
4332  * Get flow director information.
4333  *
4334  * @param dev
4335  *   Pointer to Ethernet device.
4336  * @param[out] fdir_info
4337  *   Resulting flow director information.
4338  */
4339 static void
4340 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
4341 {
4342         struct rte_eth_fdir_masks *mask =
4343                 &dev->data->dev_conf.fdir_conf.mask;
4344
4345         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
4346         fdir_info->guarant_spc = 0;
4347         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
4348         fdir_info->max_flexpayload = 0;
4349         fdir_info->flow_types_mask[0] = 0;
4350         fdir_info->flex_payload_unit = 0;
4351         fdir_info->max_flex_payload_segment_num = 0;
4352         fdir_info->flex_payload_limit = 0;
4353         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
4354 }
4355
4356 /**
4357  * Deal with flow director operations.
4358  *
4359  * @param dev
4360  *   Pointer to Ethernet device.
4361  * @param filter_op
4362  *   Operation to perform.
4363  * @param arg
4364  *   Pointer to operation-specific structure.
4365  *
4366  * @return
4367  *   0 on success, a negative errno value otherwise and rte_errno is set.
4368  */
4369 static int
4370 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
4371                     void *arg)
4372 {
4373         enum rte_fdir_mode fdir_mode =
4374                 dev->data->dev_conf.fdir_conf.mode;
4375
4376         if (filter_op == RTE_ETH_FILTER_NOP)
4377                 return 0;
4378         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
4379             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
4380                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
4381                         dev->data->port_id, fdir_mode);
4382                 rte_errno = EINVAL;
4383                 return -rte_errno;
4384         }
4385         switch (filter_op) {
4386         case RTE_ETH_FILTER_ADD:
4387                 return flow_fdir_filter_add(dev, arg);
4388         case RTE_ETH_FILTER_UPDATE:
4389                 return flow_fdir_filter_update(dev, arg);
4390         case RTE_ETH_FILTER_DELETE:
4391                 return flow_fdir_filter_delete(dev, arg);
4392         case RTE_ETH_FILTER_FLUSH:
4393                 flow_fdir_filter_flush(dev);
4394                 break;
4395         case RTE_ETH_FILTER_INFO:
4396                 flow_fdir_info_get(dev, arg);
4397                 break;
4398         default:
4399                 DRV_LOG(DEBUG, "port %u unknown operation %u",
4400                         dev->data->port_id, filter_op);
4401                 rte_errno = EINVAL;
4402                 return -rte_errno;
4403         }
4404         return 0;
4405 }
4406
4407 /**
4408  * Manage filter operations.
4409  *
4410  * @param dev
4411  *   Pointer to Ethernet device structure.
4412  * @param filter_type
4413  *   Filter type.
4414  * @param filter_op
4415  *   Operation to perform.
4416  * @param arg
4417  *   Pointer to operation-specific structure.
4418  *
4419  * @return
4420  *   0 on success, a negative errno value otherwise and rte_errno is set.
4421  */
4422 int
4423 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
4424                      enum rte_filter_type filter_type,
4425                      enum rte_filter_op filter_op,
4426                      void *arg)
4427 {
4428         switch (filter_type) {
4429         case RTE_ETH_FILTER_GENERIC:
4430                 if (filter_op != RTE_ETH_FILTER_GET) {
4431                         rte_errno = EINVAL;
4432                         return -rte_errno;
4433                 }
4434                 *(const void **)arg = &mlx5_flow_ops;
4435                 return 0;
4436         case RTE_ETH_FILTER_FDIR:
4437                 return flow_fdir_ctrl_func(dev, filter_op, arg);
4438         default:
4439                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
4440                         dev->data->port_id, filter_type);
4441                 rte_errno = ENOTSUP;
4442                 return -rte_errno;
4443         }
4444         return 0;
4445 }
4446
4447 #define MLX5_POOL_QUERY_FREQ_US 1000000
4448
4449 /**
4450  * Set the periodic procedure for triggering asynchronous batch queries for all
4451  * the counter pools.
4452  *
4453  * @param[in] sh
4454  *   Pointer to mlx5_ibv_shared object.
4455  */
4456 void
4457 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
4458 {
4459         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
4460         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
4461         uint32_t us;
4462
4463         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
4464         pools_n += rte_atomic16_read(&cont->n_valid);
4465         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
4466         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
4467         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
4468                 sh->cmng.query_thread_on = 0;
4469                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
4470         } else {
4471                 sh->cmng.query_thread_on = 1;
4472         }
4473 }
4474
4475 /**
4476  * The periodic procedure for triggering asynchronous batch queries for all the
4477  * counter pools. This function is probably called by the host thread.
4478  *
4479  * @param[in] arg
4480  *   The parameter for the alarm process.
4481  */
4482 void
4483 mlx5_flow_query_alarm(void *arg)
4484 {
4485         struct mlx5_ibv_shared *sh = arg;
4486         struct mlx5_devx_obj *dcs;
4487         uint16_t offset;
4488         int ret;
4489         uint8_t batch = sh->cmng.batch;
4490         uint16_t pool_index = sh->cmng.pool_index;
4491         struct mlx5_pools_container *cont;
4492         struct mlx5_pools_container *mcont;
4493         struct mlx5_flow_counter_pool *pool;
4494
4495         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
4496                 goto set_alarm;
4497 next_container:
4498         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
4499         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
4500         /* Check if resize was done and need to flip a container. */
4501         if (cont != mcont) {
4502                 if (cont->pools) {
4503                         /* Clean the old container. */
4504                         rte_free(cont->pools);
4505                         memset(cont, 0, sizeof(*cont));
4506                 }
4507                 rte_cio_wmb();
4508                  /* Flip the host container. */
4509                 sh->cmng.mhi[batch] ^= (uint8_t)2;
4510                 cont = mcont;
4511         }
4512         if (!cont->pools) {
4513                 /* 2 empty containers case is unexpected. */
4514                 if (unlikely(batch != sh->cmng.batch))
4515                         goto set_alarm;
4516                 batch ^= 0x1;
4517                 pool_index = 0;
4518                 goto next_container;
4519         }
4520         pool = cont->pools[pool_index];
4521         if (pool->raw_hw)
4522                 /* There is a pool query in progress. */
4523                 goto set_alarm;
4524         pool->raw_hw =
4525                 LIST_FIRST(&sh->cmng.free_stat_raws);
4526         if (!pool->raw_hw)
4527                 /* No free counter statistics raw memory. */
4528                 goto set_alarm;
4529         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
4530                                                               (&pool->a64_dcs);
4531         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
4532         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
4533                                                offset, NULL, NULL,
4534                                                pool->raw_hw->mem_mng->dm->id,
4535                                                (void *)(uintptr_t)
4536                                                (pool->raw_hw->data + offset),
4537                                                sh->devx_comp,
4538                                                (uint64_t)(uintptr_t)pool);
4539         if (ret) {
4540                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
4541                         " %d", pool->min_dcs->id);
4542                 pool->raw_hw = NULL;
4543                 goto set_alarm;
4544         }
4545         pool->raw_hw->min_dcs_id = dcs->id;
4546         LIST_REMOVE(pool->raw_hw, next);
4547         sh->cmng.pending_queries++;
4548         pool_index++;
4549         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
4550                 batch ^= 0x1;
4551                 pool_index = 0;
4552         }
4553 set_alarm:
4554         sh->cmng.batch = batch;
4555         sh->cmng.pool_index = pool_index;
4556         mlx5_set_query_alarm(sh);
4557 }
4558
4559 /**
4560  * Handler for the HW respond about ready values from an asynchronous batch
4561  * query. This function is probably called by the host thread.
4562  *
4563  * @param[in] sh
4564  *   The pointer to the shared IB device context.
4565  * @param[in] async_id
4566  *   The Devx async ID.
4567  * @param[in] status
4568  *   The status of the completion.
4569  */
4570 void
4571 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
4572                                   uint64_t async_id, int status)
4573 {
4574         struct mlx5_flow_counter_pool *pool =
4575                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
4576         struct mlx5_counter_stats_raw *raw_to_free;
4577
4578         if (unlikely(status)) {
4579                 raw_to_free = pool->raw_hw;
4580         } else {
4581                 raw_to_free = pool->raw;
4582                 rte_spinlock_lock(&pool->sl);
4583                 pool->raw = pool->raw_hw;
4584                 rte_spinlock_unlock(&pool->sl);
4585                 rte_atomic64_add(&pool->query_gen, 1);
4586                 /* Be sure the new raw counters data is updated in memory. */
4587                 rte_cio_wmb();
4588         }
4589         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
4590         pool->raw_hw = NULL;
4591         sh->cmng.pending_queries--;
4592 }
4593
4594 /**
4595  * Translate the rte_flow group index to HW table value.
4596  *
4597  * @param[in] attributes
4598  *   Pointer to flow attributes
4599  * @param[in] external
4600  *   Value is part of flow rule created by request external to PMD.
4601  * @param[in] group
4602  *   rte_flow group index value.
4603  * @param[out] table
4604  *   HW table value.
4605  * @param[out] error
4606  *   Pointer to error structure.
4607  *
4608  * @return
4609  *   0 on success, a negative errno value otherwise and rte_errno is set.
4610  */
4611 int
4612 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
4613                          uint32_t group, uint32_t *table,
4614                          struct rte_flow_error *error)
4615 {
4616         if (attributes->transfer && external) {
4617                 if (group == UINT32_MAX)
4618                         return rte_flow_error_set
4619                                                 (error, EINVAL,
4620                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4621                                                  NULL,
4622                                                  "group index not supported");
4623                 *table = group + 1;
4624         } else {
4625                 *table = group;
4626         }
4627         return 0;
4628 }
4629
4630 /**
4631  * Discover availability of metadata reg_c's.
4632  *
4633  * Iteratively use test flows to check availability.
4634  *
4635  * @param[in] dev
4636  *   Pointer to the Ethernet device structure.
4637  *
4638  * @return
4639  *   0 on success, a negative errno value otherwise and rte_errno is set.
4640  */
4641 int
4642 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
4643 {
4644         struct mlx5_priv *priv = dev->data->dev_private;
4645         struct mlx5_dev_config *config = &priv->config;
4646         enum modify_reg idx;
4647         int n = 0;
4648
4649         /* reg_c[0] and reg_c[1] are reserved. */
4650         config->flow_mreg_c[n++] = REG_C_0;
4651         config->flow_mreg_c[n++] = REG_C_1;
4652         /* Discover availability of other reg_c's. */
4653         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
4654                 struct rte_flow_attr attr = {
4655                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4656                         .priority = MLX5_FLOW_PRIO_RSVD,
4657                         .ingress = 1,
4658                 };
4659                 struct rte_flow_item items[] = {
4660                         [0] = {
4661                                 .type = RTE_FLOW_ITEM_TYPE_END,
4662                         },
4663                 };
4664                 struct rte_flow_action actions[] = {
4665                         [0] = {
4666                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4667                                 .conf = &(struct mlx5_flow_action_copy_mreg){
4668                                         .src = REG_C_1,
4669                                         .dst = idx,
4670                                 },
4671                         },
4672                         [1] = {
4673                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4674                                 .conf = &(struct rte_flow_action_jump){
4675                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4676                                 },
4677                         },
4678                         [2] = {
4679                                 .type = RTE_FLOW_ACTION_TYPE_END,
4680                         },
4681                 };
4682                 struct rte_flow *flow;
4683                 struct rte_flow_error error;
4684
4685                 if (!config->dv_flow_en)
4686                         break;
4687                 /* Create internal flow, validation skips copy action. */
4688                 flow = flow_list_create(dev, NULL, &attr, items,
4689                                         actions, false, &error);
4690                 if (!flow)
4691                         continue;
4692                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
4693                         config->flow_mreg_c[n++] = idx;
4694                 flow_list_destroy(dev, NULL, flow);
4695         }
4696         for (; n < MLX5_MREG_C_NUM; ++n)
4697                 config->flow_mreg_c[n] = REG_NONE;
4698         return 0;
4699 }