drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         default:
 262                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 263                 break;
 264         }
 265         return ret;
 266 }
 267
 268 static const int *
 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 270                 const int *next_node)
 271 {
 272         const struct mlx5_flow_expand_node *node = NULL;
 273         const int *next = next_node;
 274
 275         while (next && *next) {
 276                 /*
 277                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 278                  * flag set, because they were not found in the flow pattern.
 279                  */
 280                 node = &graph[*next];
 281                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 282                         break;
 283                 next = node->next;
 284         }
 285         return next;
 286 }
 287
 288 #define MLX5_RSS_EXP_ELT_N 16
 289
 290 /**
 291  * Expand RSS flows into several possible flows according to the RSS hash
 292  * fields requested and the driver capabilities.
 293  *
 294  * @param[out] buf
 295  *   Buffer to store the result expansion.
 296  * @param[in] size
 297  *   Buffer size in bytes. If 0, @p buf can be NULL.
 298  * @param[in] pattern
 299  *   User flow pattern.
 300  * @param[in] types
 301  *   RSS types to expand (see ETH_RSS_* definitions).
 302  * @param[in] graph
 303  *   Input graph to expand @p pattern according to @p types.
 304  * @param[in] graph_root_index
 305  *   Index of root node in @p graph, typically 0.
 306  *
 307  * @return
 308  *   A positive value representing the size of @p buf in bytes regardless of
 309  *   @p size on success, a negative errno value otherwise and rte_errno is
 310  *   set, the following errors are defined:
 311  *
 312  *   -E2BIG: graph-depth @p graph is too deep.
 313  *   -EINVAL: @p size has not enough space for expanded pattern.
 314  */
 315 static int
 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 317                      const struct rte_flow_item *pattern, uint64_t types,
 318                      const struct mlx5_flow_expand_node graph[],
 319                      int graph_root_index)
 320 {
 321         const struct rte_flow_item *item;
 322         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 323         const int *next_node;
 324         const int *stack[MLX5_RSS_EXP_ELT_N];
 325         int stack_pos = 0;
 326         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 327         unsigned int i, item_idx, last_expand_item_idx = 0;
 328         size_t lsize;
 329         size_t user_pattern_size = 0;
 330         void *addr = NULL;
 331         const struct mlx5_flow_expand_node *next = NULL;
 332         struct rte_flow_item missed_item;
 333         int missed = 0;
 334         int elt = 0;
 335         const struct rte_flow_item *last_expand_item = NULL;
 336
 337         memset(&missed_item, 0, sizeof(missed_item));
 338         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 339                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 340         if (lsize > size)
 341                 return -EINVAL;
 342         buf->entry[0].priority = 0;
 343         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 344         buf->entries = 0;
 345         addr = buf->entry[0].pattern;
 346         for (item = pattern, item_idx = 0;
 347                         item->type != RTE_FLOW_ITEM_TYPE_END;
 348                         item++, item_idx++) {
 349                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 350                         user_pattern_size += sizeof(*item);
 351                         continue;
 352                 }
 353                 last_expand_item = item;
 354                 last_expand_item_idx = item_idx;
 355                 i = 0;
 356                 while (node->next && node->next[i]) {
 357                         next = &graph[node->next[i]];
 358                         if (next->type == item->type)
 359                                 break;
 360                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 361                                 node = next;
 362                                 i = 0;
 363                         } else {
 364                                 ++i;
 365                         }
 366                 }
 367                 if (next)
 368                         node = next;
 369                 user_pattern_size += sizeof(*item);
 370         }
 371         user_pattern_size += sizeof(*item); /* Handle END item. */
 372         lsize += user_pattern_size;
 373         if (lsize > size)
 374                 return -EINVAL;
 375         /* Copy the user pattern in the first entry of the buffer. */
 376         rte_memcpy(addr, pattern, user_pattern_size);
 377         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378         buf->entries = 1;
 379         /* Start expanding. */
 380         memset(flow_items, 0, sizeof(flow_items));
 381         user_pattern_size -= sizeof(*item);
 382         /*
 383          * Check if the last valid item has spec set, need complete pattern,
 384          * and the pattern can be used for expansion.
 385          */
 386         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 387         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 388                 /* Item type END indicates expansion is not required. */
 389                 return lsize;
 390         }
 391         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 392                 next = NULL;
 393                 missed = 1;
 394                 for (i = 0; node->next && node->next[i]; ++i) {
 395                         next = &graph[node->next[i]];
 396                         if (next->type == missed_item.type) {
 397                                 flow_items[0].type = missed_item.type;
 398                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 399                                 break;
 400                         }
 401                         next = NULL;
 402                 }
 403         }
 404         if (next && missed) {
 405                 elt = 2; /* missed item + item end. */
 406                 node = next;
 407                 lsize += elt * sizeof(*item) + user_pattern_size;
 408                 if (lsize > size)
 409                         return -EINVAL;
 410                 if (node->rss_types & types) {
 411                         buf->entry[buf->entries].priority = 1;
 412                         buf->entry[buf->entries].pattern = addr;
 413                         buf->entries++;
 414                         rte_memcpy(addr, buf->entry[0].pattern,
 415                                    user_pattern_size);
 416                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 417                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 418                         addr = (void *)(((uintptr_t)addr) +
 419                                         elt * sizeof(*item));
 420                 }
 421         } else if (last_expand_item != NULL) {
 422                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 423                                 last_expand_item_idx, graph, node);
 424         }
 425         memset(flow_items, 0, sizeof(flow_items));
 426         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 427                         node->next);
 428         stack[stack_pos] = next_node;
 429         node = next_node ? &graph[*next_node] : NULL;
 430         while (node) {
 431                 flow_items[stack_pos].type = node->type;
 432                 if (node->rss_types & types) {
 433                         size_t n;
 434                         /*
 435                          * compute the number of items to copy from the
 436                          * expansion and copy it.
 437                          * When the stack_pos is 0, there are 1 element in it,
 438                          * plus the addition END item.
 439                          */
 440                         elt = stack_pos + 2;
 441                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 442                         lsize += elt * sizeof(*item) + user_pattern_size;
 443                         if (lsize > size)
 444                                 return -EINVAL;
 445                         n = elt * sizeof(*item);
 446                         buf->entry[buf->entries].priority =
 447                                 stack_pos + 1 + missed;
 448                         buf->entry[buf->entries].pattern = addr;
 449                         buf->entries++;
 450                         rte_memcpy(addr, buf->entry[0].pattern,
 451                                    user_pattern_size);
 452                         addr = (void *)(((uintptr_t)addr) +
 453                                         user_pattern_size);
 454                         rte_memcpy(addr, &missed_item,
 455                                    missed * sizeof(*item));
 456                         addr = (void *)(((uintptr_t)addr) +
 457                                 missed * sizeof(*item));
 458                         rte_memcpy(addr, flow_items, n);
 459                         addr = (void *)(((uintptr_t)addr) + n);
 460                 }
 461                 /* Go deeper. */
 462                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 463                                 node->next) {
 464                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 465                                         node->next);
 466                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 467                                 rte_errno = E2BIG;
 468                                 return -rte_errno;
 469                         }
 470                         stack[stack_pos] = next_node;
 471                 } else if (*(next_node + 1)) {
 472                         /* Follow up with the next possibility. */
 473                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 474                                         ++next_node);
 475                 } else if (!stack_pos) {
 476                         /*
 477                          * Completing the traverse over the different paths.
 478                          * The next_node is advanced to the terminator.
 479                          */
 480                         ++next_node;
 481                 } else {
 482                         /* Move to the next path. */
 483                         while (stack_pos) {
 484                                 next_node = stack[--stack_pos];
 485                                 next_node++;
 486                                 if (*next_node)
 487                                         break;
 488                         }
 489                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 490                                         next_node);
 491                         stack[stack_pos] = next_node;
 492                 }
 493                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 494         };
 495         return lsize;
 496 }
 497
 498 enum mlx5_expansion {
 499         MLX5_EXPANSION_ROOT,
 500         MLX5_EXPANSION_ROOT_OUTER,
 501         MLX5_EXPANSION_OUTER_ETH,
 502         MLX5_EXPANSION_OUTER_VLAN,
 503         MLX5_EXPANSION_OUTER_IPV4,
 504         MLX5_EXPANSION_OUTER_IPV4_UDP,
 505         MLX5_EXPANSION_OUTER_IPV4_TCP,
 506         MLX5_EXPANSION_OUTER_IPV6,
 507         MLX5_EXPANSION_OUTER_IPV6_UDP,
 508         MLX5_EXPANSION_OUTER_IPV6_TCP,
 509         MLX5_EXPANSION_VXLAN,
 510         MLX5_EXPANSION_STD_VXLAN,
 511         MLX5_EXPANSION_L3_VXLAN,
 512         MLX5_EXPANSION_VXLAN_GPE,
 513         MLX5_EXPANSION_GRE,
 514         MLX5_EXPANSION_NVGRE,
 515         MLX5_EXPANSION_GRE_KEY,
 516         MLX5_EXPANSION_MPLS,
 517         MLX5_EXPANSION_ETH,
 518         MLX5_EXPANSION_VLAN,
 519         MLX5_EXPANSION_IPV4,
 520         MLX5_EXPANSION_IPV4_UDP,
 521         MLX5_EXPANSION_IPV4_TCP,
 522         MLX5_EXPANSION_IPV6,
 523         MLX5_EXPANSION_IPV6_UDP,
 524         MLX5_EXPANSION_IPV6_TCP,
 525         MLX5_EXPANSION_IPV6_FRAG_EXT,
 526         MLX5_EXPANSION_GTP
 527 };
 528
 529 /** Supported expansion of items. */
 530 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 531         [MLX5_EXPANSION_ROOT] = {
 532                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 533                                                   MLX5_EXPANSION_IPV4,
 534                                                   MLX5_EXPANSION_IPV6),
 535                 .type = RTE_FLOW_ITEM_TYPE_END,
 536         },
 537         [MLX5_EXPANSION_ROOT_OUTER] = {
 538                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 539                                                   MLX5_EXPANSION_OUTER_IPV4,
 540                                                   MLX5_EXPANSION_OUTER_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_END,
 542         },
 543         [MLX5_EXPANSION_OUTER_ETH] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546                 .rss_types = 0,
 547         },
 548         [MLX5_EXPANSION_OUTER_VLAN] = {
 549                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 550                                                   MLX5_EXPANSION_OUTER_IPV6),
 551                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 552                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 553         },
 554         [MLX5_EXPANSION_OUTER_IPV4] = {
 555                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 556                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 557                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 558                          MLX5_EXPANSION_GRE,
 559                          MLX5_EXPANSION_NVGRE,
 560                          MLX5_EXPANSION_IPV4,
 561                          MLX5_EXPANSION_IPV6),
 562                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 563                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 564                         ETH_RSS_NONFRAG_IPV4_OTHER,
 565         },
 566         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 567                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 568                                                   MLX5_EXPANSION_VXLAN_GPE,
 569                                                   MLX5_EXPANSION_MPLS,
 570                                                   MLX5_EXPANSION_GTP),
 571                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 572                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 573         },
 574         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 577         },
 578         [MLX5_EXPANSION_OUTER_IPV6] = {
 579                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 580                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 581                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 582                          MLX5_EXPANSION_IPV4,
 583                          MLX5_EXPANSION_IPV6,
 584                          MLX5_EXPANSION_GRE,
 585                          MLX5_EXPANSION_NVGRE),
 586                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 587                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 588                         ETH_RSS_NONFRAG_IPV6_OTHER,
 589         },
 590         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 591                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 592                                                   MLX5_EXPANSION_VXLAN_GPE,
 593                                                   MLX5_EXPANSION_MPLS,
 594                                                   MLX5_EXPANSION_GTP),
 595                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 596                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 597         },
 598         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 599                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 600                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 601         },
 602         [MLX5_EXPANSION_VXLAN] = {
 603                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 604                                                   MLX5_EXPANSION_IPV4,
 605                                                   MLX5_EXPANSION_IPV6),
 606                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 607         },
 608         [MLX5_EXPANSION_STD_VXLAN] = {
 609                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 610                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 611         },
 612         [MLX5_EXPANSION_L3_VXLAN] = {
 613                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 614                                         MLX5_EXPANSION_IPV6),
 615                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 616         },
 617         [MLX5_EXPANSION_VXLAN_GPE] = {
 618                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 619                                                   MLX5_EXPANSION_IPV4,
 620                                                   MLX5_EXPANSION_IPV6),
 621                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 622         },
 623         [MLX5_EXPANSION_GRE] = {
 624                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 625                                                   MLX5_EXPANSION_IPV6,
 626                                                   MLX5_EXPANSION_GRE_KEY,
 627                                                   MLX5_EXPANSION_MPLS),
 628                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 629         },
 630         [MLX5_EXPANSION_GRE_KEY] = {
 631                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 632                                                   MLX5_EXPANSION_IPV6,
 633                                                   MLX5_EXPANSION_MPLS),
 634                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 635                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 636         },
 637         [MLX5_EXPANSION_NVGRE] = {
 638                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 639                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 640         },
 641         [MLX5_EXPANSION_MPLS] = {
 642                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 643                                                   MLX5_EXPANSION_IPV6,
 644                                                   MLX5_EXPANSION_ETH),
 645                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 646                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 647         },
 648         [MLX5_EXPANSION_ETH] = {
 649                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 650                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 651         },
 652         [MLX5_EXPANSION_VLAN] = {
 653                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 654                                                   MLX5_EXPANSION_IPV6),
 655                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 656                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 657         },
 658         [MLX5_EXPANSION_IPV4] = {
 659                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 660                                                   MLX5_EXPANSION_IPV4_TCP),
 661                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 662                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 663                         ETH_RSS_NONFRAG_IPV4_OTHER,
 664         },
 665         [MLX5_EXPANSION_IPV4_UDP] = {
 666                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 667                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 668         },
 669         [MLX5_EXPANSION_IPV4_TCP] = {
 670                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 671                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 672         },
 673         [MLX5_EXPANSION_IPV6] = {
 674                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 675                                                   MLX5_EXPANSION_IPV6_TCP,
 676                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 677                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 678                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 679                         ETH_RSS_NONFRAG_IPV6_OTHER,
 680         },
 681         [MLX5_EXPANSION_IPV6_UDP] = {
 682                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 683                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 684         },
 685         [MLX5_EXPANSION_IPV6_TCP] = {
 686                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 687                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 688         },
 689         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 690                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 691         },
 692         [MLX5_EXPANSION_GTP] = {
 693                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 694                                                   MLX5_EXPANSION_IPV6),
 695                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 696         },
 697 };
 698
 699 static struct rte_flow_action_handle *
 700 mlx5_action_handle_create(struct rte_eth_dev *dev,
 701                           const struct rte_flow_indir_action_conf *conf,
 702                           const struct rte_flow_action *action,
 703                           struct rte_flow_error *error);
 704 static int mlx5_action_handle_destroy
 705                                 (struct rte_eth_dev *dev,
 706                                  struct rte_flow_action_handle *handle,
 707                                  struct rte_flow_error *error);
 708 static int mlx5_action_handle_update
 709                                 (struct rte_eth_dev *dev,
 710                                  struct rte_flow_action_handle *handle,
 711                                  const void *update,
 712                                  struct rte_flow_error *error);
 713 static int mlx5_action_handle_query
 714                                 (struct rte_eth_dev *dev,
 715                                  const struct rte_flow_action_handle *handle,
 716                                  void *data,
 717                                  struct rte_flow_error *error);
 718 static int
 719 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 720                     struct rte_flow_tunnel *app_tunnel,
 721                     struct rte_flow_action **actions,
 722                     uint32_t *num_of_actions,
 723                     struct rte_flow_error *error);
 724 static int
 725 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 726                        struct rte_flow_tunnel *app_tunnel,
 727                        struct rte_flow_item **items,
 728                        uint32_t *num_of_items,
 729                        struct rte_flow_error *error);
 730 static int
 731 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 732                               struct rte_flow_item *pmd_items,
 733                               uint32_t num_items, struct rte_flow_error *err);
 734 static int
 735 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 736                                 struct rte_flow_action *pmd_actions,
 737                                 uint32_t num_actions,
 738                                 struct rte_flow_error *err);
 739 static int
 740 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 741                                   struct rte_mbuf *m,
 742                                   struct rte_flow_restore_info *info,
 743                                   struct rte_flow_error *err);
 744
 745 static const struct rte_flow_ops mlx5_flow_ops = {
 746         .validate = mlx5_flow_validate,
 747         .create = mlx5_flow_create,
 748         .destroy = mlx5_flow_destroy,
 749         .flush = mlx5_flow_flush,
 750         .isolate = mlx5_flow_isolate,
 751         .query = mlx5_flow_query,
 752         .dev_dump = mlx5_flow_dev_dump,
 753         .get_aged_flows = mlx5_flow_get_aged_flows,
 754         .action_handle_create = mlx5_action_handle_create,
 755         .action_handle_destroy = mlx5_action_handle_destroy,
 756         .action_handle_update = mlx5_action_handle_update,
 757         .action_handle_query = mlx5_action_handle_query,
 758         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 759         .tunnel_match = mlx5_flow_tunnel_match,
 760         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 761         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 762         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 763 };
 764
 765 /* Tunnel information. */
 766 struct mlx5_flow_tunnel_info {
 767         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 768         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 769 };
 770
 771 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 772         {
 773                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 774                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 775         },
 776         {
 777                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 778                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 779         },
 780         {
 781                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 782                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 783         },
 784         {
 785                 .tunnel = MLX5_FLOW_LAYER_GRE,
 786                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 787         },
 788         {
 789                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 790                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 791         },
 792         {
 793                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 794                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 795         },
 796         {
 797                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 798                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 799         },
 800         {
 801                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 802                 .ptype = RTE_PTYPE_TUNNEL_IP,
 803         },
 804         {
 805                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 806                 .ptype = RTE_PTYPE_TUNNEL_IP,
 807         },
 808         {
 809                 .tunnel = MLX5_FLOW_LAYER_GTP,
 810                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 811         },
 812 };
 813
 814
 815
 816 /**
 817  * Translate tag ID to register.
 818  *
 819  * @param[in] dev
 820  *   Pointer to the Ethernet device structure.
 821  * @param[in] feature
 822  *   The feature that request the register.
 823  * @param[in] id
 824  *   The request register ID.
 825  * @param[out] error
 826  *   Error description in case of any.
 827  *
 828  * @return
 829  *   The request register on success, a negative errno
 830  *   value otherwise and rte_errno is set.
 831  */
 832 int
 833 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 834                      enum mlx5_feature_name feature,
 835                      uint32_t id,
 836                      struct rte_flow_error *error)
 837 {
 838         struct mlx5_priv *priv = dev->data->dev_private;
 839         struct mlx5_dev_config *config = &priv->config;
 840         enum modify_reg start_reg;
 841         bool skip_mtr_reg = false;
 842
 843         switch (feature) {
 844         case MLX5_HAIRPIN_RX:
 845                 return REG_B;
 846         case MLX5_HAIRPIN_TX:
 847                 return REG_A;
 848         case MLX5_METADATA_RX:
 849                 switch (config->dv_xmeta_en) {
 850                 case MLX5_XMETA_MODE_LEGACY:
 851                         return REG_B;
 852                 case MLX5_XMETA_MODE_META16:
 853                         return REG_C_0;
 854                 case MLX5_XMETA_MODE_META32:
 855                         return REG_C_1;
 856                 }
 857                 break;
 858         case MLX5_METADATA_TX:
 859                 return REG_A;
 860         case MLX5_METADATA_FDB:
 861                 switch (config->dv_xmeta_en) {
 862                 case MLX5_XMETA_MODE_LEGACY:
 863                         return REG_NON;
 864                 case MLX5_XMETA_MODE_META16:
 865                         return REG_C_0;
 866                 case MLX5_XMETA_MODE_META32:
 867                         return REG_C_1;
 868                 }
 869                 break;
 870         case MLX5_FLOW_MARK:
 871                 switch (config->dv_xmeta_en) {
 872                 case MLX5_XMETA_MODE_LEGACY:
 873                         return REG_NON;
 874                 case MLX5_XMETA_MODE_META16:
 875                         return REG_C_1;
 876                 case MLX5_XMETA_MODE_META32:
 877                         return REG_C_0;
 878                 }
 879                 break;
 880         case MLX5_MTR_ID:
 881                 /*
 882                  * If meter color and meter id share one register, flow match
 883                  * should use the meter color register for match.
 884                  */
 885                 if (priv->mtr_reg_share)
 886                         return priv->mtr_color_reg;
 887                 else
 888                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 889                                REG_C_3;
 890         case MLX5_MTR_COLOR:
 891         case MLX5_ASO_FLOW_HIT:
 892         case MLX5_ASO_CONNTRACK:
 893                 /* All features use the same REG_C. */
 894                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 895                 return priv->mtr_color_reg;
 896         case MLX5_COPY_MARK:
 897                 /*
 898                  * Metadata COPY_MARK register using is in meter suffix sub
 899                  * flow while with meter. It's safe to share the same register.
 900                  */
 901                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 902         case MLX5_APP_TAG:
 903                 /*
 904                  * If meter is enable, it will engage the register for color
 905                  * match and flow match. If meter color match is not using the
 906                  * REG_C_2, need to skip the REG_C_x be used by meter color
 907                  * match.
 908                  * If meter is disable, free to use all available registers.
 909                  */
 910                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 911                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 912                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 913                 if (id > (uint32_t)(REG_C_7 - start_reg))
 914                         return rte_flow_error_set(error, EINVAL,
 915                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 916                                                   NULL, "invalid tag id");
 917                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 918                         return rte_flow_error_set(error, ENOTSUP,
 919                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 920                                                   NULL, "unsupported tag id");
 921                 /*
 922                  * This case means meter is using the REG_C_x great than 2.
 923                  * Take care not to conflict with meter color REG_C_x.
 924                  * If the available index REG_C_y >= REG_C_x, skip the
 925                  * color register.
 926                  */
 927                 if (skip_mtr_reg && config->flow_mreg_c
 928                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 929                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 930                                 return rte_flow_error_set(error, EINVAL,
 931                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 932                                                         NULL, "invalid tag id");
 933                         if (config->flow_mreg_c
 934                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 935                                 return config->flow_mreg_c
 936                                                [id + 1 + start_reg - REG_C_0];
 937                         return rte_flow_error_set(error, ENOTSUP,
 938                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 939                                                   NULL, "unsupported tag id");
 940                 }
 941                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 942         }
 943         MLX5_ASSERT(false);
 944         return rte_flow_error_set(error, EINVAL,
 945                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 946                                   NULL, "invalid feature name");
 947 }
 948
 949 /**
 950  * Check extensive flow metadata register support.
 951  *
 952  * @param dev
 953  *   Pointer to rte_eth_dev structure.
 954  *
 955  * @return
 956  *   True if device supports extensive flow metadata register, otherwise false.
 957  */
 958 bool
 959 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 960 {
 961         struct mlx5_priv *priv = dev->data->dev_private;
 962         struct mlx5_dev_config *config = &priv->config;
 963
 964         /*
 965          * Having available reg_c can be regarded inclusively as supporting
 966          * extensive flow metadata register, which could mean,
 967          * - metadata register copy action by modify header.
 968          * - 16 modify header actions is supported.
 969          * - reg_c's are preserved across different domain (FDB and NIC) on
 970          *   packet loopback by flow lookup miss.
 971          */
 972         return config->flow_mreg_c[2] != REG_NON;
 973 }
 974
 975 /**
 976  * Get the lowest priority.
 977  *
 978  * @param[in] dev
 979  *   Pointer to the Ethernet device structure.
 980  * @param[in] attributes
 981  *   Pointer to device flow rule attributes.
 982  *
 983  * @return
 984  *   The value of lowest priority of flow.
 985  */
 986 uint32_t
 987 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 988                           const struct rte_flow_attr *attr)
 989 {
 990         struct mlx5_priv *priv = dev->data->dev_private;
 991
 992         if (!attr->group && !attr->transfer)
 993                 return priv->config.flow_prio - 2;
 994         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 995 }
 996
 997 /**
 998  * Calculate matcher priority of the flow.
 999  *
1000  * @param[in] dev
1001  *   Pointer to the Ethernet device structure.
1002  * @param[in] attr
1003  *   Pointer to device flow rule attributes.
1004  * @param[in] subpriority
1005  *   The priority based on the items.
1006  * @param[in] external
1007  *   Flow is user flow.
1008  * @return
1009  *   The matcher priority of the flow.
1010  */
1011 uint16_t
1012 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1013                           const struct rte_flow_attr *attr,
1014                           uint32_t subpriority, bool external)
1015 {
1016         uint16_t priority = (uint16_t)attr->priority;
1017         struct mlx5_priv *priv = dev->data->dev_private;
1018
1019         if (!attr->group && !attr->transfer) {
1020                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1021                         priority = priv->config.flow_prio - 1;
1022                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1023         } else if (!external && attr->transfer && attr->group == 0 &&
1024                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1025                 return (priv->config.flow_prio - 1) * 3;
1026         }
1027         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1028                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1029         return priority * 3 + subpriority;
1030 }
1031
1032 /**
1033  * Verify the @p item specifications (spec, last, mask) are compatible with the
1034  * NIC capabilities.
1035  *
1036  * @param[in] item
1037  *   Item specification.
1038  * @param[in] mask
1039  *   @p item->mask or flow default bit-masks.
1040  * @param[in] nic_mask
1041  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1042  * @param[in] size
1043  *   Bit-masks size in bytes.
1044  * @param[in] range_accepted
1045  *   True if range of values is accepted for specific fields, false otherwise.
1046  * @param[out] error
1047  *   Pointer to error structure.
1048  *
1049  * @return
1050  *   0 on success, a negative errno value otherwise and rte_errno is set.
1051  */
1052 int
1053 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1054                           const uint8_t *mask,
1055                           const uint8_t *nic_mask,
1056                           unsigned int size,
1057                           bool range_accepted,
1058                           struct rte_flow_error *error)
1059 {
1060         unsigned int i;
1061
1062         MLX5_ASSERT(nic_mask);
1063         for (i = 0; i < size; ++i)
1064                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1065                         return rte_flow_error_set(error, ENOTSUP,
1066                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1067                                                   item,
1068                                                   "mask enables non supported"
1069                                                   " bits");
1070         if (!item->spec && (item->mask || item->last))
1071                 return rte_flow_error_set(error, EINVAL,
1072                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1073                                           "mask/last without a spec is not"
1074                                           " supported");
1075         if (item->spec && item->last && !range_accepted) {
1076                 uint8_t spec[size];
1077                 uint8_t last[size];
1078                 unsigned int i;
1079                 int ret;
1080
1081                 for (i = 0; i < size; ++i) {
1082                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1083                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1084                 }
1085                 ret = memcmp(spec, last, size);
1086                 if (ret != 0)
1087                         return rte_flow_error_set(error, EINVAL,
1088                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1089                                                   item,
1090                                                   "range is not valid");
1091         }
1092         return 0;
1093 }
1094
1095 /**
1096  * Adjust the hash fields according to the @p flow information.
1097  *
1098  * @param[in] dev_flow.
1099  *   Pointer to the mlx5_flow.
1100  * @param[in] tunnel
1101  *   1 when the hash field is for a tunnel item.
1102  * @param[in] layer_types
1103  *   ETH_RSS_* types.
1104  * @param[in] hash_fields
1105  *   Item hash fields.
1106  *
1107  * @return
1108  *   The hash fields that should be used.
1109  */
1110 uint64_t
1111 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1112                             int tunnel __rte_unused, uint64_t layer_types,
1113                             uint64_t hash_fields)
1114 {
1115 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1116         int rss_request_inner = rss_desc->level >= 2;
1117
1118         /* Check RSS hash level for tunnel. */
1119         if (tunnel && rss_request_inner)
1120                 hash_fields |= IBV_RX_HASH_INNER;
1121         else if (tunnel || rss_request_inner)
1122                 return 0;
1123 #endif
1124         /* Check if requested layer matches RSS hash fields. */
1125         if (!(rss_desc->types & layer_types))
1126                 return 0;
1127         return hash_fields;
1128 }
1129
1130 /**
1131  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1132  * if several tunnel rules are used on this queue, the tunnel ptype will be
1133  * cleared.
1134  *
1135  * @param rxq_ctrl
1136  *   Rx queue to update.
1137  */
1138 static void
1139 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1140 {
1141         unsigned int i;
1142         uint32_t tunnel_ptype = 0;
1143
1144         /* Look up for the ptype to use. */
1145         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1146                 if (!rxq_ctrl->flow_tunnels_n[i])
1147                         continue;
1148                 if (!tunnel_ptype) {
1149                         tunnel_ptype = tunnels_info[i].ptype;
1150                 } else {
1151                         tunnel_ptype = 0;
1152                         break;
1153                 }
1154         }
1155         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1156 }
1157
1158 /**
1159  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1160  * flow.
1161  *
1162  * @param[in] dev
1163  *   Pointer to the Ethernet device structure.
1164  * @param[in] dev_handle
1165  *   Pointer to device flow handle structure.
1166  */
1167 void
1168 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1169                        struct mlx5_flow_handle *dev_handle)
1170 {
1171         struct mlx5_priv *priv = dev->data->dev_private;
1172         const int mark = dev_handle->mark;
1173         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1174         struct mlx5_ind_table_obj *ind_tbl = NULL;
1175         unsigned int i;
1176
1177         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1178                 struct mlx5_hrxq *hrxq;
1179
1180                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1181                               dev_handle->rix_hrxq);
1182                 if (hrxq)
1183                         ind_tbl = hrxq->ind_table;
1184         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1185                 struct mlx5_shared_action_rss *shared_rss;
1186
1187                 shared_rss = mlx5_ipool_get
1188                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1189                          dev_handle->rix_srss);
1190                 if (shared_rss)
1191                         ind_tbl = shared_rss->ind_tbl;
1192         }
1193         if (!ind_tbl)
1194                 return;
1195         for (i = 0; i != ind_tbl->queues_n; ++i) {
1196                 int idx = ind_tbl->queues[i];
1197                 struct mlx5_rxq_ctrl *rxq_ctrl =
1198                         container_of((*priv->rxqs)[idx],
1199                                      struct mlx5_rxq_ctrl, rxq);
1200
1201                 /*
1202                  * To support metadata register copy on Tx loopback,
1203                  * this must be always enabled (metadata may arive
1204                  * from other port - not from local flows only.
1205                  */
1206                 if (priv->config.dv_flow_en &&
1207                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1208                     mlx5_flow_ext_mreg_supported(dev)) {
1209                         rxq_ctrl->rxq.mark = 1;
1210                         rxq_ctrl->flow_mark_n = 1;
1211                 } else if (mark) {
1212                         rxq_ctrl->rxq.mark = 1;
1213                         rxq_ctrl->flow_mark_n++;
1214                 }
1215                 if (tunnel) {
1216                         unsigned int j;
1217
1218                         /* Increase the counter matching the flow. */
1219                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1220                                 if ((tunnels_info[j].tunnel &
1221                                      dev_handle->layers) ==
1222                                     tunnels_info[j].tunnel) {
1223                                         rxq_ctrl->flow_tunnels_n[j]++;
1224                                         break;
1225                                 }
1226                         }
1227                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1228                 }
1229         }
1230 }
1231
1232 /**
1233  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1234  *
1235  * @param[in] dev
1236  *   Pointer to the Ethernet device structure.
1237  * @param[in] flow
1238  *   Pointer to flow structure.
1239  */
1240 static void
1241 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1242 {
1243         struct mlx5_priv *priv = dev->data->dev_private;
1244         uint32_t handle_idx;
1245         struct mlx5_flow_handle *dev_handle;
1246
1247         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1248                        handle_idx, dev_handle, next)
1249                 flow_drv_rxq_flags_set(dev, dev_handle);
1250 }
1251
1252 /**
1253  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1254  * device flow if no other flow uses it with the same kind of request.
1255  *
1256  * @param dev
1257  *   Pointer to Ethernet device.
1258  * @param[in] dev_handle
1259  *   Pointer to the device flow handle structure.
1260  */
1261 static void
1262 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1263                         struct mlx5_flow_handle *dev_handle)
1264 {
1265         struct mlx5_priv *priv = dev->data->dev_private;
1266         const int mark = dev_handle->mark;
1267         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1268         struct mlx5_ind_table_obj *ind_tbl = NULL;
1269         unsigned int i;
1270
1271         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1272                 struct mlx5_hrxq *hrxq;
1273
1274                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1275                               dev_handle->rix_hrxq);
1276                 if (hrxq)
1277                         ind_tbl = hrxq->ind_table;
1278         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1279                 struct mlx5_shared_action_rss *shared_rss;
1280
1281                 shared_rss = mlx5_ipool_get
1282                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1283                          dev_handle->rix_srss);
1284                 if (shared_rss)
1285                         ind_tbl = shared_rss->ind_tbl;
1286         }
1287         if (!ind_tbl)
1288                 return;
1289         MLX5_ASSERT(dev->data->dev_started);
1290         for (i = 0; i != ind_tbl->queues_n; ++i) {
1291                 int idx = ind_tbl->queues[i];
1292                 struct mlx5_rxq_ctrl *rxq_ctrl =
1293                         container_of((*priv->rxqs)[idx],
1294                                      struct mlx5_rxq_ctrl, rxq);
1295
1296                 if (priv->config.dv_flow_en &&
1297                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1298                     mlx5_flow_ext_mreg_supported(dev)) {
1299                         rxq_ctrl->rxq.mark = 1;
1300                         rxq_ctrl->flow_mark_n = 1;
1301                 } else if (mark) {
1302                         rxq_ctrl->flow_mark_n--;
1303                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1304                 }
1305                 if (tunnel) {
1306                         unsigned int j;
1307
1308                         /* Decrease the counter matching the flow. */
1309                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1310                                 if ((tunnels_info[j].tunnel &
1311                                      dev_handle->layers) ==
1312                                     tunnels_info[j].tunnel) {
1313                                         rxq_ctrl->flow_tunnels_n[j]--;
1314                                         break;
1315                                 }
1316                         }
1317                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1318                 }
1319         }
1320 }
1321
1322 /**
1323  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1324  * @p flow if no other flow uses it with the same kind of request.
1325  *
1326  * @param dev
1327  *   Pointer to Ethernet device.
1328  * @param[in] flow
1329  *   Pointer to the flow.
1330  */
1331 static void
1332 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1333 {
1334         struct mlx5_priv *priv = dev->data->dev_private;
1335         uint32_t handle_idx;
1336         struct mlx5_flow_handle *dev_handle;
1337
1338         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1339                        handle_idx, dev_handle, next)
1340                 flow_drv_rxq_flags_trim(dev, dev_handle);
1341 }
1342
1343 /**
1344  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1345  *
1346  * @param dev
1347  *   Pointer to Ethernet device.
1348  */
1349 static void
1350 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1351 {
1352         struct mlx5_priv *priv = dev->data->dev_private;
1353         unsigned int i;
1354
1355         for (i = 0; i != priv->rxqs_n; ++i) {
1356                 struct mlx5_rxq_ctrl *rxq_ctrl;
1357                 unsigned int j;
1358
1359                 if (!(*priv->rxqs)[i])
1360                         continue;
1361                 rxq_ctrl = container_of((*priv->rxqs)[i],
1362                                         struct mlx5_rxq_ctrl, rxq);
1363                 rxq_ctrl->flow_mark_n = 0;
1364                 rxq_ctrl->rxq.mark = 0;
1365                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1366                         rxq_ctrl->flow_tunnels_n[j] = 0;
1367                 rxq_ctrl->rxq.tunnel = 0;
1368         }
1369 }
1370
1371 /**
1372  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1373  *
1374  * @param[in] dev
1375  *   Pointer to the Ethernet device structure.
1376  */
1377 void
1378 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1379 {
1380         struct mlx5_priv *priv = dev->data->dev_private;
1381         struct mlx5_rxq_data *data;
1382         unsigned int i;
1383
1384         for (i = 0; i != priv->rxqs_n; ++i) {
1385                 if (!(*priv->rxqs)[i])
1386                         continue;
1387                 data = (*priv->rxqs)[i];
1388                 if (!rte_flow_dynf_metadata_avail()) {
1389                         data->dynf_meta = 0;
1390                         data->flow_meta_mask = 0;
1391                         data->flow_meta_offset = -1;
1392                         data->flow_meta_port_mask = 0;
1393                 } else {
1394                         data->dynf_meta = 1;
1395                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1396                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1397                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1398                 }
1399         }
1400 }
1401
1402 /*
1403  * return a pointer to the desired action in the list of actions.
1404  *
1405  * @param[in] actions
1406  *   The list of actions to search the action in.
1407  * @param[in] action
1408  *   The action to find.
1409  *
1410  * @return
1411  *   Pointer to the action in the list, if found. NULL otherwise.
1412  */
1413 const struct rte_flow_action *
1414 mlx5_flow_find_action(const struct rte_flow_action *actions,
1415                       enum rte_flow_action_type action)
1416 {
1417         if (actions == NULL)
1418                 return NULL;
1419         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1420                 if (actions->type == action)
1421                         return actions;
1422         return NULL;
1423 }
1424
1425 /*
1426  * Validate the flag action.
1427  *
1428  * @param[in] action_flags
1429  *   Bit-fields that holds the actions detected until now.
1430  * @param[in] attr
1431  *   Attributes of flow that includes this action.
1432  * @param[out] error
1433  *   Pointer to error structure.
1434  *
1435  * @return
1436  *   0 on success, a negative errno value otherwise and rte_errno is set.
1437  */
1438 int
1439 mlx5_flow_validate_action_flag(uint64_t action_flags,
1440                                const struct rte_flow_attr *attr,
1441                                struct rte_flow_error *error)
1442 {
1443         if (action_flags & MLX5_FLOW_ACTION_MARK)
1444                 return rte_flow_error_set(error, EINVAL,
1445                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1446                                           "can't mark and flag in same flow");
1447         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1448                 return rte_flow_error_set(error, EINVAL,
1449                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1450                                           "can't have 2 flag"
1451                                           " actions in same flow");
1452         if (attr->egress)
1453                 return rte_flow_error_set(error, ENOTSUP,
1454                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1455                                           "flag action not supported for "
1456                                           "egress");
1457         return 0;
1458 }
1459
1460 /*
1461  * Validate the mark action.
1462  *
1463  * @param[in] action
1464  *   Pointer to the queue action.
1465  * @param[in] action_flags
1466  *   Bit-fields that holds the actions detected until now.
1467  * @param[in] attr
1468  *   Attributes of flow that includes this action.
1469  * @param[out] error
1470  *   Pointer to error structure.
1471  *
1472  * @return
1473  *   0 on success, a negative errno value otherwise and rte_errno is set.
1474  */
1475 int
1476 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1477                                uint64_t action_flags,
1478                                const struct rte_flow_attr *attr,
1479                                struct rte_flow_error *error)
1480 {
1481         const struct rte_flow_action_mark *mark = action->conf;
1482
1483         if (!mark)
1484                 return rte_flow_error_set(error, EINVAL,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION,
1486                                           action,
1487                                           "configuration cannot be null");
1488         if (mark->id >= MLX5_FLOW_MARK_MAX)
1489                 return rte_flow_error_set(error, EINVAL,
1490                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1491                                           &mark->id,
1492                                           "mark id must in 0 <= id < "
1493                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1494         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1495                 return rte_flow_error_set(error, EINVAL,
1496                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1497                                           "can't flag and mark in same flow");
1498         if (action_flags & MLX5_FLOW_ACTION_MARK)
1499                 return rte_flow_error_set(error, EINVAL,
1500                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1501                                           "can't have 2 mark actions in same"
1502                                           " flow");
1503         if (attr->egress)
1504                 return rte_flow_error_set(error, ENOTSUP,
1505                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1506                                           "mark action not supported for "
1507                                           "egress");
1508         return 0;
1509 }
1510
1511 /*
1512  * Validate the drop action.
1513  *
1514  * @param[in] action_flags
1515  *   Bit-fields that holds the actions detected until now.
1516  * @param[in] attr
1517  *   Attributes of flow that includes this action.
1518  * @param[out] error
1519  *   Pointer to error structure.
1520  *
1521  * @return
1522  *   0 on success, a negative errno value otherwise and rte_errno is set.
1523  */
1524 int
1525 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1526                                const struct rte_flow_attr *attr,
1527                                struct rte_flow_error *error)
1528 {
1529         if (attr->egress)
1530                 return rte_flow_error_set(error, ENOTSUP,
1531                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1532                                           "drop action not supported for "
1533                                           "egress");
1534         return 0;
1535 }
1536
1537 /*
1538  * Validate the queue action.
1539  *
1540  * @param[in] action
1541  *   Pointer to the queue action.
1542  * @param[in] action_flags
1543  *   Bit-fields that holds the actions detected until now.
1544  * @param[in] dev
1545  *   Pointer to the Ethernet device structure.
1546  * @param[in] attr
1547  *   Attributes of flow that includes this action.
1548  * @param[out] error
1549  *   Pointer to error structure.
1550  *
1551  * @return
1552  *   0 on success, a negative errno value otherwise and rte_errno is set.
1553  */
1554 int
1555 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1556                                 uint64_t action_flags,
1557                                 struct rte_eth_dev *dev,
1558                                 const struct rte_flow_attr *attr,
1559                                 struct rte_flow_error *error)
1560 {
1561         struct mlx5_priv *priv = dev->data->dev_private;
1562         const struct rte_flow_action_queue *queue = action->conf;
1563
1564         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1565                 return rte_flow_error_set(error, EINVAL,
1566                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1567                                           "can't have 2 fate actions in"
1568                                           " same flow");
1569         if (!priv->rxqs_n)
1570                 return rte_flow_error_set(error, EINVAL,
1571                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1572                                           NULL, "No Rx queues configured");
1573         if (queue->index >= priv->rxqs_n)
1574                 return rte_flow_error_set(error, EINVAL,
1575                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1576                                           &queue->index,
1577                                           "queue index out of range");
1578         if (!(*priv->rxqs)[queue->index])
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1581                                           &queue->index,
1582                                           "queue is not configured");
1583         if (attr->egress)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1586                                           "queue action not supported for "
1587                                           "egress");
1588         return 0;
1589 }
1590
1591 /*
1592  * Validate the rss action.
1593  *
1594  * @param[in] dev
1595  *   Pointer to the Ethernet device structure.
1596  * @param[in] action
1597  *   Pointer to the queue action.
1598  * @param[out] error
1599  *   Pointer to error structure.
1600  *
1601  * @return
1602  *   0 on success, a negative errno value otherwise and rte_errno is set.
1603  */
1604 int
1605 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1606                          const struct rte_flow_action *action,
1607                          struct rte_flow_error *error)
1608 {
1609         struct mlx5_priv *priv = dev->data->dev_private;
1610         const struct rte_flow_action_rss *rss = action->conf;
1611         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1612         unsigned int i;
1613
1614         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1615             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1618                                           &rss->func,
1619                                           "RSS hash function not supported");
1620 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1621         if (rss->level > 2)
1622 #else
1623         if (rss->level > 1)
1624 #endif
1625                 return rte_flow_error_set(error, ENOTSUP,
1626                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1627                                           &rss->level,
1628                                           "tunnel RSS is not supported");
1629         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1630         if (rss->key_len == 0 && rss->key != NULL)
1631                 return rte_flow_error_set(error, ENOTSUP,
1632                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1633                                           &rss->key_len,
1634                                           "RSS hash key length 0");
1635         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1636                 return rte_flow_error_set(error, ENOTSUP,
1637                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1638                                           &rss->key_len,
1639                                           "RSS hash key too small");
1640         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1641                 return rte_flow_error_set(error, ENOTSUP,
1642                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1643                                           &rss->key_len,
1644                                           "RSS hash key too large");
1645         if (rss->queue_num > priv->config.ind_table_max_size)
1646                 return rte_flow_error_set(error, ENOTSUP,
1647                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1648                                           &rss->queue_num,
1649                                           "number of queues too large");
1650         if (rss->types & MLX5_RSS_HF_MASK)
1651                 return rte_flow_error_set(error, ENOTSUP,
1652                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1653                                           &rss->types,
1654                                           "some RSS protocols are not"
1655                                           " supported");
1656         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1657             !(rss->types & ETH_RSS_IP))
1658                 return rte_flow_error_set(error, EINVAL,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1660                                           "L3 partial RSS requested but L3 RSS"
1661                                           " type not specified");
1662         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1663             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1664                 return rte_flow_error_set(error, EINVAL,
1665                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1666                                           "L4 partial RSS requested but L4 RSS"
1667                                           " type not specified");
1668         if (!priv->rxqs_n)
1669                 return rte_flow_error_set(error, EINVAL,
1670                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1671                                           NULL, "No Rx queues configured");
1672         if (!rss->queue_num)
1673                 return rte_flow_error_set(error, EINVAL,
1674                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1675                                           NULL, "No queues configured");
1676         for (i = 0; i != rss->queue_num; ++i) {
1677                 struct mlx5_rxq_ctrl *rxq_ctrl;
1678
1679                 if (rss->queue[i] >= priv->rxqs_n)
1680                         return rte_flow_error_set
1681                                 (error, EINVAL,
1682                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1683                                  &rss->queue[i], "queue index out of range");
1684                 if (!(*priv->rxqs)[rss->queue[i]])
1685                         return rte_flow_error_set
1686                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1687                                  &rss->queue[i], "queue is not configured");
1688                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1689                                         struct mlx5_rxq_ctrl, rxq);
1690                 if (i == 0)
1691                         rxq_type = rxq_ctrl->type;
1692                 if (rxq_type != rxq_ctrl->type)
1693                         return rte_flow_error_set
1694                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1695                                  &rss->queue[i],
1696                                  "combining hairpin and regular RSS queues is not supported");
1697         }
1698         return 0;
1699 }
1700
1701 /*
1702  * Validate the rss action.
1703  *
1704  * @param[in] action
1705  *   Pointer to the queue action.
1706  * @param[in] action_flags
1707  *   Bit-fields that holds the actions detected until now.
1708  * @param[in] dev
1709  *   Pointer to the Ethernet device structure.
1710  * @param[in] attr
1711  *   Attributes of flow that includes this action.
1712  * @param[in] item_flags
1713  *   Items that were detected.
1714  * @param[out] error
1715  *   Pointer to error structure.
1716  *
1717  * @return
1718  *   0 on success, a negative errno value otherwise and rte_errno is set.
1719  */
1720 int
1721 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1722                               uint64_t action_flags,
1723                               struct rte_eth_dev *dev,
1724                               const struct rte_flow_attr *attr,
1725                               uint64_t item_flags,
1726                               struct rte_flow_error *error)
1727 {
1728         const struct rte_flow_action_rss *rss = action->conf;
1729         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1730         int ret;
1731
1732         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1735                                           "can't have 2 fate actions"
1736                                           " in same flow");
1737         ret = mlx5_validate_action_rss(dev, action, error);
1738         if (ret)
1739                 return ret;
1740         if (attr->egress)
1741                 return rte_flow_error_set(error, ENOTSUP,
1742                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1743                                           "rss action not supported for "
1744                                           "egress");
1745         if (rss->level > 1 && !tunnel)
1746                 return rte_flow_error_set(error, EINVAL,
1747                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1748                                           "inner RSS is not supported for "
1749                                           "non-tunnel flows");
1750         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1751             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1752                 return rte_flow_error_set(error, EINVAL,
1753                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1754                                           "RSS on eCPRI is not supported now");
1755         }
1756         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1757             !(item_flags &
1758               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1759             rss->level > 1)
1760                 return rte_flow_error_set(error, EINVAL,
1761                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1762                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1763         return 0;
1764 }
1765
1766 /*
1767  * Validate the default miss action.
1768  *
1769  * @param[in] action_flags
1770  *   Bit-fields that holds the actions detected until now.
1771  * @param[out] error
1772  *   Pointer to error structure.
1773  *
1774  * @return
1775  *   0 on success, a negative errno value otherwise and rte_errno is set.
1776  */
1777 int
1778 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1779                                 const struct rte_flow_attr *attr,
1780                                 struct rte_flow_error *error)
1781 {
1782         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1783                 return rte_flow_error_set(error, EINVAL,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "can't have 2 fate actions in"
1786                                           " same flow");
1787         if (attr->egress)
1788                 return rte_flow_error_set(error, ENOTSUP,
1789                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1790                                           "default miss action not supported "
1791                                           "for egress");
1792         if (attr->group)
1793                 return rte_flow_error_set(error, ENOTSUP,
1794                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1795                                           "only group 0 is supported");
1796         if (attr->transfer)
1797                 return rte_flow_error_set(error, ENOTSUP,
1798                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1799                                           NULL, "transfer is not supported");
1800         return 0;
1801 }
1802
1803 /*
1804  * Validate the count action.
1805  *
1806  * @param[in] dev
1807  *   Pointer to the Ethernet device structure.
1808  * @param[in] attr
1809  *   Attributes of flow that includes this action.
1810  * @param[out] error
1811  *   Pointer to error structure.
1812  *
1813  * @return
1814  *   0 on success, a negative errno value otherwise and rte_errno is set.
1815  */
1816 int
1817 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1818                                 const struct rte_flow_attr *attr,
1819                                 struct rte_flow_error *error)
1820 {
1821         if (attr->egress)
1822                 return rte_flow_error_set(error, ENOTSUP,
1823                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1824                                           "count action not supported for "
1825                                           "egress");
1826         return 0;
1827 }
1828
1829 /*
1830  * Validate the ASO CT action.
1831  *
1832  * @param[in] dev
1833  *   Pointer to the Ethernet device structure.
1834  * @param[in] conntrack
1835  *   Pointer to the CT action profile.
1836  * @param[out] error
1837  *   Pointer to error structure.
1838  *
1839  * @return
1840  *   0 on success, a negative errno value otherwise and rte_errno is set.
1841  */
1842 int
1843 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1844                         const struct rte_flow_action_conntrack *conntrack,
1845                         struct rte_flow_error *error)
1846 {
1847         RTE_SET_USED(dev);
1848
1849         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1850                 return rte_flow_error_set(error, EINVAL,
1851                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1852                                           "Invalid CT state");
1853         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1854                 return rte_flow_error_set(error, EINVAL,
1855                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1856                                           "Invalid last TCP packet flag");
1857         return 0;
1858 }
1859
1860 /**
1861  * Verify the @p attributes will be correctly understood by the NIC and store
1862  * them in the @p flow if everything is correct.
1863  *
1864  * @param[in] dev
1865  *   Pointer to the Ethernet device structure.
1866  * @param[in] attributes
1867  *   Pointer to flow attributes
1868  * @param[out] error
1869  *   Pointer to error structure.
1870  *
1871  * @return
1872  *   0 on success, a negative errno value otherwise and rte_errno is set.
1873  */
1874 int
1875 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1876                               const struct rte_flow_attr *attributes,
1877                               struct rte_flow_error *error)
1878 {
1879         struct mlx5_priv *priv = dev->data->dev_private;
1880         uint32_t priority_max = priv->config.flow_prio - 1;
1881
1882         if (attributes->group)
1883                 return rte_flow_error_set(error, ENOTSUP,
1884                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1885                                           NULL, "groups is not supported");
1886         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1887             attributes->priority >= priority_max)
1888                 return rte_flow_error_set(error, ENOTSUP,
1889                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1890                                           NULL, "priority out of range");
1891         if (attributes->egress)
1892                 return rte_flow_error_set(error, ENOTSUP,
1893                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1894                                           "egress is not supported");
1895         if (attributes->transfer && !priv->config.dv_esw_en)
1896                 return rte_flow_error_set(error, ENOTSUP,
1897                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1898                                           NULL, "transfer is not supported");
1899         if (!attributes->ingress)
1900                 return rte_flow_error_set(error, EINVAL,
1901                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1902                                           NULL,
1903                                           "ingress attribute is mandatory");
1904         return 0;
1905 }
1906
1907 /**
1908  * Validate ICMP6 item.
1909  *
1910  * @param[in] item
1911  *   Item specification.
1912  * @param[in] item_flags
1913  *   Bit-fields that holds the items detected until now.
1914  * @param[in] ext_vlan_sup
1915  *   Whether extended VLAN features are supported or not.
1916  * @param[out] error
1917  *   Pointer to error structure.
1918  *
1919  * @return
1920  *   0 on success, a negative errno value otherwise and rte_errno is set.
1921  */
1922 int
1923 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1924                                uint64_t item_flags,
1925                                uint8_t target_protocol,
1926                                struct rte_flow_error *error)
1927 {
1928         const struct rte_flow_item_icmp6 *mask = item->mask;
1929         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1930         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1931                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1932         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1933                                       MLX5_FLOW_LAYER_OUTER_L4;
1934         int ret;
1935
1936         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1937                 return rte_flow_error_set(error, EINVAL,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "protocol filtering not compatible"
1940                                           " with ICMP6 layer");
1941         if (!(item_flags & l3m))
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "IPv6 is mandatory to filter on"
1945                                           " ICMP6");
1946         if (item_flags & l4m)
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "multiple L4 layers not supported");
1950         if (!mask)
1951                 mask = &rte_flow_item_icmp6_mask;
1952         ret = mlx5_flow_item_acceptable
1953                 (item, (const uint8_t *)mask,
1954                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1955                  sizeof(struct rte_flow_item_icmp6),
1956                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1957         if (ret < 0)
1958                 return ret;
1959         return 0;
1960 }
1961
1962 /**
1963  * Validate ICMP item.
1964  *
1965  * @param[in] item
1966  *   Item specification.
1967  * @param[in] item_flags
1968  *   Bit-fields that holds the items detected until now.
1969  * @param[out] error
1970  *   Pointer to error structure.
1971  *
1972  * @return
1973  *   0 on success, a negative errno value otherwise and rte_errno is set.
1974  */
1975 int
1976 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1977                              uint64_t item_flags,
1978                              uint8_t target_protocol,
1979                              struct rte_flow_error *error)
1980 {
1981         const struct rte_flow_item_icmp *mask = item->mask;
1982         const struct rte_flow_item_icmp nic_mask = {
1983                 .hdr.icmp_type = 0xff,
1984                 .hdr.icmp_code = 0xff,
1985                 .hdr.icmp_ident = RTE_BE16(0xffff),
1986                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1987         };
1988         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1989         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1990                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1991         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1992                                       MLX5_FLOW_LAYER_OUTER_L4;
1993         int ret;
1994
1995         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "protocol filtering not compatible"
1999                                           " with ICMP layer");
2000         if (!(item_flags & l3m))
2001                 return rte_flow_error_set(error, EINVAL,
2002                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2003                                           "IPv4 is mandatory to filter"
2004                                           " on ICMP");
2005         if (item_flags & l4m)
2006                 return rte_flow_error_set(error, EINVAL,
2007                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2008                                           "multiple L4 layers not supported");
2009         if (!mask)
2010                 mask = &nic_mask;
2011         ret = mlx5_flow_item_acceptable
2012                 (item, (const uint8_t *)mask,
2013                  (const uint8_t *)&nic_mask,
2014                  sizeof(struct rte_flow_item_icmp),
2015                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2016         if (ret < 0)
2017                 return ret;
2018         return 0;
2019 }
2020
2021 /**
2022  * Validate Ethernet item.
2023  *
2024  * @param[in] item
2025  *   Item specification.
2026  * @param[in] item_flags
2027  *   Bit-fields that holds the items detected until now.
2028  * @param[out] error
2029  *   Pointer to error structure.
2030  *
2031  * @return
2032  *   0 on success, a negative errno value otherwise and rte_errno is set.
2033  */
2034 int
2035 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2036                             uint64_t item_flags, bool ext_vlan_sup,
2037                             struct rte_flow_error *error)
2038 {
2039         const struct rte_flow_item_eth *mask = item->mask;
2040         const struct rte_flow_item_eth nic_mask = {
2041                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2042                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2043                 .type = RTE_BE16(0xffff),
2044                 .has_vlan = ext_vlan_sup ? 1 : 0,
2045         };
2046         int ret;
2047         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2048         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2049                                        MLX5_FLOW_LAYER_OUTER_L2;
2050
2051         if (item_flags & ethm)
2052                 return rte_flow_error_set(error, ENOTSUP,
2053                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2054                                           "multiple L2 layers not supported");
2055         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2056             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2059                                           "L2 layer should not follow "
2060                                           "L3 layers");
2061         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2062             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2063                 return rte_flow_error_set(error, EINVAL,
2064                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                           "L2 layer should not follow VLAN");
2066         if (item_flags & MLX5_FLOW_LAYER_GTP)
2067                 return rte_flow_error_set(error, EINVAL,
2068                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2069                                           "L2 layer should not follow GTP");
2070         if (!mask)
2071                 mask = &rte_flow_item_eth_mask;
2072         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2073                                         (const uint8_t *)&nic_mask,
2074                                         sizeof(struct rte_flow_item_eth),
2075                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2076         return ret;
2077 }
2078
2079 /**
2080  * Validate VLAN item.
2081  *
2082  * @param[in] item
2083  *   Item specification.
2084  * @param[in] item_flags
2085  *   Bit-fields that holds the items detected until now.
2086  * @param[in] dev
2087  *   Ethernet device flow is being created on.
2088  * @param[out] error
2089  *   Pointer to error structure.
2090  *
2091  * @return
2092  *   0 on success, a negative errno value otherwise and rte_errno is set.
2093  */
2094 int
2095 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2096                              uint64_t item_flags,
2097                              struct rte_eth_dev *dev,
2098                              struct rte_flow_error *error)
2099 {
2100         const struct rte_flow_item_vlan *spec = item->spec;
2101         const struct rte_flow_item_vlan *mask = item->mask;
2102         const struct rte_flow_item_vlan nic_mask = {
2103                 .tci = RTE_BE16(UINT16_MAX),
2104                 .inner_type = RTE_BE16(UINT16_MAX),
2105         };
2106         uint16_t vlan_tag = 0;
2107         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2108         int ret;
2109         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2110                                         MLX5_FLOW_LAYER_INNER_L4) :
2111                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2112                                         MLX5_FLOW_LAYER_OUTER_L4);
2113         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2114                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2115
2116         if (item_flags & vlanm)
2117                 return rte_flow_error_set(error, EINVAL,
2118                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2119                                           "multiple VLAN layers not supported");
2120         else if ((item_flags & l34m) != 0)
2121                 return rte_flow_error_set(error, EINVAL,
2122                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2123                                           "VLAN cannot follow L3/L4 layer");
2124         if (!mask)
2125                 mask = &rte_flow_item_vlan_mask;
2126         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2127                                         (const uint8_t *)&nic_mask,
2128                                         sizeof(struct rte_flow_item_vlan),
2129                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2130         if (ret)
2131                 return ret;
2132         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2133                 struct mlx5_priv *priv = dev->data->dev_private;
2134
2135                 if (priv->vmwa_context) {
2136                         /*
2137                          * Non-NULL context means we have a virtual machine
2138                          * and SR-IOV enabled, we have to create VLAN interface
2139                          * to make hypervisor to setup E-Switch vport
2140                          * context correctly. We avoid creating the multiple
2141                          * VLAN interfaces, so we cannot support VLAN tag mask.
2142                          */
2143                         return rte_flow_error_set(error, EINVAL,
2144                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2145                                                   item,
2146                                                   "VLAN tag mask is not"
2147                                                   " supported in virtual"
2148                                                   " environment");
2149                 }
2150         }
2151         if (spec) {
2152                 vlan_tag = spec->tci;
2153                 vlan_tag &= mask->tci;
2154         }
2155         /*
2156          * From verbs perspective an empty VLAN is equivalent
2157          * to a packet without VLAN layer.
2158          */
2159         if (!vlan_tag)
2160                 return rte_flow_error_set(error, EINVAL,
2161                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2162                                           item->spec,
2163                                           "VLAN cannot be empty");
2164         return 0;
2165 }
2166
2167 /**
2168  * Validate IPV4 item.
2169  *
2170  * @param[in] item
2171  *   Item specification.
2172  * @param[in] item_flags
2173  *   Bit-fields that holds the items detected until now.
2174  * @param[in] last_item
2175  *   Previous validated item in the pattern items.
2176  * @param[in] ether_type
2177  *   Type in the ethernet layer header (including dot1q).
2178  * @param[in] acc_mask
2179  *   Acceptable mask, if NULL default internal default mask
2180  *   will be used to check whether item fields are supported.
2181  * @param[in] range_accepted
2182  *   True if range of values is accepted for specific fields, false otherwise.
2183  * @param[out] error
2184  *   Pointer to error structure.
2185  *
2186  * @return
2187  *   0 on success, a negative errno value otherwise and rte_errno is set.
2188  */
2189 int
2190 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2191                              uint64_t item_flags,
2192                              uint64_t last_item,
2193                              uint16_t ether_type,
2194                              const struct rte_flow_item_ipv4 *acc_mask,
2195                              bool range_accepted,
2196                              struct rte_flow_error *error)
2197 {
2198         const struct rte_flow_item_ipv4 *mask = item->mask;
2199         const struct rte_flow_item_ipv4 *spec = item->spec;
2200         const struct rte_flow_item_ipv4 nic_mask = {
2201                 .hdr = {
2202                         .src_addr = RTE_BE32(0xffffffff),
2203                         .dst_addr = RTE_BE32(0xffffffff),
2204                         .type_of_service = 0xff,
2205                         .next_proto_id = 0xff,
2206                 },
2207         };
2208         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2209         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2210                                       MLX5_FLOW_LAYER_OUTER_L3;
2211         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2212                                       MLX5_FLOW_LAYER_OUTER_L4;
2213         int ret;
2214         uint8_t next_proto = 0xFF;
2215         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2216                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2217                                   MLX5_FLOW_LAYER_INNER_VLAN);
2218
2219         if ((last_item & l2_vlan) && ether_type &&
2220             ether_type != RTE_ETHER_TYPE_IPV4)
2221                 return rte_flow_error_set(error, EINVAL,
2222                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2223                                           "IPv4 cannot follow L2/VLAN layer "
2224                                           "which ether type is not IPv4");
2225         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2226                 if (mask && spec)
2227                         next_proto = mask->hdr.next_proto_id &
2228                                      spec->hdr.next_proto_id;
2229                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2230                         return rte_flow_error_set(error, EINVAL,
2231                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2232                                                   item,
2233                                                   "multiple tunnel "
2234                                                   "not supported");
2235         }
2236         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2237                 return rte_flow_error_set(error, EINVAL,
2238                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2239                                           "wrong tunnel type - IPv6 specified "
2240                                           "but IPv4 item provided");
2241         if (item_flags & l3m)
2242                 return rte_flow_error_set(error, ENOTSUP,
2243                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2244                                           "multiple L3 layers not supported");
2245         else if (item_flags & l4m)
2246                 return rte_flow_error_set(error, EINVAL,
2247                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2248                                           "L3 cannot follow an L4 layer.");
2249         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2250                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2251                 return rte_flow_error_set(error, EINVAL,
2252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2253                                           "L3 cannot follow an NVGRE layer.");
2254         if (!mask)
2255                 mask = &rte_flow_item_ipv4_mask;
2256         else if (mask->hdr.next_proto_id != 0 &&
2257                  mask->hdr.next_proto_id != 0xff)
2258                 return rte_flow_error_set(error, EINVAL,
2259                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2260                                           "partial mask is not supported"
2261                                           " for protocol");
2262         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2263                                         acc_mask ? (const uint8_t *)acc_mask
2264                                                  : (const uint8_t *)&nic_mask,
2265                                         sizeof(struct rte_flow_item_ipv4),
2266                                         range_accepted, error);
2267         if (ret < 0)
2268                 return ret;
2269         return 0;
2270 }
2271
2272 /**
2273  * Validate IPV6 item.
2274  *
2275  * @param[in] item
2276  *   Item specification.
2277  * @param[in] item_flags
2278  *   Bit-fields that holds the items detected until now.
2279  * @param[in] last_item
2280  *   Previous validated item in the pattern items.
2281  * @param[in] ether_type
2282  *   Type in the ethernet layer header (including dot1q).
2283  * @param[in] acc_mask
2284  *   Acceptable mask, if NULL default internal default mask
2285  *   will be used to check whether item fields are supported.
2286  * @param[out] error
2287  *   Pointer to error structure.
2288  *
2289  * @return
2290  *   0 on success, a negative errno value otherwise and rte_errno is set.
2291  */
2292 int
2293 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2294                              uint64_t item_flags,
2295                              uint64_t last_item,
2296                              uint16_t ether_type,
2297                              const struct rte_flow_item_ipv6 *acc_mask,
2298                              struct rte_flow_error *error)
2299 {
2300         const struct rte_flow_item_ipv6 *mask = item->mask;
2301         const struct rte_flow_item_ipv6 *spec = item->spec;
2302         const struct rte_flow_item_ipv6 nic_mask = {
2303                 .hdr = {
2304                         .src_addr =
2305                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2306                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2307                         .dst_addr =
2308                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2309                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2310                         .vtc_flow = RTE_BE32(0xffffffff),
2311                         .proto = 0xff,
2312                 },
2313         };
2314         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2315         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2316                                       MLX5_FLOW_LAYER_OUTER_L3;
2317         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2318                                       MLX5_FLOW_LAYER_OUTER_L4;
2319         int ret;
2320         uint8_t next_proto = 0xFF;
2321         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2322                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2323                                   MLX5_FLOW_LAYER_INNER_VLAN);
2324
2325         if ((last_item & l2_vlan) && ether_type &&
2326             ether_type != RTE_ETHER_TYPE_IPV6)
2327                 return rte_flow_error_set(error, EINVAL,
2328                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2329                                           "IPv6 cannot follow L2/VLAN layer "
2330                                           "which ether type is not IPv6");
2331         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2332                 next_proto = spec->hdr.proto;
2333         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2334                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2335                         return rte_flow_error_set(error, EINVAL,
2336                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2337                                                   item,
2338                                                   "multiple tunnel "
2339                                                   "not supported");
2340         }
2341         if (next_proto == IPPROTO_HOPOPTS  ||
2342             next_proto == IPPROTO_ROUTING  ||
2343             next_proto == IPPROTO_FRAGMENT ||
2344             next_proto == IPPROTO_ESP      ||
2345             next_proto == IPPROTO_AH       ||
2346             next_proto == IPPROTO_DSTOPTS)
2347                 return rte_flow_error_set(error, EINVAL,
2348                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2349                                           "IPv6 proto (next header) should "
2350                                           "not be set as extension header");
2351         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2352                 return rte_flow_error_set(error, EINVAL,
2353                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2354                                           "wrong tunnel type - IPv4 specified "
2355                                           "but IPv6 item provided");
2356         if (item_flags & l3m)
2357                 return rte_flow_error_set(error, ENOTSUP,
2358                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2359                                           "multiple L3 layers not supported");
2360         else if (item_flags & l4m)
2361                 return rte_flow_error_set(error, EINVAL,
2362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2363                                           "L3 cannot follow an L4 layer.");
2364         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2365                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2366                 return rte_flow_error_set(error, EINVAL,
2367                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2368                                           "L3 cannot follow an NVGRE layer.");
2369         if (!mask)
2370                 mask = &rte_flow_item_ipv6_mask;
2371         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2372                                         acc_mask ? (const uint8_t *)acc_mask
2373                                                  : (const uint8_t *)&nic_mask,
2374                                         sizeof(struct rte_flow_item_ipv6),
2375                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2376         if (ret < 0)
2377                 return ret;
2378         return 0;
2379 }
2380
2381 /**
2382  * Validate UDP item.
2383  *
2384  * @param[in] item
2385  *   Item specification.
2386  * @param[in] item_flags
2387  *   Bit-fields that holds the items detected until now.
2388  * @param[in] target_protocol
2389  *   The next protocol in the previous item.
2390  * @param[in] flow_mask
2391  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2392  * @param[out] error
2393  *   Pointer to error structure.
2394  *
2395  * @return
2396  *   0 on success, a negative errno value otherwise and rte_errno is set.
2397  */
2398 int
2399 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2400                             uint64_t item_flags,
2401                             uint8_t target_protocol,
2402                             struct rte_flow_error *error)
2403 {
2404         const struct rte_flow_item_udp *mask = item->mask;
2405         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2406         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2407                                       MLX5_FLOW_LAYER_OUTER_L3;
2408         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2409                                       MLX5_FLOW_LAYER_OUTER_L4;
2410         int ret;
2411
2412         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2413                 return rte_flow_error_set(error, EINVAL,
2414                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2415                                           "protocol filtering not compatible"
2416                                           " with UDP layer");
2417         if (!(item_flags & l3m))
2418                 return rte_flow_error_set(error, EINVAL,
2419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2420                                           "L3 is mandatory to filter on L4");
2421         if (item_flags & l4m)
2422                 return rte_flow_error_set(error, EINVAL,
2423                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2424                                           "multiple L4 layers not supported");
2425         if (!mask)
2426                 mask = &rte_flow_item_udp_mask;
2427         ret = mlx5_flow_item_acceptable
2428                 (item, (const uint8_t *)mask,
2429                  (const uint8_t *)&rte_flow_item_udp_mask,
2430                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2431                  error);
2432         if (ret < 0)
2433                 return ret;
2434         return 0;
2435 }
2436
2437 /**
2438  * Validate TCP item.
2439  *
2440  * @param[in] item
2441  *   Item specification.
2442  * @param[in] item_flags
2443  *   Bit-fields that holds the items detected until now.
2444  * @param[in] target_protocol
2445  *   The next protocol in the previous item.
2446  * @param[out] error
2447  *   Pointer to error structure.
2448  *
2449  * @return
2450  *   0 on success, a negative errno value otherwise and rte_errno is set.
2451  */
2452 int
2453 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2454                             uint64_t item_flags,
2455                             uint8_t target_protocol,
2456                             const struct rte_flow_item_tcp *flow_mask,
2457                             struct rte_flow_error *error)
2458 {
2459         const struct rte_flow_item_tcp *mask = item->mask;
2460         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2461         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2462                                       MLX5_FLOW_LAYER_OUTER_L3;
2463         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2464                                       MLX5_FLOW_LAYER_OUTER_L4;
2465         int ret;
2466
2467         MLX5_ASSERT(flow_mask);
2468         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2469                 return rte_flow_error_set(error, EINVAL,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "protocol filtering not compatible"
2472                                           " with TCP layer");
2473         if (!(item_flags & l3m))
2474                 return rte_flow_error_set(error, EINVAL,
2475                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2476                                           "L3 is mandatory to filter on L4");
2477         if (item_flags & l4m)
2478                 return rte_flow_error_set(error, EINVAL,
2479                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2480                                           "multiple L4 layers not supported");
2481         if (!mask)
2482                 mask = &rte_flow_item_tcp_mask;
2483         ret = mlx5_flow_item_acceptable
2484                 (item, (const uint8_t *)mask,
2485                  (const uint8_t *)flow_mask,
2486                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2487                  error);
2488         if (ret < 0)
2489                 return ret;
2490         return 0;
2491 }
2492
2493 /**
2494  * Validate VXLAN item.
2495  *
2496  * @param[in] dev
2497  *   Pointer to the Ethernet device structure.
2498  * @param[in] udp_dport
2499  *   UDP destination port
2500  * @param[in] item
2501  *   Item specification.
2502  * @param[in] item_flags
2503  *   Bit-fields that holds the items detected until now.
2504  * @param[in] attr
2505  *   Flow rule attributes.
2506  * @param[out] error
2507  *   Pointer to error structure.
2508  *
2509  * @return
2510  *   0 on success, a negative errno value otherwise and rte_errno is set.
2511  */
2512 int
2513 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2514                               uint16_t udp_dport,
2515                               const struct rte_flow_item *item,
2516                               uint64_t item_flags,
2517                               const struct rte_flow_attr *attr,
2518                               struct rte_flow_error *error)
2519 {
2520         const struct rte_flow_item_vxlan *spec = item->spec;
2521         const struct rte_flow_item_vxlan *mask = item->mask;
2522         int ret;
2523         struct mlx5_priv *priv = dev->data->dev_private;
2524         union vni {
2525                 uint32_t vlan_id;
2526                 uint8_t vni[4];
2527         } id = { .vlan_id = 0, };
2528         const struct rte_flow_item_vxlan nic_mask = {
2529                 .vni = "\xff\xff\xff",
2530                 .rsvd1 = 0xff,
2531         };
2532         const struct rte_flow_item_vxlan *valid_mask;
2533
2534         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2535                 return rte_flow_error_set(error, ENOTSUP,
2536                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2537                                           "multiple tunnel layers not"
2538                                           " supported");
2539         valid_mask = &rte_flow_item_vxlan_mask;
2540         /*
2541          * Verify only UDPv4 is present as defined in
2542          * https://tools.ietf.org/html/rfc7348
2543          */
2544         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2545                 return rte_flow_error_set(error, EINVAL,
2546                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2547                                           "no outer UDP layer found");
2548         if (!mask)
2549                 mask = &rte_flow_item_vxlan_mask;
2550
2551         if (priv->sh->steering_format_version !=
2552             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2553             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2554                 /* FDB domain & NIC domain non-zero group */
2555                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2556                         valid_mask = &nic_mask;
2557                 /* Group zero in NIC domain */
2558                 if (!attr->group && !attr->transfer &&
2559                     priv->sh->tunnel_header_0_1)
2560                         valid_mask = &nic_mask;
2561         }
2562         ret = mlx5_flow_item_acceptable
2563                 (item, (const uint8_t *)mask,
2564                  (const uint8_t *)valid_mask,
2565                  sizeof(struct rte_flow_item_vxlan),
2566                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2567         if (ret < 0)
2568                 return ret;
2569         if (spec) {
2570                 memcpy(&id.vni[1], spec->vni, 3);
2571                 memcpy(&id.vni[1], mask->vni, 3);
2572         }
2573         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2574                 return rte_flow_error_set(error, ENOTSUP,
2575                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2576                                           "VXLAN tunnel must be fully defined");
2577         return 0;
2578 }
2579
2580 /**
2581  * Validate VXLAN_GPE item.
2582  *
2583  * @param[in] item
2584  *   Item specification.
2585  * @param[in] item_flags
2586  *   Bit-fields that holds the items detected until now.
2587  * @param[in] priv
2588  *   Pointer to the private data structure.
2589  * @param[in] target_protocol
2590  *   The next protocol in the previous item.
2591  * @param[out] error
2592  *   Pointer to error structure.
2593  *
2594  * @return
2595  *   0 on success, a negative errno value otherwise and rte_errno is set.
2596  */
2597 int
2598 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2599                                   uint64_t item_flags,
2600                                   struct rte_eth_dev *dev,
2601                                   struct rte_flow_error *error)
2602 {
2603         struct mlx5_priv *priv = dev->data->dev_private;
2604         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2605         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2606         int ret;
2607         union vni {
2608                 uint32_t vlan_id;
2609                 uint8_t vni[4];
2610         } id = { .vlan_id = 0, };
2611
2612         if (!priv->config.l3_vxlan_en)
2613                 return rte_flow_error_set(error, ENOTSUP,
2614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2615                                           "L3 VXLAN is not enabled by device"
2616                                           " parameter and/or not configured in"
2617                                           " firmware");
2618         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2619                 return rte_flow_error_set(error, ENOTSUP,
2620                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2621                                           "multiple tunnel layers not"
2622                                           " supported");
2623         /*
2624          * Verify only UDPv4 is present as defined in
2625          * https://tools.ietf.org/html/rfc7348
2626          */
2627         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2628                 return rte_flow_error_set(error, EINVAL,
2629                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2630                                           "no outer UDP layer found");
2631         if (!mask)
2632                 mask = &rte_flow_item_vxlan_gpe_mask;
2633         ret = mlx5_flow_item_acceptable
2634                 (item, (const uint8_t *)mask,
2635                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2636                  sizeof(struct rte_flow_item_vxlan_gpe),
2637                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2638         if (ret < 0)
2639                 return ret;
2640         if (spec) {
2641                 if (spec->protocol)
2642                         return rte_flow_error_set(error, ENOTSUP,
2643                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2644                                                   item,
2645                                                   "VxLAN-GPE protocol"
2646                                                   " not supported");
2647                 memcpy(&id.vni[1], spec->vni, 3);
2648                 memcpy(&id.vni[1], mask->vni, 3);
2649         }
2650         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2651                 return rte_flow_error_set(error, ENOTSUP,
2652                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2653                                           "VXLAN-GPE tunnel must be fully"
2654                                           " defined");
2655         return 0;
2656 }
2657 /**
2658  * Validate GRE Key item.
2659  *
2660  * @param[in] item
2661  *   Item specification.
2662  * @param[in] item_flags
2663  *   Bit flags to mark detected items.
2664  * @param[in] gre_item
2665  *   Pointer to gre_item
2666  * @param[out] error
2667  *   Pointer to error structure.
2668  *
2669  * @return
2670  *   0 on success, a negative errno value otherwise and rte_errno is set.
2671  */
2672 int
2673 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2674                                 uint64_t item_flags,
2675                                 const struct rte_flow_item *gre_item,
2676                                 struct rte_flow_error *error)
2677 {
2678         const rte_be32_t *mask = item->mask;
2679         int ret = 0;
2680         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2681         const struct rte_flow_item_gre *gre_spec;
2682         const struct rte_flow_item_gre *gre_mask;
2683
2684         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2685                 return rte_flow_error_set(error, ENOTSUP,
2686                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2687                                           "Multiple GRE key not support");
2688         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2689                 return rte_flow_error_set(error, ENOTSUP,
2690                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2691                                           "No preceding GRE header");
2692         if (item_flags & MLX5_FLOW_LAYER_INNER)
2693                 return rte_flow_error_set(error, ENOTSUP,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2695                                           "GRE key following a wrong item");
2696         gre_mask = gre_item->mask;
2697         if (!gre_mask)
2698                 gre_mask = &rte_flow_item_gre_mask;
2699         gre_spec = gre_item->spec;
2700         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2701                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2702                 return rte_flow_error_set(error, EINVAL,
2703                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2704                                           "Key bit must be on");
2705
2706         if (!mask)
2707                 mask = &gre_key_default_mask;
2708         ret = mlx5_flow_item_acceptable
2709                 (item, (const uint8_t *)mask,
2710                  (const uint8_t *)&gre_key_default_mask,
2711                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2712         return ret;
2713 }
2714
2715 /**
2716  * Validate GRE item.
2717  *
2718  * @param[in] item
2719  *   Item specification.
2720  * @param[in] item_flags
2721  *   Bit flags to mark detected items.
2722  * @param[in] target_protocol
2723  *   The next protocol in the previous item.
2724  * @param[out] error
2725  *   Pointer to error structure.
2726  *
2727  * @return
2728  *   0 on success, a negative errno value otherwise and rte_errno is set.
2729  */
2730 int
2731 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2732                             uint64_t item_flags,
2733                             uint8_t target_protocol,
2734                             struct rte_flow_error *error)
2735 {
2736         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2737         const struct rte_flow_item_gre *mask = item->mask;
2738         int ret;
2739         const struct rte_flow_item_gre nic_mask = {
2740                 .c_rsvd0_ver = RTE_BE16(0xB000),
2741                 .protocol = RTE_BE16(UINT16_MAX),
2742         };
2743
2744         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2745                 return rte_flow_error_set(error, EINVAL,
2746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2747                                           "protocol filtering not compatible"
2748                                           " with this GRE layer");
2749         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2750                 return rte_flow_error_set(error, ENOTSUP,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "multiple tunnel layers not"
2753                                           " supported");
2754         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2755                 return rte_flow_error_set(error, ENOTSUP,
2756                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2757                                           "L3 Layer is missing");
2758         if (!mask)
2759                 mask = &rte_flow_item_gre_mask;
2760         ret = mlx5_flow_item_acceptable
2761                 (item, (const uint8_t *)mask,
2762                  (const uint8_t *)&nic_mask,
2763                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2764                  error);
2765         if (ret < 0)
2766                 return ret;
2767 #ifndef HAVE_MLX5DV_DR
2768 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2769         if (spec && (spec->protocol & mask->protocol))
2770                 return rte_flow_error_set(error, ENOTSUP,
2771                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2772                                           "without MPLS support the"
2773                                           " specification cannot be used for"
2774                                           " filtering");
2775 #endif
2776 #endif
2777         return 0;
2778 }
2779
2780 /**
2781  * Validate Geneve item.
2782  *
2783  * @param[in] item
2784  *   Item specification.
2785  * @param[in] itemFlags
2786  *   Bit-fields that holds the items detected until now.
2787  * @param[in] enPriv
2788  *   Pointer to the private data structure.
2789  * @param[out] error
2790  *   Pointer to error structure.
2791  *
2792  * @return
2793  *   0 on success, a negative errno value otherwise and rte_errno is set.
2794  */
2795
2796 int
2797 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2798                                uint64_t item_flags,
2799                                struct rte_eth_dev *dev,
2800                                struct rte_flow_error *error)
2801 {
2802         struct mlx5_priv *priv = dev->data->dev_private;
2803         const struct rte_flow_item_geneve *spec = item->spec;
2804         const struct rte_flow_item_geneve *mask = item->mask;
2805         int ret;
2806         uint16_t gbhdr;
2807         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2808                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2809         const struct rte_flow_item_geneve nic_mask = {
2810                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2811                 .vni = "\xff\xff\xff",
2812                 .protocol = RTE_BE16(UINT16_MAX),
2813         };
2814
2815         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2816                 return rte_flow_error_set(error, ENOTSUP,
2817                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2818                                           "L3 Geneve is not enabled by device"
2819                                           " parameter and/or not configured in"
2820                                           " firmware");
2821         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2822                 return rte_flow_error_set(error, ENOTSUP,
2823                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2824                                           "multiple tunnel layers not"
2825                                           " supported");
2826         /*
2827          * Verify only UDPv4 is present as defined in
2828          * https://tools.ietf.org/html/rfc7348
2829          */
2830         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2831                 return rte_flow_error_set(error, EINVAL,
2832                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2833                                           "no outer UDP layer found");
2834         if (!mask)
2835                 mask = &rte_flow_item_geneve_mask;
2836         ret = mlx5_flow_item_acceptable
2837                                   (item, (const uint8_t *)mask,
2838                                    (const uint8_t *)&nic_mask,
2839                                    sizeof(struct rte_flow_item_geneve),
2840                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2841         if (ret)
2842                 return ret;
2843         if (spec) {
2844                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2845                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2846                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2847                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2848                         return rte_flow_error_set(error, ENOTSUP,
2849                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2850                                                   item,
2851                                                   "Geneve protocol unsupported"
2852                                                   " fields are being used");
2853                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2854                         return rte_flow_error_set
2855                                         (error, ENOTSUP,
2856                                          RTE_FLOW_ERROR_TYPE_ITEM,
2857                                          item,
2858                                          "Unsupported Geneve options length");
2859         }
2860         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2861                 return rte_flow_error_set
2862                                     (error, ENOTSUP,
2863                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2864                                      "Geneve tunnel must be fully defined");
2865         return 0;
2866 }
2867
2868 /**
2869  * Validate Geneve TLV option item.
2870  *
2871  * @param[in] item
2872  *   Item specification.
2873  * @param[in] last_item
2874  *   Previous validated item in the pattern items.
2875  * @param[in] geneve_item
2876  *   Previous GENEVE item specification.
2877  * @param[in] dev
2878  *   Pointer to the rte_eth_dev structure.
2879  * @param[out] error
2880  *   Pointer to error structure.
2881  *
2882  * @return
2883  *   0 on success, a negative errno value otherwise and rte_errno is set.
2884  */
2885 int
2886 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2887                                    uint64_t last_item,
2888                                    const struct rte_flow_item *geneve_item,
2889                                    struct rte_eth_dev *dev,
2890                                    struct rte_flow_error *error)
2891 {
2892         struct mlx5_priv *priv = dev->data->dev_private;
2893         struct mlx5_dev_ctx_shared *sh = priv->sh;
2894         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2895         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2896         uint8_t data_max_supported =
2897                         hca_attr->max_geneve_tlv_option_data_len * 4;
2898         struct mlx5_dev_config *config = &priv->config;
2899         const struct rte_flow_item_geneve *geneve_spec;
2900         const struct rte_flow_item_geneve *geneve_mask;
2901         const struct rte_flow_item_geneve_opt *spec = item->spec;
2902         const struct rte_flow_item_geneve_opt *mask = item->mask;
2903         unsigned int i;
2904         unsigned int data_len;
2905         uint8_t tlv_option_len;
2906         uint16_t optlen_m, optlen_v;
2907         const struct rte_flow_item_geneve_opt full_mask = {
2908                 .option_class = RTE_BE16(0xffff),
2909                 .option_type = 0xff,
2910                 .option_len = 0x1f,
2911         };
2912
2913         if (!mask)
2914                 mask = &rte_flow_item_geneve_opt_mask;
2915         if (!spec)
2916                 return rte_flow_error_set
2917                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2918                         "Geneve TLV opt class/type/length must be specified");
2919         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2920                 return rte_flow_error_set
2921                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2922                         "Geneve TLV opt length exceeeds the limit (31)");
2923         /* Check if class type and length masks are full. */
2924         if (full_mask.option_class != mask->option_class ||
2925             full_mask.option_type != mask->option_type ||
2926             full_mask.option_len != (mask->option_len & full_mask.option_len))
2927                 return rte_flow_error_set
2928                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2929                         "Geneve TLV opt class/type/length masks must be full");
2930         /* Check if length is supported */
2931         if ((uint32_t)spec->option_len >
2932                         config->hca_attr.max_geneve_tlv_option_data_len)
2933                 return rte_flow_error_set
2934                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2935                         "Geneve TLV opt length not supported");
2936         if (config->hca_attr.max_geneve_tlv_options > 1)
2937                 DRV_LOG(DEBUG,
2938                         "max_geneve_tlv_options supports more than 1 option");
2939         /* Check GENEVE item preceding. */
2940         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2941                 return rte_flow_error_set
2942                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2943                         "Geneve opt item must be preceded with Geneve item");
2944         geneve_spec = geneve_item->spec;
2945         geneve_mask = geneve_item->mask ? geneve_item->mask :
2946                                           &rte_flow_item_geneve_mask;
2947         /* Check if GENEVE TLV option size doesn't exceed option length */
2948         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2949                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2950                 tlv_option_len = spec->option_len & mask->option_len;
2951                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2952                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2953                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2954                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2955                 if ((optlen_v & optlen_m) <= tlv_option_len)
2956                         return rte_flow_error_set
2957                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2958                                  "GENEVE TLV option length exceeds optlen");
2959         }
2960         /* Check if length is 0 or data is 0. */
2961         if (spec->data == NULL || spec->option_len == 0)
2962                 return rte_flow_error_set
2963                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2964                         "Geneve TLV opt with zero data/length not supported");
2965         /* Check not all data & mask are 0. */
2966         data_len = spec->option_len * 4;
2967         if (mask->data == NULL) {
2968                 for (i = 0; i < data_len; i++)
2969                         if (spec->data[i])
2970                                 break;
2971                 if (i == data_len)
2972                         return rte_flow_error_set(error, ENOTSUP,
2973                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2974                                 "Can't match on Geneve option data 0");
2975         } else {
2976                 for (i = 0; i < data_len; i++)
2977                         if (spec->data[i] & mask->data[i])
2978                                 break;
2979                 if (i == data_len)
2980                         return rte_flow_error_set(error, ENOTSUP,
2981                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2982                                 "Can't match on Geneve option data and mask 0");
2983                 /* Check data mask supported. */
2984                 for (i = data_max_supported; i < data_len ; i++)
2985                         if (mask->data[i])
2986                                 return rte_flow_error_set(error, ENOTSUP,
2987                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2988                                         "Data mask is of unsupported size");
2989         }
2990         /* Check GENEVE option is supported in NIC. */
2991         if (!config->hca_attr.geneve_tlv_opt)
2992                 return rte_flow_error_set
2993                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2994                         "Geneve TLV opt not supported");
2995         /* Check if we already have geneve option with different type/class. */
2996         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2997         geneve_opt_resource = sh->geneve_tlv_option_resource;
2998         if (geneve_opt_resource != NULL)
2999                 if (geneve_opt_resource->option_class != spec->option_class ||
3000                     geneve_opt_resource->option_type != spec->option_type ||
3001                     geneve_opt_resource->length != spec->option_len) {
3002                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3003                         return rte_flow_error_set(error, ENOTSUP,
3004                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3005                                 "Only one Geneve TLV option supported");
3006                 }
3007         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3008         return 0;
3009 }
3010
3011 /**
3012  * Validate MPLS item.
3013  *
3014  * @param[in] dev
3015  *   Pointer to the rte_eth_dev structure.
3016  * @param[in] item
3017  *   Item specification.
3018  * @param[in] item_flags
3019  *   Bit-fields that holds the items detected until now.
3020  * @param[in] prev_layer
3021  *   The protocol layer indicated in previous item.
3022  * @param[out] error
3023  *   Pointer to error structure.
3024  *
3025  * @return
3026  *   0 on success, a negative errno value otherwise and rte_errno is set.
3027  */
3028 int
3029 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3030                              const struct rte_flow_item *item __rte_unused,
3031                              uint64_t item_flags __rte_unused,
3032                              uint64_t prev_layer __rte_unused,
3033                              struct rte_flow_error *error)
3034 {
3035 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3036         const struct rte_flow_item_mpls *mask = item->mask;
3037         struct mlx5_priv *priv = dev->data->dev_private;
3038         int ret;
3039
3040         if (!priv->config.mpls_en)
3041                 return rte_flow_error_set(error, ENOTSUP,
3042                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3043                                           "MPLS not supported or"
3044                                           " disabled in firmware"
3045                                           " configuration.");
3046         /* MPLS over UDP, GRE is allowed */
3047         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3048                             MLX5_FLOW_LAYER_GRE |
3049                             MLX5_FLOW_LAYER_GRE_KEY)))
3050                 return rte_flow_error_set(error, EINVAL,
3051                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3052                                           "protocol filtering not compatible"
3053                                           " with MPLS layer");
3054         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3055         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3056             !(item_flags & MLX5_FLOW_LAYER_GRE))
3057                 return rte_flow_error_set(error, ENOTSUP,
3058                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3059                                           "multiple tunnel layers not"
3060                                           " supported");
3061         if (!mask)
3062                 mask = &rte_flow_item_mpls_mask;
3063         ret = mlx5_flow_item_acceptable
3064                 (item, (const uint8_t *)mask,
3065                  (const uint8_t *)&rte_flow_item_mpls_mask,
3066                  sizeof(struct rte_flow_item_mpls),
3067                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3068         if (ret < 0)
3069                 return ret;
3070         return 0;
3071 #else
3072         return rte_flow_error_set(error, ENOTSUP,
3073                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3074                                   "MPLS is not supported by Verbs, please"
3075                                   " update.");
3076 #endif
3077 }
3078
3079 /**
3080  * Validate NVGRE item.
3081  *
3082  * @param[in] item
3083  *   Item specification.
3084  * @param[in] item_flags
3085  *   Bit flags to mark detected items.
3086  * @param[in] target_protocol
3087  *   The next protocol in the previous item.
3088  * @param[out] error
3089  *   Pointer to error structure.
3090  *
3091  * @return
3092  *   0 on success, a negative errno value otherwise and rte_errno is set.
3093  */
3094 int
3095 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3096                               uint64_t item_flags,
3097                               uint8_t target_protocol,
3098                               struct rte_flow_error *error)
3099 {
3100         const struct rte_flow_item_nvgre *mask = item->mask;
3101         int ret;
3102
3103         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3104                 return rte_flow_error_set(error, EINVAL,
3105                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3106                                           "protocol filtering not compatible"
3107                                           " with this GRE layer");
3108         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3109                 return rte_flow_error_set(error, ENOTSUP,
3110                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3111                                           "multiple tunnel layers not"
3112                                           " supported");
3113         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3114                 return rte_flow_error_set(error, ENOTSUP,
3115                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3116                                           "L3 Layer is missing");
3117         if (!mask)
3118                 mask = &rte_flow_item_nvgre_mask;
3119         ret = mlx5_flow_item_acceptable
3120                 (item, (const uint8_t *)mask,
3121                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3122                  sizeof(struct rte_flow_item_nvgre),
3123                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3124         if (ret < 0)
3125                 return ret;
3126         return 0;
3127 }
3128
3129 /**
3130  * Validate eCPRI item.
3131  *
3132  * @param[in] item
3133  *   Item specification.
3134  * @param[in] item_flags
3135  *   Bit-fields that holds the items detected until now.
3136  * @param[in] last_item
3137  *   Previous validated item in the pattern items.
3138  * @param[in] ether_type
3139  *   Type in the ethernet layer header (including dot1q).
3140  * @param[in] acc_mask
3141  *   Acceptable mask, if NULL default internal default mask
3142  *   will be used to check whether item fields are supported.
3143  * @param[out] error
3144  *   Pointer to error structure.
3145  *
3146  * @return
3147  *   0 on success, a negative errno value otherwise and rte_errno is set.
3148  */
3149 int
3150 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3151                               uint64_t item_flags,
3152                               uint64_t last_item,
3153                               uint16_t ether_type,
3154                               const struct rte_flow_item_ecpri *acc_mask,
3155                               struct rte_flow_error *error)
3156 {
3157         const struct rte_flow_item_ecpri *mask = item->mask;
3158         const struct rte_flow_item_ecpri nic_mask = {
3159                 .hdr = {
3160                         .common = {
3161                                 .u32 =
3162                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3163                                         .type = 0xFF,
3164                                         }).u32),
3165                         },
3166                         .dummy[0] = 0xFFFFFFFF,
3167                 },
3168         };
3169         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3170                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3171         struct rte_flow_item_ecpri mask_lo;
3172
3173         if (!(last_item & outer_l2_vlan) &&
3174             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3175                 return rte_flow_error_set(error, EINVAL,
3176                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3177                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3178         if ((last_item & outer_l2_vlan) && ether_type &&
3179             ether_type != RTE_ETHER_TYPE_ECPRI)
3180                 return rte_flow_error_set(error, EINVAL,
3181                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3182                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3183         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3184                 return rte_flow_error_set(error, EINVAL,
3185                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3186                                           "eCPRI with tunnel is not supported right now");
3187         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3188                 return rte_flow_error_set(error, ENOTSUP,
3189                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3190                                           "multiple L3 layers not supported");
3191         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3192                 return rte_flow_error_set(error, EINVAL,
3193                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3194                                           "eCPRI cannot coexist with a TCP layer");
3195         /* In specification, eCPRI could be over UDP layer. */
3196         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3197                 return rte_flow_error_set(error, EINVAL,
3198                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3199                                           "eCPRI over UDP layer is not yet supported right now");
3200         /* Mask for type field in common header could be zero. */
3201         if (!mask)
3202                 mask = &rte_flow_item_ecpri_mask;
3203         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3204         /* Input mask is in big-endian format. */
3205         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3206                 return rte_flow_error_set(error, EINVAL,
3207                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3208                                           "partial mask is not supported for protocol");
3209         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3210                 return rte_flow_error_set(error, EINVAL,
3211                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3212                                           "message header mask must be after a type mask");
3213         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3214                                          acc_mask ? (const uint8_t *)acc_mask
3215                                                   : (const uint8_t *)&nic_mask,
3216                                          sizeof(struct rte_flow_item_ecpri),
3217                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3218 }
3219
3220 static int
3221 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3222                    const struct rte_flow_attr *attr __rte_unused,
3223                    const struct rte_flow_item items[] __rte_unused,
3224                    const struct rte_flow_action actions[] __rte_unused,
3225                    bool external __rte_unused,
3226                    int hairpin __rte_unused,
3227                    struct rte_flow_error *error)
3228 {
3229         return rte_flow_error_set(error, ENOTSUP,
3230                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3231 }
3232
3233 static struct mlx5_flow *
3234 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3235                   const struct rte_flow_attr *attr __rte_unused,
3236                   const struct rte_flow_item items[] __rte_unused,
3237                   const struct rte_flow_action actions[] __rte_unused,
3238                   struct rte_flow_error *error)
3239 {
3240         rte_flow_error_set(error, ENOTSUP,
3241                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3242         return NULL;
3243 }
3244
3245 static int
3246 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3247                     struct mlx5_flow *dev_flow __rte_unused,
3248                     const struct rte_flow_attr *attr __rte_unused,
3249                     const struct rte_flow_item items[] __rte_unused,
3250                     const struct rte_flow_action actions[] __rte_unused,
3251                     struct rte_flow_error *error)
3252 {
3253         return rte_flow_error_set(error, ENOTSUP,
3254                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3255 }
3256
3257 static int
3258 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3259                 struct rte_flow *flow __rte_unused,
3260                 struct rte_flow_error *error)
3261 {
3262         return rte_flow_error_set(error, ENOTSUP,
3263                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3264 }
3265
3266 static void
3267 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3268                  struct rte_flow *flow __rte_unused)
3269 {
3270 }
3271
3272 static void
3273 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3274                   struct rte_flow *flow __rte_unused)
3275 {
3276 }
3277
3278 static int
3279 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3280                 struct rte_flow *flow __rte_unused,
3281                 const struct rte_flow_action *actions __rte_unused,
3282                 void *data __rte_unused,
3283                 struct rte_flow_error *error)
3284 {
3285         return rte_flow_error_set(error, ENOTSUP,
3286                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3287 }
3288
3289 static int
3290 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3291                       uint32_t domains __rte_unused,
3292                       uint32_t flags __rte_unused)
3293 {
3294         return 0;
3295 }
3296
3297 /* Void driver to protect from null pointer reference. */
3298 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3299         .validate = flow_null_validate,
3300         .prepare = flow_null_prepare,
3301         .translate = flow_null_translate,
3302         .apply = flow_null_apply,
3303         .remove = flow_null_remove,
3304         .destroy = flow_null_destroy,
3305         .query = flow_null_query,
3306         .sync_domain = flow_null_sync_domain,
3307 };
3308
3309 /**
3310  * Select flow driver type according to flow attributes and device
3311  * configuration.
3312  *
3313  * @param[in] dev
3314  *   Pointer to the dev structure.
3315  * @param[in] attr
3316  *   Pointer to the flow attributes.
3317  *
3318  * @return
3319  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3320  */
3321 static enum mlx5_flow_drv_type
3322 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3323 {
3324         struct mlx5_priv *priv = dev->data->dev_private;
3325         /* The OS can determine first a specific flow type (DV, VERBS) */
3326         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3327
3328         if (type != MLX5_FLOW_TYPE_MAX)
3329                 return type;
3330         /* If no OS specific type - continue with DV/VERBS selection */
3331         if (attr->transfer && priv->config.dv_esw_en)
3332                 type = MLX5_FLOW_TYPE_DV;
3333         if (!attr->transfer)
3334                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3335                                                  MLX5_FLOW_TYPE_VERBS;
3336         return type;
3337 }
3338
3339 #define flow_get_drv_ops(type) flow_drv_ops[type]
3340
3341 /**
3342  * Flow driver validation API. This abstracts calling driver specific functions.
3343  * The type of flow driver is determined according to flow attributes.
3344  *
3345  * @param[in] dev
3346  *   Pointer to the dev structure.
3347  * @param[in] attr
3348  *   Pointer to the flow attributes.
3349  * @param[in] items
3350  *   Pointer to the list of items.
3351  * @param[in] actions
3352  *   Pointer to the list of actions.
3353  * @param[in] external
3354  *   This flow rule is created by request external to PMD.
3355  * @param[in] hairpin
3356  *   Number of hairpin TX actions, 0 means classic flow.
3357  * @param[out] error
3358  *   Pointer to the error structure.
3359  *
3360  * @return
3361  *   0 on success, a negative errno value otherwise and rte_errno is set.
3362  */
3363 static inline int
3364 flow_drv_validate(struct rte_eth_dev *dev,
3365                   const struct rte_flow_attr *attr,
3366                   const struct rte_flow_item items[],
3367                   const struct rte_flow_action actions[],
3368                   bool external, int hairpin, struct rte_flow_error *error)
3369 {
3370         const struct mlx5_flow_driver_ops *fops;
3371         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3372
3373         fops = flow_get_drv_ops(type);
3374         return fops->validate(dev, attr, items, actions, external,
3375                               hairpin, error);
3376 }
3377
3378 /**
3379  * Flow driver preparation API. This abstracts calling driver specific
3380  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3381  * calculates the size of memory required for device flow, allocates the memory,
3382  * initializes the device flow and returns the pointer.
3383  *
3384  * @note
3385  *   This function initializes device flow structure such as dv or verbs in
3386  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3387  *   rest. For example, adding returning device flow to flow->dev_flow list and
3388  *   setting backward reference to the flow should be done out of this function.
3389  *   layers field is not filled either.
3390  *
3391  * @param[in] dev
3392  *   Pointer to the dev structure.
3393  * @param[in] attr
3394  *   Pointer to the flow attributes.
3395  * @param[in] items
3396  *   Pointer to the list of items.
3397  * @param[in] actions
3398  *   Pointer to the list of actions.
3399  * @param[in] flow_idx
3400  *   This memory pool index to the flow.
3401  * @param[out] error
3402  *   Pointer to the error structure.
3403  *
3404  * @return
3405  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3406  */
3407 static inline struct mlx5_flow *
3408 flow_drv_prepare(struct rte_eth_dev *dev,
3409                  const struct rte_flow *flow,
3410                  const struct rte_flow_attr *attr,
3411                  const struct rte_flow_item items[],
3412                  const struct rte_flow_action actions[],
3413                  uint32_t flow_idx,
3414                  struct rte_flow_error *error)
3415 {
3416         const struct mlx5_flow_driver_ops *fops;
3417         enum mlx5_flow_drv_type type = flow->drv_type;
3418         struct mlx5_flow *mlx5_flow = NULL;
3419
3420         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3421         fops = flow_get_drv_ops(type);
3422         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3423         if (mlx5_flow)
3424                 mlx5_flow->flow_idx = flow_idx;
3425         return mlx5_flow;
3426 }
3427
3428 /**
3429  * Flow driver translation API. This abstracts calling driver specific
3430  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3431  * translates a generic flow into a driver flow. flow_drv_prepare() must
3432  * precede.
3433  *
3434  * @note
3435  *   dev_flow->layers could be filled as a result of parsing during translation
3436  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3437  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3438  *   flow->actions could be overwritten even though all the expanded dev_flows
3439  *   have the same actions.
3440  *
3441  * @param[in] dev
3442  *   Pointer to the rte dev structure.
3443  * @param[in, out] dev_flow
3444  *   Pointer to the mlx5 flow.
3445  * @param[in] attr
3446  *   Pointer to the flow attributes.
3447  * @param[in] items
3448  *   Pointer to the list of items.
3449  * @param[in] actions
3450  *   Pointer to the list of actions.
3451  * @param[out] error
3452  *   Pointer to the error structure.
3453  *
3454  * @return
3455  *   0 on success, a negative errno value otherwise and rte_errno is set.
3456  */
3457 static inline int
3458 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3459                    const struct rte_flow_attr *attr,
3460                    const struct rte_flow_item items[],
3461                    const struct rte_flow_action actions[],
3462                    struct rte_flow_error *error)
3463 {
3464         const struct mlx5_flow_driver_ops *fops;
3465         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3466
3467         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3468         fops = flow_get_drv_ops(type);
3469         return fops->translate(dev, dev_flow, attr, items, actions, error);
3470 }
3471
3472 /**
3473  * Flow driver apply API. This abstracts calling driver specific functions.
3474  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3475  * translated driver flows on to device. flow_drv_translate() must precede.
3476  *
3477  * @param[in] dev
3478  *   Pointer to Ethernet device structure.
3479  * @param[in, out] flow
3480  *   Pointer to flow structure.
3481  * @param[out] error
3482  *   Pointer to error structure.
3483  *
3484  * @return
3485  *   0 on success, a negative errno value otherwise and rte_errno is set.
3486  */
3487 static inline int
3488 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3489                struct rte_flow_error *error)
3490 {
3491         const struct mlx5_flow_driver_ops *fops;
3492         enum mlx5_flow_drv_type type = flow->drv_type;
3493
3494         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3495         fops = flow_get_drv_ops(type);
3496         return fops->apply(dev, flow, error);
3497 }
3498
3499 /**
3500  * Flow driver destroy API. This abstracts calling driver specific functions.
3501  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3502  * on device and releases resources of the flow.
3503  *
3504  * @param[in] dev
3505  *   Pointer to Ethernet device.
3506  * @param[in, out] flow
3507  *   Pointer to flow structure.
3508  */
3509 static inline void
3510 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3511 {
3512         const struct mlx5_flow_driver_ops *fops;
3513         enum mlx5_flow_drv_type type = flow->drv_type;
3514
3515         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3516         fops = flow_get_drv_ops(type);
3517         fops->destroy(dev, flow);
3518 }
3519
3520 /**
3521  * Flow driver find RSS policy tbl API. This abstracts calling driver
3522  * specific functions. Parent flow (rte_flow) should have driver
3523  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3524  *
3525  * @param[in] dev
3526  *   Pointer to Ethernet device.
3527  * @param[in, out] flow
3528  *   Pointer to flow structure.
3529  * @param[in] policy
3530  *   Pointer to meter policy table.
3531  * @param[in] rss_desc
3532  *   Pointer to rss_desc
3533  */
3534 static struct mlx5_flow_meter_sub_policy *
3535 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3536                 struct rte_flow *flow,
3537                 struct mlx5_flow_meter_policy *policy,
3538                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3539 {
3540         const struct mlx5_flow_driver_ops *fops;
3541         enum mlx5_flow_drv_type type = flow->drv_type;
3542
3543         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3544         fops = flow_get_drv_ops(type);
3545         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3546 }
3547
3548 /**
3549  * Flow driver color tag rule API. This abstracts calling driver
3550  * specific functions. Parent flow (rte_flow) should have driver
3551  * type (drv_type). It will create the color tag rules in hierarchy meter.
3552  *
3553  * @param[in] dev
3554  *   Pointer to Ethernet device.
3555  * @param[in, out] flow
3556  *   Pointer to flow structure.
3557  * @param[in] fm
3558  *   Pointer to flow meter structure.
3559  * @param[in] src_port
3560  *   The src port this extra rule should use.
3561  * @param[in] item
3562  *   The src port id match item.
3563  * @param[out] error
3564  *   Pointer to error structure.
3565  */
3566 static int
3567 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3568                 struct rte_flow *flow,
3569                 struct mlx5_flow_meter_info *fm,
3570                 int32_t src_port,
3571                 const struct rte_flow_item *item,
3572                 struct rte_flow_error *error)
3573 {
3574         const struct mlx5_flow_driver_ops *fops;
3575         enum mlx5_flow_drv_type type = flow->drv_type;
3576
3577         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3578         fops = flow_get_drv_ops(type);
3579         return fops->meter_hierarchy_rule_create(dev, fm,
3580                                                 src_port, item, error);
3581 }
3582
3583 /**
3584  * Get RSS action from the action list.
3585  *
3586  * @param[in] dev
3587  *   Pointer to Ethernet device.
3588  * @param[in] actions
3589  *   Pointer to the list of actions.
3590  * @param[in] flow
3591  *   Parent flow structure pointer.
3592  *
3593  * @return
3594  *   Pointer to the RSS action if exist, else return NULL.
3595  */
3596 static const struct rte_flow_action_rss*
3597 flow_get_rss_action(struct rte_eth_dev *dev,
3598                     const struct rte_flow_action actions[])
3599 {
3600         struct mlx5_priv *priv = dev->data->dev_private;
3601         const struct rte_flow_action_rss *rss = NULL;
3602
3603         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3604                 switch (actions->type) {
3605                 case RTE_FLOW_ACTION_TYPE_RSS:
3606                         rss = actions->conf;
3607                         break;
3608                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3609                 {
3610                         const struct rte_flow_action_sample *sample =
3611                                                                 actions->conf;
3612                         const struct rte_flow_action *act = sample->actions;
3613                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3614                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3615                                         rss = act->conf;
3616                         break;
3617                 }
3618                 case RTE_FLOW_ACTION_TYPE_METER:
3619                 {
3620                         uint32_t mtr_idx;
3621                         struct mlx5_flow_meter_info *fm;
3622                         struct mlx5_flow_meter_policy *policy;
3623                         const struct rte_flow_action_meter *mtr = actions->conf;
3624
3625                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3626                         if (fm && !fm->def_policy) {
3627                                 policy = mlx5_flow_meter_policy_find(dev,
3628                                                 fm->policy_id, NULL);
3629                                 MLX5_ASSERT(policy);
3630                                 if (policy->is_hierarchy) {
3631                                         policy =
3632                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3633                                                                         policy);
3634                                         if (!policy)
3635                                                 return NULL;
3636                                 }
3637                                 if (policy->is_rss)
3638                                         rss =
3639                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3640                         }
3641                         break;
3642                 }
3643                 default:
3644                         break;
3645                 }
3646         }
3647         return rss;
3648 }
3649
3650 /**
3651  * Get ASO age action by index.
3652  *
3653  * @param[in] dev
3654  *   Pointer to the Ethernet device structure.
3655  * @param[in] age_idx
3656  *   Index to the ASO age action.
3657  *
3658  * @return
3659  *   The specified ASO age action.
3660  */
3661 struct mlx5_aso_age_action*
3662 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3663 {
3664         uint16_t pool_idx = age_idx & UINT16_MAX;
3665         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3666         struct mlx5_priv *priv = dev->data->dev_private;
3667         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3668         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3669
3670         return &pool->actions[offset - 1];
3671 }
3672
3673 /* maps indirect action to translated direct in some actions array */
3674 struct mlx5_translated_action_handle {
3675         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3676         int index; /**< Index in related array of rte_flow_action. */
3677 };
3678
3679 /**
3680  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3681  * direct action if translation possible.
3682  * This functionality used to run same execution path for both direct and
3683  * indirect actions on flow create. All necessary preparations for indirect
3684  * action handling should be performed on *handle* actions list returned
3685  * from this call.
3686  *
3687  * @param[in] dev
3688  *   Pointer to Ethernet device.
3689  * @param[in] actions
3690  *   List of actions to translate.
3691  * @param[out] handle
3692  *   List to store translated indirect action object handles.
3693  * @param[in, out] indir_n
3694  *   Size of *handle* array. On return should be updated with number of
3695  *   indirect actions retrieved from the *actions* list.
3696  * @param[out] translated_actions
3697  *   List of actions where all indirect actions were translated to direct
3698  *   if possible. NULL if no translation took place.
3699  * @param[out] error
3700  *   Pointer to the error structure.
3701  *
3702  * @return
3703  *   0 on success, a negative errno value otherwise and rte_errno is set.
3704  */
3705 static int
3706 flow_action_handles_translate(struct rte_eth_dev *dev,
3707                               const struct rte_flow_action actions[],
3708                               struct mlx5_translated_action_handle *handle,
3709                               int *indir_n,
3710                               struct rte_flow_action **translated_actions,
3711                               struct rte_flow_error *error)
3712 {
3713         struct mlx5_priv *priv = dev->data->dev_private;
3714         struct rte_flow_action *translated = NULL;
3715         size_t actions_size;
3716         int n;
3717         int copied_n = 0;
3718         struct mlx5_translated_action_handle *handle_end = NULL;
3719
3720         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3721                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3722                         continue;
3723                 if (copied_n == *indir_n) {
3724                         return rte_flow_error_set
3725                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3726                                  NULL, "too many shared actions");
3727                 }
3728                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3729                            sizeof(actions[n].conf));
3730                 handle[copied_n].index = n;
3731                 copied_n++;
3732         }
3733         n++;
3734         *indir_n = copied_n;
3735         if (!copied_n)
3736                 return 0;
3737         actions_size = sizeof(struct rte_flow_action) * n;
3738         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3739         if (!translated) {
3740                 rte_errno = ENOMEM;
3741                 return -ENOMEM;
3742         }
3743         memcpy(translated, actions, actions_size);
3744         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3745                 struct mlx5_shared_action_rss *shared_rss;
3746                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3747                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3748                 uint32_t idx = act_idx &
3749                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3750
3751                 switch (type) {
3752                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3753                         shared_rss = mlx5_ipool_get
3754                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3755                         translated[handle->index].type =
3756                                 RTE_FLOW_ACTION_TYPE_RSS;
3757                         translated[handle->index].conf =
3758                                 &shared_rss->origin;
3759                         break;
3760                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3761                         translated[handle->index].type =
3762                                                 (enum rte_flow_action_type)
3763                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3764                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3765                         break;
3766                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3767                         if (priv->sh->flow_hit_aso_en) {
3768                                 translated[handle->index].type =
3769                                         (enum rte_flow_action_type)
3770                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3771                                 translated[handle->index].conf =
3772                                                          (void *)(uintptr_t)idx;
3773                                 break;
3774                         }
3775                         /* Fall-through */
3776                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3777                         if (priv->sh->ct_aso_en) {
3778                                 translated[handle->index].type =
3779                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3780                                 translated[handle->index].conf =
3781                                                          (void *)(uintptr_t)idx;
3782                                 break;
3783                         }
3784                         /* Fall-through */
3785                 default:
3786                         mlx5_free(translated);
3787                         return rte_flow_error_set
3788                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3789                                  NULL, "invalid indirect action type");
3790                 }
3791         }
3792         *translated_actions = translated;
3793         return 0;
3794 }
3795
3796 /**
3797  * Get Shared RSS action from the action list.
3798  *
3799  * @param[in] dev
3800  *   Pointer to Ethernet device.
3801  * @param[in] shared
3802  *   Pointer to the list of actions.
3803  * @param[in] shared_n
3804  *   Actions list length.
3805  *
3806  * @return
3807  *   The MLX5 RSS action ID if exists, otherwise return 0.
3808  */
3809 static uint32_t
3810 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3811                            struct mlx5_translated_action_handle *handle,
3812                            int shared_n)
3813 {
3814         struct mlx5_translated_action_handle *handle_end;
3815         struct mlx5_priv *priv = dev->data->dev_private;
3816         struct mlx5_shared_action_rss *shared_rss;
3817
3818
3819         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3820                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3821                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3822                 uint32_t idx = act_idx &
3823                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3824                 switch (type) {
3825                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3826                         shared_rss = mlx5_ipool_get
3827                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3828                                                                            idx);
3829                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3830                                            __ATOMIC_RELAXED);
3831                         return idx;
3832                 default:
3833                         break;
3834                 }
3835         }
3836         return 0;
3837 }
3838
3839 static unsigned int
3840 find_graph_root(uint32_t rss_level)
3841 {
3842         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3843                                MLX5_EXPANSION_ROOT_OUTER;
3844 }
3845
3846 /**
3847  *  Get layer flags from the prefix flow.
3848  *
3849  *  Some flows may be split to several subflows, the prefix subflow gets the
3850  *  match items and the suffix sub flow gets the actions.
3851  *  Some actions need the user defined match item flags to get the detail for
3852  *  the action.
3853  *  This function helps the suffix flow to get the item layer flags from prefix
3854  *  subflow.
3855  *
3856  * @param[in] dev_flow
3857  *   Pointer the created preifx subflow.
3858  *
3859  * @return
3860  *   The layers get from prefix subflow.
3861  */
3862 static inline uint64_t
3863 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3864 {
3865         uint64_t layers = 0;
3866
3867         /*
3868          * Layers bits could be localization, but usually the compiler will
3869          * help to do the optimization work for source code.
3870          * If no decap actions, use the layers directly.
3871          */
3872         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3873                 return dev_flow->handle->layers;
3874         /* Convert L3 layers with decap action. */
3875         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3876                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3877         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3878                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3879         /* Convert L4 layers with decap action.  */
3880         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3881                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3882         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3883                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3884         return layers;
3885 }
3886
3887 /**
3888  * Get metadata split action information.
3889  *
3890  * @param[in] actions
3891  *   Pointer to the list of actions.
3892  * @param[out] qrss
3893  *   Pointer to the return pointer.
3894  * @param[out] qrss_type
3895  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3896  *   if no QUEUE/RSS is found.
3897  * @param[out] encap_idx
3898  *   Pointer to the index of the encap action if exists, otherwise the last
3899  *   action index.
3900  *
3901  * @return
3902  *   Total number of actions.
3903  */
3904 static int
3905 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3906                                        const struct rte_flow_action **qrss,
3907                                        int *encap_idx)
3908 {
3909         const struct rte_flow_action_raw_encap *raw_encap;
3910         int actions_n = 0;
3911         int raw_decap_idx = -1;
3912
3913         *encap_idx = -1;
3914         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3915                 switch (actions->type) {
3916                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3917                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3918                         *encap_idx = actions_n;
3919                         break;
3920                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3921                         raw_decap_idx = actions_n;
3922                         break;
3923                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3924                         raw_encap = actions->conf;
3925                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3926                                 *encap_idx = raw_decap_idx != -1 ?
3927                                                       raw_decap_idx : actions_n;
3928                         break;
3929                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3930                 case RTE_FLOW_ACTION_TYPE_RSS:
3931                         *qrss = actions;
3932                         break;
3933                 default:
3934                         break;
3935                 }
3936                 actions_n++;
3937         }
3938         if (*encap_idx == -1)
3939                 *encap_idx = actions_n;
3940         /* Count RTE_FLOW_ACTION_TYPE_END. */
3941         return actions_n + 1;
3942 }
3943
3944 /**
3945  * Check if the action will change packet.
3946  *
3947  * @param dev
3948  *   Pointer to Ethernet device.
3949  * @param[in] type
3950  *   action type.
3951  *
3952  * @return
3953  *   true if action will change packet, false otherwise.
3954  */
3955 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3956                                           enum rte_flow_action_type type)
3957 {
3958         struct mlx5_priv *priv = dev->data->dev_private;
3959
3960         switch (type) {
3961         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3962         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3963         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3964         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3965         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3966         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3967         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3968         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3969         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3970         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3971         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3972         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3973         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3974         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3975         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3976         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3977         case RTE_FLOW_ACTION_TYPE_SET_META:
3978         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3979         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3980         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3981         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3982         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3983         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3984         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3985         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3986         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3987         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3988         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3989         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3990                 return true;
3991         case RTE_FLOW_ACTION_TYPE_FLAG:
3992         case RTE_FLOW_ACTION_TYPE_MARK:
3993                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3994                         return true;
3995                 else
3996                         return false;
3997         default:
3998                 return false;
3999         }
4000 }
4001
4002 /**
4003  * Check meter action from the action list.
4004  *
4005  * @param dev
4006  *   Pointer to Ethernet device.
4007  * @param[in] actions
4008  *   Pointer to the list of actions.
4009  * @param[out] has_mtr
4010  *   Pointer to the meter exist flag.
4011  * @param[out] has_modify
4012  *   Pointer to the flag showing there's packet change action.
4013  * @param[out] meter_id
4014  *   Pointer to the meter id.
4015  *
4016  * @return
4017  *   Total number of actions.
4018  */
4019 static int
4020 flow_check_meter_action(struct rte_eth_dev *dev,
4021                         const struct rte_flow_action actions[],
4022                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4023 {
4024         const struct rte_flow_action_meter *mtr = NULL;
4025         int actions_n = 0;
4026
4027         MLX5_ASSERT(has_mtr);
4028         *has_mtr = false;
4029         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4030                 switch (actions->type) {
4031                 case RTE_FLOW_ACTION_TYPE_METER:
4032                         mtr = actions->conf;
4033                         *meter_id = mtr->mtr_id;
4034                         *has_mtr = true;
4035                         break;
4036                 default:
4037                         break;
4038                 }
4039                 if (!*has_mtr)
4040                         *has_modify |= flow_check_modify_action_type(dev,
4041                                                                 actions->type);
4042                 actions_n++;
4043         }
4044         /* Count RTE_FLOW_ACTION_TYPE_END. */
4045         return actions_n + 1;
4046 }
4047
4048 /**
4049  * Check if the flow should be split due to hairpin.
4050  * The reason for the split is that in current HW we can't
4051  * support encap and push-vlan on Rx, so if a flow contains
4052  * these actions we move it to Tx.
4053  *
4054  * @param dev
4055  *   Pointer to Ethernet device.
4056  * @param[in] attr
4057  *   Flow rule attributes.
4058  * @param[in] actions
4059  *   Associated actions (list terminated by the END action).
4060  *
4061  * @return
4062  *   > 0 the number of actions and the flow should be split,
4063  *   0 when no split required.
4064  */
4065 static int
4066 flow_check_hairpin_split(struct rte_eth_dev *dev,
4067                          const struct rte_flow_attr *attr,
4068                          const struct rte_flow_action actions[])
4069 {
4070         int queue_action = 0;
4071         int action_n = 0;
4072         int split = 0;
4073         const struct rte_flow_action_queue *queue;
4074         const struct rte_flow_action_rss *rss;
4075         const struct rte_flow_action_raw_encap *raw_encap;
4076         const struct rte_eth_hairpin_conf *conf;
4077
4078         if (!attr->ingress)
4079                 return 0;
4080         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4081                 switch (actions->type) {
4082                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4083                         queue = actions->conf;
4084                         if (queue == NULL)
4085                                 return 0;
4086                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4087                         if (conf == NULL || conf->tx_explicit != 0)
4088                                 return 0;
4089                         queue_action = 1;
4090                         action_n++;
4091                         break;
4092                 case RTE_FLOW_ACTION_TYPE_RSS:
4093                         rss = actions->conf;
4094                         if (rss == NULL || rss->queue_num == 0)
4095                                 return 0;
4096                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4097                         if (conf == NULL || conf->tx_explicit != 0)
4098                                 return 0;
4099                         queue_action = 1;
4100                         action_n++;
4101                         break;
4102                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4103                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4104                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4105                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4106                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4107                         split++;
4108                         action_n++;
4109                         break;
4110                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4111                         raw_encap = actions->conf;
4112                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4113                                 split++;
4114                         action_n++;
4115                         break;
4116                 default:
4117                         action_n++;
4118                         break;
4119                 }
4120         }
4121         if (split && queue_action)
4122                 return action_n;
4123         return 0;
4124 }
4125
4126 /* Declare flow create/destroy prototype in advance. */
4127 static uint32_t
4128 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4129                  const struct rte_flow_attr *attr,
4130                  const struct rte_flow_item items[],
4131                  const struct rte_flow_action actions[],
4132                  bool external, struct rte_flow_error *error);
4133
4134 static void
4135 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4136                   uint32_t flow_idx);
4137
4138 int
4139 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4140                       struct mlx5_list_entry *entry, void *cb_ctx)
4141 {
4142         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4143         struct mlx5_flow_mreg_copy_resource *mcp_res =
4144                                container_of(entry, typeof(*mcp_res), hlist_ent);
4145
4146         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4147 }
4148
4149 struct mlx5_list_entry *
4150 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4151 {
4152         struct rte_eth_dev *dev = tool_ctx;
4153         struct mlx5_priv *priv = dev->data->dev_private;
4154         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4155         struct mlx5_flow_mreg_copy_resource *mcp_res;
4156         struct rte_flow_error *error = ctx->error;
4157         uint32_t idx = 0;
4158         int ret;
4159         uint32_t mark_id = *(uint32_t *)(ctx->data);
4160         struct rte_flow_attr attr = {
4161                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4162                 .ingress = 1,
4163         };
4164         struct mlx5_rte_flow_item_tag tag_spec = {
4165                 .data = mark_id,
4166         };
4167         struct rte_flow_item items[] = {
4168                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4169         };
4170         struct rte_flow_action_mark ftag = {
4171                 .id = mark_id,
4172         };
4173         struct mlx5_flow_action_copy_mreg cp_mreg = {
4174                 .dst = REG_B,
4175                 .src = REG_NON,
4176         };
4177         struct rte_flow_action_jump jump = {
4178                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4179         };
4180         struct rte_flow_action actions[] = {
4181                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4182         };
4183
4184         /* Fill the register fileds in the flow. */
4185         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4186         if (ret < 0)
4187                 return NULL;
4188         tag_spec.id = ret;
4189         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4190         if (ret < 0)
4191                 return NULL;
4192         cp_mreg.src = ret;
4193         /* Provide the full width of FLAG specific value. */
4194         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4195                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4196         /* Build a new flow. */
4197         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4198                 items[0] = (struct rte_flow_item){
4199                         .type = (enum rte_flow_item_type)
4200                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4201                         .spec = &tag_spec,
4202                 };
4203                 items[1] = (struct rte_flow_item){
4204                         .type = RTE_FLOW_ITEM_TYPE_END,
4205                 };
4206                 actions[0] = (struct rte_flow_action){
4207                         .type = (enum rte_flow_action_type)
4208                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4209                         .conf = &ftag,
4210                 };
4211                 actions[1] = (struct rte_flow_action){
4212                         .type = (enum rte_flow_action_type)
4213                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4214                         .conf = &cp_mreg,
4215                 };
4216                 actions[2] = (struct rte_flow_action){
4217                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4218                         .conf = &jump,
4219                 };
4220                 actions[3] = (struct rte_flow_action){
4221                         .type = RTE_FLOW_ACTION_TYPE_END,
4222                 };
4223         } else {
4224                 /* Default rule, wildcard match. */
4225                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4226                 items[0] = (struct rte_flow_item){
4227                         .type = RTE_FLOW_ITEM_TYPE_END,
4228                 };
4229                 actions[0] = (struct rte_flow_action){
4230                         .type = (enum rte_flow_action_type)
4231                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4232                         .conf = &cp_mreg,
4233                 };
4234                 actions[1] = (struct rte_flow_action){
4235                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4236                         .conf = &jump,
4237                 };
4238                 actions[2] = (struct rte_flow_action){
4239                         .type = RTE_FLOW_ACTION_TYPE_END,
4240                 };
4241         }
4242         /* Build a new entry. */
4243         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4244         if (!mcp_res) {
4245                 rte_errno = ENOMEM;
4246                 return NULL;
4247         }
4248         mcp_res->idx = idx;
4249         mcp_res->mark_id = mark_id;
4250         /*
4251          * The copy Flows are not included in any list. There
4252          * ones are referenced from other Flows and can not
4253          * be applied, removed, deleted in ardbitrary order
4254          * by list traversing.
4255          */
4256         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4257                                         &attr, items, actions, false, error);
4258         if (!mcp_res->rix_flow) {
4259                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4260                 return NULL;
4261         }
4262         return &mcp_res->hlist_ent;
4263 }
4264
4265 struct mlx5_list_entry *
4266 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4267                       void *cb_ctx __rte_unused)
4268 {
4269         struct rte_eth_dev *dev = tool_ctx;
4270         struct mlx5_priv *priv = dev->data->dev_private;
4271         struct mlx5_flow_mreg_copy_resource *mcp_res;
4272         uint32_t idx = 0;
4273
4274         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4275         if (!mcp_res) {
4276                 rte_errno = ENOMEM;
4277                 return NULL;
4278         }
4279         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4280         mcp_res->idx = idx;
4281         return &mcp_res->hlist_ent;
4282 }
4283
4284 void
4285 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4286 {
4287         struct mlx5_flow_mreg_copy_resource *mcp_res =
4288                                container_of(entry, typeof(*mcp_res), hlist_ent);
4289         struct rte_eth_dev *dev = tool_ctx;
4290         struct mlx5_priv *priv = dev->data->dev_private;
4291
4292         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4293 }
4294
4295 /**
4296  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4297  *
4298  * As mark_id is unique, if there's already a registered flow for the mark_id,
4299  * return by increasing the reference counter of the resource. Otherwise, create
4300  * the resource (mcp_res) and flow.
4301  *
4302  * Flow looks like,
4303  *   - If ingress port is ANY and reg_c[1] is mark_id,
4304  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4305  *
4306  * For default flow (zero mark_id), flow is like,
4307  *   - If ingress port is ANY,
4308  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4309  *
4310  * @param dev
4311  *   Pointer to Ethernet device.
4312  * @param mark_id
4313  *   ID of MARK action, zero means default flow for META.
4314  * @param[out] error
4315  *   Perform verbose error reporting if not NULL.
4316  *
4317  * @return
4318  *   Associated resource on success, NULL otherwise and rte_errno is set.
4319  */
4320 static struct mlx5_flow_mreg_copy_resource *
4321 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4322                           struct rte_flow_error *error)
4323 {
4324         struct mlx5_priv *priv = dev->data->dev_private;
4325         struct mlx5_list_entry *entry;
4326         struct mlx5_flow_cb_ctx ctx = {
4327                 .dev = dev,
4328                 .error = error,
4329                 .data = &mark_id,
4330         };
4331
4332         /* Check if already registered. */
4333         MLX5_ASSERT(priv->mreg_cp_tbl);
4334         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4335         if (!entry)
4336                 return NULL;
4337         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4338                             hlist_ent);
4339 }
4340
4341 void
4342 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4343 {
4344         struct mlx5_flow_mreg_copy_resource *mcp_res =
4345                                container_of(entry, typeof(*mcp_res), hlist_ent);
4346         struct rte_eth_dev *dev = tool_ctx;
4347         struct mlx5_priv *priv = dev->data->dev_private;
4348
4349         MLX5_ASSERT(mcp_res->rix_flow);
4350         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4351         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4352 }
4353
4354 /**
4355  * Release flow in RX_CP_TBL.
4356  *
4357  * @param dev
4358  *   Pointer to Ethernet device.
4359  * @flow
4360  *   Parent flow for wich copying is provided.
4361  */
4362 static void
4363 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4364                           struct rte_flow *flow)
4365 {
4366         struct mlx5_flow_mreg_copy_resource *mcp_res;
4367         struct mlx5_priv *priv = dev->data->dev_private;
4368
4369         if (!flow->rix_mreg_copy)
4370                 return;
4371         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4372                                  flow->rix_mreg_copy);
4373         if (!mcp_res || !priv->mreg_cp_tbl)
4374                 return;
4375         MLX5_ASSERT(mcp_res->rix_flow);
4376         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4377         flow->rix_mreg_copy = 0;
4378 }
4379
4380 /**
4381  * Remove the default copy action from RX_CP_TBL.
4382  *
4383  * This functions is called in the mlx5_dev_start(). No thread safe
4384  * is guaranteed.
4385  *
4386  * @param dev
4387  *   Pointer to Ethernet device.
4388  */
4389 static void
4390 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4391 {
4392         struct mlx5_list_entry *entry;
4393         struct mlx5_priv *priv = dev->data->dev_private;
4394         struct mlx5_flow_cb_ctx ctx;
4395         uint32_t mark_id;
4396
4397         /* Check if default flow is registered. */
4398         if (!priv->mreg_cp_tbl)
4399                 return;
4400         mark_id = MLX5_DEFAULT_COPY_ID;
4401         ctx.data = &mark_id;
4402         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4403         if (!entry)
4404                 return;
4405         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4406 }
4407
4408 /**
4409  * Add the default copy action in in RX_CP_TBL.
4410  *
4411  * This functions is called in the mlx5_dev_start(). No thread safe
4412  * is guaranteed.
4413  *
4414  * @param dev
4415  *   Pointer to Ethernet device.
4416  * @param[out] error
4417  *   Perform verbose error reporting if not NULL.
4418  *
4419  * @return
4420  *   0 for success, negative value otherwise and rte_errno is set.
4421  */
4422 static int
4423 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4424                                   struct rte_flow_error *error)
4425 {
4426         struct mlx5_priv *priv = dev->data->dev_private;
4427         struct mlx5_flow_mreg_copy_resource *mcp_res;
4428         struct mlx5_flow_cb_ctx ctx;
4429         uint32_t mark_id;
4430
4431         /* Check whether extensive metadata feature is engaged. */
4432         if (!priv->config.dv_flow_en ||
4433             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4434             !mlx5_flow_ext_mreg_supported(dev) ||
4435             !priv->sh->dv_regc0_mask)
4436                 return 0;
4437         /*
4438          * Add default mreg copy flow may be called multiple time, but
4439          * only be called once in stop. Avoid register it twice.
4440          */
4441         mark_id = MLX5_DEFAULT_COPY_ID;
4442         ctx.data = &mark_id;
4443         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4444                 return 0;
4445         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4446         if (!mcp_res)
4447                 return -rte_errno;
4448         return 0;
4449 }
4450
4451 /**
4452  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4453  *
4454  * All the flow having Q/RSS action should be split by
4455  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4456  * performs the following,
4457  *   - CQE->flow_tag := reg_c[1] (MARK)
4458  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4459  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4460  * but there should be a flow per each MARK ID set by MARK action.
4461  *
4462  * For the aforementioned reason, if there's a MARK action in flow's action
4463  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4464  * the MARK ID to CQE's flow_tag like,
4465  *   - If reg_c[1] is mark_id,
4466  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4467  *
4468  * For SET_META action which stores value in reg_c[0], as the destination is
4469  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4470  * MARK ID means the default flow. The default flow looks like,
4471  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4472  *
4473  * @param dev
4474  *   Pointer to Ethernet device.
4475  * @param flow
4476  *   Pointer to flow structure.
4477  * @param[in] actions
4478  *   Pointer to the list of actions.
4479  * @param[out] error
4480  *   Perform verbose error reporting if not NULL.
4481  *
4482  * @return
4483  *   0 on success, negative value otherwise and rte_errno is set.
4484  */
4485 static int
4486 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4487                             struct rte_flow *flow,
4488                             const struct rte_flow_action *actions,
4489                             struct rte_flow_error *error)
4490 {
4491         struct mlx5_priv *priv = dev->data->dev_private;
4492         struct mlx5_dev_config *config = &priv->config;
4493         struct mlx5_flow_mreg_copy_resource *mcp_res;
4494         const struct rte_flow_action_mark *mark;
4495
4496         /* Check whether extensive metadata feature is engaged. */
4497         if (!config->dv_flow_en ||
4498             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4499             !mlx5_flow_ext_mreg_supported(dev) ||
4500             !priv->sh->dv_regc0_mask)
4501                 return 0;
4502         /* Find MARK action. */
4503         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4504                 switch (actions->type) {
4505                 case RTE_FLOW_ACTION_TYPE_FLAG:
4506                         mcp_res = flow_mreg_add_copy_action
4507                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4508                         if (!mcp_res)
4509                                 return -rte_errno;
4510                         flow->rix_mreg_copy = mcp_res->idx;
4511                         return 0;
4512                 case RTE_FLOW_ACTION_TYPE_MARK:
4513                         mark = (const struct rte_flow_action_mark *)
4514                                 actions->conf;
4515                         mcp_res =
4516                                 flow_mreg_add_copy_action(dev, mark->id, error);
4517                         if (!mcp_res)
4518                                 return -rte_errno;
4519                         flow->rix_mreg_copy = mcp_res->idx;
4520                         return 0;
4521                 default:
4522                         break;
4523                 }
4524         }
4525         return 0;
4526 }
4527
4528 #define MLX5_MAX_SPLIT_ACTIONS 24
4529 #define MLX5_MAX_SPLIT_ITEMS 24
4530
4531 /**
4532  * Split the hairpin flow.
4533  * Since HW can't support encap and push-vlan on Rx, we move these
4534  * actions to Tx.
4535  * If the count action is after the encap then we also
4536  * move the count action. in this case the count will also measure
4537  * the outer bytes.
4538  *
4539  * @param dev
4540  *   Pointer to Ethernet device.
4541  * @param[in] actions
4542  *   Associated actions (list terminated by the END action).
4543  * @param[out] actions_rx
4544  *   Rx flow actions.
4545  * @param[out] actions_tx
4546  *   Tx flow actions..
4547  * @param[out] pattern_tx
4548  *   The pattern items for the Tx flow.
4549  * @param[out] flow_id
4550  *   The flow ID connected to this flow.
4551  *
4552  * @return
4553  *   0 on success.
4554  */
4555 static int
4556 flow_hairpin_split(struct rte_eth_dev *dev,
4557                    const struct rte_flow_action actions[],
4558                    struct rte_flow_action actions_rx[],
4559                    struct rte_flow_action actions_tx[],
4560                    struct rte_flow_item pattern_tx[],
4561                    uint32_t flow_id)
4562 {
4563         const struct rte_flow_action_raw_encap *raw_encap;
4564         const struct rte_flow_action_raw_decap *raw_decap;
4565         struct mlx5_rte_flow_action_set_tag *set_tag;
4566         struct rte_flow_action *tag_action;
4567         struct mlx5_rte_flow_item_tag *tag_item;
4568         struct rte_flow_item *item;
4569         char *addr;
4570         int encap = 0;
4571
4572         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4573                 switch (actions->type) {
4574                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4575                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4576                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4577                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4578                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4579                         rte_memcpy(actions_tx, actions,
4580                                sizeof(struct rte_flow_action));
4581                         actions_tx++;
4582                         break;
4583                 case RTE_FLOW_ACTION_TYPE_COUNT:
4584                         if (encap) {
4585                                 rte_memcpy(actions_tx, actions,
4586                                            sizeof(struct rte_flow_action));
4587                                 actions_tx++;
4588                         } else {
4589                                 rte_memcpy(actions_rx, actions,
4590                                            sizeof(struct rte_flow_action));
4591                                 actions_rx++;
4592                         }
4593                         break;
4594                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4595                         raw_encap = actions->conf;
4596                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4597                                 memcpy(actions_tx, actions,
4598                                        sizeof(struct rte_flow_action));
4599                                 actions_tx++;
4600                                 encap = 1;
4601                         } else {
4602                                 rte_memcpy(actions_rx, actions,
4603                                            sizeof(struct rte_flow_action));
4604                                 actions_rx++;
4605                         }
4606                         break;
4607                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4608                         raw_decap = actions->conf;
4609                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4610                                 memcpy(actions_tx, actions,
4611                                        sizeof(struct rte_flow_action));
4612                                 actions_tx++;
4613                         } else {
4614                                 rte_memcpy(actions_rx, actions,
4615                                            sizeof(struct rte_flow_action));
4616                                 actions_rx++;
4617                         }
4618                         break;
4619                 default:
4620                         rte_memcpy(actions_rx, actions,
4621                                    sizeof(struct rte_flow_action));
4622                         actions_rx++;
4623                         break;
4624                 }
4625         }
4626         /* Add set meta action and end action for the Rx flow. */
4627         tag_action = actions_rx;
4628         tag_action->type = (enum rte_flow_action_type)
4629                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4630         actions_rx++;
4631         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4632         actions_rx++;
4633         set_tag = (void *)actions_rx;
4634         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4635                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4636                 .data = flow_id,
4637         };
4638         MLX5_ASSERT(set_tag->id > REG_NON);
4639         tag_action->conf = set_tag;
4640         /* Create Tx item list. */
4641         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4642         addr = (void *)&pattern_tx[2];
4643         item = pattern_tx;
4644         item->type = (enum rte_flow_item_type)
4645                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4646         tag_item = (void *)addr;
4647         tag_item->data = flow_id;
4648         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4649         MLX5_ASSERT(set_tag->id > REG_NON);
4650         item->spec = tag_item;
4651         addr += sizeof(struct mlx5_rte_flow_item_tag);
4652         tag_item = (void *)addr;
4653         tag_item->data = UINT32_MAX;
4654         tag_item->id = UINT16_MAX;
4655         item->mask = tag_item;
4656         item->last = NULL;
4657         item++;
4658         item->type = RTE_FLOW_ITEM_TYPE_END;
4659         return 0;
4660 }
4661
4662 /**
4663  * The last stage of splitting chain, just creates the subflow
4664  * without any modification.
4665  *
4666  * @param[in] dev
4667  *   Pointer to Ethernet device.
4668  * @param[in] flow
4669  *   Parent flow structure pointer.
4670  * @param[in, out] sub_flow
4671  *   Pointer to return the created subflow, may be NULL.
4672  * @param[in] attr
4673  *   Flow rule attributes.
4674  * @param[in] items
4675  *   Pattern specification (list terminated by the END pattern item).
4676  * @param[in] actions
4677  *   Associated actions (list terminated by the END action).
4678  * @param[in] flow_split_info
4679  *   Pointer to flow split info structure.
4680  * @param[out] error
4681  *   Perform verbose error reporting if not NULL.
4682  * @return
4683  *   0 on success, negative value otherwise
4684  */
4685 static int
4686 flow_create_split_inner(struct rte_eth_dev *dev,
4687                         struct rte_flow *flow,
4688                         struct mlx5_flow **sub_flow,
4689                         const struct rte_flow_attr *attr,
4690                         const struct rte_flow_item items[],
4691                         const struct rte_flow_action actions[],
4692                         struct mlx5_flow_split_info *flow_split_info,
4693                         struct rte_flow_error *error)
4694 {
4695         struct mlx5_flow *dev_flow;
4696
4697         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4698                                     flow_split_info->flow_idx, error);
4699         if (!dev_flow)
4700                 return -rte_errno;
4701         dev_flow->flow = flow;
4702         dev_flow->external = flow_split_info->external;
4703         dev_flow->skip_scale = flow_split_info->skip_scale;
4704         /* Subflow object was created, we must include one in the list. */
4705         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4706                       dev_flow->handle, next);
4707         /*
4708          * If dev_flow is as one of the suffix flow, some actions in suffix
4709          * flow may need some user defined item layer flags, and pass the
4710          * Metadate rxq mark flag to suffix flow as well.
4711          */
4712         if (flow_split_info->prefix_layers)
4713                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4714         if (flow_split_info->prefix_mark)
4715                 dev_flow->handle->mark = 1;
4716         if (sub_flow)
4717                 *sub_flow = dev_flow;
4718 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4719         dev_flow->dv.table_id = flow_split_info->table_id;
4720 #endif
4721         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4722 }
4723
4724 /**
4725  * Get the sub policy of a meter.
4726  *
4727  * @param[in] dev
4728  *   Pointer to Ethernet device.
4729  * @param[in] flow
4730  *   Parent flow structure pointer.
4731  * @param wks
4732  *   Pointer to thread flow work space.
4733  * @param[in] attr
4734  *   Flow rule attributes.
4735  * @param[in] items
4736  *   Pattern specification (list terminated by the END pattern item).
4737  * @param[out] error
4738  *   Perform verbose error reporting if not NULL.
4739  *
4740  * @return
4741  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4742  */
4743 static struct mlx5_flow_meter_sub_policy *
4744 get_meter_sub_policy(struct rte_eth_dev *dev,
4745                      struct rte_flow *flow,
4746                      struct mlx5_flow_workspace *wks,
4747                      const struct rte_flow_attr *attr,
4748                      const struct rte_flow_item items[],
4749                      struct rte_flow_error *error)
4750 {
4751         struct mlx5_flow_meter_policy *policy;
4752         struct mlx5_flow_meter_policy *final_policy;
4753         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4754
4755         policy = wks->policy;
4756         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4757         if (final_policy->is_rss || final_policy->is_queue) {
4758                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4759                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4760                 uint32_t i;
4761
4762                 /*
4763                  * This is a tmp dev_flow,
4764                  * no need to register any matcher for it in translate.
4765                  */
4766                 wks->skip_matcher_reg = 1;
4767                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4768                         struct mlx5_flow dev_flow = {0};
4769                         struct mlx5_flow_handle dev_handle = { {0} };
4770                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4771
4772                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4773                                 const struct rte_flow_action_rss *rss_act =
4774                                         final_policy->act_cnt[i].rss->conf;
4775                                 struct rte_flow_action rss_actions[2] = {
4776                                         [0] = {
4777                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4778                                         .conf = rss_act,
4779                                         },
4780                                         [1] = {
4781                                         .type = RTE_FLOW_ACTION_TYPE_END,
4782                                         .conf = NULL,
4783                                         }
4784                                 };
4785
4786                                 dev_flow.handle = &dev_handle;
4787                                 dev_flow.ingress = attr->ingress;
4788                                 dev_flow.flow = flow;
4789                                 dev_flow.external = 0;
4790 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4791                                 dev_flow.dv.transfer = attr->transfer;
4792 #endif
4793                                 /**
4794                                  * Translate RSS action to get rss hash fields.
4795                                  */
4796                                 if (flow_drv_translate(dev, &dev_flow, attr,
4797                                                 items, rss_actions, error))
4798                                         goto exit;
4799                                 rss_desc_v[i] = wks->rss_desc;
4800                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4801                                 rss_desc_v[i].hash_fields =
4802                                                 dev_flow.hash_fields;
4803                                 rss_desc_v[i].queue_num =
4804                                                 rss_desc_v[i].hash_fields ?
4805                                                 rss_desc_v[i].queue_num : 1;
4806                                 rss_desc_v[i].tunnel =
4807                                                 !!(dev_flow.handle->layers &
4808                                                    MLX5_FLOW_LAYER_TUNNEL);
4809                                 /* Use the RSS queues in the containers. */
4810                                 rss_desc_v[i].queue =
4811                                         (uint16_t *)(uintptr_t)rss_act->queue;
4812                                 rss_desc[i] = &rss_desc_v[i];
4813                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4814                                 /* This is queue action. */
4815                                 rss_desc_v[i] = wks->rss_desc;
4816                                 rss_desc_v[i].key_len = 0;
4817                                 rss_desc_v[i].hash_fields = 0;
4818                                 rss_desc_v[i].queue =
4819                                         &final_policy->act_cnt[i].queue;
4820                                 rss_desc_v[i].queue_num = 1;
4821                                 rss_desc[i] = &rss_desc_v[i];
4822                         } else {
4823                                 rss_desc[i] = NULL;
4824                         }
4825                 }
4826                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4827                                                 flow, policy, rss_desc);
4828         } else {
4829                 enum mlx5_meter_domain mtr_domain =
4830                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4831                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4832                                                 MLX5_MTR_DOMAIN_INGRESS);
4833                 sub_policy = policy->sub_policys[mtr_domain][0];
4834         }
4835         if (!sub_policy)
4836                 rte_flow_error_set(error, EINVAL,
4837                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4838                                    "Failed to get meter sub-policy.");
4839 exit:
4840         return sub_policy;
4841 }
4842
4843 /**
4844  * Split the meter flow.
4845  *
4846  * As meter flow will split to three sub flow, other than meter
4847  * action, the other actions make sense to only meter accepts
4848  * the packet. If it need to be dropped, no other additional
4849  * actions should be take.
4850  *
4851  * One kind of special action which decapsulates the L3 tunnel
4852  * header will be in the prefix sub flow, as not to take the
4853  * L3 tunnel header into account.
4854  *
4855  * @param[in] dev
4856  *   Pointer to Ethernet device.
4857  * @param[in] flow
4858  *   Parent flow structure pointer.
4859  * @param wks
4860  *   Pointer to thread flow work space.
4861  * @param[in] attr
4862  *   Flow rule attributes.
4863  * @param[in] items
4864  *   Pattern specification (list terminated by the END pattern item).
4865  * @param[out] sfx_items
4866  *   Suffix flow match items (list terminated by the END pattern item).
4867  * @param[in] actions
4868  *   Associated actions (list terminated by the END action).
4869  * @param[out] actions_sfx
4870  *   Suffix flow actions.
4871  * @param[out] actions_pre
4872  *   Prefix flow actions.
4873  * @param[out] mtr_flow_id
4874  *   Pointer to meter flow id.
4875  * @param[out] error
4876  *   Perform verbose error reporting if not NULL.
4877  *
4878  * @return
4879  *   0 on success, a negative errno value otherwise and rte_errno is set.
4880  */
4881 static int
4882 flow_meter_split_prep(struct rte_eth_dev *dev,
4883                       struct rte_flow *flow,
4884                       struct mlx5_flow_workspace *wks,
4885                       const struct rte_flow_attr *attr,
4886                       const struct rte_flow_item items[],
4887                       struct rte_flow_item sfx_items[],
4888                       const struct rte_flow_action actions[],
4889                       struct rte_flow_action actions_sfx[],
4890                       struct rte_flow_action actions_pre[],
4891                       uint32_t *mtr_flow_id,
4892                       struct rte_flow_error *error)
4893 {
4894         struct mlx5_priv *priv = dev->data->dev_private;
4895         struct mlx5_flow_meter_info *fm = wks->fm;
4896         struct rte_flow_action *tag_action = NULL;
4897         struct rte_flow_item *tag_item;
4898         struct mlx5_rte_flow_action_set_tag *set_tag;
4899         const struct rte_flow_action_raw_encap *raw_encap;
4900         const struct rte_flow_action_raw_decap *raw_decap;
4901         struct mlx5_rte_flow_item_tag *tag_item_spec;
4902         struct mlx5_rte_flow_item_tag *tag_item_mask;
4903         uint32_t tag_id = 0;
4904         struct rte_flow_item *vlan_item_dst = NULL;
4905         const struct rte_flow_item *vlan_item_src = NULL;
4906         struct rte_flow_action *hw_mtr_action;
4907         struct rte_flow_action *action_pre_head = NULL;
4908         int32_t flow_src_port = priv->representor_id;
4909         bool mtr_first;
4910         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4911         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4912                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4913         uint32_t flow_id = 0;
4914         uint32_t flow_id_reversed = 0;
4915         uint8_t flow_id_bits = 0;
4916         int shift;
4917
4918         /* Prepare the suffix subflow items. */
4919         tag_item = sfx_items++;
4920         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4921                 struct mlx5_priv *port_priv;
4922                 const struct rte_flow_item_port_id *pid_v;
4923                 int item_type = items->type;
4924
4925                 switch (item_type) {
4926                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4927                         pid_v = items->spec;
4928                         MLX5_ASSERT(pid_v);
4929                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4930                         if (!port_priv)
4931                                 return rte_flow_error_set(error,
4932                                                 rte_errno,
4933                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4934                                                 pid_v,
4935                                                 "Failed to get port info.");
4936                         flow_src_port = port_priv->representor_id;
4937                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4938                             flow_src_port != priv->representor_id) {
4939                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4940                                                                 flow, fm,
4941                                                                 flow_src_port,
4942                                                                 items,
4943                                                                 error))
4944                                         return -rte_errno;
4945                         }
4946                         memcpy(sfx_items, items, sizeof(*sfx_items));
4947                         sfx_items++;
4948                         break;
4949                 case RTE_FLOW_ITEM_TYPE_VLAN:
4950                         /* Determine if copy vlan item below. */
4951                         vlan_item_src = items;
4952                         vlan_item_dst = sfx_items++;
4953                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4954                         break;
4955                 default:
4956                         break;
4957                 }
4958         }
4959         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4960         sfx_items++;
4961         mtr_first = priv->sh->meter_aso_en &&
4962                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4963         /* For ASO meter, meter must be before tag in TX direction. */
4964         if (mtr_first) {
4965                 action_pre_head = actions_pre++;
4966                 /* Leave space for tag action. */
4967                 tag_action = actions_pre++;
4968         }
4969         /* Prepare the actions for prefix and suffix flow. */
4970         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4971                 struct rte_flow_action *action_cur = NULL;
4972
4973                 switch (actions->type) {
4974                 case RTE_FLOW_ACTION_TYPE_METER:
4975                         if (mtr_first) {
4976                                 action_cur = action_pre_head;
4977                         } else {
4978                                 /* Leave space for tag action. */
4979                                 tag_action = actions_pre++;
4980                                 action_cur = actions_pre++;
4981                         }
4982                         break;
4983                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4984                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4985                         action_cur = actions_pre++;
4986                         break;
4987                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4988                         raw_encap = actions->conf;
4989                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4990                                 action_cur = actions_pre++;
4991                         break;
4992                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4993                         raw_decap = actions->conf;
4994                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4995                                 action_cur = actions_pre++;
4996                         break;
4997                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4998                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4999                         if (vlan_item_dst && vlan_item_src) {
5000                                 memcpy(vlan_item_dst, vlan_item_src,
5001                                         sizeof(*vlan_item_dst));
5002                                 /*
5003                                  * Convert to internal match item, it is used
5004                                  * for vlan push and set vid.
5005                                  */
5006                                 vlan_item_dst->type = (enum rte_flow_item_type)
5007                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5008                         }
5009                         break;
5010                 default:
5011                         break;
5012                 }
5013                 if (!action_cur)
5014                         action_cur = (fm->def_policy) ?
5015                                         actions_sfx++ : actions_pre++;
5016                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5017         }
5018         /* Add end action to the actions. */
5019         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5020         if (priv->sh->meter_aso_en) {
5021                 /**
5022                  * For ASO meter, need to add an extra jump action explicitly,
5023                  * to jump from meter to policer table.
5024                  */
5025                 struct mlx5_flow_meter_sub_policy *sub_policy;
5026                 struct mlx5_flow_tbl_data_entry *tbl_data;
5027
5028                 if (!fm->def_policy) {
5029                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5030                                                           attr, items, error);
5031                         if (!sub_policy)
5032                                 return -rte_errno;
5033                 } else {
5034                         enum mlx5_meter_domain mtr_domain =
5035                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5036                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5037                                                 MLX5_MTR_DOMAIN_INGRESS);
5038
5039                         sub_policy =
5040                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5041                 }
5042                 tbl_data = container_of(sub_policy->tbl_rsc,
5043                                         struct mlx5_flow_tbl_data_entry, tbl);
5044                 hw_mtr_action = actions_pre++;
5045                 hw_mtr_action->type = (enum rte_flow_action_type)
5046                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5047                 hw_mtr_action->conf = tbl_data->jump.action;
5048         }
5049         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5050         actions_pre++;
5051         if (!tag_action)
5052                 return rte_flow_error_set(error, ENOMEM,
5053                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5054                                           NULL, "No tag action space.");
5055         if (!mtr_flow_id) {
5056                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5057                 goto exit;
5058         }
5059         /* Only default-policy Meter creates mtr flow id. */
5060         if (fm->def_policy) {
5061                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5062                 if (!tag_id)
5063                         return rte_flow_error_set(error, ENOMEM,
5064                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5065                                         "Failed to allocate meter flow id.");
5066                 flow_id = tag_id - 1;
5067                 flow_id_bits = (!flow_id) ? 1 :
5068                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5069                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5070                     mtr_reg_bits) {
5071                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5072                         return rte_flow_error_set(error, EINVAL,
5073                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5074                                         "Meter flow id exceeds max limit.");
5075                 }
5076                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5077                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5078         }
5079         /* Build tag actions and items for meter_id/meter flow_id. */
5080         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5081         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5082         tag_item_mask = tag_item_spec + 1;
5083         /* Both flow_id and meter_id share the same register. */
5084         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5085                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5086                                                             0, error),
5087                 .offset = mtr_id_offset,
5088                 .length = mtr_reg_bits,
5089                 .data = flow->meter,
5090         };
5091         /*
5092          * The color Reg bits used by flow_id are growing from
5093          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5094          */
5095         for (shift = 0; shift < flow_id_bits; shift++)
5096                 flow_id_reversed = (flow_id_reversed << 1) |
5097                                 ((flow_id >> shift) & 0x1);
5098         set_tag->data |=
5099                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5100         tag_item_spec->id = set_tag->id;
5101         tag_item_spec->data = set_tag->data << mtr_id_offset;
5102         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5103         tag_action->type = (enum rte_flow_action_type)
5104                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5105         tag_action->conf = set_tag;
5106         tag_item->type = (enum rte_flow_item_type)
5107                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5108         tag_item->spec = tag_item_spec;
5109         tag_item->last = NULL;
5110         tag_item->mask = tag_item_mask;
5111 exit:
5112         if (mtr_flow_id)
5113                 *mtr_flow_id = tag_id;
5114         return 0;
5115 }
5116
5117 /**
5118  * Split action list having QUEUE/RSS for metadata register copy.
5119  *
5120  * Once Q/RSS action is detected in user's action list, the flow action
5121  * should be split in order to copy metadata registers, which will happen in
5122  * RX_CP_TBL like,
5123  *   - CQE->flow_tag := reg_c[1] (MARK)
5124  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5125  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5126  * This is because the last action of each flow must be a terminal action
5127  * (QUEUE, RSS or DROP).
5128  *
5129  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5130  * stored and kept in the mlx5_flow structure per each sub_flow.
5131  *
5132  * The Q/RSS action is replaced with,
5133  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5134  * And the following JUMP action is added at the end,
5135  *   - JUMP, to RX_CP_TBL.
5136  *
5137  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5138  * flow_create_split_metadata() routine. The flow will look like,
5139  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5140  *
5141  * @param dev
5142  *   Pointer to Ethernet device.
5143  * @param[out] split_actions
5144  *   Pointer to store split actions to jump to CP_TBL.
5145  * @param[in] actions
5146  *   Pointer to the list of original flow actions.
5147  * @param[in] qrss
5148  *   Pointer to the Q/RSS action.
5149  * @param[in] actions_n
5150  *   Number of original actions.
5151  * @param[out] error
5152  *   Perform verbose error reporting if not NULL.
5153  *
5154  * @return
5155  *   non-zero unique flow_id on success, otherwise 0 and
5156  *   error/rte_error are set.
5157  */
5158 static uint32_t
5159 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5160                           struct rte_flow_action *split_actions,
5161                           const struct rte_flow_action *actions,
5162                           const struct rte_flow_action *qrss,
5163                           int actions_n, struct rte_flow_error *error)
5164 {
5165         struct mlx5_priv *priv = dev->data->dev_private;
5166         struct mlx5_rte_flow_action_set_tag *set_tag;
5167         struct rte_flow_action_jump *jump;
5168         const int qrss_idx = qrss - actions;
5169         uint32_t flow_id = 0;
5170         int ret = 0;
5171
5172         /*
5173          * Given actions will be split
5174          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5175          * - Add jump to mreg CP_TBL.
5176          * As a result, there will be one more action.
5177          */
5178         ++actions_n;
5179         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5180         set_tag = (void *)(split_actions + actions_n);
5181         /*
5182          * If tag action is not set to void(it means we are not the meter
5183          * suffix flow), add the tag action. Since meter suffix flow already
5184          * has the tag added.
5185          */
5186         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5187                 /*
5188                  * Allocate the new subflow ID. This one is unique within
5189                  * device and not shared with representors. Otherwise,
5190                  * we would have to resolve multi-thread access synch
5191                  * issue. Each flow on the shared device is appended
5192                  * with source vport identifier, so the resulting
5193                  * flows will be unique in the shared (by master and
5194                  * representors) domain even if they have coinciding
5195                  * IDs.
5196                  */
5197                 mlx5_ipool_malloc(priv->sh->ipool
5198                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5199                 if (!flow_id)
5200                         return rte_flow_error_set(error, ENOMEM,
5201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5202                                                   NULL, "can't allocate id "
5203                                                   "for split Q/RSS subflow");
5204                 /* Internal SET_TAG action to set flow ID. */
5205                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5206                         .data = flow_id,
5207                 };
5208                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5209                 if (ret < 0)
5210                         return ret;
5211                 set_tag->id = ret;
5212                 /* Construct new actions array. */
5213                 /* Replace QUEUE/RSS action. */
5214                 split_actions[qrss_idx] = (struct rte_flow_action){
5215                         .type = (enum rte_flow_action_type)
5216                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5217                         .conf = set_tag,
5218                 };
5219         }
5220         /* JUMP action to jump to mreg copy table (CP_TBL). */
5221         jump = (void *)(set_tag + 1);
5222         *jump = (struct rte_flow_action_jump){
5223                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5224         };
5225         split_actions[actions_n - 2] = (struct rte_flow_action){
5226                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5227                 .conf = jump,
5228         };
5229         split_actions[actions_n - 1] = (struct rte_flow_action){
5230                 .type = RTE_FLOW_ACTION_TYPE_END,
5231         };
5232         return flow_id;
5233 }
5234
5235 /**
5236  * Extend the given action list for Tx metadata copy.
5237  *
5238  * Copy the given action list to the ext_actions and add flow metadata register
5239  * copy action in order to copy reg_a set by WQE to reg_c[0].
5240  *
5241  * @param[out] ext_actions
5242  *   Pointer to the extended action list.
5243  * @param[in] actions
5244  *   Pointer to the list of actions.
5245  * @param[in] actions_n
5246  *   Number of actions in the list.
5247  * @param[out] error
5248  *   Perform verbose error reporting if not NULL.
5249  * @param[in] encap_idx
5250  *   The encap action inndex.
5251  *
5252  * @return
5253  *   0 on success, negative value otherwise
5254  */
5255 static int
5256 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5257                        struct rte_flow_action *ext_actions,
5258                        const struct rte_flow_action *actions,
5259                        int actions_n, struct rte_flow_error *error,
5260                        int encap_idx)
5261 {
5262         struct mlx5_flow_action_copy_mreg *cp_mreg =
5263                 (struct mlx5_flow_action_copy_mreg *)
5264                         (ext_actions + actions_n + 1);
5265         int ret;
5266
5267         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5268         if (ret < 0)
5269                 return ret;
5270         cp_mreg->dst = ret;
5271         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5272         if (ret < 0)
5273                 return ret;
5274         cp_mreg->src = ret;
5275         if (encap_idx != 0)
5276                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5277         if (encap_idx == actions_n - 1) {
5278                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5279                         .type = (enum rte_flow_action_type)
5280                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5281                         .conf = cp_mreg,
5282                 };
5283                 ext_actions[actions_n] = (struct rte_flow_action){
5284                         .type = RTE_FLOW_ACTION_TYPE_END,
5285                 };
5286         } else {
5287                 ext_actions[encap_idx] = (struct rte_flow_action){
5288                         .type = (enum rte_flow_action_type)
5289                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5290                         .conf = cp_mreg,
5291                 };
5292                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5293                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5294         }
5295         return 0;
5296 }
5297
5298 /**
5299  * Check the match action from the action list.
5300  *
5301  * @param[in] actions
5302  *   Pointer to the list of actions.
5303  * @param[in] attr
5304  *   Flow rule attributes.
5305  * @param[in] action
5306  *   The action to be check if exist.
5307  * @param[out] match_action_pos
5308  *   Pointer to the position of the matched action if exists, otherwise is -1.
5309  * @param[out] qrss_action_pos
5310  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5311  * @param[out] modify_after_mirror
5312  *   Pointer to the flag of modify action after FDB mirroring.
5313  *
5314  * @return
5315  *   > 0 the total number of actions.
5316  *   0 if not found match action in action list.
5317  */
5318 static int
5319 flow_check_match_action(const struct rte_flow_action actions[],
5320                         const struct rte_flow_attr *attr,
5321                         enum rte_flow_action_type action,
5322                         int *match_action_pos, int *qrss_action_pos,
5323                         int *modify_after_mirror)
5324 {
5325         const struct rte_flow_action_sample *sample;
5326         const struct rte_flow_action_raw_decap *decap;
5327         int actions_n = 0;
5328         uint32_t ratio = 0;
5329         int sub_type = 0;
5330         int flag = 0;
5331         int fdb_mirror = 0;
5332
5333         *match_action_pos = -1;
5334         *qrss_action_pos = -1;
5335         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5336                 if (actions->type == action) {
5337                         flag = 1;
5338                         *match_action_pos = actions_n;
5339                 }
5340                 switch (actions->type) {
5341                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5342                 case RTE_FLOW_ACTION_TYPE_RSS:
5343                         *qrss_action_pos = actions_n;
5344                         break;
5345                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5346                         sample = actions->conf;
5347                         ratio = sample->ratio;
5348                         sub_type = ((const struct rte_flow_action *)
5349                                         (sample->actions))->type;
5350                         if (ratio == 1 && attr->transfer)
5351                                 fdb_mirror = 1;
5352                         break;
5353                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5354                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5355                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5356                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5357                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5358                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5359                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5360                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5361                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5362                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5363                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5364                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5365                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5366                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5367                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5368                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5369                 case RTE_FLOW_ACTION_TYPE_FLAG:
5370                 case RTE_FLOW_ACTION_TYPE_MARK:
5371                 case RTE_FLOW_ACTION_TYPE_SET_META:
5372                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5373                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5374                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5375                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5376                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5377                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5378                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5379                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5380                 case RTE_FLOW_ACTION_TYPE_METER:
5381                         if (fdb_mirror)
5382                                 *modify_after_mirror = 1;
5383                         break;
5384                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5385                         decap = actions->conf;
5386                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5387                                 ;
5388                         actions_n++;
5389                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5390                                 const struct rte_flow_action_raw_encap *encap =
5391                                                                 actions->conf;
5392                                 if (decap->size <=
5393                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5394                                     encap->size >
5395                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5396                                         /* L3 encap. */
5397                                         break;
5398                         }
5399                         if (fdb_mirror)
5400                                 *modify_after_mirror = 1;
5401                         break;
5402                 default:
5403                         break;
5404                 }
5405                 actions_n++;
5406         }
5407         if (flag && fdb_mirror && !*modify_after_mirror) {
5408                 /* FDB mirroring uses the destination array to implement
5409                  * instead of FLOW_SAMPLER object.
5410                  */
5411                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5412                         flag = 0;
5413         }
5414         /* Count RTE_FLOW_ACTION_TYPE_END. */
5415         return flag ? actions_n + 1 : 0;
5416 }
5417
5418 #define SAMPLE_SUFFIX_ITEM 2
5419
5420 /**
5421  * Split the sample flow.
5422  *
5423  * As sample flow will split to two sub flow, sample flow with
5424  * sample action, the other actions will move to new suffix flow.
5425  *
5426  * Also add unique tag id with tag action in the sample flow,
5427  * the same tag id will be as match in the suffix flow.
5428  *
5429  * @param dev
5430  *   Pointer to Ethernet device.
5431  * @param[in] add_tag
5432  *   Add extra tag action flag.
5433  * @param[out] sfx_items
5434  *   Suffix flow match items (list terminated by the END pattern item).
5435  * @param[in] actions
5436  *   Associated actions (list terminated by the END action).
5437  * @param[out] actions_sfx
5438  *   Suffix flow actions.
5439  * @param[out] actions_pre
5440  *   Prefix flow actions.
5441  * @param[in] actions_n
5442  *  The total number of actions.
5443  * @param[in] sample_action_pos
5444  *   The sample action position.
5445  * @param[in] qrss_action_pos
5446  *   The Queue/RSS action position.
5447  * @param[in] jump_table
5448  *   Add extra jump action flag.
5449  * @param[out] error
5450  *   Perform verbose error reporting if not NULL.
5451  *
5452  * @return
5453  *   0 on success, or unique flow_id, a negative errno value
5454  *   otherwise and rte_errno is set.
5455  */
5456 static int
5457 flow_sample_split_prep(struct rte_eth_dev *dev,
5458                        int add_tag,
5459                        struct rte_flow_item sfx_items[],
5460                        const struct rte_flow_action actions[],
5461                        struct rte_flow_action actions_sfx[],
5462                        struct rte_flow_action actions_pre[],
5463                        int actions_n,
5464                        int sample_action_pos,
5465                        int qrss_action_pos,
5466                        int jump_table,
5467                        struct rte_flow_error *error)
5468 {
5469         struct mlx5_priv *priv = dev->data->dev_private;
5470         struct mlx5_rte_flow_action_set_tag *set_tag;
5471         struct mlx5_rte_flow_item_tag *tag_spec;
5472         struct mlx5_rte_flow_item_tag *tag_mask;
5473         struct rte_flow_action_jump *jump_action;
5474         uint32_t tag_id = 0;
5475         int index;
5476         int append_index = 0;
5477         int ret;
5478
5479         if (sample_action_pos < 0)
5480                 return rte_flow_error_set(error, EINVAL,
5481                                           RTE_FLOW_ERROR_TYPE_ACTION,
5482                                           NULL, "invalid position of sample "
5483                                           "action in list");
5484         /* Prepare the actions for prefix and suffix flow. */
5485         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5486                 index = qrss_action_pos;
5487                 /* Put the preceding the Queue/RSS action into prefix flow. */
5488                 if (index != 0)
5489                         memcpy(actions_pre, actions,
5490                                sizeof(struct rte_flow_action) * index);
5491                 /* Put others preceding the sample action into prefix flow. */
5492                 if (sample_action_pos > index + 1)
5493                         memcpy(actions_pre + index, actions + index + 1,
5494                                sizeof(struct rte_flow_action) *
5495                                (sample_action_pos - index - 1));
5496                 index = sample_action_pos - 1;
5497                 /* Put Queue/RSS action into Suffix flow. */
5498                 memcpy(actions_sfx, actions + qrss_action_pos,
5499                        sizeof(struct rte_flow_action));
5500                 actions_sfx++;
5501         } else {
5502                 index = sample_action_pos;
5503                 if (index != 0)
5504                         memcpy(actions_pre, actions,
5505                                sizeof(struct rte_flow_action) * index);
5506         }
5507         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5508          * For CX6DX and above, metadata registers Cx preserve their value,
5509          * add an extra tag action for NIC-RX and E-Switch Domain.
5510          */
5511         if (add_tag) {
5512                 /* Prepare the prefix tag action. */
5513                 append_index++;
5514                 set_tag = (void *)(actions_pre + actions_n + append_index);
5515                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5516                 if (ret < 0)
5517                         return ret;
5518                 mlx5_ipool_malloc(priv->sh->ipool
5519                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5520                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5521                         .id = ret,
5522                         .data = tag_id,
5523                 };
5524                 /* Prepare the suffix subflow items. */
5525                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5526                 tag_spec->data = tag_id;
5527                 tag_spec->id = set_tag->id;
5528                 tag_mask = tag_spec + 1;
5529                 tag_mask->data = UINT32_MAX;
5530                 sfx_items[0] = (struct rte_flow_item){
5531                         .type = (enum rte_flow_item_type)
5532                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5533                         .spec = tag_spec,
5534                         .last = NULL,
5535                         .mask = tag_mask,
5536                 };
5537                 sfx_items[1] = (struct rte_flow_item){
5538                         .type = (enum rte_flow_item_type)
5539                                 RTE_FLOW_ITEM_TYPE_END,
5540                 };
5541                 /* Prepare the tag action in prefix subflow. */
5542                 actions_pre[index++] =
5543                         (struct rte_flow_action){
5544                         .type = (enum rte_flow_action_type)
5545                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5546                         .conf = set_tag,
5547                 };
5548         }
5549         memcpy(actions_pre + index, actions + sample_action_pos,
5550                sizeof(struct rte_flow_action));
5551         index += 1;
5552         /* For the modify action after the sample action in E-Switch mirroring,
5553          * Add the extra jump action in prefix subflow and jump into the next
5554          * table, then do the modify action in the new table.
5555          */
5556         if (jump_table) {
5557                 /* Prepare the prefix jump action. */
5558                 append_index++;
5559                 jump_action = (void *)(actions_pre + actions_n + append_index);
5560                 jump_action->group = jump_table;
5561                 actions_pre[index++] =
5562                         (struct rte_flow_action){
5563                         .type = (enum rte_flow_action_type)
5564                                 RTE_FLOW_ACTION_TYPE_JUMP,
5565                         .conf = jump_action,
5566                 };
5567         }
5568         actions_pre[index] = (struct rte_flow_action){
5569                 .type = (enum rte_flow_action_type)
5570                         RTE_FLOW_ACTION_TYPE_END,
5571         };
5572         /* Put the actions after sample into Suffix flow. */
5573         memcpy(actions_sfx, actions + sample_action_pos + 1,
5574                sizeof(struct rte_flow_action) *
5575                (actions_n - sample_action_pos - 1));
5576         return tag_id;
5577 }
5578
5579 /**
5580  * The splitting for metadata feature.
5581  *
5582  * - Q/RSS action on NIC Rx should be split in order to pass by
5583  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5584  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5585  *
5586  * - All the actions on NIC Tx should have a mreg copy action to
5587  *   copy reg_a from WQE to reg_c[0].
5588  *
5589  * @param dev
5590  *   Pointer to Ethernet device.
5591  * @param[in] flow
5592  *   Parent flow structure pointer.
5593  * @param[in] attr
5594  *   Flow rule attributes.
5595  * @param[in] items
5596  *   Pattern specification (list terminated by the END pattern item).
5597  * @param[in] actions
5598  *   Associated actions (list terminated by the END action).
5599  * @param[in] flow_split_info
5600  *   Pointer to flow split info structure.
5601  * @param[out] error
5602  *   Perform verbose error reporting if not NULL.
5603  * @return
5604  *   0 on success, negative value otherwise
5605  */
5606 static int
5607 flow_create_split_metadata(struct rte_eth_dev *dev,
5608                            struct rte_flow *flow,
5609                            const struct rte_flow_attr *attr,
5610                            const struct rte_flow_item items[],
5611                            const struct rte_flow_action actions[],
5612                            struct mlx5_flow_split_info *flow_split_info,
5613                            struct rte_flow_error *error)
5614 {
5615         struct mlx5_priv *priv = dev->data->dev_private;
5616         struct mlx5_dev_config *config = &priv->config;
5617         const struct rte_flow_action *qrss = NULL;
5618         struct rte_flow_action *ext_actions = NULL;
5619         struct mlx5_flow *dev_flow = NULL;
5620         uint32_t qrss_id = 0;
5621         int mtr_sfx = 0;
5622         size_t act_size;
5623         int actions_n;
5624         int encap_idx;
5625         int ret;
5626
5627         /* Check whether extensive metadata feature is engaged. */
5628         if (!config->dv_flow_en ||
5629             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5630             !mlx5_flow_ext_mreg_supported(dev))
5631                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5632                                                actions, flow_split_info, error);
5633         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5634                                                            &encap_idx);
5635         if (qrss) {
5636                 /* Exclude hairpin flows from splitting. */
5637                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5638                         const struct rte_flow_action_queue *queue;
5639
5640                         queue = qrss->conf;
5641                         if (mlx5_rxq_get_type(dev, queue->index) ==
5642                             MLX5_RXQ_TYPE_HAIRPIN)
5643                                 qrss = NULL;
5644                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5645                         const struct rte_flow_action_rss *rss;
5646
5647                         rss = qrss->conf;
5648                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5649                             MLX5_RXQ_TYPE_HAIRPIN)
5650                                 qrss = NULL;
5651                 }
5652         }
5653         if (qrss) {
5654                 /* Check if it is in meter suffix table. */
5655                 mtr_sfx = attr->group == (attr->transfer ?
5656                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5657                           MLX5_FLOW_TABLE_LEVEL_METER);
5658                 /*
5659                  * Q/RSS action on NIC Rx should be split in order to pass by
5660                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5661                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5662                  */
5663                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5664                            sizeof(struct rte_flow_action_set_tag) +
5665                            sizeof(struct rte_flow_action_jump);
5666                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5667                                           SOCKET_ID_ANY);
5668                 if (!ext_actions)
5669                         return rte_flow_error_set(error, ENOMEM,
5670                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5671                                                   NULL, "no memory to split "
5672                                                   "metadata flow");
5673                 /*
5674                  * If we are the suffix flow of meter, tag already exist.
5675                  * Set the tag action to void.
5676                  */
5677                 if (mtr_sfx)
5678                         ext_actions[qrss - actions].type =
5679                                                 RTE_FLOW_ACTION_TYPE_VOID;
5680                 else
5681                         ext_actions[qrss - actions].type =
5682                                                 (enum rte_flow_action_type)
5683                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5684                 /*
5685                  * Create the new actions list with removed Q/RSS action
5686                  * and appended set tag and jump to register copy table
5687                  * (RX_CP_TBL). We should preallocate unique tag ID here
5688                  * in advance, because it is needed for set tag action.
5689                  */
5690                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5691                                                     qrss, actions_n, error);
5692                 if (!mtr_sfx && !qrss_id) {
5693                         ret = -rte_errno;
5694                         goto exit;
5695                 }
5696         } else if (attr->egress && !attr->transfer) {
5697                 /*
5698                  * All the actions on NIC Tx should have a metadata register
5699                  * copy action to copy reg_a from WQE to reg_c[meta]
5700                  */
5701                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5702                            sizeof(struct mlx5_flow_action_copy_mreg);
5703                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5704                                           SOCKET_ID_ANY);
5705                 if (!ext_actions)
5706                         return rte_flow_error_set(error, ENOMEM,
5707                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5708                                                   NULL, "no memory to split "
5709                                                   "metadata flow");
5710                 /* Create the action list appended with copy register. */
5711                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5712                                              actions_n, error, encap_idx);
5713                 if (ret < 0)
5714                         goto exit;
5715         }
5716         /* Add the unmodified original or prefix subflow. */
5717         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5718                                       items, ext_actions ? ext_actions :
5719                                       actions, flow_split_info, error);
5720         if (ret < 0)
5721                 goto exit;
5722         MLX5_ASSERT(dev_flow);
5723         if (qrss) {
5724                 const struct rte_flow_attr q_attr = {
5725                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5726                         .ingress = 1,
5727                 };
5728                 /* Internal PMD action to set register. */
5729                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5730                         .data = qrss_id,
5731                         .id = REG_NON,
5732                 };
5733                 struct rte_flow_item q_items[] = {
5734                         {
5735                                 .type = (enum rte_flow_item_type)
5736                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5737                                 .spec = &q_tag_spec,
5738                                 .last = NULL,
5739                                 .mask = NULL,
5740                         },
5741                         {
5742                                 .type = RTE_FLOW_ITEM_TYPE_END,
5743                         },
5744                 };
5745                 struct rte_flow_action q_actions[] = {
5746                         {
5747                                 .type = qrss->type,
5748                                 .conf = qrss->conf,
5749                         },
5750                         {
5751                                 .type = RTE_FLOW_ACTION_TYPE_END,
5752                         },
5753                 };
5754                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5755
5756                 /*
5757                  * Configure the tag item only if there is no meter subflow.
5758                  * Since tag is already marked in the meter suffix subflow
5759                  * we can just use the meter suffix items as is.
5760                  */
5761                 if (qrss_id) {
5762                         /* Not meter subflow. */
5763                         MLX5_ASSERT(!mtr_sfx);
5764                         /*
5765                          * Put unique id in prefix flow due to it is destroyed
5766                          * after suffix flow and id will be freed after there
5767                          * is no actual flows with this id and identifier
5768                          * reallocation becomes possible (for example, for
5769                          * other flows in other threads).
5770                          */
5771                         dev_flow->handle->split_flow_id = qrss_id;
5772                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5773                                                    error);
5774                         if (ret < 0)
5775                                 goto exit;
5776                         q_tag_spec.id = ret;
5777                 }
5778                 dev_flow = NULL;
5779                 /* Add suffix subflow to execute Q/RSS. */
5780                 flow_split_info->prefix_layers = layers;
5781                 flow_split_info->prefix_mark = 0;
5782                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5783                                               &q_attr, mtr_sfx ? items :
5784                                               q_items, q_actions,
5785                                               flow_split_info, error);
5786                 if (ret < 0)
5787                         goto exit;
5788                 /* qrss ID should be freed if failed. */
5789                 qrss_id = 0;
5790                 MLX5_ASSERT(dev_flow);
5791         }
5792
5793 exit:
5794         /*
5795          * We do not destroy the partially created sub_flows in case of error.
5796          * These ones are included into parent flow list and will be destroyed
5797          * by flow_drv_destroy.
5798          */
5799         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5800                         qrss_id);
5801         mlx5_free(ext_actions);
5802         return ret;
5803 }
5804
5805 /**
5806  * Create meter internal drop flow with the original pattern.
5807  *
5808  * @param dev
5809  *   Pointer to Ethernet device.
5810  * @param[in] flow
5811  *   Parent flow structure pointer.
5812  * @param[in] attr
5813  *   Flow rule attributes.
5814  * @param[in] items
5815  *   Pattern specification (list terminated by the END pattern item).
5816  * @param[in] flow_split_info
5817  *   Pointer to flow split info structure.
5818  * @param[in] fm
5819  *   Pointer to flow meter structure.
5820  * @param[out] error
5821  *   Perform verbose error reporting if not NULL.
5822  * @return
5823  *   0 on success, negative value otherwise
5824  */
5825 static uint32_t
5826 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5827                         struct rte_flow *flow,
5828                         const struct rte_flow_attr *attr,
5829                         const struct rte_flow_item items[],
5830                         struct mlx5_flow_split_info *flow_split_info,
5831                         struct mlx5_flow_meter_info *fm,
5832                         struct rte_flow_error *error)
5833 {
5834         struct mlx5_flow *dev_flow = NULL;
5835         struct rte_flow_attr drop_attr = *attr;
5836         struct rte_flow_action drop_actions[3];
5837         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5838
5839         MLX5_ASSERT(fm->drop_cnt);
5840         drop_actions[0].type =
5841                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5842         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5843         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5844         drop_actions[1].conf = NULL;
5845         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5846         drop_actions[2].conf = NULL;
5847         drop_split_info.external = false;
5848         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5849         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5850         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5851         return flow_create_split_inner(dev, flow, &dev_flow,
5852                                 &drop_attr, items, drop_actions,
5853                                 &drop_split_info, error);
5854 }
5855
5856 /**
5857  * The splitting for meter feature.
5858  *
5859  * - The meter flow will be split to two flows as prefix and
5860  *   suffix flow. The packets make sense only it pass the prefix
5861  *   meter action.
5862  *
5863  * - Reg_C_5 is used for the packet to match betweend prefix and
5864  *   suffix flow.
5865  *
5866  * @param dev
5867  *   Pointer to Ethernet device.
5868  * @param[in] flow
5869  *   Parent flow structure pointer.
5870  * @param[in] attr
5871  *   Flow rule attributes.
5872  * @param[in] items
5873  *   Pattern specification (list terminated by the END pattern item).
5874  * @param[in] actions
5875  *   Associated actions (list terminated by the END action).
5876  * @param[in] flow_split_info
5877  *   Pointer to flow split info structure.
5878  * @param[out] error
5879  *   Perform verbose error reporting if not NULL.
5880  * @return
5881  *   0 on success, negative value otherwise
5882  */
5883 static int
5884 flow_create_split_meter(struct rte_eth_dev *dev,
5885                         struct rte_flow *flow,
5886                         const struct rte_flow_attr *attr,
5887                         const struct rte_flow_item items[],
5888                         const struct rte_flow_action actions[],
5889                         struct mlx5_flow_split_info *flow_split_info,
5890                         struct rte_flow_error *error)
5891 {
5892         struct mlx5_priv *priv = dev->data->dev_private;
5893         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5894         struct rte_flow_action *sfx_actions = NULL;
5895         struct rte_flow_action *pre_actions = NULL;
5896         struct rte_flow_item *sfx_items = NULL;
5897         struct mlx5_flow *dev_flow = NULL;
5898         struct rte_flow_attr sfx_attr = *attr;
5899         struct mlx5_flow_meter_info *fm = NULL;
5900         uint8_t skip_scale_restore;
5901         bool has_mtr = false;
5902         bool has_modify = false;
5903         bool set_mtr_reg = true;
5904         bool is_mtr_hierarchy = false;
5905         uint32_t meter_id = 0;
5906         uint32_t mtr_idx = 0;
5907         uint32_t mtr_flow_id = 0;
5908         size_t act_size;
5909         size_t item_size;
5910         int actions_n = 0;
5911         int ret = 0;
5912
5913         if (priv->mtr_en)
5914                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5915                                                     &has_modify, &meter_id);
5916         if (has_mtr) {
5917                 if (flow->meter) {
5918                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5919                         if (!fm)
5920                                 return rte_flow_error_set(error, EINVAL,
5921                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5922                                                 NULL, "Meter not found.");
5923                 } else {
5924                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5925                         if (!fm)
5926                                 return rte_flow_error_set(error, EINVAL,
5927                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5928                                                 NULL, "Meter not found.");
5929                         ret = mlx5_flow_meter_attach(priv, fm,
5930                                                      &sfx_attr, error);
5931                         if (ret)
5932                                 return -rte_errno;
5933                         flow->meter = mtr_idx;
5934                 }
5935                 MLX5_ASSERT(wks);
5936                 wks->fm = fm;
5937                 if (!fm->def_policy) {
5938                         wks->policy = mlx5_flow_meter_policy_find(dev,
5939                                                                   fm->policy_id,
5940                                                                   NULL);
5941                         MLX5_ASSERT(wks->policy);
5942                         if (wks->policy->is_hierarchy) {
5943                                 wks->final_policy =
5944                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5945                                                                 wks->policy);
5946                                 if (!wks->final_policy)
5947                                         return rte_flow_error_set(error,
5948                                         EINVAL,
5949                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5950                                 "Failed to find terminal policy of hierarchy.");
5951                                 is_mtr_hierarchy = true;
5952                         }
5953                 }
5954                 /*
5955                  * If it isn't default-policy Meter, and
5956                  * 1. There's no action in flow to change
5957                  *    packet (modify/encap/decap etc.), OR
5958                  * 2. No drop count needed for this meter.
5959                  * 3. It's not meter hierarchy.
5960                  * Then no need to use regC to save meter id anymore.
5961                  */
5962                 if (!fm->def_policy && !is_mtr_hierarchy &&
5963                     (!has_modify || !fm->drop_cnt))
5964                         set_mtr_reg = false;
5965                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5966                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5967                            sizeof(struct mlx5_rte_flow_action_set_tag);
5968                 /* Suffix items: tag, vlan, port id, end. */
5969 #define METER_SUFFIX_ITEM 4
5970                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5971                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5972                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5973                                           0, SOCKET_ID_ANY);
5974                 if (!sfx_actions)
5975                         return rte_flow_error_set(error, ENOMEM,
5976                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5977                                                   NULL, "no memory to split "
5978                                                   "meter flow");
5979                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5980                              act_size);
5981                 /* There's no suffix flow for meter of non-default policy. */
5982                 if (!fm->def_policy)
5983                         pre_actions = sfx_actions + 1;
5984                 else
5985                         pre_actions = sfx_actions + actions_n;
5986                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5987                                             items, sfx_items, actions,
5988                                             sfx_actions, pre_actions,
5989                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5990                                             error);
5991                 if (ret) {
5992                         ret = -rte_errno;
5993                         goto exit;
5994                 }
5995                 /* Add the prefix subflow. */
5996                 flow_split_info->prefix_mark = 0;
5997                 skip_scale_restore = flow_split_info->skip_scale;
5998                 flow_split_info->skip_scale |=
5999                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6000                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6001                                               attr, items, pre_actions,
6002                                               flow_split_info, error);
6003                 flow_split_info->skip_scale = skip_scale_restore;
6004                 if (ret) {
6005                         if (mtr_flow_id)
6006                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6007                         ret = -rte_errno;
6008                         goto exit;
6009                 }
6010                 if (mtr_flow_id) {
6011                         dev_flow->handle->split_flow_id = mtr_flow_id;
6012                         dev_flow->handle->is_meter_flow_id = 1;
6013                 }
6014                 if (!fm->def_policy) {
6015                         if (!set_mtr_reg && fm->drop_cnt)
6016                                 ret =
6017                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6018                                                         &sfx_attr, items,
6019                                                         flow_split_info,
6020                                                         fm, error);
6021                         goto exit;
6022                 }
6023                 /* Setting the sfx group atrr. */
6024                 sfx_attr.group = sfx_attr.transfer ?
6025                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6026                                  MLX5_FLOW_TABLE_LEVEL_METER;
6027                 flow_split_info->prefix_layers =
6028                                 flow_get_prefix_layer_flags(dev_flow);
6029                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6030                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6031         }
6032         /* Add the prefix subflow. */
6033         ret = flow_create_split_metadata(dev, flow,
6034                                          &sfx_attr, sfx_items ?
6035                                          sfx_items : items,
6036                                          sfx_actions ? sfx_actions : actions,
6037                                          flow_split_info, error);
6038 exit:
6039         if (sfx_actions)
6040                 mlx5_free(sfx_actions);
6041         return ret;
6042 }
6043
6044 /**
6045  * The splitting for sample feature.
6046  *
6047  * Once Sample action is detected in the action list, the flow actions should
6048  * be split into prefix sub flow and suffix sub flow.
6049  *
6050  * The original items remain in the prefix sub flow, all actions preceding the
6051  * sample action and the sample action itself will be copied to the prefix
6052  * sub flow, the actions following the sample action will be copied to the
6053  * suffix sub flow, Queue action always be located in the suffix sub flow.
6054  *
6055  * In order to make the packet from prefix sub flow matches with suffix sub
6056  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6057  * flow uses tag item with the unique flow id.
6058  *
6059  * @param dev
6060  *   Pointer to Ethernet device.
6061  * @param[in] flow
6062  *   Parent flow structure pointer.
6063  * @param[in] attr
6064  *   Flow rule attributes.
6065  * @param[in] items
6066  *   Pattern specification (list terminated by the END pattern item).
6067  * @param[in] actions
6068  *   Associated actions (list terminated by the END action).
6069  * @param[in] flow_split_info
6070  *   Pointer to flow split info structure.
6071  * @param[out] error
6072  *   Perform verbose error reporting if not NULL.
6073  * @return
6074  *   0 on success, negative value otherwise
6075  */
6076 static int
6077 flow_create_split_sample(struct rte_eth_dev *dev,
6078                          struct rte_flow *flow,
6079                          const struct rte_flow_attr *attr,
6080                          const struct rte_flow_item items[],
6081                          const struct rte_flow_action actions[],
6082                          struct mlx5_flow_split_info *flow_split_info,
6083                          struct rte_flow_error *error)
6084 {
6085         struct mlx5_priv *priv = dev->data->dev_private;
6086         struct rte_flow_action *sfx_actions = NULL;
6087         struct rte_flow_action *pre_actions = NULL;
6088         struct rte_flow_item *sfx_items = NULL;
6089         struct mlx5_flow *dev_flow = NULL;
6090         struct rte_flow_attr sfx_attr = *attr;
6091 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6092         struct mlx5_flow_dv_sample_resource *sample_res;
6093         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6094         struct mlx5_flow_tbl_resource *sfx_tbl;
6095 #endif
6096         size_t act_size;
6097         size_t item_size;
6098         uint32_t fdb_tx = 0;
6099         int32_t tag_id = 0;
6100         int actions_n = 0;
6101         int sample_action_pos;
6102         int qrss_action_pos;
6103         int add_tag = 0;
6104         int modify_after_mirror = 0;
6105         uint16_t jump_table = 0;
6106         const uint32_t next_ft_step = 1;
6107         int ret = 0;
6108
6109         if (priv->sampler_en)
6110                 actions_n = flow_check_match_action(actions, attr,
6111                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6112                                         &sample_action_pos, &qrss_action_pos,
6113                                         &modify_after_mirror);
6114         if (actions_n) {
6115                 /* The prefix actions must includes sample, tag, end. */
6116                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6117                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6118                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6119                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6120                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6121                                           item_size), 0, SOCKET_ID_ANY);
6122                 if (!sfx_actions)
6123                         return rte_flow_error_set(error, ENOMEM,
6124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6125                                                   NULL, "no memory to split "
6126                                                   "sample flow");
6127                 /* The representor_id is UINT16_MAX for uplink. */
6128                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6129                 /*
6130                  * When reg_c_preserve is set, metadata registers Cx preserve
6131                  * their value even through packet duplication.
6132                  */
6133                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6134                 if (add_tag)
6135                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6136                                         + act_size);
6137                 if (modify_after_mirror)
6138                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6139                                      next_ft_step;
6140                 pre_actions = sfx_actions + actions_n;
6141                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6142                                                 actions, sfx_actions,
6143                                                 pre_actions, actions_n,
6144                                                 sample_action_pos,
6145                                                 qrss_action_pos, jump_table,
6146                                                 error);
6147                 if (tag_id < 0 || (add_tag && !tag_id)) {
6148                         ret = -rte_errno;
6149                         goto exit;
6150                 }
6151                 if (modify_after_mirror)
6152                         flow_split_info->skip_scale =
6153                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6154                 /* Add the prefix subflow. */
6155                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6156                                               items, pre_actions,
6157                                               flow_split_info, error);
6158                 if (ret) {
6159                         ret = -rte_errno;
6160                         goto exit;
6161                 }
6162                 dev_flow->handle->split_flow_id = tag_id;
6163 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6164                 if (!modify_after_mirror) {
6165                         /* Set the sfx group attr. */
6166                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6167                                                 dev_flow->dv.sample_res;
6168                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6169                                                 sample_res->normal_path_tbl;
6170                         sfx_tbl_data = container_of(sfx_tbl,
6171                                                 struct mlx5_flow_tbl_data_entry,
6172                                                 tbl);
6173                         sfx_attr.group = sfx_attr.transfer ?
6174                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6175                 } else {
6176                         MLX5_ASSERT(attr->transfer);
6177                         sfx_attr.group = jump_table;
6178                 }
6179                 flow_split_info->prefix_layers =
6180                                 flow_get_prefix_layer_flags(dev_flow);
6181                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6182                 /* Suffix group level already be scaled with factor, set
6183                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6184                  * again in translation.
6185                  */
6186                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6187 #endif
6188         }
6189         /* Add the suffix subflow. */
6190         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6191                                       sfx_items ? sfx_items : items,
6192                                       sfx_actions ? sfx_actions : actions,
6193                                       flow_split_info, error);
6194 exit:
6195         if (sfx_actions)
6196                 mlx5_free(sfx_actions);
6197         return ret;
6198 }
6199
6200 /**
6201  * Split the flow to subflow set. The splitters might be linked
6202  * in the chain, like this:
6203  * flow_create_split_outer() calls:
6204  *   flow_create_split_meter() calls:
6205  *     flow_create_split_metadata(meter_subflow_0) calls:
6206  *       flow_create_split_inner(metadata_subflow_0)
6207  *       flow_create_split_inner(metadata_subflow_1)
6208  *       flow_create_split_inner(metadata_subflow_2)
6209  *     flow_create_split_metadata(meter_subflow_1) calls:
6210  *       flow_create_split_inner(metadata_subflow_0)
6211  *       flow_create_split_inner(metadata_subflow_1)
6212  *       flow_create_split_inner(metadata_subflow_2)
6213  *
6214  * This provide flexible way to add new levels of flow splitting.
6215  * The all of successfully created subflows are included to the
6216  * parent flow dev_flow list.
6217  *
6218  * @param dev
6219  *   Pointer to Ethernet device.
6220  * @param[in] flow
6221  *   Parent flow structure pointer.
6222  * @param[in] attr
6223  *   Flow rule attributes.
6224  * @param[in] items
6225  *   Pattern specification (list terminated by the END pattern item).
6226  * @param[in] actions
6227  *   Associated actions (list terminated by the END action).
6228  * @param[in] flow_split_info
6229  *   Pointer to flow split info structure.
6230  * @param[out] error
6231  *   Perform verbose error reporting if not NULL.
6232  * @return
6233  *   0 on success, negative value otherwise
6234  */
6235 static int
6236 flow_create_split_outer(struct rte_eth_dev *dev,
6237                         struct rte_flow *flow,
6238                         const struct rte_flow_attr *attr,
6239                         const struct rte_flow_item items[],
6240                         const struct rte_flow_action actions[],
6241                         struct mlx5_flow_split_info *flow_split_info,
6242                         struct rte_flow_error *error)
6243 {
6244         int ret;
6245
6246         ret = flow_create_split_sample(dev, flow, attr, items,
6247                                        actions, flow_split_info, error);
6248         MLX5_ASSERT(ret <= 0);
6249         return ret;
6250 }
6251
6252 static inline struct mlx5_flow_tunnel *
6253 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6254 {
6255         struct mlx5_flow_tunnel *tunnel;
6256
6257 #pragma GCC diagnostic push
6258 #pragma GCC diagnostic ignored "-Wcast-qual"
6259         tunnel = (typeof(tunnel))flow->tunnel;
6260 #pragma GCC diagnostic pop
6261
6262         return tunnel;
6263 }
6264
6265 /**
6266  * Adjust flow RSS workspace if needed.
6267  *
6268  * @param wks
6269  *   Pointer to thread flow work space.
6270  * @param rss_desc
6271  *   Pointer to RSS descriptor.
6272  * @param[in] nrssq_num
6273  *   New RSS queue number.
6274  *
6275  * @return
6276  *   0 on success, -1 otherwise and rte_errno is set.
6277  */
6278 static int
6279 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6280                           struct mlx5_flow_rss_desc *rss_desc,
6281                           uint32_t nrssq_num)
6282 {
6283         if (likely(nrssq_num <= wks->rssq_num))
6284                 return 0;
6285         rss_desc->queue = realloc(rss_desc->queue,
6286                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6287         if (!rss_desc->queue) {
6288                 rte_errno = ENOMEM;
6289                 return -1;
6290         }
6291         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6292         return 0;
6293 }
6294
6295 /**
6296  * Create a flow and add it to @p list.
6297  *
6298  * @param dev
6299  *   Pointer to Ethernet device.
6300  * @param list
6301  *   Pointer to a TAILQ flow list. If this parameter NULL,
6302  *   no list insertion occurred, flow is just created,
6303  *   this is caller's responsibility to track the
6304  *   created flow.
6305  * @param[in] attr
6306  *   Flow rule attributes.
6307  * @param[in] items
6308  *   Pattern specification (list terminated by the END pattern item).
6309  * @param[in] actions
6310  *   Associated actions (list terminated by the END action).
6311  * @param[in] external
6312  *   This flow rule is created by request external to PMD.
6313  * @param[out] error
6314  *   Perform verbose error reporting if not NULL.
6315  *
6316  * @return
6317  *   A flow index on success, 0 otherwise and rte_errno is set.
6318  */
6319 static uint32_t
6320 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6321                  const struct rte_flow_attr *attr,
6322                  const struct rte_flow_item items[],
6323                  const struct rte_flow_action original_actions[],
6324                  bool external, struct rte_flow_error *error)
6325 {
6326         struct mlx5_priv *priv = dev->data->dev_private;
6327         struct rte_flow *flow = NULL;
6328         struct mlx5_flow *dev_flow;
6329         const struct rte_flow_action_rss *rss = NULL;
6330         struct mlx5_translated_action_handle
6331                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6332         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6333         union {
6334                 struct mlx5_flow_expand_rss buf;
6335                 uint8_t buffer[4096];
6336         } expand_buffer;
6337         union {
6338                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6339                 uint8_t buffer[2048];
6340         } actions_rx;
6341         union {
6342                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6343                 uint8_t buffer[2048];
6344         } actions_hairpin_tx;
6345         union {
6346                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6347                 uint8_t buffer[2048];
6348         } items_tx;
6349         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6350         struct mlx5_flow_rss_desc *rss_desc;
6351         const struct rte_flow_action *p_actions_rx;
6352         uint32_t i;
6353         uint32_t idx = 0;
6354         int hairpin_flow;
6355         struct rte_flow_attr attr_tx = { .priority = 0 };
6356         const struct rte_flow_action *actions;
6357         struct rte_flow_action *translated_actions = NULL;
6358         struct mlx5_flow_tunnel *tunnel;
6359         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6360         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6361         struct mlx5_flow_split_info flow_split_info = {
6362                 .external = !!external,
6363                 .skip_scale = 0,
6364                 .flow_idx = 0,
6365                 .prefix_mark = 0,
6366                 .prefix_layers = 0,
6367                 .table_id = 0
6368         };
6369         int ret;
6370
6371         MLX5_ASSERT(wks);
6372         rss_desc = &wks->rss_desc;
6373         ret = flow_action_handles_translate(dev, original_actions,
6374                                             indir_actions,
6375                                             &indir_actions_n,
6376                                             &translated_actions, error);
6377         if (ret < 0) {
6378                 MLX5_ASSERT(translated_actions == NULL);
6379                 return 0;
6380         }
6381         actions = translated_actions ? translated_actions : original_actions;
6382         p_actions_rx = actions;
6383         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6384         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6385                                 external, hairpin_flow, error);
6386         if (ret < 0)
6387                 goto error_before_hairpin_split;
6388         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6389         if (!flow) {
6390                 rte_errno = ENOMEM;
6391                 goto error_before_hairpin_split;
6392         }
6393         if (hairpin_flow > 0) {
6394                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6395                         rte_errno = EINVAL;
6396                         goto error_before_hairpin_split;
6397                 }
6398                 flow_hairpin_split(dev, actions, actions_rx.actions,
6399                                    actions_hairpin_tx.actions, items_tx.items,
6400                                    idx);
6401                 p_actions_rx = actions_rx.actions;
6402         }
6403         flow_split_info.flow_idx = idx;
6404         flow->drv_type = flow_get_drv_type(dev, attr);
6405         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6406                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6407         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6408         /* RSS Action only works on NIC RX domain */
6409         if (attr->ingress && !attr->transfer)
6410                 rss = flow_get_rss_action(dev, p_actions_rx);
6411         if (rss) {
6412                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6413                         return 0;
6414                 /*
6415                  * The following information is required by
6416                  * mlx5_flow_hashfields_adjust() in advance.
6417                  */
6418                 rss_desc->level = rss->level;
6419                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6420                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6421         }
6422         flow->dev_handles = 0;
6423         if (rss && rss->types) {
6424                 unsigned int graph_root;
6425
6426                 graph_root = find_graph_root(rss->level);
6427                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6428                                            items, rss->types,
6429                                            mlx5_support_expansion, graph_root);
6430                 MLX5_ASSERT(ret > 0 &&
6431                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6432                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6433                         for (i = 0; i < buf->entries; ++i)
6434                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6435                 }
6436         } else {
6437                 buf->entries = 1;
6438                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6439         }
6440         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6441                                                       indir_actions_n);
6442         for (i = 0; i < buf->entries; ++i) {
6443                 /* Initialize flow split data. */
6444                 flow_split_info.prefix_layers = 0;
6445                 flow_split_info.prefix_mark = 0;
6446                 flow_split_info.skip_scale = 0;
6447                 /*
6448                  * The splitter may create multiple dev_flows,
6449                  * depending on configuration. In the simplest
6450                  * case it just creates unmodified original flow.
6451                  */
6452                 ret = flow_create_split_outer(dev, flow, attr,
6453                                               buf->entry[i].pattern,
6454                                               p_actions_rx, &flow_split_info,
6455                                               error);
6456                 if (ret < 0)
6457                         goto error;
6458                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6459                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6460                                                            p_actions_rx,
6461                                                            idx,
6462                                                            wks->flows[0].tunnel,
6463                                                            &default_miss_ctx,
6464                                                            error);
6465                         if (ret < 0) {
6466                                 mlx5_free(default_miss_ctx.queue);
6467                                 goto error;
6468                         }
6469                 }
6470         }
6471         /* Create the tx flow. */
6472         if (hairpin_flow) {
6473                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6474                 attr_tx.ingress = 0;
6475                 attr_tx.egress = 1;
6476                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6477                                          actions_hairpin_tx.actions,
6478                                          idx, error);
6479                 if (!dev_flow)
6480                         goto error;
6481                 dev_flow->flow = flow;
6482                 dev_flow->external = 0;
6483                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6484                               dev_flow->handle, next);
6485                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6486                                          items_tx.items,
6487                                          actions_hairpin_tx.actions, error);
6488                 if (ret < 0)
6489                         goto error;
6490         }
6491         /*
6492          * Update the metadata register copy table. If extensive
6493          * metadata feature is enabled and registers are supported
6494          * we might create the extra rte_flow for each unique
6495          * MARK/FLAG action ID.
6496          *
6497          * The table is updated for ingress Flows only, because
6498          * the egress Flows belong to the different device and
6499          * copy table should be updated in peer NIC Rx domain.
6500          */
6501         if (attr->ingress &&
6502             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6503                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6504                 if (ret)
6505                         goto error;
6506         }
6507         /*
6508          * If the flow is external (from application) OR device is started,
6509          * OR mreg discover, then apply immediately.
6510          */
6511         if (external || dev->data->dev_started ||
6512             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6513              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6514                 ret = flow_drv_apply(dev, flow, error);
6515                 if (ret < 0)
6516                         goto error;
6517         }
6518         flow->type = type;
6519         flow_rxq_flags_set(dev, flow);
6520         rte_free(translated_actions);
6521         tunnel = flow_tunnel_from_rule(wks->flows);
6522         if (tunnel) {
6523                 flow->tunnel = 1;
6524                 flow->tunnel_id = tunnel->tunnel_id;
6525                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6526                 mlx5_free(default_miss_ctx.queue);
6527         }
6528         mlx5_flow_pop_thread_workspace();
6529         return idx;
6530 error:
6531         MLX5_ASSERT(flow);
6532         ret = rte_errno; /* Save rte_errno before cleanup. */
6533         flow_mreg_del_copy_action(dev, flow);
6534         flow_drv_destroy(dev, flow);
6535         if (rss_desc->shared_rss)
6536                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6537                         mlx5_ipool_get
6538                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6539                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6540         mlx5_ipool_free(priv->flows[type], idx);
6541         rte_errno = ret; /* Restore rte_errno. */
6542         ret = rte_errno;
6543         rte_errno = ret;
6544         mlx5_flow_pop_thread_workspace();
6545 error_before_hairpin_split:
6546         rte_free(translated_actions);
6547         return 0;
6548 }
6549
6550 /**
6551  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6552  * incoming packets to table 1.
6553  *
6554  * Other flow rules, requested for group n, will be created in
6555  * e-switch table n+1.
6556  * Jump action to e-switch group n will be created to group n+1.
6557  *
6558  * Used when working in switchdev mode, to utilise advantages of table 1
6559  * and above.
6560  *
6561  * @param dev
6562  *   Pointer to Ethernet device.
6563  *
6564  * @return
6565  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6566  */
6567 struct rte_flow *
6568 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6569 {
6570         const struct rte_flow_attr attr = {
6571                 .group = 0,
6572                 .priority = 0,
6573                 .ingress = 1,
6574                 .egress = 0,
6575                 .transfer = 1,
6576         };
6577         const struct rte_flow_item pattern = {
6578                 .type = RTE_FLOW_ITEM_TYPE_END,
6579         };
6580         struct rte_flow_action_jump jump = {
6581                 .group = 1,
6582         };
6583         const struct rte_flow_action actions[] = {
6584                 {
6585                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6586                         .conf = &jump,
6587                 },
6588                 {
6589                         .type = RTE_FLOW_ACTION_TYPE_END,
6590                 },
6591         };
6592         struct rte_flow_error error;
6593
6594         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6595                                                    &attr, &pattern,
6596                                                    actions, false, &error);
6597 }
6598
6599 /**
6600  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6601  * and sq number, directs all packets to peer vport.
6602  *
6603  * @param dev
6604  *   Pointer to Ethernet device.
6605  * @param txq
6606  *   Txq index.
6607  *
6608  * @return
6609  *   Flow ID on success, 0 otherwise and rte_errno is set.
6610  */
6611 uint32_t
6612 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6613 {
6614         struct rte_flow_attr attr = {
6615                 .group = 0,
6616                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6617                 .ingress = 1,
6618                 .egress = 0,
6619                 .transfer = 1,
6620         };
6621         struct rte_flow_item_port_id port_spec = {
6622                 .id = MLX5_PORT_ESW_MGR,
6623         };
6624         struct mlx5_rte_flow_item_tx_queue txq_spec = {
6625                 .queue = txq,
6626         };
6627         struct rte_flow_item pattern[] = {
6628                 {
6629                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6630                         .spec = &port_spec,
6631                 },
6632                 {
6633                         .type = (enum rte_flow_item_type)
6634                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6635                         .spec = &txq_spec,
6636                 },
6637                 {
6638                         .type = RTE_FLOW_ITEM_TYPE_END,
6639                 },
6640         };
6641         struct rte_flow_action_jump jump = {
6642                 .group = 1,
6643         };
6644         struct rte_flow_action_port_id port = {
6645                 .id = dev->data->port_id,
6646         };
6647         struct rte_flow_action actions[] = {
6648                 {
6649                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6650                         .conf = &jump,
6651                 },
6652                 {
6653                         .type = RTE_FLOW_ACTION_TYPE_END,
6654                 },
6655         };
6656         struct rte_flow_error error;
6657
6658         /*
6659          * Creates group 0, highest priority jump flow.
6660          * Matches txq to bypass kernel packets.
6661          */
6662         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6663                              false, &error) == 0)
6664                 return 0;
6665         /* Create group 1, lowest priority redirect flow for txq. */
6666         attr.group = 1;
6667         actions[0].conf = &port;
6668         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6669         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6670                                 actions, false, &error);
6671 }
6672
6673 /**
6674  * Validate a flow supported by the NIC.
6675  *
6676  * @see rte_flow_validate()
6677  * @see rte_flow_ops
6678  */
6679 int
6680 mlx5_flow_validate(struct rte_eth_dev *dev,
6681                    const struct rte_flow_attr *attr,
6682                    const struct rte_flow_item items[],
6683                    const struct rte_flow_action original_actions[],
6684                    struct rte_flow_error *error)
6685 {
6686         int hairpin_flow;
6687         struct mlx5_translated_action_handle
6688                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6689         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6690         const struct rte_flow_action *actions;
6691         struct rte_flow_action *translated_actions = NULL;
6692         int ret = flow_action_handles_translate(dev, original_actions,
6693                                                 indir_actions,
6694                                                 &indir_actions_n,
6695                                                 &translated_actions, error);
6696
6697         if (ret)
6698                 return ret;
6699         actions = translated_actions ? translated_actions : original_actions;
6700         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6701         ret = flow_drv_validate(dev, attr, items, actions,
6702                                 true, hairpin_flow, error);
6703         rte_free(translated_actions);
6704         return ret;
6705 }
6706
6707 /**
6708  * Create a flow.
6709  *
6710  * @see rte_flow_create()
6711  * @see rte_flow_ops
6712  */
6713 struct rte_flow *
6714 mlx5_flow_create(struct rte_eth_dev *dev,
6715                  const struct rte_flow_attr *attr,
6716                  const struct rte_flow_item items[],
6717                  const struct rte_flow_action actions[],
6718                  struct rte_flow_error *error)
6719 {
6720         /*
6721          * If the device is not started yet, it is not allowed to created a
6722          * flow from application. PMD default flows and traffic control flows
6723          * are not affected.
6724          */
6725         if (unlikely(!dev->data->dev_started)) {
6726                 DRV_LOG(DEBUG, "port %u is not started when "
6727                         "inserting a flow", dev->data->port_id);
6728                 rte_flow_error_set(error, ENODEV,
6729                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6730                                    NULL,
6731                                    "port not started");
6732                 return NULL;
6733         }
6734
6735         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6736                                                    attr, items, actions,
6737                                                    true, error);
6738 }
6739
6740 /**
6741  * Destroy a flow in a list.
6742  *
6743  * @param dev
6744  *   Pointer to Ethernet device.
6745  * @param[in] flow_idx
6746  *   Index of flow to destroy.
6747  */
6748 static void
6749 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6750                   uint32_t flow_idx)
6751 {
6752         struct mlx5_priv *priv = dev->data->dev_private;
6753         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6754
6755         if (!flow)
6756                 return;
6757         MLX5_ASSERT(flow->type == type);
6758         /*
6759          * Update RX queue flags only if port is started, otherwise it is
6760          * already clean.
6761          */
6762         if (dev->data->dev_started)
6763                 flow_rxq_flags_trim(dev, flow);
6764         flow_drv_destroy(dev, flow);
6765         if (flow->tunnel) {
6766                 struct mlx5_flow_tunnel *tunnel;
6767
6768                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6769                 RTE_VERIFY(tunnel);
6770                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6771                         mlx5_flow_tunnel_free(dev, tunnel);
6772         }
6773         flow_mreg_del_copy_action(dev, flow);
6774         mlx5_ipool_free(priv->flows[type], flow_idx);
6775 }
6776
6777 /**
6778  * Destroy all flows.
6779  *
6780  * @param dev
6781  *   Pointer to Ethernet device.
6782  * @param type
6783  *   Flow type to be flushed.
6784  * @param active
6785  *   If flushing is called avtively.
6786  */
6787 void
6788 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6789                      bool active)
6790 {
6791         struct mlx5_priv *priv = dev->data->dev_private;
6792         uint32_t num_flushed = 0, fidx = 1;
6793         struct rte_flow *flow;
6794
6795         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6796                 flow_list_destroy(dev, type, fidx);
6797                 num_flushed++;
6798         }
6799         if (active) {
6800                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6801                         dev->data->port_id, num_flushed);
6802         }
6803 }
6804
6805 /**
6806  * Stop all default actions for flows.
6807  *
6808  * @param dev
6809  *   Pointer to Ethernet device.
6810  */
6811 void
6812 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6813 {
6814         flow_mreg_del_default_copy_action(dev);
6815         flow_rxq_flags_clear(dev);
6816 }
6817
6818 /**
6819  * Start all default actions for flows.
6820  *
6821  * @param dev
6822  *   Pointer to Ethernet device.
6823  * @return
6824  *   0 on success, a negative errno value otherwise and rte_errno is set.
6825  */
6826 int
6827 mlx5_flow_start_default(struct rte_eth_dev *dev)
6828 {
6829         struct rte_flow_error error;
6830
6831         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6832         return flow_mreg_add_default_copy_action(dev, &error);
6833 }
6834
6835 /**
6836  * Release key of thread specific flow workspace data.
6837  */
6838 void
6839 flow_release_workspace(void *data)
6840 {
6841         struct mlx5_flow_workspace *wks = data;
6842         struct mlx5_flow_workspace *next;
6843
6844         while (wks) {
6845                 next = wks->next;
6846                 free(wks->rss_desc.queue);
6847                 free(wks);
6848                 wks = next;
6849         }
6850 }
6851
6852 /**
6853  * Get thread specific current flow workspace.
6854  *
6855  * @return pointer to thread specific flow workspace data, NULL on error.
6856  */
6857 struct mlx5_flow_workspace*
6858 mlx5_flow_get_thread_workspace(void)
6859 {
6860         struct mlx5_flow_workspace *data;
6861
6862         data = mlx5_flow_os_get_specific_workspace();
6863         MLX5_ASSERT(data && data->inuse);
6864         if (!data || !data->inuse)
6865                 DRV_LOG(ERR, "flow workspace not initialized.");
6866         return data;
6867 }
6868
6869 /**
6870  * Allocate and init new flow workspace.
6871  *
6872  * @return pointer to flow workspace data, NULL on error.
6873  */
6874 static struct mlx5_flow_workspace*
6875 flow_alloc_thread_workspace(void)
6876 {
6877         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6878
6879         if (!data) {
6880                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6881                         "memory.");
6882                 return NULL;
6883         }
6884         data->rss_desc.queue = calloc(1,
6885                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6886         if (!data->rss_desc.queue)
6887                 goto err;
6888         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6889         return data;
6890 err:
6891         if (data->rss_desc.queue)
6892                 free(data->rss_desc.queue);
6893         free(data);
6894         return NULL;
6895 }
6896
6897 /**
6898  * Get new thread specific flow workspace.
6899  *
6900  * If current workspace inuse, create new one and set as current.
6901  *
6902  * @return pointer to thread specific flow workspace data, NULL on error.
6903  */
6904 static struct mlx5_flow_workspace*
6905 mlx5_flow_push_thread_workspace(void)
6906 {
6907         struct mlx5_flow_workspace *curr;
6908         struct mlx5_flow_workspace *data;
6909
6910         curr = mlx5_flow_os_get_specific_workspace();
6911         if (!curr) {
6912                 data = flow_alloc_thread_workspace();
6913                 if (!data)
6914                         return NULL;
6915         } else if (!curr->inuse) {
6916                 data = curr;
6917         } else if (curr->next) {
6918                 data = curr->next;
6919         } else {
6920                 data = flow_alloc_thread_workspace();
6921                 if (!data)
6922                         return NULL;
6923                 curr->next = data;
6924                 data->prev = curr;
6925         }
6926         data->inuse = 1;
6927         data->flow_idx = 0;
6928         /* Set as current workspace */
6929         if (mlx5_flow_os_set_specific_workspace(data))
6930                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6931         return data;
6932 }
6933
6934 /**
6935  * Close current thread specific flow workspace.
6936  *
6937  * If previous workspace available, set it as current.
6938  *
6939  * @return pointer to thread specific flow workspace data, NULL on error.
6940  */
6941 static void
6942 mlx5_flow_pop_thread_workspace(void)
6943 {
6944         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6945
6946         if (!data)
6947                 return;
6948         if (!data->inuse) {
6949                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6950                 return;
6951         }
6952         data->inuse = 0;
6953         if (!data->prev)
6954                 return;
6955         if (mlx5_flow_os_set_specific_workspace(data->prev))
6956                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6957 }
6958
6959 /**
6960  * Verify the flow list is empty
6961  *
6962  * @param dev
6963  *  Pointer to Ethernet device.
6964  *
6965  * @return the number of flows not released.
6966  */
6967 int
6968 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6969 {
6970         struct mlx5_priv *priv = dev->data->dev_private;
6971         struct rte_flow *flow;
6972         uint32_t idx = 0;
6973         int ret = 0, i;
6974
6975         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6976                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6977                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6978                                 dev->data->port_id, (void *)flow);
6979                         ret++;
6980                 }
6981         }
6982         return ret;
6983 }
6984
6985 /**
6986  * Enable default hairpin egress flow.
6987  *
6988  * @param dev
6989  *   Pointer to Ethernet device.
6990  * @param queue
6991  *   The queue index.
6992  *
6993  * @return
6994  *   0 on success, a negative errno value otherwise and rte_errno is set.
6995  */
6996 int
6997 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6998                             uint32_t queue)
6999 {
7000         const struct rte_flow_attr attr = {
7001                 .egress = 1,
7002                 .priority = 0,
7003         };
7004         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7005                 .queue = queue,
7006         };
7007         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7008                 .queue = UINT32_MAX,
7009         };
7010         struct rte_flow_item items[] = {
7011                 {
7012                         .type = (enum rte_flow_item_type)
7013                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7014                         .spec = &queue_spec,
7015                         .last = NULL,
7016                         .mask = &queue_mask,
7017                 },
7018                 {
7019                         .type = RTE_FLOW_ITEM_TYPE_END,
7020                 },
7021         };
7022         struct rte_flow_action_jump jump = {
7023                 .group = MLX5_HAIRPIN_TX_TABLE,
7024         };
7025         struct rte_flow_action actions[2];
7026         uint32_t flow_idx;
7027         struct rte_flow_error error;
7028
7029         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7030         actions[0].conf = &jump;
7031         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7032         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7033                                     &attr, items, actions, false, &error);
7034         if (!flow_idx) {
7035                 DRV_LOG(DEBUG,
7036                         "Failed to create ctrl flow: rte_errno(%d),"
7037                         " type(%d), message(%s)",
7038                         rte_errno, error.type,
7039                         error.message ? error.message : " (no stated reason)");
7040                 return -rte_errno;
7041         }
7042         return 0;
7043 }
7044
7045 /**
7046  * Enable a control flow configured from the control plane.
7047  *
7048  * @param dev
7049  *   Pointer to Ethernet device.
7050  * @param eth_spec
7051  *   An Ethernet flow spec to apply.
7052  * @param eth_mask
7053  *   An Ethernet flow mask to apply.
7054  * @param vlan_spec
7055  *   A VLAN flow spec to apply.
7056  * @param vlan_mask
7057  *   A VLAN flow mask to apply.
7058  *
7059  * @return
7060  *   0 on success, a negative errno value otherwise and rte_errno is set.
7061  */
7062 int
7063 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7064                     struct rte_flow_item_eth *eth_spec,
7065                     struct rte_flow_item_eth *eth_mask,
7066                     struct rte_flow_item_vlan *vlan_spec,
7067                     struct rte_flow_item_vlan *vlan_mask)
7068 {
7069         struct mlx5_priv *priv = dev->data->dev_private;
7070         const struct rte_flow_attr attr = {
7071                 .ingress = 1,
7072                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7073         };
7074         struct rte_flow_item items[] = {
7075                 {
7076                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7077                         .spec = eth_spec,
7078                         .last = NULL,
7079                         .mask = eth_mask,
7080                 },
7081                 {
7082                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7083                                               RTE_FLOW_ITEM_TYPE_END,
7084                         .spec = vlan_spec,
7085                         .last = NULL,
7086                         .mask = vlan_mask,
7087                 },
7088                 {
7089                         .type = RTE_FLOW_ITEM_TYPE_END,
7090                 },
7091         };
7092         uint16_t queue[priv->reta_idx_n];
7093         struct rte_flow_action_rss action_rss = {
7094                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7095                 .level = 0,
7096                 .types = priv->rss_conf.rss_hf,
7097                 .key_len = priv->rss_conf.rss_key_len,
7098                 .queue_num = priv->reta_idx_n,
7099                 .key = priv->rss_conf.rss_key,
7100                 .queue = queue,
7101         };
7102         struct rte_flow_action actions[] = {
7103                 {
7104                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7105                         .conf = &action_rss,
7106                 },
7107                 {
7108                         .type = RTE_FLOW_ACTION_TYPE_END,
7109                 },
7110         };
7111         uint32_t flow_idx;
7112         struct rte_flow_error error;
7113         unsigned int i;
7114
7115         if (!priv->reta_idx_n || !priv->rxqs_n) {
7116                 return 0;
7117         }
7118         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7119                 action_rss.types = 0;
7120         for (i = 0; i != priv->reta_idx_n; ++i)
7121                 queue[i] = (*priv->reta_idx)[i];
7122         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7123                                     &attr, items, actions, false, &error);
7124         if (!flow_idx)
7125                 return -rte_errno;
7126         return 0;
7127 }
7128
7129 /**
7130  * Enable a flow control configured from the control plane.
7131  *
7132  * @param dev
7133  *   Pointer to Ethernet device.
7134  * @param eth_spec
7135  *   An Ethernet flow spec to apply.
7136  * @param eth_mask
7137  *   An Ethernet flow mask to apply.
7138  *
7139  * @return
7140  *   0 on success, a negative errno value otherwise and rte_errno is set.
7141  */
7142 int
7143 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7144                struct rte_flow_item_eth *eth_spec,
7145                struct rte_flow_item_eth *eth_mask)
7146 {
7147         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7148 }
7149
7150 /**
7151  * Create default miss flow rule matching lacp traffic
7152  *
7153  * @param dev
7154  *   Pointer to Ethernet device.
7155  * @param eth_spec
7156  *   An Ethernet flow spec to apply.
7157  *
7158  * @return
7159  *   0 on success, a negative errno value otherwise and rte_errno is set.
7160  */
7161 int
7162 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7163 {
7164         /*
7165          * The LACP matching is done by only using ether type since using
7166          * a multicast dst mac causes kernel to give low priority to this flow.
7167          */
7168         static const struct rte_flow_item_eth lacp_spec = {
7169                 .type = RTE_BE16(0x8809),
7170         };
7171         static const struct rte_flow_item_eth lacp_mask = {
7172                 .type = 0xffff,
7173         };
7174         const struct rte_flow_attr attr = {
7175                 .ingress = 1,
7176         };
7177         struct rte_flow_item items[] = {
7178                 {
7179                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7180                         .spec = &lacp_spec,
7181                         .mask = &lacp_mask,
7182                 },
7183                 {
7184                         .type = RTE_FLOW_ITEM_TYPE_END,
7185                 },
7186         };
7187         struct rte_flow_action actions[] = {
7188                 {
7189                         .type = (enum rte_flow_action_type)
7190                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7191                 },
7192                 {
7193                         .type = RTE_FLOW_ACTION_TYPE_END,
7194                 },
7195         };
7196         struct rte_flow_error error;
7197         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7198                                         &attr, items, actions,
7199                                         false, &error);
7200
7201         if (!flow_idx)
7202                 return -rte_errno;
7203         return 0;
7204 }
7205
7206 /**
7207  * Destroy a flow.
7208  *
7209  * @see rte_flow_destroy()
7210  * @see rte_flow_ops
7211  */
7212 int
7213 mlx5_flow_destroy(struct rte_eth_dev *dev,
7214                   struct rte_flow *flow,
7215                   struct rte_flow_error *error __rte_unused)
7216 {
7217         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7218                                 (uintptr_t)(void *)flow);
7219         return 0;
7220 }
7221
7222 /**
7223  * Destroy all flows.
7224  *
7225  * @see rte_flow_flush()
7226  * @see rte_flow_ops
7227  */
7228 int
7229 mlx5_flow_flush(struct rte_eth_dev *dev,
7230                 struct rte_flow_error *error __rte_unused)
7231 {
7232         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7233         return 0;
7234 }
7235
7236 /**
7237  * Isolated mode.
7238  *
7239  * @see rte_flow_isolate()
7240  * @see rte_flow_ops
7241  */
7242 int
7243 mlx5_flow_isolate(struct rte_eth_dev *dev,
7244                   int enable,
7245                   struct rte_flow_error *error)
7246 {
7247         struct mlx5_priv *priv = dev->data->dev_private;
7248
7249         if (dev->data->dev_started) {
7250                 rte_flow_error_set(error, EBUSY,
7251                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7252                                    NULL,
7253                                    "port must be stopped first");
7254                 return -rte_errno;
7255         }
7256         priv->isolated = !!enable;
7257         if (enable)
7258                 dev->dev_ops = &mlx5_dev_ops_isolate;
7259         else
7260                 dev->dev_ops = &mlx5_dev_ops;
7261
7262         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7263         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7264
7265         return 0;
7266 }
7267
7268 /**
7269  * Query a flow.
7270  *
7271  * @see rte_flow_query()
7272  * @see rte_flow_ops
7273  */
7274 static int
7275 flow_drv_query(struct rte_eth_dev *dev,
7276                uint32_t flow_idx,
7277                const struct rte_flow_action *actions,
7278                void *data,
7279                struct rte_flow_error *error)
7280 {
7281         struct mlx5_priv *priv = dev->data->dev_private;
7282         const struct mlx5_flow_driver_ops *fops;
7283         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7284                                                flow_idx);
7285         enum mlx5_flow_drv_type ftype;
7286
7287         if (!flow) {
7288                 return rte_flow_error_set(error, ENOENT,
7289                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7290                           NULL,
7291                           "invalid flow handle");
7292         }
7293         ftype = flow->drv_type;
7294         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7295         fops = flow_get_drv_ops(ftype);
7296
7297         return fops->query(dev, flow, actions, data, error);
7298 }
7299
7300 /**
7301  * Query a flow.
7302  *
7303  * @see rte_flow_query()
7304  * @see rte_flow_ops
7305  */
7306 int
7307 mlx5_flow_query(struct rte_eth_dev *dev,
7308                 struct rte_flow *flow,
7309                 const struct rte_flow_action *actions,
7310                 void *data,
7311                 struct rte_flow_error *error)
7312 {
7313         int ret;
7314
7315         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7316                              error);
7317         if (ret < 0)
7318                 return ret;
7319         return 0;
7320 }
7321
7322 /**
7323  * Get rte_flow callbacks.
7324  *
7325  * @param dev
7326  *   Pointer to Ethernet device structure.
7327  * @param ops
7328  *   Pointer to operation-specific structure.
7329  *
7330  * @return 0
7331  */
7332 int
7333 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7334                   const struct rte_flow_ops **ops)
7335 {
7336         *ops = &mlx5_flow_ops;
7337         return 0;
7338 }
7339
7340 /**
7341  * Validate meter policy actions.
7342  * Dispatcher for action type specific validation.
7343  *
7344  * @param[in] dev
7345  *   Pointer to the Ethernet device structure.
7346  * @param[in] action
7347  *   The meter policy action object to validate.
7348  * @param[in] attr
7349  *   Attributes of flow to determine steering domain.
7350  * @param[out] is_rss
7351  *   Is RSS or not.
7352  * @param[out] domain_bitmap
7353  *   Domain bitmap.
7354  * @param[out] is_def_policy
7355  *   Is default policy or not.
7356  * @param[out] error
7357  *   Perform verbose error reporting if not NULL. Initialized in case of
7358  *   error only.
7359  *
7360  * @return
7361  *   0 on success, otherwise negative errno value.
7362  */
7363 int
7364 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7365                         const struct rte_flow_action *actions[RTE_COLORS],
7366                         struct rte_flow_attr *attr,
7367                         bool *is_rss,
7368                         uint8_t *domain_bitmap,
7369                         uint8_t *policy_mode,
7370                         struct rte_mtr_error *error)
7371 {
7372         const struct mlx5_flow_driver_ops *fops;
7373
7374         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7375         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7376                                        domain_bitmap, policy_mode, error);
7377 }
7378
7379 /**
7380  * Destroy the meter table set.
7381  *
7382  * @param[in] dev
7383  *   Pointer to Ethernet device.
7384  * @param[in] mtr_policy
7385  *   Meter policy struct.
7386  */
7387 void
7388 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7389                       struct mlx5_flow_meter_policy *mtr_policy)
7390 {
7391         const struct mlx5_flow_driver_ops *fops;
7392
7393         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7394         fops->destroy_mtr_acts(dev, mtr_policy);
7395 }
7396
7397 /**
7398  * Create policy action, lock free,
7399  * (mutex should be acquired by caller).
7400  * Dispatcher for action type specific call.
7401  *
7402  * @param[in] dev
7403  *   Pointer to the Ethernet device structure.
7404  * @param[in] mtr_policy
7405  *   Meter policy struct.
7406  * @param[in] action
7407  *   Action specification used to create meter actions.
7408  * @param[out] error
7409  *   Perform verbose error reporting if not NULL. Initialized in case of
7410  *   error only.
7411  *
7412  * @return
7413  *   0 on success, otherwise negative errno value.
7414  */
7415 int
7416 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7417                       struct mlx5_flow_meter_policy *mtr_policy,
7418                       const struct rte_flow_action *actions[RTE_COLORS],
7419                       struct rte_mtr_error *error)
7420 {
7421         const struct mlx5_flow_driver_ops *fops;
7422
7423         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7424         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7425 }
7426
7427 /**
7428  * Create policy rules, lock free,
7429  * (mutex should be acquired by caller).
7430  * Dispatcher for action type specific call.
7431  *
7432  * @param[in] dev
7433  *   Pointer to the Ethernet device structure.
7434  * @param[in] mtr_policy
7435  *   Meter policy struct.
7436  *
7437  * @return
7438  *   0 on success, -1 otherwise.
7439  */
7440 int
7441 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7442                              struct mlx5_flow_meter_policy *mtr_policy)
7443 {
7444         const struct mlx5_flow_driver_ops *fops;
7445
7446         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7447         return fops->create_policy_rules(dev, mtr_policy);
7448 }
7449
7450 /**
7451  * Destroy policy rules, lock free,
7452  * (mutex should be acquired by caller).
7453  * Dispatcher for action type specific call.
7454  *
7455  * @param[in] dev
7456  *   Pointer to the Ethernet device structure.
7457  * @param[in] mtr_policy
7458  *   Meter policy struct.
7459  */
7460 void
7461 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7462                              struct mlx5_flow_meter_policy *mtr_policy)
7463 {
7464         const struct mlx5_flow_driver_ops *fops;
7465
7466         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7467         fops->destroy_policy_rules(dev, mtr_policy);
7468 }
7469
7470 /**
7471  * Destroy the default policy table set.
7472  *
7473  * @param[in] dev
7474  *   Pointer to Ethernet device.
7475  */
7476 void
7477 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7478 {
7479         const struct mlx5_flow_driver_ops *fops;
7480
7481         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7482         fops->destroy_def_policy(dev);
7483 }
7484
7485 /**
7486  * Destroy the default policy table set.
7487  *
7488  * @param[in] dev
7489  *   Pointer to Ethernet device.
7490  *
7491  * @return
7492  *   0 on success, -1 otherwise.
7493  */
7494 int
7495 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7496 {
7497         const struct mlx5_flow_driver_ops *fops;
7498
7499         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7500         return fops->create_def_policy(dev);
7501 }
7502
7503 /**
7504  * Create the needed meter and suffix tables.
7505  *
7506  * @param[in] dev
7507  *   Pointer to Ethernet device.
7508  *
7509  * @return
7510  *   0 on success, -1 otherwise.
7511  */
7512 int
7513 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7514                         struct mlx5_flow_meter_info *fm,
7515                         uint32_t mtr_idx,
7516                         uint8_t domain_bitmap)
7517 {
7518         const struct mlx5_flow_driver_ops *fops;
7519
7520         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7521         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7522 }
7523
7524 /**
7525  * Destroy the meter table set.
7526  *
7527  * @param[in] dev
7528  *   Pointer to Ethernet device.
7529  * @param[in] tbl
7530  *   Pointer to the meter table set.
7531  */
7532 void
7533 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7534                            struct mlx5_flow_meter_info *fm)
7535 {
7536         const struct mlx5_flow_driver_ops *fops;
7537
7538         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7539         fops->destroy_mtr_tbls(dev, fm);
7540 }
7541
7542 /**
7543  * Destroy the global meter drop table.
7544  *
7545  * @param[in] dev
7546  *   Pointer to Ethernet device.
7547  */
7548 void
7549 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7550 {
7551         const struct mlx5_flow_driver_ops *fops;
7552
7553         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7554         fops->destroy_mtr_drop_tbls(dev);
7555 }
7556
7557 /**
7558  * Destroy the sub policy table with RX queue.
7559  *
7560  * @param[in] dev
7561  *   Pointer to Ethernet device.
7562  * @param[in] mtr_policy
7563  *   Pointer to meter policy table.
7564  */
7565 void
7566 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7567                 struct mlx5_flow_meter_policy *mtr_policy)
7568 {
7569         const struct mlx5_flow_driver_ops *fops;
7570
7571         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7572         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7573 }
7574
7575 /**
7576  * Allocate the needed aso flow meter id.
7577  *
7578  * @param[in] dev
7579  *   Pointer to Ethernet device.
7580  *
7581  * @return
7582  *   Index to aso flow meter on success, NULL otherwise.
7583  */
7584 uint32_t
7585 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7586 {
7587         const struct mlx5_flow_driver_ops *fops;
7588
7589         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7590         return fops->create_meter(dev);
7591 }
7592
7593 /**
7594  * Free the aso flow meter id.
7595  *
7596  * @param[in] dev
7597  *   Pointer to Ethernet device.
7598  * @param[in] mtr_idx
7599  *  Index to aso flow meter to be free.
7600  *
7601  * @return
7602  *   0 on success.
7603  */
7604 void
7605 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7606 {
7607         const struct mlx5_flow_driver_ops *fops;
7608
7609         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7610         fops->free_meter(dev, mtr_idx);
7611 }
7612
7613 /**
7614  * Allocate a counter.
7615  *
7616  * @param[in] dev
7617  *   Pointer to Ethernet device structure.
7618  *
7619  * @return
7620  *   Index to allocated counter  on success, 0 otherwise.
7621  */
7622 uint32_t
7623 mlx5_counter_alloc(struct rte_eth_dev *dev)
7624 {
7625         const struct mlx5_flow_driver_ops *fops;
7626         struct rte_flow_attr attr = { .transfer = 0 };
7627
7628         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7629                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7630                 return fops->counter_alloc(dev);
7631         }
7632         DRV_LOG(ERR,
7633                 "port %u counter allocate is not supported.",
7634                  dev->data->port_id);
7635         return 0;
7636 }
7637
7638 /**
7639  * Free a counter.
7640  *
7641  * @param[in] dev
7642  *   Pointer to Ethernet device structure.
7643  * @param[in] cnt
7644  *   Index to counter to be free.
7645  */
7646 void
7647 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7648 {
7649         const struct mlx5_flow_driver_ops *fops;
7650         struct rte_flow_attr attr = { .transfer = 0 };
7651
7652         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7653                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7654                 fops->counter_free(dev, cnt);
7655                 return;
7656         }
7657         DRV_LOG(ERR,
7658                 "port %u counter free is not supported.",
7659                  dev->data->port_id);
7660 }
7661
7662 /**
7663  * Query counter statistics.
7664  *
7665  * @param[in] dev
7666  *   Pointer to Ethernet device structure.
7667  * @param[in] cnt
7668  *   Index to counter to query.
7669  * @param[in] clear
7670  *   Set to clear counter statistics.
7671  * @param[out] pkts
7672  *   The counter hits packets number to save.
7673  * @param[out] bytes
7674  *   The counter hits bytes number to save.
7675  *
7676  * @return
7677  *   0 on success, a negative errno value otherwise.
7678  */
7679 int
7680 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7681                    bool clear, uint64_t *pkts, uint64_t *bytes)
7682 {
7683         const struct mlx5_flow_driver_ops *fops;
7684         struct rte_flow_attr attr = { .transfer = 0 };
7685
7686         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7687                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7688                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7689         }
7690         DRV_LOG(ERR,
7691                 "port %u counter query is not supported.",
7692                  dev->data->port_id);
7693         return -ENOTSUP;
7694 }
7695
7696 /**
7697  * Allocate a new memory for the counter values wrapped by all the needed
7698  * management.
7699  *
7700  * @param[in] sh
7701  *   Pointer to mlx5_dev_ctx_shared object.
7702  *
7703  * @return
7704  *   0 on success, a negative errno value otherwise.
7705  */
7706 static int
7707 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7708 {
7709         struct mlx5_devx_mkey_attr mkey_attr;
7710         struct mlx5_counter_stats_mem_mng *mem_mng;
7711         volatile struct flow_counter_stats *raw_data;
7712         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7713         int size = (sizeof(struct flow_counter_stats) *
7714                         MLX5_COUNTERS_PER_POOL +
7715                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7716                         sizeof(struct mlx5_counter_stats_mem_mng);
7717         size_t pgsize = rte_mem_page_size();
7718         uint8_t *mem;
7719         int i;
7720
7721         if (pgsize == (size_t)-1) {
7722                 DRV_LOG(ERR, "Failed to get mem page size");
7723                 rte_errno = ENOMEM;
7724                 return -ENOMEM;
7725         }
7726         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7727         if (!mem) {
7728                 rte_errno = ENOMEM;
7729                 return -ENOMEM;
7730         }
7731         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7732         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7733         mem_mng->umem = mlx5_os_umem_reg(sh->cdev->ctx, mem, size,
7734                                                  IBV_ACCESS_LOCAL_WRITE);
7735         if (!mem_mng->umem) {
7736                 rte_errno = errno;
7737                 mlx5_free(mem);
7738                 return -rte_errno;
7739         }
7740         memset(&mkey_attr, 0, sizeof(mkey_attr));
7741         mkey_attr.addr = (uintptr_t)mem;
7742         mkey_attr.size = size;
7743         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7744         mkey_attr.pd = sh->cdev->pdn;
7745         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7746         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7747         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->cdev->ctx, &mkey_attr);
7748         if (!mem_mng->dm) {
7749                 mlx5_os_umem_dereg(mem_mng->umem);
7750                 rte_errno = errno;
7751                 mlx5_free(mem);
7752                 return -rte_errno;
7753         }
7754         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7755         raw_data = (volatile struct flow_counter_stats *)mem;
7756         for (i = 0; i < raws_n; ++i) {
7757                 mem_mng->raws[i].mem_mng = mem_mng;
7758                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7759         }
7760         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7761                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7762                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7763                                  next);
7764         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7765         sh->cmng.mem_mng = mem_mng;
7766         return 0;
7767 }
7768
7769 /**
7770  * Set the statistic memory to the new counter pool.
7771  *
7772  * @param[in] sh
7773  *   Pointer to mlx5_dev_ctx_shared object.
7774  * @param[in] pool
7775  *   Pointer to the pool to set the statistic memory.
7776  *
7777  * @return
7778  *   0 on success, a negative errno value otherwise.
7779  */
7780 static int
7781 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7782                                struct mlx5_flow_counter_pool *pool)
7783 {
7784         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7785         /* Resize statistic memory once used out. */
7786         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7787             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7788                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7789                 return -1;
7790         }
7791         rte_spinlock_lock(&pool->sl);
7792         pool->raw = cmng->mem_mng->raws + pool->index %
7793                     MLX5_CNT_CONTAINER_RESIZE;
7794         rte_spinlock_unlock(&pool->sl);
7795         pool->raw_hw = NULL;
7796         return 0;
7797 }
7798
7799 #define MLX5_POOL_QUERY_FREQ_US 1000000
7800
7801 /**
7802  * Set the periodic procedure for triggering asynchronous batch queries for all
7803  * the counter pools.
7804  *
7805  * @param[in] sh
7806  *   Pointer to mlx5_dev_ctx_shared object.
7807  */
7808 void
7809 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7810 {
7811         uint32_t pools_n, us;
7812
7813         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7814         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7815         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7816         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7817                 sh->cmng.query_thread_on = 0;
7818                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7819         } else {
7820                 sh->cmng.query_thread_on = 1;
7821         }
7822 }
7823
7824 /**
7825  * The periodic procedure for triggering asynchronous batch queries for all the
7826  * counter pools. This function is probably called by the host thread.
7827  *
7828  * @param[in] arg
7829  *   The parameter for the alarm process.
7830  */
7831 void
7832 mlx5_flow_query_alarm(void *arg)
7833 {
7834         struct mlx5_dev_ctx_shared *sh = arg;
7835         int ret;
7836         uint16_t pool_index = sh->cmng.pool_index;
7837         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7838         struct mlx5_flow_counter_pool *pool;
7839         uint16_t n_valid;
7840
7841         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7842                 goto set_alarm;
7843         rte_spinlock_lock(&cmng->pool_update_sl);
7844         pool = cmng->pools[pool_index];
7845         n_valid = cmng->n_valid;
7846         rte_spinlock_unlock(&cmng->pool_update_sl);
7847         /* Set the statistic memory to the new created pool. */
7848         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7849                 goto set_alarm;
7850         if (pool->raw_hw)
7851                 /* There is a pool query in progress. */
7852                 goto set_alarm;
7853         pool->raw_hw =
7854                 LIST_FIRST(&sh->cmng.free_stat_raws);
7855         if (!pool->raw_hw)
7856                 /* No free counter statistics raw memory. */
7857                 goto set_alarm;
7858         /*
7859          * Identify the counters released between query trigger and query
7860          * handle more efficiently. The counter released in this gap period
7861          * should wait for a new round of query as the new arrived packets
7862          * will not be taken into account.
7863          */
7864         pool->query_gen++;
7865         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7866                                                MLX5_COUNTERS_PER_POOL,
7867                                                NULL, NULL,
7868                                                pool->raw_hw->mem_mng->dm->id,
7869                                                (void *)(uintptr_t)
7870                                                pool->raw_hw->data,
7871                                                sh->devx_comp,
7872                                                (uint64_t)(uintptr_t)pool);
7873         if (ret) {
7874                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7875                         " %d", pool->min_dcs->id);
7876                 pool->raw_hw = NULL;
7877                 goto set_alarm;
7878         }
7879         LIST_REMOVE(pool->raw_hw, next);
7880         sh->cmng.pending_queries++;
7881         pool_index++;
7882         if (pool_index >= n_valid)
7883                 pool_index = 0;
7884 set_alarm:
7885         sh->cmng.pool_index = pool_index;
7886         mlx5_set_query_alarm(sh);
7887 }
7888
7889 /**
7890  * Check and callback event for new aged flow in the counter pool
7891  *
7892  * @param[in] sh
7893  *   Pointer to mlx5_dev_ctx_shared object.
7894  * @param[in] pool
7895  *   Pointer to Current counter pool.
7896  */
7897 static void
7898 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7899                    struct mlx5_flow_counter_pool *pool)
7900 {
7901         struct mlx5_priv *priv;
7902         struct mlx5_flow_counter *cnt;
7903         struct mlx5_age_info *age_info;
7904         struct mlx5_age_param *age_param;
7905         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7906         struct mlx5_counter_stats_raw *prev = pool->raw;
7907         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7908         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7909         uint16_t expected = AGE_CANDIDATE;
7910         uint32_t i;
7911
7912         pool->time_of_last_age_check = curr_time;
7913         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7914                 cnt = MLX5_POOL_GET_CNT(pool, i);
7915                 age_param = MLX5_CNT_TO_AGE(cnt);
7916                 if (__atomic_load_n(&age_param->state,
7917                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7918                         continue;
7919                 if (cur->data[i].hits != prev->data[i].hits) {
7920                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7921                                          __ATOMIC_RELAXED);
7922                         continue;
7923                 }
7924                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7925                                        time_delta,
7926                                        __ATOMIC_RELAXED) <= age_param->timeout)
7927                         continue;
7928                 /**
7929                  * Hold the lock first, or if between the
7930                  * state AGE_TMOUT and tailq operation the
7931                  * release happened, the release procedure
7932                  * may delete a non-existent tailq node.
7933                  */
7934                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7935                 age_info = GET_PORT_AGE_INFO(priv);
7936                 rte_spinlock_lock(&age_info->aged_sl);
7937                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7938                                                 AGE_TMOUT, false,
7939                                                 __ATOMIC_RELAXED,
7940                                                 __ATOMIC_RELAXED)) {
7941                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7942                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7943                 }
7944                 rte_spinlock_unlock(&age_info->aged_sl);
7945         }
7946         mlx5_age_event_prepare(sh);
7947 }
7948
7949 /**
7950  * Handler for the HW respond about ready values from an asynchronous batch
7951  * query. This function is probably called by the host thread.
7952  *
7953  * @param[in] sh
7954  *   The pointer to the shared device context.
7955  * @param[in] async_id
7956  *   The Devx async ID.
7957  * @param[in] status
7958  *   The status of the completion.
7959  */
7960 void
7961 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7962                                   uint64_t async_id, int status)
7963 {
7964         struct mlx5_flow_counter_pool *pool =
7965                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7966         struct mlx5_counter_stats_raw *raw_to_free;
7967         uint8_t query_gen = pool->query_gen ^ 1;
7968         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7969         enum mlx5_counter_type cnt_type =
7970                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7971                                 MLX5_COUNTER_TYPE_ORIGIN;
7972
7973         if (unlikely(status)) {
7974                 raw_to_free = pool->raw_hw;
7975         } else {
7976                 raw_to_free = pool->raw;
7977                 if (pool->is_aged)
7978                         mlx5_flow_aging_check(sh, pool);
7979                 rte_spinlock_lock(&pool->sl);
7980                 pool->raw = pool->raw_hw;
7981                 rte_spinlock_unlock(&pool->sl);
7982                 /* Be sure the new raw counters data is updated in memory. */
7983                 rte_io_wmb();
7984                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7985                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7986                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7987                                      &pool->counters[query_gen], next);
7988                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7989                 }
7990         }
7991         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7992         pool->raw_hw = NULL;
7993         sh->cmng.pending_queries--;
7994 }
7995
7996 static int
7997 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7998                     const struct flow_grp_info *grp_info,
7999                     struct rte_flow_error *error)
8000 {
8001         if (grp_info->transfer && grp_info->external &&
8002             grp_info->fdb_def_rule) {
8003                 if (group == UINT32_MAX)
8004                         return rte_flow_error_set
8005                                                 (error, EINVAL,
8006                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8007                                                  NULL,
8008                                                  "group index not supported");
8009                 *table = group + 1;
8010         } else {
8011                 *table = group;
8012         }
8013         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8014         return 0;
8015 }
8016
8017 /**
8018  * Translate the rte_flow group index to HW table value.
8019  *
8020  * If tunnel offload is disabled, all group ids converted to flow table
8021  * id using the standard method.
8022  * If tunnel offload is enabled, group id can be converted using the
8023  * standard or tunnel conversion method. Group conversion method
8024  * selection depends on flags in `grp_info` parameter:
8025  * - Internal (grp_info.external == 0) groups conversion uses the
8026  *   standard method.
8027  * - Group ids in JUMP action converted with the tunnel conversion.
8028  * - Group id in rule attribute conversion depends on a rule type and
8029  *   group id value:
8030  *   ** non zero group attributes converted with the tunnel method
8031  *   ** zero group attribute in non-tunnel rule is converted using the
8032  *      standard method - there's only one root table
8033  *   ** zero group attribute in steer tunnel rule is converted with the
8034  *      standard method - single root table
8035  *   ** zero group attribute in match tunnel rule is a special OvS
8036  *      case: that value is used for portability reasons. That group
8037  *      id is converted with the tunnel conversion method.
8038  *
8039  * @param[in] dev
8040  *   Port device
8041  * @param[in] tunnel
8042  *   PMD tunnel offload object
8043  * @param[in] group
8044  *   rte_flow group index value.
8045  * @param[out] table
8046  *   HW table value.
8047  * @param[in] grp_info
8048  *   flags used for conversion
8049  * @param[out] error
8050  *   Pointer to error structure.
8051  *
8052  * @return
8053  *   0 on success, a negative errno value otherwise and rte_errno is set.
8054  */
8055 int
8056 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8057                          const struct mlx5_flow_tunnel *tunnel,
8058                          uint32_t group, uint32_t *table,
8059                          const struct flow_grp_info *grp_info,
8060                          struct rte_flow_error *error)
8061 {
8062         int ret;
8063         bool standard_translation;
8064
8065         if (!grp_info->skip_scale && grp_info->external &&
8066             group < MLX5_MAX_TABLES_EXTERNAL)
8067                 group *= MLX5_FLOW_TABLE_FACTOR;
8068         if (is_tunnel_offload_active(dev)) {
8069                 standard_translation = !grp_info->external ||
8070                                         grp_info->std_tbl_fix;
8071         } else {
8072                 standard_translation = true;
8073         }
8074         DRV_LOG(DEBUG,
8075                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8076                 dev->data->port_id, group, grp_info->transfer,
8077                 grp_info->external, grp_info->fdb_def_rule,
8078                 standard_translation ? "STANDARD" : "TUNNEL");
8079         if (standard_translation)
8080                 ret = flow_group_to_table(dev->data->port_id, group, table,
8081                                           grp_info, error);
8082         else
8083                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8084                                                       table, error);
8085
8086         return ret;
8087 }
8088
8089 /**
8090  * Discover availability of metadata reg_c's.
8091  *
8092  * Iteratively use test flows to check availability.
8093  *
8094  * @param[in] dev
8095  *   Pointer to the Ethernet device structure.
8096  *
8097  * @return
8098  *   0 on success, a negative errno value otherwise and rte_errno is set.
8099  */
8100 int
8101 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8102 {
8103         struct mlx5_priv *priv = dev->data->dev_private;
8104         struct mlx5_dev_config *config = &priv->config;
8105         enum modify_reg idx;
8106         int n = 0;
8107
8108         /* reg_c[0] and reg_c[1] are reserved. */
8109         config->flow_mreg_c[n++] = REG_C_0;
8110         config->flow_mreg_c[n++] = REG_C_1;
8111         /* Discover availability of other reg_c's. */
8112         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8113                 struct rte_flow_attr attr = {
8114                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8115                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8116                         .ingress = 1,
8117                 };
8118                 struct rte_flow_item items[] = {
8119                         [0] = {
8120                                 .type = RTE_FLOW_ITEM_TYPE_END,
8121                         },
8122                 };
8123                 struct rte_flow_action actions[] = {
8124                         [0] = {
8125                                 .type = (enum rte_flow_action_type)
8126                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8127                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8128                                         .src = REG_C_1,
8129                                         .dst = idx,
8130                                 },
8131                         },
8132                         [1] = {
8133                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8134                                 .conf = &(struct rte_flow_action_jump){
8135                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8136                                 },
8137                         },
8138                         [2] = {
8139                                 .type = RTE_FLOW_ACTION_TYPE_END,
8140                         },
8141                 };
8142                 uint32_t flow_idx;
8143                 struct rte_flow *flow;
8144                 struct rte_flow_error error;
8145
8146                 if (!config->dv_flow_en)
8147                         break;
8148                 /* Create internal flow, validation skips copy action. */
8149                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8150                                         items, actions, false, &error);
8151                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8152                                       flow_idx);
8153                 if (!flow)
8154                         continue;
8155                 config->flow_mreg_c[n++] = idx;
8156                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8157         }
8158         for (; n < MLX5_MREG_C_NUM; ++n)
8159                 config->flow_mreg_c[n] = REG_NON;
8160         return 0;
8161 }
8162
8163 int
8164 save_dump_file(const uint8_t *data, uint32_t size,
8165         uint32_t type, uint32_t id, void *arg, FILE *file)
8166 {
8167         char line[BUF_SIZE];
8168         uint32_t out = 0;
8169         uint32_t k;
8170         uint32_t actions_num;
8171         struct rte_flow_query_count *count;
8172
8173         memset(line, 0, BUF_SIZE);
8174         switch (type) {
8175         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8176                 actions_num = *(uint32_t *)(arg);
8177                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8178                                 type, id, actions_num);
8179                 break;
8180         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8181                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8182                                 type, id);
8183                 break;
8184         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8185                 count = (struct rte_flow_query_count *)arg;
8186                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8187                                 id, count->hits, count->bytes);
8188                 return 0;
8189         default:
8190                 return -1;
8191         }
8192
8193         for (k = 0; k < size; k++) {
8194                 /* Make sure we do not overrun the line buffer length. */
8195                 if (out >= BUF_SIZE - 4) {
8196                         line[out] = '\0';
8197                         break;
8198                 }
8199                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8200                                 (data[k]) & 0xff);
8201         }
8202         fprintf(file, "%s\n", line);
8203         return 0;
8204 }
8205
8206 int
8207 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8208         struct rte_flow_query_count *count, struct rte_flow_error *error)
8209 {
8210         struct rte_flow_action action[2];
8211         enum mlx5_flow_drv_type ftype;
8212         const struct mlx5_flow_driver_ops *fops;
8213
8214         if (!flow) {
8215                 return rte_flow_error_set(error, ENOENT,
8216                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8217                                 NULL,
8218                                 "invalid flow handle");
8219         }
8220         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8221         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8222         if (flow->counter) {
8223                 memset(count, 0, sizeof(struct rte_flow_query_count));
8224                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8225                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8226                                                 ftype < MLX5_FLOW_TYPE_MAX);
8227                 fops = flow_get_drv_ops(ftype);
8228                 return fops->query(dev, flow, action, count, error);
8229         }
8230         return -1;
8231 }
8232
8233 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8234 /**
8235  * Dump flow ipool data to file
8236  *
8237  * @param[in] dev
8238  *   The pointer to Ethernet device.
8239  * @param[in] file
8240  *   A pointer to a file for output.
8241  * @param[out] error
8242  *   Perform verbose error reporting if not NULL. PMDs initialize this
8243  *   structure in case of error only.
8244  * @return
8245  *   0 on success, a negative value otherwise.
8246  */
8247 int
8248 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8249         struct rte_flow *flow, FILE *file,
8250         struct rte_flow_error *error)
8251 {
8252         struct mlx5_priv *priv = dev->data->dev_private;
8253         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8254         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8255         uint32_t handle_idx;
8256         struct mlx5_flow_handle *dh;
8257         struct rte_flow_query_count count;
8258         uint32_t actions_num;
8259         const uint8_t *data;
8260         size_t size;
8261         uint32_t id;
8262         uint32_t type;
8263
8264         if (!flow) {
8265                 return rte_flow_error_set(error, ENOENT,
8266                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8267                         NULL,
8268                         "invalid flow handle");
8269         }
8270         handle_idx = flow->dev_handles;
8271         while (handle_idx) {
8272                 dh = mlx5_ipool_get(priv->sh->ipool
8273                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8274                 if (!dh)
8275                         continue;
8276                 handle_idx = dh->next.next;
8277                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8278
8279                 /* query counter */
8280                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8281                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8282                         save_dump_file(NULL, 0, type,
8283                                         id, (void *)&count, file);
8284
8285                 /* Get modify_hdr and encap_decap buf from ipools. */
8286                 encap_decap = NULL;
8287                 modify_hdr = dh->dvh.modify_hdr;
8288
8289                 if (dh->dvh.rix_encap_decap) {
8290                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8291                                                 [MLX5_IPOOL_DECAP_ENCAP],
8292                                                 dh->dvh.rix_encap_decap);
8293                 }
8294                 if (modify_hdr) {
8295                         data = (const uint8_t *)modify_hdr->actions;
8296                         size = (size_t)(modify_hdr->actions_num) * 8;
8297                         actions_num = modify_hdr->actions_num;
8298                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8299                         save_dump_file(data, size, type, id,
8300                                         (void *)(&actions_num), file);
8301                 }
8302                 if (encap_decap) {
8303                         data = encap_decap->buf;
8304                         size = encap_decap->size;
8305                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8306                         save_dump_file(data, size, type,
8307                                                 id, NULL, file);
8308                 }
8309         }
8310         return 0;
8311 }
8312 #endif
8313
8314 /**
8315  * Dump flow raw hw data to file
8316  *
8317  * @param[in] dev
8318  *    The pointer to Ethernet device.
8319  * @param[in] file
8320  *   A pointer to a file for output.
8321  * @param[out] error
8322  *   Perform verbose error reporting if not NULL. PMDs initialize this
8323  *   structure in case of error only.
8324  * @return
8325  *   0 on success, a nagative value otherwise.
8326  */
8327 int
8328 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8329                    FILE *file,
8330                    struct rte_flow_error *error __rte_unused)
8331 {
8332         struct mlx5_priv *priv = dev->data->dev_private;
8333         struct mlx5_dev_ctx_shared *sh = priv->sh;
8334         uint32_t handle_idx;
8335         int ret;
8336         struct mlx5_flow_handle *dh;
8337         struct rte_flow *flow;
8338 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8339         uint32_t idx;
8340 #endif
8341
8342         if (!priv->config.dv_flow_en) {
8343                 if (fputs("device dv flow disabled\n", file) <= 0)
8344                         return -errno;
8345                 return -ENOTSUP;
8346         }
8347
8348         /* dump all */
8349         if (!flow_idx) {
8350 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8351                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8352                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8353 #endif
8354                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8355                                         sh->rx_domain,
8356                                         sh->tx_domain, file);
8357         }
8358         /* dump one */
8359         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8360                         (uintptr_t)(void *)flow_idx);
8361         if (!flow)
8362                 return -ENOENT;
8363
8364 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8365         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8366 #endif
8367         handle_idx = flow->dev_handles;
8368         while (handle_idx) {
8369                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8370                                 handle_idx);
8371                 if (!dh)
8372                         return -ENOENT;
8373                 if (dh->drv_flow) {
8374                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8375                                         file);
8376                         if (ret)
8377                                 return -ENOENT;
8378                 }
8379                 handle_idx = dh->next.next;
8380         }
8381         return 0;
8382 }
8383
8384 /**
8385  * Get aged-out flows.
8386  *
8387  * @param[in] dev
8388  *   Pointer to the Ethernet device structure.
8389  * @param[in] context
8390  *   The address of an array of pointers to the aged-out flows contexts.
8391  * @param[in] nb_countexts
8392  *   The length of context array pointers.
8393  * @param[out] error
8394  *   Perform verbose error reporting if not NULL. Initialized in case of
8395  *   error only.
8396  *
8397  * @return
8398  *   how many contexts get in success, otherwise negative errno value.
8399  *   if nb_contexts is 0, return the amount of all aged contexts.
8400  *   if nb_contexts is not 0 , return the amount of aged flows reported
8401  *   in the context array.
8402  */
8403 int
8404 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8405                         uint32_t nb_contexts, struct rte_flow_error *error)
8406 {
8407         const struct mlx5_flow_driver_ops *fops;
8408         struct rte_flow_attr attr = { .transfer = 0 };
8409
8410         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8411                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8412                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8413                                                     error);
8414         }
8415         DRV_LOG(ERR,
8416                 "port %u get aged flows is not supported.",
8417                  dev->data->port_id);
8418         return -ENOTSUP;
8419 }
8420
8421 /* Wrapper for driver action_validate op callback */
8422 static int
8423 flow_drv_action_validate(struct rte_eth_dev *dev,
8424                          const struct rte_flow_indir_action_conf *conf,
8425                          const struct rte_flow_action *action,
8426                          const struct mlx5_flow_driver_ops *fops,
8427                          struct rte_flow_error *error)
8428 {
8429         static const char err_msg[] = "indirect action validation unsupported";
8430
8431         if (!fops->action_validate) {
8432                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8433                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8434                                    NULL, err_msg);
8435                 return -rte_errno;
8436         }
8437         return fops->action_validate(dev, conf, action, error);
8438 }
8439
8440 /**
8441  * Destroys the shared action by handle.
8442  *
8443  * @param dev
8444  *   Pointer to Ethernet device structure.
8445  * @param[in] handle
8446  *   Handle for the indirect action object to be destroyed.
8447  * @param[out] error
8448  *   Perform verbose error reporting if not NULL. PMDs initialize this
8449  *   structure in case of error only.
8450  *
8451  * @return
8452  *   0 on success, a negative errno value otherwise and rte_errno is set.
8453  *
8454  * @note: wrapper for driver action_create op callback.
8455  */
8456 static int
8457 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8458                            struct rte_flow_action_handle *handle,
8459                            struct rte_flow_error *error)
8460 {
8461         static const char err_msg[] = "indirect action destruction unsupported";
8462         struct rte_flow_attr attr = { .transfer = 0 };
8463         const struct mlx5_flow_driver_ops *fops =
8464                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8465
8466         if (!fops->action_destroy) {
8467                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8468                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8469                                    NULL, err_msg);
8470                 return -rte_errno;
8471         }
8472         return fops->action_destroy(dev, handle, error);
8473 }
8474
8475 /* Wrapper for driver action_destroy op callback */
8476 static int
8477 flow_drv_action_update(struct rte_eth_dev *dev,
8478                        struct rte_flow_action_handle *handle,
8479                        const void *update,
8480                        const struct mlx5_flow_driver_ops *fops,
8481                        struct rte_flow_error *error)
8482 {
8483         static const char err_msg[] = "indirect action update unsupported";
8484
8485         if (!fops->action_update) {
8486                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8487                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8488                                    NULL, err_msg);
8489                 return -rte_errno;
8490         }
8491         return fops->action_update(dev, handle, update, error);
8492 }
8493
8494 /* Wrapper for driver action_destroy op callback */
8495 static int
8496 flow_drv_action_query(struct rte_eth_dev *dev,
8497                       const struct rte_flow_action_handle *handle,
8498                       void *data,
8499                       const struct mlx5_flow_driver_ops *fops,
8500                       struct rte_flow_error *error)
8501 {
8502         static const char err_msg[] = "indirect action query unsupported";
8503
8504         if (!fops->action_query) {
8505                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8506                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8507                                    NULL, err_msg);
8508                 return -rte_errno;
8509         }
8510         return fops->action_query(dev, handle, data, error);
8511 }
8512
8513 /**
8514  * Create indirect action for reuse in multiple flow rules.
8515  *
8516  * @param dev
8517  *   Pointer to Ethernet device structure.
8518  * @param conf
8519  *   Pointer to indirect action object configuration.
8520  * @param[in] action
8521  *   Action configuration for indirect action object creation.
8522  * @param[out] error
8523  *   Perform verbose error reporting if not NULL. PMDs initialize this
8524  *   structure in case of error only.
8525  * @return
8526  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8527  */
8528 static struct rte_flow_action_handle *
8529 mlx5_action_handle_create(struct rte_eth_dev *dev,
8530                           const struct rte_flow_indir_action_conf *conf,
8531                           const struct rte_flow_action *action,
8532                           struct rte_flow_error *error)
8533 {
8534         static const char err_msg[] = "indirect action creation unsupported";
8535         struct rte_flow_attr attr = { .transfer = 0 };
8536         const struct mlx5_flow_driver_ops *fops =
8537                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8538
8539         if (flow_drv_action_validate(dev, conf, action, fops, error))
8540                 return NULL;
8541         if (!fops->action_create) {
8542                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8543                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8544                                    NULL, err_msg);
8545                 return NULL;
8546         }
8547         return fops->action_create(dev, conf, action, error);
8548 }
8549
8550 /**
8551  * Updates inplace the indirect action configuration pointed by *handle*
8552  * with the configuration provided as *update* argument.
8553  * The update of the indirect action configuration effects all flow rules
8554  * reusing the action via handle.
8555  *
8556  * @param dev
8557  *   Pointer to Ethernet device structure.
8558  * @param[in] handle
8559  *   Handle for the indirect action to be updated.
8560  * @param[in] update
8561  *   Action specification used to modify the action pointed by handle.
8562  *   *update* could be of same type with the action pointed by the *handle*
8563  *   handle argument, or some other structures like a wrapper, depending on
8564  *   the indirect action type.
8565  * @param[out] error
8566  *   Perform verbose error reporting if not NULL. PMDs initialize this
8567  *   structure in case of error only.
8568  *
8569  * @return
8570  *   0 on success, a negative errno value otherwise and rte_errno is set.
8571  */
8572 static int
8573 mlx5_action_handle_update(struct rte_eth_dev *dev,
8574                 struct rte_flow_action_handle *handle,
8575                 const void *update,
8576                 struct rte_flow_error *error)
8577 {
8578         struct rte_flow_attr attr = { .transfer = 0 };
8579         const struct mlx5_flow_driver_ops *fops =
8580                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8581         int ret;
8582
8583         ret = flow_drv_action_validate(dev, NULL,
8584                         (const struct rte_flow_action *)update, fops, error);
8585         if (ret)
8586                 return ret;
8587         return flow_drv_action_update(dev, handle, update, fops,
8588                                       error);
8589 }
8590
8591 /**
8592  * Query the indirect action by handle.
8593  *
8594  * This function allows retrieving action-specific data such as counters.
8595  * Data is gathered by special action which may be present/referenced in
8596  * more than one flow rule definition.
8597  *
8598  * see @RTE_FLOW_ACTION_TYPE_COUNT
8599  *
8600  * @param dev
8601  *   Pointer to Ethernet device structure.
8602  * @param[in] handle
8603  *   Handle for the indirect action to query.
8604  * @param[in, out] data
8605  *   Pointer to storage for the associated query data type.
8606  * @param[out] error
8607  *   Perform verbose error reporting if not NULL. PMDs initialize this
8608  *   structure in case of error only.
8609  *
8610  * @return
8611  *   0 on success, a negative errno value otherwise and rte_errno is set.
8612  */
8613 static int
8614 mlx5_action_handle_query(struct rte_eth_dev *dev,
8615                          const struct rte_flow_action_handle *handle,
8616                          void *data,
8617                          struct rte_flow_error *error)
8618 {
8619         struct rte_flow_attr attr = { .transfer = 0 };
8620         const struct mlx5_flow_driver_ops *fops =
8621                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8622
8623         return flow_drv_action_query(dev, handle, data, fops, error);
8624 }
8625
8626 /**
8627  * Destroy all indirect actions (shared RSS).
8628  *
8629  * @param dev
8630  *   Pointer to Ethernet device.
8631  *
8632  * @return
8633  *   0 on success, a negative errno value otherwise and rte_errno is set.
8634  */
8635 int
8636 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8637 {
8638         struct rte_flow_error error;
8639         struct mlx5_priv *priv = dev->data->dev_private;
8640         struct mlx5_shared_action_rss *shared_rss;
8641         int ret = 0;
8642         uint32_t idx;
8643
8644         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8645                       priv->rss_shared_actions, idx, shared_rss, next) {
8646                 ret |= mlx5_action_handle_destroy(dev,
8647                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8648         }
8649         return ret;
8650 }
8651
8652 #ifndef HAVE_MLX5DV_DR
8653 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8654 #else
8655 #define MLX5_DOMAIN_SYNC_FLOW \
8656         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8657 #endif
8658
8659 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8660 {
8661         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8662         const struct mlx5_flow_driver_ops *fops;
8663         int ret;
8664         struct rte_flow_attr attr = { .transfer = 0 };
8665
8666         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8667         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8668         if (ret > 0)
8669                 ret = -ret;
8670         return ret;
8671 }
8672
8673 const struct mlx5_flow_tunnel *
8674 mlx5_get_tof(const struct rte_flow_item *item,
8675              const struct rte_flow_action *action,
8676              enum mlx5_tof_rule_type *rule_type)
8677 {
8678         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8679                 if (item->type == (typeof(item->type))
8680                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8681                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8682                         return flow_items_to_tunnel(item);
8683                 }
8684         }
8685         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8686                 if (action->type == (typeof(action->type))
8687                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8688                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8689                         return flow_actions_to_tunnel(action);
8690                 }
8691         }
8692         return NULL;
8693 }
8694
8695 /**
8696  * tunnel offload functionalilty is defined for DV environment only
8697  */
8698 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8699 __extension__
8700 union tunnel_offload_mark {
8701         uint32_t val;
8702         struct {
8703                 uint32_t app_reserve:8;
8704                 uint32_t table_id:15;
8705                 uint32_t transfer:1;
8706                 uint32_t _unused_:8;
8707         };
8708 };
8709
8710 static bool
8711 mlx5_access_tunnel_offload_db
8712         (struct rte_eth_dev *dev,
8713          bool (*match)(struct rte_eth_dev *,
8714                        struct mlx5_flow_tunnel *, const void *),
8715          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8716          void (*miss)(struct rte_eth_dev *, void *),
8717          void *ctx, bool lock_op);
8718
8719 static int
8720 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8721                              struct rte_flow *flow,
8722                              const struct rte_flow_attr *attr,
8723                              const struct rte_flow_action *app_actions,
8724                              uint32_t flow_idx,
8725                              const struct mlx5_flow_tunnel *tunnel,
8726                              struct tunnel_default_miss_ctx *ctx,
8727                              struct rte_flow_error *error)
8728 {
8729         struct mlx5_priv *priv = dev->data->dev_private;
8730         struct mlx5_flow *dev_flow;
8731         struct rte_flow_attr miss_attr = *attr;
8732         const struct rte_flow_item miss_items[2] = {
8733                 {
8734                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8735                         .spec = NULL,
8736                         .last = NULL,
8737                         .mask = NULL
8738                 },
8739                 {
8740                         .type = RTE_FLOW_ITEM_TYPE_END,
8741                         .spec = NULL,
8742                         .last = NULL,
8743                         .mask = NULL
8744                 }
8745         };
8746         union tunnel_offload_mark mark_id;
8747         struct rte_flow_action_mark miss_mark;
8748         struct rte_flow_action miss_actions[3] = {
8749                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8750                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8751         };
8752         const struct rte_flow_action_jump *jump_data;
8753         uint32_t i, flow_table = 0; /* prevent compilation warning */
8754         struct flow_grp_info grp_info = {
8755                 .external = 1,
8756                 .transfer = attr->transfer,
8757                 .fdb_def_rule = !!priv->fdb_def_rule,
8758                 .std_tbl_fix = 0,
8759         };
8760         int ret;
8761
8762         if (!attr->transfer) {
8763                 uint32_t q_size;
8764
8765                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8766                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8767                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8768                                          0, SOCKET_ID_ANY);
8769                 if (!ctx->queue)
8770                         return rte_flow_error_set
8771                                 (error, ENOMEM,
8772                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8773                                 NULL, "invalid default miss RSS");
8774                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8775                 ctx->action_rss.level = 0,
8776                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8777                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8778                 ctx->action_rss.queue_num = priv->reta_idx_n,
8779                 ctx->action_rss.key = priv->rss_conf.rss_key,
8780                 ctx->action_rss.queue = ctx->queue;
8781                 if (!priv->reta_idx_n || !priv->rxqs_n)
8782                         return rte_flow_error_set
8783                                 (error, EINVAL,
8784                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8785                                 NULL, "invalid port configuration");
8786                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8787                         ctx->action_rss.types = 0;
8788                 for (i = 0; i != priv->reta_idx_n; ++i)
8789                         ctx->queue[i] = (*priv->reta_idx)[i];
8790         } else {
8791                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8792                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8793         }
8794         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8795         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8796         jump_data = app_actions->conf;
8797         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8798         miss_attr.group = jump_data->group;
8799         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8800                                        &flow_table, &grp_info, error);
8801         if (ret)
8802                 return rte_flow_error_set(error, EINVAL,
8803                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8804                                           NULL, "invalid tunnel id");
8805         mark_id.app_reserve = 0;
8806         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8807         mark_id.transfer = !!attr->transfer;
8808         mark_id._unused_ = 0;
8809         miss_mark.id = mark_id.val;
8810         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8811                                     miss_items, miss_actions, flow_idx, error);
8812         if (!dev_flow)
8813                 return -rte_errno;
8814         dev_flow->flow = flow;
8815         dev_flow->external = true;
8816         dev_flow->tunnel = tunnel;
8817         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8818         /* Subflow object was created, we must include one in the list. */
8819         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8820                       dev_flow->handle, next);
8821         DRV_LOG(DEBUG,
8822                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8823                 dev->data->port_id, tunnel->app_tunnel.type,
8824                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8825         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8826                                   miss_actions, error);
8827         if (!ret)
8828                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8829                                                   error);
8830
8831         return ret;
8832 }
8833
8834 static const struct mlx5_flow_tbl_data_entry  *
8835 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8836 {
8837         struct mlx5_priv *priv = dev->data->dev_private;
8838         struct mlx5_dev_ctx_shared *sh = priv->sh;
8839         struct mlx5_list_entry *he;
8840         union tunnel_offload_mark mbits = { .val = mark };
8841         union mlx5_flow_tbl_key table_key = {
8842                 {
8843                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8844                         .id = 0,
8845                         .reserved = 0,
8846                         .dummy = 0,
8847                         .is_fdb = !!mbits.transfer,
8848                         .is_egress = 0,
8849                 }
8850         };
8851         struct mlx5_flow_cb_ctx ctx = {
8852                 .data = &table_key.v64,
8853         };
8854
8855         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8856         return he ?
8857                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8858 }
8859
8860 static void
8861 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8862                                    struct mlx5_list_entry *entry)
8863 {
8864         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8865         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8866
8867         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8868                         tunnel_flow_tbl_to_id(tte->flow_table));
8869         mlx5_free(tte);
8870 }
8871
8872 static int
8873 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8874                                   struct mlx5_list_entry *entry, void *cb_ctx)
8875 {
8876         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8877         union tunnel_tbl_key tbl = {
8878                 .val = *(uint64_t *)(ctx->data),
8879         };
8880         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8881
8882         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8883 }
8884
8885 static struct mlx5_list_entry *
8886 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8887 {
8888         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8889         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8890         struct tunnel_tbl_entry *tte;
8891         union tunnel_tbl_key tbl = {
8892                 .val = *(uint64_t *)(ctx->data),
8893         };
8894
8895         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8896                           sizeof(*tte), 0,
8897                           SOCKET_ID_ANY);
8898         if (!tte)
8899                 goto err;
8900         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8901                           &tte->flow_table);
8902         if (tte->flow_table >= MLX5_MAX_TABLES) {
8903                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8904                         tte->flow_table);
8905                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8906                                 tte->flow_table);
8907                 goto err;
8908         } else if (!tte->flow_table) {
8909                 goto err;
8910         }
8911         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8912         tte->tunnel_id = tbl.tunnel_id;
8913         tte->group = tbl.group;
8914         return &tte->hash;
8915 err:
8916         if (tte)
8917                 mlx5_free(tte);
8918         return NULL;
8919 }
8920
8921 static struct mlx5_list_entry *
8922 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8923                                   struct mlx5_list_entry *oentry,
8924                                   void *cb_ctx __rte_unused)
8925 {
8926         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8927                                                    0, SOCKET_ID_ANY);
8928
8929         if (!tte)
8930                 return NULL;
8931         memcpy(tte, oentry, sizeof(*tte));
8932         return &tte->hash;
8933 }
8934
8935 static void
8936 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8937                                        struct mlx5_list_entry *entry)
8938 {
8939         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8940
8941         mlx5_free(tte);
8942 }
8943
8944 static uint32_t
8945 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8946                                 const struct mlx5_flow_tunnel *tunnel,
8947                                 uint32_t group, uint32_t *table,
8948                                 struct rte_flow_error *error)
8949 {
8950         struct mlx5_list_entry *he;
8951         struct tunnel_tbl_entry *tte;
8952         union tunnel_tbl_key key = {
8953                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8954                 .group = group
8955         };
8956         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8957         struct mlx5_hlist *group_hash;
8958         struct mlx5_flow_cb_ctx ctx = {
8959                 .data = &key.val,
8960         };
8961
8962         group_hash = tunnel ? tunnel->groups : thub->groups;
8963         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8964         if (!he)
8965                 return rte_flow_error_set(error, EINVAL,
8966                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8967                                           NULL,
8968                                           "tunnel group index not supported");
8969         tte = container_of(he, typeof(*tte), hash);
8970         *table = tte->flow_table;
8971         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8972                 dev->data->port_id, key.tunnel_id, group, *table);
8973         return 0;
8974 }
8975
8976 static void
8977 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8978                       struct mlx5_flow_tunnel *tunnel)
8979 {
8980         struct mlx5_priv *priv = dev->data->dev_private;
8981         struct mlx5_indexed_pool *ipool;
8982
8983         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8984                 dev->data->port_id, tunnel->tunnel_id);
8985         LIST_REMOVE(tunnel, chain);
8986         mlx5_hlist_destroy(tunnel->groups);
8987         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8988         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8989 }
8990
8991 static bool
8992 mlx5_access_tunnel_offload_db
8993         (struct rte_eth_dev *dev,
8994          bool (*match)(struct rte_eth_dev *,
8995                        struct mlx5_flow_tunnel *, const void *),
8996          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8997          void (*miss)(struct rte_eth_dev *, void *),
8998          void *ctx, bool lock_op)
8999 {
9000         bool verdict = false;
9001         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9002         struct mlx5_flow_tunnel *tunnel;
9003
9004         rte_spinlock_lock(&thub->sl);
9005         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9006                 verdict = match(dev, tunnel, (const void *)ctx);
9007                 if (verdict)
9008                         break;
9009         }
9010         if (!lock_op)
9011                 rte_spinlock_unlock(&thub->sl);
9012         if (verdict && hit)
9013                 hit(dev, tunnel, ctx);
9014         if (!verdict && miss)
9015                 miss(dev, ctx);
9016         if (lock_op)
9017                 rte_spinlock_unlock(&thub->sl);
9018
9019         return verdict;
9020 }
9021
9022 struct tunnel_db_find_tunnel_id_ctx {
9023         uint32_t tunnel_id;
9024         struct mlx5_flow_tunnel *tunnel;
9025 };
9026
9027 static bool
9028 find_tunnel_id_match(struct rte_eth_dev *dev,
9029                      struct mlx5_flow_tunnel *tunnel, const void *x)
9030 {
9031         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9032
9033         RTE_SET_USED(dev);
9034         return tunnel->tunnel_id == ctx->tunnel_id;
9035 }
9036
9037 static void
9038 find_tunnel_id_hit(struct rte_eth_dev *dev,
9039                    struct mlx5_flow_tunnel *tunnel, void *x)
9040 {
9041         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9042         RTE_SET_USED(dev);
9043         ctx->tunnel = tunnel;
9044 }
9045
9046 static struct mlx5_flow_tunnel *
9047 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9048 {
9049         struct tunnel_db_find_tunnel_id_ctx ctx = {
9050                 .tunnel_id = id,
9051         };
9052
9053         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9054                                       find_tunnel_id_hit, NULL, &ctx, true);
9055
9056         return ctx.tunnel;
9057 }
9058
9059 static struct mlx5_flow_tunnel *
9060 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9061                           const struct rte_flow_tunnel *app_tunnel)
9062 {
9063         struct mlx5_priv *priv = dev->data->dev_private;
9064         struct mlx5_indexed_pool *ipool;
9065         struct mlx5_flow_tunnel *tunnel;
9066         uint32_t id;
9067
9068         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9069         tunnel = mlx5_ipool_zmalloc(ipool, &id);
9070         if (!tunnel)
9071                 return NULL;
9072         if (id >= MLX5_MAX_TUNNELS) {
9073                 mlx5_ipool_free(ipool, id);
9074                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9075                 return NULL;
9076         }
9077         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9078                                            priv->sh,
9079                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9080                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9081                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9082                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9083                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9084         if (!tunnel->groups) {
9085                 mlx5_ipool_free(ipool, id);
9086                 return NULL;
9087         }
9088         /* initiate new PMD tunnel */
9089         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9090         tunnel->tunnel_id = id;
9091         tunnel->action.type = (typeof(tunnel->action.type))
9092                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9093         tunnel->action.conf = tunnel;
9094         tunnel->item.type = (typeof(tunnel->item.type))
9095                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9096         tunnel->item.spec = tunnel;
9097         tunnel->item.last = NULL;
9098         tunnel->item.mask = NULL;
9099
9100         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9101                 dev->data->port_id, tunnel->tunnel_id);
9102
9103         return tunnel;
9104 }
9105
9106 struct tunnel_db_get_tunnel_ctx {
9107         const struct rte_flow_tunnel *app_tunnel;
9108         struct mlx5_flow_tunnel *tunnel;
9109 };
9110
9111 static bool get_tunnel_match(struct rte_eth_dev *dev,
9112                              struct mlx5_flow_tunnel *tunnel, const void *x)
9113 {
9114         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9115
9116         RTE_SET_USED(dev);
9117         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9118                        sizeof(*ctx->app_tunnel));
9119 }
9120
9121 static void get_tunnel_hit(struct rte_eth_dev *dev,
9122                            struct mlx5_flow_tunnel *tunnel, void *x)
9123 {
9124         /* called under tunnel spinlock protection */
9125         struct tunnel_db_get_tunnel_ctx *ctx = x;
9126
9127         RTE_SET_USED(dev);
9128         tunnel->refctn++;
9129         ctx->tunnel = tunnel;
9130 }
9131
9132 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9133 {
9134         /* called under tunnel spinlock protection */
9135         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9136         struct tunnel_db_get_tunnel_ctx *ctx = x;
9137
9138         rte_spinlock_unlock(&thub->sl);
9139         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9140         rte_spinlock_lock(&thub->sl);
9141         if (ctx->tunnel) {
9142                 ctx->tunnel->refctn = 1;
9143                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9144         }
9145 }
9146
9147
9148 static int
9149 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9150                      const struct rte_flow_tunnel *app_tunnel,
9151                      struct mlx5_flow_tunnel **tunnel)
9152 {
9153         struct tunnel_db_get_tunnel_ctx ctx = {
9154                 .app_tunnel = app_tunnel,
9155         };
9156
9157         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9158                                       get_tunnel_miss, &ctx, true);
9159         *tunnel = ctx.tunnel;
9160         return ctx.tunnel ? 0 : -ENOMEM;
9161 }
9162
9163 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9164 {
9165         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9166
9167         if (!thub)
9168                 return;
9169         if (!LIST_EMPTY(&thub->tunnels))
9170                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9171         mlx5_hlist_destroy(thub->groups);
9172         mlx5_free(thub);
9173 }
9174
9175 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9176 {
9177         int err;
9178         struct mlx5_flow_tunnel_hub *thub;
9179
9180         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9181                            0, SOCKET_ID_ANY);
9182         if (!thub)
9183                 return -ENOMEM;
9184         LIST_INIT(&thub->tunnels);
9185         rte_spinlock_init(&thub->sl);
9186         thub->groups = mlx5_hlist_create("flow groups", 64,
9187                                          false, true, sh,
9188                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9189                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9190                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9191                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9192                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9193         if (!thub->groups) {
9194                 err = -rte_errno;
9195                 goto err;
9196         }
9197         sh->tunnel_hub = thub;
9198
9199         return 0;
9200
9201 err:
9202         if (thub->groups)
9203                 mlx5_hlist_destroy(thub->groups);
9204         if (thub)
9205                 mlx5_free(thub);
9206         return err;
9207 }
9208
9209 static inline bool
9210 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9211                           struct rte_flow_tunnel *tunnel,
9212                           const char *err_msg)
9213 {
9214         err_msg = NULL;
9215         if (!is_tunnel_offload_active(dev)) {
9216                 err_msg = "tunnel offload was not activated";
9217                 goto out;
9218         } else if (!tunnel) {
9219                 err_msg = "no application tunnel";
9220                 goto out;
9221         }
9222
9223         switch (tunnel->type) {
9224         default:
9225                 err_msg = "unsupported tunnel type";
9226                 goto out;
9227         case RTE_FLOW_ITEM_TYPE_VXLAN:
9228         case RTE_FLOW_ITEM_TYPE_GRE:
9229         case RTE_FLOW_ITEM_TYPE_NVGRE:
9230         case RTE_FLOW_ITEM_TYPE_GENEVE:
9231                 break;
9232         }
9233
9234 out:
9235         return !err_msg;
9236 }
9237
9238 static int
9239 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9240                     struct rte_flow_tunnel *app_tunnel,
9241                     struct rte_flow_action **actions,
9242                     uint32_t *num_of_actions,
9243                     struct rte_flow_error *error)
9244 {
9245         int ret;
9246         struct mlx5_flow_tunnel *tunnel;
9247         const char *err_msg = NULL;
9248         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9249
9250         if (!verdict)
9251                 return rte_flow_error_set(error, EINVAL,
9252                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9253                                           err_msg);
9254         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9255         if (ret < 0) {
9256                 return rte_flow_error_set(error, ret,
9257                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9258                                           "failed to initialize pmd tunnel");
9259         }
9260         *actions = &tunnel->action;
9261         *num_of_actions = 1;
9262         return 0;
9263 }
9264
9265 static int
9266 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9267                        struct rte_flow_tunnel *app_tunnel,
9268                        struct rte_flow_item **items,
9269                        uint32_t *num_of_items,
9270                        struct rte_flow_error *error)
9271 {
9272         int ret;
9273         struct mlx5_flow_tunnel *tunnel;
9274         const char *err_msg = NULL;
9275         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9276
9277         if (!verdict)
9278                 return rte_flow_error_set(error, EINVAL,
9279                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9280                                           err_msg);
9281         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9282         if (ret < 0) {
9283                 return rte_flow_error_set(error, ret,
9284                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9285                                           "failed to initialize pmd tunnel");
9286         }
9287         *items = &tunnel->item;
9288         *num_of_items = 1;
9289         return 0;
9290 }
9291
9292 struct tunnel_db_element_release_ctx {
9293         struct rte_flow_item *items;
9294         struct rte_flow_action *actions;
9295         uint32_t num_elements;
9296         struct rte_flow_error *error;
9297         int ret;
9298 };
9299
9300 static bool
9301 tunnel_element_release_match(struct rte_eth_dev *dev,
9302                              struct mlx5_flow_tunnel *tunnel, const void *x)
9303 {
9304         const struct tunnel_db_element_release_ctx *ctx = x;
9305
9306         RTE_SET_USED(dev);
9307         if (ctx->num_elements != 1)
9308                 return false;
9309         else if (ctx->items)
9310                 return ctx->items == &tunnel->item;
9311         else if (ctx->actions)
9312                 return ctx->actions == &tunnel->action;
9313
9314         return false;
9315 }
9316
9317 static void
9318 tunnel_element_release_hit(struct rte_eth_dev *dev,
9319                            struct mlx5_flow_tunnel *tunnel, void *x)
9320 {
9321         struct tunnel_db_element_release_ctx *ctx = x;
9322         ctx->ret = 0;
9323         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9324                 mlx5_flow_tunnel_free(dev, tunnel);
9325 }
9326
9327 static void
9328 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9329 {
9330         struct tunnel_db_element_release_ctx *ctx = x;
9331         RTE_SET_USED(dev);
9332         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9333                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9334                                       "invalid argument");
9335 }
9336
9337 static int
9338 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9339                        struct rte_flow_item *pmd_items,
9340                        uint32_t num_items, struct rte_flow_error *err)
9341 {
9342         struct tunnel_db_element_release_ctx ctx = {
9343                 .items = pmd_items,
9344                 .actions = NULL,
9345                 .num_elements = num_items,
9346                 .error = err,
9347         };
9348
9349         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9350                                       tunnel_element_release_hit,
9351                                       tunnel_element_release_miss, &ctx, false);
9352
9353         return ctx.ret;
9354 }
9355
9356 static int
9357 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9358                          struct rte_flow_action *pmd_actions,
9359                          uint32_t num_actions, struct rte_flow_error *err)
9360 {
9361         struct tunnel_db_element_release_ctx ctx = {
9362                 .items = NULL,
9363                 .actions = pmd_actions,
9364                 .num_elements = num_actions,
9365                 .error = err,
9366         };
9367
9368         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9369                                       tunnel_element_release_hit,
9370                                       tunnel_element_release_miss, &ctx, false);
9371
9372         return ctx.ret;
9373 }
9374
9375 static int
9376 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9377                                   struct rte_mbuf *m,
9378                                   struct rte_flow_restore_info *info,
9379                                   struct rte_flow_error *err)
9380 {
9381         uint64_t ol_flags = m->ol_flags;
9382         const struct mlx5_flow_tbl_data_entry *tble;
9383         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9384
9385         if (!is_tunnel_offload_active(dev)) {
9386                 info->flags = 0;
9387                 return 0;
9388         }
9389
9390         if ((ol_flags & mask) != mask)
9391                 goto err;
9392         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9393         if (!tble) {
9394                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9395                         dev->data->port_id, m->hash.fdir.hi);
9396                 goto err;
9397         }
9398         MLX5_ASSERT(tble->tunnel);
9399         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9400         info->group_id = tble->group_id;
9401         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9402                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9403                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9404
9405         return 0;
9406
9407 err:
9408         return rte_flow_error_set(err, EINVAL,
9409                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9410                                   "failed to get restore info");
9411 }
9412
9413 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9414 static int
9415 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9416                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9417                            __rte_unused struct rte_flow_action **actions,
9418                            __rte_unused uint32_t *num_of_actions,
9419                            __rte_unused struct rte_flow_error *error)
9420 {
9421         return -ENOTSUP;
9422 }
9423
9424 static int
9425 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9426                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9427                        __rte_unused struct rte_flow_item **items,
9428                        __rte_unused uint32_t *num_of_items,
9429                        __rte_unused struct rte_flow_error *error)
9430 {
9431         return -ENOTSUP;
9432 }
9433
9434 static int
9435 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9436                               __rte_unused struct rte_flow_item *pmd_items,
9437                               __rte_unused uint32_t num_items,
9438                               __rte_unused struct rte_flow_error *err)
9439 {
9440         return -ENOTSUP;
9441 }
9442
9443 static int
9444 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9445                                 __rte_unused struct rte_flow_action *pmd_action,
9446                                 __rte_unused uint32_t num_actions,
9447                                 __rte_unused struct rte_flow_error *err)
9448 {
9449         return -ENOTSUP;
9450 }
9451
9452 static int
9453 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9454                                   __rte_unused struct rte_mbuf *m,
9455                                   __rte_unused struct rte_flow_restore_info *i,
9456                                   __rte_unused struct rte_flow_error *err)
9457 {
9458         return -ENOTSUP;
9459 }
9460
9461 static int
9462 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9463                              __rte_unused struct rte_flow *flow,
9464                              __rte_unused const struct rte_flow_attr *attr,
9465                              __rte_unused const struct rte_flow_action *actions,
9466                              __rte_unused uint32_t flow_idx,
9467                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9468                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9469                              __rte_unused struct rte_flow_error *error)
9470 {
9471         return -ENOTSUP;
9472 }
9473
9474 static struct mlx5_flow_tunnel *
9475 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9476                     __rte_unused uint32_t id)
9477 {
9478         return NULL;
9479 }
9480
9481 static void
9482 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9483                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9484 {
9485 }
9486
9487 static uint32_t
9488 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9489                                 __rte_unused const struct mlx5_flow_tunnel *t,
9490                                 __rte_unused uint32_t group,
9491                                 __rte_unused uint32_t *table,
9492                                 struct rte_flow_error *error)
9493 {
9494         return rte_flow_error_set(error, ENOTSUP,
9495                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9496                                   "tunnel offload requires DV support");
9497 }
9498
9499 void
9500 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9501                         __rte_unused  uint16_t port_id)
9502 {
9503 }
9504 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9505
9506 static void
9507 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9508 {
9509         int ret;
9510         struct rte_flow_error error;
9511
9512         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9513                 char *item_name;
9514                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9515                                     sizeof(item_name),
9516                                     (void *)(uintptr_t)item->type, &error);
9517                 if (ret > 0)
9518                         printf("%s ", item_name);
9519                 else
9520                         printf("%d\n", (int)item->type);
9521         }
9522         printf("END\n");
9523 }
9524
9525 static int
9526 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9527 {
9528         const struct rte_flow_item_udp *spec = udp_item->spec;
9529         const struct rte_flow_item_udp *mask = udp_item->mask;
9530         uint16_t udp_dport = 0;
9531
9532         if (spec != NULL) {
9533                 if (!mask)
9534                         mask = &rte_flow_item_udp_mask;
9535                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9536                                 mask->hdr.dst_port);
9537         }
9538         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9539 }
9540
9541 static const struct mlx5_flow_expand_node *
9542 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9543                 unsigned int item_idx,
9544                 const struct mlx5_flow_expand_node graph[],
9545                 const struct mlx5_flow_expand_node *node)
9546 {
9547         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9548         switch (item->type) {
9549         case RTE_FLOW_ITEM_TYPE_VXLAN:
9550                 MLX5_ASSERT(item_idx > 0);
9551                 prev_item = pattern + item_idx - 1;
9552                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9553                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9554                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9555                 else
9556                         return &graph[MLX5_EXPANSION_L3_VXLAN];
9557                 break;
9558         default:
9559                 return node;
9560         }
9561 }