drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint8_t optional;
 104         /**< optional expand field. Default 0 to expand, 1 not go deeper. */
 105 };
 106
 107 /** Object returned by mlx5_flow_expand_rss(). */
 108 struct mlx5_flow_expand_rss {
 109         uint32_t entries;
 110         /**< Number of entries @p patterns and @p priorities. */
 111         struct {
 112                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 113                 uint32_t priority; /**< Priority offset for each expansion. */
 114         } entry[];
 115 };
 116
 117 static void
 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 119
 120 static bool
 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 122 {
 123         switch (item->type) {
 124         case RTE_FLOW_ITEM_TYPE_ETH:
 125         case RTE_FLOW_ITEM_TYPE_VLAN:
 126         case RTE_FLOW_ITEM_TYPE_IPV4:
 127         case RTE_FLOW_ITEM_TYPE_IPV6:
 128         case RTE_FLOW_ITEM_TYPE_UDP:
 129         case RTE_FLOW_ITEM_TYPE_TCP:
 130         case RTE_FLOW_ITEM_TYPE_VXLAN:
 131         case RTE_FLOW_ITEM_TYPE_NVGRE:
 132         case RTE_FLOW_ITEM_TYPE_GRE:
 133         case RTE_FLOW_ITEM_TYPE_GENEVE:
 134         case RTE_FLOW_ITEM_TYPE_MPLS:
 135         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 136         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 137         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 138                 return true;
 139         default:
 140                 break;
 141         }
 142         return false;
 143 }
 144
 145 static enum rte_flow_item_type
 146 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 147 {
 148         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 149         uint16_t ether_type = 0;
 150         uint16_t ether_type_m;
 151         uint8_t ip_next_proto = 0;
 152         uint8_t ip_next_proto_m;
 153
 154         if (item == NULL || item->spec == NULL)
 155                 return ret;
 156         switch (item->type) {
 157         case RTE_FLOW_ITEM_TYPE_ETH:
 158                 if (item->mask)
 159                         ether_type_m = ((const struct rte_flow_item_eth *)
 160                                                 (item->mask))->type;
 161                 else
 162                         ether_type_m = rte_flow_item_eth_mask.type;
 163                 if (ether_type_m != RTE_BE16(0xFFFF))
 164                         break;
 165                 ether_type = ((const struct rte_flow_item_eth *)
 166                                 (item->spec))->type;
 167                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 168                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 169                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 170                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 171                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 172                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 173                 else
 174                         ret = RTE_FLOW_ITEM_TYPE_END;
 175                 break;
 176         case RTE_FLOW_ITEM_TYPE_VLAN:
 177                 if (item->mask)
 178                         ether_type_m = ((const struct rte_flow_item_vlan *)
 179                                                 (item->mask))->inner_type;
 180                 else
 181                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 182                 if (ether_type_m != RTE_BE16(0xFFFF))
 183                         break;
 184                 ether_type = ((const struct rte_flow_item_vlan *)
 185                                 (item->spec))->inner_type;
 186                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 187                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 188                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 189                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 190                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 191                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 192                 else
 193                         ret = RTE_FLOW_ITEM_TYPE_END;
 194                 break;
 195         case RTE_FLOW_ITEM_TYPE_IPV4:
 196                 if (item->mask)
 197                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 198                                         (item->mask))->hdr.next_proto_id;
 199                 else
 200                         ip_next_proto_m =
 201                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 202                 if (ip_next_proto_m != 0xFF)
 203                         break;
 204                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 205                                 (item->spec))->hdr.next_proto_id;
 206                 if (ip_next_proto == IPPROTO_UDP)
 207                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 208                 else if (ip_next_proto == IPPROTO_TCP)
 209                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 210                 else if (ip_next_proto == IPPROTO_IP)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 212                 else if (ip_next_proto == IPPROTO_IPV6)
 213                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV6:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 220                                                 (item->mask))->hdr.proto;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv6_mask.hdr.proto;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 227                                 (item->spec))->hdr.proto;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         default:
 240                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 241                 break;
 242         }
 243         return ret;
 244 }
 245
 246 #define MLX5_RSS_EXP_ELT_N 16
 247
 248 /**
 249  * Expand RSS flows into several possible flows according to the RSS hash
 250  * fields requested and the driver capabilities.
 251  *
 252  * @param[out] buf
 253  *   Buffer to store the result expansion.
 254  * @param[in] size
 255  *   Buffer size in bytes. If 0, @p buf can be NULL.
 256  * @param[in] pattern
 257  *   User flow pattern.
 258  * @param[in] types
 259  *   RSS types to expand (see ETH_RSS_* definitions).
 260  * @param[in] graph
 261  *   Input graph to expand @p pattern according to @p types.
 262  * @param[in] graph_root_index
 263  *   Index of root node in @p graph, typically 0.
 264  *
 265  * @return
 266  *   A positive value representing the size of @p buf in bytes regardless of
 267  *   @p size on success, a negative errno value otherwise and rte_errno is
 268  *   set, the following errors are defined:
 269  *
 270  *   -E2BIG: graph-depth @p graph is too deep.
 271  *   -EINVAL: @p size has not enough space for expanded pattern.
 272  */
 273 static int
 274 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 275                      const struct rte_flow_item *pattern, uint64_t types,
 276                      const struct mlx5_flow_expand_node graph[],
 277                      int graph_root_index)
 278 {
 279         const struct rte_flow_item *item;
 280         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 281         const int *next_node;
 282         const int *stack[MLX5_RSS_EXP_ELT_N];
 283         int stack_pos = 0;
 284         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 285         unsigned int i;
 286         size_t lsize;
 287         size_t user_pattern_size = 0;
 288         void *addr = NULL;
 289         const struct mlx5_flow_expand_node *next = NULL;
 290         struct rte_flow_item missed_item;
 291         int missed = 0;
 292         int elt = 0;
 293         const struct rte_flow_item *last_item = NULL;
 294
 295         memset(&missed_item, 0, sizeof(missed_item));
 296         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 297                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 298         if (lsize > size)
 299                 return -EINVAL;
 300         buf->entry[0].priority = 0;
 301         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 302         buf->entries = 0;
 303         addr = buf->entry[0].pattern;
 304         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 305                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 306                         user_pattern_size += sizeof(*item);
 307                         continue;
 308                 }
 309                 last_item = item;
 310                 for (i = 0; node->next && node->next[i]; ++i) {
 311                         next = &graph[node->next[i]];
 312                         if (next->type == item->type)
 313                                 break;
 314                 }
 315                 if (next)
 316                         node = next;
 317                 user_pattern_size += sizeof(*item);
 318         }
 319         user_pattern_size += sizeof(*item); /* Handle END item. */
 320         lsize += user_pattern_size;
 321         if (lsize > size)
 322                 return -EINVAL;
 323         /* Copy the user pattern in the first entry of the buffer. */
 324         rte_memcpy(addr, pattern, user_pattern_size);
 325         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 326         buf->entries = 1;
 327         /* Start expanding. */
 328         memset(flow_items, 0, sizeof(flow_items));
 329         user_pattern_size -= sizeof(*item);
 330         /*
 331          * Check if the last valid item has spec set, need complete pattern,
 332          * and the pattern can be used for expansion.
 333          */
 334         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 335         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 336                 /* Item type END indicates expansion is not required. */
 337                 return lsize;
 338         }
 339         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 340                 next = NULL;
 341                 missed = 1;
 342                 for (i = 0; node->next && node->next[i]; ++i) {
 343                         next = &graph[node->next[i]];
 344                         if (next->type == missed_item.type) {
 345                                 flow_items[0].type = missed_item.type;
 346                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 347                                 break;
 348                         }
 349                         next = NULL;
 350                 }
 351         }
 352         if (next && missed) {
 353                 elt = 2; /* missed item + item end. */
 354                 node = next;
 355                 lsize += elt * sizeof(*item) + user_pattern_size;
 356                 if (lsize > size)
 357                         return -EINVAL;
 358                 if (node->rss_types & types) {
 359                         buf->entry[buf->entries].priority = 1;
 360                         buf->entry[buf->entries].pattern = addr;
 361                         buf->entries++;
 362                         rte_memcpy(addr, buf->entry[0].pattern,
 363                                    user_pattern_size);
 364                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 365                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 366                         addr = (void *)(((uintptr_t)addr) +
 367                                         elt * sizeof(*item));
 368                 }
 369         }
 370         memset(flow_items, 0, sizeof(flow_items));
 371         next_node = node->next;
 372         stack[stack_pos] = next_node;
 373         node = next_node ? &graph[*next_node] : NULL;
 374         while (node) {
 375                 flow_items[stack_pos].type = node->type;
 376                 if (node->rss_types & types) {
 377                         size_t n;
 378                         /*
 379                          * compute the number of items to copy from the
 380                          * expansion and copy it.
 381                          * When the stack_pos is 0, there are 1 element in it,
 382                          * plus the addition END item.
 383                          */
 384                         elt = stack_pos + 2;
 385                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 386                         lsize += elt * sizeof(*item) + user_pattern_size;
 387                         if (lsize > size)
 388                                 return -EINVAL;
 389                         n = elt * sizeof(*item);
 390                         buf->entry[buf->entries].priority =
 391                                 stack_pos + 1 + missed;
 392                         buf->entry[buf->entries].pattern = addr;
 393                         buf->entries++;
 394                         rte_memcpy(addr, buf->entry[0].pattern,
 395                                    user_pattern_size);
 396                         addr = (void *)(((uintptr_t)addr) +
 397                                         user_pattern_size);
 398                         rte_memcpy(addr, &missed_item,
 399                                    missed * sizeof(*item));
 400                         addr = (void *)(((uintptr_t)addr) +
 401                                 missed * sizeof(*item));
 402                         rte_memcpy(addr, flow_items, n);
 403                         addr = (void *)(((uintptr_t)addr) + n);
 404                 }
 405                 /* Go deeper. */
 406                 if (!node->optional && node->next) {
 407                         next_node = node->next;
 408                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 409                                 rte_errno = E2BIG;
 410                                 return -rte_errno;
 411                         }
 412                         stack[stack_pos] = next_node;
 413                 } else if (*(next_node + 1)) {
 414                         /* Follow up with the next possibility. */
 415                         ++next_node;
 416                 } else {
 417                         /* Move to the next path. */
 418                         if (stack_pos)
 419                                 next_node = stack[--stack_pos];
 420                         next_node++;
 421                         stack[stack_pos] = next_node;
 422                 }
 423                 node = *next_node ? &graph[*next_node] : NULL;
 424         };
 425         return lsize;
 426 }
 427
 428 enum mlx5_expansion {
 429         MLX5_EXPANSION_ROOT,
 430         MLX5_EXPANSION_ROOT_OUTER,
 431         MLX5_EXPANSION_ROOT_ETH_VLAN,
 432         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 433         MLX5_EXPANSION_OUTER_ETH,
 434         MLX5_EXPANSION_OUTER_ETH_VLAN,
 435         MLX5_EXPANSION_OUTER_VLAN,
 436         MLX5_EXPANSION_OUTER_IPV4,
 437         MLX5_EXPANSION_OUTER_IPV4_UDP,
 438         MLX5_EXPANSION_OUTER_IPV4_TCP,
 439         MLX5_EXPANSION_OUTER_IPV6,
 440         MLX5_EXPANSION_OUTER_IPV6_UDP,
 441         MLX5_EXPANSION_OUTER_IPV6_TCP,
 442         MLX5_EXPANSION_VXLAN,
 443         MLX5_EXPANSION_VXLAN_GPE,
 444         MLX5_EXPANSION_GRE,
 445         MLX5_EXPANSION_NVGRE,
 446         MLX5_EXPANSION_GRE_KEY,
 447         MLX5_EXPANSION_MPLS,
 448         MLX5_EXPANSION_ETH,
 449         MLX5_EXPANSION_ETH_VLAN,
 450         MLX5_EXPANSION_VLAN,
 451         MLX5_EXPANSION_IPV4,
 452         MLX5_EXPANSION_IPV4_UDP,
 453         MLX5_EXPANSION_IPV4_TCP,
 454         MLX5_EXPANSION_IPV6,
 455         MLX5_EXPANSION_IPV6_UDP,
 456         MLX5_EXPANSION_IPV6_TCP,
 457         MLX5_EXPANSION_IPV6_FRAG_EXT,
 458 };
 459
 460 /** Supported expansion of items. */
 461 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 462         [MLX5_EXPANSION_ROOT] = {
 463                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 464                                                   MLX5_EXPANSION_IPV4,
 465                                                   MLX5_EXPANSION_IPV6),
 466                 .type = RTE_FLOW_ITEM_TYPE_END,
 467         },
 468         [MLX5_EXPANSION_ROOT_OUTER] = {
 469                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 470                                                   MLX5_EXPANSION_OUTER_IPV4,
 471                                                   MLX5_EXPANSION_OUTER_IPV6),
 472                 .type = RTE_FLOW_ITEM_TYPE_END,
 473         },
 474         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 475                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 476                 .type = RTE_FLOW_ITEM_TYPE_END,
 477         },
 478         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 479                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 480                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 481                 .type = RTE_FLOW_ITEM_TYPE_END,
 482         },
 483         [MLX5_EXPANSION_OUTER_ETH] = {
 484                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 485                                                   MLX5_EXPANSION_OUTER_IPV6),
 486                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 487                 .rss_types = 0,
 488         },
 489         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 490                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 491                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 492                 .rss_types = 0,
 493         },
 494         [MLX5_EXPANSION_OUTER_VLAN] = {
 495                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 496                                                   MLX5_EXPANSION_OUTER_IPV6),
 497                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 498         },
 499         [MLX5_EXPANSION_OUTER_IPV4] = {
 500                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 501                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 502                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 503                          MLX5_EXPANSION_GRE,
 504                          MLX5_EXPANSION_NVGRE,
 505                          MLX5_EXPANSION_IPV4,
 506                          MLX5_EXPANSION_IPV6),
 507                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 508                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 509                         ETH_RSS_NONFRAG_IPV4_OTHER,
 510         },
 511         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 512                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 513                                                   MLX5_EXPANSION_VXLAN_GPE,
 514                                                   MLX5_EXPANSION_MPLS),
 515                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 516                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 517         },
 518         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 519                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 520                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 521         },
 522         [MLX5_EXPANSION_OUTER_IPV6] = {
 523                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 524                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 525                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 526                          MLX5_EXPANSION_IPV4,
 527                          MLX5_EXPANSION_IPV6,
 528                          MLX5_EXPANSION_GRE,
 529                          MLX5_EXPANSION_NVGRE),
 530                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 531                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 532                         ETH_RSS_NONFRAG_IPV6_OTHER,
 533         },
 534         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 535                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 536                                                   MLX5_EXPANSION_VXLAN_GPE,
 537                                                   MLX5_EXPANSION_MPLS),
 538                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 539                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 540         },
 541         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 542                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 543                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 544         },
 545         [MLX5_EXPANSION_VXLAN] = {
 546                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 547                                                   MLX5_EXPANSION_IPV4,
 548                                                   MLX5_EXPANSION_IPV6),
 549                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 550         },
 551         [MLX5_EXPANSION_VXLAN_GPE] = {
 552                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 553                                                   MLX5_EXPANSION_IPV4,
 554                                                   MLX5_EXPANSION_IPV6),
 555                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 556         },
 557         [MLX5_EXPANSION_GRE] = {
 558                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 559                                                   MLX5_EXPANSION_IPV6,
 560                                                   MLX5_EXPANSION_GRE_KEY,
 561                                                   MLX5_EXPANSION_MPLS),
 562                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 563         },
 564         [MLX5_EXPANSION_GRE_KEY] = {
 565                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 566                                                   MLX5_EXPANSION_IPV6,
 567                                                   MLX5_EXPANSION_MPLS),
 568                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 569                 .optional = 1,
 570         },
 571         [MLX5_EXPANSION_NVGRE] = {
 572                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 573                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 574         },
 575         [MLX5_EXPANSION_MPLS] = {
 576                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 577                                                   MLX5_EXPANSION_IPV6,
 578                                                   MLX5_EXPANSION_ETH),
 579                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 580         },
 581         [MLX5_EXPANSION_ETH] = {
 582                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 583                                                   MLX5_EXPANSION_IPV6),
 584                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 585         },
 586         [MLX5_EXPANSION_ETH_VLAN] = {
 587                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 588                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 589         },
 590         [MLX5_EXPANSION_VLAN] = {
 591                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 592                                                   MLX5_EXPANSION_IPV6),
 593                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 594         },
 595         [MLX5_EXPANSION_IPV4] = {
 596                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 597                                                   MLX5_EXPANSION_IPV4_TCP),
 598                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 599                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 600                         ETH_RSS_NONFRAG_IPV4_OTHER,
 601         },
 602         [MLX5_EXPANSION_IPV4_UDP] = {
 603                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 604                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 605         },
 606         [MLX5_EXPANSION_IPV4_TCP] = {
 607                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 608                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 609         },
 610         [MLX5_EXPANSION_IPV6] = {
 611                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 612                                                   MLX5_EXPANSION_IPV6_TCP,
 613                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 614                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 615                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 616                         ETH_RSS_NONFRAG_IPV6_OTHER,
 617         },
 618         [MLX5_EXPANSION_IPV6_UDP] = {
 619                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 620                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 621         },
 622         [MLX5_EXPANSION_IPV6_TCP] = {
 623                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 624                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 625         },
 626         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 627                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 628         },
 629 };
 630
 631 static struct rte_flow_action_handle *
 632 mlx5_action_handle_create(struct rte_eth_dev *dev,
 633                           const struct rte_flow_indir_action_conf *conf,
 634                           const struct rte_flow_action *action,
 635                           struct rte_flow_error *error);
 636 static int mlx5_action_handle_destroy
 637                                 (struct rte_eth_dev *dev,
 638                                  struct rte_flow_action_handle *handle,
 639                                  struct rte_flow_error *error);
 640 static int mlx5_action_handle_update
 641                                 (struct rte_eth_dev *dev,
 642                                  struct rte_flow_action_handle *handle,
 643                                  const void *update,
 644                                  struct rte_flow_error *error);
 645 static int mlx5_action_handle_query
 646                                 (struct rte_eth_dev *dev,
 647                                  const struct rte_flow_action_handle *handle,
 648                                  void *data,
 649                                  struct rte_flow_error *error);
 650 static int
 651 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 652                     struct rte_flow_tunnel *app_tunnel,
 653                     struct rte_flow_action **actions,
 654                     uint32_t *num_of_actions,
 655                     struct rte_flow_error *error);
 656 static int
 657 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 658                        struct rte_flow_tunnel *app_tunnel,
 659                        struct rte_flow_item **items,
 660                        uint32_t *num_of_items,
 661                        struct rte_flow_error *error);
 662 static int
 663 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 664                               struct rte_flow_item *pmd_items,
 665                               uint32_t num_items, struct rte_flow_error *err);
 666 static int
 667 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 668                                 struct rte_flow_action *pmd_actions,
 669                                 uint32_t num_actions,
 670                                 struct rte_flow_error *err);
 671 static int
 672 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 673                                   struct rte_mbuf *m,
 674                                   struct rte_flow_restore_info *info,
 675                                   struct rte_flow_error *err);
 676
 677 static const struct rte_flow_ops mlx5_flow_ops = {
 678         .validate = mlx5_flow_validate,
 679         .create = mlx5_flow_create,
 680         .destroy = mlx5_flow_destroy,
 681         .flush = mlx5_flow_flush,
 682         .isolate = mlx5_flow_isolate,
 683         .query = mlx5_flow_query,
 684         .dev_dump = mlx5_flow_dev_dump,
 685         .get_aged_flows = mlx5_flow_get_aged_flows,
 686         .action_handle_create = mlx5_action_handle_create,
 687         .action_handle_destroy = mlx5_action_handle_destroy,
 688         .action_handle_update = mlx5_action_handle_update,
 689         .action_handle_query = mlx5_action_handle_query,
 690         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 691         .tunnel_match = mlx5_flow_tunnel_match,
 692         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 693         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 694         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 695 };
 696
 697 /* Tunnel information. */
 698 struct mlx5_flow_tunnel_info {
 699         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 700         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 701 };
 702
 703 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 704         {
 705                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 706                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 707         },
 708         {
 709                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 710                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 711         },
 712         {
 713                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 714                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 715         },
 716         {
 717                 .tunnel = MLX5_FLOW_LAYER_GRE,
 718                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 719         },
 720         {
 721                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 722                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 723         },
 724         {
 725                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 726                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 727         },
 728         {
 729                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 730                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 731         },
 732         {
 733                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 734                 .ptype = RTE_PTYPE_TUNNEL_IP,
 735         },
 736         {
 737                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 738                 .ptype = RTE_PTYPE_TUNNEL_IP,
 739         },
 740         {
 741                 .tunnel = MLX5_FLOW_LAYER_GTP,
 742                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 743         },
 744 };
 745
 746
 747
 748 /**
 749  * Translate tag ID to register.
 750  *
 751  * @param[in] dev
 752  *   Pointer to the Ethernet device structure.
 753  * @param[in] feature
 754  *   The feature that request the register.
 755  * @param[in] id
 756  *   The request register ID.
 757  * @param[out] error
 758  *   Error description in case of any.
 759  *
 760  * @return
 761  *   The request register on success, a negative errno
 762  *   value otherwise and rte_errno is set.
 763  */
 764 int
 765 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 766                      enum mlx5_feature_name feature,
 767                      uint32_t id,
 768                      struct rte_flow_error *error)
 769 {
 770         struct mlx5_priv *priv = dev->data->dev_private;
 771         struct mlx5_dev_config *config = &priv->config;
 772         enum modify_reg start_reg;
 773         bool skip_mtr_reg = false;
 774
 775         switch (feature) {
 776         case MLX5_HAIRPIN_RX:
 777                 return REG_B;
 778         case MLX5_HAIRPIN_TX:
 779                 return REG_A;
 780         case MLX5_METADATA_RX:
 781                 switch (config->dv_xmeta_en) {
 782                 case MLX5_XMETA_MODE_LEGACY:
 783                         return REG_B;
 784                 case MLX5_XMETA_MODE_META16:
 785                         return REG_C_0;
 786                 case MLX5_XMETA_MODE_META32:
 787                         return REG_C_1;
 788                 }
 789                 break;
 790         case MLX5_METADATA_TX:
 791                 return REG_A;
 792         case MLX5_METADATA_FDB:
 793                 switch (config->dv_xmeta_en) {
 794                 case MLX5_XMETA_MODE_LEGACY:
 795                         return REG_NON;
 796                 case MLX5_XMETA_MODE_META16:
 797                         return REG_C_0;
 798                 case MLX5_XMETA_MODE_META32:
 799                         return REG_C_1;
 800                 }
 801                 break;
 802         case MLX5_FLOW_MARK:
 803                 switch (config->dv_xmeta_en) {
 804                 case MLX5_XMETA_MODE_LEGACY:
 805                         return REG_NON;
 806                 case MLX5_XMETA_MODE_META16:
 807                         return REG_C_1;
 808                 case MLX5_XMETA_MODE_META32:
 809                         return REG_C_0;
 810                 }
 811                 break;
 812         case MLX5_MTR_ID:
 813                 /*
 814                  * If meter color and meter id share one register, flow match
 815                  * should use the meter color register for match.
 816                  */
 817                 if (priv->mtr_reg_share)
 818                         return priv->mtr_color_reg;
 819                 else
 820                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 821                                REG_C_3;
 822         case MLX5_MTR_COLOR:
 823         case MLX5_ASO_FLOW_HIT:
 824         case MLX5_ASO_CONNTRACK:
 825                 /* All features use the same REG_C. */
 826                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 827                 return priv->mtr_color_reg;
 828         case MLX5_COPY_MARK:
 829                 /*
 830                  * Metadata COPY_MARK register using is in meter suffix sub
 831                  * flow while with meter. It's safe to share the same register.
 832                  */
 833                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 834         case MLX5_APP_TAG:
 835                 /*
 836                  * If meter is enable, it will engage the register for color
 837                  * match and flow match. If meter color match is not using the
 838                  * REG_C_2, need to skip the REG_C_x be used by meter color
 839                  * match.
 840                  * If meter is disable, free to use all available registers.
 841                  */
 842                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 843                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 844                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 845                 if (id > (uint32_t)(REG_C_7 - start_reg))
 846                         return rte_flow_error_set(error, EINVAL,
 847                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 848                                                   NULL, "invalid tag id");
 849                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 850                         return rte_flow_error_set(error, ENOTSUP,
 851                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 852                                                   NULL, "unsupported tag id");
 853                 /*
 854                  * This case means meter is using the REG_C_x great than 2.
 855                  * Take care not to conflict with meter color REG_C_x.
 856                  * If the available index REG_C_y >= REG_C_x, skip the
 857                  * color register.
 858                  */
 859                 if (skip_mtr_reg && config->flow_mreg_c
 860                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 861                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 862                                 return rte_flow_error_set(error, EINVAL,
 863                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 864                                                         NULL, "invalid tag id");
 865                         if (config->flow_mreg_c
 866                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 867                                 return config->flow_mreg_c
 868                                                [id + 1 + start_reg - REG_C_0];
 869                         return rte_flow_error_set(error, ENOTSUP,
 870                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 871                                                   NULL, "unsupported tag id");
 872                 }
 873                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 874         }
 875         MLX5_ASSERT(false);
 876         return rte_flow_error_set(error, EINVAL,
 877                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 878                                   NULL, "invalid feature name");
 879 }
 880
 881 /**
 882  * Check extensive flow metadata register support.
 883  *
 884  * @param dev
 885  *   Pointer to rte_eth_dev structure.
 886  *
 887  * @return
 888  *   True if device supports extensive flow metadata register, otherwise false.
 889  */
 890 bool
 891 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 892 {
 893         struct mlx5_priv *priv = dev->data->dev_private;
 894         struct mlx5_dev_config *config = &priv->config;
 895
 896         /*
 897          * Having available reg_c can be regarded inclusively as supporting
 898          * extensive flow metadata register, which could mean,
 899          * - metadata register copy action by modify header.
 900          * - 16 modify header actions is supported.
 901          * - reg_c's are preserved across different domain (FDB and NIC) on
 902          *   packet loopback by flow lookup miss.
 903          */
 904         return config->flow_mreg_c[2] != REG_NON;
 905 }
 906
 907 /**
 908  * Get the lowest priority.
 909  *
 910  * @param[in] dev
 911  *   Pointer to the Ethernet device structure.
 912  * @param[in] attributes
 913  *   Pointer to device flow rule attributes.
 914  *
 915  * @return
 916  *   The value of lowest priority of flow.
 917  */
 918 uint32_t
 919 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 920                           const struct rte_flow_attr *attr)
 921 {
 922         struct mlx5_priv *priv = dev->data->dev_private;
 923
 924         if (!attr->group && !attr->transfer)
 925                 return priv->config.flow_prio - 2;
 926         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 927 }
 928
 929 /**
 930  * Calculate matcher priority of the flow.
 931  *
 932  * @param[in] dev
 933  *   Pointer to the Ethernet device structure.
 934  * @param[in] attr
 935  *   Pointer to device flow rule attributes.
 936  * @param[in] subpriority
 937  *   The priority based on the items.
 938  * @return
 939  *   The matcher priority of the flow.
 940  */
 941 uint16_t
 942 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 943                           const struct rte_flow_attr *attr,
 944                           uint32_t subpriority)
 945 {
 946         uint16_t priority = (uint16_t)attr->priority;
 947         struct mlx5_priv *priv = dev->data->dev_private;
 948
 949         if (!attr->group && !attr->transfer) {
 950                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 951                         priority = priv->config.flow_prio - 1;
 952                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 953         }
 954         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 955                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 956         return priority * 3 + subpriority;
 957 }
 958
 959 /**
 960  * Verify the @p item specifications (spec, last, mask) are compatible with the
 961  * NIC capabilities.
 962  *
 963  * @param[in] item
 964  *   Item specification.
 965  * @param[in] mask
 966  *   @p item->mask or flow default bit-masks.
 967  * @param[in] nic_mask
 968  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 969  * @param[in] size
 970  *   Bit-masks size in bytes.
 971  * @param[in] range_accepted
 972  *   True if range of values is accepted for specific fields, false otherwise.
 973  * @param[out] error
 974  *   Pointer to error structure.
 975  *
 976  * @return
 977  *   0 on success, a negative errno value otherwise and rte_errno is set.
 978  */
 979 int
 980 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 981                           const uint8_t *mask,
 982                           const uint8_t *nic_mask,
 983                           unsigned int size,
 984                           bool range_accepted,
 985                           struct rte_flow_error *error)
 986 {
 987         unsigned int i;
 988
 989         MLX5_ASSERT(nic_mask);
 990         for (i = 0; i < size; ++i)
 991                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 992                         return rte_flow_error_set(error, ENOTSUP,
 993                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 994                                                   item,
 995                                                   "mask enables non supported"
 996                                                   " bits");
 997         if (!item->spec && (item->mask || item->last))
 998                 return rte_flow_error_set(error, EINVAL,
 999                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1000                                           "mask/last without a spec is not"
1001                                           " supported");
1002         if (item->spec && item->last && !range_accepted) {
1003                 uint8_t spec[size];
1004                 uint8_t last[size];
1005                 unsigned int i;
1006                 int ret;
1007
1008                 for (i = 0; i < size; ++i) {
1009                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1010                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1011                 }
1012                 ret = memcmp(spec, last, size);
1013                 if (ret != 0)
1014                         return rte_flow_error_set(error, EINVAL,
1015                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1016                                                   item,
1017                                                   "range is not valid");
1018         }
1019         return 0;
1020 }
1021
1022 /**
1023  * Adjust the hash fields according to the @p flow information.
1024  *
1025  * @param[in] dev_flow.
1026  *   Pointer to the mlx5_flow.
1027  * @param[in] tunnel
1028  *   1 when the hash field is for a tunnel item.
1029  * @param[in] layer_types
1030  *   ETH_RSS_* types.
1031  * @param[in] hash_fields
1032  *   Item hash fields.
1033  *
1034  * @return
1035  *   The hash fields that should be used.
1036  */
1037 uint64_t
1038 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1039                             int tunnel __rte_unused, uint64_t layer_types,
1040                             uint64_t hash_fields)
1041 {
1042 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1043         int rss_request_inner = rss_desc->level >= 2;
1044
1045         /* Check RSS hash level for tunnel. */
1046         if (tunnel && rss_request_inner)
1047                 hash_fields |= IBV_RX_HASH_INNER;
1048         else if (tunnel || rss_request_inner)
1049                 return 0;
1050 #endif
1051         /* Check if requested layer matches RSS hash fields. */
1052         if (!(rss_desc->types & layer_types))
1053                 return 0;
1054         return hash_fields;
1055 }
1056
1057 /**
1058  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1059  * if several tunnel rules are used on this queue, the tunnel ptype will be
1060  * cleared.
1061  *
1062  * @param rxq_ctrl
1063  *   Rx queue to update.
1064  */
1065 static void
1066 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1067 {
1068         unsigned int i;
1069         uint32_t tunnel_ptype = 0;
1070
1071         /* Look up for the ptype to use. */
1072         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1073                 if (!rxq_ctrl->flow_tunnels_n[i])
1074                         continue;
1075                 if (!tunnel_ptype) {
1076                         tunnel_ptype = tunnels_info[i].ptype;
1077                 } else {
1078                         tunnel_ptype = 0;
1079                         break;
1080                 }
1081         }
1082         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1083 }
1084
1085 /**
1086  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1087  * flow.
1088  *
1089  * @param[in] dev
1090  *   Pointer to the Ethernet device structure.
1091  * @param[in] dev_handle
1092  *   Pointer to device flow handle structure.
1093  */
1094 void
1095 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1096                        struct mlx5_flow_handle *dev_handle)
1097 {
1098         struct mlx5_priv *priv = dev->data->dev_private;
1099         const int mark = dev_handle->mark;
1100         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1101         struct mlx5_ind_table_obj *ind_tbl = NULL;
1102         unsigned int i;
1103
1104         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1105                 struct mlx5_hrxq *hrxq;
1106
1107                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1108                               dev_handle->rix_hrxq);
1109                 if (hrxq)
1110                         ind_tbl = hrxq->ind_table;
1111         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1112                 struct mlx5_shared_action_rss *shared_rss;
1113
1114                 shared_rss = mlx5_ipool_get
1115                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1116                          dev_handle->rix_srss);
1117                 if (shared_rss)
1118                         ind_tbl = shared_rss->ind_tbl;
1119         }
1120         if (!ind_tbl)
1121                 return;
1122         for (i = 0; i != ind_tbl->queues_n; ++i) {
1123                 int idx = ind_tbl->queues[i];
1124                 struct mlx5_rxq_ctrl *rxq_ctrl =
1125                         container_of((*priv->rxqs)[idx],
1126                                      struct mlx5_rxq_ctrl, rxq);
1127
1128                 /*
1129                  * To support metadata register copy on Tx loopback,
1130                  * this must be always enabled (metadata may arive
1131                  * from other port - not from local flows only.
1132                  */
1133                 if (priv->config.dv_flow_en &&
1134                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1135                     mlx5_flow_ext_mreg_supported(dev)) {
1136                         rxq_ctrl->rxq.mark = 1;
1137                         rxq_ctrl->flow_mark_n = 1;
1138                 } else if (mark) {
1139                         rxq_ctrl->rxq.mark = 1;
1140                         rxq_ctrl->flow_mark_n++;
1141                 }
1142                 if (tunnel) {
1143                         unsigned int j;
1144
1145                         /* Increase the counter matching the flow. */
1146                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1147                                 if ((tunnels_info[j].tunnel &
1148                                      dev_handle->layers) ==
1149                                     tunnels_info[j].tunnel) {
1150                                         rxq_ctrl->flow_tunnels_n[j]++;
1151                                         break;
1152                                 }
1153                         }
1154                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1155                 }
1156         }
1157 }
1158
1159 /**
1160  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1161  *
1162  * @param[in] dev
1163  *   Pointer to the Ethernet device structure.
1164  * @param[in] flow
1165  *   Pointer to flow structure.
1166  */
1167 static void
1168 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1169 {
1170         struct mlx5_priv *priv = dev->data->dev_private;
1171         uint32_t handle_idx;
1172         struct mlx5_flow_handle *dev_handle;
1173
1174         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1175                        handle_idx, dev_handle, next)
1176                 flow_drv_rxq_flags_set(dev, dev_handle);
1177 }
1178
1179 /**
1180  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1181  * device flow if no other flow uses it with the same kind of request.
1182  *
1183  * @param dev
1184  *   Pointer to Ethernet device.
1185  * @param[in] dev_handle
1186  *   Pointer to the device flow handle structure.
1187  */
1188 static void
1189 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1190                         struct mlx5_flow_handle *dev_handle)
1191 {
1192         struct mlx5_priv *priv = dev->data->dev_private;
1193         const int mark = dev_handle->mark;
1194         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1195         struct mlx5_ind_table_obj *ind_tbl = NULL;
1196         unsigned int i;
1197
1198         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1199                 struct mlx5_hrxq *hrxq;
1200
1201                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1202                               dev_handle->rix_hrxq);
1203                 if (hrxq)
1204                         ind_tbl = hrxq->ind_table;
1205         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1206                 struct mlx5_shared_action_rss *shared_rss;
1207
1208                 shared_rss = mlx5_ipool_get
1209                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1210                          dev_handle->rix_srss);
1211                 if (shared_rss)
1212                         ind_tbl = shared_rss->ind_tbl;
1213         }
1214         if (!ind_tbl)
1215                 return;
1216         MLX5_ASSERT(dev->data->dev_started);
1217         for (i = 0; i != ind_tbl->queues_n; ++i) {
1218                 int idx = ind_tbl->queues[i];
1219                 struct mlx5_rxq_ctrl *rxq_ctrl =
1220                         container_of((*priv->rxqs)[idx],
1221                                      struct mlx5_rxq_ctrl, rxq);
1222
1223                 if (priv->config.dv_flow_en &&
1224                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1225                     mlx5_flow_ext_mreg_supported(dev)) {
1226                         rxq_ctrl->rxq.mark = 1;
1227                         rxq_ctrl->flow_mark_n = 1;
1228                 } else if (mark) {
1229                         rxq_ctrl->flow_mark_n--;
1230                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1231                 }
1232                 if (tunnel) {
1233                         unsigned int j;
1234
1235                         /* Decrease the counter matching the flow. */
1236                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1237                                 if ((tunnels_info[j].tunnel &
1238                                      dev_handle->layers) ==
1239                                     tunnels_info[j].tunnel) {
1240                                         rxq_ctrl->flow_tunnels_n[j]--;
1241                                         break;
1242                                 }
1243                         }
1244                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1245                 }
1246         }
1247 }
1248
1249 /**
1250  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1251  * @p flow if no other flow uses it with the same kind of request.
1252  *
1253  * @param dev
1254  *   Pointer to Ethernet device.
1255  * @param[in] flow
1256  *   Pointer to the flow.
1257  */
1258 static void
1259 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1260 {
1261         struct mlx5_priv *priv = dev->data->dev_private;
1262         uint32_t handle_idx;
1263         struct mlx5_flow_handle *dev_handle;
1264
1265         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1266                        handle_idx, dev_handle, next)
1267                 flow_drv_rxq_flags_trim(dev, dev_handle);
1268 }
1269
1270 /**
1271  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1272  *
1273  * @param dev
1274  *   Pointer to Ethernet device.
1275  */
1276 static void
1277 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1278 {
1279         struct mlx5_priv *priv = dev->data->dev_private;
1280         unsigned int i;
1281
1282         for (i = 0; i != priv->rxqs_n; ++i) {
1283                 struct mlx5_rxq_ctrl *rxq_ctrl;
1284                 unsigned int j;
1285
1286                 if (!(*priv->rxqs)[i])
1287                         continue;
1288                 rxq_ctrl = container_of((*priv->rxqs)[i],
1289                                         struct mlx5_rxq_ctrl, rxq);
1290                 rxq_ctrl->flow_mark_n = 0;
1291                 rxq_ctrl->rxq.mark = 0;
1292                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1293                         rxq_ctrl->flow_tunnels_n[j] = 0;
1294                 rxq_ctrl->rxq.tunnel = 0;
1295         }
1296 }
1297
1298 /**
1299  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1300  *
1301  * @param[in] dev
1302  *   Pointer to the Ethernet device structure.
1303  */
1304 void
1305 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1306 {
1307         struct mlx5_priv *priv = dev->data->dev_private;
1308         struct mlx5_rxq_data *data;
1309         unsigned int i;
1310
1311         for (i = 0; i != priv->rxqs_n; ++i) {
1312                 if (!(*priv->rxqs)[i])
1313                         continue;
1314                 data = (*priv->rxqs)[i];
1315                 if (!rte_flow_dynf_metadata_avail()) {
1316                         data->dynf_meta = 0;
1317                         data->flow_meta_mask = 0;
1318                         data->flow_meta_offset = -1;
1319                         data->flow_meta_port_mask = 0;
1320                 } else {
1321                         data->dynf_meta = 1;
1322                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1323                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1324                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1325                 }
1326         }
1327 }
1328
1329 /*
1330  * return a pointer to the desired action in the list of actions.
1331  *
1332  * @param[in] actions
1333  *   The list of actions to search the action in.
1334  * @param[in] action
1335  *   The action to find.
1336  *
1337  * @return
1338  *   Pointer to the action in the list, if found. NULL otherwise.
1339  */
1340 const struct rte_flow_action *
1341 mlx5_flow_find_action(const struct rte_flow_action *actions,
1342                       enum rte_flow_action_type action)
1343 {
1344         if (actions == NULL)
1345                 return NULL;
1346         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1347                 if (actions->type == action)
1348                         return actions;
1349         return NULL;
1350 }
1351
1352 /*
1353  * Validate the flag action.
1354  *
1355  * @param[in] action_flags
1356  *   Bit-fields that holds the actions detected until now.
1357  * @param[in] attr
1358  *   Attributes of flow that includes this action.
1359  * @param[out] error
1360  *   Pointer to error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 int
1366 mlx5_flow_validate_action_flag(uint64_t action_flags,
1367                                const struct rte_flow_attr *attr,
1368                                struct rte_flow_error *error)
1369 {
1370         if (action_flags & MLX5_FLOW_ACTION_MARK)
1371                 return rte_flow_error_set(error, EINVAL,
1372                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1373                                           "can't mark and flag in same flow");
1374         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1375                 return rte_flow_error_set(error, EINVAL,
1376                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1377                                           "can't have 2 flag"
1378                                           " actions in same flow");
1379         if (attr->egress)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1382                                           "flag action not supported for "
1383                                           "egress");
1384         return 0;
1385 }
1386
1387 /*
1388  * Validate the mark action.
1389  *
1390  * @param[in] action
1391  *   Pointer to the queue action.
1392  * @param[in] action_flags
1393  *   Bit-fields that holds the actions detected until now.
1394  * @param[in] attr
1395  *   Attributes of flow that includes this action.
1396  * @param[out] error
1397  *   Pointer to error structure.
1398  *
1399  * @return
1400  *   0 on success, a negative errno value otherwise and rte_errno is set.
1401  */
1402 int
1403 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1404                                uint64_t action_flags,
1405                                const struct rte_flow_attr *attr,
1406                                struct rte_flow_error *error)
1407 {
1408         const struct rte_flow_action_mark *mark = action->conf;
1409
1410         if (!mark)
1411                 return rte_flow_error_set(error, EINVAL,
1412                                           RTE_FLOW_ERROR_TYPE_ACTION,
1413                                           action,
1414                                           "configuration cannot be null");
1415         if (mark->id >= MLX5_FLOW_MARK_MAX)
1416                 return rte_flow_error_set(error, EINVAL,
1417                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1418                                           &mark->id,
1419                                           "mark id must in 0 <= id < "
1420                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1421         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1422                 return rte_flow_error_set(error, EINVAL,
1423                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1424                                           "can't flag and mark in same flow");
1425         if (action_flags & MLX5_FLOW_ACTION_MARK)
1426                 return rte_flow_error_set(error, EINVAL,
1427                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1428                                           "can't have 2 mark actions in same"
1429                                           " flow");
1430         if (attr->egress)
1431                 return rte_flow_error_set(error, ENOTSUP,
1432                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1433                                           "mark action not supported for "
1434                                           "egress");
1435         return 0;
1436 }
1437
1438 /*
1439  * Validate the drop action.
1440  *
1441  * @param[in] action_flags
1442  *   Bit-fields that holds the actions detected until now.
1443  * @param[in] attr
1444  *   Attributes of flow that includes this action.
1445  * @param[out] error
1446  *   Pointer to error structure.
1447  *
1448  * @return
1449  *   0 on success, a negative errno value otherwise and rte_errno is set.
1450  */
1451 int
1452 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1453                                const struct rte_flow_attr *attr,
1454                                struct rte_flow_error *error)
1455 {
1456         if (attr->egress)
1457                 return rte_flow_error_set(error, ENOTSUP,
1458                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1459                                           "drop action not supported for "
1460                                           "egress");
1461         return 0;
1462 }
1463
1464 /*
1465  * Validate the queue action.
1466  *
1467  * @param[in] action
1468  *   Pointer to the queue action.
1469  * @param[in] action_flags
1470  *   Bit-fields that holds the actions detected until now.
1471  * @param[in] dev
1472  *   Pointer to the Ethernet device structure.
1473  * @param[in] attr
1474  *   Attributes of flow that includes this action.
1475  * @param[out] error
1476  *   Pointer to error structure.
1477  *
1478  * @return
1479  *   0 on success, a negative errno value otherwise and rte_errno is set.
1480  */
1481 int
1482 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1483                                 uint64_t action_flags,
1484                                 struct rte_eth_dev *dev,
1485                                 const struct rte_flow_attr *attr,
1486                                 struct rte_flow_error *error)
1487 {
1488         struct mlx5_priv *priv = dev->data->dev_private;
1489         const struct rte_flow_action_queue *queue = action->conf;
1490
1491         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1492                 return rte_flow_error_set(error, EINVAL,
1493                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1494                                           "can't have 2 fate actions in"
1495                                           " same flow");
1496         if (!priv->rxqs_n)
1497                 return rte_flow_error_set(error, EINVAL,
1498                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1499                                           NULL, "No Rx queues configured");
1500         if (queue->index >= priv->rxqs_n)
1501                 return rte_flow_error_set(error, EINVAL,
1502                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1503                                           &queue->index,
1504                                           "queue index out of range");
1505         if (!(*priv->rxqs)[queue->index])
1506                 return rte_flow_error_set(error, EINVAL,
1507                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1508                                           &queue->index,
1509                                           "queue is not configured");
1510         if (attr->egress)
1511                 return rte_flow_error_set(error, ENOTSUP,
1512                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1513                                           "queue action not supported for "
1514                                           "egress");
1515         return 0;
1516 }
1517
1518 /*
1519  * Validate the rss action.
1520  *
1521  * @param[in] dev
1522  *   Pointer to the Ethernet device structure.
1523  * @param[in] action
1524  *   Pointer to the queue action.
1525  * @param[out] error
1526  *   Pointer to error structure.
1527  *
1528  * @return
1529  *   0 on success, a negative errno value otherwise and rte_errno is set.
1530  */
1531 int
1532 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1533                          const struct rte_flow_action *action,
1534                          struct rte_flow_error *error)
1535 {
1536         struct mlx5_priv *priv = dev->data->dev_private;
1537         const struct rte_flow_action_rss *rss = action->conf;
1538         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1539         unsigned int i;
1540
1541         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1542             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1543                 return rte_flow_error_set(error, ENOTSUP,
1544                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1545                                           &rss->func,
1546                                           "RSS hash function not supported");
1547 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1548         if (rss->level > 2)
1549 #else
1550         if (rss->level > 1)
1551 #endif
1552                 return rte_flow_error_set(error, ENOTSUP,
1553                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1554                                           &rss->level,
1555                                           "tunnel RSS is not supported");
1556         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1557         if (rss->key_len == 0 && rss->key != NULL)
1558                 return rte_flow_error_set(error, ENOTSUP,
1559                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1560                                           &rss->key_len,
1561                                           "RSS hash key length 0");
1562         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1563                 return rte_flow_error_set(error, ENOTSUP,
1564                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1565                                           &rss->key_len,
1566                                           "RSS hash key too small");
1567         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1568                 return rte_flow_error_set(error, ENOTSUP,
1569                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1570                                           &rss->key_len,
1571                                           "RSS hash key too large");
1572         if (rss->queue_num > priv->config.ind_table_max_size)
1573                 return rte_flow_error_set(error, ENOTSUP,
1574                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1575                                           &rss->queue_num,
1576                                           "number of queues too large");
1577         if (rss->types & MLX5_RSS_HF_MASK)
1578                 return rte_flow_error_set(error, ENOTSUP,
1579                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1580                                           &rss->types,
1581                                           "some RSS protocols are not"
1582                                           " supported");
1583         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1584             !(rss->types & ETH_RSS_IP))
1585                 return rte_flow_error_set(error, EINVAL,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1587                                           "L3 partial RSS requested but L3 RSS"
1588                                           " type not specified");
1589         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1590             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1591                 return rte_flow_error_set(error, EINVAL,
1592                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1593                                           "L4 partial RSS requested but L4 RSS"
1594                                           " type not specified");
1595         if (!priv->rxqs_n)
1596                 return rte_flow_error_set(error, EINVAL,
1597                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1598                                           NULL, "No Rx queues configured");
1599         if (!rss->queue_num)
1600                 return rte_flow_error_set(error, EINVAL,
1601                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1602                                           NULL, "No queues configured");
1603         for (i = 0; i != rss->queue_num; ++i) {
1604                 struct mlx5_rxq_ctrl *rxq_ctrl;
1605
1606                 if (rss->queue[i] >= priv->rxqs_n)
1607                         return rte_flow_error_set
1608                                 (error, EINVAL,
1609                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1610                                  &rss->queue[i], "queue index out of range");
1611                 if (!(*priv->rxqs)[rss->queue[i]])
1612                         return rte_flow_error_set
1613                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1614                                  &rss->queue[i], "queue is not configured");
1615                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1616                                         struct mlx5_rxq_ctrl, rxq);
1617                 if (i == 0)
1618                         rxq_type = rxq_ctrl->type;
1619                 if (rxq_type != rxq_ctrl->type)
1620                         return rte_flow_error_set
1621                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1622                                  &rss->queue[i],
1623                                  "combining hairpin and regular RSS queues is not supported");
1624         }
1625         return 0;
1626 }
1627
1628 /*
1629  * Validate the rss action.
1630  *
1631  * @param[in] action
1632  *   Pointer to the queue action.
1633  * @param[in] action_flags
1634  *   Bit-fields that holds the actions detected until now.
1635  * @param[in] dev
1636  *   Pointer to the Ethernet device structure.
1637  * @param[in] attr
1638  *   Attributes of flow that includes this action.
1639  * @param[in] item_flags
1640  *   Items that were detected.
1641  * @param[out] error
1642  *   Pointer to error structure.
1643  *
1644  * @return
1645  *   0 on success, a negative errno value otherwise and rte_errno is set.
1646  */
1647 int
1648 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1649                               uint64_t action_flags,
1650                               struct rte_eth_dev *dev,
1651                               const struct rte_flow_attr *attr,
1652                               uint64_t item_flags,
1653                               struct rte_flow_error *error)
1654 {
1655         const struct rte_flow_action_rss *rss = action->conf;
1656         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1657         int ret;
1658
1659         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1660                 return rte_flow_error_set(error, EINVAL,
1661                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1662                                           "can't have 2 fate actions"
1663                                           " in same flow");
1664         ret = mlx5_validate_action_rss(dev, action, error);
1665         if (ret)
1666                 return ret;
1667         if (attr->egress)
1668                 return rte_flow_error_set(error, ENOTSUP,
1669                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1670                                           "rss action not supported for "
1671                                           "egress");
1672         if (rss->level > 1 && !tunnel)
1673                 return rte_flow_error_set(error, EINVAL,
1674                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1675                                           "inner RSS is not supported for "
1676                                           "non-tunnel flows");
1677         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1678             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1679                 return rte_flow_error_set(error, EINVAL,
1680                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1681                                           "RSS on eCPRI is not supported now");
1682         }
1683         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1684             !(item_flags &
1685               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1686             rss->level > 1)
1687                 return rte_flow_error_set(error, EINVAL,
1688                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1689                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1690         return 0;
1691 }
1692
1693 /*
1694  * Validate the default miss action.
1695  *
1696  * @param[in] action_flags
1697  *   Bit-fields that holds the actions detected until now.
1698  * @param[out] error
1699  *   Pointer to error structure.
1700  *
1701  * @return
1702  *   0 on success, a negative errno value otherwise and rte_errno is set.
1703  */
1704 int
1705 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1706                                 const struct rte_flow_attr *attr,
1707                                 struct rte_flow_error *error)
1708 {
1709         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1710                 return rte_flow_error_set(error, EINVAL,
1711                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1712                                           "can't have 2 fate actions in"
1713                                           " same flow");
1714         if (attr->egress)
1715                 return rte_flow_error_set(error, ENOTSUP,
1716                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1717                                           "default miss action not supported "
1718                                           "for egress");
1719         if (attr->group)
1720                 return rte_flow_error_set(error, ENOTSUP,
1721                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1722                                           "only group 0 is supported");
1723         if (attr->transfer)
1724                 return rte_flow_error_set(error, ENOTSUP,
1725                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1726                                           NULL, "transfer is not supported");
1727         return 0;
1728 }
1729
1730 /*
1731  * Validate the count action.
1732  *
1733  * @param[in] dev
1734  *   Pointer to the Ethernet device structure.
1735  * @param[in] attr
1736  *   Attributes of flow that includes this action.
1737  * @param[out] error
1738  *   Pointer to error structure.
1739  *
1740  * @return
1741  *   0 on success, a negative errno value otherwise and rte_errno is set.
1742  */
1743 int
1744 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1745                                 const struct rte_flow_attr *attr,
1746                                 struct rte_flow_error *error)
1747 {
1748         if (attr->egress)
1749                 return rte_flow_error_set(error, ENOTSUP,
1750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1751                                           "count action not supported for "
1752                                           "egress");
1753         return 0;
1754 }
1755
1756 /*
1757  * Validate the ASO CT action.
1758  *
1759  * @param[in] dev
1760  *   Pointer to the Ethernet device structure.
1761  * @param[in] conntrack
1762  *   Pointer to the CT action profile.
1763  * @param[out] error
1764  *   Pointer to error structure.
1765  *
1766  * @return
1767  *   0 on success, a negative errno value otherwise and rte_errno is set.
1768  */
1769 int
1770 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1771                         const struct rte_flow_action_conntrack *conntrack,
1772                         struct rte_flow_error *error)
1773 {
1774         RTE_SET_USED(dev);
1775
1776         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1777                 return rte_flow_error_set(error, EINVAL,
1778                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1779                                           "Invalid CT state");
1780         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1781                 return rte_flow_error_set(error, EINVAL,
1782                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1783                                           "Invalid last TCP packet flag");
1784         return 0;
1785 }
1786
1787 /**
1788  * Verify the @p attributes will be correctly understood by the NIC and store
1789  * them in the @p flow if everything is correct.
1790  *
1791  * @param[in] dev
1792  *   Pointer to the Ethernet device structure.
1793  * @param[in] attributes
1794  *   Pointer to flow attributes
1795  * @param[out] error
1796  *   Pointer to error structure.
1797  *
1798  * @return
1799  *   0 on success, a negative errno value otherwise and rte_errno is set.
1800  */
1801 int
1802 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1803                               const struct rte_flow_attr *attributes,
1804                               struct rte_flow_error *error)
1805 {
1806         struct mlx5_priv *priv = dev->data->dev_private;
1807         uint32_t priority_max = priv->config.flow_prio - 1;
1808
1809         if (attributes->group)
1810                 return rte_flow_error_set(error, ENOTSUP,
1811                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1812                                           NULL, "groups is not supported");
1813         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1814             attributes->priority >= priority_max)
1815                 return rte_flow_error_set(error, ENOTSUP,
1816                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1817                                           NULL, "priority out of range");
1818         if (attributes->egress)
1819                 return rte_flow_error_set(error, ENOTSUP,
1820                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1821                                           "egress is not supported");
1822         if (attributes->transfer && !priv->config.dv_esw_en)
1823                 return rte_flow_error_set(error, ENOTSUP,
1824                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1825                                           NULL, "transfer is not supported");
1826         if (!attributes->ingress)
1827                 return rte_flow_error_set(error, EINVAL,
1828                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1829                                           NULL,
1830                                           "ingress attribute is mandatory");
1831         return 0;
1832 }
1833
1834 /**
1835  * Validate ICMP6 item.
1836  *
1837  * @param[in] item
1838  *   Item specification.
1839  * @param[in] item_flags
1840  *   Bit-fields that holds the items detected until now.
1841  * @param[in] ext_vlan_sup
1842  *   Whether extended VLAN features are supported or not.
1843  * @param[out] error
1844  *   Pointer to error structure.
1845  *
1846  * @return
1847  *   0 on success, a negative errno value otherwise and rte_errno is set.
1848  */
1849 int
1850 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1851                                uint64_t item_flags,
1852                                uint8_t target_protocol,
1853                                struct rte_flow_error *error)
1854 {
1855         const struct rte_flow_item_icmp6 *mask = item->mask;
1856         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1857         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1858                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1859         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1860                                       MLX5_FLOW_LAYER_OUTER_L4;
1861         int ret;
1862
1863         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1866                                           "protocol filtering not compatible"
1867                                           " with ICMP6 layer");
1868         if (!(item_flags & l3m))
1869                 return rte_flow_error_set(error, EINVAL,
1870                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1871                                           "IPv6 is mandatory to filter on"
1872                                           " ICMP6");
1873         if (item_flags & l4m)
1874                 return rte_flow_error_set(error, EINVAL,
1875                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1876                                           "multiple L4 layers not supported");
1877         if (!mask)
1878                 mask = &rte_flow_item_icmp6_mask;
1879         ret = mlx5_flow_item_acceptable
1880                 (item, (const uint8_t *)mask,
1881                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1882                  sizeof(struct rte_flow_item_icmp6),
1883                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1884         if (ret < 0)
1885                 return ret;
1886         return 0;
1887 }
1888
1889 /**
1890  * Validate ICMP item.
1891  *
1892  * @param[in] item
1893  *   Item specification.
1894  * @param[in] item_flags
1895  *   Bit-fields that holds the items detected until now.
1896  * @param[out] error
1897  *   Pointer to error structure.
1898  *
1899  * @return
1900  *   0 on success, a negative errno value otherwise and rte_errno is set.
1901  */
1902 int
1903 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1904                              uint64_t item_flags,
1905                              uint8_t target_protocol,
1906                              struct rte_flow_error *error)
1907 {
1908         const struct rte_flow_item_icmp *mask = item->mask;
1909         const struct rte_flow_item_icmp nic_mask = {
1910                 .hdr.icmp_type = 0xff,
1911                 .hdr.icmp_code = 0xff,
1912                 .hdr.icmp_ident = RTE_BE16(0xffff),
1913                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1914         };
1915         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1916         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1917                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1918         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1919                                       MLX5_FLOW_LAYER_OUTER_L4;
1920         int ret;
1921
1922         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1923                 return rte_flow_error_set(error, EINVAL,
1924                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1925                                           "protocol filtering not compatible"
1926                                           " with ICMP layer");
1927         if (!(item_flags & l3m))
1928                 return rte_flow_error_set(error, EINVAL,
1929                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1930                                           "IPv4 is mandatory to filter"
1931                                           " on ICMP");
1932         if (item_flags & l4m)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1935                                           "multiple L4 layers not supported");
1936         if (!mask)
1937                 mask = &nic_mask;
1938         ret = mlx5_flow_item_acceptable
1939                 (item, (const uint8_t *)mask,
1940                  (const uint8_t *)&nic_mask,
1941                  sizeof(struct rte_flow_item_icmp),
1942                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1943         if (ret < 0)
1944                 return ret;
1945         return 0;
1946 }
1947
1948 /**
1949  * Validate Ethernet item.
1950  *
1951  * @param[in] item
1952  *   Item specification.
1953  * @param[in] item_flags
1954  *   Bit-fields that holds the items detected until now.
1955  * @param[out] error
1956  *   Pointer to error structure.
1957  *
1958  * @return
1959  *   0 on success, a negative errno value otherwise and rte_errno is set.
1960  */
1961 int
1962 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1963                             uint64_t item_flags, bool ext_vlan_sup,
1964                             struct rte_flow_error *error)
1965 {
1966         const struct rte_flow_item_eth *mask = item->mask;
1967         const struct rte_flow_item_eth nic_mask = {
1968                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1969                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1970                 .type = RTE_BE16(0xffff),
1971                 .has_vlan = ext_vlan_sup ? 1 : 0,
1972         };
1973         int ret;
1974         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1975         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1976                                        MLX5_FLOW_LAYER_OUTER_L2;
1977
1978         if (item_flags & ethm)
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1981                                           "multiple L2 layers not supported");
1982         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1983             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1984                 return rte_flow_error_set(error, EINVAL,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "L2 layer should not follow "
1987                                           "L3 layers");
1988         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1989             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1992                                           "L2 layer should not follow VLAN");
1993         if (!mask)
1994                 mask = &rte_flow_item_eth_mask;
1995         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1996                                         (const uint8_t *)&nic_mask,
1997                                         sizeof(struct rte_flow_item_eth),
1998                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1999         return ret;
2000 }
2001
2002 /**
2003  * Validate VLAN item.
2004  *
2005  * @param[in] item
2006  *   Item specification.
2007  * @param[in] item_flags
2008  *   Bit-fields that holds the items detected until now.
2009  * @param[in] dev
2010  *   Ethernet device flow is being created on.
2011  * @param[out] error
2012  *   Pointer to error structure.
2013  *
2014  * @return
2015  *   0 on success, a negative errno value otherwise and rte_errno is set.
2016  */
2017 int
2018 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2019                              uint64_t item_flags,
2020                              struct rte_eth_dev *dev,
2021                              struct rte_flow_error *error)
2022 {
2023         const struct rte_flow_item_vlan *spec = item->spec;
2024         const struct rte_flow_item_vlan *mask = item->mask;
2025         const struct rte_flow_item_vlan nic_mask = {
2026                 .tci = RTE_BE16(UINT16_MAX),
2027                 .inner_type = RTE_BE16(UINT16_MAX),
2028         };
2029         uint16_t vlan_tag = 0;
2030         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2031         int ret;
2032         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2033                                         MLX5_FLOW_LAYER_INNER_L4) :
2034                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2035                                         MLX5_FLOW_LAYER_OUTER_L4);
2036         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2037                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2038
2039         if (item_flags & vlanm)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2042                                           "multiple VLAN layers not supported");
2043         else if ((item_flags & l34m) != 0)
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2046                                           "VLAN cannot follow L3/L4 layer");
2047         if (!mask)
2048                 mask = &rte_flow_item_vlan_mask;
2049         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2050                                         (const uint8_t *)&nic_mask,
2051                                         sizeof(struct rte_flow_item_vlan),
2052                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2053         if (ret)
2054                 return ret;
2055         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2056                 struct mlx5_priv *priv = dev->data->dev_private;
2057
2058                 if (priv->vmwa_context) {
2059                         /*
2060                          * Non-NULL context means we have a virtual machine
2061                          * and SR-IOV enabled, we have to create VLAN interface
2062                          * to make hypervisor to setup E-Switch vport
2063                          * context correctly. We avoid creating the multiple
2064                          * VLAN interfaces, so we cannot support VLAN tag mask.
2065                          */
2066                         return rte_flow_error_set(error, EINVAL,
2067                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2068                                                   item,
2069                                                   "VLAN tag mask is not"
2070                                                   " supported in virtual"
2071                                                   " environment");
2072                 }
2073         }
2074         if (spec) {
2075                 vlan_tag = spec->tci;
2076                 vlan_tag &= mask->tci;
2077         }
2078         /*
2079          * From verbs perspective an empty VLAN is equivalent
2080          * to a packet without VLAN layer.
2081          */
2082         if (!vlan_tag)
2083                 return rte_flow_error_set(error, EINVAL,
2084                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2085                                           item->spec,
2086                                           "VLAN cannot be empty");
2087         return 0;
2088 }
2089
2090 /**
2091  * Validate IPV4 item.
2092  *
2093  * @param[in] item
2094  *   Item specification.
2095  * @param[in] item_flags
2096  *   Bit-fields that holds the items detected until now.
2097  * @param[in] last_item
2098  *   Previous validated item in the pattern items.
2099  * @param[in] ether_type
2100  *   Type in the ethernet layer header (including dot1q).
2101  * @param[in] acc_mask
2102  *   Acceptable mask, if NULL default internal default mask
2103  *   will be used to check whether item fields are supported.
2104  * @param[in] range_accepted
2105  *   True if range of values is accepted for specific fields, false otherwise.
2106  * @param[out] error
2107  *   Pointer to error structure.
2108  *
2109  * @return
2110  *   0 on success, a negative errno value otherwise and rte_errno is set.
2111  */
2112 int
2113 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2114                              uint64_t item_flags,
2115                              uint64_t last_item,
2116                              uint16_t ether_type,
2117                              const struct rte_flow_item_ipv4 *acc_mask,
2118                              bool range_accepted,
2119                              struct rte_flow_error *error)
2120 {
2121         const struct rte_flow_item_ipv4 *mask = item->mask;
2122         const struct rte_flow_item_ipv4 *spec = item->spec;
2123         const struct rte_flow_item_ipv4 nic_mask = {
2124                 .hdr = {
2125                         .src_addr = RTE_BE32(0xffffffff),
2126                         .dst_addr = RTE_BE32(0xffffffff),
2127                         .type_of_service = 0xff,
2128                         .next_proto_id = 0xff,
2129                 },
2130         };
2131         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2132         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2133                                       MLX5_FLOW_LAYER_OUTER_L3;
2134         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2135                                       MLX5_FLOW_LAYER_OUTER_L4;
2136         int ret;
2137         uint8_t next_proto = 0xFF;
2138         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2139                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2140                                   MLX5_FLOW_LAYER_INNER_VLAN);
2141
2142         if ((last_item & l2_vlan) && ether_type &&
2143             ether_type != RTE_ETHER_TYPE_IPV4)
2144                 return rte_flow_error_set(error, EINVAL,
2145                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2146                                           "IPv4 cannot follow L2/VLAN layer "
2147                                           "which ether type is not IPv4");
2148         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2149                 if (mask && spec)
2150                         next_proto = mask->hdr.next_proto_id &
2151                                      spec->hdr.next_proto_id;
2152                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2153                         return rte_flow_error_set(error, EINVAL,
2154                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2155                                                   item,
2156                                                   "multiple tunnel "
2157                                                   "not supported");
2158         }
2159         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2160                 return rte_flow_error_set(error, EINVAL,
2161                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2162                                           "wrong tunnel type - IPv6 specified "
2163                                           "but IPv4 item provided");
2164         if (item_flags & l3m)
2165                 return rte_flow_error_set(error, ENOTSUP,
2166                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2167                                           "multiple L3 layers not supported");
2168         else if (item_flags & l4m)
2169                 return rte_flow_error_set(error, EINVAL,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "L3 cannot follow an L4 layer.");
2172         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2173                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2174                 return rte_flow_error_set(error, EINVAL,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2176                                           "L3 cannot follow an NVGRE layer.");
2177         if (!mask)
2178                 mask = &rte_flow_item_ipv4_mask;
2179         else if (mask->hdr.next_proto_id != 0 &&
2180                  mask->hdr.next_proto_id != 0xff)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2183                                           "partial mask is not supported"
2184                                           " for protocol");
2185         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2186                                         acc_mask ? (const uint8_t *)acc_mask
2187                                                  : (const uint8_t *)&nic_mask,
2188                                         sizeof(struct rte_flow_item_ipv4),
2189                                         range_accepted, error);
2190         if (ret < 0)
2191                 return ret;
2192         return 0;
2193 }
2194
2195 /**
2196  * Validate IPV6 item.
2197  *
2198  * @param[in] item
2199  *   Item specification.
2200  * @param[in] item_flags
2201  *   Bit-fields that holds the items detected until now.
2202  * @param[in] last_item
2203  *   Previous validated item in the pattern items.
2204  * @param[in] ether_type
2205  *   Type in the ethernet layer header (including dot1q).
2206  * @param[in] acc_mask
2207  *   Acceptable mask, if NULL default internal default mask
2208  *   will be used to check whether item fields are supported.
2209  * @param[out] error
2210  *   Pointer to error structure.
2211  *
2212  * @return
2213  *   0 on success, a negative errno value otherwise and rte_errno is set.
2214  */
2215 int
2216 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2217                              uint64_t item_flags,
2218                              uint64_t last_item,
2219                              uint16_t ether_type,
2220                              const struct rte_flow_item_ipv6 *acc_mask,
2221                              struct rte_flow_error *error)
2222 {
2223         const struct rte_flow_item_ipv6 *mask = item->mask;
2224         const struct rte_flow_item_ipv6 *spec = item->spec;
2225         const struct rte_flow_item_ipv6 nic_mask = {
2226                 .hdr = {
2227                         .src_addr =
2228                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2229                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2230                         .dst_addr =
2231                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2232                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2233                         .vtc_flow = RTE_BE32(0xffffffff),
2234                         .proto = 0xff,
2235                 },
2236         };
2237         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2238         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2239                                       MLX5_FLOW_LAYER_OUTER_L3;
2240         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2241                                       MLX5_FLOW_LAYER_OUTER_L4;
2242         int ret;
2243         uint8_t next_proto = 0xFF;
2244         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2245                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2246                                   MLX5_FLOW_LAYER_INNER_VLAN);
2247
2248         if ((last_item & l2_vlan) && ether_type &&
2249             ether_type != RTE_ETHER_TYPE_IPV6)
2250                 return rte_flow_error_set(error, EINVAL,
2251                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2252                                           "IPv6 cannot follow L2/VLAN layer "
2253                                           "which ether type is not IPv6");
2254         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2255                 next_proto = spec->hdr.proto;
2256         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2257                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2258                         return rte_flow_error_set(error, EINVAL,
2259                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2260                                                   item,
2261                                                   "multiple tunnel "
2262                                                   "not supported");
2263         }
2264         if (next_proto == IPPROTO_HOPOPTS  ||
2265             next_proto == IPPROTO_ROUTING  ||
2266             next_proto == IPPROTO_FRAGMENT ||
2267             next_proto == IPPROTO_ESP      ||
2268             next_proto == IPPROTO_AH       ||
2269             next_proto == IPPROTO_DSTOPTS)
2270                 return rte_flow_error_set(error, EINVAL,
2271                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2272                                           "IPv6 proto (next header) should "
2273                                           "not be set as extension header");
2274         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2275                 return rte_flow_error_set(error, EINVAL,
2276                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2277                                           "wrong tunnel type - IPv4 specified "
2278                                           "but IPv6 item provided");
2279         if (item_flags & l3m)
2280                 return rte_flow_error_set(error, ENOTSUP,
2281                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2282                                           "multiple L3 layers not supported");
2283         else if (item_flags & l4m)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "L3 cannot follow an L4 layer.");
2287         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2288                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2289                 return rte_flow_error_set(error, EINVAL,
2290                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2291                                           "L3 cannot follow an NVGRE layer.");
2292         if (!mask)
2293                 mask = &rte_flow_item_ipv6_mask;
2294         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2295                                         acc_mask ? (const uint8_t *)acc_mask
2296                                                  : (const uint8_t *)&nic_mask,
2297                                         sizeof(struct rte_flow_item_ipv6),
2298                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2299         if (ret < 0)
2300                 return ret;
2301         return 0;
2302 }
2303
2304 /**
2305  * Validate UDP item.
2306  *
2307  * @param[in] item
2308  *   Item specification.
2309  * @param[in] item_flags
2310  *   Bit-fields that holds the items detected until now.
2311  * @param[in] target_protocol
2312  *   The next protocol in the previous item.
2313  * @param[in] flow_mask
2314  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2315  * @param[out] error
2316  *   Pointer to error structure.
2317  *
2318  * @return
2319  *   0 on success, a negative errno value otherwise and rte_errno is set.
2320  */
2321 int
2322 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2323                             uint64_t item_flags,
2324                             uint8_t target_protocol,
2325                             struct rte_flow_error *error)
2326 {
2327         const struct rte_flow_item_udp *mask = item->mask;
2328         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2329         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2330                                       MLX5_FLOW_LAYER_OUTER_L3;
2331         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2332                                       MLX5_FLOW_LAYER_OUTER_L4;
2333         int ret;
2334
2335         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2336                 return rte_flow_error_set(error, EINVAL,
2337                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2338                                           "protocol filtering not compatible"
2339                                           " with UDP layer");
2340         if (!(item_flags & l3m))
2341                 return rte_flow_error_set(error, EINVAL,
2342                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2343                                           "L3 is mandatory to filter on L4");
2344         if (item_flags & l4m)
2345                 return rte_flow_error_set(error, EINVAL,
2346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2347                                           "multiple L4 layers not supported");
2348         if (!mask)
2349                 mask = &rte_flow_item_udp_mask;
2350         ret = mlx5_flow_item_acceptable
2351                 (item, (const uint8_t *)mask,
2352                  (const uint8_t *)&rte_flow_item_udp_mask,
2353                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2354                  error);
2355         if (ret < 0)
2356                 return ret;
2357         return 0;
2358 }
2359
2360 /**
2361  * Validate TCP item.
2362  *
2363  * @param[in] item
2364  *   Item specification.
2365  * @param[in] item_flags
2366  *   Bit-fields that holds the items detected until now.
2367  * @param[in] target_protocol
2368  *   The next protocol in the previous item.
2369  * @param[out] error
2370  *   Pointer to error structure.
2371  *
2372  * @return
2373  *   0 on success, a negative errno value otherwise and rte_errno is set.
2374  */
2375 int
2376 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2377                             uint64_t item_flags,
2378                             uint8_t target_protocol,
2379                             const struct rte_flow_item_tcp *flow_mask,
2380                             struct rte_flow_error *error)
2381 {
2382         const struct rte_flow_item_tcp *mask = item->mask;
2383         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2384         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2385                                       MLX5_FLOW_LAYER_OUTER_L3;
2386         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2387                                       MLX5_FLOW_LAYER_OUTER_L4;
2388         int ret;
2389
2390         MLX5_ASSERT(flow_mask);
2391         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2392                 return rte_flow_error_set(error, EINVAL,
2393                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2394                                           "protocol filtering not compatible"
2395                                           " with TCP layer");
2396         if (!(item_flags & l3m))
2397                 return rte_flow_error_set(error, EINVAL,
2398                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2399                                           "L3 is mandatory to filter on L4");
2400         if (item_flags & l4m)
2401                 return rte_flow_error_set(error, EINVAL,
2402                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2403                                           "multiple L4 layers not supported");
2404         if (!mask)
2405                 mask = &rte_flow_item_tcp_mask;
2406         ret = mlx5_flow_item_acceptable
2407                 (item, (const uint8_t *)mask,
2408                  (const uint8_t *)flow_mask,
2409                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2410                  error);
2411         if (ret < 0)
2412                 return ret;
2413         return 0;
2414 }
2415
2416 /**
2417  * Validate VXLAN item.
2418  *
2419  * @param[in] dev
2420  *   Pointer to the Ethernet device structure.
2421  * @param[in] item
2422  *   Item specification.
2423  * @param[in] item_flags
2424  *   Bit-fields that holds the items detected until now.
2425  * @param[in] attr
2426  *   Flow rule attributes.
2427  * @param[out] error
2428  *   Pointer to error structure.
2429  *
2430  * @return
2431  *   0 on success, a negative errno value otherwise and rte_errno is set.
2432  */
2433 int
2434 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2435                               const struct rte_flow_item *item,
2436                               uint64_t item_flags,
2437                               const struct rte_flow_attr *attr,
2438                               struct rte_flow_error *error)
2439 {
2440         const struct rte_flow_item_vxlan *spec = item->spec;
2441         const struct rte_flow_item_vxlan *mask = item->mask;
2442         int ret;
2443         struct mlx5_priv *priv = dev->data->dev_private;
2444         union vni {
2445                 uint32_t vlan_id;
2446                 uint8_t vni[4];
2447         } id = { .vlan_id = 0, };
2448         const struct rte_flow_item_vxlan nic_mask = {
2449                 .vni = "\xff\xff\xff",
2450                 .rsvd1 = 0xff,
2451         };
2452         const struct rte_flow_item_vxlan *valid_mask;
2453
2454         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2455                 return rte_flow_error_set(error, ENOTSUP,
2456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2457                                           "multiple tunnel layers not"
2458                                           " supported");
2459         valid_mask = &rte_flow_item_vxlan_mask;
2460         /*
2461          * Verify only UDPv4 is present as defined in
2462          * https://tools.ietf.org/html/rfc7348
2463          */
2464         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2465                 return rte_flow_error_set(error, EINVAL,
2466                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2467                                           "no outer UDP layer found");
2468         if (!mask)
2469                 mask = &rte_flow_item_vxlan_mask;
2470         /* FDB domain & NIC domain non-zero group */
2471         if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2472                 valid_mask = &nic_mask;
2473         /* Group zero in NIC domain */
2474         if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1)
2475                 valid_mask = &nic_mask;
2476         ret = mlx5_flow_item_acceptable
2477                 (item, (const uint8_t *)mask,
2478                  (const uint8_t *)valid_mask,
2479                  sizeof(struct rte_flow_item_vxlan),
2480                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2481         if (ret < 0)
2482                 return ret;
2483         if (spec) {
2484                 memcpy(&id.vni[1], spec->vni, 3);
2485                 memcpy(&id.vni[1], mask->vni, 3);
2486         }
2487         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2488                 return rte_flow_error_set(error, ENOTSUP,
2489                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2490                                           "VXLAN tunnel must be fully defined");
2491         return 0;
2492 }
2493
2494 /**
2495  * Validate VXLAN_GPE item.
2496  *
2497  * @param[in] item
2498  *   Item specification.
2499  * @param[in] item_flags
2500  *   Bit-fields that holds the items detected until now.
2501  * @param[in] priv
2502  *   Pointer to the private data structure.
2503  * @param[in] target_protocol
2504  *   The next protocol in the previous item.
2505  * @param[out] error
2506  *   Pointer to error structure.
2507  *
2508  * @return
2509  *   0 on success, a negative errno value otherwise and rte_errno is set.
2510  */
2511 int
2512 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2513                                   uint64_t item_flags,
2514                                   struct rte_eth_dev *dev,
2515                                   struct rte_flow_error *error)
2516 {
2517         struct mlx5_priv *priv = dev->data->dev_private;
2518         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2519         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2520         int ret;
2521         union vni {
2522                 uint32_t vlan_id;
2523                 uint8_t vni[4];
2524         } id = { .vlan_id = 0, };
2525
2526         if (!priv->config.l3_vxlan_en)
2527                 return rte_flow_error_set(error, ENOTSUP,
2528                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2529                                           "L3 VXLAN is not enabled by device"
2530                                           " parameter and/or not configured in"
2531                                           " firmware");
2532         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2533                 return rte_flow_error_set(error, ENOTSUP,
2534                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2535                                           "multiple tunnel layers not"
2536                                           " supported");
2537         /*
2538          * Verify only UDPv4 is present as defined in
2539          * https://tools.ietf.org/html/rfc7348
2540          */
2541         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2542                 return rte_flow_error_set(error, EINVAL,
2543                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2544                                           "no outer UDP layer found");
2545         if (!mask)
2546                 mask = &rte_flow_item_vxlan_gpe_mask;
2547         ret = mlx5_flow_item_acceptable
2548                 (item, (const uint8_t *)mask,
2549                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2550                  sizeof(struct rte_flow_item_vxlan_gpe),
2551                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2552         if (ret < 0)
2553                 return ret;
2554         if (spec) {
2555                 if (spec->protocol)
2556                         return rte_flow_error_set(error, ENOTSUP,
2557                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2558                                                   item,
2559                                                   "VxLAN-GPE protocol"
2560                                                   " not supported");
2561                 memcpy(&id.vni[1], spec->vni, 3);
2562                 memcpy(&id.vni[1], mask->vni, 3);
2563         }
2564         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2565                 return rte_flow_error_set(error, ENOTSUP,
2566                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2567                                           "VXLAN-GPE tunnel must be fully"
2568                                           " defined");
2569         return 0;
2570 }
2571 /**
2572  * Validate GRE Key item.
2573  *
2574  * @param[in] item
2575  *   Item specification.
2576  * @param[in] item_flags
2577  *   Bit flags to mark detected items.
2578  * @param[in] gre_item
2579  *   Pointer to gre_item
2580  * @param[out] error
2581  *   Pointer to error structure.
2582  *
2583  * @return
2584  *   0 on success, a negative errno value otherwise and rte_errno is set.
2585  */
2586 int
2587 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2588                                 uint64_t item_flags,
2589                                 const struct rte_flow_item *gre_item,
2590                                 struct rte_flow_error *error)
2591 {
2592         const rte_be32_t *mask = item->mask;
2593         int ret = 0;
2594         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2595         const struct rte_flow_item_gre *gre_spec;
2596         const struct rte_flow_item_gre *gre_mask;
2597
2598         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2599                 return rte_flow_error_set(error, ENOTSUP,
2600                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2601                                           "Multiple GRE key not support");
2602         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2603                 return rte_flow_error_set(error, ENOTSUP,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2605                                           "No preceding GRE header");
2606         if (item_flags & MLX5_FLOW_LAYER_INNER)
2607                 return rte_flow_error_set(error, ENOTSUP,
2608                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2609                                           "GRE key following a wrong item");
2610         gre_mask = gre_item->mask;
2611         if (!gre_mask)
2612                 gre_mask = &rte_flow_item_gre_mask;
2613         gre_spec = gre_item->spec;
2614         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2615                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2616                 return rte_flow_error_set(error, EINVAL,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2618                                           "Key bit must be on");
2619
2620         if (!mask)
2621                 mask = &gre_key_default_mask;
2622         ret = mlx5_flow_item_acceptable
2623                 (item, (const uint8_t *)mask,
2624                  (const uint8_t *)&gre_key_default_mask,
2625                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2626         return ret;
2627 }
2628
2629 /**
2630  * Validate GRE item.
2631  *
2632  * @param[in] item
2633  *   Item specification.
2634  * @param[in] item_flags
2635  *   Bit flags to mark detected items.
2636  * @param[in] target_protocol
2637  *   The next protocol in the previous item.
2638  * @param[out] error
2639  *   Pointer to error structure.
2640  *
2641  * @return
2642  *   0 on success, a negative errno value otherwise and rte_errno is set.
2643  */
2644 int
2645 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2646                             uint64_t item_flags,
2647                             uint8_t target_protocol,
2648                             struct rte_flow_error *error)
2649 {
2650         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2651         const struct rte_flow_item_gre *mask = item->mask;
2652         int ret;
2653         const struct rte_flow_item_gre nic_mask = {
2654                 .c_rsvd0_ver = RTE_BE16(0xB000),
2655                 .protocol = RTE_BE16(UINT16_MAX),
2656         };
2657
2658         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2659                 return rte_flow_error_set(error, EINVAL,
2660                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2661                                           "protocol filtering not compatible"
2662                                           " with this GRE layer");
2663         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2664                 return rte_flow_error_set(error, ENOTSUP,
2665                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2666                                           "multiple tunnel layers not"
2667                                           " supported");
2668         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2669                 return rte_flow_error_set(error, ENOTSUP,
2670                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2671                                           "L3 Layer is missing");
2672         if (!mask)
2673                 mask = &rte_flow_item_gre_mask;
2674         ret = mlx5_flow_item_acceptable
2675                 (item, (const uint8_t *)mask,
2676                  (const uint8_t *)&nic_mask,
2677                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2678                  error);
2679         if (ret < 0)
2680                 return ret;
2681 #ifndef HAVE_MLX5DV_DR
2682 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2683         if (spec && (spec->protocol & mask->protocol))
2684                 return rte_flow_error_set(error, ENOTSUP,
2685                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2686                                           "without MPLS support the"
2687                                           " specification cannot be used for"
2688                                           " filtering");
2689 #endif
2690 #endif
2691         return 0;
2692 }
2693
2694 /**
2695  * Validate Geneve item.
2696  *
2697  * @param[in] item
2698  *   Item specification.
2699  * @param[in] itemFlags
2700  *   Bit-fields that holds the items detected until now.
2701  * @param[in] enPriv
2702  *   Pointer to the private data structure.
2703  * @param[out] error
2704  *   Pointer to error structure.
2705  *
2706  * @return
2707  *   0 on success, a negative errno value otherwise and rte_errno is set.
2708  */
2709
2710 int
2711 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2712                                uint64_t item_flags,
2713                                struct rte_eth_dev *dev,
2714                                struct rte_flow_error *error)
2715 {
2716         struct mlx5_priv *priv = dev->data->dev_private;
2717         const struct rte_flow_item_geneve *spec = item->spec;
2718         const struct rte_flow_item_geneve *mask = item->mask;
2719         int ret;
2720         uint16_t gbhdr;
2721         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2722                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2723         const struct rte_flow_item_geneve nic_mask = {
2724                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2725                 .vni = "\xff\xff\xff",
2726                 .protocol = RTE_BE16(UINT16_MAX),
2727         };
2728
2729         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2730                 return rte_flow_error_set(error, ENOTSUP,
2731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2732                                           "L3 Geneve is not enabled by device"
2733                                           " parameter and/or not configured in"
2734                                           " firmware");
2735         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2736                 return rte_flow_error_set(error, ENOTSUP,
2737                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2738                                           "multiple tunnel layers not"
2739                                           " supported");
2740         /*
2741          * Verify only UDPv4 is present as defined in
2742          * https://tools.ietf.org/html/rfc7348
2743          */
2744         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2745                 return rte_flow_error_set(error, EINVAL,
2746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2747                                           "no outer UDP layer found");
2748         if (!mask)
2749                 mask = &rte_flow_item_geneve_mask;
2750         ret = mlx5_flow_item_acceptable
2751                                   (item, (const uint8_t *)mask,
2752                                    (const uint8_t *)&nic_mask,
2753                                    sizeof(struct rte_flow_item_geneve),
2754                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2755         if (ret)
2756                 return ret;
2757         if (spec) {
2758                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2759                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2760                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2761                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2762                         return rte_flow_error_set(error, ENOTSUP,
2763                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2764                                                   item,
2765                                                   "Geneve protocol unsupported"
2766                                                   " fields are being used");
2767                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2768                         return rte_flow_error_set
2769                                         (error, ENOTSUP,
2770                                          RTE_FLOW_ERROR_TYPE_ITEM,
2771                                          item,
2772                                          "Unsupported Geneve options length");
2773         }
2774         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2775                 return rte_flow_error_set
2776                                     (error, ENOTSUP,
2777                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2778                                      "Geneve tunnel must be fully defined");
2779         return 0;
2780 }
2781
2782 /**
2783  * Validate Geneve TLV option item.
2784  *
2785  * @param[in] item
2786  *   Item specification.
2787  * @param[in] last_item
2788  *   Previous validated item in the pattern items.
2789  * @param[in] geneve_item
2790  *   Previous GENEVE item specification.
2791  * @param[in] dev
2792  *   Pointer to the rte_eth_dev structure.
2793  * @param[out] error
2794  *   Pointer to error structure.
2795  *
2796  * @return
2797  *   0 on success, a negative errno value otherwise and rte_errno is set.
2798  */
2799 int
2800 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2801                                    uint64_t last_item,
2802                                    const struct rte_flow_item *geneve_item,
2803                                    struct rte_eth_dev *dev,
2804                                    struct rte_flow_error *error)
2805 {
2806         struct mlx5_priv *priv = dev->data->dev_private;
2807         struct mlx5_dev_ctx_shared *sh = priv->sh;
2808         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2809         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2810         uint8_t data_max_supported =
2811                         hca_attr->max_geneve_tlv_option_data_len * 4;
2812         struct mlx5_dev_config *config = &priv->config;
2813         const struct rte_flow_item_geneve *geneve_spec;
2814         const struct rte_flow_item_geneve *geneve_mask;
2815         const struct rte_flow_item_geneve_opt *spec = item->spec;
2816         const struct rte_flow_item_geneve_opt *mask = item->mask;
2817         unsigned int i;
2818         unsigned int data_len;
2819         uint8_t tlv_option_len;
2820         uint16_t optlen_m, optlen_v;
2821         const struct rte_flow_item_geneve_opt full_mask = {
2822                 .option_class = RTE_BE16(0xffff),
2823                 .option_type = 0xff,
2824                 .option_len = 0x1f,
2825         };
2826
2827         if (!mask)
2828                 mask = &rte_flow_item_geneve_opt_mask;
2829         if (!spec)
2830                 return rte_flow_error_set
2831                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2832                         "Geneve TLV opt class/type/length must be specified");
2833         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2834                 return rte_flow_error_set
2835                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2836                         "Geneve TLV opt length exceeeds the limit (31)");
2837         /* Check if class type and length masks are full. */
2838         if (full_mask.option_class != mask->option_class ||
2839             full_mask.option_type != mask->option_type ||
2840             full_mask.option_len != (mask->option_len & full_mask.option_len))
2841                 return rte_flow_error_set
2842                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2843                         "Geneve TLV opt class/type/length masks must be full");
2844         /* Check if length is supported */
2845         if ((uint32_t)spec->option_len >
2846                         config->hca_attr.max_geneve_tlv_option_data_len)
2847                 return rte_flow_error_set
2848                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2849                         "Geneve TLV opt length not supported");
2850         if (config->hca_attr.max_geneve_tlv_options > 1)
2851                 DRV_LOG(DEBUG,
2852                         "max_geneve_tlv_options supports more than 1 option");
2853         /* Check GENEVE item preceding. */
2854         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2855                 return rte_flow_error_set
2856                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2857                         "Geneve opt item must be preceded with Geneve item");
2858         geneve_spec = geneve_item->spec;
2859         geneve_mask = geneve_item->mask ? geneve_item->mask :
2860                                           &rte_flow_item_geneve_mask;
2861         /* Check if GENEVE TLV option size doesn't exceed option length */
2862         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2863                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2864                 tlv_option_len = spec->option_len & mask->option_len;
2865                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2866                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2867                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2868                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2869                 if ((optlen_v & optlen_m) <= tlv_option_len)
2870                         return rte_flow_error_set
2871                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2872                                  "GENEVE TLV option length exceeds optlen");
2873         }
2874         /* Check if length is 0 or data is 0. */
2875         if (spec->data == NULL || spec->option_len == 0)
2876                 return rte_flow_error_set
2877                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2878                         "Geneve TLV opt with zero data/length not supported");
2879         /* Check not all data & mask are 0. */
2880         data_len = spec->option_len * 4;
2881         if (mask->data == NULL) {
2882                 for (i = 0; i < data_len; i++)
2883                         if (spec->data[i])
2884                                 break;
2885                 if (i == data_len)
2886                         return rte_flow_error_set(error, ENOTSUP,
2887                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2888                                 "Can't match on Geneve option data 0");
2889         } else {
2890                 for (i = 0; i < data_len; i++)
2891                         if (spec->data[i] & mask->data[i])
2892                                 break;
2893                 if (i == data_len)
2894                         return rte_flow_error_set(error, ENOTSUP,
2895                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2896                                 "Can't match on Geneve option data and mask 0");
2897                 /* Check data mask supported. */
2898                 for (i = data_max_supported; i < data_len ; i++)
2899                         if (mask->data[i])
2900                                 return rte_flow_error_set(error, ENOTSUP,
2901                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2902                                         "Data mask is of unsupported size");
2903         }
2904         /* Check GENEVE option is supported in NIC. */
2905         if (!config->hca_attr.geneve_tlv_opt)
2906                 return rte_flow_error_set
2907                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2908                         "Geneve TLV opt not supported");
2909         /* Check if we already have geneve option with different type/class. */
2910         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2911         geneve_opt_resource = sh->geneve_tlv_option_resource;
2912         if (geneve_opt_resource != NULL)
2913                 if (geneve_opt_resource->option_class != spec->option_class ||
2914                     geneve_opt_resource->option_type != spec->option_type ||
2915                     geneve_opt_resource->length != spec->option_len) {
2916                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2917                         return rte_flow_error_set(error, ENOTSUP,
2918                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2919                                 "Only one Geneve TLV option supported");
2920                 }
2921         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2922         return 0;
2923 }
2924
2925 /**
2926  * Validate MPLS item.
2927  *
2928  * @param[in] dev
2929  *   Pointer to the rte_eth_dev structure.
2930  * @param[in] item
2931  *   Item specification.
2932  * @param[in] item_flags
2933  *   Bit-fields that holds the items detected until now.
2934  * @param[in] prev_layer
2935  *   The protocol layer indicated in previous item.
2936  * @param[out] error
2937  *   Pointer to error structure.
2938  *
2939  * @return
2940  *   0 on success, a negative errno value otherwise and rte_errno is set.
2941  */
2942 int
2943 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2944                              const struct rte_flow_item *item __rte_unused,
2945                              uint64_t item_flags __rte_unused,
2946                              uint64_t prev_layer __rte_unused,
2947                              struct rte_flow_error *error)
2948 {
2949 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2950         const struct rte_flow_item_mpls *mask = item->mask;
2951         struct mlx5_priv *priv = dev->data->dev_private;
2952         int ret;
2953
2954         if (!priv->config.mpls_en)
2955                 return rte_flow_error_set(error, ENOTSUP,
2956                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2957                                           "MPLS not supported or"
2958                                           " disabled in firmware"
2959                                           " configuration.");
2960         /* MPLS over UDP, GRE is allowed */
2961         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
2962                             MLX5_FLOW_LAYER_GRE |
2963                             MLX5_FLOW_LAYER_GRE_KEY)))
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2966                                           "protocol filtering not compatible"
2967                                           " with MPLS layer");
2968         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2969         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2970             !(item_flags & MLX5_FLOW_LAYER_GRE))
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2973                                           "multiple tunnel layers not"
2974                                           " supported");
2975         if (!mask)
2976                 mask = &rte_flow_item_mpls_mask;
2977         ret = mlx5_flow_item_acceptable
2978                 (item, (const uint8_t *)mask,
2979                  (const uint8_t *)&rte_flow_item_mpls_mask,
2980                  sizeof(struct rte_flow_item_mpls),
2981                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2982         if (ret < 0)
2983                 return ret;
2984         return 0;
2985 #else
2986         return rte_flow_error_set(error, ENOTSUP,
2987                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2988                                   "MPLS is not supported by Verbs, please"
2989                                   " update.");
2990 #endif
2991 }
2992
2993 /**
2994  * Validate NVGRE item.
2995  *
2996  * @param[in] item
2997  *   Item specification.
2998  * @param[in] item_flags
2999  *   Bit flags to mark detected items.
3000  * @param[in] target_protocol
3001  *   The next protocol in the previous item.
3002  * @param[out] error
3003  *   Pointer to error structure.
3004  *
3005  * @return
3006  *   0 on success, a negative errno value otherwise and rte_errno is set.
3007  */
3008 int
3009 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3010                               uint64_t item_flags,
3011                               uint8_t target_protocol,
3012                               struct rte_flow_error *error)
3013 {
3014         const struct rte_flow_item_nvgre *mask = item->mask;
3015         int ret;
3016
3017         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3018                 return rte_flow_error_set(error, EINVAL,
3019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3020                                           "protocol filtering not compatible"
3021                                           " with this GRE layer");
3022         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3023                 return rte_flow_error_set(error, ENOTSUP,
3024                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3025                                           "multiple tunnel layers not"
3026                                           " supported");
3027         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3028                 return rte_flow_error_set(error, ENOTSUP,
3029                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3030                                           "L3 Layer is missing");
3031         if (!mask)
3032                 mask = &rte_flow_item_nvgre_mask;
3033         ret = mlx5_flow_item_acceptable
3034                 (item, (const uint8_t *)mask,
3035                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3036                  sizeof(struct rte_flow_item_nvgre),
3037                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3038         if (ret < 0)
3039                 return ret;
3040         return 0;
3041 }
3042
3043 /**
3044  * Validate eCPRI item.
3045  *
3046  * @param[in] item
3047  *   Item specification.
3048  * @param[in] item_flags
3049  *   Bit-fields that holds the items detected until now.
3050  * @param[in] last_item
3051  *   Previous validated item in the pattern items.
3052  * @param[in] ether_type
3053  *   Type in the ethernet layer header (including dot1q).
3054  * @param[in] acc_mask
3055  *   Acceptable mask, if NULL default internal default mask
3056  *   will be used to check whether item fields are supported.
3057  * @param[out] error
3058  *   Pointer to error structure.
3059  *
3060  * @return
3061  *   0 on success, a negative errno value otherwise and rte_errno is set.
3062  */
3063 int
3064 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3065                               uint64_t item_flags,
3066                               uint64_t last_item,
3067                               uint16_t ether_type,
3068                               const struct rte_flow_item_ecpri *acc_mask,
3069                               struct rte_flow_error *error)
3070 {
3071         const struct rte_flow_item_ecpri *mask = item->mask;
3072         const struct rte_flow_item_ecpri nic_mask = {
3073                 .hdr = {
3074                         .common = {
3075                                 .u32 =
3076                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3077                                         .type = 0xFF,
3078                                         }).u32),
3079                         },
3080                         .dummy[0] = 0xFFFFFFFF,
3081                 },
3082         };
3083         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3084                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3085         struct rte_flow_item_ecpri mask_lo;
3086
3087         if (!(last_item & outer_l2_vlan) &&
3088             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3089                 return rte_flow_error_set(error, EINVAL,
3090                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3091                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3092         if ((last_item & outer_l2_vlan) && ether_type &&
3093             ether_type != RTE_ETHER_TYPE_ECPRI)
3094                 return rte_flow_error_set(error, EINVAL,
3095                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3096                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3097         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3098                 return rte_flow_error_set(error, EINVAL,
3099                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3100                                           "eCPRI with tunnel is not supported right now");
3101         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3102                 return rte_flow_error_set(error, ENOTSUP,
3103                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3104                                           "multiple L3 layers not supported");
3105         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3106                 return rte_flow_error_set(error, EINVAL,
3107                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3108                                           "eCPRI cannot coexist with a TCP layer");
3109         /* In specification, eCPRI could be over UDP layer. */
3110         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3111                 return rte_flow_error_set(error, EINVAL,
3112                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3113                                           "eCPRI over UDP layer is not yet supported right now");
3114         /* Mask for type field in common header could be zero. */
3115         if (!mask)
3116                 mask = &rte_flow_item_ecpri_mask;
3117         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3118         /* Input mask is in big-endian format. */
3119         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3120                 return rte_flow_error_set(error, EINVAL,
3121                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3122                                           "partial mask is not supported for protocol");
3123         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3124                 return rte_flow_error_set(error, EINVAL,
3125                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3126                                           "message header mask must be after a type mask");
3127         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3128                                          acc_mask ? (const uint8_t *)acc_mask
3129                                                   : (const uint8_t *)&nic_mask,
3130                                          sizeof(struct rte_flow_item_ecpri),
3131                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3132 }
3133
3134 static int
3135 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3136                    const struct rte_flow_attr *attr __rte_unused,
3137                    const struct rte_flow_item items[] __rte_unused,
3138                    const struct rte_flow_action actions[] __rte_unused,
3139                    bool external __rte_unused,
3140                    int hairpin __rte_unused,
3141                    struct rte_flow_error *error)
3142 {
3143         return rte_flow_error_set(error, ENOTSUP,
3144                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3145 }
3146
3147 static struct mlx5_flow *
3148 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3149                   const struct rte_flow_attr *attr __rte_unused,
3150                   const struct rte_flow_item items[] __rte_unused,
3151                   const struct rte_flow_action actions[] __rte_unused,
3152                   struct rte_flow_error *error)
3153 {
3154         rte_flow_error_set(error, ENOTSUP,
3155                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3156         return NULL;
3157 }
3158
3159 static int
3160 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3161                     struct mlx5_flow *dev_flow __rte_unused,
3162                     const struct rte_flow_attr *attr __rte_unused,
3163                     const struct rte_flow_item items[] __rte_unused,
3164                     const struct rte_flow_action actions[] __rte_unused,
3165                     struct rte_flow_error *error)
3166 {
3167         return rte_flow_error_set(error, ENOTSUP,
3168                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3169 }
3170
3171 static int
3172 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3173                 struct rte_flow *flow __rte_unused,
3174                 struct rte_flow_error *error)
3175 {
3176         return rte_flow_error_set(error, ENOTSUP,
3177                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3178 }
3179
3180 static void
3181 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3182                  struct rte_flow *flow __rte_unused)
3183 {
3184 }
3185
3186 static void
3187 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3188                   struct rte_flow *flow __rte_unused)
3189 {
3190 }
3191
3192 static int
3193 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3194                 struct rte_flow *flow __rte_unused,
3195                 const struct rte_flow_action *actions __rte_unused,
3196                 void *data __rte_unused,
3197                 struct rte_flow_error *error)
3198 {
3199         return rte_flow_error_set(error, ENOTSUP,
3200                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3201 }
3202
3203 static int
3204 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3205                       uint32_t domains __rte_unused,
3206                       uint32_t flags __rte_unused)
3207 {
3208         return 0;
3209 }
3210
3211 /* Void driver to protect from null pointer reference. */
3212 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3213         .validate = flow_null_validate,
3214         .prepare = flow_null_prepare,
3215         .translate = flow_null_translate,
3216         .apply = flow_null_apply,
3217         .remove = flow_null_remove,
3218         .destroy = flow_null_destroy,
3219         .query = flow_null_query,
3220         .sync_domain = flow_null_sync_domain,
3221 };
3222
3223 /**
3224  * Select flow driver type according to flow attributes and device
3225  * configuration.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the dev structure.
3229  * @param[in] attr
3230  *   Pointer to the flow attributes.
3231  *
3232  * @return
3233  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3234  */
3235 static enum mlx5_flow_drv_type
3236 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3237 {
3238         struct mlx5_priv *priv = dev->data->dev_private;
3239         /* The OS can determine first a specific flow type (DV, VERBS) */
3240         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3241
3242         if (type != MLX5_FLOW_TYPE_MAX)
3243                 return type;
3244         /* If no OS specific type - continue with DV/VERBS selection */
3245         if (attr->transfer && priv->config.dv_esw_en)
3246                 type = MLX5_FLOW_TYPE_DV;
3247         if (!attr->transfer)
3248                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3249                                                  MLX5_FLOW_TYPE_VERBS;
3250         return type;
3251 }
3252
3253 #define flow_get_drv_ops(type) flow_drv_ops[type]
3254
3255 /**
3256  * Flow driver validation API. This abstracts calling driver specific functions.
3257  * The type of flow driver is determined according to flow attributes.
3258  *
3259  * @param[in] dev
3260  *   Pointer to the dev structure.
3261  * @param[in] attr
3262  *   Pointer to the flow attributes.
3263  * @param[in] items
3264  *   Pointer to the list of items.
3265  * @param[in] actions
3266  *   Pointer to the list of actions.
3267  * @param[in] external
3268  *   This flow rule is created by request external to PMD.
3269  * @param[in] hairpin
3270  *   Number of hairpin TX actions, 0 means classic flow.
3271  * @param[out] error
3272  *   Pointer to the error structure.
3273  *
3274  * @return
3275  *   0 on success, a negative errno value otherwise and rte_errno is set.
3276  */
3277 static inline int
3278 flow_drv_validate(struct rte_eth_dev *dev,
3279                   const struct rte_flow_attr *attr,
3280                   const struct rte_flow_item items[],
3281                   const struct rte_flow_action actions[],
3282                   bool external, int hairpin, struct rte_flow_error *error)
3283 {
3284         const struct mlx5_flow_driver_ops *fops;
3285         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3286
3287         fops = flow_get_drv_ops(type);
3288         return fops->validate(dev, attr, items, actions, external,
3289                               hairpin, error);
3290 }
3291
3292 /**
3293  * Flow driver preparation API. This abstracts calling driver specific
3294  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3295  * calculates the size of memory required for device flow, allocates the memory,
3296  * initializes the device flow and returns the pointer.
3297  *
3298  * @note
3299  *   This function initializes device flow structure such as dv or verbs in
3300  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3301  *   rest. For example, adding returning device flow to flow->dev_flow list and
3302  *   setting backward reference to the flow should be done out of this function.
3303  *   layers field is not filled either.
3304  *
3305  * @param[in] dev
3306  *   Pointer to the dev structure.
3307  * @param[in] attr
3308  *   Pointer to the flow attributes.
3309  * @param[in] items
3310  *   Pointer to the list of items.
3311  * @param[in] actions
3312  *   Pointer to the list of actions.
3313  * @param[in] flow_idx
3314  *   This memory pool index to the flow.
3315  * @param[out] error
3316  *   Pointer to the error structure.
3317  *
3318  * @return
3319  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3320  */
3321 static inline struct mlx5_flow *
3322 flow_drv_prepare(struct rte_eth_dev *dev,
3323                  const struct rte_flow *flow,
3324                  const struct rte_flow_attr *attr,
3325                  const struct rte_flow_item items[],
3326                  const struct rte_flow_action actions[],
3327                  uint32_t flow_idx,
3328                  struct rte_flow_error *error)
3329 {
3330         const struct mlx5_flow_driver_ops *fops;
3331         enum mlx5_flow_drv_type type = flow->drv_type;
3332         struct mlx5_flow *mlx5_flow = NULL;
3333
3334         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3335         fops = flow_get_drv_ops(type);
3336         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3337         if (mlx5_flow)
3338                 mlx5_flow->flow_idx = flow_idx;
3339         return mlx5_flow;
3340 }
3341
3342 /**
3343  * Flow driver translation API. This abstracts calling driver specific
3344  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3345  * translates a generic flow into a driver flow. flow_drv_prepare() must
3346  * precede.
3347  *
3348  * @note
3349  *   dev_flow->layers could be filled as a result of parsing during translation
3350  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3351  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3352  *   flow->actions could be overwritten even though all the expanded dev_flows
3353  *   have the same actions.
3354  *
3355  * @param[in] dev
3356  *   Pointer to the rte dev structure.
3357  * @param[in, out] dev_flow
3358  *   Pointer to the mlx5 flow.
3359  * @param[in] attr
3360  *   Pointer to the flow attributes.
3361  * @param[in] items
3362  *   Pointer to the list of items.
3363  * @param[in] actions
3364  *   Pointer to the list of actions.
3365  * @param[out] error
3366  *   Pointer to the error structure.
3367  *
3368  * @return
3369  *   0 on success, a negative errno value otherwise and rte_errno is set.
3370  */
3371 static inline int
3372 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3373                    const struct rte_flow_attr *attr,
3374                    const struct rte_flow_item items[],
3375                    const struct rte_flow_action actions[],
3376                    struct rte_flow_error *error)
3377 {
3378         const struct mlx5_flow_driver_ops *fops;
3379         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3380
3381         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3382         fops = flow_get_drv_ops(type);
3383         return fops->translate(dev, dev_flow, attr, items, actions, error);
3384 }
3385
3386 /**
3387  * Flow driver apply API. This abstracts calling driver specific functions.
3388  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3389  * translated driver flows on to device. flow_drv_translate() must precede.
3390  *
3391  * @param[in] dev
3392  *   Pointer to Ethernet device structure.
3393  * @param[in, out] flow
3394  *   Pointer to flow structure.
3395  * @param[out] error
3396  *   Pointer to error structure.
3397  *
3398  * @return
3399  *   0 on success, a negative errno value otherwise and rte_errno is set.
3400  */
3401 static inline int
3402 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3403                struct rte_flow_error *error)
3404 {
3405         const struct mlx5_flow_driver_ops *fops;
3406         enum mlx5_flow_drv_type type = flow->drv_type;
3407
3408         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3409         fops = flow_get_drv_ops(type);
3410         return fops->apply(dev, flow, error);
3411 }
3412
3413 /**
3414  * Flow driver destroy API. This abstracts calling driver specific functions.
3415  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3416  * on device and releases resources of the flow.
3417  *
3418  * @param[in] dev
3419  *   Pointer to Ethernet device.
3420  * @param[in, out] flow
3421  *   Pointer to flow structure.
3422  */
3423 static inline void
3424 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3425 {
3426         const struct mlx5_flow_driver_ops *fops;
3427         enum mlx5_flow_drv_type type = flow->drv_type;
3428
3429         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3430         fops = flow_get_drv_ops(type);
3431         fops->destroy(dev, flow);
3432 }
3433
3434 /**
3435  * Flow driver find RSS policy tbl API. This abstracts calling driver
3436  * specific functions. Parent flow (rte_flow) should have driver
3437  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3438  *
3439  * @param[in] dev
3440  *   Pointer to Ethernet device.
3441  * @param[in, out] flow
3442  *   Pointer to flow structure.
3443  * @param[in] policy
3444  *   Pointer to meter policy table.
3445  * @param[in] rss_desc
3446  *   Pointer to rss_desc
3447  */
3448 static struct mlx5_flow_meter_sub_policy *
3449 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3450                 struct rte_flow *flow,
3451                 struct mlx5_flow_meter_policy *policy,
3452                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3453 {
3454         const struct mlx5_flow_driver_ops *fops;
3455         enum mlx5_flow_drv_type type = flow->drv_type;
3456
3457         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3458         fops = flow_get_drv_ops(type);
3459         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3460 }
3461
3462 /**
3463  * Flow driver color tag rule API. This abstracts calling driver
3464  * specific functions. Parent flow (rte_flow) should have driver
3465  * type (drv_type). It will create the color tag rules in hierarchy meter.
3466  *
3467  * @param[in] dev
3468  *   Pointer to Ethernet device.
3469  * @param[in, out] flow
3470  *   Pointer to flow structure.
3471  * @param[in] fm
3472  *   Pointer to flow meter structure.
3473  * @param[in] src_port
3474  *   The src port this extra rule should use.
3475  * @param[in] item
3476  *   The src port id match item.
3477  * @param[out] error
3478  *   Pointer to error structure.
3479  */
3480 static int
3481 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3482                 struct rte_flow *flow,
3483                 struct mlx5_flow_meter_info *fm,
3484                 int32_t src_port,
3485                 const struct rte_flow_item *item,
3486                 struct rte_flow_error *error)
3487 {
3488         const struct mlx5_flow_driver_ops *fops;
3489         enum mlx5_flow_drv_type type = flow->drv_type;
3490
3491         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3492         fops = flow_get_drv_ops(type);
3493         return fops->meter_hierarchy_rule_create(dev, fm,
3494                                                 src_port, item, error);
3495 }
3496
3497 /**
3498  * Get RSS action from the action list.
3499  *
3500  * @param[in] dev
3501  *   Pointer to Ethernet device.
3502  * @param[in] actions
3503  *   Pointer to the list of actions.
3504  * @param[in] flow
3505  *   Parent flow structure pointer.
3506  *
3507  * @return
3508  *   Pointer to the RSS action if exist, else return NULL.
3509  */
3510 static const struct rte_flow_action_rss*
3511 flow_get_rss_action(struct rte_eth_dev *dev,
3512                     const struct rte_flow_action actions[])
3513 {
3514         struct mlx5_priv *priv = dev->data->dev_private;
3515         const struct rte_flow_action_rss *rss = NULL;
3516
3517         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3518                 switch (actions->type) {
3519                 case RTE_FLOW_ACTION_TYPE_RSS:
3520                         rss = actions->conf;
3521                         break;
3522                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3523                 {
3524                         const struct rte_flow_action_sample *sample =
3525                                                                 actions->conf;
3526                         const struct rte_flow_action *act = sample->actions;
3527                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3528                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3529                                         rss = act->conf;
3530                         break;
3531                 }
3532                 case RTE_FLOW_ACTION_TYPE_METER:
3533                 {
3534                         uint32_t mtr_idx;
3535                         struct mlx5_flow_meter_info *fm;
3536                         struct mlx5_flow_meter_policy *policy;
3537                         const struct rte_flow_action_meter *mtr = actions->conf;
3538
3539                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3540                         if (fm && !fm->def_policy) {
3541                                 policy = mlx5_flow_meter_policy_find(dev,
3542                                                 fm->policy_id, NULL);
3543                                 MLX5_ASSERT(policy);
3544                                 if (policy->is_hierarchy) {
3545                                         policy =
3546                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3547                                                                         policy);
3548                                         if (!policy)
3549                                                 return NULL;
3550                                 }
3551                                 if (policy->is_rss)
3552                                         rss =
3553                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3554                         }
3555                         break;
3556                 }
3557                 default:
3558                         break;
3559                 }
3560         }
3561         return rss;
3562 }
3563
3564 /**
3565  * Get ASO age action by index.
3566  *
3567  * @param[in] dev
3568  *   Pointer to the Ethernet device structure.
3569  * @param[in] age_idx
3570  *   Index to the ASO age action.
3571  *
3572  * @return
3573  *   The specified ASO age action.
3574  */
3575 struct mlx5_aso_age_action*
3576 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3577 {
3578         uint16_t pool_idx = age_idx & UINT16_MAX;
3579         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3580         struct mlx5_priv *priv = dev->data->dev_private;
3581         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3582         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3583
3584         return &pool->actions[offset - 1];
3585 }
3586
3587 /* maps indirect action to translated direct in some actions array */
3588 struct mlx5_translated_action_handle {
3589         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3590         int index; /**< Index in related array of rte_flow_action. */
3591 };
3592
3593 /**
3594  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3595  * direct action if translation possible.
3596  * This functionality used to run same execution path for both direct and
3597  * indirect actions on flow create. All necessary preparations for indirect
3598  * action handling should be performed on *handle* actions list returned
3599  * from this call.
3600  *
3601  * @param[in] dev
3602  *   Pointer to Ethernet device.
3603  * @param[in] actions
3604  *   List of actions to translate.
3605  * @param[out] handle
3606  *   List to store translated indirect action object handles.
3607  * @param[in, out] indir_n
3608  *   Size of *handle* array. On return should be updated with number of
3609  *   indirect actions retrieved from the *actions* list.
3610  * @param[out] translated_actions
3611  *   List of actions where all indirect actions were translated to direct
3612  *   if possible. NULL if no translation took place.
3613  * @param[out] error
3614  *   Pointer to the error structure.
3615  *
3616  * @return
3617  *   0 on success, a negative errno value otherwise and rte_errno is set.
3618  */
3619 static int
3620 flow_action_handles_translate(struct rte_eth_dev *dev,
3621                               const struct rte_flow_action actions[],
3622                               struct mlx5_translated_action_handle *handle,
3623                               int *indir_n,
3624                               struct rte_flow_action **translated_actions,
3625                               struct rte_flow_error *error)
3626 {
3627         struct mlx5_priv *priv = dev->data->dev_private;
3628         struct rte_flow_action *translated = NULL;
3629         size_t actions_size;
3630         int n;
3631         int copied_n = 0;
3632         struct mlx5_translated_action_handle *handle_end = NULL;
3633
3634         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3635                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3636                         continue;
3637                 if (copied_n == *indir_n) {
3638                         return rte_flow_error_set
3639                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3640                                  NULL, "too many shared actions");
3641                 }
3642                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3643                            sizeof(actions[n].conf));
3644                 handle[copied_n].index = n;
3645                 copied_n++;
3646         }
3647         n++;
3648         *indir_n = copied_n;
3649         if (!copied_n)
3650                 return 0;
3651         actions_size = sizeof(struct rte_flow_action) * n;
3652         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3653         if (!translated) {
3654                 rte_errno = ENOMEM;
3655                 return -ENOMEM;
3656         }
3657         memcpy(translated, actions, actions_size);
3658         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3659                 struct mlx5_shared_action_rss *shared_rss;
3660                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3661                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3662                 uint32_t idx = act_idx &
3663                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3664
3665                 switch (type) {
3666                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3667                         shared_rss = mlx5_ipool_get
3668                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3669                         translated[handle->index].type =
3670                                 RTE_FLOW_ACTION_TYPE_RSS;
3671                         translated[handle->index].conf =
3672                                 &shared_rss->origin;
3673                         break;
3674                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3675                         translated[handle->index].type =
3676                                                 (enum rte_flow_action_type)
3677                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3678                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3679                         break;
3680                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3681                         if (priv->sh->flow_hit_aso_en) {
3682                                 translated[handle->index].type =
3683                                         (enum rte_flow_action_type)
3684                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3685                                 translated[handle->index].conf =
3686                                                          (void *)(uintptr_t)idx;
3687                                 break;
3688                         }
3689                         /* Fall-through */
3690                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3691                         if (priv->sh->ct_aso_en) {
3692                                 translated[handle->index].type =
3693                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3694                                 translated[handle->index].conf =
3695                                                          (void *)(uintptr_t)idx;
3696                                 break;
3697                         }
3698                         /* Fall-through */
3699                 default:
3700                         mlx5_free(translated);
3701                         return rte_flow_error_set
3702                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3703                                  NULL, "invalid indirect action type");
3704                 }
3705         }
3706         *translated_actions = translated;
3707         return 0;
3708 }
3709
3710 /**
3711  * Get Shared RSS action from the action list.
3712  *
3713  * @param[in] dev
3714  *   Pointer to Ethernet device.
3715  * @param[in] shared
3716  *   Pointer to the list of actions.
3717  * @param[in] shared_n
3718  *   Actions list length.
3719  *
3720  * @return
3721  *   The MLX5 RSS action ID if exists, otherwise return 0.
3722  */
3723 static uint32_t
3724 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3725                            struct mlx5_translated_action_handle *handle,
3726                            int shared_n)
3727 {
3728         struct mlx5_translated_action_handle *handle_end;
3729         struct mlx5_priv *priv = dev->data->dev_private;
3730         struct mlx5_shared_action_rss *shared_rss;
3731
3732
3733         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3734                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3735                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3736                 uint32_t idx = act_idx &
3737                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3738                 switch (type) {
3739                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3740                         shared_rss = mlx5_ipool_get
3741                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3742                                                                            idx);
3743                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3744                                            __ATOMIC_RELAXED);
3745                         return idx;
3746                 default:
3747                         break;
3748                 }
3749         }
3750         return 0;
3751 }
3752
3753 static unsigned int
3754 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3755 {
3756         const struct rte_flow_item *item;
3757         unsigned int has_vlan = 0;
3758
3759         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3760                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3761                         has_vlan = 1;
3762                         break;
3763                 }
3764         }
3765         if (has_vlan)
3766                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3767                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3768         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3769                                MLX5_EXPANSION_ROOT_OUTER;
3770 }
3771
3772 /**
3773  *  Get layer flags from the prefix flow.
3774  *
3775  *  Some flows may be split to several subflows, the prefix subflow gets the
3776  *  match items and the suffix sub flow gets the actions.
3777  *  Some actions need the user defined match item flags to get the detail for
3778  *  the action.
3779  *  This function helps the suffix flow to get the item layer flags from prefix
3780  *  subflow.
3781  *
3782  * @param[in] dev_flow
3783  *   Pointer the created preifx subflow.
3784  *
3785  * @return
3786  *   The layers get from prefix subflow.
3787  */
3788 static inline uint64_t
3789 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3790 {
3791         uint64_t layers = 0;
3792
3793         /*
3794          * Layers bits could be localization, but usually the compiler will
3795          * help to do the optimization work for source code.
3796          * If no decap actions, use the layers directly.
3797          */
3798         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3799                 return dev_flow->handle->layers;
3800         /* Convert L3 layers with decap action. */
3801         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3802                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3803         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3804                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3805         /* Convert L4 layers with decap action.  */
3806         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3807                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3808         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3809                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3810         return layers;
3811 }
3812
3813 /**
3814  * Get metadata split action information.
3815  *
3816  * @param[in] actions
3817  *   Pointer to the list of actions.
3818  * @param[out] qrss
3819  *   Pointer to the return pointer.
3820  * @param[out] qrss_type
3821  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3822  *   if no QUEUE/RSS is found.
3823  * @param[out] encap_idx
3824  *   Pointer to the index of the encap action if exists, otherwise the last
3825  *   action index.
3826  *
3827  * @return
3828  *   Total number of actions.
3829  */
3830 static int
3831 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3832                                        const struct rte_flow_action **qrss,
3833                                        int *encap_idx)
3834 {
3835         const struct rte_flow_action_raw_encap *raw_encap;
3836         int actions_n = 0;
3837         int raw_decap_idx = -1;
3838
3839         *encap_idx = -1;
3840         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3841                 switch (actions->type) {
3842                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3843                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3844                         *encap_idx = actions_n;
3845                         break;
3846                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3847                         raw_decap_idx = actions_n;
3848                         break;
3849                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3850                         raw_encap = actions->conf;
3851                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3852                                 *encap_idx = raw_decap_idx != -1 ?
3853                                                       raw_decap_idx : actions_n;
3854                         break;
3855                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3856                 case RTE_FLOW_ACTION_TYPE_RSS:
3857                         *qrss = actions;
3858                         break;
3859                 default:
3860                         break;
3861                 }
3862                 actions_n++;
3863         }
3864         if (*encap_idx == -1)
3865                 *encap_idx = actions_n;
3866         /* Count RTE_FLOW_ACTION_TYPE_END. */
3867         return actions_n + 1;
3868 }
3869
3870 /**
3871  * Check if the action will change packet.
3872  *
3873  * @param dev
3874  *   Pointer to Ethernet device.
3875  * @param[in] type
3876  *   action type.
3877  *
3878  * @return
3879  *   true if action will change packet, false otherwise.
3880  */
3881 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3882                                           enum rte_flow_action_type type)
3883 {
3884         struct mlx5_priv *priv = dev->data->dev_private;
3885
3886         switch (type) {
3887         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3888         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3889         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3890         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3891         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3892         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3893         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3894         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3895         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3896         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3897         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3898         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3899         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3900         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3901         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3902         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3903         case RTE_FLOW_ACTION_TYPE_SET_META:
3904         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3905         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3906         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3907         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3908         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3909         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3910         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3911         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3912         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3913         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3914         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3915         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3916                 return true;
3917         case RTE_FLOW_ACTION_TYPE_FLAG:
3918         case RTE_FLOW_ACTION_TYPE_MARK:
3919                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3920                         return true;
3921                 else
3922                         return false;
3923         default:
3924                 return false;
3925         }
3926 }
3927
3928 /**
3929  * Check meter action from the action list.
3930  *
3931  * @param dev
3932  *   Pointer to Ethernet device.
3933  * @param[in] actions
3934  *   Pointer to the list of actions.
3935  * @param[out] has_mtr
3936  *   Pointer to the meter exist flag.
3937  * @param[out] has_modify
3938  *   Pointer to the flag showing there's packet change action.
3939  * @param[out] meter_id
3940  *   Pointer to the meter id.
3941  *
3942  * @return
3943  *   Total number of actions.
3944  */
3945 static int
3946 flow_check_meter_action(struct rte_eth_dev *dev,
3947                         const struct rte_flow_action actions[],
3948                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3949 {
3950         const struct rte_flow_action_meter *mtr = NULL;
3951         int actions_n = 0;
3952
3953         MLX5_ASSERT(has_mtr);
3954         *has_mtr = false;
3955         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3956                 switch (actions->type) {
3957                 case RTE_FLOW_ACTION_TYPE_METER:
3958                         mtr = actions->conf;
3959                         *meter_id = mtr->mtr_id;
3960                         *has_mtr = true;
3961                         break;
3962                 default:
3963                         break;
3964                 }
3965                 if (!*has_mtr)
3966                         *has_modify |= flow_check_modify_action_type(dev,
3967                                                                 actions->type);
3968                 actions_n++;
3969         }
3970         /* Count RTE_FLOW_ACTION_TYPE_END. */
3971         return actions_n + 1;
3972 }
3973
3974 /**
3975  * Check if the flow should be split due to hairpin.
3976  * The reason for the split is that in current HW we can't
3977  * support encap and push-vlan on Rx, so if a flow contains
3978  * these actions we move it to Tx.
3979  *
3980  * @param dev
3981  *   Pointer to Ethernet device.
3982  * @param[in] attr
3983  *   Flow rule attributes.
3984  * @param[in] actions
3985  *   Associated actions (list terminated by the END action).
3986  *
3987  * @return
3988  *   > 0 the number of actions and the flow should be split,
3989  *   0 when no split required.
3990  */
3991 static int
3992 flow_check_hairpin_split(struct rte_eth_dev *dev,
3993                          const struct rte_flow_attr *attr,
3994                          const struct rte_flow_action actions[])
3995 {
3996         int queue_action = 0;
3997         int action_n = 0;
3998         int split = 0;
3999         const struct rte_flow_action_queue *queue;
4000         const struct rte_flow_action_rss *rss;
4001         const struct rte_flow_action_raw_encap *raw_encap;
4002         const struct rte_eth_hairpin_conf *conf;
4003
4004         if (!attr->ingress)
4005                 return 0;
4006         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4007                 switch (actions->type) {
4008                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4009                         queue = actions->conf;
4010                         if (queue == NULL)
4011                                 return 0;
4012                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4013                         if (conf == NULL || conf->tx_explicit != 0)
4014                                 return 0;
4015                         queue_action = 1;
4016                         action_n++;
4017                         break;
4018                 case RTE_FLOW_ACTION_TYPE_RSS:
4019                         rss = actions->conf;
4020                         if (rss == NULL || rss->queue_num == 0)
4021                                 return 0;
4022                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4023                         if (conf == NULL || conf->tx_explicit != 0)
4024                                 return 0;
4025                         queue_action = 1;
4026                         action_n++;
4027                         break;
4028                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4029                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4030                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4031                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4032                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4033                         split++;
4034                         action_n++;
4035                         break;
4036                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4037                         raw_encap = actions->conf;
4038                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4039                                 split++;
4040                         action_n++;
4041                         break;
4042                 default:
4043                         action_n++;
4044                         break;
4045                 }
4046         }
4047         if (split && queue_action)
4048                 return action_n;
4049         return 0;
4050 }
4051
4052 /* Declare flow create/destroy prototype in advance. */
4053 static uint32_t
4054 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4055                  const struct rte_flow_attr *attr,
4056                  const struct rte_flow_item items[],
4057                  const struct rte_flow_action actions[],
4058                  bool external, struct rte_flow_error *error);
4059
4060 static void
4061 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4062                   uint32_t flow_idx);
4063
4064 int
4065 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4066                       struct mlx5_list_entry *entry, void *cb_ctx)
4067 {
4068         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4069         struct mlx5_flow_mreg_copy_resource *mcp_res =
4070                                container_of(entry, typeof(*mcp_res), hlist_ent);
4071
4072         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4073 }
4074
4075 struct mlx5_list_entry *
4076 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4077 {
4078         struct rte_eth_dev *dev = tool_ctx;
4079         struct mlx5_priv *priv = dev->data->dev_private;
4080         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4081         struct mlx5_flow_mreg_copy_resource *mcp_res;
4082         struct rte_flow_error *error = ctx->error;
4083         uint32_t idx = 0;
4084         int ret;
4085         uint32_t mark_id = *(uint32_t *)(ctx->data);
4086         struct rte_flow_attr attr = {
4087                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4088                 .ingress = 1,
4089         };
4090         struct mlx5_rte_flow_item_tag tag_spec = {
4091                 .data = mark_id,
4092         };
4093         struct rte_flow_item items[] = {
4094                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4095         };
4096         struct rte_flow_action_mark ftag = {
4097                 .id = mark_id,
4098         };
4099         struct mlx5_flow_action_copy_mreg cp_mreg = {
4100                 .dst = REG_B,
4101                 .src = REG_NON,
4102         };
4103         struct rte_flow_action_jump jump = {
4104                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4105         };
4106         struct rte_flow_action actions[] = {
4107                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4108         };
4109
4110         /* Fill the register fileds in the flow. */
4111         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4112         if (ret < 0)
4113                 return NULL;
4114         tag_spec.id = ret;
4115         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4116         if (ret < 0)
4117                 return NULL;
4118         cp_mreg.src = ret;
4119         /* Provide the full width of FLAG specific value. */
4120         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4121                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4122         /* Build a new flow. */
4123         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4124                 items[0] = (struct rte_flow_item){
4125                         .type = (enum rte_flow_item_type)
4126                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4127                         .spec = &tag_spec,
4128                 };
4129                 items[1] = (struct rte_flow_item){
4130                         .type = RTE_FLOW_ITEM_TYPE_END,
4131                 };
4132                 actions[0] = (struct rte_flow_action){
4133                         .type = (enum rte_flow_action_type)
4134                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4135                         .conf = &ftag,
4136                 };
4137                 actions[1] = (struct rte_flow_action){
4138                         .type = (enum rte_flow_action_type)
4139                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4140                         .conf = &cp_mreg,
4141                 };
4142                 actions[2] = (struct rte_flow_action){
4143                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4144                         .conf = &jump,
4145                 };
4146                 actions[3] = (struct rte_flow_action){
4147                         .type = RTE_FLOW_ACTION_TYPE_END,
4148                 };
4149         } else {
4150                 /* Default rule, wildcard match. */
4151                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4152                 items[0] = (struct rte_flow_item){
4153                         .type = RTE_FLOW_ITEM_TYPE_END,
4154                 };
4155                 actions[0] = (struct rte_flow_action){
4156                         .type = (enum rte_flow_action_type)
4157                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4158                         .conf = &cp_mreg,
4159                 };
4160                 actions[1] = (struct rte_flow_action){
4161                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4162                         .conf = &jump,
4163                 };
4164                 actions[2] = (struct rte_flow_action){
4165                         .type = RTE_FLOW_ACTION_TYPE_END,
4166                 };
4167         }
4168         /* Build a new entry. */
4169         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4170         if (!mcp_res) {
4171                 rte_errno = ENOMEM;
4172                 return NULL;
4173         }
4174         mcp_res->idx = idx;
4175         mcp_res->mark_id = mark_id;
4176         /*
4177          * The copy Flows are not included in any list. There
4178          * ones are referenced from other Flows and can not
4179          * be applied, removed, deleted in ardbitrary order
4180          * by list traversing.
4181          */
4182         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4183                                         &attr, items, actions, false, error);
4184         if (!mcp_res->rix_flow) {
4185                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4186                 return NULL;
4187         }
4188         return &mcp_res->hlist_ent;
4189 }
4190
4191 struct mlx5_list_entry *
4192 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4193                       void *cb_ctx __rte_unused)
4194 {
4195         struct rte_eth_dev *dev = tool_ctx;
4196         struct mlx5_priv *priv = dev->data->dev_private;
4197         struct mlx5_flow_mreg_copy_resource *mcp_res;
4198         uint32_t idx = 0;
4199
4200         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4201         if (!mcp_res) {
4202                 rte_errno = ENOMEM;
4203                 return NULL;
4204         }
4205         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4206         mcp_res->idx = idx;
4207         return &mcp_res->hlist_ent;
4208 }
4209
4210 void
4211 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4212 {
4213         struct mlx5_flow_mreg_copy_resource *mcp_res =
4214                                container_of(entry, typeof(*mcp_res), hlist_ent);
4215         struct rte_eth_dev *dev = tool_ctx;
4216         struct mlx5_priv *priv = dev->data->dev_private;
4217
4218         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4219 }
4220
4221 /**
4222  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4223  *
4224  * As mark_id is unique, if there's already a registered flow for the mark_id,
4225  * return by increasing the reference counter of the resource. Otherwise, create
4226  * the resource (mcp_res) and flow.
4227  *
4228  * Flow looks like,
4229  *   - If ingress port is ANY and reg_c[1] is mark_id,
4230  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4231  *
4232  * For default flow (zero mark_id), flow is like,
4233  *   - If ingress port is ANY,
4234  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4235  *
4236  * @param dev
4237  *   Pointer to Ethernet device.
4238  * @param mark_id
4239  *   ID of MARK action, zero means default flow for META.
4240  * @param[out] error
4241  *   Perform verbose error reporting if not NULL.
4242  *
4243  * @return
4244  *   Associated resource on success, NULL otherwise and rte_errno is set.
4245  */
4246 static struct mlx5_flow_mreg_copy_resource *
4247 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4248                           struct rte_flow_error *error)
4249 {
4250         struct mlx5_priv *priv = dev->data->dev_private;
4251         struct mlx5_list_entry *entry;
4252         struct mlx5_flow_cb_ctx ctx = {
4253                 .dev = dev,
4254                 .error = error,
4255                 .data = &mark_id,
4256         };
4257
4258         /* Check if already registered. */
4259         MLX5_ASSERT(priv->mreg_cp_tbl);
4260         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4261         if (!entry)
4262                 return NULL;
4263         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4264                             hlist_ent);
4265 }
4266
4267 void
4268 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4269 {
4270         struct mlx5_flow_mreg_copy_resource *mcp_res =
4271                                container_of(entry, typeof(*mcp_res), hlist_ent);
4272         struct rte_eth_dev *dev = tool_ctx;
4273         struct mlx5_priv *priv = dev->data->dev_private;
4274
4275         MLX5_ASSERT(mcp_res->rix_flow);
4276         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4277         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4278 }
4279
4280 /**
4281  * Release flow in RX_CP_TBL.
4282  *
4283  * @param dev
4284  *   Pointer to Ethernet device.
4285  * @flow
4286  *   Parent flow for wich copying is provided.
4287  */
4288 static void
4289 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4290                           struct rte_flow *flow)
4291 {
4292         struct mlx5_flow_mreg_copy_resource *mcp_res;
4293         struct mlx5_priv *priv = dev->data->dev_private;
4294
4295         if (!flow->rix_mreg_copy)
4296                 return;
4297         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4298                                  flow->rix_mreg_copy);
4299         if (!mcp_res || !priv->mreg_cp_tbl)
4300                 return;
4301         MLX5_ASSERT(mcp_res->rix_flow);
4302         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4303         flow->rix_mreg_copy = 0;
4304 }
4305
4306 /**
4307  * Remove the default copy action from RX_CP_TBL.
4308  *
4309  * This functions is called in the mlx5_dev_start(). No thread safe
4310  * is guaranteed.
4311  *
4312  * @param dev
4313  *   Pointer to Ethernet device.
4314  */
4315 static void
4316 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4317 {
4318         struct mlx5_list_entry *entry;
4319         struct mlx5_priv *priv = dev->data->dev_private;
4320         struct mlx5_flow_cb_ctx ctx;
4321         uint32_t mark_id;
4322
4323         /* Check if default flow is registered. */
4324         if (!priv->mreg_cp_tbl)
4325                 return;
4326         mark_id = MLX5_DEFAULT_COPY_ID;
4327         ctx.data = &mark_id;
4328         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4329         if (!entry)
4330                 return;
4331         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4332 }
4333
4334 /**
4335  * Add the default copy action in in RX_CP_TBL.
4336  *
4337  * This functions is called in the mlx5_dev_start(). No thread safe
4338  * is guaranteed.
4339  *
4340  * @param dev
4341  *   Pointer to Ethernet device.
4342  * @param[out] error
4343  *   Perform verbose error reporting if not NULL.
4344  *
4345  * @return
4346  *   0 for success, negative value otherwise and rte_errno is set.
4347  */
4348 static int
4349 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4350                                   struct rte_flow_error *error)
4351 {
4352         struct mlx5_priv *priv = dev->data->dev_private;
4353         struct mlx5_flow_mreg_copy_resource *mcp_res;
4354         struct mlx5_flow_cb_ctx ctx;
4355         uint32_t mark_id;
4356
4357         /* Check whether extensive metadata feature is engaged. */
4358         if (!priv->config.dv_flow_en ||
4359             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4360             !mlx5_flow_ext_mreg_supported(dev) ||
4361             !priv->sh->dv_regc0_mask)
4362                 return 0;
4363         /*
4364          * Add default mreg copy flow may be called multiple time, but
4365          * only be called once in stop. Avoid register it twice.
4366          */
4367         mark_id = MLX5_DEFAULT_COPY_ID;
4368         ctx.data = &mark_id;
4369         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4370                 return 0;
4371         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4372         if (!mcp_res)
4373                 return -rte_errno;
4374         return 0;
4375 }
4376
4377 /**
4378  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4379  *
4380  * All the flow having Q/RSS action should be split by
4381  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4382  * performs the following,
4383  *   - CQE->flow_tag := reg_c[1] (MARK)
4384  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4385  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4386  * but there should be a flow per each MARK ID set by MARK action.
4387  *
4388  * For the aforementioned reason, if there's a MARK action in flow's action
4389  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4390  * the MARK ID to CQE's flow_tag like,
4391  *   - If reg_c[1] is mark_id,
4392  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4393  *
4394  * For SET_META action which stores value in reg_c[0], as the destination is
4395  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4396  * MARK ID means the default flow. The default flow looks like,
4397  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4398  *
4399  * @param dev
4400  *   Pointer to Ethernet device.
4401  * @param flow
4402  *   Pointer to flow structure.
4403  * @param[in] actions
4404  *   Pointer to the list of actions.
4405  * @param[out] error
4406  *   Perform verbose error reporting if not NULL.
4407  *
4408  * @return
4409  *   0 on success, negative value otherwise and rte_errno is set.
4410  */
4411 static int
4412 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4413                             struct rte_flow *flow,
4414                             const struct rte_flow_action *actions,
4415                             struct rte_flow_error *error)
4416 {
4417         struct mlx5_priv *priv = dev->data->dev_private;
4418         struct mlx5_dev_config *config = &priv->config;
4419         struct mlx5_flow_mreg_copy_resource *mcp_res;
4420         const struct rte_flow_action_mark *mark;
4421
4422         /* Check whether extensive metadata feature is engaged. */
4423         if (!config->dv_flow_en ||
4424             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4425             !mlx5_flow_ext_mreg_supported(dev) ||
4426             !priv->sh->dv_regc0_mask)
4427                 return 0;
4428         /* Find MARK action. */
4429         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4430                 switch (actions->type) {
4431                 case RTE_FLOW_ACTION_TYPE_FLAG:
4432                         mcp_res = flow_mreg_add_copy_action
4433                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4434                         if (!mcp_res)
4435                                 return -rte_errno;
4436                         flow->rix_mreg_copy = mcp_res->idx;
4437                         return 0;
4438                 case RTE_FLOW_ACTION_TYPE_MARK:
4439                         mark = (const struct rte_flow_action_mark *)
4440                                 actions->conf;
4441                         mcp_res =
4442                                 flow_mreg_add_copy_action(dev, mark->id, error);
4443                         if (!mcp_res)
4444                                 return -rte_errno;
4445                         flow->rix_mreg_copy = mcp_res->idx;
4446                         return 0;
4447                 default:
4448                         break;
4449                 }
4450         }
4451         return 0;
4452 }
4453
4454 #define MLX5_MAX_SPLIT_ACTIONS 24
4455 #define MLX5_MAX_SPLIT_ITEMS 24
4456
4457 /**
4458  * Split the hairpin flow.
4459  * Since HW can't support encap and push-vlan on Rx, we move these
4460  * actions to Tx.
4461  * If the count action is after the encap then we also
4462  * move the count action. in this case the count will also measure
4463  * the outer bytes.
4464  *
4465  * @param dev
4466  *   Pointer to Ethernet device.
4467  * @param[in] actions
4468  *   Associated actions (list terminated by the END action).
4469  * @param[out] actions_rx
4470  *   Rx flow actions.
4471  * @param[out] actions_tx
4472  *   Tx flow actions..
4473  * @param[out] pattern_tx
4474  *   The pattern items for the Tx flow.
4475  * @param[out] flow_id
4476  *   The flow ID connected to this flow.
4477  *
4478  * @return
4479  *   0 on success.
4480  */
4481 static int
4482 flow_hairpin_split(struct rte_eth_dev *dev,
4483                    const struct rte_flow_action actions[],
4484                    struct rte_flow_action actions_rx[],
4485                    struct rte_flow_action actions_tx[],
4486                    struct rte_flow_item pattern_tx[],
4487                    uint32_t flow_id)
4488 {
4489         const struct rte_flow_action_raw_encap *raw_encap;
4490         const struct rte_flow_action_raw_decap *raw_decap;
4491         struct mlx5_rte_flow_action_set_tag *set_tag;
4492         struct rte_flow_action *tag_action;
4493         struct mlx5_rte_flow_item_tag *tag_item;
4494         struct rte_flow_item *item;
4495         char *addr;
4496         int encap = 0;
4497
4498         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4499                 switch (actions->type) {
4500                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4501                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4502                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4503                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4504                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4505                         rte_memcpy(actions_tx, actions,
4506                                sizeof(struct rte_flow_action));
4507                         actions_tx++;
4508                         break;
4509                 case RTE_FLOW_ACTION_TYPE_COUNT:
4510                         if (encap) {
4511                                 rte_memcpy(actions_tx, actions,
4512                                            sizeof(struct rte_flow_action));
4513                                 actions_tx++;
4514                         } else {
4515                                 rte_memcpy(actions_rx, actions,
4516                                            sizeof(struct rte_flow_action));
4517                                 actions_rx++;
4518                         }
4519                         break;
4520                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4521                         raw_encap = actions->conf;
4522                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4523                                 memcpy(actions_tx, actions,
4524                                        sizeof(struct rte_flow_action));
4525                                 actions_tx++;
4526                                 encap = 1;
4527                         } else {
4528                                 rte_memcpy(actions_rx, actions,
4529                                            sizeof(struct rte_flow_action));
4530                                 actions_rx++;
4531                         }
4532                         break;
4533                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4534                         raw_decap = actions->conf;
4535                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4536                                 memcpy(actions_tx, actions,
4537                                        sizeof(struct rte_flow_action));
4538                                 actions_tx++;
4539                         } else {
4540                                 rte_memcpy(actions_rx, actions,
4541                                            sizeof(struct rte_flow_action));
4542                                 actions_rx++;
4543                         }
4544                         break;
4545                 default:
4546                         rte_memcpy(actions_rx, actions,
4547                                    sizeof(struct rte_flow_action));
4548                         actions_rx++;
4549                         break;
4550                 }
4551         }
4552         /* Add set meta action and end action for the Rx flow. */
4553         tag_action = actions_rx;
4554         tag_action->type = (enum rte_flow_action_type)
4555                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4556         actions_rx++;
4557         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4558         actions_rx++;
4559         set_tag = (void *)actions_rx;
4560         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4561                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4562                 .data = flow_id,
4563         };
4564         MLX5_ASSERT(set_tag->id > REG_NON);
4565         tag_action->conf = set_tag;
4566         /* Create Tx item list. */
4567         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4568         addr = (void *)&pattern_tx[2];
4569         item = pattern_tx;
4570         item->type = (enum rte_flow_item_type)
4571                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4572         tag_item = (void *)addr;
4573         tag_item->data = flow_id;
4574         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4575         MLX5_ASSERT(set_tag->id > REG_NON);
4576         item->spec = tag_item;
4577         addr += sizeof(struct mlx5_rte_flow_item_tag);
4578         tag_item = (void *)addr;
4579         tag_item->data = UINT32_MAX;
4580         tag_item->id = UINT16_MAX;
4581         item->mask = tag_item;
4582         item->last = NULL;
4583         item++;
4584         item->type = RTE_FLOW_ITEM_TYPE_END;
4585         return 0;
4586 }
4587
4588 /**
4589  * The last stage of splitting chain, just creates the subflow
4590  * without any modification.
4591  *
4592  * @param[in] dev
4593  *   Pointer to Ethernet device.
4594  * @param[in] flow
4595  *   Parent flow structure pointer.
4596  * @param[in, out] sub_flow
4597  *   Pointer to return the created subflow, may be NULL.
4598  * @param[in] attr
4599  *   Flow rule attributes.
4600  * @param[in] items
4601  *   Pattern specification (list terminated by the END pattern item).
4602  * @param[in] actions
4603  *   Associated actions (list terminated by the END action).
4604  * @param[in] flow_split_info
4605  *   Pointer to flow split info structure.
4606  * @param[out] error
4607  *   Perform verbose error reporting if not NULL.
4608  * @return
4609  *   0 on success, negative value otherwise
4610  */
4611 static int
4612 flow_create_split_inner(struct rte_eth_dev *dev,
4613                         struct rte_flow *flow,
4614                         struct mlx5_flow **sub_flow,
4615                         const struct rte_flow_attr *attr,
4616                         const struct rte_flow_item items[],
4617                         const struct rte_flow_action actions[],
4618                         struct mlx5_flow_split_info *flow_split_info,
4619                         struct rte_flow_error *error)
4620 {
4621         struct mlx5_flow *dev_flow;
4622
4623         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4624                                     flow_split_info->flow_idx, error);
4625         if (!dev_flow)
4626                 return -rte_errno;
4627         dev_flow->flow = flow;
4628         dev_flow->external = flow_split_info->external;
4629         dev_flow->skip_scale = flow_split_info->skip_scale;
4630         /* Subflow object was created, we must include one in the list. */
4631         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4632                       dev_flow->handle, next);
4633         /*
4634          * If dev_flow is as one of the suffix flow, some actions in suffix
4635          * flow may need some user defined item layer flags, and pass the
4636          * Metadate rxq mark flag to suffix flow as well.
4637          */
4638         if (flow_split_info->prefix_layers)
4639                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4640         if (flow_split_info->prefix_mark)
4641                 dev_flow->handle->mark = 1;
4642         if (sub_flow)
4643                 *sub_flow = dev_flow;
4644 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4645         dev_flow->dv.table_id = flow_split_info->table_id;
4646 #endif
4647         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4648 }
4649
4650 /**
4651  * Get the sub policy of a meter.
4652  *
4653  * @param[in] dev
4654  *   Pointer to Ethernet device.
4655  * @param[in] flow
4656  *   Parent flow structure pointer.
4657  * @param wks
4658  *   Pointer to thread flow work space.
4659  * @param[in] attr
4660  *   Flow rule attributes.
4661  * @param[in] items
4662  *   Pattern specification (list terminated by the END pattern item).
4663  * @param[out] error
4664  *   Perform verbose error reporting if not NULL.
4665  *
4666  * @return
4667  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4668  */
4669 static struct mlx5_flow_meter_sub_policy *
4670 get_meter_sub_policy(struct rte_eth_dev *dev,
4671                      struct rte_flow *flow,
4672                      struct mlx5_flow_workspace *wks,
4673                      const struct rte_flow_attr *attr,
4674                      const struct rte_flow_item items[],
4675                      struct rte_flow_error *error)
4676 {
4677         struct mlx5_flow_meter_policy *policy;
4678         struct mlx5_flow_meter_policy *final_policy;
4679         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4680
4681         policy = wks->policy;
4682         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4683         if (final_policy->is_rss || final_policy->is_queue) {
4684                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4685                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4686                 uint32_t i;
4687
4688                 /*
4689                  * This is a tmp dev_flow,
4690                  * no need to register any matcher for it in translate.
4691                  */
4692                 wks->skip_matcher_reg = 1;
4693                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4694                         struct mlx5_flow dev_flow = {0};
4695                         struct mlx5_flow_handle dev_handle = { {0} };
4696                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4697
4698                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4699                                 const void *rss_act =
4700                                         final_policy->act_cnt[i].rss->conf;
4701                                 struct rte_flow_action rss_actions[2] = {
4702                                         [0] = {
4703                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4704                                         .conf = rss_act,
4705                                         },
4706                                         [1] = {
4707                                         .type = RTE_FLOW_ACTION_TYPE_END,
4708                                         .conf = NULL,
4709                                         }
4710                                 };
4711
4712                                 dev_flow.handle = &dev_handle;
4713                                 dev_flow.ingress = attr->ingress;
4714                                 dev_flow.flow = flow;
4715                                 dev_flow.external = 0;
4716 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4717                                 dev_flow.dv.transfer = attr->transfer;
4718 #endif
4719                                 /**
4720                                  * Translate RSS action to get rss hash fields.
4721                                  */
4722                                 if (flow_drv_translate(dev, &dev_flow, attr,
4723                                                 items, rss_actions, error))
4724                                         goto exit;
4725                                 rss_desc_v[i] = wks->rss_desc;
4726                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4727                                 rss_desc_v[i].hash_fields =
4728                                                 dev_flow.hash_fields;
4729                                 rss_desc_v[i].queue_num =
4730                                                 rss_desc_v[i].hash_fields ?
4731                                                 rss_desc_v[i].queue_num : 1;
4732                                 rss_desc_v[i].tunnel =
4733                                                 !!(dev_flow.handle->layers &
4734                                                    MLX5_FLOW_LAYER_TUNNEL);
4735                                 rss_desc[i] = &rss_desc_v[i];
4736                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4737                                 /* This is queue action. */
4738                                 rss_desc_v[i] = wks->rss_desc;
4739                                 rss_desc_v[i].key_len = 0;
4740                                 rss_desc_v[i].hash_fields = 0;
4741                                 rss_desc_v[i].queue =
4742                                         &final_policy->act_cnt[i].queue;
4743                                 rss_desc_v[i].queue_num = 1;
4744                                 rss_desc[i] = &rss_desc_v[i];
4745                         } else {
4746                                 rss_desc[i] = NULL;
4747                         }
4748                 }
4749                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4750                                                 flow, policy, rss_desc);
4751         } else {
4752                 enum mlx5_meter_domain mtr_domain =
4753                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4754                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4755                                                 MLX5_MTR_DOMAIN_INGRESS);
4756                 sub_policy = policy->sub_policys[mtr_domain][0];
4757         }
4758         if (!sub_policy)
4759                 rte_flow_error_set(error, EINVAL,
4760                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4761                                    "Failed to get meter sub-policy.");
4762 exit:
4763         return sub_policy;
4764 }
4765
4766 /**
4767  * Split the meter flow.
4768  *
4769  * As meter flow will split to three sub flow, other than meter
4770  * action, the other actions make sense to only meter accepts
4771  * the packet. If it need to be dropped, no other additional
4772  * actions should be take.
4773  *
4774  * One kind of special action which decapsulates the L3 tunnel
4775  * header will be in the prefix sub flow, as not to take the
4776  * L3 tunnel header into account.
4777  *
4778  * @param[in] dev
4779  *   Pointer to Ethernet device.
4780  * @param[in] flow
4781  *   Parent flow structure pointer.
4782  * @param wks
4783  *   Pointer to thread flow work space.
4784  * @param[in] attr
4785  *   Flow rule attributes.
4786  * @param[in] items
4787  *   Pattern specification (list terminated by the END pattern item).
4788  * @param[out] sfx_items
4789  *   Suffix flow match items (list terminated by the END pattern item).
4790  * @param[in] actions
4791  *   Associated actions (list terminated by the END action).
4792  * @param[out] actions_sfx
4793  *   Suffix flow actions.
4794  * @param[out] actions_pre
4795  *   Prefix flow actions.
4796  * @param[out] mtr_flow_id
4797  *   Pointer to meter flow id.
4798  * @param[out] error
4799  *   Perform verbose error reporting if not NULL.
4800  *
4801  * @return
4802  *   0 on success, a negative errno value otherwise and rte_errno is set.
4803  */
4804 static int
4805 flow_meter_split_prep(struct rte_eth_dev *dev,
4806                       struct rte_flow *flow,
4807                       struct mlx5_flow_workspace *wks,
4808                       const struct rte_flow_attr *attr,
4809                       const struct rte_flow_item items[],
4810                       struct rte_flow_item sfx_items[],
4811                       const struct rte_flow_action actions[],
4812                       struct rte_flow_action actions_sfx[],
4813                       struct rte_flow_action actions_pre[],
4814                       uint32_t *mtr_flow_id,
4815                       struct rte_flow_error *error)
4816 {
4817         struct mlx5_priv *priv = dev->data->dev_private;
4818         struct mlx5_flow_meter_info *fm = wks->fm;
4819         struct rte_flow_action *tag_action = NULL;
4820         struct rte_flow_item *tag_item;
4821         struct mlx5_rte_flow_action_set_tag *set_tag;
4822         const struct rte_flow_action_raw_encap *raw_encap;
4823         const struct rte_flow_action_raw_decap *raw_decap;
4824         struct mlx5_rte_flow_item_tag *tag_item_spec;
4825         struct mlx5_rte_flow_item_tag *tag_item_mask;
4826         uint32_t tag_id = 0;
4827         struct rte_flow_item *vlan_item_dst = NULL;
4828         const struct rte_flow_item *vlan_item_src = NULL;
4829         struct rte_flow_action *hw_mtr_action;
4830         struct rte_flow_action *action_pre_head = NULL;
4831         int32_t flow_src_port = priv->representor_id;
4832         bool mtr_first;
4833         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4834         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4835                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4836         uint32_t flow_id = 0;
4837         uint32_t flow_id_reversed = 0;
4838         uint8_t flow_id_bits = 0;
4839         int shift;
4840
4841         /* Prepare the suffix subflow items. */
4842         tag_item = sfx_items++;
4843         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4844                 struct mlx5_priv *port_priv;
4845                 const struct rte_flow_item_port_id *pid_v;
4846                 int item_type = items->type;
4847
4848                 switch (item_type) {
4849                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4850                         pid_v = items->spec;
4851                         MLX5_ASSERT(pid_v);
4852                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4853                         if (!port_priv)
4854                                 return rte_flow_error_set(error,
4855                                                 rte_errno,
4856                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4857                                                 pid_v,
4858                                                 "Failed to get port info.");
4859                         flow_src_port = port_priv->representor_id;
4860                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4861                             flow_src_port != priv->representor_id) {
4862                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4863                                                                 flow, fm,
4864                                                                 flow_src_port,
4865                                                                 items,
4866                                                                 error))
4867                                         return -rte_errno;
4868                         }
4869                         memcpy(sfx_items, items, sizeof(*sfx_items));
4870                         sfx_items++;
4871                         break;
4872                 case RTE_FLOW_ITEM_TYPE_VLAN:
4873                         /* Determine if copy vlan item below. */
4874                         vlan_item_src = items;
4875                         vlan_item_dst = sfx_items++;
4876                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4877                         break;
4878                 default:
4879                         break;
4880                 }
4881         }
4882         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4883         sfx_items++;
4884         mtr_first = priv->sh->meter_aso_en &&
4885                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4886         /* For ASO meter, meter must be before tag in TX direction. */
4887         if (mtr_first) {
4888                 action_pre_head = actions_pre++;
4889                 /* Leave space for tag action. */
4890                 tag_action = actions_pre++;
4891         }
4892         /* Prepare the actions for prefix and suffix flow. */
4893         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4894                 struct rte_flow_action *action_cur = NULL;
4895
4896                 switch (actions->type) {
4897                 case RTE_FLOW_ACTION_TYPE_METER:
4898                         if (mtr_first) {
4899                                 action_cur = action_pre_head;
4900                         } else {
4901                                 /* Leave space for tag action. */
4902                                 tag_action = actions_pre++;
4903                                 action_cur = actions_pre++;
4904                         }
4905                         break;
4906                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4907                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4908                         action_cur = actions_pre++;
4909                         break;
4910                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4911                         raw_encap = actions->conf;
4912                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4913                                 action_cur = actions_pre++;
4914                         break;
4915                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4916                         raw_decap = actions->conf;
4917                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4918                                 action_cur = actions_pre++;
4919                         break;
4920                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4921                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4922                         if (vlan_item_dst && vlan_item_src) {
4923                                 memcpy(vlan_item_dst, vlan_item_src,
4924                                         sizeof(*vlan_item_dst));
4925                                 /*
4926                                  * Convert to internal match item, it is used
4927                                  * for vlan push and set vid.
4928                                  */
4929                                 vlan_item_dst->type = (enum rte_flow_item_type)
4930                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4931                         }
4932                         break;
4933                 default:
4934                         break;
4935                 }
4936                 if (!action_cur)
4937                         action_cur = (fm->def_policy) ?
4938                                         actions_sfx++ : actions_pre++;
4939                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4940         }
4941         /* Add end action to the actions. */
4942         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4943         if (priv->sh->meter_aso_en) {
4944                 /**
4945                  * For ASO meter, need to add an extra jump action explicitly,
4946                  * to jump from meter to policer table.
4947                  */
4948                 struct mlx5_flow_meter_sub_policy *sub_policy;
4949                 struct mlx5_flow_tbl_data_entry *tbl_data;
4950
4951                 if (!fm->def_policy) {
4952                         sub_policy = get_meter_sub_policy(dev, flow, wks,
4953                                                           attr, items, error);
4954                         if (!sub_policy)
4955                                 return -rte_errno;
4956                 } else {
4957                         enum mlx5_meter_domain mtr_domain =
4958                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4959                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4960                                                 MLX5_MTR_DOMAIN_INGRESS);
4961
4962                         sub_policy =
4963                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4964                 }
4965                 tbl_data = container_of(sub_policy->tbl_rsc,
4966                                         struct mlx5_flow_tbl_data_entry, tbl);
4967                 hw_mtr_action = actions_pre++;
4968                 hw_mtr_action->type = (enum rte_flow_action_type)
4969                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4970                 hw_mtr_action->conf = tbl_data->jump.action;
4971         }
4972         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4973         actions_pre++;
4974         if (!tag_action)
4975                 return rte_flow_error_set(error, ENOMEM,
4976                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4977                                           NULL, "No tag action space.");
4978         if (!mtr_flow_id) {
4979                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4980                 goto exit;
4981         }
4982         /* Only default-policy Meter creates mtr flow id. */
4983         if (fm->def_policy) {
4984                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4985                 if (!tag_id)
4986                         return rte_flow_error_set(error, ENOMEM,
4987                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4988                                         "Failed to allocate meter flow id.");
4989                 flow_id = tag_id - 1;
4990                 flow_id_bits = (!flow_id) ? 1 :
4991                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
4992                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
4993                     mtr_reg_bits) {
4994                         mlx5_ipool_free(fm->flow_ipool, tag_id);
4995                         return rte_flow_error_set(error, EINVAL,
4996                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4997                                         "Meter flow id exceeds max limit.");
4998                 }
4999                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5000                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5001         }
5002         /* Build tag actions and items for meter_id/meter flow_id. */
5003         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5004         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5005         tag_item_mask = tag_item_spec + 1;
5006         /* Both flow_id and meter_id share the same register. */
5007         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5008                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5009                                                             0, error),
5010                 .offset = mtr_id_offset,
5011                 .length = mtr_reg_bits,
5012                 .data = flow->meter,
5013         };
5014         /*
5015          * The color Reg bits used by flow_id are growing from
5016          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5017          */
5018         for (shift = 0; shift < flow_id_bits; shift++)
5019                 flow_id_reversed = (flow_id_reversed << 1) |
5020                                 ((flow_id >> shift) & 0x1);
5021         set_tag->data |=
5022                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5023         tag_item_spec->id = set_tag->id;
5024         tag_item_spec->data = set_tag->data << mtr_id_offset;
5025         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5026         tag_action->type = (enum rte_flow_action_type)
5027                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5028         tag_action->conf = set_tag;
5029         tag_item->type = (enum rte_flow_item_type)
5030                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5031         tag_item->spec = tag_item_spec;
5032         tag_item->last = NULL;
5033         tag_item->mask = tag_item_mask;
5034 exit:
5035         if (mtr_flow_id)
5036                 *mtr_flow_id = tag_id;
5037         return 0;
5038 }
5039
5040 /**
5041  * Split action list having QUEUE/RSS for metadata register copy.
5042  *
5043  * Once Q/RSS action is detected in user's action list, the flow action
5044  * should be split in order to copy metadata registers, which will happen in
5045  * RX_CP_TBL like,
5046  *   - CQE->flow_tag := reg_c[1] (MARK)
5047  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5048  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5049  * This is because the last action of each flow must be a terminal action
5050  * (QUEUE, RSS or DROP).
5051  *
5052  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5053  * stored and kept in the mlx5_flow structure per each sub_flow.
5054  *
5055  * The Q/RSS action is replaced with,
5056  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5057  * And the following JUMP action is added at the end,
5058  *   - JUMP, to RX_CP_TBL.
5059  *
5060  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5061  * flow_create_split_metadata() routine. The flow will look like,
5062  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5063  *
5064  * @param dev
5065  *   Pointer to Ethernet device.
5066  * @param[out] split_actions
5067  *   Pointer to store split actions to jump to CP_TBL.
5068  * @param[in] actions
5069  *   Pointer to the list of original flow actions.
5070  * @param[in] qrss
5071  *   Pointer to the Q/RSS action.
5072  * @param[in] actions_n
5073  *   Number of original actions.
5074  * @param[out] error
5075  *   Perform verbose error reporting if not NULL.
5076  *
5077  * @return
5078  *   non-zero unique flow_id on success, otherwise 0 and
5079  *   error/rte_error are set.
5080  */
5081 static uint32_t
5082 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5083                           struct rte_flow_action *split_actions,
5084                           const struct rte_flow_action *actions,
5085                           const struct rte_flow_action *qrss,
5086                           int actions_n, struct rte_flow_error *error)
5087 {
5088         struct mlx5_priv *priv = dev->data->dev_private;
5089         struct mlx5_rte_flow_action_set_tag *set_tag;
5090         struct rte_flow_action_jump *jump;
5091         const int qrss_idx = qrss - actions;
5092         uint32_t flow_id = 0;
5093         int ret = 0;
5094
5095         /*
5096          * Given actions will be split
5097          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5098          * - Add jump to mreg CP_TBL.
5099          * As a result, there will be one more action.
5100          */
5101         ++actions_n;
5102         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5103         set_tag = (void *)(split_actions + actions_n);
5104         /*
5105          * If tag action is not set to void(it means we are not the meter
5106          * suffix flow), add the tag action. Since meter suffix flow already
5107          * has the tag added.
5108          */
5109         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5110                 /*
5111                  * Allocate the new subflow ID. This one is unique within
5112                  * device and not shared with representors. Otherwise,
5113                  * we would have to resolve multi-thread access synch
5114                  * issue. Each flow on the shared device is appended
5115                  * with source vport identifier, so the resulting
5116                  * flows will be unique in the shared (by master and
5117                  * representors) domain even if they have coinciding
5118                  * IDs.
5119                  */
5120                 mlx5_ipool_malloc(priv->sh->ipool
5121                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5122                 if (!flow_id)
5123                         return rte_flow_error_set(error, ENOMEM,
5124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5125                                                   NULL, "can't allocate id "
5126                                                   "for split Q/RSS subflow");
5127                 /* Internal SET_TAG action to set flow ID. */
5128                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5129                         .data = flow_id,
5130                 };
5131                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5132                 if (ret < 0)
5133                         return ret;
5134                 set_tag->id = ret;
5135                 /* Construct new actions array. */
5136                 /* Replace QUEUE/RSS action. */
5137                 split_actions[qrss_idx] = (struct rte_flow_action){
5138                         .type = (enum rte_flow_action_type)
5139                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5140                         .conf = set_tag,
5141                 };
5142         }
5143         /* JUMP action to jump to mreg copy table (CP_TBL). */
5144         jump = (void *)(set_tag + 1);
5145         *jump = (struct rte_flow_action_jump){
5146                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5147         };
5148         split_actions[actions_n - 2] = (struct rte_flow_action){
5149                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5150                 .conf = jump,
5151         };
5152         split_actions[actions_n - 1] = (struct rte_flow_action){
5153                 .type = RTE_FLOW_ACTION_TYPE_END,
5154         };
5155         return flow_id;
5156 }
5157
5158 /**
5159  * Extend the given action list for Tx metadata copy.
5160  *
5161  * Copy the given action list to the ext_actions and add flow metadata register
5162  * copy action in order to copy reg_a set by WQE to reg_c[0].
5163  *
5164  * @param[out] ext_actions
5165  *   Pointer to the extended action list.
5166  * @param[in] actions
5167  *   Pointer to the list of actions.
5168  * @param[in] actions_n
5169  *   Number of actions in the list.
5170  * @param[out] error
5171  *   Perform verbose error reporting if not NULL.
5172  * @param[in] encap_idx
5173  *   The encap action inndex.
5174  *
5175  * @return
5176  *   0 on success, negative value otherwise
5177  */
5178 static int
5179 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5180                        struct rte_flow_action *ext_actions,
5181                        const struct rte_flow_action *actions,
5182                        int actions_n, struct rte_flow_error *error,
5183                        int encap_idx)
5184 {
5185         struct mlx5_flow_action_copy_mreg *cp_mreg =
5186                 (struct mlx5_flow_action_copy_mreg *)
5187                         (ext_actions + actions_n + 1);
5188         int ret;
5189
5190         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5191         if (ret < 0)
5192                 return ret;
5193         cp_mreg->dst = ret;
5194         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5195         if (ret < 0)
5196                 return ret;
5197         cp_mreg->src = ret;
5198         if (encap_idx != 0)
5199                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5200         if (encap_idx == actions_n - 1) {
5201                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5202                         .type = (enum rte_flow_action_type)
5203                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5204                         .conf = cp_mreg,
5205                 };
5206                 ext_actions[actions_n] = (struct rte_flow_action){
5207                         .type = RTE_FLOW_ACTION_TYPE_END,
5208                 };
5209         } else {
5210                 ext_actions[encap_idx] = (struct rte_flow_action){
5211                         .type = (enum rte_flow_action_type)
5212                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5213                         .conf = cp_mreg,
5214                 };
5215                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5216                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5217         }
5218         return 0;
5219 }
5220
5221 /**
5222  * Check the match action from the action list.
5223  *
5224  * @param[in] actions
5225  *   Pointer to the list of actions.
5226  * @param[in] attr
5227  *   Flow rule attributes.
5228  * @param[in] action
5229  *   The action to be check if exist.
5230  * @param[out] match_action_pos
5231  *   Pointer to the position of the matched action if exists, otherwise is -1.
5232  * @param[out] qrss_action_pos
5233  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5234  * @param[out] modify_after_mirror
5235  *   Pointer to the flag of modify action after FDB mirroring.
5236  *
5237  * @return
5238  *   > 0 the total number of actions.
5239  *   0 if not found match action in action list.
5240  */
5241 static int
5242 flow_check_match_action(const struct rte_flow_action actions[],
5243                         const struct rte_flow_attr *attr,
5244                         enum rte_flow_action_type action,
5245                         int *match_action_pos, int *qrss_action_pos,
5246                         int *modify_after_mirror)
5247 {
5248         const struct rte_flow_action_sample *sample;
5249         int actions_n = 0;
5250         uint32_t ratio = 0;
5251         int sub_type = 0;
5252         int flag = 0;
5253         int fdb_mirror = 0;
5254
5255         *match_action_pos = -1;
5256         *qrss_action_pos = -1;
5257         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5258                 if (actions->type == action) {
5259                         flag = 1;
5260                         *match_action_pos = actions_n;
5261                 }
5262                 switch (actions->type) {
5263                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5264                 case RTE_FLOW_ACTION_TYPE_RSS:
5265                         *qrss_action_pos = actions_n;
5266                         break;
5267                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5268                         sample = actions->conf;
5269                         ratio = sample->ratio;
5270                         sub_type = ((const struct rte_flow_action *)
5271                                         (sample->actions))->type;
5272                         if (ratio == 1 && attr->transfer)
5273                                 fdb_mirror = 1;
5274                         break;
5275                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5276                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5277                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5278                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5279                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5280                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5281                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5282                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5283                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5284                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5285                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5286                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5287                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5288                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5289                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5290                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5291                 case RTE_FLOW_ACTION_TYPE_FLAG:
5292                 case RTE_FLOW_ACTION_TYPE_MARK:
5293                 case RTE_FLOW_ACTION_TYPE_SET_META:
5294                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5295                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5296                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5297                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5298                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5299                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5300                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5301                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5302                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5303                 case RTE_FLOW_ACTION_TYPE_METER:
5304                         if (fdb_mirror)
5305                                 *modify_after_mirror = 1;
5306                         break;
5307                 default:
5308                         break;
5309                 }
5310                 actions_n++;
5311         }
5312         if (flag && fdb_mirror && !*modify_after_mirror) {
5313                 /* FDB mirroring uses the destination array to implement
5314                  * instead of FLOW_SAMPLER object.
5315                  */
5316                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5317                         flag = 0;
5318         }
5319         /* Count RTE_FLOW_ACTION_TYPE_END. */
5320         return flag ? actions_n + 1 : 0;
5321 }
5322
5323 #define SAMPLE_SUFFIX_ITEM 2
5324
5325 /**
5326  * Split the sample flow.
5327  *
5328  * As sample flow will split to two sub flow, sample flow with
5329  * sample action, the other actions will move to new suffix flow.
5330  *
5331  * Also add unique tag id with tag action in the sample flow,
5332  * the same tag id will be as match in the suffix flow.
5333  *
5334  * @param dev
5335  *   Pointer to Ethernet device.
5336  * @param[in] add_tag
5337  *   Add extra tag action flag.
5338  * @param[out] sfx_items
5339  *   Suffix flow match items (list terminated by the END pattern item).
5340  * @param[in] actions
5341  *   Associated actions (list terminated by the END action).
5342  * @param[out] actions_sfx
5343  *   Suffix flow actions.
5344  * @param[out] actions_pre
5345  *   Prefix flow actions.
5346  * @param[in] actions_n
5347  *  The total number of actions.
5348  * @param[in] sample_action_pos
5349  *   The sample action position.
5350  * @param[in] qrss_action_pos
5351  *   The Queue/RSS action position.
5352  * @param[in] jump_table
5353  *   Add extra jump action flag.
5354  * @param[out] error
5355  *   Perform verbose error reporting if not NULL.
5356  *
5357  * @return
5358  *   0 on success, or unique flow_id, a negative errno value
5359  *   otherwise and rte_errno is set.
5360  */
5361 static int
5362 flow_sample_split_prep(struct rte_eth_dev *dev,
5363                        int add_tag,
5364                        struct rte_flow_item sfx_items[],
5365                        const struct rte_flow_action actions[],
5366                        struct rte_flow_action actions_sfx[],
5367                        struct rte_flow_action actions_pre[],
5368                        int actions_n,
5369                        int sample_action_pos,
5370                        int qrss_action_pos,
5371                        int jump_table,
5372                        struct rte_flow_error *error)
5373 {
5374         struct mlx5_priv *priv = dev->data->dev_private;
5375         struct mlx5_rte_flow_action_set_tag *set_tag;
5376         struct mlx5_rte_flow_item_tag *tag_spec;
5377         struct mlx5_rte_flow_item_tag *tag_mask;
5378         struct rte_flow_action_jump *jump_action;
5379         uint32_t tag_id = 0;
5380         int index;
5381         int append_index = 0;
5382         int ret;
5383
5384         if (sample_action_pos < 0)
5385                 return rte_flow_error_set(error, EINVAL,
5386                                           RTE_FLOW_ERROR_TYPE_ACTION,
5387                                           NULL, "invalid position of sample "
5388                                           "action in list");
5389         /* Prepare the actions for prefix and suffix flow. */
5390         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5391                 index = qrss_action_pos;
5392                 /* Put the preceding the Queue/RSS action into prefix flow. */
5393                 if (index != 0)
5394                         memcpy(actions_pre, actions,
5395                                sizeof(struct rte_flow_action) * index);
5396                 /* Put others preceding the sample action into prefix flow. */
5397                 if (sample_action_pos > index + 1)
5398                         memcpy(actions_pre + index, actions + index + 1,
5399                                sizeof(struct rte_flow_action) *
5400                                (sample_action_pos - index - 1));
5401                 index = sample_action_pos - 1;
5402                 /* Put Queue/RSS action into Suffix flow. */
5403                 memcpy(actions_sfx, actions + qrss_action_pos,
5404                        sizeof(struct rte_flow_action));
5405                 actions_sfx++;
5406         } else {
5407                 index = sample_action_pos;
5408                 if (index != 0)
5409                         memcpy(actions_pre, actions,
5410                                sizeof(struct rte_flow_action) * index);
5411         }
5412         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5413          * For CX6DX and above, metadata registers Cx preserve their value,
5414          * add an extra tag action for NIC-RX and E-Switch Domain.
5415          */
5416         if (add_tag) {
5417                 /* Prepare the prefix tag action. */
5418                 append_index++;
5419                 set_tag = (void *)(actions_pre + actions_n + append_index);
5420                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5421                 if (ret < 0)
5422                         return ret;
5423                 mlx5_ipool_malloc(priv->sh->ipool
5424                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5425                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5426                         .id = ret,
5427                         .data = tag_id,
5428                 };
5429                 /* Prepare the suffix subflow items. */
5430                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5431                 tag_spec->data = tag_id;
5432                 tag_spec->id = set_tag->id;
5433                 tag_mask = tag_spec + 1;
5434                 tag_mask->data = UINT32_MAX;
5435                 sfx_items[0] = (struct rte_flow_item){
5436                         .type = (enum rte_flow_item_type)
5437                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5438                         .spec = tag_spec,
5439                         .last = NULL,
5440                         .mask = tag_mask,
5441                 };
5442                 sfx_items[1] = (struct rte_flow_item){
5443                         .type = (enum rte_flow_item_type)
5444                                 RTE_FLOW_ITEM_TYPE_END,
5445                 };
5446                 /* Prepare the tag action in prefix subflow. */
5447                 actions_pre[index++] =
5448                         (struct rte_flow_action){
5449                         .type = (enum rte_flow_action_type)
5450                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5451                         .conf = set_tag,
5452                 };
5453         }
5454         memcpy(actions_pre + index, actions + sample_action_pos,
5455                sizeof(struct rte_flow_action));
5456         index += 1;
5457         /* For the modify action after the sample action in E-Switch mirroring,
5458          * Add the extra jump action in prefix subflow and jump into the next
5459          * table, then do the modify action in the new table.
5460          */
5461         if (jump_table) {
5462                 /* Prepare the prefix jump action. */
5463                 append_index++;
5464                 jump_action = (void *)(actions_pre + actions_n + append_index);
5465                 jump_action->group = jump_table;
5466                 actions_pre[index++] =
5467                         (struct rte_flow_action){
5468                         .type = (enum rte_flow_action_type)
5469                                 RTE_FLOW_ACTION_TYPE_JUMP,
5470                         .conf = jump_action,
5471                 };
5472         }
5473         actions_pre[index] = (struct rte_flow_action){
5474                 .type = (enum rte_flow_action_type)
5475                         RTE_FLOW_ACTION_TYPE_END,
5476         };
5477         /* Put the actions after sample into Suffix flow. */
5478         memcpy(actions_sfx, actions + sample_action_pos + 1,
5479                sizeof(struct rte_flow_action) *
5480                (actions_n - sample_action_pos - 1));
5481         return tag_id;
5482 }
5483
5484 /**
5485  * The splitting for metadata feature.
5486  *
5487  * - Q/RSS action on NIC Rx should be split in order to pass by
5488  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5489  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5490  *
5491  * - All the actions on NIC Tx should have a mreg copy action to
5492  *   copy reg_a from WQE to reg_c[0].
5493  *
5494  * @param dev
5495  *   Pointer to Ethernet device.
5496  * @param[in] flow
5497  *   Parent flow structure pointer.
5498  * @param[in] attr
5499  *   Flow rule attributes.
5500  * @param[in] items
5501  *   Pattern specification (list terminated by the END pattern item).
5502  * @param[in] actions
5503  *   Associated actions (list terminated by the END action).
5504  * @param[in] flow_split_info
5505  *   Pointer to flow split info structure.
5506  * @param[out] error
5507  *   Perform verbose error reporting if not NULL.
5508  * @return
5509  *   0 on success, negative value otherwise
5510  */
5511 static int
5512 flow_create_split_metadata(struct rte_eth_dev *dev,
5513                            struct rte_flow *flow,
5514                            const struct rte_flow_attr *attr,
5515                            const struct rte_flow_item items[],
5516                            const struct rte_flow_action actions[],
5517                            struct mlx5_flow_split_info *flow_split_info,
5518                            struct rte_flow_error *error)
5519 {
5520         struct mlx5_priv *priv = dev->data->dev_private;
5521         struct mlx5_dev_config *config = &priv->config;
5522         const struct rte_flow_action *qrss = NULL;
5523         struct rte_flow_action *ext_actions = NULL;
5524         struct mlx5_flow *dev_flow = NULL;
5525         uint32_t qrss_id = 0;
5526         int mtr_sfx = 0;
5527         size_t act_size;
5528         int actions_n;
5529         int encap_idx;
5530         int ret;
5531
5532         /* Check whether extensive metadata feature is engaged. */
5533         if (!config->dv_flow_en ||
5534             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5535             !mlx5_flow_ext_mreg_supported(dev))
5536                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5537                                                actions, flow_split_info, error);
5538         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5539                                                            &encap_idx);
5540         if (qrss) {
5541                 /* Exclude hairpin flows from splitting. */
5542                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5543                         const struct rte_flow_action_queue *queue;
5544
5545                         queue = qrss->conf;
5546                         if (mlx5_rxq_get_type(dev, queue->index) ==
5547                             MLX5_RXQ_TYPE_HAIRPIN)
5548                                 qrss = NULL;
5549                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5550                         const struct rte_flow_action_rss *rss;
5551
5552                         rss = qrss->conf;
5553                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5554                             MLX5_RXQ_TYPE_HAIRPIN)
5555                                 qrss = NULL;
5556                 }
5557         }
5558         if (qrss) {
5559                 /* Check if it is in meter suffix table. */
5560                 mtr_sfx = attr->group == (attr->transfer ?
5561                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5562                           MLX5_FLOW_TABLE_LEVEL_METER);
5563                 /*
5564                  * Q/RSS action on NIC Rx should be split in order to pass by
5565                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5566                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5567                  */
5568                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5569                            sizeof(struct rte_flow_action_set_tag) +
5570                            sizeof(struct rte_flow_action_jump);
5571                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5572                                           SOCKET_ID_ANY);
5573                 if (!ext_actions)
5574                         return rte_flow_error_set(error, ENOMEM,
5575                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5576                                                   NULL, "no memory to split "
5577                                                   "metadata flow");
5578                 /*
5579                  * If we are the suffix flow of meter, tag already exist.
5580                  * Set the tag action to void.
5581                  */
5582                 if (mtr_sfx)
5583                         ext_actions[qrss - actions].type =
5584                                                 RTE_FLOW_ACTION_TYPE_VOID;
5585                 else
5586                         ext_actions[qrss - actions].type =
5587                                                 (enum rte_flow_action_type)
5588                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5589                 /*
5590                  * Create the new actions list with removed Q/RSS action
5591                  * and appended set tag and jump to register copy table
5592                  * (RX_CP_TBL). We should preallocate unique tag ID here
5593                  * in advance, because it is needed for set tag action.
5594                  */
5595                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5596                                                     qrss, actions_n, error);
5597                 if (!mtr_sfx && !qrss_id) {
5598                         ret = -rte_errno;
5599                         goto exit;
5600                 }
5601         } else if (attr->egress && !attr->transfer) {
5602                 /*
5603                  * All the actions on NIC Tx should have a metadata register
5604                  * copy action to copy reg_a from WQE to reg_c[meta]
5605                  */
5606                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5607                            sizeof(struct mlx5_flow_action_copy_mreg);
5608                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5609                                           SOCKET_ID_ANY);
5610                 if (!ext_actions)
5611                         return rte_flow_error_set(error, ENOMEM,
5612                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5613                                                   NULL, "no memory to split "
5614                                                   "metadata flow");
5615                 /* Create the action list appended with copy register. */
5616                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5617                                              actions_n, error, encap_idx);
5618                 if (ret < 0)
5619                         goto exit;
5620         }
5621         /* Add the unmodified original or prefix subflow. */
5622         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5623                                       items, ext_actions ? ext_actions :
5624                                       actions, flow_split_info, error);
5625         if (ret < 0)
5626                 goto exit;
5627         MLX5_ASSERT(dev_flow);
5628         if (qrss) {
5629                 const struct rte_flow_attr q_attr = {
5630                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5631                         .ingress = 1,
5632                 };
5633                 /* Internal PMD action to set register. */
5634                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5635                         .data = qrss_id,
5636                         .id = REG_NON,
5637                 };
5638                 struct rte_flow_item q_items[] = {
5639                         {
5640                                 .type = (enum rte_flow_item_type)
5641                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5642                                 .spec = &q_tag_spec,
5643                                 .last = NULL,
5644                                 .mask = NULL,
5645                         },
5646                         {
5647                                 .type = RTE_FLOW_ITEM_TYPE_END,
5648                         },
5649                 };
5650                 struct rte_flow_action q_actions[] = {
5651                         {
5652                                 .type = qrss->type,
5653                                 .conf = qrss->conf,
5654                         },
5655                         {
5656                                 .type = RTE_FLOW_ACTION_TYPE_END,
5657                         },
5658                 };
5659                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5660
5661                 /*
5662                  * Configure the tag item only if there is no meter subflow.
5663                  * Since tag is already marked in the meter suffix subflow
5664                  * we can just use the meter suffix items as is.
5665                  */
5666                 if (qrss_id) {
5667                         /* Not meter subflow. */
5668                         MLX5_ASSERT(!mtr_sfx);
5669                         /*
5670                          * Put unique id in prefix flow due to it is destroyed
5671                          * after suffix flow and id will be freed after there
5672                          * is no actual flows with this id and identifier
5673                          * reallocation becomes possible (for example, for
5674                          * other flows in other threads).
5675                          */
5676                         dev_flow->handle->split_flow_id = qrss_id;
5677                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5678                                                    error);
5679                         if (ret < 0)
5680                                 goto exit;
5681                         q_tag_spec.id = ret;
5682                 }
5683                 dev_flow = NULL;
5684                 /* Add suffix subflow to execute Q/RSS. */
5685                 flow_split_info->prefix_layers = layers;
5686                 flow_split_info->prefix_mark = 0;
5687                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5688                                               &q_attr, mtr_sfx ? items :
5689                                               q_items, q_actions,
5690                                               flow_split_info, error);
5691                 if (ret < 0)
5692                         goto exit;
5693                 /* qrss ID should be freed if failed. */
5694                 qrss_id = 0;
5695                 MLX5_ASSERT(dev_flow);
5696         }
5697
5698 exit:
5699         /*
5700          * We do not destroy the partially created sub_flows in case of error.
5701          * These ones are included into parent flow list and will be destroyed
5702          * by flow_drv_destroy.
5703          */
5704         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5705                         qrss_id);
5706         mlx5_free(ext_actions);
5707         return ret;
5708 }
5709
5710 /**
5711  * Create meter internal drop flow with the original pattern.
5712  *
5713  * @param dev
5714  *   Pointer to Ethernet device.
5715  * @param[in] flow
5716  *   Parent flow structure pointer.
5717  * @param[in] attr
5718  *   Flow rule attributes.
5719  * @param[in] items
5720  *   Pattern specification (list terminated by the END pattern item).
5721  * @param[in] flow_split_info
5722  *   Pointer to flow split info structure.
5723  * @param[in] fm
5724  *   Pointer to flow meter structure.
5725  * @param[out] error
5726  *   Perform verbose error reporting if not NULL.
5727  * @return
5728  *   0 on success, negative value otherwise
5729  */
5730 static uint32_t
5731 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5732                         struct rte_flow *flow,
5733                         const struct rte_flow_attr *attr,
5734                         const struct rte_flow_item items[],
5735                         struct mlx5_flow_split_info *flow_split_info,
5736                         struct mlx5_flow_meter_info *fm,
5737                         struct rte_flow_error *error)
5738 {
5739         struct mlx5_flow *dev_flow = NULL;
5740         struct rte_flow_attr drop_attr = *attr;
5741         struct rte_flow_action drop_actions[3];
5742         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5743
5744         MLX5_ASSERT(fm->drop_cnt);
5745         drop_actions[0].type =
5746                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5747         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5748         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5749         drop_actions[1].conf = NULL;
5750         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5751         drop_actions[2].conf = NULL;
5752         drop_split_info.external = false;
5753         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5754         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5755         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5756         return flow_create_split_inner(dev, flow, &dev_flow,
5757                                 &drop_attr, items, drop_actions,
5758                                 &drop_split_info, error);
5759 }
5760
5761 /**
5762  * The splitting for meter feature.
5763  *
5764  * - The meter flow will be split to two flows as prefix and
5765  *   suffix flow. The packets make sense only it pass the prefix
5766  *   meter action.
5767  *
5768  * - Reg_C_5 is used for the packet to match betweend prefix and
5769  *   suffix flow.
5770  *
5771  * @param dev
5772  *   Pointer to Ethernet device.
5773  * @param[in] flow
5774  *   Parent flow structure pointer.
5775  * @param[in] attr
5776  *   Flow rule attributes.
5777  * @param[in] items
5778  *   Pattern specification (list terminated by the END pattern item).
5779  * @param[in] actions
5780  *   Associated actions (list terminated by the END action).
5781  * @param[in] flow_split_info
5782  *   Pointer to flow split info structure.
5783  * @param[out] error
5784  *   Perform verbose error reporting if not NULL.
5785  * @return
5786  *   0 on success, negative value otherwise
5787  */
5788 static int
5789 flow_create_split_meter(struct rte_eth_dev *dev,
5790                         struct rte_flow *flow,
5791                         const struct rte_flow_attr *attr,
5792                         const struct rte_flow_item items[],
5793                         const struct rte_flow_action actions[],
5794                         struct mlx5_flow_split_info *flow_split_info,
5795                         struct rte_flow_error *error)
5796 {
5797         struct mlx5_priv *priv = dev->data->dev_private;
5798         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5799         struct rte_flow_action *sfx_actions = NULL;
5800         struct rte_flow_action *pre_actions = NULL;
5801         struct rte_flow_item *sfx_items = NULL;
5802         struct mlx5_flow *dev_flow = NULL;
5803         struct rte_flow_attr sfx_attr = *attr;
5804         struct mlx5_flow_meter_info *fm = NULL;
5805         uint8_t skip_scale_restore;
5806         bool has_mtr = false;
5807         bool has_modify = false;
5808         bool set_mtr_reg = true;
5809         bool is_mtr_hierarchy = false;
5810         uint32_t meter_id = 0;
5811         uint32_t mtr_idx = 0;
5812         uint32_t mtr_flow_id = 0;
5813         size_t act_size;
5814         size_t item_size;
5815         int actions_n = 0;
5816         int ret = 0;
5817
5818         if (priv->mtr_en)
5819                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5820                                                     &has_modify, &meter_id);
5821         if (has_mtr) {
5822                 if (flow->meter) {
5823                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5824                         if (!fm)
5825                                 return rte_flow_error_set(error, EINVAL,
5826                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5827                                                 NULL, "Meter not found.");
5828                 } else {
5829                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5830                         if (!fm)
5831                                 return rte_flow_error_set(error, EINVAL,
5832                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5833                                                 NULL, "Meter not found.");
5834                         ret = mlx5_flow_meter_attach(priv, fm,
5835                                                      &sfx_attr, error);
5836                         if (ret)
5837                                 return -rte_errno;
5838                         flow->meter = mtr_idx;
5839                 }
5840                 MLX5_ASSERT(wks);
5841                 wks->fm = fm;
5842                 if (!fm->def_policy) {
5843                         wks->policy = mlx5_flow_meter_policy_find(dev,
5844                                                                   fm->policy_id,
5845                                                                   NULL);
5846                         MLX5_ASSERT(wks->policy);
5847                         if (wks->policy->is_hierarchy) {
5848                                 wks->final_policy =
5849                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5850                                                                 wks->policy);
5851                                 if (!wks->final_policy)
5852                                         return rte_flow_error_set(error,
5853                                         EINVAL,
5854                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5855                                 "Failed to find terminal policy of hierarchy.");
5856                                 is_mtr_hierarchy = true;
5857                         }
5858                 }
5859                 /*
5860                  * If it isn't default-policy Meter, and
5861                  * 1. There's no action in flow to change
5862                  *    packet (modify/encap/decap etc.), OR
5863                  * 2. No drop count needed for this meter.
5864                  * 3. It's not meter hierarchy.
5865                  * Then no need to use regC to save meter id anymore.
5866                  */
5867                 if (!fm->def_policy && !is_mtr_hierarchy &&
5868                     (!has_modify || !fm->drop_cnt))
5869                         set_mtr_reg = false;
5870                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5871                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5872                            sizeof(struct mlx5_rte_flow_action_set_tag);
5873                 /* Suffix items: tag, vlan, port id, end. */
5874 #define METER_SUFFIX_ITEM 4
5875                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5876                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5877                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5878                                           0, SOCKET_ID_ANY);
5879                 if (!sfx_actions)
5880                         return rte_flow_error_set(error, ENOMEM,
5881                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5882                                                   NULL, "no memory to split "
5883                                                   "meter flow");
5884                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5885                              act_size);
5886                 /* There's no suffix flow for meter of non-default policy. */
5887                 if (!fm->def_policy)
5888                         pre_actions = sfx_actions + 1;
5889                 else
5890                         pre_actions = sfx_actions + actions_n;
5891                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5892                                             items, sfx_items, actions,
5893                                             sfx_actions, pre_actions,
5894                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5895                                             error);
5896                 if (ret) {
5897                         ret = -rte_errno;
5898                         goto exit;
5899                 }
5900                 /* Add the prefix subflow. */
5901                 flow_split_info->prefix_mark = 0;
5902                 skip_scale_restore = flow_split_info->skip_scale;
5903                 flow_split_info->skip_scale |=
5904                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5905                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5906                                               attr, items, pre_actions,
5907                                               flow_split_info, error);
5908                 flow_split_info->skip_scale = skip_scale_restore;
5909                 if (ret) {
5910                         if (mtr_flow_id)
5911                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5912                         ret = -rte_errno;
5913                         goto exit;
5914                 }
5915                 if (mtr_flow_id) {
5916                         dev_flow->handle->split_flow_id = mtr_flow_id;
5917                         dev_flow->handle->is_meter_flow_id = 1;
5918                 }
5919                 if (!fm->def_policy) {
5920                         if (!set_mtr_reg && fm->drop_cnt)
5921                                 ret =
5922                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5923                                                         &sfx_attr, items,
5924                                                         flow_split_info,
5925                                                         fm, error);
5926                         goto exit;
5927                 }
5928                 /* Setting the sfx group atrr. */
5929                 sfx_attr.group = sfx_attr.transfer ?
5930                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5931                                  MLX5_FLOW_TABLE_LEVEL_METER;
5932                 flow_split_info->prefix_layers =
5933                                 flow_get_prefix_layer_flags(dev_flow);
5934                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5935                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5936         }
5937         /* Add the prefix subflow. */
5938         ret = flow_create_split_metadata(dev, flow,
5939                                          &sfx_attr, sfx_items ?
5940                                          sfx_items : items,
5941                                          sfx_actions ? sfx_actions : actions,
5942                                          flow_split_info, error);
5943 exit:
5944         if (sfx_actions)
5945                 mlx5_free(sfx_actions);
5946         return ret;
5947 }
5948
5949 /**
5950  * The splitting for sample feature.
5951  *
5952  * Once Sample action is detected in the action list, the flow actions should
5953  * be split into prefix sub flow and suffix sub flow.
5954  *
5955  * The original items remain in the prefix sub flow, all actions preceding the
5956  * sample action and the sample action itself will be copied to the prefix
5957  * sub flow, the actions following the sample action will be copied to the
5958  * suffix sub flow, Queue action always be located in the suffix sub flow.
5959  *
5960  * In order to make the packet from prefix sub flow matches with suffix sub
5961  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5962  * flow uses tag item with the unique flow id.
5963  *
5964  * @param dev
5965  *   Pointer to Ethernet device.
5966  * @param[in] flow
5967  *   Parent flow structure pointer.
5968  * @param[in] attr
5969  *   Flow rule attributes.
5970  * @param[in] items
5971  *   Pattern specification (list terminated by the END pattern item).
5972  * @param[in] actions
5973  *   Associated actions (list terminated by the END action).
5974  * @param[in] flow_split_info
5975  *   Pointer to flow split info structure.
5976  * @param[out] error
5977  *   Perform verbose error reporting if not NULL.
5978  * @return
5979  *   0 on success, negative value otherwise
5980  */
5981 static int
5982 flow_create_split_sample(struct rte_eth_dev *dev,
5983                          struct rte_flow *flow,
5984                          const struct rte_flow_attr *attr,
5985                          const struct rte_flow_item items[],
5986                          const struct rte_flow_action actions[],
5987                          struct mlx5_flow_split_info *flow_split_info,
5988                          struct rte_flow_error *error)
5989 {
5990         struct mlx5_priv *priv = dev->data->dev_private;
5991         struct rte_flow_action *sfx_actions = NULL;
5992         struct rte_flow_action *pre_actions = NULL;
5993         struct rte_flow_item *sfx_items = NULL;
5994         struct mlx5_flow *dev_flow = NULL;
5995         struct rte_flow_attr sfx_attr = *attr;
5996 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5997         struct mlx5_flow_dv_sample_resource *sample_res;
5998         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5999         struct mlx5_flow_tbl_resource *sfx_tbl;
6000 #endif
6001         size_t act_size;
6002         size_t item_size;
6003         uint32_t fdb_tx = 0;
6004         int32_t tag_id = 0;
6005         int actions_n = 0;
6006         int sample_action_pos;
6007         int qrss_action_pos;
6008         int add_tag = 0;
6009         int modify_after_mirror = 0;
6010         uint16_t jump_table = 0;
6011         const uint32_t next_ft_step = 1;
6012         int ret = 0;
6013
6014         if (priv->sampler_en)
6015                 actions_n = flow_check_match_action(actions, attr,
6016                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6017                                         &sample_action_pos, &qrss_action_pos,
6018                                         &modify_after_mirror);
6019         if (actions_n) {
6020                 /* The prefix actions must includes sample, tag, end. */
6021                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6022                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6023                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6024                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6025                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6026                                           item_size), 0, SOCKET_ID_ANY);
6027                 if (!sfx_actions)
6028                         return rte_flow_error_set(error, ENOMEM,
6029                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6030                                                   NULL, "no memory to split "
6031                                                   "sample flow");
6032                 /* The representor_id is UINT16_MAX for uplink. */
6033                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6034                 /*
6035                  * When reg_c_preserve is set, metadata registers Cx preserve
6036                  * their value even through packet duplication.
6037                  */
6038                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6039                 if (add_tag)
6040                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6041                                         + act_size);
6042                 if (modify_after_mirror)
6043                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6044                                      next_ft_step;
6045                 pre_actions = sfx_actions + actions_n;
6046                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6047                                                 actions, sfx_actions,
6048                                                 pre_actions, actions_n,
6049                                                 sample_action_pos,
6050                                                 qrss_action_pos, jump_table,
6051                                                 error);
6052                 if (tag_id < 0 || (add_tag && !tag_id)) {
6053                         ret = -rte_errno;
6054                         goto exit;
6055                 }
6056                 if (modify_after_mirror)
6057                         flow_split_info->skip_scale =
6058                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6059                 /* Add the prefix subflow. */
6060                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6061                                               items, pre_actions,
6062                                               flow_split_info, error);
6063                 if (ret) {
6064                         ret = -rte_errno;
6065                         goto exit;
6066                 }
6067                 dev_flow->handle->split_flow_id = tag_id;
6068 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6069                 if (!modify_after_mirror) {
6070                         /* Set the sfx group attr. */
6071                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6072                                                 dev_flow->dv.sample_res;
6073                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6074                                                 sample_res->normal_path_tbl;
6075                         sfx_tbl_data = container_of(sfx_tbl,
6076                                                 struct mlx5_flow_tbl_data_entry,
6077                                                 tbl);
6078                         sfx_attr.group = sfx_attr.transfer ?
6079                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6080                 } else {
6081                         MLX5_ASSERT(attr->transfer);
6082                         sfx_attr.group = jump_table;
6083                 }
6084                 flow_split_info->prefix_layers =
6085                                 flow_get_prefix_layer_flags(dev_flow);
6086                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6087                 /* Suffix group level already be scaled with factor, set
6088                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6089                  * again in translation.
6090                  */
6091                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6092 #endif
6093         }
6094         /* Add the suffix subflow. */
6095         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6096                                       sfx_items ? sfx_items : items,
6097                                       sfx_actions ? sfx_actions : actions,
6098                                       flow_split_info, error);
6099 exit:
6100         if (sfx_actions)
6101                 mlx5_free(sfx_actions);
6102         return ret;
6103 }
6104
6105 /**
6106  * Split the flow to subflow set. The splitters might be linked
6107  * in the chain, like this:
6108  * flow_create_split_outer() calls:
6109  *   flow_create_split_meter() calls:
6110  *     flow_create_split_metadata(meter_subflow_0) calls:
6111  *       flow_create_split_inner(metadata_subflow_0)
6112  *       flow_create_split_inner(metadata_subflow_1)
6113  *       flow_create_split_inner(metadata_subflow_2)
6114  *     flow_create_split_metadata(meter_subflow_1) calls:
6115  *       flow_create_split_inner(metadata_subflow_0)
6116  *       flow_create_split_inner(metadata_subflow_1)
6117  *       flow_create_split_inner(metadata_subflow_2)
6118  *
6119  * This provide flexible way to add new levels of flow splitting.
6120  * The all of successfully created subflows are included to the
6121  * parent flow dev_flow list.
6122  *
6123  * @param dev
6124  *   Pointer to Ethernet device.
6125  * @param[in] flow
6126  *   Parent flow structure pointer.
6127  * @param[in] attr
6128  *   Flow rule attributes.
6129  * @param[in] items
6130  *   Pattern specification (list terminated by the END pattern item).
6131  * @param[in] actions
6132  *   Associated actions (list terminated by the END action).
6133  * @param[in] flow_split_info
6134  *   Pointer to flow split info structure.
6135  * @param[out] error
6136  *   Perform verbose error reporting if not NULL.
6137  * @return
6138  *   0 on success, negative value otherwise
6139  */
6140 static int
6141 flow_create_split_outer(struct rte_eth_dev *dev,
6142                         struct rte_flow *flow,
6143                         const struct rte_flow_attr *attr,
6144                         const struct rte_flow_item items[],
6145                         const struct rte_flow_action actions[],
6146                         struct mlx5_flow_split_info *flow_split_info,
6147                         struct rte_flow_error *error)
6148 {
6149         int ret;
6150
6151         ret = flow_create_split_sample(dev, flow, attr, items,
6152                                        actions, flow_split_info, error);
6153         MLX5_ASSERT(ret <= 0);
6154         return ret;
6155 }
6156
6157 static inline struct mlx5_flow_tunnel *
6158 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6159 {
6160         struct mlx5_flow_tunnel *tunnel;
6161
6162 #pragma GCC diagnostic push
6163 #pragma GCC diagnostic ignored "-Wcast-qual"
6164         tunnel = (typeof(tunnel))flow->tunnel;
6165 #pragma GCC diagnostic pop
6166
6167         return tunnel;
6168 }
6169
6170 /**
6171  * Adjust flow RSS workspace if needed.
6172  *
6173  * @param wks
6174  *   Pointer to thread flow work space.
6175  * @param rss_desc
6176  *   Pointer to RSS descriptor.
6177  * @param[in] nrssq_num
6178  *   New RSS queue number.
6179  *
6180  * @return
6181  *   0 on success, -1 otherwise and rte_errno is set.
6182  */
6183 static int
6184 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6185                           struct mlx5_flow_rss_desc *rss_desc,
6186                           uint32_t nrssq_num)
6187 {
6188         if (likely(nrssq_num <= wks->rssq_num))
6189                 return 0;
6190         rss_desc->queue = realloc(rss_desc->queue,
6191                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6192         if (!rss_desc->queue) {
6193                 rte_errno = ENOMEM;
6194                 return -1;
6195         }
6196         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6197         return 0;
6198 }
6199
6200 /**
6201  * Create a flow and add it to @p list.
6202  *
6203  * @param dev
6204  *   Pointer to Ethernet device.
6205  * @param list
6206  *   Pointer to a TAILQ flow list. If this parameter NULL,
6207  *   no list insertion occurred, flow is just created,
6208  *   this is caller's responsibility to track the
6209  *   created flow.
6210  * @param[in] attr
6211  *   Flow rule attributes.
6212  * @param[in] items
6213  *   Pattern specification (list terminated by the END pattern item).
6214  * @param[in] actions
6215  *   Associated actions (list terminated by the END action).
6216  * @param[in] external
6217  *   This flow rule is created by request external to PMD.
6218  * @param[out] error
6219  *   Perform verbose error reporting if not NULL.
6220  *
6221  * @return
6222  *   A flow index on success, 0 otherwise and rte_errno is set.
6223  */
6224 static uint32_t
6225 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6226                  const struct rte_flow_attr *attr,
6227                  const struct rte_flow_item items[],
6228                  const struct rte_flow_action original_actions[],
6229                  bool external, struct rte_flow_error *error)
6230 {
6231         struct mlx5_priv *priv = dev->data->dev_private;
6232         struct rte_flow *flow = NULL;
6233         struct mlx5_flow *dev_flow;
6234         const struct rte_flow_action_rss *rss = NULL;
6235         struct mlx5_translated_action_handle
6236                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6237         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6238         union {
6239                 struct mlx5_flow_expand_rss buf;
6240                 uint8_t buffer[2048];
6241         } expand_buffer;
6242         union {
6243                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6244                 uint8_t buffer[2048];
6245         } actions_rx;
6246         union {
6247                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6248                 uint8_t buffer[2048];
6249         } actions_hairpin_tx;
6250         union {
6251                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6252                 uint8_t buffer[2048];
6253         } items_tx;
6254         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6255         struct mlx5_flow_rss_desc *rss_desc;
6256         const struct rte_flow_action *p_actions_rx;
6257         uint32_t i;
6258         uint32_t idx = 0;
6259         int hairpin_flow;
6260         struct rte_flow_attr attr_tx = { .priority = 0 };
6261         const struct rte_flow_action *actions;
6262         struct rte_flow_action *translated_actions = NULL;
6263         struct mlx5_flow_tunnel *tunnel;
6264         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6265         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6266         struct mlx5_flow_split_info flow_split_info = {
6267                 .external = !!external,
6268                 .skip_scale = 0,
6269                 .flow_idx = 0,
6270                 .prefix_mark = 0,
6271                 .prefix_layers = 0,
6272                 .table_id = 0
6273         };
6274         int ret;
6275
6276         MLX5_ASSERT(wks);
6277         rss_desc = &wks->rss_desc;
6278         ret = flow_action_handles_translate(dev, original_actions,
6279                                             indir_actions,
6280                                             &indir_actions_n,
6281                                             &translated_actions, error);
6282         if (ret < 0) {
6283                 MLX5_ASSERT(translated_actions == NULL);
6284                 return 0;
6285         }
6286         actions = translated_actions ? translated_actions : original_actions;
6287         p_actions_rx = actions;
6288         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6289         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6290                                 external, hairpin_flow, error);
6291         if (ret < 0)
6292                 goto error_before_hairpin_split;
6293         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6294         if (!flow) {
6295                 rte_errno = ENOMEM;
6296                 goto error_before_hairpin_split;
6297         }
6298         if (hairpin_flow > 0) {
6299                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6300                         rte_errno = EINVAL;
6301                         goto error_before_hairpin_split;
6302                 }
6303                 flow_hairpin_split(dev, actions, actions_rx.actions,
6304                                    actions_hairpin_tx.actions, items_tx.items,
6305                                    idx);
6306                 p_actions_rx = actions_rx.actions;
6307         }
6308         flow_split_info.flow_idx = idx;
6309         flow->drv_type = flow_get_drv_type(dev, attr);
6310         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6311                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6312         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6313         /* RSS Action only works on NIC RX domain */
6314         if (attr->ingress && !attr->transfer)
6315                 rss = flow_get_rss_action(dev, p_actions_rx);
6316         if (rss) {
6317                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6318                         return 0;
6319                 /*
6320                  * The following information is required by
6321                  * mlx5_flow_hashfields_adjust() in advance.
6322                  */
6323                 rss_desc->level = rss->level;
6324                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6325                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6326         }
6327         flow->dev_handles = 0;
6328         if (rss && rss->types) {
6329                 unsigned int graph_root;
6330
6331                 graph_root = find_graph_root(items, rss->level);
6332                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6333                                            items, rss->types,
6334                                            mlx5_support_expansion, graph_root);
6335                 MLX5_ASSERT(ret > 0 &&
6336                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6337                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6338                         for (i = 0; i < buf->entries; ++i)
6339                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6340                 }
6341         } else {
6342                 buf->entries = 1;
6343                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6344         }
6345         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6346                                                       indir_actions_n);
6347         for (i = 0; i < buf->entries; ++i) {
6348                 /* Initialize flow split data. */
6349                 flow_split_info.prefix_layers = 0;
6350                 flow_split_info.prefix_mark = 0;
6351                 flow_split_info.skip_scale = 0;
6352                 /*
6353                  * The splitter may create multiple dev_flows,
6354                  * depending on configuration. In the simplest
6355                  * case it just creates unmodified original flow.
6356                  */
6357                 ret = flow_create_split_outer(dev, flow, attr,
6358                                               buf->entry[i].pattern,
6359                                               p_actions_rx, &flow_split_info,
6360                                               error);
6361                 if (ret < 0)
6362                         goto error;
6363                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6364                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6365                                                            p_actions_rx,
6366                                                            idx,
6367                                                            wks->flows[0].tunnel,
6368                                                            &default_miss_ctx,
6369                                                            error);
6370                         if (ret < 0) {
6371                                 mlx5_free(default_miss_ctx.queue);
6372                                 goto error;
6373                         }
6374                 }
6375         }
6376         /* Create the tx flow. */
6377         if (hairpin_flow) {
6378                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6379                 attr_tx.ingress = 0;
6380                 attr_tx.egress = 1;
6381                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6382                                          actions_hairpin_tx.actions,
6383                                          idx, error);
6384                 if (!dev_flow)
6385                         goto error;
6386                 dev_flow->flow = flow;
6387                 dev_flow->external = 0;
6388                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6389                               dev_flow->handle, next);
6390                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6391                                          items_tx.items,
6392                                          actions_hairpin_tx.actions, error);
6393                 if (ret < 0)
6394                         goto error;
6395         }
6396         /*
6397          * Update the metadata register copy table. If extensive
6398          * metadata feature is enabled and registers are supported
6399          * we might create the extra rte_flow for each unique
6400          * MARK/FLAG action ID.
6401          *
6402          * The table is updated for ingress Flows only, because
6403          * the egress Flows belong to the different device and
6404          * copy table should be updated in peer NIC Rx domain.
6405          */
6406         if (attr->ingress &&
6407             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6408                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6409                 if (ret)
6410                         goto error;
6411         }
6412         /*
6413          * If the flow is external (from application) OR device is started,
6414          * OR mreg discover, then apply immediately.
6415          */
6416         if (external || dev->data->dev_started ||
6417             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6418              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6419                 ret = flow_drv_apply(dev, flow, error);
6420                 if (ret < 0)
6421                         goto error;
6422         }
6423         flow->type = type;
6424         flow_rxq_flags_set(dev, flow);
6425         rte_free(translated_actions);
6426         tunnel = flow_tunnel_from_rule(wks->flows);
6427         if (tunnel) {
6428                 flow->tunnel = 1;
6429                 flow->tunnel_id = tunnel->tunnel_id;
6430                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6431                 mlx5_free(default_miss_ctx.queue);
6432         }
6433         mlx5_flow_pop_thread_workspace();
6434         return idx;
6435 error:
6436         MLX5_ASSERT(flow);
6437         ret = rte_errno; /* Save rte_errno before cleanup. */
6438         flow_mreg_del_copy_action(dev, flow);
6439         flow_drv_destroy(dev, flow);
6440         if (rss_desc->shared_rss)
6441                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6442                         mlx5_ipool_get
6443                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6444                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6445         mlx5_ipool_free(priv->flows[type], idx);
6446         rte_errno = ret; /* Restore rte_errno. */
6447         ret = rte_errno;
6448         rte_errno = ret;
6449         mlx5_flow_pop_thread_workspace();
6450 error_before_hairpin_split:
6451         rte_free(translated_actions);
6452         return 0;
6453 }
6454
6455 /**
6456  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6457  * incoming packets to table 1.
6458  *
6459  * Other flow rules, requested for group n, will be created in
6460  * e-switch table n+1.
6461  * Jump action to e-switch group n will be created to group n+1.
6462  *
6463  * Used when working in switchdev mode, to utilise advantages of table 1
6464  * and above.
6465  *
6466  * @param dev
6467  *   Pointer to Ethernet device.
6468  *
6469  * @return
6470  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6471  */
6472 struct rte_flow *
6473 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6474 {
6475         const struct rte_flow_attr attr = {
6476                 .group = 0,
6477                 .priority = 0,
6478                 .ingress = 1,
6479                 .egress = 0,
6480                 .transfer = 1,
6481         };
6482         const struct rte_flow_item pattern = {
6483                 .type = RTE_FLOW_ITEM_TYPE_END,
6484         };
6485         struct rte_flow_action_jump jump = {
6486                 .group = 1,
6487         };
6488         const struct rte_flow_action actions[] = {
6489                 {
6490                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6491                         .conf = &jump,
6492                 },
6493                 {
6494                         .type = RTE_FLOW_ACTION_TYPE_END,
6495                 },
6496         };
6497         struct rte_flow_error error;
6498
6499         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6500                                                    &attr, &pattern,
6501                                                    actions, false, &error);
6502 }
6503
6504 /**
6505  * Validate a flow supported by the NIC.
6506  *
6507  * @see rte_flow_validate()
6508  * @see rte_flow_ops
6509  */
6510 int
6511 mlx5_flow_validate(struct rte_eth_dev *dev,
6512                    const struct rte_flow_attr *attr,
6513                    const struct rte_flow_item items[],
6514                    const struct rte_flow_action original_actions[],
6515                    struct rte_flow_error *error)
6516 {
6517         int hairpin_flow;
6518         struct mlx5_translated_action_handle
6519                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6520         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6521         const struct rte_flow_action *actions;
6522         struct rte_flow_action *translated_actions = NULL;
6523         int ret = flow_action_handles_translate(dev, original_actions,
6524                                                 indir_actions,
6525                                                 &indir_actions_n,
6526                                                 &translated_actions, error);
6527
6528         if (ret)
6529                 return ret;
6530         actions = translated_actions ? translated_actions : original_actions;
6531         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6532         ret = flow_drv_validate(dev, attr, items, actions,
6533                                 true, hairpin_flow, error);
6534         rte_free(translated_actions);
6535         return ret;
6536 }
6537
6538 /**
6539  * Create a flow.
6540  *
6541  * @see rte_flow_create()
6542  * @see rte_flow_ops
6543  */
6544 struct rte_flow *
6545 mlx5_flow_create(struct rte_eth_dev *dev,
6546                  const struct rte_flow_attr *attr,
6547                  const struct rte_flow_item items[],
6548                  const struct rte_flow_action actions[],
6549                  struct rte_flow_error *error)
6550 {
6551         /*
6552          * If the device is not started yet, it is not allowed to created a
6553          * flow from application. PMD default flows and traffic control flows
6554          * are not affected.
6555          */
6556         if (unlikely(!dev->data->dev_started)) {
6557                 DRV_LOG(DEBUG, "port %u is not started when "
6558                         "inserting a flow", dev->data->port_id);
6559                 rte_flow_error_set(error, ENODEV,
6560                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6561                                    NULL,
6562                                    "port not started");
6563                 return NULL;
6564         }
6565
6566         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6567                                                    attr, items, actions,
6568                                                    true, error);
6569 }
6570
6571 /**
6572  * Destroy a flow in a list.
6573  *
6574  * @param dev
6575  *   Pointer to Ethernet device.
6576  * @param[in] flow_idx
6577  *   Index of flow to destroy.
6578  */
6579 static void
6580 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6581                   uint32_t flow_idx)
6582 {
6583         struct mlx5_priv *priv = dev->data->dev_private;
6584         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6585
6586         if (!flow)
6587                 return;
6588         MLX5_ASSERT(flow->type == type);
6589         /*
6590          * Update RX queue flags only if port is started, otherwise it is
6591          * already clean.
6592          */
6593         if (dev->data->dev_started)
6594                 flow_rxq_flags_trim(dev, flow);
6595         flow_drv_destroy(dev, flow);
6596         if (flow->tunnel) {
6597                 struct mlx5_flow_tunnel *tunnel;
6598
6599                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6600                 RTE_VERIFY(tunnel);
6601                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6602                         mlx5_flow_tunnel_free(dev, tunnel);
6603         }
6604         flow_mreg_del_copy_action(dev, flow);
6605         mlx5_ipool_free(priv->flows[type], flow_idx);
6606 }
6607
6608 /**
6609  * Destroy all flows.
6610  *
6611  * @param dev
6612  *   Pointer to Ethernet device.
6613  * @param type
6614  *   Flow type to be flushed.
6615  * @param active
6616  *   If flushing is called avtively.
6617  */
6618 void
6619 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6620                      bool active)
6621 {
6622         struct mlx5_priv *priv = dev->data->dev_private;
6623         uint32_t num_flushed = 0, fidx = 1;
6624         struct rte_flow *flow;
6625
6626         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6627                 flow_list_destroy(dev, type, fidx);
6628                 num_flushed++;
6629         }
6630         if (active) {
6631                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6632                         dev->data->port_id, num_flushed);
6633         }
6634 }
6635
6636 /**
6637  * Stop all default actions for flows.
6638  *
6639  * @param dev
6640  *   Pointer to Ethernet device.
6641  */
6642 void
6643 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6644 {
6645         flow_mreg_del_default_copy_action(dev);
6646         flow_rxq_flags_clear(dev);
6647 }
6648
6649 /**
6650  * Start all default actions for flows.
6651  *
6652  * @param dev
6653  *   Pointer to Ethernet device.
6654  * @return
6655  *   0 on success, a negative errno value otherwise and rte_errno is set.
6656  */
6657 int
6658 mlx5_flow_start_default(struct rte_eth_dev *dev)
6659 {
6660         struct rte_flow_error error;
6661
6662         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6663         return flow_mreg_add_default_copy_action(dev, &error);
6664 }
6665
6666 /**
6667  * Release key of thread specific flow workspace data.
6668  */
6669 void
6670 flow_release_workspace(void *data)
6671 {
6672         struct mlx5_flow_workspace *wks = data;
6673         struct mlx5_flow_workspace *next;
6674
6675         while (wks) {
6676                 next = wks->next;
6677                 free(wks->rss_desc.queue);
6678                 free(wks);
6679                 wks = next;
6680         }
6681 }
6682
6683 /**
6684  * Get thread specific current flow workspace.
6685  *
6686  * @return pointer to thread specific flow workspace data, NULL on error.
6687  */
6688 struct mlx5_flow_workspace*
6689 mlx5_flow_get_thread_workspace(void)
6690 {
6691         struct mlx5_flow_workspace *data;
6692
6693         data = mlx5_flow_os_get_specific_workspace();
6694         MLX5_ASSERT(data && data->inuse);
6695         if (!data || !data->inuse)
6696                 DRV_LOG(ERR, "flow workspace not initialized.");
6697         return data;
6698 }
6699
6700 /**
6701  * Allocate and init new flow workspace.
6702  *
6703  * @return pointer to flow workspace data, NULL on error.
6704  */
6705 static struct mlx5_flow_workspace*
6706 flow_alloc_thread_workspace(void)
6707 {
6708         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6709
6710         if (!data) {
6711                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6712                         "memory.");
6713                 return NULL;
6714         }
6715         data->rss_desc.queue = calloc(1,
6716                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6717         if (!data->rss_desc.queue)
6718                 goto err;
6719         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6720         return data;
6721 err:
6722         if (data->rss_desc.queue)
6723                 free(data->rss_desc.queue);
6724         free(data);
6725         return NULL;
6726 }
6727
6728 /**
6729  * Get new thread specific flow workspace.
6730  *
6731  * If current workspace inuse, create new one and set as current.
6732  *
6733  * @return pointer to thread specific flow workspace data, NULL on error.
6734  */
6735 static struct mlx5_flow_workspace*
6736 mlx5_flow_push_thread_workspace(void)
6737 {
6738         struct mlx5_flow_workspace *curr;
6739         struct mlx5_flow_workspace *data;
6740
6741         curr = mlx5_flow_os_get_specific_workspace();
6742         if (!curr) {
6743                 data = flow_alloc_thread_workspace();
6744                 if (!data)
6745                         return NULL;
6746         } else if (!curr->inuse) {
6747                 data = curr;
6748         } else if (curr->next) {
6749                 data = curr->next;
6750         } else {
6751                 data = flow_alloc_thread_workspace();
6752                 if (!data)
6753                         return NULL;
6754                 curr->next = data;
6755                 data->prev = curr;
6756         }
6757         data->inuse = 1;
6758         data->flow_idx = 0;
6759         /* Set as current workspace */
6760         if (mlx5_flow_os_set_specific_workspace(data))
6761                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6762         return data;
6763 }
6764
6765 /**
6766  * Close current thread specific flow workspace.
6767  *
6768  * If previous workspace available, set it as current.
6769  *
6770  * @return pointer to thread specific flow workspace data, NULL on error.
6771  */
6772 static void
6773 mlx5_flow_pop_thread_workspace(void)
6774 {
6775         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6776
6777         if (!data)
6778                 return;
6779         if (!data->inuse) {
6780                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6781                 return;
6782         }
6783         data->inuse = 0;
6784         if (!data->prev)
6785                 return;
6786         if (mlx5_flow_os_set_specific_workspace(data->prev))
6787                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6788 }
6789
6790 /**
6791  * Verify the flow list is empty
6792  *
6793  * @param dev
6794  *  Pointer to Ethernet device.
6795  *
6796  * @return the number of flows not released.
6797  */
6798 int
6799 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
6800 {
6801         struct mlx5_priv *priv = dev->data->dev_private;
6802         struct rte_flow *flow;
6803         uint32_t idx = 0;
6804         int ret = 0, i;
6805
6806         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
6807                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
6808                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
6809                                 dev->data->port_id, (void *)flow);
6810                         ret++;
6811                 }
6812         }
6813         return ret;
6814 }
6815
6816 /**
6817  * Enable default hairpin egress flow.
6818  *
6819  * @param dev
6820  *   Pointer to Ethernet device.
6821  * @param queue
6822  *   The queue index.
6823  *
6824  * @return
6825  *   0 on success, a negative errno value otherwise and rte_errno is set.
6826  */
6827 int
6828 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6829                             uint32_t queue)
6830 {
6831         const struct rte_flow_attr attr = {
6832                 .egress = 1,
6833                 .priority = 0,
6834         };
6835         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6836                 .queue = queue,
6837         };
6838         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6839                 .queue = UINT32_MAX,
6840         };
6841         struct rte_flow_item items[] = {
6842                 {
6843                         .type = (enum rte_flow_item_type)
6844                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6845                         .spec = &queue_spec,
6846                         .last = NULL,
6847                         .mask = &queue_mask,
6848                 },
6849                 {
6850                         .type = RTE_FLOW_ITEM_TYPE_END,
6851                 },
6852         };
6853         struct rte_flow_action_jump jump = {
6854                 .group = MLX5_HAIRPIN_TX_TABLE,
6855         };
6856         struct rte_flow_action actions[2];
6857         uint32_t flow_idx;
6858         struct rte_flow_error error;
6859
6860         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6861         actions[0].conf = &jump;
6862         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6863         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6864                                     &attr, items, actions, false, &error);
6865         if (!flow_idx) {
6866                 DRV_LOG(DEBUG,
6867                         "Failed to create ctrl flow: rte_errno(%d),"
6868                         " type(%d), message(%s)",
6869                         rte_errno, error.type,
6870                         error.message ? error.message : " (no stated reason)");
6871                 return -rte_errno;
6872         }
6873         return 0;
6874 }
6875
6876 /**
6877  * Enable a control flow configured from the control plane.
6878  *
6879  * @param dev
6880  *   Pointer to Ethernet device.
6881  * @param eth_spec
6882  *   An Ethernet flow spec to apply.
6883  * @param eth_mask
6884  *   An Ethernet flow mask to apply.
6885  * @param vlan_spec
6886  *   A VLAN flow spec to apply.
6887  * @param vlan_mask
6888  *   A VLAN flow mask to apply.
6889  *
6890  * @return
6891  *   0 on success, a negative errno value otherwise and rte_errno is set.
6892  */
6893 int
6894 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6895                     struct rte_flow_item_eth *eth_spec,
6896                     struct rte_flow_item_eth *eth_mask,
6897                     struct rte_flow_item_vlan *vlan_spec,
6898                     struct rte_flow_item_vlan *vlan_mask)
6899 {
6900         struct mlx5_priv *priv = dev->data->dev_private;
6901         const struct rte_flow_attr attr = {
6902                 .ingress = 1,
6903                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6904         };
6905         struct rte_flow_item items[] = {
6906                 {
6907                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6908                         .spec = eth_spec,
6909                         .last = NULL,
6910                         .mask = eth_mask,
6911                 },
6912                 {
6913                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6914                                               RTE_FLOW_ITEM_TYPE_END,
6915                         .spec = vlan_spec,
6916                         .last = NULL,
6917                         .mask = vlan_mask,
6918                 },
6919                 {
6920                         .type = RTE_FLOW_ITEM_TYPE_END,
6921                 },
6922         };
6923         uint16_t queue[priv->reta_idx_n];
6924         struct rte_flow_action_rss action_rss = {
6925                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6926                 .level = 0,
6927                 .types = priv->rss_conf.rss_hf,
6928                 .key_len = priv->rss_conf.rss_key_len,
6929                 .queue_num = priv->reta_idx_n,
6930                 .key = priv->rss_conf.rss_key,
6931                 .queue = queue,
6932         };
6933         struct rte_flow_action actions[] = {
6934                 {
6935                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6936                         .conf = &action_rss,
6937                 },
6938                 {
6939                         .type = RTE_FLOW_ACTION_TYPE_END,
6940                 },
6941         };
6942         uint32_t flow_idx;
6943         struct rte_flow_error error;
6944         unsigned int i;
6945
6946         if (!priv->reta_idx_n || !priv->rxqs_n) {
6947                 return 0;
6948         }
6949         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6950                 action_rss.types = 0;
6951         for (i = 0; i != priv->reta_idx_n; ++i)
6952                 queue[i] = (*priv->reta_idx)[i];
6953         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6954                                     &attr, items, actions, false, &error);
6955         if (!flow_idx)
6956                 return -rte_errno;
6957         return 0;
6958 }
6959
6960 /**
6961  * Enable a flow control configured from the control plane.
6962  *
6963  * @param dev
6964  *   Pointer to Ethernet device.
6965  * @param eth_spec
6966  *   An Ethernet flow spec to apply.
6967  * @param eth_mask
6968  *   An Ethernet flow mask to apply.
6969  *
6970  * @return
6971  *   0 on success, a negative errno value otherwise and rte_errno is set.
6972  */
6973 int
6974 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6975                struct rte_flow_item_eth *eth_spec,
6976                struct rte_flow_item_eth *eth_mask)
6977 {
6978         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6979 }
6980
6981 /**
6982  * Create default miss flow rule matching lacp traffic
6983  *
6984  * @param dev
6985  *   Pointer to Ethernet device.
6986  * @param eth_spec
6987  *   An Ethernet flow spec to apply.
6988  *
6989  * @return
6990  *   0 on success, a negative errno value otherwise and rte_errno is set.
6991  */
6992 int
6993 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6994 {
6995         /*
6996          * The LACP matching is done by only using ether type since using
6997          * a multicast dst mac causes kernel to give low priority to this flow.
6998          */
6999         static const struct rte_flow_item_eth lacp_spec = {
7000                 .type = RTE_BE16(0x8809),
7001         };
7002         static const struct rte_flow_item_eth lacp_mask = {
7003                 .type = 0xffff,
7004         };
7005         const struct rte_flow_attr attr = {
7006                 .ingress = 1,
7007         };
7008         struct rte_flow_item items[] = {
7009                 {
7010                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7011                         .spec = &lacp_spec,
7012                         .mask = &lacp_mask,
7013                 },
7014                 {
7015                         .type = RTE_FLOW_ITEM_TYPE_END,
7016                 },
7017         };
7018         struct rte_flow_action actions[] = {
7019                 {
7020                         .type = (enum rte_flow_action_type)
7021                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7022                 },
7023                 {
7024                         .type = RTE_FLOW_ACTION_TYPE_END,
7025                 },
7026         };
7027         struct rte_flow_error error;
7028         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7029                                         &attr, items, actions,
7030                                         false, &error);
7031
7032         if (!flow_idx)
7033                 return -rte_errno;
7034         return 0;
7035 }
7036
7037 /**
7038  * Destroy a flow.
7039  *
7040  * @see rte_flow_destroy()
7041  * @see rte_flow_ops
7042  */
7043 int
7044 mlx5_flow_destroy(struct rte_eth_dev *dev,
7045                   struct rte_flow *flow,
7046                   struct rte_flow_error *error __rte_unused)
7047 {
7048         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7049                                 (uintptr_t)(void *)flow);
7050         return 0;
7051 }
7052
7053 /**
7054  * Destroy all flows.
7055  *
7056  * @see rte_flow_flush()
7057  * @see rte_flow_ops
7058  */
7059 int
7060 mlx5_flow_flush(struct rte_eth_dev *dev,
7061                 struct rte_flow_error *error __rte_unused)
7062 {
7063         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7064         return 0;
7065 }
7066
7067 /**
7068  * Isolated mode.
7069  *
7070  * @see rte_flow_isolate()
7071  * @see rte_flow_ops
7072  */
7073 int
7074 mlx5_flow_isolate(struct rte_eth_dev *dev,
7075                   int enable,
7076                   struct rte_flow_error *error)
7077 {
7078         struct mlx5_priv *priv = dev->data->dev_private;
7079
7080         if (dev->data->dev_started) {
7081                 rte_flow_error_set(error, EBUSY,
7082                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7083                                    NULL,
7084                                    "port must be stopped first");
7085                 return -rte_errno;
7086         }
7087         priv->isolated = !!enable;
7088         if (enable)
7089                 dev->dev_ops = &mlx5_dev_ops_isolate;
7090         else
7091                 dev->dev_ops = &mlx5_dev_ops;
7092
7093         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7094         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7095
7096         return 0;
7097 }
7098
7099 /**
7100  * Query a flow.
7101  *
7102  * @see rte_flow_query()
7103  * @see rte_flow_ops
7104  */
7105 static int
7106 flow_drv_query(struct rte_eth_dev *dev,
7107                uint32_t flow_idx,
7108                const struct rte_flow_action *actions,
7109                void *data,
7110                struct rte_flow_error *error)
7111 {
7112         struct mlx5_priv *priv = dev->data->dev_private;
7113         const struct mlx5_flow_driver_ops *fops;
7114         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7115                                                flow_idx);
7116         enum mlx5_flow_drv_type ftype;
7117
7118         if (!flow) {
7119                 return rte_flow_error_set(error, ENOENT,
7120                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7121                           NULL,
7122                           "invalid flow handle");
7123         }
7124         ftype = flow->drv_type;
7125         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7126         fops = flow_get_drv_ops(ftype);
7127
7128         return fops->query(dev, flow, actions, data, error);
7129 }
7130
7131 /**
7132  * Query a flow.
7133  *
7134  * @see rte_flow_query()
7135  * @see rte_flow_ops
7136  */
7137 int
7138 mlx5_flow_query(struct rte_eth_dev *dev,
7139                 struct rte_flow *flow,
7140                 const struct rte_flow_action *actions,
7141                 void *data,
7142                 struct rte_flow_error *error)
7143 {
7144         int ret;
7145
7146         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7147                              error);
7148         if (ret < 0)
7149                 return ret;
7150         return 0;
7151 }
7152
7153 /**
7154  * Get rte_flow callbacks.
7155  *
7156  * @param dev
7157  *   Pointer to Ethernet device structure.
7158  * @param ops
7159  *   Pointer to operation-specific structure.
7160  *
7161  * @return 0
7162  */
7163 int
7164 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7165                   const struct rte_flow_ops **ops)
7166 {
7167         *ops = &mlx5_flow_ops;
7168         return 0;
7169 }
7170
7171 /**
7172  * Validate meter policy actions.
7173  * Dispatcher for action type specific validation.
7174  *
7175  * @param[in] dev
7176  *   Pointer to the Ethernet device structure.
7177  * @param[in] action
7178  *   The meter policy action object to validate.
7179  * @param[in] attr
7180  *   Attributes of flow to determine steering domain.
7181  * @param[out] is_rss
7182  *   Is RSS or not.
7183  * @param[out] domain_bitmap
7184  *   Domain bitmap.
7185  * @param[out] is_def_policy
7186  *   Is default policy or not.
7187  * @param[out] error
7188  *   Perform verbose error reporting if not NULL. Initialized in case of
7189  *   error only.
7190  *
7191  * @return
7192  *   0 on success, otherwise negative errno value.
7193  */
7194 int
7195 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7196                         const struct rte_flow_action *actions[RTE_COLORS],
7197                         struct rte_flow_attr *attr,
7198                         bool *is_rss,
7199                         uint8_t *domain_bitmap,
7200                         uint8_t *policy_mode,
7201                         struct rte_mtr_error *error)
7202 {
7203         const struct mlx5_flow_driver_ops *fops;
7204
7205         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7206         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7207                                        domain_bitmap, policy_mode, error);
7208 }
7209
7210 /**
7211  * Destroy the meter table set.
7212  *
7213  * @param[in] dev
7214  *   Pointer to Ethernet device.
7215  * @param[in] mtr_policy
7216  *   Meter policy struct.
7217  */
7218 void
7219 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7220                       struct mlx5_flow_meter_policy *mtr_policy)
7221 {
7222         const struct mlx5_flow_driver_ops *fops;
7223
7224         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7225         fops->destroy_mtr_acts(dev, mtr_policy);
7226 }
7227
7228 /**
7229  * Create policy action, lock free,
7230  * (mutex should be acquired by caller).
7231  * Dispatcher for action type specific call.
7232  *
7233  * @param[in] dev
7234  *   Pointer to the Ethernet device structure.
7235  * @param[in] mtr_policy
7236  *   Meter policy struct.
7237  * @param[in] action
7238  *   Action specification used to create meter actions.
7239  * @param[out] error
7240  *   Perform verbose error reporting if not NULL. Initialized in case of
7241  *   error only.
7242  *
7243  * @return
7244  *   0 on success, otherwise negative errno value.
7245  */
7246 int
7247 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7248                       struct mlx5_flow_meter_policy *mtr_policy,
7249                       const struct rte_flow_action *actions[RTE_COLORS],
7250                       struct rte_mtr_error *error)
7251 {
7252         const struct mlx5_flow_driver_ops *fops;
7253
7254         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7255         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7256 }
7257
7258 /**
7259  * Create policy rules, lock free,
7260  * (mutex should be acquired by caller).
7261  * Dispatcher for action type specific call.
7262  *
7263  * @param[in] dev
7264  *   Pointer to the Ethernet device structure.
7265  * @param[in] mtr_policy
7266  *   Meter policy struct.
7267  *
7268  * @return
7269  *   0 on success, -1 otherwise.
7270  */
7271 int
7272 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7273                              struct mlx5_flow_meter_policy *mtr_policy)
7274 {
7275         const struct mlx5_flow_driver_ops *fops;
7276
7277         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7278         return fops->create_policy_rules(dev, mtr_policy);
7279 }
7280
7281 /**
7282  * Destroy policy rules, lock free,
7283  * (mutex should be acquired by caller).
7284  * Dispatcher for action type specific call.
7285  *
7286  * @param[in] dev
7287  *   Pointer to the Ethernet device structure.
7288  * @param[in] mtr_policy
7289  *   Meter policy struct.
7290  */
7291 void
7292 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7293                              struct mlx5_flow_meter_policy *mtr_policy)
7294 {
7295         const struct mlx5_flow_driver_ops *fops;
7296
7297         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7298         fops->destroy_policy_rules(dev, mtr_policy);
7299 }
7300
7301 /**
7302  * Destroy the default policy table set.
7303  *
7304  * @param[in] dev
7305  *   Pointer to Ethernet device.
7306  */
7307 void
7308 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7309 {
7310         const struct mlx5_flow_driver_ops *fops;
7311
7312         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7313         fops->destroy_def_policy(dev);
7314 }
7315
7316 /**
7317  * Destroy the default policy table set.
7318  *
7319  * @param[in] dev
7320  *   Pointer to Ethernet device.
7321  *
7322  * @return
7323  *   0 on success, -1 otherwise.
7324  */
7325 int
7326 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7327 {
7328         const struct mlx5_flow_driver_ops *fops;
7329
7330         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7331         return fops->create_def_policy(dev);
7332 }
7333
7334 /**
7335  * Create the needed meter and suffix tables.
7336  *
7337  * @param[in] dev
7338  *   Pointer to Ethernet device.
7339  *
7340  * @return
7341  *   0 on success, -1 otherwise.
7342  */
7343 int
7344 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7345                         struct mlx5_flow_meter_info *fm,
7346                         uint32_t mtr_idx,
7347                         uint8_t domain_bitmap)
7348 {
7349         const struct mlx5_flow_driver_ops *fops;
7350
7351         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7352         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7353 }
7354
7355 /**
7356  * Destroy the meter table set.
7357  *
7358  * @param[in] dev
7359  *   Pointer to Ethernet device.
7360  * @param[in] tbl
7361  *   Pointer to the meter table set.
7362  */
7363 void
7364 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7365                            struct mlx5_flow_meter_info *fm)
7366 {
7367         const struct mlx5_flow_driver_ops *fops;
7368
7369         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7370         fops->destroy_mtr_tbls(dev, fm);
7371 }
7372
7373 /**
7374  * Destroy the global meter drop table.
7375  *
7376  * @param[in] dev
7377  *   Pointer to Ethernet device.
7378  */
7379 void
7380 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7381 {
7382         const struct mlx5_flow_driver_ops *fops;
7383
7384         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7385         fops->destroy_mtr_drop_tbls(dev);
7386 }
7387
7388 /**
7389  * Destroy the sub policy table with RX queue.
7390  *
7391  * @param[in] dev
7392  *   Pointer to Ethernet device.
7393  * @param[in] mtr_policy
7394  *   Pointer to meter policy table.
7395  */
7396 void
7397 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7398                 struct mlx5_flow_meter_policy *mtr_policy)
7399 {
7400         const struct mlx5_flow_driver_ops *fops;
7401
7402         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7403         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7404 }
7405
7406 /**
7407  * Allocate the needed aso flow meter id.
7408  *
7409  * @param[in] dev
7410  *   Pointer to Ethernet device.
7411  *
7412  * @return
7413  *   Index to aso flow meter on success, NULL otherwise.
7414  */
7415 uint32_t
7416 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7417 {
7418         const struct mlx5_flow_driver_ops *fops;
7419
7420         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7421         return fops->create_meter(dev);
7422 }
7423
7424 /**
7425  * Free the aso flow meter id.
7426  *
7427  * @param[in] dev
7428  *   Pointer to Ethernet device.
7429  * @param[in] mtr_idx
7430  *  Index to aso flow meter to be free.
7431  *
7432  * @return
7433  *   0 on success.
7434  */
7435 void
7436 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7437 {
7438         const struct mlx5_flow_driver_ops *fops;
7439
7440         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7441         fops->free_meter(dev, mtr_idx);
7442 }
7443
7444 /**
7445  * Allocate a counter.
7446  *
7447  * @param[in] dev
7448  *   Pointer to Ethernet device structure.
7449  *
7450  * @return
7451  *   Index to allocated counter  on success, 0 otherwise.
7452  */
7453 uint32_t
7454 mlx5_counter_alloc(struct rte_eth_dev *dev)
7455 {
7456         const struct mlx5_flow_driver_ops *fops;
7457         struct rte_flow_attr attr = { .transfer = 0 };
7458
7459         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7460                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7461                 return fops->counter_alloc(dev);
7462         }
7463         DRV_LOG(ERR,
7464                 "port %u counter allocate is not supported.",
7465                  dev->data->port_id);
7466         return 0;
7467 }
7468
7469 /**
7470  * Free a counter.
7471  *
7472  * @param[in] dev
7473  *   Pointer to Ethernet device structure.
7474  * @param[in] cnt
7475  *   Index to counter to be free.
7476  */
7477 void
7478 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7479 {
7480         const struct mlx5_flow_driver_ops *fops;
7481         struct rte_flow_attr attr = { .transfer = 0 };
7482
7483         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7484                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7485                 fops->counter_free(dev, cnt);
7486                 return;
7487         }
7488         DRV_LOG(ERR,
7489                 "port %u counter free is not supported.",
7490                  dev->data->port_id);
7491 }
7492
7493 /**
7494  * Query counter statistics.
7495  *
7496  * @param[in] dev
7497  *   Pointer to Ethernet device structure.
7498  * @param[in] cnt
7499  *   Index to counter to query.
7500  * @param[in] clear
7501  *   Set to clear counter statistics.
7502  * @param[out] pkts
7503  *   The counter hits packets number to save.
7504  * @param[out] bytes
7505  *   The counter hits bytes number to save.
7506  *
7507  * @return
7508  *   0 on success, a negative errno value otherwise.
7509  */
7510 int
7511 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7512                    bool clear, uint64_t *pkts, uint64_t *bytes)
7513 {
7514         const struct mlx5_flow_driver_ops *fops;
7515         struct rte_flow_attr attr = { .transfer = 0 };
7516
7517         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7518                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7519                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7520         }
7521         DRV_LOG(ERR,
7522                 "port %u counter query is not supported.",
7523                  dev->data->port_id);
7524         return -ENOTSUP;
7525 }
7526
7527 /**
7528  * Allocate a new memory for the counter values wrapped by all the needed
7529  * management.
7530  *
7531  * @param[in] sh
7532  *   Pointer to mlx5_dev_ctx_shared object.
7533  *
7534  * @return
7535  *   0 on success, a negative errno value otherwise.
7536  */
7537 static int
7538 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7539 {
7540         struct mlx5_devx_mkey_attr mkey_attr;
7541         struct mlx5_counter_stats_mem_mng *mem_mng;
7542         volatile struct flow_counter_stats *raw_data;
7543         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7544         int size = (sizeof(struct flow_counter_stats) *
7545                         MLX5_COUNTERS_PER_POOL +
7546                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7547                         sizeof(struct mlx5_counter_stats_mem_mng);
7548         size_t pgsize = rte_mem_page_size();
7549         uint8_t *mem;
7550         int i;
7551
7552         if (pgsize == (size_t)-1) {
7553                 DRV_LOG(ERR, "Failed to get mem page size");
7554                 rte_errno = ENOMEM;
7555                 return -ENOMEM;
7556         }
7557         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7558         if (!mem) {
7559                 rte_errno = ENOMEM;
7560                 return -ENOMEM;
7561         }
7562         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7563         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7564         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7565                                                  IBV_ACCESS_LOCAL_WRITE);
7566         if (!mem_mng->umem) {
7567                 rte_errno = errno;
7568                 mlx5_free(mem);
7569                 return -rte_errno;
7570         }
7571         memset(&mkey_attr, 0, sizeof(mkey_attr));
7572         mkey_attr.addr = (uintptr_t)mem;
7573         mkey_attr.size = size;
7574         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7575         mkey_attr.pd = sh->pdn;
7576         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7577         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7578         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7579         if (!mem_mng->dm) {
7580                 mlx5_os_umem_dereg(mem_mng->umem);
7581                 rte_errno = errno;
7582                 mlx5_free(mem);
7583                 return -rte_errno;
7584         }
7585         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7586         raw_data = (volatile struct flow_counter_stats *)mem;
7587         for (i = 0; i < raws_n; ++i) {
7588                 mem_mng->raws[i].mem_mng = mem_mng;
7589                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7590         }
7591         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7592                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7593                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7594                                  next);
7595         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7596         sh->cmng.mem_mng = mem_mng;
7597         return 0;
7598 }
7599
7600 /**
7601  * Set the statistic memory to the new counter pool.
7602  *
7603  * @param[in] sh
7604  *   Pointer to mlx5_dev_ctx_shared object.
7605  * @param[in] pool
7606  *   Pointer to the pool to set the statistic memory.
7607  *
7608  * @return
7609  *   0 on success, a negative errno value otherwise.
7610  */
7611 static int
7612 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7613                                struct mlx5_flow_counter_pool *pool)
7614 {
7615         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7616         /* Resize statistic memory once used out. */
7617         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7618             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7619                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7620                 return -1;
7621         }
7622         rte_spinlock_lock(&pool->sl);
7623         pool->raw = cmng->mem_mng->raws + pool->index %
7624                     MLX5_CNT_CONTAINER_RESIZE;
7625         rte_spinlock_unlock(&pool->sl);
7626         pool->raw_hw = NULL;
7627         return 0;
7628 }
7629
7630 #define MLX5_POOL_QUERY_FREQ_US 1000000
7631
7632 /**
7633  * Set the periodic procedure for triggering asynchronous batch queries for all
7634  * the counter pools.
7635  *
7636  * @param[in] sh
7637  *   Pointer to mlx5_dev_ctx_shared object.
7638  */
7639 void
7640 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7641 {
7642         uint32_t pools_n, us;
7643
7644         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7645         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7646         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7647         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7648                 sh->cmng.query_thread_on = 0;
7649                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7650         } else {
7651                 sh->cmng.query_thread_on = 1;
7652         }
7653 }
7654
7655 /**
7656  * The periodic procedure for triggering asynchronous batch queries for all the
7657  * counter pools. This function is probably called by the host thread.
7658  *
7659  * @param[in] arg
7660  *   The parameter for the alarm process.
7661  */
7662 void
7663 mlx5_flow_query_alarm(void *arg)
7664 {
7665         struct mlx5_dev_ctx_shared *sh = arg;
7666         int ret;
7667         uint16_t pool_index = sh->cmng.pool_index;
7668         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7669         struct mlx5_flow_counter_pool *pool;
7670         uint16_t n_valid;
7671
7672         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7673                 goto set_alarm;
7674         rte_spinlock_lock(&cmng->pool_update_sl);
7675         pool = cmng->pools[pool_index];
7676         n_valid = cmng->n_valid;
7677         rte_spinlock_unlock(&cmng->pool_update_sl);
7678         /* Set the statistic memory to the new created pool. */
7679         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7680                 goto set_alarm;
7681         if (pool->raw_hw)
7682                 /* There is a pool query in progress. */
7683                 goto set_alarm;
7684         pool->raw_hw =
7685                 LIST_FIRST(&sh->cmng.free_stat_raws);
7686         if (!pool->raw_hw)
7687                 /* No free counter statistics raw memory. */
7688                 goto set_alarm;
7689         /*
7690          * Identify the counters released between query trigger and query
7691          * handle more efficiently. The counter released in this gap period
7692          * should wait for a new round of query as the new arrived packets
7693          * will not be taken into account.
7694          */
7695         pool->query_gen++;
7696         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7697                                                MLX5_COUNTERS_PER_POOL,
7698                                                NULL, NULL,
7699                                                pool->raw_hw->mem_mng->dm->id,
7700                                                (void *)(uintptr_t)
7701                                                pool->raw_hw->data,
7702                                                sh->devx_comp,
7703                                                (uint64_t)(uintptr_t)pool);
7704         if (ret) {
7705                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7706                         " %d", pool->min_dcs->id);
7707                 pool->raw_hw = NULL;
7708                 goto set_alarm;
7709         }
7710         LIST_REMOVE(pool->raw_hw, next);
7711         sh->cmng.pending_queries++;
7712         pool_index++;
7713         if (pool_index >= n_valid)
7714                 pool_index = 0;
7715 set_alarm:
7716         sh->cmng.pool_index = pool_index;
7717         mlx5_set_query_alarm(sh);
7718 }
7719
7720 /**
7721  * Check and callback event for new aged flow in the counter pool
7722  *
7723  * @param[in] sh
7724  *   Pointer to mlx5_dev_ctx_shared object.
7725  * @param[in] pool
7726  *   Pointer to Current counter pool.
7727  */
7728 static void
7729 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7730                    struct mlx5_flow_counter_pool *pool)
7731 {
7732         struct mlx5_priv *priv;
7733         struct mlx5_flow_counter *cnt;
7734         struct mlx5_age_info *age_info;
7735         struct mlx5_age_param *age_param;
7736         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7737         struct mlx5_counter_stats_raw *prev = pool->raw;
7738         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7739         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7740         uint16_t expected = AGE_CANDIDATE;
7741         uint32_t i;
7742
7743         pool->time_of_last_age_check = curr_time;
7744         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7745                 cnt = MLX5_POOL_GET_CNT(pool, i);
7746                 age_param = MLX5_CNT_TO_AGE(cnt);
7747                 if (__atomic_load_n(&age_param->state,
7748                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7749                         continue;
7750                 if (cur->data[i].hits != prev->data[i].hits) {
7751                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7752                                          __ATOMIC_RELAXED);
7753                         continue;
7754                 }
7755                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7756                                        time_delta,
7757                                        __ATOMIC_RELAXED) <= age_param->timeout)
7758                         continue;
7759                 /**
7760                  * Hold the lock first, or if between the
7761                  * state AGE_TMOUT and tailq operation the
7762                  * release happened, the release procedure
7763                  * may delete a non-existent tailq node.
7764                  */
7765                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7766                 age_info = GET_PORT_AGE_INFO(priv);
7767                 rte_spinlock_lock(&age_info->aged_sl);
7768                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7769                                                 AGE_TMOUT, false,
7770                                                 __ATOMIC_RELAXED,
7771                                                 __ATOMIC_RELAXED)) {
7772                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7773                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7774                 }
7775                 rte_spinlock_unlock(&age_info->aged_sl);
7776         }
7777         mlx5_age_event_prepare(sh);
7778 }
7779
7780 /**
7781  * Handler for the HW respond about ready values from an asynchronous batch
7782  * query. This function is probably called by the host thread.
7783  *
7784  * @param[in] sh
7785  *   The pointer to the shared device context.
7786  * @param[in] async_id
7787  *   The Devx async ID.
7788  * @param[in] status
7789  *   The status of the completion.
7790  */
7791 void
7792 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7793                                   uint64_t async_id, int status)
7794 {
7795         struct mlx5_flow_counter_pool *pool =
7796                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7797         struct mlx5_counter_stats_raw *raw_to_free;
7798         uint8_t query_gen = pool->query_gen ^ 1;
7799         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7800         enum mlx5_counter_type cnt_type =
7801                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7802                                 MLX5_COUNTER_TYPE_ORIGIN;
7803
7804         if (unlikely(status)) {
7805                 raw_to_free = pool->raw_hw;
7806         } else {
7807                 raw_to_free = pool->raw;
7808                 if (pool->is_aged)
7809                         mlx5_flow_aging_check(sh, pool);
7810                 rte_spinlock_lock(&pool->sl);
7811                 pool->raw = pool->raw_hw;
7812                 rte_spinlock_unlock(&pool->sl);
7813                 /* Be sure the new raw counters data is updated in memory. */
7814                 rte_io_wmb();
7815                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7816                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7817                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7818                                      &pool->counters[query_gen], next);
7819                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7820                 }
7821         }
7822         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7823         pool->raw_hw = NULL;
7824         sh->cmng.pending_queries--;
7825 }
7826
7827 static int
7828 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7829                     const struct flow_grp_info *grp_info,
7830                     struct rte_flow_error *error)
7831 {
7832         if (grp_info->transfer && grp_info->external &&
7833             grp_info->fdb_def_rule) {
7834                 if (group == UINT32_MAX)
7835                         return rte_flow_error_set
7836                                                 (error, EINVAL,
7837                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7838                                                  NULL,
7839                                                  "group index not supported");
7840                 *table = group + 1;
7841         } else {
7842                 *table = group;
7843         }
7844         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7845         return 0;
7846 }
7847
7848 /**
7849  * Translate the rte_flow group index to HW table value.
7850  *
7851  * If tunnel offload is disabled, all group ids converted to flow table
7852  * id using the standard method.
7853  * If tunnel offload is enabled, group id can be converted using the
7854  * standard or tunnel conversion method. Group conversion method
7855  * selection depends on flags in `grp_info` parameter:
7856  * - Internal (grp_info.external == 0) groups conversion uses the
7857  *   standard method.
7858  * - Group ids in JUMP action converted with the tunnel conversion.
7859  * - Group id in rule attribute conversion depends on a rule type and
7860  *   group id value:
7861  *   ** non zero group attributes converted with the tunnel method
7862  *   ** zero group attribute in non-tunnel rule is converted using the
7863  *      standard method - there's only one root table
7864  *   ** zero group attribute in steer tunnel rule is converted with the
7865  *      standard method - single root table
7866  *   ** zero group attribute in match tunnel rule is a special OvS
7867  *      case: that value is used for portability reasons. That group
7868  *      id is converted with the tunnel conversion method.
7869  *
7870  * @param[in] dev
7871  *   Port device
7872  * @param[in] tunnel
7873  *   PMD tunnel offload object
7874  * @param[in] group
7875  *   rte_flow group index value.
7876  * @param[out] table
7877  *   HW table value.
7878  * @param[in] grp_info
7879  *   flags used for conversion
7880  * @param[out] error
7881  *   Pointer to error structure.
7882  *
7883  * @return
7884  *   0 on success, a negative errno value otherwise and rte_errno is set.
7885  */
7886 int
7887 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7888                          const struct mlx5_flow_tunnel *tunnel,
7889                          uint32_t group, uint32_t *table,
7890                          const struct flow_grp_info *grp_info,
7891                          struct rte_flow_error *error)
7892 {
7893         int ret;
7894         bool standard_translation;
7895
7896         if (!grp_info->skip_scale && grp_info->external &&
7897             group < MLX5_MAX_TABLES_EXTERNAL)
7898                 group *= MLX5_FLOW_TABLE_FACTOR;
7899         if (is_tunnel_offload_active(dev)) {
7900                 standard_translation = !grp_info->external ||
7901                                         grp_info->std_tbl_fix;
7902         } else {
7903                 standard_translation = true;
7904         }
7905         DRV_LOG(DEBUG,
7906                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7907                 dev->data->port_id, group, grp_info->transfer,
7908                 grp_info->external, grp_info->fdb_def_rule,
7909                 standard_translation ? "STANDARD" : "TUNNEL");
7910         if (standard_translation)
7911                 ret = flow_group_to_table(dev->data->port_id, group, table,
7912                                           grp_info, error);
7913         else
7914                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7915                                                       table, error);
7916
7917         return ret;
7918 }
7919
7920 /**
7921  * Discover availability of metadata reg_c's.
7922  *
7923  * Iteratively use test flows to check availability.
7924  *
7925  * @param[in] dev
7926  *   Pointer to the Ethernet device structure.
7927  *
7928  * @return
7929  *   0 on success, a negative errno value otherwise and rte_errno is set.
7930  */
7931 int
7932 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7933 {
7934         struct mlx5_priv *priv = dev->data->dev_private;
7935         struct mlx5_dev_config *config = &priv->config;
7936         enum modify_reg idx;
7937         int n = 0;
7938
7939         /* reg_c[0] and reg_c[1] are reserved. */
7940         config->flow_mreg_c[n++] = REG_C_0;
7941         config->flow_mreg_c[n++] = REG_C_1;
7942         /* Discover availability of other reg_c's. */
7943         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7944                 struct rte_flow_attr attr = {
7945                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7946                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7947                         .ingress = 1,
7948                 };
7949                 struct rte_flow_item items[] = {
7950                         [0] = {
7951                                 .type = RTE_FLOW_ITEM_TYPE_END,
7952                         },
7953                 };
7954                 struct rte_flow_action actions[] = {
7955                         [0] = {
7956                                 .type = (enum rte_flow_action_type)
7957                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7958                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7959                                         .src = REG_C_1,
7960                                         .dst = idx,
7961                                 },
7962                         },
7963                         [1] = {
7964                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7965                                 .conf = &(struct rte_flow_action_jump){
7966                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7967                                 },
7968                         },
7969                         [2] = {
7970                                 .type = RTE_FLOW_ACTION_TYPE_END,
7971                         },
7972                 };
7973                 uint32_t flow_idx;
7974                 struct rte_flow *flow;
7975                 struct rte_flow_error error;
7976
7977                 if (!config->dv_flow_en)
7978                         break;
7979                 /* Create internal flow, validation skips copy action. */
7980                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
7981                                         items, actions, false, &error);
7982                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7983                                       flow_idx);
7984                 if (!flow)
7985                         continue;
7986                 config->flow_mreg_c[n++] = idx;
7987                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
7988         }
7989         for (; n < MLX5_MREG_C_NUM; ++n)
7990                 config->flow_mreg_c[n] = REG_NON;
7991         return 0;
7992 }
7993
7994 int
7995 save_dump_file(const uint8_t *data, uint32_t size,
7996         uint32_t type, uint32_t id, void *arg, FILE *file)
7997 {
7998         char line[BUF_SIZE];
7999         uint32_t out = 0;
8000         uint32_t k;
8001         uint32_t actions_num;
8002         struct rte_flow_query_count *count;
8003
8004         memset(line, 0, BUF_SIZE);
8005         switch (type) {
8006         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8007                 actions_num = *(uint32_t *)(arg);
8008                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8009                                 type, id, actions_num);
8010                 break;
8011         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8012                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8013                                 type, id);
8014                 break;
8015         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8016                 count = (struct rte_flow_query_count *)arg;
8017                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8018                                 id, count->hits, count->bytes);
8019                 return 0;
8020         default:
8021                 return -1;
8022         }
8023
8024         for (k = 0; k < size; k++) {
8025                 /* Make sure we do not overrun the line buffer length. */
8026                 if (out >= BUF_SIZE - 4) {
8027                         line[out] = '\0';
8028                         break;
8029                 }
8030                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8031                                 (data[k]) & 0xff);
8032         }
8033         fprintf(file, "%s\n", line);
8034         return 0;
8035 }
8036
8037 int
8038 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8039         struct rte_flow_query_count *count, struct rte_flow_error *error)
8040 {
8041         struct rte_flow_action action[2];
8042         enum mlx5_flow_drv_type ftype;
8043         const struct mlx5_flow_driver_ops *fops;
8044
8045         if (!flow) {
8046                 return rte_flow_error_set(error, ENOENT,
8047                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8048                                 NULL,
8049                                 "invalid flow handle");
8050         }
8051         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8052         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8053         if (flow->counter) {
8054                 memset(count, 0, sizeof(struct rte_flow_query_count));
8055                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8056                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8057                                                 ftype < MLX5_FLOW_TYPE_MAX);
8058                 fops = flow_get_drv_ops(ftype);
8059                 return fops->query(dev, flow, action, count, error);
8060         }
8061         return -1;
8062 }
8063
8064 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8065 /**
8066  * Dump flow ipool data to file
8067  *
8068  * @param[in] dev
8069  *   The pointer to Ethernet device.
8070  * @param[in] file
8071  *   A pointer to a file for output.
8072  * @param[out] error
8073  *   Perform verbose error reporting if not NULL. PMDs initialize this
8074  *   structure in case of error only.
8075  * @return
8076  *   0 on success, a negative value otherwise.
8077  */
8078 int
8079 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8080         struct rte_flow *flow, FILE *file,
8081         struct rte_flow_error *error)
8082 {
8083         struct mlx5_priv *priv = dev->data->dev_private;
8084         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8085         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8086         uint32_t handle_idx;
8087         struct mlx5_flow_handle *dh;
8088         struct rte_flow_query_count count;
8089         uint32_t actions_num;
8090         const uint8_t *data;
8091         size_t size;
8092         uint32_t id;
8093         uint32_t type;
8094
8095         if (!flow) {
8096                 return rte_flow_error_set(error, ENOENT,
8097                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8098                         NULL,
8099                         "invalid flow handle");
8100         }
8101         handle_idx = flow->dev_handles;
8102         while (handle_idx) {
8103                 dh = mlx5_ipool_get(priv->sh->ipool
8104                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8105                 if (!dh)
8106                         continue;
8107                 handle_idx = dh->next.next;
8108                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8109
8110                 /* query counter */
8111                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8112                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8113                         save_dump_file(NULL, 0, type,
8114                                         id, (void *)&count, file);
8115
8116                 /* Get modify_hdr and encap_decap buf from ipools. */
8117                 encap_decap = NULL;
8118                 modify_hdr = dh->dvh.modify_hdr;
8119
8120                 if (dh->dvh.rix_encap_decap) {
8121                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8122                                                 [MLX5_IPOOL_DECAP_ENCAP],
8123                                                 dh->dvh.rix_encap_decap);
8124                 }
8125                 if (modify_hdr) {
8126                         data = (const uint8_t *)modify_hdr->actions;
8127                         size = (size_t)(modify_hdr->actions_num) * 8;
8128                         actions_num = modify_hdr->actions_num;
8129                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8130                         save_dump_file(data, size, type, id,
8131                                         (void *)(&actions_num), file);
8132                 }
8133                 if (encap_decap) {
8134                         data = encap_decap->buf;
8135                         size = encap_decap->size;
8136                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8137                         save_dump_file(data, size, type,
8138                                                 id, NULL, file);
8139                 }
8140         }
8141         return 0;
8142 }
8143 #endif
8144
8145 /**
8146  * Dump flow raw hw data to file
8147  *
8148  * @param[in] dev
8149  *    The pointer to Ethernet device.
8150  * @param[in] file
8151  *   A pointer to a file for output.
8152  * @param[out] error
8153  *   Perform verbose error reporting if not NULL. PMDs initialize this
8154  *   structure in case of error only.
8155  * @return
8156  *   0 on success, a nagative value otherwise.
8157  */
8158 int
8159 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8160                    FILE *file,
8161                    struct rte_flow_error *error __rte_unused)
8162 {
8163         struct mlx5_priv *priv = dev->data->dev_private;
8164         struct mlx5_dev_ctx_shared *sh = priv->sh;
8165         uint32_t handle_idx;
8166         int ret;
8167         struct mlx5_flow_handle *dh;
8168         struct rte_flow *flow;
8169 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8170         uint32_t idx;
8171 #endif
8172
8173         if (!priv->config.dv_flow_en) {
8174                 if (fputs("device dv flow disabled\n", file) <= 0)
8175                         return -errno;
8176                 return -ENOTSUP;
8177         }
8178
8179         /* dump all */
8180         if (!flow_idx) {
8181 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8182                 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow)
8183                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8184 #endif
8185                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8186                                         sh->rx_domain,
8187                                         sh->tx_domain, file);
8188         }
8189         /* dump one */
8190         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8191                         (uintptr_t)(void *)flow_idx);
8192         if (!flow)
8193                 return -ENOENT;
8194
8195 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8196         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8197 #endif
8198         handle_idx = flow->dev_handles;
8199         while (handle_idx) {
8200                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8201                                 handle_idx);
8202                 if (!dh)
8203                         return -ENOENT;
8204                 if (dh->drv_flow) {
8205                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8206                                         file);
8207                         if (ret)
8208                                 return -ENOENT;
8209                 }
8210                 handle_idx = dh->next.next;
8211         }
8212         return 0;
8213 }
8214
8215 /**
8216  * Get aged-out flows.
8217  *
8218  * @param[in] dev
8219  *   Pointer to the Ethernet device structure.
8220  * @param[in] context
8221  *   The address of an array of pointers to the aged-out flows contexts.
8222  * @param[in] nb_countexts
8223  *   The length of context array pointers.
8224  * @param[out] error
8225  *   Perform verbose error reporting if not NULL. Initialized in case of
8226  *   error only.
8227  *
8228  * @return
8229  *   how many contexts get in success, otherwise negative errno value.
8230  *   if nb_contexts is 0, return the amount of all aged contexts.
8231  *   if nb_contexts is not 0 , return the amount of aged flows reported
8232  *   in the context array.
8233  */
8234 int
8235 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8236                         uint32_t nb_contexts, struct rte_flow_error *error)
8237 {
8238         const struct mlx5_flow_driver_ops *fops;
8239         struct rte_flow_attr attr = { .transfer = 0 };
8240
8241         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8242                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8243                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8244                                                     error);
8245         }
8246         DRV_LOG(ERR,
8247                 "port %u get aged flows is not supported.",
8248                  dev->data->port_id);
8249         return -ENOTSUP;
8250 }
8251
8252 /* Wrapper for driver action_validate op callback */
8253 static int
8254 flow_drv_action_validate(struct rte_eth_dev *dev,
8255                          const struct rte_flow_indir_action_conf *conf,
8256                          const struct rte_flow_action *action,
8257                          const struct mlx5_flow_driver_ops *fops,
8258                          struct rte_flow_error *error)
8259 {
8260         static const char err_msg[] = "indirect action validation unsupported";
8261
8262         if (!fops->action_validate) {
8263                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8264                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8265                                    NULL, err_msg);
8266                 return -rte_errno;
8267         }
8268         return fops->action_validate(dev, conf, action, error);
8269 }
8270
8271 /**
8272  * Destroys the shared action by handle.
8273  *
8274  * @param dev
8275  *   Pointer to Ethernet device structure.
8276  * @param[in] handle
8277  *   Handle for the indirect action object to be destroyed.
8278  * @param[out] error
8279  *   Perform verbose error reporting if not NULL. PMDs initialize this
8280  *   structure in case of error only.
8281  *
8282  * @return
8283  *   0 on success, a negative errno value otherwise and rte_errno is set.
8284  *
8285  * @note: wrapper for driver action_create op callback.
8286  */
8287 static int
8288 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8289                            struct rte_flow_action_handle *handle,
8290                            struct rte_flow_error *error)
8291 {
8292         static const char err_msg[] = "indirect action destruction unsupported";
8293         struct rte_flow_attr attr = { .transfer = 0 };
8294         const struct mlx5_flow_driver_ops *fops =
8295                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8296
8297         if (!fops->action_destroy) {
8298                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8299                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8300                                    NULL, err_msg);
8301                 return -rte_errno;
8302         }
8303         return fops->action_destroy(dev, handle, error);
8304 }
8305
8306 /* Wrapper for driver action_destroy op callback */
8307 static int
8308 flow_drv_action_update(struct rte_eth_dev *dev,
8309                        struct rte_flow_action_handle *handle,
8310                        const void *update,
8311                        const struct mlx5_flow_driver_ops *fops,
8312                        struct rte_flow_error *error)
8313 {
8314         static const char err_msg[] = "indirect action update unsupported";
8315
8316         if (!fops->action_update) {
8317                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8318                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8319                                    NULL, err_msg);
8320                 return -rte_errno;
8321         }
8322         return fops->action_update(dev, handle, update, error);
8323 }
8324
8325 /* Wrapper for driver action_destroy op callback */
8326 static int
8327 flow_drv_action_query(struct rte_eth_dev *dev,
8328                       const struct rte_flow_action_handle *handle,
8329                       void *data,
8330                       const struct mlx5_flow_driver_ops *fops,
8331                       struct rte_flow_error *error)
8332 {
8333         static const char err_msg[] = "indirect action query unsupported";
8334
8335         if (!fops->action_query) {
8336                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8337                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8338                                    NULL, err_msg);
8339                 return -rte_errno;
8340         }
8341         return fops->action_query(dev, handle, data, error);
8342 }
8343
8344 /**
8345  * Create indirect action for reuse in multiple flow rules.
8346  *
8347  * @param dev
8348  *   Pointer to Ethernet device structure.
8349  * @param conf
8350  *   Pointer to indirect action object configuration.
8351  * @param[in] action
8352  *   Action configuration for indirect action object creation.
8353  * @param[out] error
8354  *   Perform verbose error reporting if not NULL. PMDs initialize this
8355  *   structure in case of error only.
8356  * @return
8357  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8358  */
8359 static struct rte_flow_action_handle *
8360 mlx5_action_handle_create(struct rte_eth_dev *dev,
8361                           const struct rte_flow_indir_action_conf *conf,
8362                           const struct rte_flow_action *action,
8363                           struct rte_flow_error *error)
8364 {
8365         static const char err_msg[] = "indirect action creation unsupported";
8366         struct rte_flow_attr attr = { .transfer = 0 };
8367         const struct mlx5_flow_driver_ops *fops =
8368                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8369
8370         if (flow_drv_action_validate(dev, conf, action, fops, error))
8371                 return NULL;
8372         if (!fops->action_create) {
8373                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8374                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8375                                    NULL, err_msg);
8376                 return NULL;
8377         }
8378         return fops->action_create(dev, conf, action, error);
8379 }
8380
8381 /**
8382  * Updates inplace the indirect action configuration pointed by *handle*
8383  * with the configuration provided as *update* argument.
8384  * The update of the indirect action configuration effects all flow rules
8385  * reusing the action via handle.
8386  *
8387  * @param dev
8388  *   Pointer to Ethernet device structure.
8389  * @param[in] handle
8390  *   Handle for the indirect action to be updated.
8391  * @param[in] update
8392  *   Action specification used to modify the action pointed by handle.
8393  *   *update* could be of same type with the action pointed by the *handle*
8394  *   handle argument, or some other structures like a wrapper, depending on
8395  *   the indirect action type.
8396  * @param[out] error
8397  *   Perform verbose error reporting if not NULL. PMDs initialize this
8398  *   structure in case of error only.
8399  *
8400  * @return
8401  *   0 on success, a negative errno value otherwise and rte_errno is set.
8402  */
8403 static int
8404 mlx5_action_handle_update(struct rte_eth_dev *dev,
8405                 struct rte_flow_action_handle *handle,
8406                 const void *update,
8407                 struct rte_flow_error *error)
8408 {
8409         struct rte_flow_attr attr = { .transfer = 0 };
8410         const struct mlx5_flow_driver_ops *fops =
8411                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8412         int ret;
8413
8414         ret = flow_drv_action_validate(dev, NULL,
8415                         (const struct rte_flow_action *)update, fops, error);
8416         if (ret)
8417                 return ret;
8418         return flow_drv_action_update(dev, handle, update, fops,
8419                                       error);
8420 }
8421
8422 /**
8423  * Query the indirect action by handle.
8424  *
8425  * This function allows retrieving action-specific data such as counters.
8426  * Data is gathered by special action which may be present/referenced in
8427  * more than one flow rule definition.
8428  *
8429  * see @RTE_FLOW_ACTION_TYPE_COUNT
8430  *
8431  * @param dev
8432  *   Pointer to Ethernet device structure.
8433  * @param[in] handle
8434  *   Handle for the indirect action to query.
8435  * @param[in, out] data
8436  *   Pointer to storage for the associated query data type.
8437  * @param[out] error
8438  *   Perform verbose error reporting if not NULL. PMDs initialize this
8439  *   structure in case of error only.
8440  *
8441  * @return
8442  *   0 on success, a negative errno value otherwise and rte_errno is set.
8443  */
8444 static int
8445 mlx5_action_handle_query(struct rte_eth_dev *dev,
8446                          const struct rte_flow_action_handle *handle,
8447                          void *data,
8448                          struct rte_flow_error *error)
8449 {
8450         struct rte_flow_attr attr = { .transfer = 0 };
8451         const struct mlx5_flow_driver_ops *fops =
8452                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8453
8454         return flow_drv_action_query(dev, handle, data, fops, error);
8455 }
8456
8457 /**
8458  * Destroy all indirect actions (shared RSS).
8459  *
8460  * @param dev
8461  *   Pointer to Ethernet device.
8462  *
8463  * @return
8464  *   0 on success, a negative errno value otherwise and rte_errno is set.
8465  */
8466 int
8467 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8468 {
8469         struct rte_flow_error error;
8470         struct mlx5_priv *priv = dev->data->dev_private;
8471         struct mlx5_shared_action_rss *shared_rss;
8472         int ret = 0;
8473         uint32_t idx;
8474
8475         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8476                       priv->rss_shared_actions, idx, shared_rss, next) {
8477                 ret |= mlx5_action_handle_destroy(dev,
8478                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8479         }
8480         return ret;
8481 }
8482
8483 #ifndef HAVE_MLX5DV_DR
8484 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8485 #else
8486 #define MLX5_DOMAIN_SYNC_FLOW \
8487         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8488 #endif
8489
8490 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8491 {
8492         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8493         const struct mlx5_flow_driver_ops *fops;
8494         int ret;
8495         struct rte_flow_attr attr = { .transfer = 0 };
8496
8497         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8498         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8499         if (ret > 0)
8500                 ret = -ret;
8501         return ret;
8502 }
8503
8504 const struct mlx5_flow_tunnel *
8505 mlx5_get_tof(const struct rte_flow_item *item,
8506              const struct rte_flow_action *action,
8507              enum mlx5_tof_rule_type *rule_type)
8508 {
8509         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8510                 if (item->type == (typeof(item->type))
8511                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8512                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8513                         return flow_items_to_tunnel(item);
8514                 }
8515         }
8516         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8517                 if (action->type == (typeof(action->type))
8518                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8519                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8520                         return flow_actions_to_tunnel(action);
8521                 }
8522         }
8523         return NULL;
8524 }
8525
8526 /**
8527  * tunnel offload functionalilty is defined for DV environment only
8528  */
8529 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8530 __extension__
8531 union tunnel_offload_mark {
8532         uint32_t val;
8533         struct {
8534                 uint32_t app_reserve:8;
8535                 uint32_t table_id:15;
8536                 uint32_t transfer:1;
8537                 uint32_t _unused_:8;
8538         };
8539 };
8540
8541 static bool
8542 mlx5_access_tunnel_offload_db
8543         (struct rte_eth_dev *dev,
8544          bool (*match)(struct rte_eth_dev *,
8545                        struct mlx5_flow_tunnel *, const void *),
8546          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8547          void (*miss)(struct rte_eth_dev *, void *),
8548          void *ctx, bool lock_op);
8549
8550 static int
8551 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8552                              struct rte_flow *flow,
8553                              const struct rte_flow_attr *attr,
8554                              const struct rte_flow_action *app_actions,
8555                              uint32_t flow_idx,
8556                              const struct mlx5_flow_tunnel *tunnel,
8557                              struct tunnel_default_miss_ctx *ctx,
8558                              struct rte_flow_error *error)
8559 {
8560         struct mlx5_priv *priv = dev->data->dev_private;
8561         struct mlx5_flow *dev_flow;
8562         struct rte_flow_attr miss_attr = *attr;
8563         const struct rte_flow_item miss_items[2] = {
8564                 {
8565                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8566                         .spec = NULL,
8567                         .last = NULL,
8568                         .mask = NULL
8569                 },
8570                 {
8571                         .type = RTE_FLOW_ITEM_TYPE_END,
8572                         .spec = NULL,
8573                         .last = NULL,
8574                         .mask = NULL
8575                 }
8576         };
8577         union tunnel_offload_mark mark_id;
8578         struct rte_flow_action_mark miss_mark;
8579         struct rte_flow_action miss_actions[3] = {
8580                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8581                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8582         };
8583         const struct rte_flow_action_jump *jump_data;
8584         uint32_t i, flow_table = 0; /* prevent compilation warning */
8585         struct flow_grp_info grp_info = {
8586                 .external = 1,
8587                 .transfer = attr->transfer,
8588                 .fdb_def_rule = !!priv->fdb_def_rule,
8589                 .std_tbl_fix = 0,
8590         };
8591         int ret;
8592
8593         if (!attr->transfer) {
8594                 uint32_t q_size;
8595
8596                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8597                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8598                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8599                                          0, SOCKET_ID_ANY);
8600                 if (!ctx->queue)
8601                         return rte_flow_error_set
8602                                 (error, ENOMEM,
8603                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8604                                 NULL, "invalid default miss RSS");
8605                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8606                 ctx->action_rss.level = 0,
8607                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8608                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8609                 ctx->action_rss.queue_num = priv->reta_idx_n,
8610                 ctx->action_rss.key = priv->rss_conf.rss_key,
8611                 ctx->action_rss.queue = ctx->queue;
8612                 if (!priv->reta_idx_n || !priv->rxqs_n)
8613                         return rte_flow_error_set
8614                                 (error, EINVAL,
8615                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8616                                 NULL, "invalid port configuration");
8617                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8618                         ctx->action_rss.types = 0;
8619                 for (i = 0; i != priv->reta_idx_n; ++i)
8620                         ctx->queue[i] = (*priv->reta_idx)[i];
8621         } else {
8622                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8623                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8624         }
8625         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8626         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8627         jump_data = app_actions->conf;
8628         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8629         miss_attr.group = jump_data->group;
8630         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8631                                        &flow_table, &grp_info, error);
8632         if (ret)
8633                 return rte_flow_error_set(error, EINVAL,
8634                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8635                                           NULL, "invalid tunnel id");
8636         mark_id.app_reserve = 0;
8637         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8638         mark_id.transfer = !!attr->transfer;
8639         mark_id._unused_ = 0;
8640         miss_mark.id = mark_id.val;
8641         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8642                                     miss_items, miss_actions, flow_idx, error);
8643         if (!dev_flow)
8644                 return -rte_errno;
8645         dev_flow->flow = flow;
8646         dev_flow->external = true;
8647         dev_flow->tunnel = tunnel;
8648         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8649         /* Subflow object was created, we must include one in the list. */
8650         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8651                       dev_flow->handle, next);
8652         DRV_LOG(DEBUG,
8653                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8654                 dev->data->port_id, tunnel->app_tunnel.type,
8655                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8656         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8657                                   miss_actions, error);
8658         if (!ret)
8659                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8660                                                   error);
8661
8662         return ret;
8663 }
8664
8665 static const struct mlx5_flow_tbl_data_entry  *
8666 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8667 {
8668         struct mlx5_priv *priv = dev->data->dev_private;
8669         struct mlx5_dev_ctx_shared *sh = priv->sh;
8670         struct mlx5_list_entry *he;
8671         union tunnel_offload_mark mbits = { .val = mark };
8672         union mlx5_flow_tbl_key table_key = {
8673                 {
8674                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8675                         .id = 0,
8676                         .reserved = 0,
8677                         .dummy = 0,
8678                         .is_fdb = !!mbits.transfer,
8679                         .is_egress = 0,
8680                 }
8681         };
8682         struct mlx5_flow_cb_ctx ctx = {
8683                 .data = &table_key.v64,
8684         };
8685
8686         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
8687         return he ?
8688                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8689 }
8690
8691 static void
8692 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
8693                                    struct mlx5_list_entry *entry)
8694 {
8695         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8696         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8697
8698         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8699                         tunnel_flow_tbl_to_id(tte->flow_table));
8700         mlx5_free(tte);
8701 }
8702
8703 static int
8704 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
8705                                   struct mlx5_list_entry *entry, void *cb_ctx)
8706 {
8707         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8708         union tunnel_tbl_key tbl = {
8709                 .val = *(uint64_t *)(ctx->data),
8710         };
8711         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8712
8713         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8714 }
8715
8716 static struct mlx5_list_entry *
8717 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
8718 {
8719         struct mlx5_dev_ctx_shared *sh = tool_ctx;
8720         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
8721         struct tunnel_tbl_entry *tte;
8722         union tunnel_tbl_key tbl = {
8723                 .val = *(uint64_t *)(ctx->data),
8724         };
8725
8726         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8727                           sizeof(*tte), 0,
8728                           SOCKET_ID_ANY);
8729         if (!tte)
8730                 goto err;
8731         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8732                           &tte->flow_table);
8733         if (tte->flow_table >= MLX5_MAX_TABLES) {
8734                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8735                         tte->flow_table);
8736                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8737                                 tte->flow_table);
8738                 goto err;
8739         } else if (!tte->flow_table) {
8740                 goto err;
8741         }
8742         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8743         tte->tunnel_id = tbl.tunnel_id;
8744         tte->group = tbl.group;
8745         return &tte->hash;
8746 err:
8747         if (tte)
8748                 mlx5_free(tte);
8749         return NULL;
8750 }
8751
8752 static struct mlx5_list_entry *
8753 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
8754                                   struct mlx5_list_entry *oentry,
8755                                   void *cb_ctx __rte_unused)
8756 {
8757         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
8758                                                    0, SOCKET_ID_ANY);
8759
8760         if (!tte)
8761                 return NULL;
8762         memcpy(tte, oentry, sizeof(*tte));
8763         return &tte->hash;
8764 }
8765
8766 static void
8767 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
8768                                        struct mlx5_list_entry *entry)
8769 {
8770         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8771
8772         mlx5_free(tte);
8773 }
8774
8775 static uint32_t
8776 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8777                                 const struct mlx5_flow_tunnel *tunnel,
8778                                 uint32_t group, uint32_t *table,
8779                                 struct rte_flow_error *error)
8780 {
8781         struct mlx5_list_entry *he;
8782         struct tunnel_tbl_entry *tte;
8783         union tunnel_tbl_key key = {
8784                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8785                 .group = group
8786         };
8787         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8788         struct mlx5_hlist *group_hash;
8789         struct mlx5_flow_cb_ctx ctx = {
8790                 .data = &key.val,
8791         };
8792
8793         group_hash = tunnel ? tunnel->groups : thub->groups;
8794         he = mlx5_hlist_register(group_hash, key.val, &ctx);
8795         if (!he)
8796                 return rte_flow_error_set(error, EINVAL,
8797                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8798                                           NULL,
8799                                           "tunnel group index not supported");
8800         tte = container_of(he, typeof(*tte), hash);
8801         *table = tte->flow_table;
8802         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8803                 dev->data->port_id, key.tunnel_id, group, *table);
8804         return 0;
8805 }
8806
8807 static void
8808 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8809                       struct mlx5_flow_tunnel *tunnel)
8810 {
8811         struct mlx5_priv *priv = dev->data->dev_private;
8812         struct mlx5_indexed_pool *ipool;
8813
8814         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8815                 dev->data->port_id, tunnel->tunnel_id);
8816         LIST_REMOVE(tunnel, chain);
8817         mlx5_hlist_destroy(tunnel->groups);
8818         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8819         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8820 }
8821
8822 static bool
8823 mlx5_access_tunnel_offload_db
8824         (struct rte_eth_dev *dev,
8825          bool (*match)(struct rte_eth_dev *,
8826                        struct mlx5_flow_tunnel *, const void *),
8827          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8828          void (*miss)(struct rte_eth_dev *, void *),
8829          void *ctx, bool lock_op)
8830 {
8831         bool verdict = false;
8832         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8833         struct mlx5_flow_tunnel *tunnel;
8834
8835         rte_spinlock_lock(&thub->sl);
8836         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8837                 verdict = match(dev, tunnel, (const void *)ctx);
8838                 if (verdict)
8839                         break;
8840         }
8841         if (!lock_op)
8842                 rte_spinlock_unlock(&thub->sl);
8843         if (verdict && hit)
8844                 hit(dev, tunnel, ctx);
8845         if (!verdict && miss)
8846                 miss(dev, ctx);
8847         if (lock_op)
8848                 rte_spinlock_unlock(&thub->sl);
8849
8850         return verdict;
8851 }
8852
8853 struct tunnel_db_find_tunnel_id_ctx {
8854         uint32_t tunnel_id;
8855         struct mlx5_flow_tunnel *tunnel;
8856 };
8857
8858 static bool
8859 find_tunnel_id_match(struct rte_eth_dev *dev,
8860                      struct mlx5_flow_tunnel *tunnel, const void *x)
8861 {
8862         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8863
8864         RTE_SET_USED(dev);
8865         return tunnel->tunnel_id == ctx->tunnel_id;
8866 }
8867
8868 static void
8869 find_tunnel_id_hit(struct rte_eth_dev *dev,
8870                    struct mlx5_flow_tunnel *tunnel, void *x)
8871 {
8872         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8873         RTE_SET_USED(dev);
8874         ctx->tunnel = tunnel;
8875 }
8876
8877 static struct mlx5_flow_tunnel *
8878 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8879 {
8880         struct tunnel_db_find_tunnel_id_ctx ctx = {
8881                 .tunnel_id = id,
8882         };
8883
8884         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8885                                       find_tunnel_id_hit, NULL, &ctx, true);
8886
8887         return ctx.tunnel;
8888 }
8889
8890 static struct mlx5_flow_tunnel *
8891 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8892                           const struct rte_flow_tunnel *app_tunnel)
8893 {
8894         struct mlx5_priv *priv = dev->data->dev_private;
8895         struct mlx5_indexed_pool *ipool;
8896         struct mlx5_flow_tunnel *tunnel;
8897         uint32_t id;
8898
8899         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8900         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8901         if (!tunnel)
8902                 return NULL;
8903         if (id >= MLX5_MAX_TUNNELS) {
8904                 mlx5_ipool_free(ipool, id);
8905                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8906                 return NULL;
8907         }
8908         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
8909                                            priv->sh,
8910                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8911                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8912                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
8913                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
8914                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
8915         if (!tunnel->groups) {
8916                 mlx5_ipool_free(ipool, id);
8917                 return NULL;
8918         }
8919         /* initiate new PMD tunnel */
8920         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8921         tunnel->tunnel_id = id;
8922         tunnel->action.type = (typeof(tunnel->action.type))
8923                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8924         tunnel->action.conf = tunnel;
8925         tunnel->item.type = (typeof(tunnel->item.type))
8926                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8927         tunnel->item.spec = tunnel;
8928         tunnel->item.last = NULL;
8929         tunnel->item.mask = NULL;
8930
8931         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8932                 dev->data->port_id, tunnel->tunnel_id);
8933
8934         return tunnel;
8935 }
8936
8937 struct tunnel_db_get_tunnel_ctx {
8938         const struct rte_flow_tunnel *app_tunnel;
8939         struct mlx5_flow_tunnel *tunnel;
8940 };
8941
8942 static bool get_tunnel_match(struct rte_eth_dev *dev,
8943                              struct mlx5_flow_tunnel *tunnel, const void *x)
8944 {
8945         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8946
8947         RTE_SET_USED(dev);
8948         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8949                        sizeof(*ctx->app_tunnel));
8950 }
8951
8952 static void get_tunnel_hit(struct rte_eth_dev *dev,
8953                            struct mlx5_flow_tunnel *tunnel, void *x)
8954 {
8955         /* called under tunnel spinlock protection */
8956         struct tunnel_db_get_tunnel_ctx *ctx = x;
8957
8958         RTE_SET_USED(dev);
8959         tunnel->refctn++;
8960         ctx->tunnel = tunnel;
8961 }
8962
8963 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8964 {
8965         /* called under tunnel spinlock protection */
8966         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8967         struct tunnel_db_get_tunnel_ctx *ctx = x;
8968
8969         rte_spinlock_unlock(&thub->sl);
8970         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8971         rte_spinlock_lock(&thub->sl);
8972         if (ctx->tunnel) {
8973                 ctx->tunnel->refctn = 1;
8974                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8975         }
8976 }
8977
8978
8979 static int
8980 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8981                      const struct rte_flow_tunnel *app_tunnel,
8982                      struct mlx5_flow_tunnel **tunnel)
8983 {
8984         struct tunnel_db_get_tunnel_ctx ctx = {
8985                 .app_tunnel = app_tunnel,
8986         };
8987
8988         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
8989                                       get_tunnel_miss, &ctx, true);
8990         *tunnel = ctx.tunnel;
8991         return ctx.tunnel ? 0 : -ENOMEM;
8992 }
8993
8994 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8995 {
8996         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8997
8998         if (!thub)
8999                 return;
9000         if (!LIST_EMPTY(&thub->tunnels))
9001                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9002         mlx5_hlist_destroy(thub->groups);
9003         mlx5_free(thub);
9004 }
9005
9006 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9007 {
9008         int err;
9009         struct mlx5_flow_tunnel_hub *thub;
9010
9011         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9012                            0, SOCKET_ID_ANY);
9013         if (!thub)
9014                 return -ENOMEM;
9015         LIST_INIT(&thub->tunnels);
9016         rte_spinlock_init(&thub->sl);
9017         thub->groups = mlx5_hlist_create("flow groups", 64,
9018                                          false, true, sh,
9019                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9020                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9021                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9022                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9023                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9024         if (!thub->groups) {
9025                 err = -rte_errno;
9026                 goto err;
9027         }
9028         sh->tunnel_hub = thub;
9029
9030         return 0;
9031
9032 err:
9033         if (thub->groups)
9034                 mlx5_hlist_destroy(thub->groups);
9035         if (thub)
9036                 mlx5_free(thub);
9037         return err;
9038 }
9039
9040 static inline bool
9041 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9042                           struct rte_flow_tunnel *tunnel,
9043                           const char *err_msg)
9044 {
9045         err_msg = NULL;
9046         if (!is_tunnel_offload_active(dev)) {
9047                 err_msg = "tunnel offload was not activated";
9048                 goto out;
9049         } else if (!tunnel) {
9050                 err_msg = "no application tunnel";
9051                 goto out;
9052         }
9053
9054         switch (tunnel->type) {
9055         default:
9056                 err_msg = "unsupported tunnel type";
9057                 goto out;
9058         case RTE_FLOW_ITEM_TYPE_VXLAN:
9059                 break;
9060         }
9061
9062 out:
9063         return !err_msg;
9064 }
9065
9066 static int
9067 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9068                     struct rte_flow_tunnel *app_tunnel,
9069                     struct rte_flow_action **actions,
9070                     uint32_t *num_of_actions,
9071                     struct rte_flow_error *error)
9072 {
9073         int ret;
9074         struct mlx5_flow_tunnel *tunnel;
9075         const char *err_msg = NULL;
9076         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9077
9078         if (!verdict)
9079                 return rte_flow_error_set(error, EINVAL,
9080                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9081                                           err_msg);
9082         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9083         if (ret < 0) {
9084                 return rte_flow_error_set(error, ret,
9085                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9086                                           "failed to initialize pmd tunnel");
9087         }
9088         *actions = &tunnel->action;
9089         *num_of_actions = 1;
9090         return 0;
9091 }
9092
9093 static int
9094 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9095                        struct rte_flow_tunnel *app_tunnel,
9096                        struct rte_flow_item **items,
9097                        uint32_t *num_of_items,
9098                        struct rte_flow_error *error)
9099 {
9100         int ret;
9101         struct mlx5_flow_tunnel *tunnel;
9102         const char *err_msg = NULL;
9103         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9104
9105         if (!verdict)
9106                 return rte_flow_error_set(error, EINVAL,
9107                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9108                                           err_msg);
9109         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9110         if (ret < 0) {
9111                 return rte_flow_error_set(error, ret,
9112                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9113                                           "failed to initialize pmd tunnel");
9114         }
9115         *items = &tunnel->item;
9116         *num_of_items = 1;
9117         return 0;
9118 }
9119
9120 struct tunnel_db_element_release_ctx {
9121         struct rte_flow_item *items;
9122         struct rte_flow_action *actions;
9123         uint32_t num_elements;
9124         struct rte_flow_error *error;
9125         int ret;
9126 };
9127
9128 static bool
9129 tunnel_element_release_match(struct rte_eth_dev *dev,
9130                              struct mlx5_flow_tunnel *tunnel, const void *x)
9131 {
9132         const struct tunnel_db_element_release_ctx *ctx = x;
9133
9134         RTE_SET_USED(dev);
9135         if (ctx->num_elements != 1)
9136                 return false;
9137         else if (ctx->items)
9138                 return ctx->items == &tunnel->item;
9139         else if (ctx->actions)
9140                 return ctx->actions == &tunnel->action;
9141
9142         return false;
9143 }
9144
9145 static void
9146 tunnel_element_release_hit(struct rte_eth_dev *dev,
9147                            struct mlx5_flow_tunnel *tunnel, void *x)
9148 {
9149         struct tunnel_db_element_release_ctx *ctx = x;
9150         ctx->ret = 0;
9151         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9152                 mlx5_flow_tunnel_free(dev, tunnel);
9153 }
9154
9155 static void
9156 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9157 {
9158         struct tunnel_db_element_release_ctx *ctx = x;
9159         RTE_SET_USED(dev);
9160         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9161                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9162                                       "invalid argument");
9163 }
9164
9165 static int
9166 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9167                        struct rte_flow_item *pmd_items,
9168                        uint32_t num_items, struct rte_flow_error *err)
9169 {
9170         struct tunnel_db_element_release_ctx ctx = {
9171                 .items = pmd_items,
9172                 .actions = NULL,
9173                 .num_elements = num_items,
9174                 .error = err,
9175         };
9176
9177         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9178                                       tunnel_element_release_hit,
9179                                       tunnel_element_release_miss, &ctx, false);
9180
9181         return ctx.ret;
9182 }
9183
9184 static int
9185 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9186                          struct rte_flow_action *pmd_actions,
9187                          uint32_t num_actions, struct rte_flow_error *err)
9188 {
9189         struct tunnel_db_element_release_ctx ctx = {
9190                 .items = NULL,
9191                 .actions = pmd_actions,
9192                 .num_elements = num_actions,
9193                 .error = err,
9194         };
9195
9196         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9197                                       tunnel_element_release_hit,
9198                                       tunnel_element_release_miss, &ctx, false);
9199
9200         return ctx.ret;
9201 }
9202
9203 static int
9204 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9205                                   struct rte_mbuf *m,
9206                                   struct rte_flow_restore_info *info,
9207                                   struct rte_flow_error *err)
9208 {
9209         uint64_t ol_flags = m->ol_flags;
9210         const struct mlx5_flow_tbl_data_entry *tble;
9211         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9212
9213         if (!is_tunnel_offload_active(dev)) {
9214                 info->flags = 0;
9215                 return 0;
9216         }
9217
9218         if ((ol_flags & mask) != mask)
9219                 goto err;
9220         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9221         if (!tble) {
9222                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9223                         dev->data->port_id, m->hash.fdir.hi);
9224                 goto err;
9225         }
9226         MLX5_ASSERT(tble->tunnel);
9227         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9228         info->group_id = tble->group_id;
9229         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9230                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9231                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9232
9233         return 0;
9234
9235 err:
9236         return rte_flow_error_set(err, EINVAL,
9237                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9238                                   "failed to get restore info");
9239 }
9240
9241 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9242 static int
9243 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9244                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9245                            __rte_unused struct rte_flow_action **actions,
9246                            __rte_unused uint32_t *num_of_actions,
9247                            __rte_unused struct rte_flow_error *error)
9248 {
9249         return -ENOTSUP;
9250 }
9251
9252 static int
9253 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9254                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9255                        __rte_unused struct rte_flow_item **items,
9256                        __rte_unused uint32_t *num_of_items,
9257                        __rte_unused struct rte_flow_error *error)
9258 {
9259         return -ENOTSUP;
9260 }
9261
9262 static int
9263 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9264                               __rte_unused struct rte_flow_item *pmd_items,
9265                               __rte_unused uint32_t num_items,
9266                               __rte_unused struct rte_flow_error *err)
9267 {
9268         return -ENOTSUP;
9269 }
9270
9271 static int
9272 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9273                                 __rte_unused struct rte_flow_action *pmd_action,
9274                                 __rte_unused uint32_t num_actions,
9275                                 __rte_unused struct rte_flow_error *err)
9276 {
9277         return -ENOTSUP;
9278 }
9279
9280 static int
9281 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9282                                   __rte_unused struct rte_mbuf *m,
9283                                   __rte_unused struct rte_flow_restore_info *i,
9284                                   __rte_unused struct rte_flow_error *err)
9285 {
9286         return -ENOTSUP;
9287 }
9288
9289 static int
9290 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9291                              __rte_unused struct rte_flow *flow,
9292                              __rte_unused const struct rte_flow_attr *attr,
9293                              __rte_unused const struct rte_flow_action *actions,
9294                              __rte_unused uint32_t flow_idx,
9295                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9296                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9297                              __rte_unused struct rte_flow_error *error)
9298 {
9299         return -ENOTSUP;
9300 }
9301
9302 static struct mlx5_flow_tunnel *
9303 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9304                     __rte_unused uint32_t id)
9305 {
9306         return NULL;
9307 }
9308
9309 static void
9310 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9311                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9312 {
9313 }
9314
9315 static uint32_t
9316 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9317                                 __rte_unused const struct mlx5_flow_tunnel *t,
9318                                 __rte_unused uint32_t group,
9319                                 __rte_unused uint32_t *table,
9320                                 struct rte_flow_error *error)
9321 {
9322         return rte_flow_error_set(error, ENOTSUP,
9323                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9324                                   "tunnel offload requires DV support");
9325 }
9326
9327 void
9328 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9329                         __rte_unused  uint16_t port_id)
9330 {
9331 }
9332 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9333
9334 static void
9335 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9336 {
9337         int ret;
9338         struct rte_flow_error error;
9339
9340         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9341                 char *item_name;
9342                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9343                                     sizeof(item_name),
9344                                     (void *)(uintptr_t)item->type, &error);
9345                 if (ret > 0)
9346                         printf("%s ", item_name);
9347                 else
9348                         printf("%d\n", (int)item->type);
9349         }
9350         printf("END\n");
9351 }