drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include <mlx5_glue.h>
  31 #include <mlx5_devx_cmds.h>
  32 #include <mlx5_prm.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_rxtx.h"
  38
  39 /* Dev ops structure defined in mlx5.c */
  40 extern const struct eth_dev_ops mlx5_dev_ops;
  41 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  42
  43 /** Device flow drivers. */
  44 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  46 #endif
  47 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  52         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  53 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  54         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  55 #endif
  56         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  57         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  58 };
  59
  60 enum mlx5_expansion {
  61         MLX5_EXPANSION_ROOT,
  62         MLX5_EXPANSION_ROOT_OUTER,
  63         MLX5_EXPANSION_ROOT_ETH_VLAN,
  64         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_ETH,
  66         MLX5_EXPANSION_OUTER_ETH_VLAN,
  67         MLX5_EXPANSION_OUTER_VLAN,
  68         MLX5_EXPANSION_OUTER_IPV4,
  69         MLX5_EXPANSION_OUTER_IPV4_UDP,
  70         MLX5_EXPANSION_OUTER_IPV4_TCP,
  71         MLX5_EXPANSION_OUTER_IPV6,
  72         MLX5_EXPANSION_OUTER_IPV6_UDP,
  73         MLX5_EXPANSION_OUTER_IPV6_TCP,
  74         MLX5_EXPANSION_VXLAN,
  75         MLX5_EXPANSION_VXLAN_GPE,
  76         MLX5_EXPANSION_GRE,
  77         MLX5_EXPANSION_MPLS,
  78         MLX5_EXPANSION_ETH,
  79         MLX5_EXPANSION_ETH_VLAN,
  80         MLX5_EXPANSION_VLAN,
  81         MLX5_EXPANSION_IPV4,
  82         MLX5_EXPANSION_IPV4_UDP,
  83         MLX5_EXPANSION_IPV4_TCP,
  84         MLX5_EXPANSION_IPV6,
  85         MLX5_EXPANSION_IPV6_UDP,
  86         MLX5_EXPANSION_IPV6_TCP,
  87 };
  88
  89 /** Supported expansion of items. */
  90 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  91         [MLX5_EXPANSION_ROOT] = {
  92                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  93                                                  MLX5_EXPANSION_IPV4,
  94                                                  MLX5_EXPANSION_IPV6),
  95                 .type = RTE_FLOW_ITEM_TYPE_END,
  96         },
  97         [MLX5_EXPANSION_ROOT_OUTER] = {
  98                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  99                                                  MLX5_EXPANSION_OUTER_IPV4,
 100                                                  MLX5_EXPANSION_OUTER_IPV6),
 101                 .type = RTE_FLOW_ITEM_TYPE_END,
 102         },
 103         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 104                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 105                 .type = RTE_FLOW_ITEM_TYPE_END,
 106         },
 107         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 108                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 109                 .type = RTE_FLOW_ITEM_TYPE_END,
 110         },
 111         [MLX5_EXPANSION_OUTER_ETH] = {
 112                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 113                                                  MLX5_EXPANSION_OUTER_IPV6,
 114                                                  MLX5_EXPANSION_MPLS),
 115                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 116                 .rss_types = 0,
 117         },
 118         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 119                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 120                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 121                 .rss_types = 0,
 122         },
 123         [MLX5_EXPANSION_OUTER_VLAN] = {
 124                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 125                                                  MLX5_EXPANSION_OUTER_IPV6),
 126                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 127         },
 128         [MLX5_EXPANSION_OUTER_IPV4] = {
 129                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 130                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 131                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 132                          MLX5_EXPANSION_GRE,
 133                          MLX5_EXPANSION_IPV4,
 134                          MLX5_EXPANSION_IPV6),
 135                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 136                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 137                         ETH_RSS_NONFRAG_IPV4_OTHER,
 138         },
 139         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 140                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 141                                                  MLX5_EXPANSION_VXLAN_GPE),
 142                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 143                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 144         },
 145         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 146                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 147                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 148         },
 149         [MLX5_EXPANSION_OUTER_IPV6] = {
 150                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 151                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 152                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 153                          MLX5_EXPANSION_IPV4,
 154                          MLX5_EXPANSION_IPV6),
 155                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 156                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 157                         ETH_RSS_NONFRAG_IPV6_OTHER,
 158         },
 159         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 160                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 161                                                  MLX5_EXPANSION_VXLAN_GPE),
 162                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 163                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 164         },
 165         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 166                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 167                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 168         },
 169         [MLX5_EXPANSION_VXLAN] = {
 170                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 171                                                  MLX5_EXPANSION_IPV4,
 172                                                  MLX5_EXPANSION_IPV6),
 173                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 174         },
 175         [MLX5_EXPANSION_VXLAN_GPE] = {
 176                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 177                                                  MLX5_EXPANSION_IPV4,
 178                                                  MLX5_EXPANSION_IPV6),
 179                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 180         },
 181         [MLX5_EXPANSION_GRE] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 183                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 184         },
 185         [MLX5_EXPANSION_MPLS] = {
 186                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 187                                                  MLX5_EXPANSION_IPV6),
 188                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 189         },
 190         [MLX5_EXPANSION_ETH] = {
 191                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 192                                                  MLX5_EXPANSION_IPV6),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_ETH_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 197                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 198         },
 199         [MLX5_EXPANSION_VLAN] = {
 200                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 201                                                  MLX5_EXPANSION_IPV6),
 202                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 203         },
 204         [MLX5_EXPANSION_IPV4] = {
 205                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 206                                                  MLX5_EXPANSION_IPV4_TCP),
 207                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 208                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 209                         ETH_RSS_NONFRAG_IPV4_OTHER,
 210         },
 211         [MLX5_EXPANSION_IPV4_UDP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 214         },
 215         [MLX5_EXPANSION_IPV4_TCP] = {
 216                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 217                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 218         },
 219         [MLX5_EXPANSION_IPV6] = {
 220                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 221                                                  MLX5_EXPANSION_IPV6_TCP),
 222                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 223                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 224                         ETH_RSS_NONFRAG_IPV6_OTHER,
 225         },
 226         [MLX5_EXPANSION_IPV6_UDP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 229         },
 230         [MLX5_EXPANSION_IPV6_TCP] = {
 231                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 232                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 233         },
 234 };
 235
 236 static const struct rte_flow_ops mlx5_flow_ops = {
 237         .validate = mlx5_flow_validate,
 238         .create = mlx5_flow_create,
 239         .destroy = mlx5_flow_destroy,
 240         .flush = mlx5_flow_flush,
 241         .isolate = mlx5_flow_isolate,
 242         .query = mlx5_flow_query,
 243         .dev_dump = mlx5_flow_dev_dump,
 244 };
 245
 246 /* Convert FDIR request to Generic flow. */
 247 struct mlx5_fdir {
 248         struct rte_flow_attr attr;
 249         struct rte_flow_item items[4];
 250         struct rte_flow_item_eth l2;
 251         struct rte_flow_item_eth l2_mask;
 252         union {
 253                 struct rte_flow_item_ipv4 ipv4;
 254                 struct rte_flow_item_ipv6 ipv6;
 255         } l3;
 256         union {
 257                 struct rte_flow_item_ipv4 ipv4;
 258                 struct rte_flow_item_ipv6 ipv6;
 259         } l3_mask;
 260         union {
 261                 struct rte_flow_item_udp udp;
 262                 struct rte_flow_item_tcp tcp;
 263         } l4;
 264         union {
 265                 struct rte_flow_item_udp udp;
 266                 struct rte_flow_item_tcp tcp;
 267         } l4_mask;
 268         struct rte_flow_action actions[2];
 269         struct rte_flow_action_queue queue;
 270 };
 271
 272 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 273 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 275 };
 276
 277 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 278 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 279         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 280         { 9, 10, 11 }, { 12, 13, 14 },
 281 };
 282
 283 /* Tunnel information. */
 284 struct mlx5_flow_tunnel_info {
 285         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 286         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 287 };
 288
 289 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 290         {
 291                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 292                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 293         },
 294         {
 295                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 296                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 297         },
 298         {
 299                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 300                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 301         },
 302         {
 303                 .tunnel = MLX5_FLOW_LAYER_GRE,
 304                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 305         },
 306         {
 307                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 308                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 309         },
 310         {
 311                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 312                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 313         },
 314         {
 315                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 316                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 317         },
 318         {
 319                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 320                 .ptype = RTE_PTYPE_TUNNEL_IP,
 321         },
 322         {
 323                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 324                 .ptype = RTE_PTYPE_TUNNEL_IP,
 325         },
 326         {
 327                 .tunnel = MLX5_FLOW_LAYER_GTP,
 328                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 329         },
 330 };
 331
 332 /**
 333  * Translate tag ID to register.
 334  *
 335  * @param[in] dev
 336  *   Pointer to the Ethernet device structure.
 337  * @param[in] feature
 338  *   The feature that request the register.
 339  * @param[in] id
 340  *   The request register ID.
 341  * @param[out] error
 342  *   Error description in case of any.
 343  *
 344  * @return
 345  *   The request register on success, a negative errno
 346  *   value otherwise and rte_errno is set.
 347  */
 348 int
 349 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 350                      enum mlx5_feature_name feature,
 351                      uint32_t id,
 352                      struct rte_flow_error *error)
 353 {
 354         struct mlx5_priv *priv = dev->data->dev_private;
 355         struct mlx5_dev_config *config = &priv->config;
 356         enum modify_reg start_reg;
 357         bool skip_mtr_reg = false;
 358
 359         switch (feature) {
 360         case MLX5_HAIRPIN_RX:
 361                 return REG_B;
 362         case MLX5_HAIRPIN_TX:
 363                 return REG_A;
 364         case MLX5_METADATA_RX:
 365                 switch (config->dv_xmeta_en) {
 366                 case MLX5_XMETA_MODE_LEGACY:
 367                         return REG_B;
 368                 case MLX5_XMETA_MODE_META16:
 369                         return REG_C_0;
 370                 case MLX5_XMETA_MODE_META32:
 371                         return REG_C_1;
 372                 }
 373                 break;
 374         case MLX5_METADATA_TX:
 375                 return REG_A;
 376         case MLX5_METADATA_FDB:
 377                 switch (config->dv_xmeta_en) {
 378                 case MLX5_XMETA_MODE_LEGACY:
 379                         return REG_NONE;
 380                 case MLX5_XMETA_MODE_META16:
 381                         return REG_C_0;
 382                 case MLX5_XMETA_MODE_META32:
 383                         return REG_C_1;
 384                 }
 385                 break;
 386         case MLX5_FLOW_MARK:
 387                 switch (config->dv_xmeta_en) {
 388                 case MLX5_XMETA_MODE_LEGACY:
 389                         return REG_NONE;
 390                 case MLX5_XMETA_MODE_META16:
 391                         return REG_C_1;
 392                 case MLX5_XMETA_MODE_META32:
 393                         return REG_C_0;
 394                 }
 395                 break;
 396         case MLX5_MTR_SFX:
 397                 /*
 398                  * If meter color and flow match share one register, flow match
 399                  * should use the meter color register for match.
 400                  */
 401                 if (priv->mtr_reg_share)
 402                         return priv->mtr_color_reg;
 403                 else
 404                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 405                                REG_C_3;
 406         case MLX5_MTR_COLOR:
 407                 MLX5_ASSERT(priv->mtr_color_reg != REG_NONE);
 408                 return priv->mtr_color_reg;
 409         case MLX5_COPY_MARK:
 410                 /*
 411                  * Metadata COPY_MARK register using is in meter suffix sub
 412                  * flow while with meter. It's safe to share the same register.
 413                  */
 414                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 415         case MLX5_APP_TAG:
 416                 /*
 417                  * If meter is enable, it will engage the register for color
 418                  * match and flow match. If meter color match is not using the
 419                  * REG_C_2, need to skip the REG_C_x be used by meter color
 420                  * match.
 421                  * If meter is disable, free to use all available registers.
 422                  */
 423                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 424                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 425                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 426                 if (id > (REG_C_7 - start_reg))
 427                         return rte_flow_error_set(error, EINVAL,
 428                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 429                                                   NULL, "invalid tag id");
 430                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 431                         return rte_flow_error_set(error, ENOTSUP,
 432                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 433                                                   NULL, "unsupported tag id");
 434                 /*
 435                  * This case means meter is using the REG_C_x great than 2.
 436                  * Take care not to conflict with meter color REG_C_x.
 437                  * If the available index REG_C_y >= REG_C_x, skip the
 438                  * color register.
 439                  */
 440                 if (skip_mtr_reg && config->flow_mreg_c
 441                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 442                         if (config->flow_mreg_c
 443                             [id + 1 + start_reg - REG_C_0] != REG_NONE)
 444                                 return config->flow_mreg_c
 445                                                [id + 1 + start_reg - REG_C_0];
 446                         return rte_flow_error_set(error, ENOTSUP,
 447                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 448                                                   NULL, "unsupported tag id");
 449                 }
 450                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 451         }
 452         MLX5_ASSERT(false);
 453         return rte_flow_error_set(error, EINVAL,
 454                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 455                                   NULL, "invalid feature name");
 456 }
 457
 458 /**
 459  * Check extensive flow metadata register support.
 460  *
 461  * @param dev
 462  *   Pointer to rte_eth_dev structure.
 463  *
 464  * @return
 465  *   True if device supports extensive flow metadata register, otherwise false.
 466  */
 467 bool
 468 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 469 {
 470         struct mlx5_priv *priv = dev->data->dev_private;
 471         struct mlx5_dev_config *config = &priv->config;
 472
 473         /*
 474          * Having available reg_c can be regarded inclusively as supporting
 475          * extensive flow metadata register, which could mean,
 476          * - metadata register copy action by modify header.
 477          * - 16 modify header actions is supported.
 478          * - reg_c's are preserved across different domain (FDB and NIC) on
 479          *   packet loopback by flow lookup miss.
 480          */
 481         return config->flow_mreg_c[2] != REG_NONE;
 482 }
 483
 484 /**
 485  * Discover the maximum number of priority available.
 486  *
 487  * @param[in] dev
 488  *   Pointer to the Ethernet device structure.
 489  *
 490  * @return
 491  *   number of supported flow priority on success, a negative errno
 492  *   value otherwise and rte_errno is set.
 493  */
 494 int
 495 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 496 {
 497         struct mlx5_priv *priv = dev->data->dev_private;
 498         struct {
 499                 struct ibv_flow_attr attr;
 500                 struct ibv_flow_spec_eth eth;
 501                 struct ibv_flow_spec_action_drop drop;
 502         } flow_attr = {
 503                 .attr = {
 504                         .num_of_specs = 2,
 505                         .port = (uint8_t)priv->ibv_port,
 506                 },
 507                 .eth = {
 508                         .type = IBV_FLOW_SPEC_ETH,
 509                         .size = sizeof(struct ibv_flow_spec_eth),
 510                 },
 511                 .drop = {
 512                         .size = sizeof(struct ibv_flow_spec_action_drop),
 513                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 514                 },
 515         };
 516         struct ibv_flow *flow;
 517         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 518         uint16_t vprio[] = { 8, 16 };
 519         int i;
 520         int priority = 0;
 521
 522         if (!drop) {
 523                 rte_errno = ENOTSUP;
 524                 return -rte_errno;
 525         }
 526         for (i = 0; i != RTE_DIM(vprio); i++) {
 527                 flow_attr.attr.priority = vprio[i] - 1;
 528                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 529                 if (!flow)
 530                         break;
 531                 claim_zero(mlx5_glue->destroy_flow(flow));
 532                 priority = vprio[i];
 533         }
 534         mlx5_hrxq_drop_release(dev);
 535         switch (priority) {
 536         case 8:
 537                 priority = RTE_DIM(priority_map_3);
 538                 break;
 539         case 16:
 540                 priority = RTE_DIM(priority_map_5);
 541                 break;
 542         default:
 543                 rte_errno = ENOTSUP;
 544                 DRV_LOG(ERR,
 545                         "port %u verbs maximum priority: %d expected 8/16",
 546                         dev->data->port_id, priority);
 547                 return -rte_errno;
 548         }
 549         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 550                 dev->data->port_id, priority);
 551         return priority;
 552 }
 553
 554 /**
 555  * Adjust flow priority based on the highest layer and the request priority.
 556  *
 557  * @param[in] dev
 558  *   Pointer to the Ethernet device structure.
 559  * @param[in] priority
 560  *   The rule base priority.
 561  * @param[in] subpriority
 562  *   The priority based on the items.
 563  *
 564  * @return
 565  *   The new priority.
 566  */
 567 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 568                                    uint32_t subpriority)
 569 {
 570         uint32_t res = 0;
 571         struct mlx5_priv *priv = dev->data->dev_private;
 572
 573         switch (priv->config.flow_prio) {
 574         case RTE_DIM(priority_map_3):
 575                 res = priority_map_3[priority][subpriority];
 576                 break;
 577         case RTE_DIM(priority_map_5):
 578                 res = priority_map_5[priority][subpriority];
 579                 break;
 580         }
 581         return  res;
 582 }
 583
 584 /**
 585  * Verify the @p item specifications (spec, last, mask) are compatible with the
 586  * NIC capabilities.
 587  *
 588  * @param[in] item
 589  *   Item specification.
 590  * @param[in] mask
 591  *   @p item->mask or flow default bit-masks.
 592  * @param[in] nic_mask
 593  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 594  * @param[in] size
 595  *   Bit-masks size in bytes.
 596  * @param[out] error
 597  *   Pointer to error structure.
 598  *
 599  * @return
 600  *   0 on success, a negative errno value otherwise and rte_errno is set.
 601  */
 602 int
 603 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 604                           const uint8_t *mask,
 605                           const uint8_t *nic_mask,
 606                           unsigned int size,
 607                           struct rte_flow_error *error)
 608 {
 609         unsigned int i;
 610
 611         MLX5_ASSERT(nic_mask);
 612         for (i = 0; i < size; ++i)
 613                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 614                         return rte_flow_error_set(error, ENOTSUP,
 615                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 616                                                   item,
 617                                                   "mask enables non supported"
 618                                                   " bits");
 619         if (!item->spec && (item->mask || item->last))
 620                 return rte_flow_error_set(error, EINVAL,
 621                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 622                                           "mask/last without a spec is not"
 623                                           " supported");
 624         if (item->spec && item->last) {
 625                 uint8_t spec[size];
 626                 uint8_t last[size];
 627                 unsigned int i;
 628                 int ret;
 629
 630                 for (i = 0; i < size; ++i) {
 631                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 632                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 633                 }
 634                 ret = memcmp(spec, last, size);
 635                 if (ret != 0)
 636                         return rte_flow_error_set(error, EINVAL,
 637                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 638                                                   item,
 639                                                   "range is not valid");
 640         }
 641         return 0;
 642 }
 643
 644 /**
 645  * Adjust the hash fields according to the @p flow information.
 646  *
 647  * @param[in] dev_flow.
 648  *   Pointer to the mlx5_flow.
 649  * @param[in] tunnel
 650  *   1 when the hash field is for a tunnel item.
 651  * @param[in] layer_types
 652  *   ETH_RSS_* types.
 653  * @param[in] hash_fields
 654  *   Item hash fields.
 655  *
 656  * @return
 657  *   The hash fields that should be used.
 658  */
 659 uint64_t
 660 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 661                             int tunnel __rte_unused, uint64_t layer_types,
 662                             uint64_t hash_fields)
 663 {
 664         struct rte_flow *flow = dev_flow->flow;
 665 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 666         int rss_request_inner = flow->rss.level >= 2;
 667
 668         /* Check RSS hash level for tunnel. */
 669         if (tunnel && rss_request_inner)
 670                 hash_fields |= IBV_RX_HASH_INNER;
 671         else if (tunnel || rss_request_inner)
 672                 return 0;
 673 #endif
 674         /* Check if requested layer matches RSS hash fields. */
 675         if (!(flow->rss.types & layer_types))
 676                 return 0;
 677         return hash_fields;
 678 }
 679
 680 /**
 681  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 682  * if several tunnel rules are used on this queue, the tunnel ptype will be
 683  * cleared.
 684  *
 685  * @param rxq_ctrl
 686  *   Rx queue to update.
 687  */
 688 static void
 689 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 690 {
 691         unsigned int i;
 692         uint32_t tunnel_ptype = 0;
 693
 694         /* Look up for the ptype to use. */
 695         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 696                 if (!rxq_ctrl->flow_tunnels_n[i])
 697                         continue;
 698                 if (!tunnel_ptype) {
 699                         tunnel_ptype = tunnels_info[i].ptype;
 700                 } else {
 701                         tunnel_ptype = 0;
 702                         break;
 703                 }
 704         }
 705         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 706 }
 707
 708 /**
 709  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 710  * flow.
 711  *
 712  * @param[in] dev
 713  *   Pointer to the Ethernet device structure.
 714  * @param[in] dev_flow
 715  *   Pointer to device flow structure.
 716  */
 717 static void
 718 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 719 {
 720         struct mlx5_priv *priv = dev->data->dev_private;
 721         struct rte_flow *flow = dev_flow->flow;
 722         const int mark = !!(dev_flow->actions &
 723                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 724         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 725         unsigned int i;
 726
 727         for (i = 0; i != flow->rss.queue_num; ++i) {
 728                 int idx = (*flow->rss.queue)[i];
 729                 struct mlx5_rxq_ctrl *rxq_ctrl =
 730                         container_of((*priv->rxqs)[idx],
 731                                      struct mlx5_rxq_ctrl, rxq);
 732
 733                 /*
 734                  * To support metadata register copy on Tx loopback,
 735                  * this must be always enabled (metadata may arive
 736                  * from other port - not from local flows only.
 737                  */
 738                 if (priv->config.dv_flow_en &&
 739                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 740                     mlx5_flow_ext_mreg_supported(dev)) {
 741                         rxq_ctrl->rxq.mark = 1;
 742                         rxq_ctrl->flow_mark_n = 1;
 743                 } else if (mark) {
 744                         rxq_ctrl->rxq.mark = 1;
 745                         rxq_ctrl->flow_mark_n++;
 746                 }
 747                 if (tunnel) {
 748                         unsigned int j;
 749
 750                         /* Increase the counter matching the flow. */
 751                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 752                                 if ((tunnels_info[j].tunnel &
 753                                      dev_flow->layers) ==
 754                                     tunnels_info[j].tunnel) {
 755                                         rxq_ctrl->flow_tunnels_n[j]++;
 756                                         break;
 757                                 }
 758                         }
 759                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 760                 }
 761         }
 762 }
 763
 764 /**
 765  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 766  *
 767  * @param[in] dev
 768  *   Pointer to the Ethernet device structure.
 769  * @param[in] flow
 770  *   Pointer to flow structure.
 771  */
 772 static void
 773 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 774 {
 775         struct mlx5_flow *dev_flow;
 776
 777         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 778                 flow_drv_rxq_flags_set(dev, dev_flow);
 779 }
 780
 781 /**
 782  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 783  * device flow if no other flow uses it with the same kind of request.
 784  *
 785  * @param dev
 786  *   Pointer to Ethernet device.
 787  * @param[in] dev_flow
 788  *   Pointer to the device flow.
 789  */
 790 static void
 791 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 792 {
 793         struct mlx5_priv *priv = dev->data->dev_private;
 794         struct rte_flow *flow = dev_flow->flow;
 795         const int mark = !!(dev_flow->actions &
 796                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 797         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 798         unsigned int i;
 799
 800         MLX5_ASSERT(dev->data->dev_started);
 801         for (i = 0; i != flow->rss.queue_num; ++i) {
 802                 int idx = (*flow->rss.queue)[i];
 803                 struct mlx5_rxq_ctrl *rxq_ctrl =
 804                         container_of((*priv->rxqs)[idx],
 805                                      struct mlx5_rxq_ctrl, rxq);
 806
 807                 if (priv->config.dv_flow_en &&
 808                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 809                     mlx5_flow_ext_mreg_supported(dev)) {
 810                         rxq_ctrl->rxq.mark = 1;
 811                         rxq_ctrl->flow_mark_n = 1;
 812                 } else if (mark) {
 813                         rxq_ctrl->flow_mark_n--;
 814                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 815                 }
 816                 if (tunnel) {
 817                         unsigned int j;
 818
 819                         /* Decrease the counter matching the flow. */
 820                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 821                                 if ((tunnels_info[j].tunnel &
 822                                      dev_flow->layers) ==
 823                                     tunnels_info[j].tunnel) {
 824                                         rxq_ctrl->flow_tunnels_n[j]--;
 825                                         break;
 826                                 }
 827                         }
 828                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 829                 }
 830         }
 831 }
 832
 833 /**
 834  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 835  * @p flow if no other flow uses it with the same kind of request.
 836  *
 837  * @param dev
 838  *   Pointer to Ethernet device.
 839  * @param[in] flow
 840  *   Pointer to the flow.
 841  */
 842 static void
 843 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 844 {
 845         struct mlx5_flow *dev_flow;
 846
 847         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 848                 flow_drv_rxq_flags_trim(dev, dev_flow);
 849 }
 850
 851 /**
 852  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 853  *
 854  * @param dev
 855  *   Pointer to Ethernet device.
 856  */
 857 static void
 858 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 859 {
 860         struct mlx5_priv *priv = dev->data->dev_private;
 861         unsigned int i;
 862
 863         for (i = 0; i != priv->rxqs_n; ++i) {
 864                 struct mlx5_rxq_ctrl *rxq_ctrl;
 865                 unsigned int j;
 866
 867                 if (!(*priv->rxqs)[i])
 868                         continue;
 869                 rxq_ctrl = container_of((*priv->rxqs)[i],
 870                                         struct mlx5_rxq_ctrl, rxq);
 871                 rxq_ctrl->flow_mark_n = 0;
 872                 rxq_ctrl->rxq.mark = 0;
 873                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 874                         rxq_ctrl->flow_tunnels_n[j] = 0;
 875                 rxq_ctrl->rxq.tunnel = 0;
 876         }
 877 }
 878
 879 /*
 880  * return a pointer to the desired action in the list of actions.
 881  *
 882  * @param[in] actions
 883  *   The list of actions to search the action in.
 884  * @param[in] action
 885  *   The action to find.
 886  *
 887  * @return
 888  *   Pointer to the action in the list, if found. NULL otherwise.
 889  */
 890 const struct rte_flow_action *
 891 mlx5_flow_find_action(const struct rte_flow_action *actions,
 892                       enum rte_flow_action_type action)
 893 {
 894         if (actions == NULL)
 895                 return NULL;
 896         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 897                 if (actions->type == action)
 898                         return actions;
 899         return NULL;
 900 }
 901
 902 /*
 903  * Validate the flag action.
 904  *
 905  * @param[in] action_flags
 906  *   Bit-fields that holds the actions detected until now.
 907  * @param[in] attr
 908  *   Attributes of flow that includes this action.
 909  * @param[out] error
 910  *   Pointer to error structure.
 911  *
 912  * @return
 913  *   0 on success, a negative errno value otherwise and rte_errno is set.
 914  */
 915 int
 916 mlx5_flow_validate_action_flag(uint64_t action_flags,
 917                                const struct rte_flow_attr *attr,
 918                                struct rte_flow_error *error)
 919 {
 920         if (action_flags & MLX5_FLOW_ACTION_MARK)
 921                 return rte_flow_error_set(error, EINVAL,
 922                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 923                                           "can't mark and flag in same flow");
 924         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 925                 return rte_flow_error_set(error, EINVAL,
 926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 927                                           "can't have 2 flag"
 928                                           " actions in same flow");
 929         if (attr->egress)
 930                 return rte_flow_error_set(error, ENOTSUP,
 931                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 932                                           "flag action not supported for "
 933                                           "egress");
 934         return 0;
 935 }
 936
 937 /*
 938  * Validate the mark action.
 939  *
 940  * @param[in] action
 941  *   Pointer to the queue action.
 942  * @param[in] action_flags
 943  *   Bit-fields that holds the actions detected until now.
 944  * @param[in] attr
 945  *   Attributes of flow that includes this action.
 946  * @param[out] error
 947  *   Pointer to error structure.
 948  *
 949  * @return
 950  *   0 on success, a negative errno value otherwise and rte_errno is set.
 951  */
 952 int
 953 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 954                                uint64_t action_flags,
 955                                const struct rte_flow_attr *attr,
 956                                struct rte_flow_error *error)
 957 {
 958         const struct rte_flow_action_mark *mark = action->conf;
 959
 960         if (!mark)
 961                 return rte_flow_error_set(error, EINVAL,
 962                                           RTE_FLOW_ERROR_TYPE_ACTION,
 963                                           action,
 964                                           "configuration cannot be null");
 965         if (mark->id >= MLX5_FLOW_MARK_MAX)
 966                 return rte_flow_error_set(error, EINVAL,
 967                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 968                                           &mark->id,
 969                                           "mark id must in 0 <= id < "
 970                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 971         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 972                 return rte_flow_error_set(error, EINVAL,
 973                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 974                                           "can't flag and mark in same flow");
 975         if (action_flags & MLX5_FLOW_ACTION_MARK)
 976                 return rte_flow_error_set(error, EINVAL,
 977                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 978                                           "can't have 2 mark actions in same"
 979                                           " flow");
 980         if (attr->egress)
 981                 return rte_flow_error_set(error, ENOTSUP,
 982                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 983                                           "mark action not supported for "
 984                                           "egress");
 985         return 0;
 986 }
 987
 988 /*
 989  * Validate the drop action.
 990  *
 991  * @param[in] action_flags
 992  *   Bit-fields that holds the actions detected until now.
 993  * @param[in] attr
 994  *   Attributes of flow that includes this action.
 995  * @param[out] error
 996  *   Pointer to error structure.
 997  *
 998  * @return
 999  *   0 on success, a negative errno value otherwise and rte_errno is set.
1000  */
1001 int
1002 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1003                                const struct rte_flow_attr *attr,
1004                                struct rte_flow_error *error)
1005 {
1006         if (attr->egress)
1007                 return rte_flow_error_set(error, ENOTSUP,
1008                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1009                                           "drop action not supported for "
1010                                           "egress");
1011         return 0;
1012 }
1013
1014 /*
1015  * Validate the queue action.
1016  *
1017  * @param[in] action
1018  *   Pointer to the queue action.
1019  * @param[in] action_flags
1020  *   Bit-fields that holds the actions detected until now.
1021  * @param[in] dev
1022  *   Pointer to the Ethernet device structure.
1023  * @param[in] attr
1024  *   Attributes of flow that includes this action.
1025  * @param[out] error
1026  *   Pointer to error structure.
1027  *
1028  * @return
1029  *   0 on success, a negative errno value otherwise and rte_errno is set.
1030  */
1031 int
1032 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1033                                 uint64_t action_flags,
1034                                 struct rte_eth_dev *dev,
1035                                 const struct rte_flow_attr *attr,
1036                                 struct rte_flow_error *error)
1037 {
1038         struct mlx5_priv *priv = dev->data->dev_private;
1039         const struct rte_flow_action_queue *queue = action->conf;
1040
1041         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1042                 return rte_flow_error_set(error, EINVAL,
1043                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1044                                           "can't have 2 fate actions in"
1045                                           " same flow");
1046         if (!priv->rxqs_n)
1047                 return rte_flow_error_set(error, EINVAL,
1048                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1049                                           NULL, "No Rx queues configured");
1050         if (queue->index >= priv->rxqs_n)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1053                                           &queue->index,
1054                                           "queue index out of range");
1055         if (!(*priv->rxqs)[queue->index])
1056                 return rte_flow_error_set(error, EINVAL,
1057                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1058                                           &queue->index,
1059                                           "queue is not configured");
1060         if (attr->egress)
1061                 return rte_flow_error_set(error, ENOTSUP,
1062                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1063                                           "queue action not supported for "
1064                                           "egress");
1065         return 0;
1066 }
1067
1068 /*
1069  * Validate the rss action.
1070  *
1071  * @param[in] action
1072  *   Pointer to the queue action.
1073  * @param[in] action_flags
1074  *   Bit-fields that holds the actions detected until now.
1075  * @param[in] dev
1076  *   Pointer to the Ethernet device structure.
1077  * @param[in] attr
1078  *   Attributes of flow that includes this action.
1079  * @param[in] item_flags
1080  *   Items that were detected.
1081  * @param[out] error
1082  *   Pointer to error structure.
1083  *
1084  * @return
1085  *   0 on success, a negative errno value otherwise and rte_errno is set.
1086  */
1087 int
1088 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1089                               uint64_t action_flags,
1090                               struct rte_eth_dev *dev,
1091                               const struct rte_flow_attr *attr,
1092                               uint64_t item_flags,
1093                               struct rte_flow_error *error)
1094 {
1095         struct mlx5_priv *priv = dev->data->dev_private;
1096         const struct rte_flow_action_rss *rss = action->conf;
1097         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1098         unsigned int i;
1099
1100         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1101                 return rte_flow_error_set(error, EINVAL,
1102                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1103                                           "can't have 2 fate actions"
1104                                           " in same flow");
1105         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1106             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1107                 return rte_flow_error_set(error, ENOTSUP,
1108                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1109                                           &rss->func,
1110                                           "RSS hash function not supported");
1111 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1112         if (rss->level > 2)
1113 #else
1114         if (rss->level > 1)
1115 #endif
1116                 return rte_flow_error_set(error, ENOTSUP,
1117                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1118                                           &rss->level,
1119                                           "tunnel RSS is not supported");
1120         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1121         if (rss->key_len == 0 && rss->key != NULL)
1122                 return rte_flow_error_set(error, ENOTSUP,
1123                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1124                                           &rss->key_len,
1125                                           "RSS hash key length 0");
1126         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1127                 return rte_flow_error_set(error, ENOTSUP,
1128                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1129                                           &rss->key_len,
1130                                           "RSS hash key too small");
1131         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1132                 return rte_flow_error_set(error, ENOTSUP,
1133                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1134                                           &rss->key_len,
1135                                           "RSS hash key too large");
1136         if (rss->queue_num > priv->config.ind_table_max_size)
1137                 return rte_flow_error_set(error, ENOTSUP,
1138                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1139                                           &rss->queue_num,
1140                                           "number of queues too large");
1141         if (rss->types & MLX5_RSS_HF_MASK)
1142                 return rte_flow_error_set(error, ENOTSUP,
1143                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1144                                           &rss->types,
1145                                           "some RSS protocols are not"
1146                                           " supported");
1147         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1148             !(rss->types & ETH_RSS_IP))
1149                 return rte_flow_error_set(error, EINVAL,
1150                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1151                                           "L3 partial RSS requested but L3 RSS"
1152                                           " type not specified");
1153         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1154             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1155                 return rte_flow_error_set(error, EINVAL,
1156                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1157                                           "L4 partial RSS requested but L4 RSS"
1158                                           " type not specified");
1159         if (!priv->rxqs_n)
1160                 return rte_flow_error_set(error, EINVAL,
1161                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1162                                           NULL, "No Rx queues configured");
1163         if (!rss->queue_num)
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1166                                           NULL, "No queues configured");
1167         for (i = 0; i != rss->queue_num; ++i) {
1168                 if (rss->queue[i] >= priv->rxqs_n)
1169                         return rte_flow_error_set
1170                                 (error, EINVAL,
1171                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1172                                  &rss->queue[i], "queue index out of range");
1173                 if (!(*priv->rxqs)[rss->queue[i]])
1174                         return rte_flow_error_set
1175                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1176                                  &rss->queue[i], "queue is not configured");
1177         }
1178         if (attr->egress)
1179                 return rte_flow_error_set(error, ENOTSUP,
1180                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1181                                           "rss action not supported for "
1182                                           "egress");
1183         if (rss->level > 1 &&  !tunnel)
1184                 return rte_flow_error_set(error, EINVAL,
1185                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1186                                           "inner RSS is not supported for "
1187                                           "non-tunnel flows");
1188         return 0;
1189 }
1190
1191 /*
1192  * Validate the count action.
1193  *
1194  * @param[in] dev
1195  *   Pointer to the Ethernet device structure.
1196  * @param[in] attr
1197  *   Attributes of flow that includes this action.
1198  * @param[out] error
1199  *   Pointer to error structure.
1200  *
1201  * @return
1202  *   0 on success, a negative errno value otherwise and rte_errno is set.
1203  */
1204 int
1205 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1206                                 const struct rte_flow_attr *attr,
1207                                 struct rte_flow_error *error)
1208 {
1209         if (attr->egress)
1210                 return rte_flow_error_set(error, ENOTSUP,
1211                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1212                                           "count action not supported for "
1213                                           "egress");
1214         return 0;
1215 }
1216
1217 /**
1218  * Verify the @p attributes will be correctly understood by the NIC and store
1219  * them in the @p flow if everything is correct.
1220  *
1221  * @param[in] dev
1222  *   Pointer to the Ethernet device structure.
1223  * @param[in] attributes
1224  *   Pointer to flow attributes
1225  * @param[out] error
1226  *   Pointer to error structure.
1227  *
1228  * @return
1229  *   0 on success, a negative errno value otherwise and rte_errno is set.
1230  */
1231 int
1232 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1233                               const struct rte_flow_attr *attributes,
1234                               struct rte_flow_error *error)
1235 {
1236         struct mlx5_priv *priv = dev->data->dev_private;
1237         uint32_t priority_max = priv->config.flow_prio - 1;
1238
1239         if (attributes->group)
1240                 return rte_flow_error_set(error, ENOTSUP,
1241                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1242                                           NULL, "groups is not supported");
1243         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1244             attributes->priority >= priority_max)
1245                 return rte_flow_error_set(error, ENOTSUP,
1246                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1247                                           NULL, "priority out of range");
1248         if (attributes->egress)
1249                 return rte_flow_error_set(error, ENOTSUP,
1250                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1251                                           "egress is not supported");
1252         if (attributes->transfer && !priv->config.dv_esw_en)
1253                 return rte_flow_error_set(error, ENOTSUP,
1254                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1255                                           NULL, "transfer is not supported");
1256         if (!attributes->ingress)
1257                 return rte_flow_error_set(error, EINVAL,
1258                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1259                                           NULL,
1260                                           "ingress attribute is mandatory");
1261         return 0;
1262 }
1263
1264 /**
1265  * Validate ICMP6 item.
1266  *
1267  * @param[in] item
1268  *   Item specification.
1269  * @param[in] item_flags
1270  *   Bit-fields that holds the items detected until now.
1271  * @param[out] error
1272  *   Pointer to error structure.
1273  *
1274  * @return
1275  *   0 on success, a negative errno value otherwise and rte_errno is set.
1276  */
1277 int
1278 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1279                                uint64_t item_flags,
1280                                uint8_t target_protocol,
1281                                struct rte_flow_error *error)
1282 {
1283         const struct rte_flow_item_icmp6 *mask = item->mask;
1284         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1285         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1286                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1287         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1288                                       MLX5_FLOW_LAYER_OUTER_L4;
1289         int ret;
1290
1291         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1292                 return rte_flow_error_set(error, EINVAL,
1293                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1294                                           "protocol filtering not compatible"
1295                                           " with ICMP6 layer");
1296         if (!(item_flags & l3m))
1297                 return rte_flow_error_set(error, EINVAL,
1298                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1299                                           "IPv6 is mandatory to filter on"
1300                                           " ICMP6");
1301         if (item_flags & l4m)
1302                 return rte_flow_error_set(error, EINVAL,
1303                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1304                                           "multiple L4 layers not supported");
1305         if (!mask)
1306                 mask = &rte_flow_item_icmp6_mask;
1307         ret = mlx5_flow_item_acceptable
1308                 (item, (const uint8_t *)mask,
1309                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1310                  sizeof(struct rte_flow_item_icmp6), error);
1311         if (ret < 0)
1312                 return ret;
1313         return 0;
1314 }
1315
1316 /**
1317  * Validate ICMP item.
1318  *
1319  * @param[in] item
1320  *   Item specification.
1321  * @param[in] item_flags
1322  *   Bit-fields that holds the items detected until now.
1323  * @param[out] error
1324  *   Pointer to error structure.
1325  *
1326  * @return
1327  *   0 on success, a negative errno value otherwise and rte_errno is set.
1328  */
1329 int
1330 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1331                              uint64_t item_flags,
1332                              uint8_t target_protocol,
1333                              struct rte_flow_error *error)
1334 {
1335         const struct rte_flow_item_icmp *mask = item->mask;
1336         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1337         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1338                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1339         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1340                                       MLX5_FLOW_LAYER_OUTER_L4;
1341         int ret;
1342
1343         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1344                 return rte_flow_error_set(error, EINVAL,
1345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1346                                           "protocol filtering not compatible"
1347                                           " with ICMP layer");
1348         if (!(item_flags & l3m))
1349                 return rte_flow_error_set(error, EINVAL,
1350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1351                                           "IPv4 is mandatory to filter"
1352                                           " on ICMP");
1353         if (item_flags & l4m)
1354                 return rte_flow_error_set(error, EINVAL,
1355                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1356                                           "multiple L4 layers not supported");
1357         if (!mask)
1358                 mask = &rte_flow_item_icmp_mask;
1359         ret = mlx5_flow_item_acceptable
1360                 (item, (const uint8_t *)mask,
1361                  (const uint8_t *)&rte_flow_item_icmp_mask,
1362                  sizeof(struct rte_flow_item_icmp), error);
1363         if (ret < 0)
1364                 return ret;
1365         return 0;
1366 }
1367
1368 /**
1369  * Validate Ethernet item.
1370  *
1371  * @param[in] item
1372  *   Item specification.
1373  * @param[in] item_flags
1374  *   Bit-fields that holds the items detected until now.
1375  * @param[out] error
1376  *   Pointer to error structure.
1377  *
1378  * @return
1379  *   0 on success, a negative errno value otherwise and rte_errno is set.
1380  */
1381 int
1382 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1383                             uint64_t item_flags,
1384                             struct rte_flow_error *error)
1385 {
1386         const struct rte_flow_item_eth *mask = item->mask;
1387         const struct rte_flow_item_eth nic_mask = {
1388                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1389                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1390                 .type = RTE_BE16(0xffff),
1391         };
1392         int ret;
1393         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1394         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1395                                        MLX5_FLOW_LAYER_OUTER_L2;
1396
1397         if (item_flags & ethm)
1398                 return rte_flow_error_set(error, ENOTSUP,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1400                                           "multiple L2 layers not supported");
1401         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1402             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1405                                           "L2 layer should not follow "
1406                                           "L3 layers");
1407         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1408             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1409                 return rte_flow_error_set(error, EINVAL,
1410                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1411                                           "L2 layer should not follow VLAN");
1412         if (!mask)
1413                 mask = &rte_flow_item_eth_mask;
1414         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1415                                         (const uint8_t *)&nic_mask,
1416                                         sizeof(struct rte_flow_item_eth),
1417                                         error);
1418         return ret;
1419 }
1420
1421 /**
1422  * Validate VLAN item.
1423  *
1424  * @param[in] item
1425  *   Item specification.
1426  * @param[in] item_flags
1427  *   Bit-fields that holds the items detected until now.
1428  * @param[in] dev
1429  *   Ethernet device flow is being created on.
1430  * @param[out] error
1431  *   Pointer to error structure.
1432  *
1433  * @return
1434  *   0 on success, a negative errno value otherwise and rte_errno is set.
1435  */
1436 int
1437 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1438                              uint64_t item_flags,
1439                              struct rte_eth_dev *dev,
1440                              struct rte_flow_error *error)
1441 {
1442         const struct rte_flow_item_vlan *spec = item->spec;
1443         const struct rte_flow_item_vlan *mask = item->mask;
1444         const struct rte_flow_item_vlan nic_mask = {
1445                 .tci = RTE_BE16(UINT16_MAX),
1446                 .inner_type = RTE_BE16(UINT16_MAX),
1447         };
1448         uint16_t vlan_tag = 0;
1449         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1450         int ret;
1451         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1452                                         MLX5_FLOW_LAYER_INNER_L4) :
1453                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1454                                         MLX5_FLOW_LAYER_OUTER_L4);
1455         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1456                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1457
1458         if (item_flags & vlanm)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1461                                           "multiple VLAN layers not supported");
1462         else if ((item_flags & l34m) != 0)
1463                 return rte_flow_error_set(error, EINVAL,
1464                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1465                                           "VLAN cannot follow L3/L4 layer");
1466         if (!mask)
1467                 mask = &rte_flow_item_vlan_mask;
1468         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1469                                         (const uint8_t *)&nic_mask,
1470                                         sizeof(struct rte_flow_item_vlan),
1471                                         error);
1472         if (ret)
1473                 return ret;
1474         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1475                 struct mlx5_priv *priv = dev->data->dev_private;
1476
1477                 if (priv->vmwa_context) {
1478                         /*
1479                          * Non-NULL context means we have a virtual machine
1480                          * and SR-IOV enabled, we have to create VLAN interface
1481                          * to make hypervisor to setup E-Switch vport
1482                          * context correctly. We avoid creating the multiple
1483                          * VLAN interfaces, so we cannot support VLAN tag mask.
1484                          */
1485                         return rte_flow_error_set(error, EINVAL,
1486                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1487                                                   item,
1488                                                   "VLAN tag mask is not"
1489                                                   " supported in virtual"
1490                                                   " environment");
1491                 }
1492         }
1493         if (spec) {
1494                 vlan_tag = spec->tci;
1495                 vlan_tag &= mask->tci;
1496         }
1497         /*
1498          * From verbs perspective an empty VLAN is equivalent
1499          * to a packet without VLAN layer.
1500          */
1501         if (!vlan_tag)
1502                 return rte_flow_error_set(error, EINVAL,
1503                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1504                                           item->spec,
1505                                           "VLAN cannot be empty");
1506         return 0;
1507 }
1508
1509 /**
1510  * Validate IPV4 item.
1511  *
1512  * @param[in] item
1513  *   Item specification.
1514  * @param[in] item_flags
1515  *   Bit-fields that holds the items detected until now.
1516  * @param[in] acc_mask
1517  *   Acceptable mask, if NULL default internal default mask
1518  *   will be used to check whether item fields are supported.
1519  * @param[out] error
1520  *   Pointer to error structure.
1521  *
1522  * @return
1523  *   0 on success, a negative errno value otherwise and rte_errno is set.
1524  */
1525 int
1526 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1527                              uint64_t item_flags,
1528                              uint64_t last_item,
1529                              uint16_t ether_type,
1530                              const struct rte_flow_item_ipv4 *acc_mask,
1531                              struct rte_flow_error *error)
1532 {
1533         const struct rte_flow_item_ipv4 *mask = item->mask;
1534         const struct rte_flow_item_ipv4 *spec = item->spec;
1535         const struct rte_flow_item_ipv4 nic_mask = {
1536                 .hdr = {
1537                         .src_addr = RTE_BE32(0xffffffff),
1538                         .dst_addr = RTE_BE32(0xffffffff),
1539                         .type_of_service = 0xff,
1540                         .next_proto_id = 0xff,
1541                 },
1542         };
1543         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1544         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1545                                       MLX5_FLOW_LAYER_OUTER_L3;
1546         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1547                                       MLX5_FLOW_LAYER_OUTER_L4;
1548         int ret;
1549         uint8_t next_proto = 0xFF;
1550         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1551                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1552                                   MLX5_FLOW_LAYER_INNER_VLAN);
1553
1554         if ((last_item & l2_vlan) && ether_type &&
1555             ether_type != RTE_ETHER_TYPE_IPV4)
1556                 return rte_flow_error_set(error, EINVAL,
1557                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1558                                           "IPv4 cannot follow L2/VLAN layer "
1559                                           "which ether type is not IPv4");
1560         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1561                 if (mask && spec)
1562                         next_proto = mask->hdr.next_proto_id &
1563                                      spec->hdr.next_proto_id;
1564                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1565                         return rte_flow_error_set(error, EINVAL,
1566                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1567                                                   item,
1568                                                   "multiple tunnel "
1569                                                   "not supported");
1570         }
1571         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1572                 return rte_flow_error_set(error, EINVAL,
1573                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1574                                           "wrong tunnel type - IPv6 specified "
1575                                           "but IPv4 item provided");
1576         if (item_flags & l3m)
1577                 return rte_flow_error_set(error, ENOTSUP,
1578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1579                                           "multiple L3 layers not supported");
1580         else if (item_flags & l4m)
1581                 return rte_flow_error_set(error, EINVAL,
1582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1583                                           "L3 cannot follow an L4 layer.");
1584         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1585                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1586                 return rte_flow_error_set(error, EINVAL,
1587                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1588                                           "L3 cannot follow an NVGRE layer.");
1589         if (!mask)
1590                 mask = &rte_flow_item_ipv4_mask;
1591         else if (mask->hdr.next_proto_id != 0 &&
1592                  mask->hdr.next_proto_id != 0xff)
1593                 return rte_flow_error_set(error, EINVAL,
1594                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1595                                           "partial mask is not supported"
1596                                           " for protocol");
1597         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1598                                         acc_mask ? (const uint8_t *)acc_mask
1599                                                  : (const uint8_t *)&nic_mask,
1600                                         sizeof(struct rte_flow_item_ipv4),
1601                                         error);
1602         if (ret < 0)
1603                 return ret;
1604         return 0;
1605 }
1606
1607 /**
1608  * Validate IPV6 item.
1609  *
1610  * @param[in] item
1611  *   Item specification.
1612  * @param[in] item_flags
1613  *   Bit-fields that holds the items detected until now.
1614  * @param[in] acc_mask
1615  *   Acceptable mask, if NULL default internal default mask
1616  *   will be used to check whether item fields are supported.
1617  * @param[out] error
1618  *   Pointer to error structure.
1619  *
1620  * @return
1621  *   0 on success, a negative errno value otherwise and rte_errno is set.
1622  */
1623 int
1624 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1625                              uint64_t item_flags,
1626                              uint64_t last_item,
1627                              uint16_t ether_type,
1628                              const struct rte_flow_item_ipv6 *acc_mask,
1629                              struct rte_flow_error *error)
1630 {
1631         const struct rte_flow_item_ipv6 *mask = item->mask;
1632         const struct rte_flow_item_ipv6 *spec = item->spec;
1633         const struct rte_flow_item_ipv6 nic_mask = {
1634                 .hdr = {
1635                         .src_addr =
1636                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1637                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1638                         .dst_addr =
1639                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1640                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1641                         .vtc_flow = RTE_BE32(0xffffffff),
1642                         .proto = 0xff,
1643                 },
1644         };
1645         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1646         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1647                                       MLX5_FLOW_LAYER_OUTER_L3;
1648         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1649                                       MLX5_FLOW_LAYER_OUTER_L4;
1650         int ret;
1651         uint8_t next_proto = 0xFF;
1652         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1653                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1654                                   MLX5_FLOW_LAYER_INNER_VLAN);
1655
1656         if ((last_item & l2_vlan) && ether_type &&
1657             ether_type != RTE_ETHER_TYPE_IPV6)
1658                 return rte_flow_error_set(error, EINVAL,
1659                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1660                                           "IPv6 cannot follow L2/VLAN layer "
1661                                           "which ether type is not IPv6");
1662         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1663                 if (mask && spec)
1664                         next_proto = mask->hdr.proto & spec->hdr.proto;
1665                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1666                         return rte_flow_error_set(error, EINVAL,
1667                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1668                                                   item,
1669                                                   "multiple tunnel "
1670                                                   "not supported");
1671         }
1672         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1673                 return rte_flow_error_set(error, EINVAL,
1674                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1675                                           "wrong tunnel type - IPv4 specified "
1676                                           "but IPv6 item provided");
1677         if (item_flags & l3m)
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1680                                           "multiple L3 layers not supported");
1681         else if (item_flags & l4m)
1682                 return rte_flow_error_set(error, EINVAL,
1683                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1684                                           "L3 cannot follow an L4 layer.");
1685         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1686                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1687                 return rte_flow_error_set(error, EINVAL,
1688                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1689                                           "L3 cannot follow an NVGRE layer.");
1690         if (!mask)
1691                 mask = &rte_flow_item_ipv6_mask;
1692         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1693                                         acc_mask ? (const uint8_t *)acc_mask
1694                                                  : (const uint8_t *)&nic_mask,
1695                                         sizeof(struct rte_flow_item_ipv6),
1696                                         error);
1697         if (ret < 0)
1698                 return ret;
1699         return 0;
1700 }
1701
1702 /**
1703  * Validate UDP item.
1704  *
1705  * @param[in] item
1706  *   Item specification.
1707  * @param[in] item_flags
1708  *   Bit-fields that holds the items detected until now.
1709  * @param[in] target_protocol
1710  *   The next protocol in the previous item.
1711  * @param[in] flow_mask
1712  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1713  * @param[out] error
1714  *   Pointer to error structure.
1715  *
1716  * @return
1717  *   0 on success, a negative errno value otherwise and rte_errno is set.
1718  */
1719 int
1720 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1721                             uint64_t item_flags,
1722                             uint8_t target_protocol,
1723                             struct rte_flow_error *error)
1724 {
1725         const struct rte_flow_item_udp *mask = item->mask;
1726         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1727         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1728                                       MLX5_FLOW_LAYER_OUTER_L3;
1729         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1730                                       MLX5_FLOW_LAYER_OUTER_L4;
1731         int ret;
1732
1733         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1734                 return rte_flow_error_set(error, EINVAL,
1735                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1736                                           "protocol filtering not compatible"
1737                                           " with UDP layer");
1738         if (!(item_flags & l3m))
1739                 return rte_flow_error_set(error, EINVAL,
1740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1741                                           "L3 is mandatory to filter on L4");
1742         if (item_flags & l4m)
1743                 return rte_flow_error_set(error, EINVAL,
1744                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1745                                           "multiple L4 layers not supported");
1746         if (!mask)
1747                 mask = &rte_flow_item_udp_mask;
1748         ret = mlx5_flow_item_acceptable
1749                 (item, (const uint8_t *)mask,
1750                  (const uint8_t *)&rte_flow_item_udp_mask,
1751                  sizeof(struct rte_flow_item_udp), error);
1752         if (ret < 0)
1753                 return ret;
1754         return 0;
1755 }
1756
1757 /**
1758  * Validate TCP item.
1759  *
1760  * @param[in] item
1761  *   Item specification.
1762  * @param[in] item_flags
1763  *   Bit-fields that holds the items detected until now.
1764  * @param[in] target_protocol
1765  *   The next protocol in the previous item.
1766  * @param[out] error
1767  *   Pointer to error structure.
1768  *
1769  * @return
1770  *   0 on success, a negative errno value otherwise and rte_errno is set.
1771  */
1772 int
1773 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1774                             uint64_t item_flags,
1775                             uint8_t target_protocol,
1776                             const struct rte_flow_item_tcp *flow_mask,
1777                             struct rte_flow_error *error)
1778 {
1779         const struct rte_flow_item_tcp *mask = item->mask;
1780         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1781         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1782                                       MLX5_FLOW_LAYER_OUTER_L3;
1783         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1784                                       MLX5_FLOW_LAYER_OUTER_L4;
1785         int ret;
1786
1787         MLX5_ASSERT(flow_mask);
1788         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1791                                           "protocol filtering not compatible"
1792                                           " with TCP layer");
1793         if (!(item_flags & l3m))
1794                 return rte_flow_error_set(error, EINVAL,
1795                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1796                                           "L3 is mandatory to filter on L4");
1797         if (item_flags & l4m)
1798                 return rte_flow_error_set(error, EINVAL,
1799                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1800                                           "multiple L4 layers not supported");
1801         if (!mask)
1802                 mask = &rte_flow_item_tcp_mask;
1803         ret = mlx5_flow_item_acceptable
1804                 (item, (const uint8_t *)mask,
1805                  (const uint8_t *)flow_mask,
1806                  sizeof(struct rte_flow_item_tcp), error);
1807         if (ret < 0)
1808                 return ret;
1809         return 0;
1810 }
1811
1812 /**
1813  * Validate VXLAN item.
1814  *
1815  * @param[in] item
1816  *   Item specification.
1817  * @param[in] item_flags
1818  *   Bit-fields that holds the items detected until now.
1819  * @param[in] target_protocol
1820  *   The next protocol in the previous item.
1821  * @param[out] error
1822  *   Pointer to error structure.
1823  *
1824  * @return
1825  *   0 on success, a negative errno value otherwise and rte_errno is set.
1826  */
1827 int
1828 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1829                               uint64_t item_flags,
1830                               struct rte_flow_error *error)
1831 {
1832         const struct rte_flow_item_vxlan *spec = item->spec;
1833         const struct rte_flow_item_vxlan *mask = item->mask;
1834         int ret;
1835         union vni {
1836                 uint32_t vlan_id;
1837                 uint8_t vni[4];
1838         } id = { .vlan_id = 0, };
1839
1840
1841         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1844                                           "multiple tunnel layers not"
1845                                           " supported");
1846         /*
1847          * Verify only UDPv4 is present as defined in
1848          * https://tools.ietf.org/html/rfc7348
1849          */
1850         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1853                                           "no outer UDP layer found");
1854         if (!mask)
1855                 mask = &rte_flow_item_vxlan_mask;
1856         ret = mlx5_flow_item_acceptable
1857                 (item, (const uint8_t *)mask,
1858                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1859                  sizeof(struct rte_flow_item_vxlan),
1860                  error);
1861         if (ret < 0)
1862                 return ret;
1863         if (spec) {
1864                 memcpy(&id.vni[1], spec->vni, 3);
1865                 memcpy(&id.vni[1], mask->vni, 3);
1866         }
1867         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1868                 return rte_flow_error_set(error, ENOTSUP,
1869                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1870                                           "VXLAN tunnel must be fully defined");
1871         return 0;
1872 }
1873
1874 /**
1875  * Validate VXLAN_GPE item.
1876  *
1877  * @param[in] item
1878  *   Item specification.
1879  * @param[in] item_flags
1880  *   Bit-fields that holds the items detected until now.
1881  * @param[in] priv
1882  *   Pointer to the private data structure.
1883  * @param[in] target_protocol
1884  *   The next protocol in the previous item.
1885  * @param[out] error
1886  *   Pointer to error structure.
1887  *
1888  * @return
1889  *   0 on success, a negative errno value otherwise and rte_errno is set.
1890  */
1891 int
1892 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1893                                   uint64_t item_flags,
1894                                   struct rte_eth_dev *dev,
1895                                   struct rte_flow_error *error)
1896 {
1897         struct mlx5_priv *priv = dev->data->dev_private;
1898         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1899         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1900         int ret;
1901         union vni {
1902                 uint32_t vlan_id;
1903                 uint8_t vni[4];
1904         } id = { .vlan_id = 0, };
1905
1906         if (!priv->config.l3_vxlan_en)
1907                 return rte_flow_error_set(error, ENOTSUP,
1908                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1909                                           "L3 VXLAN is not enabled by device"
1910                                           " parameter and/or not configured in"
1911                                           " firmware");
1912         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1913                 return rte_flow_error_set(error, ENOTSUP,
1914                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1915                                           "multiple tunnel layers not"
1916                                           " supported");
1917         /*
1918          * Verify only UDPv4 is present as defined in
1919          * https://tools.ietf.org/html/rfc7348
1920          */
1921         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1924                                           "no outer UDP layer found");
1925         if (!mask)
1926                 mask = &rte_flow_item_vxlan_gpe_mask;
1927         ret = mlx5_flow_item_acceptable
1928                 (item, (const uint8_t *)mask,
1929                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1930                  sizeof(struct rte_flow_item_vxlan_gpe),
1931                  error);
1932         if (ret < 0)
1933                 return ret;
1934         if (spec) {
1935                 if (spec->protocol)
1936                         return rte_flow_error_set(error, ENOTSUP,
1937                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1938                                                   item,
1939                                                   "VxLAN-GPE protocol"
1940                                                   " not supported");
1941                 memcpy(&id.vni[1], spec->vni, 3);
1942                 memcpy(&id.vni[1], mask->vni, 3);
1943         }
1944         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1945                 return rte_flow_error_set(error, ENOTSUP,
1946                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1947                                           "VXLAN-GPE tunnel must be fully"
1948                                           " defined");
1949         return 0;
1950 }
1951 /**
1952  * Validate GRE Key item.
1953  *
1954  * @param[in] item
1955  *   Item specification.
1956  * @param[in] item_flags
1957  *   Bit flags to mark detected items.
1958  * @param[in] gre_item
1959  *   Pointer to gre_item
1960  * @param[out] error
1961  *   Pointer to error structure.
1962  *
1963  * @return
1964  *   0 on success, a negative errno value otherwise and rte_errno is set.
1965  */
1966 int
1967 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1968                                 uint64_t item_flags,
1969                                 const struct rte_flow_item *gre_item,
1970                                 struct rte_flow_error *error)
1971 {
1972         const rte_be32_t *mask = item->mask;
1973         int ret = 0;
1974         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1975         const struct rte_flow_item_gre *gre_spec;
1976         const struct rte_flow_item_gre *gre_mask;
1977
1978         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1981                                           "Multiple GRE key not support");
1982         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1983                 return rte_flow_error_set(error, ENOTSUP,
1984                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1985                                           "No preceding GRE header");
1986         if (item_flags & MLX5_FLOW_LAYER_INNER)
1987                 return rte_flow_error_set(error, ENOTSUP,
1988                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1989                                           "GRE key following a wrong item");
1990         gre_mask = gre_item->mask;
1991         if (!gre_mask)
1992                 gre_mask = &rte_flow_item_gre_mask;
1993         gre_spec = gre_item->spec;
1994         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1995                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "Key bit must be on");
1999
2000         if (!mask)
2001                 mask = &gre_key_default_mask;
2002         ret = mlx5_flow_item_acceptable
2003                 (item, (const uint8_t *)mask,
2004                  (const uint8_t *)&gre_key_default_mask,
2005                  sizeof(rte_be32_t), error);
2006         return ret;
2007 }
2008
2009 /**
2010  * Validate GRE item.
2011  *
2012  * @param[in] item
2013  *   Item specification.
2014  * @param[in] item_flags
2015  *   Bit flags to mark detected items.
2016  * @param[in] target_protocol
2017  *   The next protocol in the previous item.
2018  * @param[out] error
2019  *   Pointer to error structure.
2020  *
2021  * @return
2022  *   0 on success, a negative errno value otherwise and rte_errno is set.
2023  */
2024 int
2025 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2026                             uint64_t item_flags,
2027                             uint8_t target_protocol,
2028                             struct rte_flow_error *error)
2029 {
2030         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2031         const struct rte_flow_item_gre *mask = item->mask;
2032         int ret;
2033         const struct rte_flow_item_gre nic_mask = {
2034                 .c_rsvd0_ver = RTE_BE16(0xB000),
2035                 .protocol = RTE_BE16(UINT16_MAX),
2036         };
2037
2038         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2039                 return rte_flow_error_set(error, EINVAL,
2040                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2041                                           "protocol filtering not compatible"
2042                                           " with this GRE layer");
2043         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2044                 return rte_flow_error_set(error, ENOTSUP,
2045                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2046                                           "multiple tunnel layers not"
2047                                           " supported");
2048         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2049                 return rte_flow_error_set(error, ENOTSUP,
2050                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2051                                           "L3 Layer is missing");
2052         if (!mask)
2053                 mask = &rte_flow_item_gre_mask;
2054         ret = mlx5_flow_item_acceptable
2055                 (item, (const uint8_t *)mask,
2056                  (const uint8_t *)&nic_mask,
2057                  sizeof(struct rte_flow_item_gre), error);
2058         if (ret < 0)
2059                 return ret;
2060 #ifndef HAVE_MLX5DV_DR
2061 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2062         if (spec && (spec->protocol & mask->protocol))
2063                 return rte_flow_error_set(error, ENOTSUP,
2064                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                           "without MPLS support the"
2066                                           " specification cannot be used for"
2067                                           " filtering");
2068 #endif
2069 #endif
2070         return 0;
2071 }
2072
2073 /**
2074  * Validate Geneve item.
2075  *
2076  * @param[in] item
2077  *   Item specification.
2078  * @param[in] itemFlags
2079  *   Bit-fields that holds the items detected until now.
2080  * @param[in] enPriv
2081  *   Pointer to the private data structure.
2082  * @param[out] error
2083  *   Pointer to error structure.
2084  *
2085  * @return
2086  *   0 on success, a negative errno value otherwise and rte_errno is set.
2087  */
2088
2089 int
2090 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2091                                uint64_t item_flags,
2092                                struct rte_eth_dev *dev,
2093                                struct rte_flow_error *error)
2094 {
2095         struct mlx5_priv *priv = dev->data->dev_private;
2096         const struct rte_flow_item_geneve *spec = item->spec;
2097         const struct rte_flow_item_geneve *mask = item->mask;
2098         int ret;
2099         uint16_t gbhdr;
2100         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2101                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2102         const struct rte_flow_item_geneve nic_mask = {
2103                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2104                 .vni = "\xff\xff\xff",
2105                 .protocol = RTE_BE16(UINT16_MAX),
2106         };
2107
2108         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2109                 return rte_flow_error_set(error, ENOTSUP,
2110                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2111                                           "L3 Geneve is not enabled by device"
2112                                           " parameter and/or not configured in"
2113                                           " firmware");
2114         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2115                 return rte_flow_error_set(error, ENOTSUP,
2116                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2117                                           "multiple tunnel layers not"
2118                                           " supported");
2119         /*
2120          * Verify only UDPv4 is present as defined in
2121          * https://tools.ietf.org/html/rfc7348
2122          */
2123         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2124                 return rte_flow_error_set(error, EINVAL,
2125                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2126                                           "no outer UDP layer found");
2127         if (!mask)
2128                 mask = &rte_flow_item_geneve_mask;
2129         ret = mlx5_flow_item_acceptable
2130                                   (item, (const uint8_t *)mask,
2131                                    (const uint8_t *)&nic_mask,
2132                                    sizeof(struct rte_flow_item_geneve), error);
2133         if (ret)
2134                 return ret;
2135         if (spec) {
2136                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2137                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2138                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2139                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2140                         return rte_flow_error_set(error, ENOTSUP,
2141                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2142                                                   item,
2143                                                   "Geneve protocol unsupported"
2144                                                   " fields are being used");
2145                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2146                         return rte_flow_error_set
2147                                         (error, ENOTSUP,
2148                                          RTE_FLOW_ERROR_TYPE_ITEM,
2149                                          item,
2150                                          "Unsupported Geneve options length");
2151         }
2152         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2153                 return rte_flow_error_set
2154                                     (error, ENOTSUP,
2155                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2156                                      "Geneve tunnel must be fully defined");
2157         return 0;
2158 }
2159
2160 /**
2161  * Validate MPLS item.
2162  *
2163  * @param[in] dev
2164  *   Pointer to the rte_eth_dev structure.
2165  * @param[in] item
2166  *   Item specification.
2167  * @param[in] item_flags
2168  *   Bit-fields that holds the items detected until now.
2169  * @param[in] prev_layer
2170  *   The protocol layer indicated in previous item.
2171  * @param[out] error
2172  *   Pointer to error structure.
2173  *
2174  * @return
2175  *   0 on success, a negative errno value otherwise and rte_errno is set.
2176  */
2177 int
2178 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2179                              const struct rte_flow_item *item __rte_unused,
2180                              uint64_t item_flags __rte_unused,
2181                              uint64_t prev_layer __rte_unused,
2182                              struct rte_flow_error *error)
2183 {
2184 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2185         const struct rte_flow_item_mpls *mask = item->mask;
2186         struct mlx5_priv *priv = dev->data->dev_private;
2187         int ret;
2188
2189         if (!priv->config.mpls_en)
2190                 return rte_flow_error_set(error, ENOTSUP,
2191                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2192                                           "MPLS not supported or"
2193                                           " disabled in firmware"
2194                                           " configuration.");
2195         /* MPLS over IP, UDP, GRE is allowed */
2196         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2197                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2198                             MLX5_FLOW_LAYER_GRE)))
2199                 return rte_flow_error_set(error, EINVAL,
2200                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2201                                           "protocol filtering not compatible"
2202                                           " with MPLS layer");
2203         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2204         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2205             !(item_flags & MLX5_FLOW_LAYER_GRE))
2206                 return rte_flow_error_set(error, ENOTSUP,
2207                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2208                                           "multiple tunnel layers not"
2209                                           " supported");
2210         if (!mask)
2211                 mask = &rte_flow_item_mpls_mask;
2212         ret = mlx5_flow_item_acceptable
2213                 (item, (const uint8_t *)mask,
2214                  (const uint8_t *)&rte_flow_item_mpls_mask,
2215                  sizeof(struct rte_flow_item_mpls), error);
2216         if (ret < 0)
2217                 return ret;
2218         return 0;
2219 #endif
2220         return rte_flow_error_set(error, ENOTSUP,
2221                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2222                                   "MPLS is not supported by Verbs, please"
2223                                   " update.");
2224 }
2225
2226 /**
2227  * Validate NVGRE item.
2228  *
2229  * @param[in] item
2230  *   Item specification.
2231  * @param[in] item_flags
2232  *   Bit flags to mark detected items.
2233  * @param[in] target_protocol
2234  *   The next protocol in the previous item.
2235  * @param[out] error
2236  *   Pointer to error structure.
2237  *
2238  * @return
2239  *   0 on success, a negative errno value otherwise and rte_errno is set.
2240  */
2241 int
2242 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2243                               uint64_t item_flags,
2244                               uint8_t target_protocol,
2245                               struct rte_flow_error *error)
2246 {
2247         const struct rte_flow_item_nvgre *mask = item->mask;
2248         int ret;
2249
2250         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2251                 return rte_flow_error_set(error, EINVAL,
2252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2253                                           "protocol filtering not compatible"
2254                                           " with this GRE layer");
2255         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2256                 return rte_flow_error_set(error, ENOTSUP,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "multiple tunnel layers not"
2259                                           " supported");
2260         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2261                 return rte_flow_error_set(error, ENOTSUP,
2262                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2263                                           "L3 Layer is missing");
2264         if (!mask)
2265                 mask = &rte_flow_item_nvgre_mask;
2266         ret = mlx5_flow_item_acceptable
2267                 (item, (const uint8_t *)mask,
2268                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2269                  sizeof(struct rte_flow_item_nvgre), error);
2270         if (ret < 0)
2271                 return ret;
2272         return 0;
2273 }
2274
2275 /* Allocate unique ID for the split Q/RSS subflows. */
2276 static uint32_t
2277 flow_qrss_get_id(struct rte_eth_dev *dev)
2278 {
2279         struct mlx5_priv *priv = dev->data->dev_private;
2280         uint32_t qrss_id, ret;
2281
2282         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2283         if (ret)
2284                 return 0;
2285         MLX5_ASSERT(qrss_id);
2286         return qrss_id;
2287 }
2288
2289 /* Free unique ID for the split Q/RSS subflows. */
2290 static void
2291 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2292 {
2293         struct mlx5_priv *priv = dev->data->dev_private;
2294
2295         if (qrss_id)
2296                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2297 }
2298
2299 /**
2300  * Release resource related QUEUE/RSS action split.
2301  *
2302  * @param dev
2303  *   Pointer to Ethernet device.
2304  * @param flow
2305  *   Flow to release id's from.
2306  */
2307 static void
2308 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2309                              struct rte_flow *flow)
2310 {
2311         struct mlx5_flow *dev_flow;
2312
2313         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2314                 if (dev_flow->qrss_id)
2315                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2316 }
2317
2318 static int
2319 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2320                    const struct rte_flow_attr *attr __rte_unused,
2321                    const struct rte_flow_item items[] __rte_unused,
2322                    const struct rte_flow_action actions[] __rte_unused,
2323                    bool external __rte_unused,
2324                    struct rte_flow_error *error)
2325 {
2326         return rte_flow_error_set(error, ENOTSUP,
2327                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2328 }
2329
2330 static struct mlx5_flow *
2331 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2332                   const struct rte_flow_item items[] __rte_unused,
2333                   const struct rte_flow_action actions[] __rte_unused,
2334                   struct rte_flow_error *error)
2335 {
2336         rte_flow_error_set(error, ENOTSUP,
2337                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2338         return NULL;
2339 }
2340
2341 static int
2342 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2343                     struct mlx5_flow *dev_flow __rte_unused,
2344                     const struct rte_flow_attr *attr __rte_unused,
2345                     const struct rte_flow_item items[] __rte_unused,
2346                     const struct rte_flow_action actions[] __rte_unused,
2347                     struct rte_flow_error *error)
2348 {
2349         return rte_flow_error_set(error, ENOTSUP,
2350                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2351 }
2352
2353 static int
2354 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2355                 struct rte_flow *flow __rte_unused,
2356                 struct rte_flow_error *error)
2357 {
2358         return rte_flow_error_set(error, ENOTSUP,
2359                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2360 }
2361
2362 static void
2363 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2364                  struct rte_flow *flow __rte_unused)
2365 {
2366 }
2367
2368 static void
2369 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2370                   struct rte_flow *flow __rte_unused)
2371 {
2372 }
2373
2374 static int
2375 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2376                 struct rte_flow *flow __rte_unused,
2377                 const struct rte_flow_action *actions __rte_unused,
2378                 void *data __rte_unused,
2379                 struct rte_flow_error *error)
2380 {
2381         return rte_flow_error_set(error, ENOTSUP,
2382                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2383 }
2384
2385 /* Void driver to protect from null pointer reference. */
2386 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2387         .validate = flow_null_validate,
2388         .prepare = flow_null_prepare,
2389         .translate = flow_null_translate,
2390         .apply = flow_null_apply,
2391         .remove = flow_null_remove,
2392         .destroy = flow_null_destroy,
2393         .query = flow_null_query,
2394 };
2395
2396 /**
2397  * Select flow driver type according to flow attributes and device
2398  * configuration.
2399  *
2400  * @param[in] dev
2401  *   Pointer to the dev structure.
2402  * @param[in] attr
2403  *   Pointer to the flow attributes.
2404  *
2405  * @return
2406  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2407  */
2408 static enum mlx5_flow_drv_type
2409 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2410 {
2411         struct mlx5_priv *priv = dev->data->dev_private;
2412         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2413
2414         if (attr->transfer && priv->config.dv_esw_en)
2415                 type = MLX5_FLOW_TYPE_DV;
2416         if (!attr->transfer)
2417                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2418                                                  MLX5_FLOW_TYPE_VERBS;
2419         return type;
2420 }
2421
2422 #define flow_get_drv_ops(type) flow_drv_ops[type]
2423
2424 /**
2425  * Flow driver validation API. This abstracts calling driver specific functions.
2426  * The type of flow driver is determined according to flow attributes.
2427  *
2428  * @param[in] dev
2429  *   Pointer to the dev structure.
2430  * @param[in] attr
2431  *   Pointer to the flow attributes.
2432  * @param[in] items
2433  *   Pointer to the list of items.
2434  * @param[in] actions
2435  *   Pointer to the list of actions.
2436  * @param[in] external
2437  *   This flow rule is created by request external to PMD.
2438  * @param[out] error
2439  *   Pointer to the error structure.
2440  *
2441  * @return
2442  *   0 on success, a negative errno value otherwise and rte_errno is set.
2443  */
2444 static inline int
2445 flow_drv_validate(struct rte_eth_dev *dev,
2446                   const struct rte_flow_attr *attr,
2447                   const struct rte_flow_item items[],
2448                   const struct rte_flow_action actions[],
2449                   bool external, struct rte_flow_error *error)
2450 {
2451         const struct mlx5_flow_driver_ops *fops;
2452         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2453
2454         fops = flow_get_drv_ops(type);
2455         return fops->validate(dev, attr, items, actions, external, error);
2456 }
2457
2458 /**
2459  * Flow driver preparation API. This abstracts calling driver specific
2460  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2461  * calculates the size of memory required for device flow, allocates the memory,
2462  * initializes the device flow and returns the pointer.
2463  *
2464  * @note
2465  *   This function initializes device flow structure such as dv or verbs in
2466  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2467  *   rest. For example, adding returning device flow to flow->dev_flow list and
2468  *   setting backward reference to the flow should be done out of this function.
2469  *   layers field is not filled either.
2470  *
2471  * @param[in] attr
2472  *   Pointer to the flow attributes.
2473  * @param[in] items
2474  *   Pointer to the list of items.
2475  * @param[in] actions
2476  *   Pointer to the list of actions.
2477  * @param[out] error
2478  *   Pointer to the error structure.
2479  *
2480  * @return
2481  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2482  */
2483 static inline struct mlx5_flow *
2484 flow_drv_prepare(const struct rte_flow *flow,
2485                  const struct rte_flow_attr *attr,
2486                  const struct rte_flow_item items[],
2487                  const struct rte_flow_action actions[],
2488                  struct rte_flow_error *error)
2489 {
2490         const struct mlx5_flow_driver_ops *fops;
2491         enum mlx5_flow_drv_type type = flow->drv_type;
2492
2493         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2494         fops = flow_get_drv_ops(type);
2495         return fops->prepare(attr, items, actions, error);
2496 }
2497
2498 /**
2499  * Flow driver translation API. This abstracts calling driver specific
2500  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2501  * translates a generic flow into a driver flow. flow_drv_prepare() must
2502  * precede.
2503  *
2504  * @note
2505  *   dev_flow->layers could be filled as a result of parsing during translation
2506  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2507  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2508  *   flow->actions could be overwritten even though all the expanded dev_flows
2509  *   have the same actions.
2510  *
2511  * @param[in] dev
2512  *   Pointer to the rte dev structure.
2513  * @param[in, out] dev_flow
2514  *   Pointer to the mlx5 flow.
2515  * @param[in] attr
2516  *   Pointer to the flow attributes.
2517  * @param[in] items
2518  *   Pointer to the list of items.
2519  * @param[in] actions
2520  *   Pointer to the list of actions.
2521  * @param[out] error
2522  *   Pointer to the error structure.
2523  *
2524  * @return
2525  *   0 on success, a negative errno value otherwise and rte_errno is set.
2526  */
2527 static inline int
2528 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2529                    const struct rte_flow_attr *attr,
2530                    const struct rte_flow_item items[],
2531                    const struct rte_flow_action actions[],
2532                    struct rte_flow_error *error)
2533 {
2534         const struct mlx5_flow_driver_ops *fops;
2535         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2536
2537         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2538         fops = flow_get_drv_ops(type);
2539         return fops->translate(dev, dev_flow, attr, items, actions, error);
2540 }
2541
2542 /**
2543  * Flow driver apply API. This abstracts calling driver specific functions.
2544  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2545  * translated driver flows on to device. flow_drv_translate() must precede.
2546  *
2547  * @param[in] dev
2548  *   Pointer to Ethernet device structure.
2549  * @param[in, out] flow
2550  *   Pointer to flow structure.
2551  * @param[out] error
2552  *   Pointer to error structure.
2553  *
2554  * @return
2555  *   0 on success, a negative errno value otherwise and rte_errno is set.
2556  */
2557 static inline int
2558 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2559                struct rte_flow_error *error)
2560 {
2561         const struct mlx5_flow_driver_ops *fops;
2562         enum mlx5_flow_drv_type type = flow->drv_type;
2563
2564         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2565         fops = flow_get_drv_ops(type);
2566         return fops->apply(dev, flow, error);
2567 }
2568
2569 /**
2570  * Flow driver remove API. This abstracts calling driver specific functions.
2571  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2572  * on device. All the resources of the flow should be freed by calling
2573  * flow_drv_destroy().
2574  *
2575  * @param[in] dev
2576  *   Pointer to Ethernet device.
2577  * @param[in, out] flow
2578  *   Pointer to flow structure.
2579  */
2580 static inline void
2581 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2582 {
2583         const struct mlx5_flow_driver_ops *fops;
2584         enum mlx5_flow_drv_type type = flow->drv_type;
2585
2586         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2587         fops = flow_get_drv_ops(type);
2588         fops->remove(dev, flow);
2589 }
2590
2591 /**
2592  * Flow driver destroy API. This abstracts calling driver specific functions.
2593  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2594  * on device and releases resources of the flow.
2595  *
2596  * @param[in] dev
2597  *   Pointer to Ethernet device.
2598  * @param[in, out] flow
2599  *   Pointer to flow structure.
2600  */
2601 static inline void
2602 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2603 {
2604         const struct mlx5_flow_driver_ops *fops;
2605         enum mlx5_flow_drv_type type = flow->drv_type;
2606
2607         flow_mreg_split_qrss_release(dev, flow);
2608         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2609         fops = flow_get_drv_ops(type);
2610         fops->destroy(dev, flow);
2611 }
2612
2613 /**
2614  * Validate a flow supported by the NIC.
2615  *
2616  * @see rte_flow_validate()
2617  * @see rte_flow_ops
2618  */
2619 int
2620 mlx5_flow_validate(struct rte_eth_dev *dev,
2621                    const struct rte_flow_attr *attr,
2622                    const struct rte_flow_item items[],
2623                    const struct rte_flow_action actions[],
2624                    struct rte_flow_error *error)
2625 {
2626         int ret;
2627
2628         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2629         if (ret < 0)
2630                 return ret;
2631         return 0;
2632 }
2633
2634 /**
2635  * Get RSS action from the action list.
2636  *
2637  * @param[in] actions
2638  *   Pointer to the list of actions.
2639  *
2640  * @return
2641  *   Pointer to the RSS action if exist, else return NULL.
2642  */
2643 static const struct rte_flow_action_rss*
2644 flow_get_rss_action(const struct rte_flow_action actions[])
2645 {
2646         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2647                 switch (actions->type) {
2648                 case RTE_FLOW_ACTION_TYPE_RSS:
2649                         return (const struct rte_flow_action_rss *)
2650                                actions->conf;
2651                 default:
2652                         break;
2653                 }
2654         }
2655         return NULL;
2656 }
2657
2658 static unsigned int
2659 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2660 {
2661         const struct rte_flow_item *item;
2662         unsigned int has_vlan = 0;
2663
2664         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2665                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2666                         has_vlan = 1;
2667                         break;
2668                 }
2669         }
2670         if (has_vlan)
2671                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2672                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2673         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2674                                MLX5_EXPANSION_ROOT_OUTER;
2675 }
2676
2677 /**
2678  *  Get layer flags from the prefix flow.
2679  *
2680  *  Some flows may be split to several subflows, the prefix subflow gets the
2681  *  match items and the suffix sub flow gets the actions.
2682  *  Some actions need the user defined match item flags to get the detail for
2683  *  the action.
2684  *  This function helps the suffix flow to get the item layer flags from prefix
2685  *  subflow.
2686  *
2687  * @param[in] dev_flow
2688  *   Pointer the created preifx subflow.
2689  *
2690  * @return
2691  *   The layers get from prefix subflow.
2692  */
2693 static inline uint64_t
2694 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
2695 {
2696         uint64_t layers = 0;
2697
2698         /* If no decap actions, use the layers directly. */
2699         if (!(dev_flow->actions & MLX5_FLOW_ACTION_DECAP))
2700                 return dev_flow->layers;
2701         /* Convert L3 layers with decap action. */
2702         if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
2703                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2704         else if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
2705                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2706         /* Convert L4 layers with decap action.  */
2707         if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
2708                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
2709         else if (dev_flow->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
2710                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
2711         return layers;
2712 }
2713
2714 /**
2715  * Get metadata split action information.
2716  *
2717  * @param[in] actions
2718  *   Pointer to the list of actions.
2719  * @param[out] qrss
2720  *   Pointer to the return pointer.
2721  * @param[out] qrss_type
2722  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2723  *   if no QUEUE/RSS is found.
2724  * @param[out] encap_idx
2725  *   Pointer to the index of the encap action if exists, otherwise the last
2726  *   action index.
2727  *
2728  * @return
2729  *   Total number of actions.
2730  */
2731 static int
2732 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
2733                                        const struct rte_flow_action **qrss,
2734                                        int *encap_idx)
2735 {
2736         const struct rte_flow_action_raw_encap *raw_encap;
2737         int actions_n = 0;
2738         int raw_decap_idx = -1;
2739
2740         *encap_idx = -1;
2741         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2742                 switch (actions->type) {
2743                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2744                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2745                         *encap_idx = actions_n;
2746                         break;
2747                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2748                         raw_decap_idx = actions_n;
2749                         break;
2750                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2751                         raw_encap = actions->conf;
2752                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2753                                 *encap_idx = raw_decap_idx != -1 ?
2754                                                       raw_decap_idx : actions_n;
2755                         break;
2756                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2757                 case RTE_FLOW_ACTION_TYPE_RSS:
2758                         *qrss = actions;
2759                         break;
2760                 default:
2761                         break;
2762                 }
2763                 actions_n++;
2764         }
2765         if (*encap_idx == -1)
2766                 *encap_idx = actions_n;
2767         /* Count RTE_FLOW_ACTION_TYPE_END. */
2768         return actions_n + 1;
2769 }
2770
2771 /**
2772  * Check meter action from the action list.
2773  *
2774  * @param[in] actions
2775  *   Pointer to the list of actions.
2776  * @param[out] mtr
2777  *   Pointer to the meter exist flag.
2778  *
2779  * @return
2780  *   Total number of actions.
2781  */
2782 static int
2783 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2784 {
2785         int actions_n = 0;
2786
2787         MLX5_ASSERT(mtr);
2788         *mtr = 0;
2789         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2790                 switch (actions->type) {
2791                 case RTE_FLOW_ACTION_TYPE_METER:
2792                         *mtr = 1;
2793                         break;
2794                 default:
2795                         break;
2796                 }
2797                 actions_n++;
2798         }
2799         /* Count RTE_FLOW_ACTION_TYPE_END. */
2800         return actions_n + 1;
2801 }
2802
2803 /**
2804  * Check if the flow should be splited due to hairpin.
2805  * The reason for the split is that in current HW we can't
2806  * support encap on Rx, so if a flow have encap we move it
2807  * to Tx.
2808  *
2809  * @param dev
2810  *   Pointer to Ethernet device.
2811  * @param[in] attr
2812  *   Flow rule attributes.
2813  * @param[in] actions
2814  *   Associated actions (list terminated by the END action).
2815  *
2816  * @return
2817  *   > 0 the number of actions and the flow should be split,
2818  *   0 when no split required.
2819  */
2820 static int
2821 flow_check_hairpin_split(struct rte_eth_dev *dev,
2822                          const struct rte_flow_attr *attr,
2823                          const struct rte_flow_action actions[])
2824 {
2825         int queue_action = 0;
2826         int action_n = 0;
2827         int encap = 0;
2828         const struct rte_flow_action_queue *queue;
2829         const struct rte_flow_action_rss *rss;
2830         const struct rte_flow_action_raw_encap *raw_encap;
2831
2832         if (!attr->ingress)
2833                 return 0;
2834         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2835                 switch (actions->type) {
2836                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2837                         queue = actions->conf;
2838                         if (queue == NULL)
2839                                 return 0;
2840                         if (mlx5_rxq_get_type(dev, queue->index) !=
2841                             MLX5_RXQ_TYPE_HAIRPIN)
2842                                 return 0;
2843                         queue_action = 1;
2844                         action_n++;
2845                         break;
2846                 case RTE_FLOW_ACTION_TYPE_RSS:
2847                         rss = actions->conf;
2848                         if (rss == NULL || rss->queue_num == 0)
2849                                 return 0;
2850                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2851                             MLX5_RXQ_TYPE_HAIRPIN)
2852                                 return 0;
2853                         queue_action = 1;
2854                         action_n++;
2855                         break;
2856                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2857                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2858                         encap = 1;
2859                         action_n++;
2860                         break;
2861                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2862                         raw_encap = actions->conf;
2863                         if (raw_encap->size >
2864                             (sizeof(struct rte_flow_item_eth) +
2865                              sizeof(struct rte_flow_item_ipv4)))
2866                                 encap = 1;
2867                         action_n++;
2868                         break;
2869                 default:
2870                         action_n++;
2871                         break;
2872                 }
2873         }
2874         if (encap == 1 && queue_action)
2875                 return action_n;
2876         return 0;
2877 }
2878
2879 /* Declare flow create/destroy prototype in advance. */
2880 static struct rte_flow *
2881 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2882                  const struct rte_flow_attr *attr,
2883                  const struct rte_flow_item items[],
2884                  const struct rte_flow_action actions[],
2885                  bool external, struct rte_flow_error *error);
2886
2887 static void
2888 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2889                   struct rte_flow *flow);
2890
2891 /**
2892  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2893  *
2894  * As mark_id is unique, if there's already a registered flow for the mark_id,
2895  * return by increasing the reference counter of the resource. Otherwise, create
2896  * the resource (mcp_res) and flow.
2897  *
2898  * Flow looks like,
2899  *   - If ingress port is ANY and reg_c[1] is mark_id,
2900  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2901  *
2902  * For default flow (zero mark_id), flow is like,
2903  *   - If ingress port is ANY,
2904  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2905  *
2906  * @param dev
2907  *   Pointer to Ethernet device.
2908  * @param mark_id
2909  *   ID of MARK action, zero means default flow for META.
2910  * @param[out] error
2911  *   Perform verbose error reporting if not NULL.
2912  *
2913  * @return
2914  *   Associated resource on success, NULL otherwise and rte_errno is set.
2915  */
2916 static struct mlx5_flow_mreg_copy_resource *
2917 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2918                           struct rte_flow_error *error)
2919 {
2920         struct mlx5_priv *priv = dev->data->dev_private;
2921         struct rte_flow_attr attr = {
2922                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2923                 .ingress = 1,
2924         };
2925         struct mlx5_rte_flow_item_tag tag_spec = {
2926                 .data = mark_id,
2927         };
2928         struct rte_flow_item items[] = {
2929                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2930         };
2931         struct rte_flow_action_mark ftag = {
2932                 .id = mark_id,
2933         };
2934         struct mlx5_flow_action_copy_mreg cp_mreg = {
2935                 .dst = REG_B,
2936                 .src = 0,
2937         };
2938         struct rte_flow_action_jump jump = {
2939                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2940         };
2941         struct rte_flow_action actions[] = {
2942                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2943         };
2944         struct mlx5_flow_mreg_copy_resource *mcp_res;
2945         int ret;
2946
2947         /* Fill the register fileds in the flow. */
2948         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2949         if (ret < 0)
2950                 return NULL;
2951         tag_spec.id = ret;
2952         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2953         if (ret < 0)
2954                 return NULL;
2955         cp_mreg.src = ret;
2956         /* Check if already registered. */
2957         MLX5_ASSERT(priv->mreg_cp_tbl);
2958         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2959         if (mcp_res) {
2960                 /* For non-default rule. */
2961                 if (mark_id != MLX5_DEFAULT_COPY_ID)
2962                         mcp_res->refcnt++;
2963                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
2964                             mcp_res->refcnt == 1);
2965                 return mcp_res;
2966         }
2967         /* Provide the full width of FLAG specific value. */
2968         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2969                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2970         /* Build a new flow. */
2971         if (mark_id != MLX5_DEFAULT_COPY_ID) {
2972                 items[0] = (struct rte_flow_item){
2973                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2974                         .spec = &tag_spec,
2975                 };
2976                 items[1] = (struct rte_flow_item){
2977                         .type = RTE_FLOW_ITEM_TYPE_END,
2978                 };
2979                 actions[0] = (struct rte_flow_action){
2980                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2981                         .conf = &ftag,
2982                 };
2983                 actions[1] = (struct rte_flow_action){
2984                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2985                         .conf = &cp_mreg,
2986                 };
2987                 actions[2] = (struct rte_flow_action){
2988                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2989                         .conf = &jump,
2990                 };
2991                 actions[3] = (struct rte_flow_action){
2992                         .type = RTE_FLOW_ACTION_TYPE_END,
2993                 };
2994         } else {
2995                 /* Default rule, wildcard match. */
2996                 attr.priority = MLX5_FLOW_PRIO_RSVD;
2997                 items[0] = (struct rte_flow_item){
2998                         .type = RTE_FLOW_ITEM_TYPE_END,
2999                 };
3000                 actions[0] = (struct rte_flow_action){
3001                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3002                         .conf = &cp_mreg,
3003                 };
3004                 actions[1] = (struct rte_flow_action){
3005                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3006                         .conf = &jump,
3007                 };
3008                 actions[2] = (struct rte_flow_action){
3009                         .type = RTE_FLOW_ACTION_TYPE_END,
3010                 };
3011         }
3012         /* Build a new entry. */
3013         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3014         if (!mcp_res) {
3015                 rte_errno = ENOMEM;
3016                 return NULL;
3017         }
3018         /*
3019          * The copy Flows are not included in any list. There
3020          * ones are referenced from other Flows and can not
3021          * be applied, removed, deleted in ardbitrary order
3022          * by list traversing.
3023          */
3024         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3025                                          actions, false, error);
3026         if (!mcp_res->flow)
3027                 goto error;
3028         mcp_res->refcnt++;
3029         mcp_res->hlist_ent.key = mark_id;
3030         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3031                                 &mcp_res->hlist_ent);
3032         MLX5_ASSERT(!ret);
3033         if (ret)
3034                 goto error;
3035         return mcp_res;
3036 error:
3037         if (mcp_res->flow)
3038                 flow_list_destroy(dev, NULL, mcp_res->flow);
3039         rte_free(mcp_res);
3040         return NULL;
3041 }
3042
3043 /**
3044  * Release flow in RX_CP_TBL.
3045  *
3046  * @param dev
3047  *   Pointer to Ethernet device.
3048  * @flow
3049  *   Parent flow for wich copying is provided.
3050  */
3051 static void
3052 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3053                           struct rte_flow *flow)
3054 {
3055         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3056         struct mlx5_priv *priv = dev->data->dev_private;
3057
3058         if (!mcp_res || !priv->mreg_cp_tbl)
3059                 return;
3060         if (flow->copy_applied) {
3061                 MLX5_ASSERT(mcp_res->appcnt);
3062                 flow->copy_applied = 0;
3063                 --mcp_res->appcnt;
3064                 if (!mcp_res->appcnt)
3065                         flow_drv_remove(dev, mcp_res->flow);
3066         }
3067         /*
3068          * We do not check availability of metadata registers here,
3069          * because copy resources are not allocated in this case.
3070          */
3071         if (--mcp_res->refcnt)
3072                 return;
3073         MLX5_ASSERT(mcp_res->flow);
3074         flow_list_destroy(dev, NULL, mcp_res->flow);
3075         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3076         rte_free(mcp_res);
3077         flow->mreg_copy = NULL;
3078 }
3079
3080 /**
3081  * Start flow in RX_CP_TBL.
3082  *
3083  * @param dev
3084  *   Pointer to Ethernet device.
3085  * @flow
3086  *   Parent flow for wich copying is provided.
3087  *
3088  * @return
3089  *   0 on success, a negative errno value otherwise and rte_errno is set.
3090  */
3091 static int
3092 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3093                             struct rte_flow *flow)
3094 {
3095         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3096         int ret;
3097
3098         if (!mcp_res || flow->copy_applied)
3099                 return 0;
3100         if (!mcp_res->appcnt) {
3101                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3102                 if (ret)
3103                         return ret;
3104         }
3105         ++mcp_res->appcnt;
3106         flow->copy_applied = 1;
3107         return 0;
3108 }
3109
3110 /**
3111  * Stop flow in RX_CP_TBL.
3112  *
3113  * @param dev
3114  *   Pointer to Ethernet device.
3115  * @flow
3116  *   Parent flow for wich copying is provided.
3117  */
3118 static void
3119 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3120                            struct rte_flow *flow)
3121 {
3122         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3123
3124         if (!mcp_res || !flow->copy_applied)
3125                 return;
3126         MLX5_ASSERT(mcp_res->appcnt);
3127         --mcp_res->appcnt;
3128         flow->copy_applied = 0;
3129         if (!mcp_res->appcnt)
3130                 flow_drv_remove(dev, mcp_res->flow);
3131 }
3132
3133 /**
3134  * Remove the default copy action from RX_CP_TBL.
3135  *
3136  * @param dev
3137  *   Pointer to Ethernet device.
3138  */
3139 static void
3140 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3141 {
3142         struct mlx5_flow_mreg_copy_resource *mcp_res;
3143         struct mlx5_priv *priv = dev->data->dev_private;
3144
3145         /* Check if default flow is registered. */
3146         if (!priv->mreg_cp_tbl)
3147                 return;
3148         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3149                                             MLX5_DEFAULT_COPY_ID);
3150         if (!mcp_res)
3151                 return;
3152         MLX5_ASSERT(mcp_res->flow);
3153         flow_list_destroy(dev, NULL, mcp_res->flow);
3154         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3155         rte_free(mcp_res);
3156 }
3157
3158 /**
3159  * Add the default copy action in in RX_CP_TBL.
3160  *
3161  * @param dev
3162  *   Pointer to Ethernet device.
3163  * @param[out] error
3164  *   Perform verbose error reporting if not NULL.
3165  *
3166  * @return
3167  *   0 for success, negative value otherwise and rte_errno is set.
3168  */
3169 static int
3170 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3171                                   struct rte_flow_error *error)
3172 {
3173         struct mlx5_priv *priv = dev->data->dev_private;
3174         struct mlx5_flow_mreg_copy_resource *mcp_res;
3175
3176         /* Check whether extensive metadata feature is engaged. */
3177         if (!priv->config.dv_flow_en ||
3178             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3179             !mlx5_flow_ext_mreg_supported(dev) ||
3180             !priv->sh->dv_regc0_mask)
3181                 return 0;
3182         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3183         if (!mcp_res)
3184                 return -rte_errno;
3185         return 0;
3186 }
3187
3188 /**
3189  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3190  *
3191  * All the flow having Q/RSS action should be split by
3192  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3193  * performs the following,
3194  *   - CQE->flow_tag := reg_c[1] (MARK)
3195  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3196  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3197  * but there should be a flow per each MARK ID set by MARK action.
3198  *
3199  * For the aforementioned reason, if there's a MARK action in flow's action
3200  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3201  * the MARK ID to CQE's flow_tag like,
3202  *   - If reg_c[1] is mark_id,
3203  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3204  *
3205  * For SET_META action which stores value in reg_c[0], as the destination is
3206  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3207  * MARK ID means the default flow. The default flow looks like,
3208  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3209  *
3210  * @param dev
3211  *   Pointer to Ethernet device.
3212  * @param flow
3213  *   Pointer to flow structure.
3214  * @param[in] actions
3215  *   Pointer to the list of actions.
3216  * @param[out] error
3217  *   Perform verbose error reporting if not NULL.
3218  *
3219  * @return
3220  *   0 on success, negative value otherwise and rte_errno is set.
3221  */
3222 static int
3223 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3224                             struct rte_flow *flow,
3225                             const struct rte_flow_action *actions,
3226                             struct rte_flow_error *error)
3227 {
3228         struct mlx5_priv *priv = dev->data->dev_private;
3229         struct mlx5_dev_config *config = &priv->config;
3230         struct mlx5_flow_mreg_copy_resource *mcp_res;
3231         const struct rte_flow_action_mark *mark;
3232
3233         /* Check whether extensive metadata feature is engaged. */
3234         if (!config->dv_flow_en ||
3235             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3236             !mlx5_flow_ext_mreg_supported(dev) ||
3237             !priv->sh->dv_regc0_mask)
3238                 return 0;
3239         /* Find MARK action. */
3240         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3241                 switch (actions->type) {
3242                 case RTE_FLOW_ACTION_TYPE_FLAG:
3243                         mcp_res = flow_mreg_add_copy_action
3244                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3245                         if (!mcp_res)
3246                                 return -rte_errno;
3247                         flow->mreg_copy = mcp_res;
3248                         if (dev->data->dev_started) {
3249                                 mcp_res->appcnt++;
3250                                 flow->copy_applied = 1;
3251                         }
3252                         return 0;
3253                 case RTE_FLOW_ACTION_TYPE_MARK:
3254                         mark = (const struct rte_flow_action_mark *)
3255                                 actions->conf;
3256                         mcp_res =
3257                                 flow_mreg_add_copy_action(dev, mark->id, error);
3258                         if (!mcp_res)
3259                                 return -rte_errno;
3260                         flow->mreg_copy = mcp_res;
3261                         if (dev->data->dev_started) {
3262                                 mcp_res->appcnt++;
3263                                 flow->copy_applied = 1;
3264                         }
3265                         return 0;
3266                 default:
3267                         break;
3268                 }
3269         }
3270         return 0;
3271 }
3272
3273 #define MLX5_MAX_SPLIT_ACTIONS 24
3274 #define MLX5_MAX_SPLIT_ITEMS 24
3275
3276 /**
3277  * Split the hairpin flow.
3278  * Since HW can't support encap on Rx we move the encap to Tx.
3279  * If the count action is after the encap then we also
3280  * move the count action. in this case the count will also measure
3281  * the outer bytes.
3282  *
3283  * @param dev
3284  *   Pointer to Ethernet device.
3285  * @param[in] actions
3286  *   Associated actions (list terminated by the END action).
3287  * @param[out] actions_rx
3288  *   Rx flow actions.
3289  * @param[out] actions_tx
3290  *   Tx flow actions..
3291  * @param[out] pattern_tx
3292  *   The pattern items for the Tx flow.
3293  * @param[out] flow_id
3294  *   The flow ID connected to this flow.
3295  *
3296  * @return
3297  *   0 on success.
3298  */
3299 static int
3300 flow_hairpin_split(struct rte_eth_dev *dev,
3301                    const struct rte_flow_action actions[],
3302                    struct rte_flow_action actions_rx[],
3303                    struct rte_flow_action actions_tx[],
3304                    struct rte_flow_item pattern_tx[],
3305                    uint32_t *flow_id)
3306 {
3307         struct mlx5_priv *priv = dev->data->dev_private;
3308         const struct rte_flow_action_raw_encap *raw_encap;
3309         const struct rte_flow_action_raw_decap *raw_decap;
3310         struct mlx5_rte_flow_action_set_tag *set_tag;
3311         struct rte_flow_action *tag_action;
3312         struct mlx5_rte_flow_item_tag *tag_item;
3313         struct rte_flow_item *item;
3314         char *addr;
3315         int encap = 0;
3316
3317         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3318         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3319                 switch (actions->type) {
3320                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3321                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3322                         rte_memcpy(actions_tx, actions,
3323                                sizeof(struct rte_flow_action));
3324                         actions_tx++;
3325                         break;
3326                 case RTE_FLOW_ACTION_TYPE_COUNT:
3327                         if (encap) {
3328                                 rte_memcpy(actions_tx, actions,
3329                                            sizeof(struct rte_flow_action));
3330                                 actions_tx++;
3331                         } else {
3332                                 rte_memcpy(actions_rx, actions,
3333                                            sizeof(struct rte_flow_action));
3334                                 actions_rx++;
3335                         }
3336                         break;
3337                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3338                         raw_encap = actions->conf;
3339                         if (raw_encap->size >
3340                             (sizeof(struct rte_flow_item_eth) +
3341                              sizeof(struct rte_flow_item_ipv4))) {
3342                                 memcpy(actions_tx, actions,
3343                                        sizeof(struct rte_flow_action));
3344                                 actions_tx++;
3345                                 encap = 1;
3346                         } else {
3347                                 rte_memcpy(actions_rx, actions,
3348                                            sizeof(struct rte_flow_action));
3349                                 actions_rx++;
3350                         }
3351                         break;
3352                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3353                         raw_decap = actions->conf;
3354                         if (raw_decap->size <
3355                             (sizeof(struct rte_flow_item_eth) +
3356                              sizeof(struct rte_flow_item_ipv4))) {
3357                                 memcpy(actions_tx, actions,
3358                                        sizeof(struct rte_flow_action));
3359                                 actions_tx++;
3360                         } else {
3361                                 rte_memcpy(actions_rx, actions,
3362                                            sizeof(struct rte_flow_action));
3363                                 actions_rx++;
3364                         }
3365                         break;
3366                 default:
3367                         rte_memcpy(actions_rx, actions,
3368                                    sizeof(struct rte_flow_action));
3369                         actions_rx++;
3370                         break;
3371                 }
3372         }
3373         /* Add set meta action and end action for the Rx flow. */
3374         tag_action = actions_rx;
3375         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3376         actions_rx++;
3377         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3378         actions_rx++;
3379         set_tag = (void *)actions_rx;
3380         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3381         MLX5_ASSERT(set_tag->id > REG_NONE);
3382         set_tag->data = *flow_id;
3383         tag_action->conf = set_tag;
3384         /* Create Tx item list. */
3385         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3386         addr = (void *)&pattern_tx[2];
3387         item = pattern_tx;
3388         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3389         tag_item = (void *)addr;
3390         tag_item->data = *flow_id;
3391         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3392         MLX5_ASSERT(set_tag->id > REG_NONE);
3393         item->spec = tag_item;
3394         addr += sizeof(struct mlx5_rte_flow_item_tag);
3395         tag_item = (void *)addr;
3396         tag_item->data = UINT32_MAX;
3397         tag_item->id = UINT16_MAX;
3398         item->mask = tag_item;
3399         addr += sizeof(struct mlx5_rte_flow_item_tag);
3400         item->last = NULL;
3401         item++;
3402         item->type = RTE_FLOW_ITEM_TYPE_END;
3403         return 0;
3404 }
3405
3406 /**
3407  * The last stage of splitting chain, just creates the subflow
3408  * without any modification.
3409  *
3410  * @param dev
3411  *   Pointer to Ethernet device.
3412  * @param[in] flow
3413  *   Parent flow structure pointer.
3414  * @param[in, out] sub_flow
3415  *   Pointer to return the created subflow, may be NULL.
3416  * @param[in] prefix_layers
3417  *   Prefix subflow layers, may be 0.
3418  * @param[in] attr
3419  *   Flow rule attributes.
3420  * @param[in] items
3421  *   Pattern specification (list terminated by the END pattern item).
3422  * @param[in] actions
3423  *   Associated actions (list terminated by the END action).
3424  * @param[in] external
3425  *   This flow rule is created by request external to PMD.
3426  * @param[out] error
3427  *   Perform verbose error reporting if not NULL.
3428  * @return
3429  *   0 on success, negative value otherwise
3430  */
3431 static int
3432 flow_create_split_inner(struct rte_eth_dev *dev,
3433                         struct rte_flow *flow,
3434                         struct mlx5_flow **sub_flow,
3435                         uint64_t prefix_layers,
3436                         const struct rte_flow_attr *attr,
3437                         const struct rte_flow_item items[],
3438                         const struct rte_flow_action actions[],
3439                         bool external, struct rte_flow_error *error)
3440 {
3441         struct mlx5_flow *dev_flow;
3442
3443         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3444         if (!dev_flow)
3445                 return -rte_errno;
3446         dev_flow->flow = flow;
3447         dev_flow->external = external;
3448         /* Subflow object was created, we must include one in the list. */
3449         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3450         /*
3451          * If dev_flow is as one of the suffix flow, some actions in suffix
3452          * flow may need some user defined item layer flags.
3453          */
3454         if (prefix_layers)
3455                 dev_flow->layers = prefix_layers;
3456         if (sub_flow)
3457                 *sub_flow = dev_flow;
3458         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3459 }
3460
3461 /**
3462  * Split the meter flow.
3463  *
3464  * As meter flow will split to three sub flow, other than meter
3465  * action, the other actions make sense to only meter accepts
3466  * the packet. If it need to be dropped, no other additional
3467  * actions should be take.
3468  *
3469  * One kind of special action which decapsulates the L3 tunnel
3470  * header will be in the prefix sub flow, as not to take the
3471  * L3 tunnel header into account.
3472  *
3473  * @param dev
3474  *   Pointer to Ethernet device.
3475  * @param[in] items
3476  *   Pattern specification (list terminated by the END pattern item).
3477  * @param[out] sfx_items
3478  *   Suffix flow match items (list terminated by the END pattern item).
3479  * @param[in] actions
3480  *   Associated actions (list terminated by the END action).
3481  * @param[out] actions_sfx
3482  *   Suffix flow actions.
3483  * @param[out] actions_pre
3484  *   Prefix flow actions.
3485  * @param[out] pattern_sfx
3486  *   The pattern items for the suffix flow.
3487  * @param[out] tag_sfx
3488  *   Pointer to suffix flow tag.
3489  *
3490  * @return
3491  *   0 on success.
3492  */
3493 static int
3494 flow_meter_split_prep(struct rte_eth_dev *dev,
3495                  const struct rte_flow_item items[],
3496                  struct rte_flow_item sfx_items[],
3497                  const struct rte_flow_action actions[],
3498                  struct rte_flow_action actions_sfx[],
3499                  struct rte_flow_action actions_pre[])
3500 {
3501         struct rte_flow_action *tag_action = NULL;
3502         struct rte_flow_item *tag_item;
3503         struct mlx5_rte_flow_action_set_tag *set_tag;
3504         struct rte_flow_error error;
3505         const struct rte_flow_action_raw_encap *raw_encap;
3506         const struct rte_flow_action_raw_decap *raw_decap;
3507         struct mlx5_rte_flow_item_tag *tag_spec;
3508         struct mlx5_rte_flow_item_tag *tag_mask;
3509         uint32_t tag_id;
3510         bool copy_vlan = false;
3511
3512         /* Prepare the actions for prefix and suffix flow. */
3513         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3514                 struct rte_flow_action **action_cur = NULL;
3515
3516                 switch (actions->type) {
3517                 case RTE_FLOW_ACTION_TYPE_METER:
3518                         /* Add the extra tag action first. */
3519                         tag_action = actions_pre;
3520                         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3521                         actions_pre++;
3522                         action_cur = &actions_pre;
3523                         break;
3524                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3525                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3526                         action_cur = &actions_pre;
3527                         break;
3528                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3529                         raw_encap = actions->conf;
3530                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
3531                                 action_cur = &actions_pre;
3532                         break;
3533                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3534                         raw_decap = actions->conf;
3535                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3536                                 action_cur = &actions_pre;
3537                         break;
3538                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3539                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3540                         copy_vlan = true;
3541                         break;
3542                 default:
3543                         break;
3544                 }
3545                 if (!action_cur)
3546                         action_cur = &actions_sfx;
3547                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
3548                 (*action_cur)++;
3549         }
3550         /* Add end action to the actions. */
3551         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3552         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3553         actions_pre++;
3554         /* Set the tag. */
3555         set_tag = (void *)actions_pre;
3556         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3557         /*
3558          * Get the id from the qrss_pool to make qrss share the id with meter.
3559          */
3560         tag_id = flow_qrss_get_id(dev);
3561         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
3562         assert(tag_action);
3563         tag_action->conf = set_tag;
3564         /* Prepare the suffix subflow items. */
3565         tag_item = sfx_items++;
3566         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3567                 int item_type = items->type;
3568
3569                 switch (item_type) {
3570                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3571                         memcpy(sfx_items, items, sizeof(*sfx_items));
3572                         sfx_items++;
3573                         break;
3574                 case RTE_FLOW_ITEM_TYPE_VLAN:
3575                         if (copy_vlan) {
3576                                 memcpy(sfx_items, items, sizeof(*sfx_items));
3577                                 /*
3578                                  * Convert to internal match item, it is used
3579                                  * for vlan push and set vid.
3580                                  */
3581                                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
3582                                 sfx_items++;
3583                         }
3584                         break;
3585                 default:
3586                         break;
3587                 }
3588         }
3589         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3590         sfx_items++;
3591         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
3592         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
3593         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3594         tag_mask = tag_spec + 1;
3595         tag_mask->data = 0xffffff00;
3596         tag_item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3597         tag_item->spec = tag_spec;
3598         tag_item->last = NULL;
3599         tag_item->mask = tag_mask;
3600         return tag_id;
3601 }
3602
3603 /**
3604  * Split action list having QUEUE/RSS for metadata register copy.
3605  *
3606  * Once Q/RSS action is detected in user's action list, the flow action
3607  * should be split in order to copy metadata registers, which will happen in
3608  * RX_CP_TBL like,
3609  *   - CQE->flow_tag := reg_c[1] (MARK)
3610  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3611  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3612  * This is because the last action of each flow must be a terminal action
3613  * (QUEUE, RSS or DROP).
3614  *
3615  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3616  * stored and kept in the mlx5_flow structure per each sub_flow.
3617  *
3618  * The Q/RSS action is replaced with,
3619  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3620  * And the following JUMP action is added at the end,
3621  *   - JUMP, to RX_CP_TBL.
3622  *
3623  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3624  * flow_create_split_metadata() routine. The flow will look like,
3625  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3626  *
3627  * @param dev
3628  *   Pointer to Ethernet device.
3629  * @param[out] split_actions
3630  *   Pointer to store split actions to jump to CP_TBL.
3631  * @param[in] actions
3632  *   Pointer to the list of original flow actions.
3633  * @param[in] qrss
3634  *   Pointer to the Q/RSS action.
3635  * @param[in] actions_n
3636  *   Number of original actions.
3637  * @param[out] error
3638  *   Perform verbose error reporting if not NULL.
3639  *
3640  * @return
3641  *   non-zero unique flow_id on success, otherwise 0 and
3642  *   error/rte_error are set.
3643  */
3644 static uint32_t
3645 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3646                           struct rte_flow_action *split_actions,
3647                           const struct rte_flow_action *actions,
3648                           const struct rte_flow_action *qrss,
3649                           int actions_n, struct rte_flow_error *error)
3650 {
3651         struct mlx5_rte_flow_action_set_tag *set_tag;
3652         struct rte_flow_action_jump *jump;
3653         const int qrss_idx = qrss - actions;
3654         uint32_t flow_id = 0;
3655         int ret = 0;
3656
3657         /*
3658          * Given actions will be split
3659          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3660          * - Add jump to mreg CP_TBL.
3661          * As a result, there will be one more action.
3662          */
3663         ++actions_n;
3664         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3665         set_tag = (void *)(split_actions + actions_n);
3666         /*
3667          * If tag action is not set to void(it means we are not the meter
3668          * suffix flow), add the tag action. Since meter suffix flow already
3669          * has the tag added.
3670          */
3671         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
3672                 /*
3673                  * Allocate the new subflow ID. This one is unique within
3674                  * device and not shared with representors. Otherwise,
3675                  * we would have to resolve multi-thread access synch
3676                  * issue. Each flow on the shared device is appended
3677                  * with source vport identifier, so the resulting
3678                  * flows will be unique in the shared (by master and
3679                  * representors) domain even if they have coinciding
3680                  * IDs.
3681                  */
3682                 flow_id = flow_qrss_get_id(dev);
3683                 if (!flow_id)
3684                         return rte_flow_error_set(error, ENOMEM,
3685                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3686                                                   NULL, "can't allocate id "
3687                                                   "for split Q/RSS subflow");
3688                 /* Internal SET_TAG action to set flow ID. */
3689                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3690                         .data = flow_id,
3691                 };
3692                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3693                 if (ret < 0)
3694                         return ret;
3695                 set_tag->id = ret;
3696                 /* Construct new actions array. */
3697                 /* Replace QUEUE/RSS action. */
3698                 split_actions[qrss_idx] = (struct rte_flow_action){
3699                         .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3700                         .conf = set_tag,
3701                 };
3702         }
3703         /* JUMP action to jump to mreg copy table (CP_TBL). */
3704         jump = (void *)(set_tag + 1);
3705         *jump = (struct rte_flow_action_jump){
3706                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3707         };
3708         split_actions[actions_n - 2] = (struct rte_flow_action){
3709                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3710                 .conf = jump,
3711         };
3712         split_actions[actions_n - 1] = (struct rte_flow_action){
3713                 .type = RTE_FLOW_ACTION_TYPE_END,
3714         };
3715         return flow_id;
3716 }
3717
3718 /**
3719  * Extend the given action list for Tx metadata copy.
3720  *
3721  * Copy the given action list to the ext_actions and add flow metadata register
3722  * copy action in order to copy reg_a set by WQE to reg_c[0].
3723  *
3724  * @param[out] ext_actions
3725  *   Pointer to the extended action list.
3726  * @param[in] actions
3727  *   Pointer to the list of actions.
3728  * @param[in] actions_n
3729  *   Number of actions in the list.
3730  * @param[out] error
3731  *   Perform verbose error reporting if not NULL.
3732  * @param[in] encap_idx
3733  *   The encap action inndex.
3734  *
3735  * @return
3736  *   0 on success, negative value otherwise
3737  */
3738 static int
3739 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3740                        struct rte_flow_action *ext_actions,
3741                        const struct rte_flow_action *actions,
3742                        int actions_n, struct rte_flow_error *error,
3743                        int encap_idx)
3744 {
3745         struct mlx5_flow_action_copy_mreg *cp_mreg =
3746                 (struct mlx5_flow_action_copy_mreg *)
3747                         (ext_actions + actions_n + 1);
3748         int ret;
3749
3750         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3751         if (ret < 0)
3752                 return ret;
3753         cp_mreg->dst = ret;
3754         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3755         if (ret < 0)
3756                 return ret;
3757         cp_mreg->src = ret;
3758         if (encap_idx != 0)
3759                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
3760         if (encap_idx == actions_n - 1) {
3761                 ext_actions[actions_n - 1] = (struct rte_flow_action){
3762                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3763                         .conf = cp_mreg,
3764                 };
3765                 ext_actions[actions_n] = (struct rte_flow_action){
3766                         .type = RTE_FLOW_ACTION_TYPE_END,
3767                 };
3768         } else {
3769                 ext_actions[encap_idx] = (struct rte_flow_action){
3770                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3771                         .conf = cp_mreg,
3772                 };
3773                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
3774                                 sizeof(*ext_actions) * (actions_n - encap_idx));
3775         }
3776         return 0;
3777 }
3778
3779 /**
3780  * The splitting for metadata feature.
3781  *
3782  * - Q/RSS action on NIC Rx should be split in order to pass by
3783  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3784  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3785  *
3786  * - All the actions on NIC Tx should have a mreg copy action to
3787  *   copy reg_a from WQE to reg_c[0].
3788  *
3789  * @param dev
3790  *   Pointer to Ethernet device.
3791  * @param[in] flow
3792  *   Parent flow structure pointer.
3793  * @param[in] prefix_layers
3794  *   Prefix flow layer flags.
3795  * @param[in] attr
3796  *   Flow rule attributes.
3797  * @param[in] items
3798  *   Pattern specification (list terminated by the END pattern item).
3799  * @param[in] actions
3800  *   Associated actions (list terminated by the END action).
3801  * @param[in] external
3802  *   This flow rule is created by request external to PMD.
3803  * @param[out] error
3804  *   Perform verbose error reporting if not NULL.
3805  * @return
3806  *   0 on success, negative value otherwise
3807  */
3808 static int
3809 flow_create_split_metadata(struct rte_eth_dev *dev,
3810                            struct rte_flow *flow,
3811                            uint64_t prefix_layers,
3812                            const struct rte_flow_attr *attr,
3813                            const struct rte_flow_item items[],
3814                            const struct rte_flow_action actions[],
3815                            bool external, struct rte_flow_error *error)
3816 {
3817         struct mlx5_priv *priv = dev->data->dev_private;
3818         struct mlx5_dev_config *config = &priv->config;
3819         const struct rte_flow_action *qrss = NULL;
3820         struct rte_flow_action *ext_actions = NULL;
3821         struct mlx5_flow *dev_flow = NULL;
3822         uint32_t qrss_id = 0;
3823         int mtr_sfx = 0;
3824         size_t act_size;
3825         int actions_n;
3826         int encap_idx;
3827         int ret;
3828
3829         /* Check whether extensive metadata feature is engaged. */
3830         if (!config->dv_flow_en ||
3831             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3832             !mlx5_flow_ext_mreg_supported(dev))
3833                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
3834                                                attr, items, actions, external,
3835                                                error);
3836         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
3837                                                            &encap_idx);
3838         if (qrss) {
3839                 /* Exclude hairpin flows from splitting. */
3840                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3841                         const struct rte_flow_action_queue *queue;
3842
3843                         queue = qrss->conf;
3844                         if (mlx5_rxq_get_type(dev, queue->index) ==
3845                             MLX5_RXQ_TYPE_HAIRPIN)
3846                                 qrss = NULL;
3847                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3848                         const struct rte_flow_action_rss *rss;
3849
3850                         rss = qrss->conf;
3851                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3852                             MLX5_RXQ_TYPE_HAIRPIN)
3853                                 qrss = NULL;
3854                 }
3855         }
3856         if (qrss) {
3857                 /* Check if it is in meter suffix table. */
3858                 mtr_sfx = attr->group == (attr->transfer ?
3859                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3860                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
3861                 /*
3862                  * Q/RSS action on NIC Rx should be split in order to pass by
3863                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3864                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3865                  */
3866                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3867                            sizeof(struct rte_flow_action_set_tag) +
3868                            sizeof(struct rte_flow_action_jump);
3869                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3870                 if (!ext_actions)
3871                         return rte_flow_error_set(error, ENOMEM,
3872                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3873                                                   NULL, "no memory to split "
3874                                                   "metadata flow");
3875                 /*
3876                  * If we are the suffix flow of meter, tag already exist.
3877                  * Set the tag action to void.
3878                  */
3879                 if (mtr_sfx)
3880                         ext_actions[qrss - actions].type =
3881                                                 RTE_FLOW_ACTION_TYPE_VOID;
3882                 else
3883                         ext_actions[qrss - actions].type =
3884                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3885                 /*
3886                  * Create the new actions list with removed Q/RSS action
3887                  * and appended set tag and jump to register copy table
3888                  * (RX_CP_TBL). We should preallocate unique tag ID here
3889                  * in advance, because it is needed for set tag action.
3890                  */
3891                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3892                                                     qrss, actions_n, error);
3893                 if (!mtr_sfx && !qrss_id) {
3894                         ret = -rte_errno;
3895                         goto exit;
3896                 }
3897         } else if (attr->egress && !attr->transfer) {
3898                 /*
3899                  * All the actions on NIC Tx should have a metadata register
3900                  * copy action to copy reg_a from WQE to reg_c[meta]
3901                  */
3902                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3903                            sizeof(struct mlx5_flow_action_copy_mreg);
3904                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3905                 if (!ext_actions)
3906                         return rte_flow_error_set(error, ENOMEM,
3907                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3908                                                   NULL, "no memory to split "
3909                                                   "metadata flow");
3910                 /* Create the action list appended with copy register. */
3911                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3912                                              actions_n, error, encap_idx);
3913                 if (ret < 0)
3914                         goto exit;
3915         }
3916         /* Add the unmodified original or prefix subflow. */
3917         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, attr,
3918                                       items, ext_actions ? ext_actions :
3919                                       actions, external, error);
3920         if (ret < 0)
3921                 goto exit;
3922         MLX5_ASSERT(dev_flow);
3923         if (qrss) {
3924                 const struct rte_flow_attr q_attr = {
3925                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3926                         .ingress = 1,
3927                 };
3928                 /* Internal PMD action to set register. */
3929                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3930                         .data = qrss_id,
3931                         .id = 0,
3932                 };
3933                 struct rte_flow_item q_items[] = {
3934                         {
3935                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3936                                 .spec = &q_tag_spec,
3937                                 .last = NULL,
3938                                 .mask = NULL,
3939                         },
3940                         {
3941                                 .type = RTE_FLOW_ITEM_TYPE_END,
3942                         },
3943                 };
3944                 struct rte_flow_action q_actions[] = {
3945                         {
3946                                 .type = qrss->type,
3947                                 .conf = qrss->conf,
3948                         },
3949                         {
3950                                 .type = RTE_FLOW_ACTION_TYPE_END,
3951                         },
3952                 };
3953                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
3954
3955                 /*
3956                  * Configure the tag item only if there is no meter subflow.
3957                  * Since tag is already marked in the meter suffix subflow
3958                  * we can just use the meter suffix items as is.
3959                  */
3960                 if (qrss_id) {
3961                         /* Not meter subflow. */
3962                         MLX5_ASSERT(!mtr_sfx);
3963                         /*
3964                          * Put unique id in prefix flow due to it is destroyed
3965                          * after suffix flow and id will be freed after there
3966                          * is no actual flows with this id and identifier
3967                          * reallocation becomes possible (for example, for
3968                          * other flows in other threads).
3969                          */
3970                         dev_flow->qrss_id = qrss_id;
3971                         qrss_id = 0;
3972                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
3973                                                    error);
3974                         if (ret < 0)
3975                                 goto exit;
3976                         q_tag_spec.id = ret;
3977                 }
3978                 dev_flow = NULL;
3979                 /* Add suffix subflow to execute Q/RSS. */
3980                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers,
3981                                               &q_attr, mtr_sfx ? items :
3982                                               q_items, q_actions,
3983                                               external, error);
3984                 if (ret < 0)
3985                         goto exit;
3986                 MLX5_ASSERT(dev_flow);
3987         }
3988
3989 exit:
3990         /*
3991          * We do not destroy the partially created sub_flows in case of error.
3992          * These ones are included into parent flow list and will be destroyed
3993          * by flow_drv_destroy.
3994          */
3995         flow_qrss_free_id(dev, qrss_id);
3996         rte_free(ext_actions);
3997         return ret;
3998 }
3999
4000 /**
4001  * The splitting for meter feature.
4002  *
4003  * - The meter flow will be split to two flows as prefix and
4004  *   suffix flow. The packets make sense only it pass the prefix
4005  *   meter action.
4006  *
4007  * - Reg_C_5 is used for the packet to match betweend prefix and
4008  *   suffix flow.
4009  *
4010  * @param dev
4011  *   Pointer to Ethernet device.
4012  * @param[in] flow
4013  *   Parent flow structure pointer.
4014  * @param[in] attr
4015  *   Flow rule attributes.
4016  * @param[in] items
4017  *   Pattern specification (list terminated by the END pattern item).
4018  * @param[in] actions
4019  *   Associated actions (list terminated by the END action).
4020  * @param[in] external
4021  *   This flow rule is created by request external to PMD.
4022  * @param[out] error
4023  *   Perform verbose error reporting if not NULL.
4024  * @return
4025  *   0 on success, negative value otherwise
4026  */
4027 static int
4028 flow_create_split_meter(struct rte_eth_dev *dev,
4029                            struct rte_flow *flow,
4030                            const struct rte_flow_attr *attr,
4031                            const struct rte_flow_item items[],
4032                            const struct rte_flow_action actions[],
4033                            bool external, struct rte_flow_error *error)
4034 {
4035         struct mlx5_priv *priv = dev->data->dev_private;
4036         struct rte_flow_action *sfx_actions = NULL;
4037         struct rte_flow_action *pre_actions = NULL;
4038         struct rte_flow_item *sfx_items = NULL;
4039         struct mlx5_flow *dev_flow = NULL;
4040         struct rte_flow_attr sfx_attr = *attr;
4041         uint32_t mtr = 0;
4042         uint32_t mtr_tag_id = 0;
4043         size_t act_size;
4044         size_t item_size;
4045         int actions_n = 0;
4046         int ret;
4047
4048         if (priv->mtr_en)
4049                 actions_n = flow_check_meter_action(actions, &mtr);
4050         if (mtr) {
4051                 /* The five prefix actions: meter, decap, encap, tag, end. */
4052                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
4053                            sizeof(struct mlx5_rte_flow_action_set_tag);
4054                 /* tag, vlan, port id, end. */
4055 #define METER_SUFFIX_ITEM 4
4056                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
4057                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
4058                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
4059                 if (!sfx_actions)
4060                         return rte_flow_error_set(error, ENOMEM,
4061                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4062                                                   NULL, "no memory to split "
4063                                                   "meter flow");
4064                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
4065                              act_size);
4066                 pre_actions = sfx_actions + actions_n;
4067                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
4068                                                    actions, sfx_actions,
4069                                                    pre_actions);
4070                 if (!mtr_tag_id) {
4071                         ret = -rte_errno;
4072                         goto exit;
4073                 }
4074                 /* Add the prefix subflow. */
4075                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, attr,
4076                                               items, pre_actions, external,
4077                                               error);
4078                 if (ret) {
4079                         ret = -rte_errno;
4080                         goto exit;
4081                 }
4082                 dev_flow->mtr_flow_id = mtr_tag_id;
4083                 /* Setting the sfx group atrr. */
4084                 sfx_attr.group = sfx_attr.transfer ?
4085                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4086                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
4087         }
4088         /* Add the prefix subflow. */
4089         ret = flow_create_split_metadata(dev, flow, dev_flow ?
4090                                          flow_get_prefix_layer_flags(dev_flow) :
4091                                          0, &sfx_attr,
4092                                          sfx_items ? sfx_items : items,
4093                                          sfx_actions ? sfx_actions : actions,
4094                                          external, error);
4095 exit:
4096         if (sfx_actions)
4097                 rte_free(sfx_actions);
4098         return ret;
4099 }
4100
4101 /**
4102  * Split the flow to subflow set. The splitters might be linked
4103  * in the chain, like this:
4104  * flow_create_split_outer() calls:
4105  *   flow_create_split_meter() calls:
4106  *     flow_create_split_metadata(meter_subflow_0) calls:
4107  *       flow_create_split_inner(metadata_subflow_0)
4108  *       flow_create_split_inner(metadata_subflow_1)
4109  *       flow_create_split_inner(metadata_subflow_2)
4110  *     flow_create_split_metadata(meter_subflow_1) calls:
4111  *       flow_create_split_inner(metadata_subflow_0)
4112  *       flow_create_split_inner(metadata_subflow_1)
4113  *       flow_create_split_inner(metadata_subflow_2)
4114  *
4115  * This provide flexible way to add new levels of flow splitting.
4116  * The all of successfully created subflows are included to the
4117  * parent flow dev_flow list.
4118  *
4119  * @param dev
4120  *   Pointer to Ethernet device.
4121  * @param[in] flow
4122  *   Parent flow structure pointer.
4123  * @param[in] attr
4124  *   Flow rule attributes.
4125  * @param[in] items
4126  *   Pattern specification (list terminated by the END pattern item).
4127  * @param[in] actions
4128  *   Associated actions (list terminated by the END action).
4129  * @param[in] external
4130  *   This flow rule is created by request external to PMD.
4131  * @param[out] error
4132  *   Perform verbose error reporting if not NULL.
4133  * @return
4134  *   0 on success, negative value otherwise
4135  */
4136 static int
4137 flow_create_split_outer(struct rte_eth_dev *dev,
4138                         struct rte_flow *flow,
4139                         const struct rte_flow_attr *attr,
4140                         const struct rte_flow_item items[],
4141                         const struct rte_flow_action actions[],
4142                         bool external, struct rte_flow_error *error)
4143 {
4144         int ret;
4145
4146         ret = flow_create_split_meter(dev, flow, attr, items,
4147                                          actions, external, error);
4148         MLX5_ASSERT(ret <= 0);
4149         return ret;
4150 }
4151
4152 /**
4153  * Create a flow and add it to @p list.
4154  *
4155  * @param dev
4156  *   Pointer to Ethernet device.
4157  * @param list
4158  *   Pointer to a TAILQ flow list. If this parameter NULL,
4159  *   no list insertion occurred, flow is just created,
4160  *   this is caller's responsibility to track the
4161  *   created flow.
4162  * @param[in] attr
4163  *   Flow rule attributes.
4164  * @param[in] items
4165  *   Pattern specification (list terminated by the END pattern item).
4166  * @param[in] actions
4167  *   Associated actions (list terminated by the END action).
4168  * @param[in] external
4169  *   This flow rule is created by request external to PMD.
4170  * @param[out] error
4171  *   Perform verbose error reporting if not NULL.
4172  *
4173  * @return
4174  *   A flow on success, NULL otherwise and rte_errno is set.
4175  */
4176 static struct rte_flow *
4177 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4178                  const struct rte_flow_attr *attr,
4179                  const struct rte_flow_item items[],
4180                  const struct rte_flow_action actions[],
4181                  bool external, struct rte_flow_error *error)
4182 {
4183         struct mlx5_priv *priv = dev->data->dev_private;
4184         struct rte_flow *flow = NULL;
4185         struct mlx5_flow *dev_flow;
4186         const struct rte_flow_action_rss *rss;
4187         union {
4188                 struct rte_flow_expand_rss buf;
4189                 uint8_t buffer[2048];
4190         } expand_buffer;
4191         union {
4192                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4193                 uint8_t buffer[2048];
4194         } actions_rx;
4195         union {
4196                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4197                 uint8_t buffer[2048];
4198         } actions_hairpin_tx;
4199         union {
4200                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4201                 uint8_t buffer[2048];
4202         } items_tx;
4203         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4204         const struct rte_flow_action *p_actions_rx = actions;
4205         uint32_t i;
4206         uint32_t flow_size;
4207         int hairpin_flow = 0;
4208         uint32_t hairpin_id = 0;
4209         struct rte_flow_attr attr_tx = { .priority = 0 };
4210         int ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4211                                     error);
4212
4213         if (ret < 0)
4214                 return NULL;
4215         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4216         if (hairpin_flow > 0) {
4217                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4218                         rte_errno = EINVAL;
4219                         return NULL;
4220                 }
4221                 flow_hairpin_split(dev, actions, actions_rx.actions,
4222                                    actions_hairpin_tx.actions, items_tx.items,
4223                                    &hairpin_id);
4224                 p_actions_rx = actions_rx.actions;
4225         }
4226         flow_size = sizeof(struct rte_flow);
4227         rss = flow_get_rss_action(p_actions_rx);
4228         if (rss)
4229                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4230                                             sizeof(void *));
4231         else
4232                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4233         flow = rte_calloc(__func__, 1, flow_size, 0);
4234         if (!flow) {
4235                 rte_errno = ENOMEM;
4236                 goto error_before_flow;
4237         }
4238         flow->drv_type = flow_get_drv_type(dev, attr);
4239         if (hairpin_id != 0)
4240                 flow->hairpin_flow_id = hairpin_id;
4241         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4242                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
4243         flow->rss.queue = (void *)(flow + 1);
4244         if (rss) {
4245                 /*
4246                  * The following information is required by
4247                  * mlx5_flow_hashfields_adjust() in advance.
4248                  */
4249                 flow->rss.level = rss->level;
4250                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4251                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4252         }
4253         LIST_INIT(&flow->dev_flows);
4254         if (rss && rss->types) {
4255                 unsigned int graph_root;
4256
4257                 graph_root = find_graph_root(items, rss->level);
4258                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4259                                           items, rss->types,
4260                                           mlx5_support_expansion,
4261                                           graph_root);
4262                 MLX5_ASSERT(ret > 0 &&
4263                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4264         } else {
4265                 buf->entries = 1;
4266                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4267         }
4268         for (i = 0; i < buf->entries; ++i) {
4269                 /*
4270                  * The splitter may create multiple dev_flows,
4271                  * depending on configuration. In the simplest
4272                  * case it just creates unmodified original flow.
4273                  */
4274                 ret = flow_create_split_outer(dev, flow, attr,
4275                                               buf->entry[i].pattern,
4276                                               p_actions_rx, external,
4277                                               error);
4278                 if (ret < 0)
4279                         goto error;
4280         }
4281         /* Create the tx flow. */
4282         if (hairpin_flow) {
4283                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4284                 attr_tx.ingress = 0;
4285                 attr_tx.egress = 1;
4286                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
4287                                             actions_hairpin_tx.actions, error);
4288                 if (!dev_flow)
4289                         goto error;
4290                 dev_flow->flow = flow;
4291                 dev_flow->external = 0;
4292                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
4293                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4294                                          items_tx.items,
4295                                          actions_hairpin_tx.actions, error);
4296                 if (ret < 0)
4297                         goto error;
4298         }
4299         /*
4300          * Update the metadata register copy table. If extensive
4301          * metadata feature is enabled and registers are supported
4302          * we might create the extra rte_flow for each unique
4303          * MARK/FLAG action ID.
4304          *
4305          * The table is updated for ingress Flows only, because
4306          * the egress Flows belong to the different device and
4307          * copy table should be updated in peer NIC Rx domain.
4308          */
4309         if (attr->ingress &&
4310             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4311                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4312                 if (ret)
4313                         goto error;
4314         }
4315         if (dev->data->dev_started) {
4316                 ret = flow_drv_apply(dev, flow, error);
4317                 if (ret < 0)
4318                         goto error;
4319         }
4320         if (list)
4321                 TAILQ_INSERT_TAIL(list, flow, next);
4322         flow_rxq_flags_set(dev, flow);
4323         return flow;
4324 error_before_flow:
4325         if (hairpin_id)
4326                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4327                                      hairpin_id);
4328         return NULL;
4329 error:
4330         MLX5_ASSERT(flow);
4331         flow_mreg_del_copy_action(dev, flow);
4332         ret = rte_errno; /* Save rte_errno before cleanup. */
4333         if (flow->hairpin_flow_id)
4334                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4335                                      flow->hairpin_flow_id);
4336         MLX5_ASSERT(flow);
4337         flow_drv_destroy(dev, flow);
4338         rte_free(flow);
4339         rte_errno = ret; /* Restore rte_errno. */
4340         return NULL;
4341 }
4342
4343 /**
4344  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4345  * incoming packets to table 1.
4346  *
4347  * Other flow rules, requested for group n, will be created in
4348  * e-switch table n+1.
4349  * Jump action to e-switch group n will be created to group n+1.
4350  *
4351  * Used when working in switchdev mode, to utilise advantages of table 1
4352  * and above.
4353  *
4354  * @param dev
4355  *   Pointer to Ethernet device.
4356  *
4357  * @return
4358  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4359  */
4360 struct rte_flow *
4361 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4362 {
4363         const struct rte_flow_attr attr = {
4364                 .group = 0,
4365                 .priority = 0,
4366                 .ingress = 1,
4367                 .egress = 0,
4368                 .transfer = 1,
4369         };
4370         const struct rte_flow_item pattern = {
4371                 .type = RTE_FLOW_ITEM_TYPE_END,
4372         };
4373         struct rte_flow_action_jump jump = {
4374                 .group = 1,
4375         };
4376         const struct rte_flow_action actions[] = {
4377                 {
4378                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4379                         .conf = &jump,
4380                 },
4381                 {
4382                         .type = RTE_FLOW_ACTION_TYPE_END,
4383                 },
4384         };
4385         struct mlx5_priv *priv = dev->data->dev_private;
4386         struct rte_flow_error error;
4387
4388         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4389                                 actions, false, &error);
4390 }
4391
4392 /**
4393  * Create a flow.
4394  *
4395  * @see rte_flow_create()
4396  * @see rte_flow_ops
4397  */
4398 struct rte_flow *
4399 mlx5_flow_create(struct rte_eth_dev *dev,
4400                  const struct rte_flow_attr *attr,
4401                  const struct rte_flow_item items[],
4402                  const struct rte_flow_action actions[],
4403                  struct rte_flow_error *error)
4404 {
4405         struct mlx5_priv *priv = dev->data->dev_private;
4406
4407         return flow_list_create(dev, &priv->flows,
4408                                 attr, items, actions, true, error);
4409 }
4410
4411 /**
4412  * Destroy a flow in a list.
4413  *
4414  * @param dev
4415  *   Pointer to Ethernet device.
4416  * @param list
4417  *   Pointer to a TAILQ flow list. If this parameter NULL,
4418  *   there is no flow removal from the list.
4419  * @param[in] flow
4420  *   Flow to destroy.
4421  */
4422 static void
4423 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4424                   struct rte_flow *flow)
4425 {
4426         struct mlx5_priv *priv = dev->data->dev_private;
4427
4428         /*
4429          * Update RX queue flags only if port is started, otherwise it is
4430          * already clean.
4431          */
4432         if (dev->data->dev_started)
4433                 flow_rxq_flags_trim(dev, flow);
4434         if (flow->hairpin_flow_id)
4435                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4436                                      flow->hairpin_flow_id);
4437         flow_drv_destroy(dev, flow);
4438         if (list)
4439                 TAILQ_REMOVE(list, flow, next);
4440         flow_mreg_del_copy_action(dev, flow);
4441         rte_free(flow->fdir);
4442         rte_free(flow);
4443 }
4444
4445 /**
4446  * Destroy all flows.
4447  *
4448  * @param dev
4449  *   Pointer to Ethernet device.
4450  * @param list
4451  *   Pointer to a TAILQ flow list.
4452  */
4453 void
4454 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
4455 {
4456         while (!TAILQ_EMPTY(list)) {
4457                 struct rte_flow *flow;
4458
4459                 flow = TAILQ_FIRST(list);
4460                 flow_list_destroy(dev, list, flow);
4461         }
4462 }
4463
4464 /**
4465  * Remove all flows.
4466  *
4467  * @param dev
4468  *   Pointer to Ethernet device.
4469  * @param list
4470  *   Pointer to a TAILQ flow list.
4471  */
4472 void
4473 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4474 {
4475         struct rte_flow *flow;
4476
4477         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4478                 flow_drv_remove(dev, flow);
4479                 flow_mreg_stop_copy_action(dev, flow);
4480         }
4481         flow_mreg_del_default_copy_action(dev);
4482         flow_rxq_flags_clear(dev);
4483 }
4484
4485 /**
4486  * Add all flows.
4487  *
4488  * @param dev
4489  *   Pointer to Ethernet device.
4490  * @param list
4491  *   Pointer to a TAILQ flow list.
4492  *
4493  * @return
4494  *   0 on success, a negative errno value otherwise and rte_errno is set.
4495  */
4496 int
4497 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4498 {
4499         struct rte_flow *flow;
4500         struct rte_flow_error error;
4501         int ret = 0;
4502
4503         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4504         ret = flow_mreg_add_default_copy_action(dev, &error);
4505         if (ret < 0)
4506                 return -rte_errno;
4507         /* Apply Flows created by application. */
4508         TAILQ_FOREACH(flow, list, next) {
4509                 ret = flow_mreg_start_copy_action(dev, flow);
4510                 if (ret < 0)
4511                         goto error;
4512                 ret = flow_drv_apply(dev, flow, &error);
4513                 if (ret < 0)
4514                         goto error;
4515                 flow_rxq_flags_set(dev, flow);
4516         }
4517         return 0;
4518 error:
4519         ret = rte_errno; /* Save rte_errno before cleanup. */
4520         mlx5_flow_stop(dev, list);
4521         rte_errno = ret; /* Restore rte_errno. */
4522         return -rte_errno;
4523 }
4524
4525 /**
4526  * Verify the flow list is empty
4527  *
4528  * @param dev
4529  *  Pointer to Ethernet device.
4530  *
4531  * @return the number of flows not released.
4532  */
4533 int
4534 mlx5_flow_verify(struct rte_eth_dev *dev)
4535 {
4536         struct mlx5_priv *priv = dev->data->dev_private;
4537         struct rte_flow *flow;
4538         int ret = 0;
4539
4540         TAILQ_FOREACH(flow, &priv->flows, next) {
4541                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4542                         dev->data->port_id, (void *)flow);
4543                 ++ret;
4544         }
4545         return ret;
4546 }
4547
4548 /**
4549  * Enable default hairpin egress flow.
4550  *
4551  * @param dev
4552  *   Pointer to Ethernet device.
4553  * @param queue
4554  *   The queue index.
4555  *
4556  * @return
4557  *   0 on success, a negative errno value otherwise and rte_errno is set.
4558  */
4559 int
4560 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4561                             uint32_t queue)
4562 {
4563         struct mlx5_priv *priv = dev->data->dev_private;
4564         const struct rte_flow_attr attr = {
4565                 .egress = 1,
4566                 .priority = 0,
4567         };
4568         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4569                 .queue = queue,
4570         };
4571         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4572                 .queue = UINT32_MAX,
4573         };
4574         struct rte_flow_item items[] = {
4575                 {
4576                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4577                         .spec = &queue_spec,
4578                         .last = NULL,
4579                         .mask = &queue_mask,
4580                 },
4581                 {
4582                         .type = RTE_FLOW_ITEM_TYPE_END,
4583                 },
4584         };
4585         struct rte_flow_action_jump jump = {
4586                 .group = MLX5_HAIRPIN_TX_TABLE,
4587         };
4588         struct rte_flow_action actions[2];
4589         struct rte_flow *flow;
4590         struct rte_flow_error error;
4591
4592         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4593         actions[0].conf = &jump;
4594         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4595         flow = flow_list_create(dev, &priv->ctrl_flows,
4596                                 &attr, items, actions, false, &error);
4597         if (!flow) {
4598                 DRV_LOG(DEBUG,
4599                         "Failed to create ctrl flow: rte_errno(%d),"
4600                         " type(%d), message(%s)",
4601                         rte_errno, error.type,
4602                         error.message ? error.message : " (no stated reason)");
4603                 return -rte_errno;
4604         }
4605         return 0;
4606 }
4607
4608 /**
4609  * Enable a control flow configured from the control plane.
4610  *
4611  * @param dev
4612  *   Pointer to Ethernet device.
4613  * @param eth_spec
4614  *   An Ethernet flow spec to apply.
4615  * @param eth_mask
4616  *   An Ethernet flow mask to apply.
4617  * @param vlan_spec
4618  *   A VLAN flow spec to apply.
4619  * @param vlan_mask
4620  *   A VLAN flow mask to apply.
4621  *
4622  * @return
4623  *   0 on success, a negative errno value otherwise and rte_errno is set.
4624  */
4625 int
4626 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4627                     struct rte_flow_item_eth *eth_spec,
4628                     struct rte_flow_item_eth *eth_mask,
4629                     struct rte_flow_item_vlan *vlan_spec,
4630                     struct rte_flow_item_vlan *vlan_mask)
4631 {
4632         struct mlx5_priv *priv = dev->data->dev_private;
4633         const struct rte_flow_attr attr = {
4634                 .ingress = 1,
4635                 .priority = MLX5_FLOW_PRIO_RSVD,
4636         };
4637         struct rte_flow_item items[] = {
4638                 {
4639                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4640                         .spec = eth_spec,
4641                         .last = NULL,
4642                         .mask = eth_mask,
4643                 },
4644                 {
4645                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4646                                               RTE_FLOW_ITEM_TYPE_END,
4647                         .spec = vlan_spec,
4648                         .last = NULL,
4649                         .mask = vlan_mask,
4650                 },
4651                 {
4652                         .type = RTE_FLOW_ITEM_TYPE_END,
4653                 },
4654         };
4655         uint16_t queue[priv->reta_idx_n];
4656         struct rte_flow_action_rss action_rss = {
4657                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4658                 .level = 0,
4659                 .types = priv->rss_conf.rss_hf,
4660                 .key_len = priv->rss_conf.rss_key_len,
4661                 .queue_num = priv->reta_idx_n,
4662                 .key = priv->rss_conf.rss_key,
4663                 .queue = queue,
4664         };
4665         struct rte_flow_action actions[] = {
4666                 {
4667                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4668                         .conf = &action_rss,
4669                 },
4670                 {
4671                         .type = RTE_FLOW_ACTION_TYPE_END,
4672                 },
4673         };
4674         struct rte_flow *flow;
4675         struct rte_flow_error error;
4676         unsigned int i;
4677
4678         if (!priv->reta_idx_n || !priv->rxqs_n) {
4679                 return 0;
4680         }
4681         for (i = 0; i != priv->reta_idx_n; ++i)
4682                 queue[i] = (*priv->reta_idx)[i];
4683         flow = flow_list_create(dev, &priv->ctrl_flows,
4684                                 &attr, items, actions, false, &error);
4685         if (!flow)
4686                 return -rte_errno;
4687         return 0;
4688 }
4689
4690 /**
4691  * Enable a flow control configured from the control plane.
4692  *
4693  * @param dev
4694  *   Pointer to Ethernet device.
4695  * @param eth_spec
4696  *   An Ethernet flow spec to apply.
4697  * @param eth_mask
4698  *   An Ethernet flow mask to apply.
4699  *
4700  * @return
4701  *   0 on success, a negative errno value otherwise and rte_errno is set.
4702  */
4703 int
4704 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4705                struct rte_flow_item_eth *eth_spec,
4706                struct rte_flow_item_eth *eth_mask)
4707 {
4708         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4709 }
4710
4711 /**
4712  * Destroy a flow.
4713  *
4714  * @see rte_flow_destroy()
4715  * @see rte_flow_ops
4716  */
4717 int
4718 mlx5_flow_destroy(struct rte_eth_dev *dev,
4719                   struct rte_flow *flow,
4720                   struct rte_flow_error *error __rte_unused)
4721 {
4722         struct mlx5_priv *priv = dev->data->dev_private;
4723
4724         flow_list_destroy(dev, &priv->flows, flow);
4725         return 0;
4726 }
4727
4728 /**
4729  * Destroy all flows.
4730  *
4731  * @see rte_flow_flush()
4732  * @see rte_flow_ops
4733  */
4734 int
4735 mlx5_flow_flush(struct rte_eth_dev *dev,
4736                 struct rte_flow_error *error __rte_unused)
4737 {
4738         struct mlx5_priv *priv = dev->data->dev_private;
4739
4740         mlx5_flow_list_flush(dev, &priv->flows);
4741         return 0;
4742 }
4743
4744 /**
4745  * Isolated mode.
4746  *
4747  * @see rte_flow_isolate()
4748  * @see rte_flow_ops
4749  */
4750 int
4751 mlx5_flow_isolate(struct rte_eth_dev *dev,
4752                   int enable,
4753                   struct rte_flow_error *error)
4754 {
4755         struct mlx5_priv *priv = dev->data->dev_private;
4756
4757         if (dev->data->dev_started) {
4758                 rte_flow_error_set(error, EBUSY,
4759                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4760                                    NULL,
4761                                    "port must be stopped first");
4762                 return -rte_errno;
4763         }
4764         priv->isolated = !!enable;
4765         if (enable)
4766                 dev->dev_ops = &mlx5_dev_ops_isolate;
4767         else
4768                 dev->dev_ops = &mlx5_dev_ops;
4769         return 0;
4770 }
4771
4772 /**
4773  * Query a flow.
4774  *
4775  * @see rte_flow_query()
4776  * @see rte_flow_ops
4777  */
4778 static int
4779 flow_drv_query(struct rte_eth_dev *dev,
4780                struct rte_flow *flow,
4781                const struct rte_flow_action *actions,
4782                void *data,
4783                struct rte_flow_error *error)
4784 {
4785         const struct mlx5_flow_driver_ops *fops;
4786         enum mlx5_flow_drv_type ftype = flow->drv_type;
4787
4788         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4789         fops = flow_get_drv_ops(ftype);
4790
4791         return fops->query(dev, flow, actions, data, error);
4792 }
4793
4794 /**
4795  * Query a flow.
4796  *
4797  * @see rte_flow_query()
4798  * @see rte_flow_ops
4799  */
4800 int
4801 mlx5_flow_query(struct rte_eth_dev *dev,
4802                 struct rte_flow *flow,
4803                 const struct rte_flow_action *actions,
4804                 void *data,
4805                 struct rte_flow_error *error)
4806 {
4807         int ret;
4808
4809         ret = flow_drv_query(dev, flow, actions, data, error);
4810         if (ret < 0)
4811                 return ret;
4812         return 0;
4813 }
4814
4815 /**
4816  * Convert a flow director filter to a generic flow.
4817  *
4818  * @param dev
4819  *   Pointer to Ethernet device.
4820  * @param fdir_filter
4821  *   Flow director filter to add.
4822  * @param attributes
4823  *   Generic flow parameters structure.
4824  *
4825  * @return
4826  *   0 on success, a negative errno value otherwise and rte_errno is set.
4827  */
4828 static int
4829 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4830                          const struct rte_eth_fdir_filter *fdir_filter,
4831                          struct mlx5_fdir *attributes)
4832 {
4833         struct mlx5_priv *priv = dev->data->dev_private;
4834         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4835         const struct rte_eth_fdir_masks *mask =
4836                 &dev->data->dev_conf.fdir_conf.mask;
4837
4838         /* Validate queue number. */
4839         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4840                 DRV_LOG(ERR, "port %u invalid queue number %d",
4841                         dev->data->port_id, fdir_filter->action.rx_queue);
4842                 rte_errno = EINVAL;
4843                 return -rte_errno;
4844         }
4845         attributes->attr.ingress = 1;
4846         attributes->items[0] = (struct rte_flow_item) {
4847                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4848                 .spec = &attributes->l2,
4849                 .mask = &attributes->l2_mask,
4850         };
4851         switch (fdir_filter->action.behavior) {
4852         case RTE_ETH_FDIR_ACCEPT:
4853                 attributes->actions[0] = (struct rte_flow_action){
4854                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4855                         .conf = &attributes->queue,
4856                 };
4857                 break;
4858         case RTE_ETH_FDIR_REJECT:
4859                 attributes->actions[0] = (struct rte_flow_action){
4860                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4861                 };
4862                 break;
4863         default:
4864                 DRV_LOG(ERR, "port %u invalid behavior %d",
4865                         dev->data->port_id,
4866                         fdir_filter->action.behavior);
4867                 rte_errno = ENOTSUP;
4868                 return -rte_errno;
4869         }
4870         attributes->queue.index = fdir_filter->action.rx_queue;
4871         /* Handle L3. */
4872         switch (fdir_filter->input.flow_type) {
4873         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4874         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4875         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4876                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4877                         .src_addr = input->flow.ip4_flow.src_ip,
4878                         .dst_addr = input->flow.ip4_flow.dst_ip,
4879                         .time_to_live = input->flow.ip4_flow.ttl,
4880                         .type_of_service = input->flow.ip4_flow.tos,
4881                 };
4882                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4883                         .src_addr = mask->ipv4_mask.src_ip,
4884                         .dst_addr = mask->ipv4_mask.dst_ip,
4885                         .time_to_live = mask->ipv4_mask.ttl,
4886                         .type_of_service = mask->ipv4_mask.tos,
4887                         .next_proto_id = mask->ipv4_mask.proto,
4888                 };
4889                 attributes->items[1] = (struct rte_flow_item){
4890                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4891                         .spec = &attributes->l3,
4892                         .mask = &attributes->l3_mask,
4893                 };
4894                 break;
4895         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4896         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4897         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4898                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4899                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4900                         .proto = input->flow.ipv6_flow.proto,
4901                 };
4902
4903                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4904                        input->flow.ipv6_flow.src_ip,
4905                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4906                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4907                        input->flow.ipv6_flow.dst_ip,
4908                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4909                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4910                        mask->ipv6_mask.src_ip,
4911                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4912                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4913                        mask->ipv6_mask.dst_ip,
4914                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4915                 attributes->items[1] = (struct rte_flow_item){
4916                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4917                         .spec = &attributes->l3,
4918                         .mask = &attributes->l3_mask,
4919                 };
4920                 break;
4921         default:
4922                 DRV_LOG(ERR, "port %u invalid flow type%d",
4923                         dev->data->port_id, fdir_filter->input.flow_type);
4924                 rte_errno = ENOTSUP;
4925                 return -rte_errno;
4926         }
4927         /* Handle L4. */
4928         switch (fdir_filter->input.flow_type) {
4929         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4930                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4931                         .src_port = input->flow.udp4_flow.src_port,
4932                         .dst_port = input->flow.udp4_flow.dst_port,
4933                 };
4934                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4935                         .src_port = mask->src_port_mask,
4936                         .dst_port = mask->dst_port_mask,
4937                 };
4938                 attributes->items[2] = (struct rte_flow_item){
4939                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4940                         .spec = &attributes->l4,
4941                         .mask = &attributes->l4_mask,
4942                 };
4943                 break;
4944         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4945                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4946                         .src_port = input->flow.tcp4_flow.src_port,
4947                         .dst_port = input->flow.tcp4_flow.dst_port,
4948                 };
4949                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4950                         .src_port = mask->src_port_mask,
4951                         .dst_port = mask->dst_port_mask,
4952                 };
4953                 attributes->items[2] = (struct rte_flow_item){
4954                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4955                         .spec = &attributes->l4,
4956                         .mask = &attributes->l4_mask,
4957                 };
4958                 break;
4959         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4960                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4961                         .src_port = input->flow.udp6_flow.src_port,
4962                         .dst_port = input->flow.udp6_flow.dst_port,
4963                 };
4964                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4965                         .src_port = mask->src_port_mask,
4966                         .dst_port = mask->dst_port_mask,
4967                 };
4968                 attributes->items[2] = (struct rte_flow_item){
4969                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4970                         .spec = &attributes->l4,
4971                         .mask = &attributes->l4_mask,
4972                 };
4973                 break;
4974         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4975                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4976                         .src_port = input->flow.tcp6_flow.src_port,
4977                         .dst_port = input->flow.tcp6_flow.dst_port,
4978                 };
4979                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4980                         .src_port = mask->src_port_mask,
4981                         .dst_port = mask->dst_port_mask,
4982                 };
4983                 attributes->items[2] = (struct rte_flow_item){
4984                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4985                         .spec = &attributes->l4,
4986                         .mask = &attributes->l4_mask,
4987                 };
4988                 break;
4989         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4990         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4991                 break;
4992         default:
4993                 DRV_LOG(ERR, "port %u invalid flow type%d",
4994                         dev->data->port_id, fdir_filter->input.flow_type);
4995                 rte_errno = ENOTSUP;
4996                 return -rte_errno;
4997         }
4998         return 0;
4999 }
5000
5001 #define FLOW_FDIR_CMP(f1, f2, fld) \
5002         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
5003
5004 /**
5005  * Compare two FDIR flows. If items and actions are identical, the two flows are
5006  * regarded as same.
5007  *
5008  * @param dev
5009  *   Pointer to Ethernet device.
5010  * @param f1
5011  *   FDIR flow to compare.
5012  * @param f2
5013  *   FDIR flow to compare.
5014  *
5015  * @return
5016  *   Zero on match, 1 otherwise.
5017  */
5018 static int
5019 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
5020 {
5021         if (FLOW_FDIR_CMP(f1, f2, attr) ||
5022             FLOW_FDIR_CMP(f1, f2, l2) ||
5023             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
5024             FLOW_FDIR_CMP(f1, f2, l3) ||
5025             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
5026             FLOW_FDIR_CMP(f1, f2, l4) ||
5027             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
5028             FLOW_FDIR_CMP(f1, f2, actions[0].type))
5029                 return 1;
5030         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
5031             FLOW_FDIR_CMP(f1, f2, queue))
5032                 return 1;
5033         return 0;
5034 }
5035
5036 /**
5037  * Search device flow list to find out a matched FDIR flow.
5038  *
5039  * @param dev
5040  *   Pointer to Ethernet device.
5041  * @param fdir_flow
5042  *   FDIR flow to lookup.
5043  *
5044  * @return
5045  *   Pointer of flow if found, NULL otherwise.
5046  */
5047 static struct rte_flow *
5048 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
5049 {
5050         struct mlx5_priv *priv = dev->data->dev_private;
5051         struct rte_flow *flow = NULL;
5052
5053         MLX5_ASSERT(fdir_flow);
5054         TAILQ_FOREACH(flow, &priv->flows, next) {
5055                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
5056                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
5057                                 dev->data->port_id, (void *)flow);
5058                         break;
5059                 }
5060         }
5061         return flow;
5062 }
5063
5064 /**
5065  * Add new flow director filter and store it in list.
5066  *
5067  * @param dev
5068  *   Pointer to Ethernet device.
5069  * @param fdir_filter
5070  *   Flow director filter to add.
5071  *
5072  * @return
5073  *   0 on success, a negative errno value otherwise and rte_errno is set.
5074  */
5075 static int
5076 flow_fdir_filter_add(struct rte_eth_dev *dev,
5077                      const struct rte_eth_fdir_filter *fdir_filter)
5078 {
5079         struct mlx5_priv *priv = dev->data->dev_private;
5080         struct mlx5_fdir *fdir_flow;
5081         struct rte_flow *flow;
5082         int ret;
5083
5084         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
5085         if (!fdir_flow) {
5086                 rte_errno = ENOMEM;
5087                 return -rte_errno;
5088         }
5089         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5090         if (ret)
5091                 goto error;
5092         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5093         if (flow) {
5094                 rte_errno = EEXIST;
5095                 goto error;
5096         }
5097         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5098                                 fdir_flow->items, fdir_flow->actions, true,
5099                                 NULL);
5100         if (!flow)
5101                 goto error;
5102         MLX5_ASSERT(!flow->fdir);
5103         flow->fdir = fdir_flow;
5104         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5105                 dev->data->port_id, (void *)flow);
5106         return 0;
5107 error:
5108         rte_free(fdir_flow);
5109         return -rte_errno;
5110 }
5111
5112 /**
5113  * Delete specific filter.
5114  *
5115  * @param dev
5116  *   Pointer to Ethernet device.
5117  * @param fdir_filter
5118  *   Filter to be deleted.
5119  *
5120  * @return
5121  *   0 on success, a negative errno value otherwise and rte_errno is set.
5122  */
5123 static int
5124 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5125                         const struct rte_eth_fdir_filter *fdir_filter)
5126 {
5127         struct mlx5_priv *priv = dev->data->dev_private;
5128         struct rte_flow *flow;
5129         struct mlx5_fdir fdir_flow = {
5130                 .attr.group = 0,
5131         };
5132         int ret;
5133
5134         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5135         if (ret)
5136                 return -rte_errno;
5137         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5138         if (!flow) {
5139                 rte_errno = ENOENT;
5140                 return -rte_errno;
5141         }
5142         flow_list_destroy(dev, &priv->flows, flow);
5143         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5144                 dev->data->port_id, (void *)flow);
5145         return 0;
5146 }
5147
5148 /**
5149  * Update queue for specific filter.
5150  *
5151  * @param dev
5152  *   Pointer to Ethernet device.
5153  * @param fdir_filter
5154  *   Filter to be updated.
5155  *
5156  * @return
5157  *   0 on success, a negative errno value otherwise and rte_errno is set.
5158  */
5159 static int
5160 flow_fdir_filter_update(struct rte_eth_dev *dev,
5161                         const struct rte_eth_fdir_filter *fdir_filter)
5162 {
5163         int ret;
5164
5165         ret = flow_fdir_filter_delete(dev, fdir_filter);
5166         if (ret)
5167                 return ret;
5168         return flow_fdir_filter_add(dev, fdir_filter);
5169 }
5170
5171 /**
5172  * Flush all filters.
5173  *
5174  * @param dev
5175  *   Pointer to Ethernet device.
5176  */
5177 static void
5178 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5179 {
5180         struct mlx5_priv *priv = dev->data->dev_private;
5181
5182         mlx5_flow_list_flush(dev, &priv->flows);
5183 }
5184
5185 /**
5186  * Get flow director information.
5187  *
5188  * @param dev
5189  *   Pointer to Ethernet device.
5190  * @param[out] fdir_info
5191  *   Resulting flow director information.
5192  */
5193 static void
5194 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5195 {
5196         struct rte_eth_fdir_masks *mask =
5197                 &dev->data->dev_conf.fdir_conf.mask;
5198
5199         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5200         fdir_info->guarant_spc = 0;
5201         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5202         fdir_info->max_flexpayload = 0;
5203         fdir_info->flow_types_mask[0] = 0;
5204         fdir_info->flex_payload_unit = 0;
5205         fdir_info->max_flex_payload_segment_num = 0;
5206         fdir_info->flex_payload_limit = 0;
5207         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5208 }
5209
5210 /**
5211  * Deal with flow director operations.
5212  *
5213  * @param dev
5214  *   Pointer to Ethernet device.
5215  * @param filter_op
5216  *   Operation to perform.
5217  * @param arg
5218  *   Pointer to operation-specific structure.
5219  *
5220  * @return
5221  *   0 on success, a negative errno value otherwise and rte_errno is set.
5222  */
5223 static int
5224 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5225                     void *arg)
5226 {
5227         enum rte_fdir_mode fdir_mode =
5228                 dev->data->dev_conf.fdir_conf.mode;
5229
5230         if (filter_op == RTE_ETH_FILTER_NOP)
5231                 return 0;
5232         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5233             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5234                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5235                         dev->data->port_id, fdir_mode);
5236                 rte_errno = EINVAL;
5237                 return -rte_errno;
5238         }
5239         switch (filter_op) {
5240         case RTE_ETH_FILTER_ADD:
5241                 return flow_fdir_filter_add(dev, arg);
5242         case RTE_ETH_FILTER_UPDATE:
5243                 return flow_fdir_filter_update(dev, arg);
5244         case RTE_ETH_FILTER_DELETE:
5245                 return flow_fdir_filter_delete(dev, arg);
5246         case RTE_ETH_FILTER_FLUSH:
5247                 flow_fdir_filter_flush(dev);
5248                 break;
5249         case RTE_ETH_FILTER_INFO:
5250                 flow_fdir_info_get(dev, arg);
5251                 break;
5252         default:
5253                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5254                         dev->data->port_id, filter_op);
5255                 rte_errno = EINVAL;
5256                 return -rte_errno;
5257         }
5258         return 0;
5259 }
5260
5261 /**
5262  * Manage filter operations.
5263  *
5264  * @param dev
5265  *   Pointer to Ethernet device structure.
5266  * @param filter_type
5267  *   Filter type.
5268  * @param filter_op
5269  *   Operation to perform.
5270  * @param arg
5271  *   Pointer to operation-specific structure.
5272  *
5273  * @return
5274  *   0 on success, a negative errno value otherwise and rte_errno is set.
5275  */
5276 int
5277 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5278                      enum rte_filter_type filter_type,
5279                      enum rte_filter_op filter_op,
5280                      void *arg)
5281 {
5282         switch (filter_type) {
5283         case RTE_ETH_FILTER_GENERIC:
5284                 if (filter_op != RTE_ETH_FILTER_GET) {
5285                         rte_errno = EINVAL;
5286                         return -rte_errno;
5287                 }
5288                 *(const void **)arg = &mlx5_flow_ops;
5289                 return 0;
5290         case RTE_ETH_FILTER_FDIR:
5291                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5292         default:
5293                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5294                         dev->data->port_id, filter_type);
5295                 rte_errno = ENOTSUP;
5296                 return -rte_errno;
5297         }
5298         return 0;
5299 }
5300
5301 /**
5302  * Create the needed meter and suffix tables.
5303  *
5304  * @param[in] dev
5305  *   Pointer to Ethernet device.
5306  * @param[in] fm
5307  *   Pointer to the flow meter.
5308  *
5309  * @return
5310  *   Pointer to table set on success, NULL otherwise.
5311  */
5312 struct mlx5_meter_domains_infos *
5313 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5314                           const struct mlx5_flow_meter *fm)
5315 {
5316         const struct mlx5_flow_driver_ops *fops;
5317
5318         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5319         return fops->create_mtr_tbls(dev, fm);
5320 }
5321
5322 /**
5323  * Destroy the meter table set.
5324  *
5325  * @param[in] dev
5326  *   Pointer to Ethernet device.
5327  * @param[in] tbl
5328  *   Pointer to the meter table set.
5329  *
5330  * @return
5331  *   0 on success.
5332  */
5333 int
5334 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5335                            struct mlx5_meter_domains_infos *tbls)
5336 {
5337         const struct mlx5_flow_driver_ops *fops;
5338
5339         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5340         return fops->destroy_mtr_tbls(dev, tbls);
5341 }
5342
5343 /**
5344  * Create policer rules.
5345  *
5346  * @param[in] dev
5347  *   Pointer to Ethernet device.
5348  * @param[in] fm
5349  *   Pointer to flow meter structure.
5350  * @param[in] attr
5351  *   Pointer to flow attributes.
5352  *
5353  * @return
5354  *   0 on success, -1 otherwise.
5355  */
5356 int
5357 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5358                                struct mlx5_flow_meter *fm,
5359                                const struct rte_flow_attr *attr)
5360 {
5361         const struct mlx5_flow_driver_ops *fops;
5362
5363         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5364         return fops->create_policer_rules(dev, fm, attr);
5365 }
5366
5367 /**
5368  * Destroy policer rules.
5369  *
5370  * @param[in] fm
5371  *   Pointer to flow meter structure.
5372  * @param[in] attr
5373  *   Pointer to flow attributes.
5374  *
5375  * @return
5376  *   0 on success, -1 otherwise.
5377  */
5378 int
5379 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5380                                 struct mlx5_flow_meter *fm,
5381                                 const struct rte_flow_attr *attr)
5382 {
5383         const struct mlx5_flow_driver_ops *fops;
5384
5385         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5386         return fops->destroy_policer_rules(dev, fm, attr);
5387 }
5388
5389 /**
5390  * Allocate a counter.
5391  *
5392  * @param[in] dev
5393  *   Pointer to Ethernet device structure.
5394  *
5395  * @return
5396  *   Pointer to allocated counter  on success, NULL otherwise.
5397  */
5398 struct mlx5_flow_counter *
5399 mlx5_counter_alloc(struct rte_eth_dev *dev)
5400 {
5401         const struct mlx5_flow_driver_ops *fops;
5402         struct rte_flow_attr attr = { .transfer = 0 };
5403
5404         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5405                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5406                 return fops->counter_alloc(dev);
5407         }
5408         DRV_LOG(ERR,
5409                 "port %u counter allocate is not supported.",
5410                  dev->data->port_id);
5411         return NULL;
5412 }
5413
5414 /**
5415  * Free a counter.
5416  *
5417  * @param[in] dev
5418  *   Pointer to Ethernet device structure.
5419  * @param[in] cnt
5420  *   Pointer to counter to be free.
5421  */
5422 void
5423 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
5424 {
5425         const struct mlx5_flow_driver_ops *fops;
5426         struct rte_flow_attr attr = { .transfer = 0 };
5427
5428         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5429                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5430                 fops->counter_free(dev, cnt);
5431                 return;
5432         }
5433         DRV_LOG(ERR,
5434                 "port %u counter free is not supported.",
5435                  dev->data->port_id);
5436 }
5437
5438 /**
5439  * Query counter statistics.
5440  *
5441  * @param[in] dev
5442  *   Pointer to Ethernet device structure.
5443  * @param[in] cnt
5444  *   Pointer to counter to query.
5445  * @param[in] clear
5446  *   Set to clear counter statistics.
5447  * @param[out] pkts
5448  *   The counter hits packets number to save.
5449  * @param[out] bytes
5450  *   The counter hits bytes number to save.
5451  *
5452  * @return
5453  *   0 on success, a negative errno value otherwise.
5454  */
5455 int
5456 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt,
5457                    bool clear, uint64_t *pkts, uint64_t *bytes)
5458 {
5459         const struct mlx5_flow_driver_ops *fops;
5460         struct rte_flow_attr attr = { .transfer = 0 };
5461
5462         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5463                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5464                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5465         }
5466         DRV_LOG(ERR,
5467                 "port %u counter query is not supported.",
5468                  dev->data->port_id);
5469         return -ENOTSUP;
5470 }
5471
5472 #define MLX5_POOL_QUERY_FREQ_US 1000000
5473
5474 /**
5475  * Set the periodic procedure for triggering asynchronous batch queries for all
5476  * the counter pools.
5477  *
5478  * @param[in] sh
5479  *   Pointer to mlx5_ibv_shared object.
5480  */
5481 void
5482 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5483 {
5484         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5485         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5486         uint32_t us;
5487
5488         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5489         pools_n += rte_atomic16_read(&cont->n_valid);
5490         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5491         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5492         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5493                 sh->cmng.query_thread_on = 0;
5494                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5495         } else {
5496                 sh->cmng.query_thread_on = 1;
5497         }
5498 }
5499
5500 /**
5501  * The periodic procedure for triggering asynchronous batch queries for all the
5502  * counter pools. This function is probably called by the host thread.
5503  *
5504  * @param[in] arg
5505  *   The parameter for the alarm process.
5506  */
5507 void
5508 mlx5_flow_query_alarm(void *arg)
5509 {
5510         struct mlx5_ibv_shared *sh = arg;
5511         struct mlx5_devx_obj *dcs;
5512         uint16_t offset;
5513         int ret;
5514         uint8_t batch = sh->cmng.batch;
5515         uint16_t pool_index = sh->cmng.pool_index;
5516         struct mlx5_pools_container *cont;
5517         struct mlx5_pools_container *mcont;
5518         struct mlx5_flow_counter_pool *pool;
5519
5520         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5521                 goto set_alarm;
5522 next_container:
5523         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5524         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5525         /* Check if resize was done and need to flip a container. */
5526         if (cont != mcont) {
5527                 if (cont->pools) {
5528                         /* Clean the old container. */
5529                         rte_free(cont->pools);
5530                         memset(cont, 0, sizeof(*cont));
5531                 }
5532                 rte_cio_wmb();
5533                  /* Flip the host container. */
5534                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5535                 cont = mcont;
5536         }
5537         if (!cont->pools) {
5538                 /* 2 empty containers case is unexpected. */
5539                 if (unlikely(batch != sh->cmng.batch))
5540                         goto set_alarm;
5541                 batch ^= 0x1;
5542                 pool_index = 0;
5543                 goto next_container;
5544         }
5545         pool = cont->pools[pool_index];
5546         if (pool->raw_hw)
5547                 /* There is a pool query in progress. */
5548                 goto set_alarm;
5549         pool->raw_hw =
5550                 LIST_FIRST(&sh->cmng.free_stat_raws);
5551         if (!pool->raw_hw)
5552                 /* No free counter statistics raw memory. */
5553                 goto set_alarm;
5554         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5555                                                               (&pool->a64_dcs);
5556         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5557         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5558                                                offset, NULL, NULL,
5559                                                pool->raw_hw->mem_mng->dm->id,
5560                                                (void *)(uintptr_t)
5561                                                (pool->raw_hw->data + offset),
5562                                                sh->devx_comp,
5563                                                (uint64_t)(uintptr_t)pool);
5564         if (ret) {
5565                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5566                         " %d", pool->min_dcs->id);
5567                 pool->raw_hw = NULL;
5568                 goto set_alarm;
5569         }
5570         pool->raw_hw->min_dcs_id = dcs->id;
5571         LIST_REMOVE(pool->raw_hw, next);
5572         sh->cmng.pending_queries++;
5573         pool_index++;
5574         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5575                 batch ^= 0x1;
5576                 pool_index = 0;
5577         }
5578 set_alarm:
5579         sh->cmng.batch = batch;
5580         sh->cmng.pool_index = pool_index;
5581         mlx5_set_query_alarm(sh);
5582 }
5583
5584 /**
5585  * Handler for the HW respond about ready values from an asynchronous batch
5586  * query. This function is probably called by the host thread.
5587  *
5588  * @param[in] sh
5589  *   The pointer to the shared IB device context.
5590  * @param[in] async_id
5591  *   The Devx async ID.
5592  * @param[in] status
5593  *   The status of the completion.
5594  */
5595 void
5596 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5597                                   uint64_t async_id, int status)
5598 {
5599         struct mlx5_flow_counter_pool *pool =
5600                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5601         struct mlx5_counter_stats_raw *raw_to_free;
5602
5603         if (unlikely(status)) {
5604                 raw_to_free = pool->raw_hw;
5605         } else {
5606                 raw_to_free = pool->raw;
5607                 rte_spinlock_lock(&pool->sl);
5608                 pool->raw = pool->raw_hw;
5609                 rte_spinlock_unlock(&pool->sl);
5610                 rte_atomic64_add(&pool->query_gen, 1);
5611                 /* Be sure the new raw counters data is updated in memory. */
5612                 rte_cio_wmb();
5613         }
5614         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5615         pool->raw_hw = NULL;
5616         sh->cmng.pending_queries--;
5617 }
5618
5619 /**
5620  * Translate the rte_flow group index to HW table value.
5621  *
5622  * @param[in] attributes
5623  *   Pointer to flow attributes
5624  * @param[in] external
5625  *   Value is part of flow rule created by request external to PMD.
5626  * @param[in] group
5627  *   rte_flow group index value.
5628  * @param[out] fdb_def_rule
5629  *   Whether fdb jump to table 1 is configured.
5630  * @param[out] table
5631  *   HW table value.
5632  * @param[out] error
5633  *   Pointer to error structure.
5634  *
5635  * @return
5636  *   0 on success, a negative errno value otherwise and rte_errno is set.
5637  */
5638 int
5639 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5640                          uint32_t group, bool fdb_def_rule, uint32_t *table,
5641                          struct rte_flow_error *error)
5642 {
5643         if (attributes->transfer && external && fdb_def_rule) {
5644                 if (group == UINT32_MAX)
5645                         return rte_flow_error_set
5646                                                 (error, EINVAL,
5647                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5648                                                  NULL,
5649                                                  "group index not supported");
5650                 *table = group + 1;
5651         } else {
5652                 *table = group;
5653         }
5654         return 0;
5655 }
5656
5657 /**
5658  * Discover availability of metadata reg_c's.
5659  *
5660  * Iteratively use test flows to check availability.
5661  *
5662  * @param[in] dev
5663  *   Pointer to the Ethernet device structure.
5664  *
5665  * @return
5666  *   0 on success, a negative errno value otherwise and rte_errno is set.
5667  */
5668 int
5669 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5670 {
5671         struct mlx5_priv *priv = dev->data->dev_private;
5672         struct mlx5_dev_config *config = &priv->config;
5673         enum modify_reg idx;
5674         int n = 0;
5675
5676         /* reg_c[0] and reg_c[1] are reserved. */
5677         config->flow_mreg_c[n++] = REG_C_0;
5678         config->flow_mreg_c[n++] = REG_C_1;
5679         /* Discover availability of other reg_c's. */
5680         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5681                 struct rte_flow_attr attr = {
5682                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5683                         .priority = MLX5_FLOW_PRIO_RSVD,
5684                         .ingress = 1,
5685                 };
5686                 struct rte_flow_item items[] = {
5687                         [0] = {
5688                                 .type = RTE_FLOW_ITEM_TYPE_END,
5689                         },
5690                 };
5691                 struct rte_flow_action actions[] = {
5692                         [0] = {
5693                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5694                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5695                                         .src = REG_C_1,
5696                                         .dst = idx,
5697                                 },
5698                         },
5699                         [1] = {
5700                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5701                                 .conf = &(struct rte_flow_action_jump){
5702                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5703                                 },
5704                         },
5705                         [2] = {
5706                                 .type = RTE_FLOW_ACTION_TYPE_END,
5707                         },
5708                 };
5709                 struct rte_flow *flow;
5710                 struct rte_flow_error error;
5711
5712                 if (!config->dv_flow_en)
5713                         break;
5714                 /* Create internal flow, validation skips copy action. */
5715                 flow = flow_list_create(dev, NULL, &attr, items,
5716                                         actions, false, &error);
5717                 if (!flow)
5718                         continue;
5719                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5720                         config->flow_mreg_c[n++] = idx;
5721                 flow_list_destroy(dev, NULL, flow);
5722         }
5723         for (; n < MLX5_MREG_C_NUM; ++n)
5724                 config->flow_mreg_c[n] = REG_NONE;
5725         return 0;
5726 }
5727
5728 /**
5729  * Dump flow raw hw data to file
5730  *
5731  * @param[in] dev
5732  *    The pointer to Ethernet device.
5733  * @param[in] file
5734  *   A pointer to a file for output.
5735  * @param[out] error
5736  *   Perform verbose error reporting if not NULL. PMDs initialize this
5737  *   structure in case of error only.
5738  * @return
5739  *   0 on success, a nagative value otherwise.
5740  */
5741 int
5742 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
5743                    FILE *file,
5744                    struct rte_flow_error *error __rte_unused)
5745 {
5746         struct mlx5_priv *priv = dev->data->dev_private;
5747         struct mlx5_ibv_shared *sh = priv->sh;
5748
5749         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
5750                                        sh->tx_domain, file);
5751 }